2025-03-30 06:00:40 [INFO] transceiver.py:157 Init transceiver 'BTS@172.18.26.20:5700'
2025-03-30 06:00:40 [DEBUG] data_if.py:31 Init TRXD interface (L:0.0.0.0:5702 <-> R:172.18.26.20:5802)
2025-03-30 06:00:40 [DEBUG] ctrl_if.py:29 Init TRXC interface (L:0.0.0.0:5701 <-> R:172.18.26.20:5801)
2025-03-30 06:00:40 [INFO] transceiver.py:157 Init transceiver 'MS@172.18.26.22:6700'
2025-03-30 06:00:40 [DEBUG] data_if.py:31 Init TRXD interface (L:0.0.0.0:6702 <-> R:172.18.26.22:6802)
2025-03-30 06:00:40 [DEBUG] ctrl_if.py:29 Init TRXC interface (L:0.0.0.0:6701 <-> R:172.18.26.22:6801)
2025-03-30 06:00:40 [INFO] transceiver.py:157 Init transceiver 'TRX1@172.18.26.20:5700/1'
2025-03-30 06:00:40 [DEBUG] data_if.py:31 Init TRXD interface (L:0.0.0.0:5704 <-> R:172.18.26.20:5804)
2025-03-30 06:00:40 [DEBUG] ctrl_if.py:29 Init TRXC interface (L:0.0.0.0:5703 <-> R:172.18.26.20:5803)
2025-03-30 06:00:40 [INFO] transceiver.py:157 Init transceiver 'TRX2@172.18.26.20:5700/2'
2025-03-30 06:00:40 [DEBUG] data_if.py:31 Init TRXD interface (L:0.0.0.0:5706 <-> R:172.18.26.20:5806)
2025-03-30 06:00:40 [DEBUG] ctrl_if.py:29 Init TRXC interface (L:0.0.0.0:5705 <-> R:172.18.26.20:5805)
2025-03-30 06:00:40 [INFO] transceiver.py:157 Init transceiver 'TRX3@172.18.26.20:5700/3'
2025-03-30 06:00:40 [DEBUG] data_if.py:31 Init TRXD interface (L:0.0.0.0:5708 <-> R:172.18.26.20:5808)
2025-03-30 06:00:40 [DEBUG] ctrl_if.py:29 Init TRXC interface (L:0.0.0.0:5707 <-> R:172.18.26.20:5807)
2025-03-30 06:00:40 [INFO] fake_trx.py:426 Init complete
2025-03-30 06:00:40 [INFO] fake_trx.py:457 Setting real time process scheduler to SCHED_RR, priority 30
2025-03-30 06:00:41 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 06:00:41 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 06:00:41 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:00:41 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:00:41 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:00:41 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:00:45 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:00:45 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 06:00:45 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:00:45 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 06:00:45 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 0 -> 1
2025-03-30 06:00:45 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 06:00:45 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 06:00:45 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 06:00:45 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:00:45 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:00:45 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 06:00:45 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 06:00:45 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 0 -> 1
2025-03-30 06:00:45 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 06:00:45 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 06:00:45 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 06:00:45 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:00:45 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 06:00:45 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:00:45 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 06:00:45 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 0 -> 1
2025-03-30 06:00:45 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 06:00:45 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 06:00:45 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 06:00:45 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:00:45 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 06:00:45 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:00:45 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 06:00:45 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 0 -> 1
2025-03-30 06:00:45 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 06:00:45 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 06:00:45 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 06:00:45 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 06:00:45 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 06:00:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 06:00:45 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 06:00:45 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 06:00:45 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 06:00:45 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 06:00:45 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 06:00:45 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 06:00:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 06:00:45 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:00:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:00:45 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:00:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:00:45 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:00:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:00:45 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:00:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:00:45 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:00:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:00:45 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 06:00:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:00:45 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:00:45 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:00:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:00:45 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:00:45 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:00:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:00:45 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:00:45 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:00:45 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:00:45 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:00:45 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 06:00:45 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:00:45 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:00:45 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:00:45 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:00:45 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:00:45 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:00:45 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:00:45 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:00:45 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:00:45 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:00:45 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:00:45 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-03-30 06:00:45 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-03-30 06:00:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:00:45 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 06:00:45 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 06:00:45 [DEBUG] fake_trx.py:317 (BTS@172.18.26.20:5700) Recv FAKE_CI cmd
2025-03-30 06:00:45 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:00:45 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:00:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:00:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:00:45 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:00:45 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:00:45 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:00:45 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:00:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:00:45 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:00:45 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:00:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:00:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:00:46 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-03-30 06:00:46 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:00:46 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:00:46 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:00:46 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:00:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:00:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:00:46 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:00:46 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:00:46 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:00:46 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:00:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:00:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:00:46 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:00:46 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:00:46 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:00:46 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:00:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:00:46 [DEBUG] clck_gen.py:128 IND CLOCK 306
2025-03-30 06:00:46 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:00:46 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:00:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:00:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:00:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:00:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:00:46 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:00:46 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:00:46 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:00:46 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:00:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:00:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:00:46 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:00:46 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:00:46 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:00:46 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:00:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:00:47 [DEBUG] clck_gen.py:128 IND CLOCK 408
2025-03-30 06:00:47 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:00:47 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:00:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:00:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:00:47 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:00:47 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:00:47 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:00:47 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:00:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:00:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:00:47 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:00:47 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:00:47 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:00:47 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:00:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:00:47 [DEBUG] clck_gen.py:128 IND CLOCK 510
2025-03-30 06:00:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:00:47 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:00:47 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:00:47 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:00:47 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:00:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:00:47 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:00:47 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:00:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:00:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:00:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:00:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:00:48 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:00:48 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:00:48 [DEBUG] clck_gen.py:128 IND CLOCK 612
2025-03-30 06:00:48 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:00:48 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:00:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:00:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:00:48 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:00:48 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:00:48 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:00:48 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:00:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:00:48 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:00:48 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:00:48 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:00:48 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:00:48 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:00:48 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:00:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:00:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:00:48 [DEBUG] clck_gen.py:128 IND CLOCK 714
2025-03-30 06:00:48 [DEBUG] clck_gen.py:128 IND CLOCK 816
2025-03-30 06:00:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:00:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:00:49 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:00:49 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:00:49 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:00:49 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:00:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:00:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:00:49 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:00:49 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:00:49 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:00:49 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:00:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:00:49 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:00:49 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:00:49 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:00:49 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:00:49 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:00:49 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:00:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:00:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:00:49 [DEBUG] clck_gen.py:128 IND CLOCK 918
2025-03-30 06:00:49 [DEBUG] clck_gen.py:128 IND CLOCK 1020
2025-03-30 06:00:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:00:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:00:50 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:00:50 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:00:50 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:00:50 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:00:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:00:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:00:50 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:00:50 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:00:50 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:00:50 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:00:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:00:50 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:00:50 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:00:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:00:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:00:50 [DEBUG] clck_gen.py:128 IND CLOCK 1122
2025-03-30 06:00:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:00:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:00:50 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:00:50 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:00:50 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:00:50 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:00:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:00:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:00:50 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:00:50 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:00:50 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:00:50 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:00:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:00:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:00:50 [DEBUG] clck_gen.py:128 IND CLOCK 1224
2025-03-30 06:00:50 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:00:50 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:00:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:00:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:00:51 [DEBUG] clck_gen.py:128 IND CLOCK 1326
2025-03-30 06:00:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:00:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:00:51 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:00:51 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:00:51 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:00:51 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:00:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:00:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:00:51 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:00:51 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:00:51 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:00:51 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:00:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:00:51 [DEBUG] clck_gen.py:128 IND CLOCK 1428
2025-03-30 06:00:51 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:00:51 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:00:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:00:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:00:52 [DEBUG] clck_gen.py:128 IND CLOCK 1530
2025-03-30 06:00:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:00:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:00:52 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:00:52 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:00:52 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:00:52 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:00:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:00:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:00:52 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:00:52 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:00:52 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:00:52 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:00:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:00:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:00:52 [DEBUG] clck_gen.py:128 IND CLOCK 1632
2025-03-30 06:00:52 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:00:52 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:00:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:00:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:00:53 [DEBUG] clck_gen.py:128 IND CLOCK 1734
2025-03-30 06:00:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:00:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:00:53 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:00:53 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:00:53 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:00:53 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:00:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:00:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:00:53 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:00:53 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:00:53 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:00:53 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:00:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:00:53 [DEBUG] clck_gen.py:128 IND CLOCK 1836
2025-03-30 06:00:53 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:00:53 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:00:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:00:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:00:54 [DEBUG] clck_gen.py:128 IND CLOCK 1938
2025-03-30 06:00:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:00:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:00:54 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:00:54 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:00:54 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:00:54 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:00:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:00:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:00:54 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:00:54 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:00:54 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:00:54 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:00:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:00:54 [DEBUG] clck_gen.py:128 IND CLOCK 2040
2025-03-30 06:00:54 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:00:54 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:00:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:00:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:00:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:00:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:00:55 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:00:55 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:00:55 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:00:55 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:00:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:00:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:00:55 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:00:55 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:00:55 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:00:55 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:00:55 [DEBUG] clck_gen.py:128 IND CLOCK 2142
2025-03-30 06:00:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:00:55 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:00:55 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:00:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:00:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:00:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:00:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:00:55 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:00:55 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:00:55 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:00:55 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:00:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:00:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:00:55 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:00:55 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:00:55 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:00:55 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:00:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:00:55 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:00:55 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:00:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:00:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:00:55 [DEBUG] clck_gen.py:128 IND CLOCK 2244
2025-03-30 06:00:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:00:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:00:55 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:00:55 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:00:55 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:00:55 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:00:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:00:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:00:55 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:00:55 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:00:55 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:00:55 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:00:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:00:55 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:00:55 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:00:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:00:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:00:56 [DEBUG] clck_gen.py:128 IND CLOCK 2346
2025-03-30 06:00:56 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:00:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:00:56 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:00:56 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:00:56 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:00:56 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:00:56 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:00:56 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:00:56 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:00:56 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:00:56 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:00:56 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:00:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:00:56 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:00:56 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:00:56 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:00:56 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:00:56 [DEBUG] clck_gen.py:128 IND CLOCK 2448
2025-03-30 06:00:56 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:00:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:00:56 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:00:56 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:00:56 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:00:56 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:00:56 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:00:56 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:00:56 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:00:56 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:00:56 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:00:56 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:00:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:00:56 [DEBUG] clck_gen.py:128 IND CLOCK 2550
2025-03-30 06:00:56 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:00:56 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:00:56 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:00:56 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:00:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:00:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:00:57 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:00:57 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:00:57 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:00:57 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:00:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:00:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:00:57 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:00:57 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:00:57 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:00:57 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:00:57 [DEBUG] clck_gen.py:128 IND CLOCK 2652
2025-03-30 06:00:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:00:57 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:00:57 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:00:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:00:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:00:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:00:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:00:57 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:00:57 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:00:57 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:00:57 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:00:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:00:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:00:57 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:00:57 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:00:57 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:00:57 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:00:57 [DEBUG] clck_gen.py:128 IND CLOCK 2754
2025-03-30 06:00:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:00:57 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:00:57 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:00:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:00:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:00:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:00:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:00:58 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:00:58 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:00:58 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:00:58 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:00:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:00:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:00:58 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:00:58 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:00:58 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:00:58 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:00:58 [DEBUG] clck_gen.py:128 IND CLOCK 2856
2025-03-30 06:00:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:00:58 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:00:58 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:00:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:00:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:00:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:00:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:00:58 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:00:58 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:00:58 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:00:58 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:00:58 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:00:58 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:00:58 [DEBUG] clck_gen.py:128 IND CLOCK 2958
2025-03-30 06:00:58 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:00:58 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:00:58 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:00:58 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:00:58 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=2960): ver=1 fn=2959 tn=0 bl=148 pwr=0
2025-03-30 06:00:58 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=2960): ver=1 fn=2959 tn=1 bl=148 pwr=0
2025-03-30 06:00:58 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 06:00:58 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=2960): ver=1 fn=2959 tn=2 bl=148 pwr=0
2025-03-30 06:00:58 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 06:00:58 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=2960): ver=1 fn=2959 tn=3 bl=148 pwr=0
2025-03-30 06:00:58 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 06:00:58 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=2960): ver=1 fn=2959 tn=4 bl=148 pwr=0
2025-03-30 06:00:58 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=2960): ver=1 fn=2959 tn=5 bl=148 pwr=0
2025-03-30 06:00:58 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=2960): ver=1 fn=2959 tn=6 bl=148 pwr=0
2025-03-30 06:00:58 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=2960): ver=1 fn=2959 tn=7 bl=148 pwr=0
2025-03-30 06:01:03 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 06:01:03 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 06:01:03 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:01:03 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:01:03 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:01:03 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:01:03 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:01:03 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 06:01:03 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:01:03 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 06:01:03 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 06:01:03 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 06:01:03 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 06:01:03 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 06:01:03 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:01:03 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 06:01:03 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:01:03 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 06:01:03 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 06:01:03 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 06:01:03 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 06:01:03 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 06:01:03 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:01:03 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 06:01:03 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:01:03 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 06:01:03 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 06:01:03 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 06:01:03 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 06:01:03 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 06:01:03 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:01:03 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 06:01:03 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:01:03 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 06:01:03 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 06:01:03 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 06:01:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 06:01:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 06:01:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 06:01:03 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 06:01:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 06:01:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 06:01:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 06:01:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:01:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 06:01:03 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 06:01:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:01:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:01:03 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 06:01:03 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 06:01:03 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 06:01:03 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 06:01:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:01:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:01:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:01:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 06:01:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:01:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:01:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:01:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:01:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:01:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:01:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:01:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:01:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:01:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:01:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:01:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:01:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:01:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:01:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:01:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:01:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:01:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:01:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:01:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:01:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:01:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:01:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:01:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:01:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:01:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:01:03 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-03-30 06:01:04 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-03-30 06:01:04 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-03-30 06:01:04 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-03-30 06:01:04 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-03-30 06:01:04 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-03-30 06:01:04 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-03-30 06:01:04 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-03-30 06:01:04 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-03-30 06:01:04 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-03-30 06:01:04 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=105 tn=0 bl=148 pwr=0
2025-03-30 06:01:04 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=105 tn=1 bl=148 pwr=0
2025-03-30 06:01:04 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=105 tn=2 bl=148 pwr=0
2025-03-30 06:01:04 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=105 tn=3 bl=148 pwr=0
2025-03-30 06:01:04 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=105 tn=4 bl=148 pwr=0
2025-03-30 06:01:04 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=105 tn=5 bl=148 pwr=0
2025-03-30 06:01:04 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=105 tn=6 bl=148 pwr=0
2025-03-30 06:01:04 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=105 tn=7 bl=148 pwr=0
2025-03-30 06:01:04 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=106 tn=0 bl=148 pwr=0
2025-03-30 06:01:04 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=106 tn=1 bl=148 pwr=0
2025-03-30 06:01:04 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=106 tn=2 bl=148 pwr=0
2025-03-30 06:01:04 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=106 tn=3 bl=148 pwr=0
2025-03-30 06:01:04 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=106 tn=4 bl=148 pwr=0
2025-03-30 06:01:04 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=106 tn=5 bl=148 pwr=0
2025-03-30 06:01:04 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=106 tn=6 bl=148 pwr=0
2025-03-30 06:01:04 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=106 tn=7 bl=148 pwr=0
2025-03-30 06:01:04 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=107 tn=0 bl=148 pwr=0
2025-03-30 06:01:04 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=107 tn=1 bl=148 pwr=0
2025-03-30 06:01:04 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=107 tn=2 bl=148 pwr=0
2025-03-30 06:01:04 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=107 tn=3 bl=148 pwr=0
2025-03-30 06:01:04 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=107 tn=4 bl=148 pwr=0
2025-03-30 06:01:04 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=107 tn=5 bl=148 pwr=0
2025-03-30 06:01:04 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=107 tn=6 bl=148 pwr=0
2025-03-30 06:01:04 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=107 tn=7 bl=148 pwr=0
2025-03-30 06:01:04 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 06:01:04 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 06:01:04 [DEBUG] fake_trx.py:317 (BTS@172.18.26.20:5700) Recv FAKE_CI cmd
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:01:04 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:05 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:01:05 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:01:05 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:01:05 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:01:05 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:01:05 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:01:05 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:01:05 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 06:01:05 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 06:01:05 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 06:01:05 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:01:05 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=295 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:01:05 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=295 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:01:05 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=295 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:01:05 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=295 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:01:05 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=295 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:01:05 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=295 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:01:05 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=295 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:01:05 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=295 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:01:10 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 06:01:10 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 06:01:10 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:01:10 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:01:10 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:01:10 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:01:10 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:01:10 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 06:01:10 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:01:10 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 06:01:10 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 06:01:10 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 06:01:10 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 06:01:10 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 06:01:10 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:01:10 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:01:10 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 06:01:10 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 06:01:10 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 06:01:10 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 06:01:10 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 06:01:10 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 06:01:10 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:01:10 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:01:10 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 06:01:10 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 06:01:10 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 06:01:10 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 06:01:10 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 06:01:10 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 06:01:10 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:01:10 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:01:10 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 06:01:10 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 06:01:10 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 06:01:10 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 06:01:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 06:01:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 06:01:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 06:01:10 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 06:01:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 06:01:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 06:01:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 06:01:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:01:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 06:01:10 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 06:01:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:01:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:01:10 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 06:01:10 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 06:01:10 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 06:01:10 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 06:01:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:01:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:01:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:01:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 06:01:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:01:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:01:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:01:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:01:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:01:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:01:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:01:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:01:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:01:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:01:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:01:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:01:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:01:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:01:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:01:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:01:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:01:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:01:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:01:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:01:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:01:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:01:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:01:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:01:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:01:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:01:10 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-03-30 06:01:10 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-03-30 06:01:10 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-03-30 06:01:10 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-03-30 06:01:10 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-03-30 06:01:10 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-03-30 06:01:10 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-03-30 06:01:10 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-03-30 06:01:10 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-03-30 06:01:10 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-03-30 06:01:10 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=0 bl=148 pwr=0
2025-03-30 06:01:10 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=1 bl=148 pwr=0
2025-03-30 06:01:10 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=2 bl=148 pwr=0
2025-03-30 06:01:10 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=3 bl=148 pwr=0
2025-03-30 06:01:10 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=4 bl=148 pwr=0
2025-03-30 06:01:10 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=5 bl=148 pwr=0
2025-03-30 06:01:10 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=6 bl=148 pwr=0
2025-03-30 06:01:10 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=7 bl=148 pwr=0
2025-03-30 06:01:10 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 06:01:10 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 06:01:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:10 [DEBUG] fake_trx.py:317 (BTS@172.18.26.20:5700) Recv FAKE_CI cmd
2025-03-30 06:01:10 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:01:10 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:01:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:01:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:10 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:01:10 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:01:10 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:01:10 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:01:10 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:01:10 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:01:10 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:01:10 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:01:10 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 06:01:10 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 06:01:10 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 06:01:10 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=131 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:01:10 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=131 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:01:15 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 06:01:15 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 06:01:15 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:01:15 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:01:15 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:01:15 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:01:15 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:01:15 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 06:01:15 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:01:15 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 06:01:15 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 06:01:15 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 06:01:15 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 06:01:15 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 06:01:15 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:01:15 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:01:15 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 06:01:15 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 06:01:15 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 06:01:15 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 06:01:15 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 06:01:15 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 06:01:15 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:01:15 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:01:15 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 06:01:15 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 06:01:15 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 06:01:15 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 06:01:15 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 06:01:15 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 06:01:15 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:01:15 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:01:15 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 06:01:15 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 06:01:15 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 06:01:15 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 06:01:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 06:01:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 06:01:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 06:01:15 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 06:01:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 06:01:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 06:01:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 06:01:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 06:01:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:01:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:01:15 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 06:01:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:01:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:01:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:01:15 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 06:01:15 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 06:01:15 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 06:01:15 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 06:01:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:01:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:01:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:01:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 06:01:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:01:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:01:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:01:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:01:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:01:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:01:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:01:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:01:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:01:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:01:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:01:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:01:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:01:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:01:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:01:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:01:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:01:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:01:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:01:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:01:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:01:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:01:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:01:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:01:15 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-03-30 06:01:16 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-03-30 06:01:16 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-03-30 06:01:16 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-03-30 06:01:16 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-03-30 06:01:16 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-03-30 06:01:16 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-03-30 06:01:16 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-03-30 06:01:16 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-03-30 06:01:16 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-03-30 06:01:16 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=0 bl=148 pwr=0
2025-03-30 06:01:16 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=1 bl=148 pwr=0
2025-03-30 06:01:16 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=2 bl=148 pwr=0
2025-03-30 06:01:16 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=3 bl=148 pwr=0
2025-03-30 06:01:16 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=4 bl=148 pwr=0
2025-03-30 06:01:16 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=5 bl=148 pwr=0
2025-03-30 06:01:16 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=6 bl=148 pwr=0
2025-03-30 06:01:16 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=7 bl=148 pwr=0
2025-03-30 06:01:16 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 06:01:16 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 06:01:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:16 [DEBUG] fake_trx.py:317 (BTS@172.18.26.20:5700) Recv FAKE_CI cmd
2025-03-30 06:01:16 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:01:16 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:01:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:01:16 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:01:16 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:01:16 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:01:16 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:01:16 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:01:16 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:01:16 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:01:16 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:01:16 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 06:01:16 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 06:01:16 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 06:01:16 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=128 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:01:21 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 06:01:21 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 06:01:21 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:01:21 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:01:21 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:01:21 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:01:21 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:01:21 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 06:01:21 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:01:21 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 06:01:21 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 06:01:21 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 06:01:21 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 06:01:21 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 06:01:21 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:01:21 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:01:21 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 06:01:21 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 06:01:21 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 06:01:21 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 06:01:21 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 06:01:21 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 06:01:21 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:01:21 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:01:21 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 06:01:21 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 06:01:21 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 06:01:21 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 06:01:21 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 06:01:21 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 06:01:21 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:01:21 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:01:21 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 06:01:21 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 06:01:21 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 06:01:21 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 06:01:21 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 06:01:21 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 06:01:21 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 06:01:21 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 06:01:21 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 06:01:21 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 06:01:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 06:01:21 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:01:21 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 06:01:21 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 06:01:21 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:01:21 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:01:21 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 06:01:21 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 06:01:21 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 06:01:21 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:01:21 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 06:01:21 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:01:21 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:01:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 06:01:21 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:01:21 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:01:21 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:01:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:01:21 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:01:21 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:01:21 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:01:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:01:21 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:01:21 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:01:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:01:21 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:01:21 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:01:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:01:21 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:01:21 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:01:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:01:21 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:01:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:01:21 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:01:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:01:21 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:01:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:01:21 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:01:21 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:01:21 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:01:21 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-03-30 06:01:21 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-03-30 06:01:22 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-03-30 06:01:22 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-03-30 06:01:22 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-03-30 06:01:22 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-03-30 06:01:22 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-03-30 06:01:22 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-03-30 06:01:22 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-03-30 06:01:22 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-03-30 06:01:22 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=0 bl=148 pwr=0
2025-03-30 06:01:22 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=1 bl=148 pwr=0
2025-03-30 06:01:22 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=2 bl=148 pwr=0
2025-03-30 06:01:22 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=3 bl=148 pwr=0
2025-03-30 06:01:22 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=4 bl=148 pwr=0
2025-03-30 06:01:22 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=5 bl=148 pwr=0
2025-03-30 06:01:22 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=6 bl=148 pwr=0
2025-03-30 06:01:22 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=7 bl=148 pwr=0
2025-03-30 06:01:22 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 06:01:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:22 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 06:01:22 [DEBUG] fake_trx.py:317 (BTS@172.18.26.20:5700) Recv FAKE_CI cmd
2025-03-30 06:01:22 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:01:22 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:01:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:01:22 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:01:22 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:01:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:01:22 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:01:22 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:01:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:01:22 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:01:22 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:01:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:01:22 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:01:22 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:01:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:01:22 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:01:22 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:01:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:01:22 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:01:22 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:01:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:01:22 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:01:22 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:01:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:01:22 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:01:22 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:01:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:01:22 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:01:22 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:01:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:01:22 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:01:22 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:01:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:01:22 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:01:22 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:01:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:01:22 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:01:22 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:01:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:01:22 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:01:22 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:01:22 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:01:22 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:01:22 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:01:22 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:01:22 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:01:22 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:01:22 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 06:01:22 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 06:01:22 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 06:01:27 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 06:01:27 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 06:01:27 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:01:27 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:01:27 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:01:27 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:01:27 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:01:27 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 06:01:27 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:01:27 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 06:01:27 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 06:01:27 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 06:01:27 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 06:01:27 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 06:01:27 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:01:27 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:01:27 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 06:01:27 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 06:01:27 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 06:01:27 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 06:01:27 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 06:01:27 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 06:01:27 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:01:27 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:01:27 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 06:01:27 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 06:01:27 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 06:01:27 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 06:01:27 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 06:01:27 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 06:01:27 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:01:27 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:01:27 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 06:01:27 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 06:01:27 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 06:01:27 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 06:01:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 06:01:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 06:01:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 06:01:27 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 06:01:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 06:01:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 06:01:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 06:01:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:01:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 06:01:27 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 06:01:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:01:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:01:27 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 06:01:27 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 06:01:27 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 06:01:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:01:27 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 06:01:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:01:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:01:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 06:01:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:01:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:01:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:01:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:01:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:01:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:01:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:01:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:01:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:01:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:01:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:01:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:01:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:01:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:01:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:01:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:01:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:01:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:01:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:01:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:01:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:01:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:01:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:01:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:01:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:01:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:01:27 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-03-30 06:01:27 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-03-30 06:01:27 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-03-30 06:01:27 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-03-30 06:01:27 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-03-30 06:01:27 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-03-30 06:01:27 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-03-30 06:01:27 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-03-30 06:01:27 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-03-30 06:01:27 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-03-30 06:01:27 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=0 bl=148 pwr=0
2025-03-30 06:01:27 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=1 bl=148 pwr=0
2025-03-30 06:01:27 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=2 bl=148 pwr=0
2025-03-30 06:01:27 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=3 bl=148 pwr=0
2025-03-30 06:01:27 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=4 bl=148 pwr=0
2025-03-30 06:01:27 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=5 bl=148 pwr=0
2025-03-30 06:01:27 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=6 bl=148 pwr=0
2025-03-30 06:01:27 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=7 bl=148 pwr=0
2025-03-30 06:01:27 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 06:01:27 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 06:01:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:27 [DEBUG] fake_trx.py:317 (BTS@172.18.26.20:5700) Recv FAKE_CI cmd
2025-03-30 06:01:27 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:01:27 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:01:27 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:01:27 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:01:27 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:01:27 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:01:27 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:01:27 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:01:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:27 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:01:27 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:01:27 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:01:27 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:01:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:28 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-03-30 06:01:28 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:01:28 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:01:28 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:01:28 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:01:28 [DEBUG] clck_gen.py:128 IND CLOCK 306
2025-03-30 06:01:29 [DEBUG] clck_gen.py:128 IND CLOCK 408
2025-03-30 06:01:29 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:01:29 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:01:29 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:01:29 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:01:29 [DEBUG] clck_gen.py:128 IND CLOCK 510
2025-03-30 06:01:30 [DEBUG] clck_gen.py:128 IND CLOCK 612
2025-03-30 06:01:30 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:01:30 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:01:30 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:01:30 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:01:30 [DEBUG] clck_gen.py:128 IND CLOCK 714
2025-03-30 06:01:31 [DEBUG] clck_gen.py:128 IND CLOCK 816
2025-03-30 06:01:31 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:01:31 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:01:31 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:01:31 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:01:31 [DEBUG] clck_gen.py:128 IND CLOCK 918
2025-03-30 06:01:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:01:31 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:01:31 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:01:31 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:01:31 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:01:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:01:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:01:31 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:01:31 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:01:31 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:01:31 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:01:31 [DEBUG] clck_gen.py:128 IND CLOCK 1020
2025-03-30 06:01:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:31 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:01:31 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:01:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:01:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:01:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:32 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:01:32 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:01:32 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:01:32 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:01:32 [DEBUG] clck_gen.py:128 IND CLOCK 1122
2025-03-30 06:01:32 [DEBUG] clck_gen.py:128 IND CLOCK 1224
2025-03-30 06:01:33 [DEBUG] clck_gen.py:128 IND CLOCK 1326
2025-03-30 06:01:33 [DEBUG] clck_gen.py:128 IND CLOCK 1428
2025-03-30 06:01:34 [DEBUG] clck_gen.py:128 IND CLOCK 1530
2025-03-30 06:01:34 [DEBUG] clck_gen.py:128 IND CLOCK 1632
2025-03-30 06:01:35 [DEBUG] clck_gen.py:128 IND CLOCK 1734
2025-03-30 06:01:35 [DEBUG] clck_gen.py:128 IND CLOCK 1836
2025-03-30 06:01:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:36 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:01:36 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:01:36 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:01:36 [DEBUG] clck_gen.py:128 IND CLOCK 1938
2025-03-30 06:01:36 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:01:36 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:01:36 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:01:36 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:01:36 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:01:36 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:01:36 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:01:36 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:01:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:36 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:01:36 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:01:36 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:01:36 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:01:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:36 [DEBUG] clck_gen.py:128 IND CLOCK 2040
2025-03-30 06:01:37 [DEBUG] clck_gen.py:128 IND CLOCK 2142
2025-03-30 06:01:37 [DEBUG] clck_gen.py:128 IND CLOCK 2244
2025-03-30 06:01:38 [DEBUG] clck_gen.py:128 IND CLOCK 2346
2025-03-30 06:01:38 [DEBUG] clck_gen.py:128 IND CLOCK 2448
2025-03-30 06:01:39 [DEBUG] clck_gen.py:128 IND CLOCK 2550
2025-03-30 06:01:39 [DEBUG] clck_gen.py:128 IND CLOCK 2652
2025-03-30 06:01:39 [DEBUG] clck_gen.py:128 IND CLOCK 2754
2025-03-30 06:01:40 [DEBUG] clck_gen.py:128 IND CLOCK 2856
2025-03-30 06:01:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:01:40 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:01:40 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:01:40 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:01:40 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:01:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:01:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:01:40 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:01:40 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:01:40 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:01:40 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:01:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:40 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:01:40 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:01:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:01:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:01:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:40 [DEBUG] clck_gen.py:128 IND CLOCK 2958
2025-03-30 06:01:41 [DEBUG] clck_gen.py:128 IND CLOCK 3060
2025-03-30 06:01:41 [DEBUG] clck_gen.py:128 IND CLOCK 3162
2025-03-30 06:01:42 [DEBUG] clck_gen.py:128 IND CLOCK 3264
2025-03-30 06:01:42 [DEBUG] clck_gen.py:128 IND CLOCK 3366
2025-03-30 06:01:43 [DEBUG] clck_gen.py:128 IND CLOCK 3468
2025-03-30 06:01:43 [DEBUG] clck_gen.py:128 IND CLOCK 3570
2025-03-30 06:01:44 [DEBUG] clck_gen.py:128 IND CLOCK 3672
2025-03-30 06:01:44 [DEBUG] clck_gen.py:128 IND CLOCK 3774
2025-03-30 06:01:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:01:44 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:01:44 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:01:44 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:01:44 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:01:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:01:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:01:44 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:01:44 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:01:44 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:01:44 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:01:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:44 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:01:44 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:01:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:01:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:01:45 [DEBUG] clck_gen.py:128 IND CLOCK 3876
2025-03-30 06:01:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:45 [DEBUG] clck_gen.py:128 IND CLOCK 3978
2025-03-30 06:01:46 [DEBUG] clck_gen.py:128 IND CLOCK 4080
2025-03-30 06:01:46 [DEBUG] clck_gen.py:128 IND CLOCK 4182
2025-03-30 06:01:47 [DEBUG] clck_gen.py:128 IND CLOCK 4284
2025-03-30 06:01:47 [DEBUG] clck_gen.py:128 IND CLOCK 4386
2025-03-30 06:01:47 [DEBUG] clck_gen.py:128 IND CLOCK 4488
2025-03-30 06:01:48 [DEBUG] clck_gen.py:128 IND CLOCK 4590
2025-03-30 06:01:48 [DEBUG] clck_gen.py:128 IND CLOCK 4692
2025-03-30 06:01:49 [DEBUG] clck_gen.py:128 IND CLOCK 4794
2025-03-30 06:01:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:01:49 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:01:49 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:01:49 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:01:49 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:01:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:01:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:01:49 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:01:49 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:01:49 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:01:49 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:01:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:49 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:01:49 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:01:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:01:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:01:49 [DEBUG] clck_gen.py:128 IND CLOCK 4896
2025-03-30 06:01:50 [DEBUG] clck_gen.py:128 IND CLOCK 4998
2025-03-30 06:01:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:50 [DEBUG] clck_gen.py:128 IND CLOCK 5100
2025-03-30 06:01:51 [DEBUG] clck_gen.py:128 IND CLOCK 5202
2025-03-30 06:01:51 [DEBUG] clck_gen.py:128 IND CLOCK 5304
2025-03-30 06:01:52 [DEBUG] clck_gen.py:128 IND CLOCK 5406
2025-03-30 06:01:52 [DEBUG] clck_gen.py:128 IND CLOCK 5508
2025-03-30 06:01:53 [DEBUG] clck_gen.py:128 IND CLOCK 5610
2025-03-30 06:01:53 [DEBUG] clck_gen.py:128 IND CLOCK 5712
2025-03-30 06:01:54 [DEBUG] clck_gen.py:128 IND CLOCK 5814
2025-03-30 06:01:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:01:54 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:01:54 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:01:54 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:01:54 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:01:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:01:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:01:54 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:01:54 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:01:54 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:01:54 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:01:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:54 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:01:54 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:01:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:01:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:01:54 [DEBUG] clck_gen.py:128 IND CLOCK 5916
2025-03-30 06:01:55 [DEBUG] clck_gen.py:128 IND CLOCK 6018
2025-03-30 06:01:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:55 [DEBUG] clck_gen.py:128 IND CLOCK 6120
2025-03-30 06:01:55 [DEBUG] clck_gen.py:128 IND CLOCK 6222
2025-03-30 06:01:56 [DEBUG] clck_gen.py:128 IND CLOCK 6324
2025-03-30 06:01:56 [DEBUG] clck_gen.py:128 IND CLOCK 6426
2025-03-30 06:01:57 [DEBUG] clck_gen.py:128 IND CLOCK 6528
2025-03-30 06:01:57 [DEBUG] clck_gen.py:128 IND CLOCK 6630
2025-03-30 06:01:58 [DEBUG] clck_gen.py:128 IND CLOCK 6732
2025-03-30 06:01:58 [DEBUG] clck_gen.py:128 IND CLOCK 6834
2025-03-30 06:01:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:01:59 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:01:59 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:01:59 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:01:59 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:01:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:01:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:01:59 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:01:59 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:01:59 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:01:59 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:01:59 [DEBUG] clck_gen.py:128 IND CLOCK 6936
2025-03-30 06:01:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:01:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:01:59 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:01:59 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:01:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:01:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:01:59 [DEBUG] clck_gen.py:128 IND CLOCK 7038
2025-03-30 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:02:00 [DEBUG] clck_gen.py:128 IND CLOCK 7140
2025-03-30 06:02:00 [DEBUG] clck_gen.py:128 IND CLOCK 7242
2025-03-30 06:02:01 [DEBUG] clck_gen.py:128 IND CLOCK 7344
2025-03-30 06:02:01 [DEBUG] clck_gen.py:128 IND CLOCK 7446
2025-03-30 06:02:02 [DEBUG] clck_gen.py:128 IND CLOCK 7548
2025-03-30 06:02:02 [DEBUG] clck_gen.py:128 IND CLOCK 7650
2025-03-30 06:02:03 [DEBUG] clck_gen.py:128 IND CLOCK 7752
2025-03-30 06:02:03 [DEBUG] clck_gen.py:128 IND CLOCK 7854
2025-03-30 06:02:03 [DEBUG] clck_gen.py:128 IND CLOCK 7956
2025-03-30 06:02:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:02:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:02:04 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:02:04 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:02:04 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:02:04 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:02:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:02:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:02:04 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:02:04 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:02:04 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:02:04 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:02:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:02:04 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:02:04 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:02:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:02:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:02:04 [DEBUG] clck_gen.py:128 IND CLOCK 8058
2025-03-30 06:02:04 [DEBUG] clck_gen.py:128 IND CLOCK 8160
2025-03-30 06:02:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:02:05 [DEBUG] clck_gen.py:128 IND CLOCK 8262
2025-03-30 06:02:05 [DEBUG] clck_gen.py:128 IND CLOCK 8364
2025-03-30 06:02:06 [DEBUG] clck_gen.py:128 IND CLOCK 8466
2025-03-30 06:02:06 [DEBUG] clck_gen.py:128 IND CLOCK 8568
2025-03-30 06:02:07 [DEBUG] clck_gen.py:128 IND CLOCK 8670
2025-03-30 06:02:07 [DEBUG] clck_gen.py:128 IND CLOCK 8772
2025-03-30 06:02:08 [DEBUG] clck_gen.py:128 IND CLOCK 8874
2025-03-30 06:02:08 [DEBUG] clck_gen.py:128 IND CLOCK 8976
2025-03-30 06:02:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:02:08 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:02:08 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:02:08 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:02:08 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:02:08 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:02:08 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:02:08 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:02:08 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:02:08 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:02:08 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:02:08 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:02:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:02:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:02:08 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:02:08 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:02:08 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:02:08 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:02:09 [DEBUG] clck_gen.py:128 IND CLOCK 9078
2025-03-30 06:02:09 [DEBUG] clck_gen.py:128 IND CLOCK 9180
2025-03-30 06:02:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:02:10 [DEBUG] clck_gen.py:128 IND CLOCK 9282
2025-03-30 06:02:10 [DEBUG] clck_gen.py:128 IND CLOCK 9384
2025-03-30 06:02:11 [DEBUG] clck_gen.py:128 IND CLOCK 9486
2025-03-30 06:02:11 [DEBUG] clck_gen.py:128 IND CLOCK 9588
2025-03-30 06:02:11 [DEBUG] clck_gen.py:128 IND CLOCK 9690
2025-03-30 06:02:12 [DEBUG] clck_gen.py:128 IND CLOCK 9792
2025-03-30 06:02:12 [DEBUG] clck_gen.py:128 IND CLOCK 9894
2025-03-30 06:02:13 [DEBUG] clck_gen.py:128 IND CLOCK 9996
2025-03-30 06:02:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:02:13 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:02:13 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:02:13 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:02:13 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:02:13 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:02:13 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:02:13 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:02:13 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:02:13 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:02:13 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:02:13 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:02:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:02:13 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:02:13 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:02:13 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:02:13 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:02:13 [DEBUG] clck_gen.py:128 IND CLOCK 10098
2025-03-30 06:02:14 [DEBUG] clck_gen.py:128 IND CLOCK 10200
2025-03-30 06:02:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:02:14 [DEBUG] clck_gen.py:128 IND CLOCK 10302
2025-03-30 06:02:15 [DEBUG] clck_gen.py:128 IND CLOCK 10404
2025-03-30 06:02:15 [DEBUG] clck_gen.py:128 IND CLOCK 10506
2025-03-30 06:02:16 [DEBUG] clck_gen.py:128 IND CLOCK 10608
2025-03-30 06:02:16 [DEBUG] clck_gen.py:128 IND CLOCK 10710
2025-03-30 06:02:17 [DEBUG] clck_gen.py:128 IND CLOCK 10812
2025-03-30 06:02:17 [DEBUG] clck_gen.py:128 IND CLOCK 10914
2025-03-30 06:02:18 [DEBUG] clck_gen.py:128 IND CLOCK 11016
2025-03-30 06:02:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:02:18 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:02:18 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:02:18 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:02:18 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:02:18 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:02:18 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:02:18 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:02:18 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:02:18 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:02:18 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:02:18 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:02:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:02:18 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:02:18 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:02:18 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:02:18 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:02:18 [DEBUG] clck_gen.py:128 IND CLOCK 11118
2025-03-30 06:02:19 [DEBUG] clck_gen.py:128 IND CLOCK 11220
2025-03-30 06:02:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:02:19 [DEBUG] clck_gen.py:128 IND CLOCK 11322
2025-03-30 06:02:19 [DEBUG] clck_gen.py:128 IND CLOCK 11424
2025-03-30 06:02:20 [DEBUG] clck_gen.py:128 IND CLOCK 11526
2025-03-30 06:02:20 [DEBUG] clck_gen.py:128 IND CLOCK 11628
2025-03-30 06:02:21 [DEBUG] clck_gen.py:128 IND CLOCK 11730
2025-03-30 06:02:21 [DEBUG] clck_gen.py:128 IND CLOCK 11832
2025-03-30 06:02:22 [DEBUG] clck_gen.py:128 IND CLOCK 11934
2025-03-30 06:02:22 [DEBUG] clck_gen.py:128 IND CLOCK 12036
2025-03-30 06:02:23 [DEBUG] clck_gen.py:128 IND CLOCK 12138
2025-03-30 06:02:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:02:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:02:23 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:02:23 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:02:23 [WARNING] transceiver.py:287 (MS@172.18.26.22:6700) RX TRXD message (fn=12154 tn=4 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:02:23 [WARNING] transceiver.py:287 (MS@172.18.26.22:6700) RX TRXD message (fn=12154 tn=5 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:02:23 [WARNING] transceiver.py:287 (MS@172.18.26.22:6700) RX TRXD message (fn=12154 tn=6 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:02:23 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:02:23 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:02:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:02:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:02:23 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:02:23 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:02:23 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:02:23 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:02:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:02:23 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:02:23 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:02:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:02:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:02:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:02:23 [DEBUG] clck_gen.py:128 IND CLOCK 12240
2025-03-30 06:02:24 [DEBUG] clck_gen.py:128 IND CLOCK 12342
2025-03-30 06:02:24 [DEBUG] clck_gen.py:128 IND CLOCK 12444
2025-03-30 06:02:25 [DEBUG] clck_gen.py:128 IND CLOCK 12546
2025-03-30 06:02:25 [DEBUG] clck_gen.py:128 IND CLOCK 12648
2025-03-30 06:02:26 [DEBUG] clck_gen.py:128 IND CLOCK 12750
2025-03-30 06:02:26 [DEBUG] clck_gen.py:128 IND CLOCK 12852
2025-03-30 06:02:27 [DEBUG] clck_gen.py:128 IND CLOCK 12954
2025-03-30 06:02:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:02:27 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:02:27 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:02:27 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:02:27 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:02:27 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:02:27 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:02:27 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:02:27 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:02:27 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:02:27 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:02:27 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:02:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:02:27 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:02:27 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:02:27 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:02:27 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:02:27 [DEBUG] clck_gen.py:128 IND CLOCK 13056
2025-03-30 06:02:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:02:27 [DEBUG] clck_gen.py:128 IND CLOCK 13158
2025-03-30 06:02:28 [DEBUG] clck_gen.py:128 IND CLOCK 13260
2025-03-30 06:02:28 [DEBUG] clck_gen.py:128 IND CLOCK 13362
2025-03-30 06:02:29 [DEBUG] clck_gen.py:128 IND CLOCK 13464
2025-03-30 06:02:29 [DEBUG] clck_gen.py:128 IND CLOCK 13566
2025-03-30 06:02:30 [DEBUG] clck_gen.py:128 IND CLOCK 13668
2025-03-30 06:02:30 [DEBUG] clck_gen.py:128 IND CLOCK 13770
2025-03-30 06:02:31 [DEBUG] clck_gen.py:128 IND CLOCK 13872
2025-03-30 06:02:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:02:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:02:31 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:02:31 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:02:31 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:02:31 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:02:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:02:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:02:31 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:02:31 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:02:31 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:02:31 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:02:31 [DEBUG] clck_gen.py:128 IND CLOCK 13974
2025-03-30 06:02:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:02:31 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:02:31 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:02:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:02:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:02:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:02:32 [DEBUG] clck_gen.py:128 IND CLOCK 14076
2025-03-30 06:02:32 [DEBUG] clck_gen.py:128 IND CLOCK 14178
2025-03-30 06:02:33 [DEBUG] clck_gen.py:128 IND CLOCK 14280
2025-03-30 06:02:33 [DEBUG] clck_gen.py:128 IND CLOCK 14382
2025-03-30 06:02:34 [DEBUG] clck_gen.py:128 IND CLOCK 14484
2025-03-30 06:02:34 [DEBUG] clck_gen.py:128 IND CLOCK 14586
2025-03-30 06:02:35 [DEBUG] clck_gen.py:128 IND CLOCK 14688
2025-03-30 06:02:35 [DEBUG] clck_gen.py:128 IND CLOCK 14790
2025-03-30 06:02:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:02:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:02:35 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:02:35 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:02:35 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:02:35 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:02:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:02:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:02:35 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:02:35 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:02:35 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:02:35 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:02:35 [DEBUG] clck_gen.py:128 IND CLOCK 14892
2025-03-30 06:02:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:02:35 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:02:35 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:02:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:02:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:02:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:02:36 [DEBUG] clck_gen.py:128 IND CLOCK 14994
2025-03-30 06:02:36 [DEBUG] clck_gen.py:128 IND CLOCK 15096
2025-03-30 06:02:37 [DEBUG] clck_gen.py:128 IND CLOCK 15198
2025-03-30 06:02:37 [DEBUG] clck_gen.py:128 IND CLOCK 15300
2025-03-30 06:02:38 [DEBUG] clck_gen.py:128 IND CLOCK 15402
2025-03-30 06:02:38 [DEBUG] clck_gen.py:128 IND CLOCK 15504
2025-03-30 06:02:39 [DEBUG] clck_gen.py:128 IND CLOCK 15606
2025-03-30 06:02:39 [DEBUG] clck_gen.py:128 IND CLOCK 15708
2025-03-30 06:02:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:02:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:02:40 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:02:40 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:02:40 [DEBUG] clck_gen.py:128 IND CLOCK 15810
2025-03-30 06:02:40 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:02:40 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:02:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:02:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:02:40 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:02:40 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:02:40 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:02:40 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:02:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:02:40 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:02:40 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:02:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:02:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:02:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:02:40 [DEBUG] clck_gen.py:128 IND CLOCK 15912
2025-03-30 06:02:41 [DEBUG] clck_gen.py:128 IND CLOCK 16014
2025-03-30 06:02:41 [DEBUG] clck_gen.py:128 IND CLOCK 16116
2025-03-30 06:02:42 [DEBUG] clck_gen.py:128 IND CLOCK 16218
2025-03-30 06:02:42 [DEBUG] clck_gen.py:128 IND CLOCK 16320
2025-03-30 06:02:43 [DEBUG] clck_gen.py:128 IND CLOCK 16422
2025-03-30 06:02:43 [DEBUG] clck_gen.py:128 IND CLOCK 16524
2025-03-30 06:02:43 [DEBUG] clck_gen.py:128 IND CLOCK 16626
2025-03-30 06:02:44 [DEBUG] clck_gen.py:128 IND CLOCK 16728
2025-03-30 06:02:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:02:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:02:44 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:02:44 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:02:44 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:02:44 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:02:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:02:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:02:44 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:02:44 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:02:44 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:02:44 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:02:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:02:44 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:02:44 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:02:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:02:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:02:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:02:44 [DEBUG] clck_gen.py:128 IND CLOCK 16830
2025-03-30 06:02:45 [DEBUG] clck_gen.py:128 IND CLOCK 16932
2025-03-30 06:02:45 [DEBUG] clck_gen.py:128 IND CLOCK 17034
2025-03-30 06:02:46 [DEBUG] clck_gen.py:128 IND CLOCK 17136
2025-03-30 06:02:46 [DEBUG] clck_gen.py:128 IND CLOCK 17238
2025-03-30 06:02:47 [DEBUG] clck_gen.py:128 IND CLOCK 17340
2025-03-30 06:02:47 [DEBUG] clck_gen.py:128 IND CLOCK 17442
2025-03-30 06:02:48 [DEBUG] clck_gen.py:128 IND CLOCK 17544
2025-03-30 06:02:48 [DEBUG] clck_gen.py:128 IND CLOCK 17646
2025-03-30 06:02:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:02:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:02:48 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:02:48 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:02:48 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:02:48 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:02:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:02:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:02:48 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:02:48 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:02:48 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:02:48 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:02:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:02:48 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:02:48 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:02:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:02:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:02:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:02:49 [DEBUG] clck_gen.py:128 IND CLOCK 17748
2025-03-30 06:02:49 [DEBUG] clck_gen.py:128 IND CLOCK 17850
2025-03-30 06:02:50 [DEBUG] clck_gen.py:128 IND CLOCK 17952
2025-03-30 06:02:50 [DEBUG] clck_gen.py:128 IND CLOCK 18054
2025-03-30 06:02:51 [DEBUG] clck_gen.py:128 IND CLOCK 18156
2025-03-30 06:02:51 [DEBUG] clck_gen.py:128 IND CLOCK 18258
2025-03-30 06:02:51 [DEBUG] clck_gen.py:128 IND CLOCK 18360
2025-03-30 06:02:52 [DEBUG] clck_gen.py:128 IND CLOCK 18462
2025-03-30 06:02:52 [DEBUG] clck_gen.py:128 IND CLOCK 18564
2025-03-30 06:02:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:02:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:02:53 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:02:53 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:02:53 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:02:53 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:02:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:02:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:02:53 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:02:53 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:02:53 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:02:53 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:02:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:02:53 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:02:53 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:02:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:02:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:02:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:02:53 [DEBUG] clck_gen.py:128 IND CLOCK 18666
2025-03-30 06:02:53 [DEBUG] clck_gen.py:128 IND CLOCK 18768
2025-03-30 06:02:54 [DEBUG] clck_gen.py:128 IND CLOCK 18870
2025-03-30 06:02:54 [DEBUG] clck_gen.py:128 IND CLOCK 18972
2025-03-30 06:02:55 [DEBUG] clck_gen.py:128 IND CLOCK 19074
2025-03-30 06:02:55 [DEBUG] clck_gen.py:128 IND CLOCK 19176
2025-03-30 06:02:56 [DEBUG] clck_gen.py:128 IND CLOCK 19278
2025-03-30 06:02:56 [DEBUG] clck_gen.py:128 IND CLOCK 19380
2025-03-30 06:02:57 [DEBUG] clck_gen.py:128 IND CLOCK 19482
2025-03-30 06:02:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:02:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:02:57 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:02:57 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:02:57 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:02:57 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:02:57 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:02:57 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:02:57 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:02:57 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:02:57 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:02:57 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:02:57 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 06:02:57 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 06:02:57 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 06:02:57 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=19534 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:02:57 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=19534 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:02:57 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=19534 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:02:57 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=19534 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:02:57 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=19534 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:02:57 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=19534 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:02:57 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=19535 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:02:57 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=19535 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:02:57 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=19535 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:02:57 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=19535 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:02:57 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=19535 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:02:57 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=19535 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:02:57 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=19535 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:02:57 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=19535 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:02:57 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=19536 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:02:57 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=19536 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:02:57 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=19536 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:02:57 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=19536 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:02:57 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=19536 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:02:57 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=19536 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:02:57 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=19536 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:02:57 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=19536 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:03:02 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 06:03:02 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 06:03:02 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:03:02 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:03:02 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:03:02 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:03:02 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:03:02 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 06:03:02 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:03:02 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 06:03:02 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 06:03:02 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 06:03:02 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 06:03:02 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 06:03:02 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:03:02 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:03:02 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 06:03:02 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 06:03:02 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 06:03:02 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 06:03:02 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 06:03:02 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 06:03:02 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:03:02 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:03:02 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 06:03:02 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 06:03:02 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 06:03:02 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 06:03:02 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 06:03:02 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 06:03:02 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:03:02 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:03:02 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 06:03:02 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 06:03:02 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 06:03:02 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 06:03:02 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 06:03:02 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 06:03:02 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 06:03:02 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 06:03:02 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 06:03:02 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 06:03:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 06:03:02 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:03:02 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 06:03:02 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 06:03:02 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:03:02 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:03:02 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 06:03:02 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 06:03:02 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 06:03:02 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 06:03:02 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:03:02 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:03:02 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:03:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 06:03:02 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:03:02 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:03:02 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:03:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:03:02 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:03:02 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:03:02 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:03:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:03:02 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:03:02 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:03:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:03:02 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:03:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:03:02 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:03:02 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:03:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:03:02 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:03:02 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:03:02 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:03:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:03:02 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:03:02 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:03:02 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:03:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:03:02 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:03:02 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:03:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:03:02 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:03:02 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:03:02 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:03:02 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 06:03:02 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 06:03:02 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 06:03:07 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 06:03:07 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 06:03:07 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:03:07 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:03:07 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:03:07 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:03:07 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:03:07 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 06:03:07 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:03:07 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 06:03:07 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 06:03:07 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 06:03:07 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 06:03:07 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 06:03:07 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:03:07 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:03:07 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 06:03:07 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 06:03:07 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 06:03:07 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 06:03:07 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 06:03:07 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 06:03:07 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:03:07 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:03:07 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 06:03:07 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 06:03:07 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 06:03:07 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 06:03:07 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 06:03:07 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 06:03:07 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:03:07 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:03:07 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 06:03:07 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 06:03:07 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 06:03:07 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 06:03:07 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 06:03:07 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 06:03:07 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 06:03:07 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 06:03:07 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 06:03:07 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 06:03:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 06:03:07 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:03:07 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 06:03:07 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 06:03:07 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:03:07 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:03:07 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 06:03:07 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 06:03:07 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 06:03:07 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 06:03:07 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:03:07 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:03:07 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:03:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 06:03:07 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:03:07 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:03:07 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:03:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:03:07 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:03:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:03:07 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:03:07 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:03:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:03:07 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:03:07 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:03:07 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:03:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:03:07 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:03:07 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:03:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:03:07 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:03:07 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:03:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:03:07 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:03:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:03:07 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:03:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:03:07 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:03:07 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:03:07 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:03:07 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-03-30 06:03:07 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-03-30 06:03:07 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-03-30 06:03:07 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-03-30 06:03:07 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-03-30 06:03:07 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-03-30 06:03:07 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-03-30 06:03:07 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-03-30 06:03:07 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-03-30 06:03:07 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-03-30 06:03:07 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=0 bl=148 pwr=0
2025-03-30 06:03:07 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=1 bl=148 pwr=0
2025-03-30 06:03:07 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=2 bl=148 pwr=0
2025-03-30 06:03:07 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=3 bl=148 pwr=0
2025-03-30 06:03:07 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=4 bl=148 pwr=0
2025-03-30 06:03:07 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=5 bl=148 pwr=0
2025-03-30 06:03:07 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=6 bl=148 pwr=0
2025-03-30 06:03:07 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=7 bl=148 pwr=0
2025-03-30 06:03:08 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 06:03:08 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 06:03:08 [DEBUG] fake_trx.py:317 (BTS@172.18.26.20:5700) Recv FAKE_CI cmd
2025-03-30 06:03:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:03:08 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:03:08 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:03:08 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:03:08 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:03:08 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:03:08 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:03:08 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:03:08 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:03:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:03:08 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:03:08 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:03:08 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:03:08 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:03:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:03:08 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:03:08 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:03:08 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:03:08 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:03:08 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:03:08 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:03:08 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:03:08 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:03:08 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:03:08 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:03:08 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:03:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:03:08 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:03:08 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:03:08 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:03:08 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:03:08 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-03-30 06:03:08 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:03:08 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:03:08 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:03:08 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:03:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:03:08 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:03:08 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:03:08 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:03:08 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:03:08 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:03:08 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:03:08 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:03:08 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:03:08 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:03:08 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:03:08 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:03:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:03:08 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:03:08 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:03:08 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:03:08 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:03:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:03:08 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:03:08 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:03:08 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:03:08 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:03:08 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:03:08 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:03:08 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:03:08 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:03:08 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:03:08 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:03:08 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:03:08 [DEBUG] clck_gen.py:128 IND CLOCK 306
2025-03-30 06:03:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:03:08 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:03:08 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:03:08 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:03:08 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:03:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:03:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:03:09 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:03:09 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:03:09 [DEBUG] clck_gen.py:128 IND CLOCK 408
2025-03-30 06:03:09 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:03:09 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:03:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:03:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:03:09 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:03:09 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:03:09 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:03:09 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:03:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:03:09 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:03:09 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:03:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:03:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:03:09 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:03:09 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:03:09 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:03:09 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:03:09 [DEBUG] clck_gen.py:128 IND CLOCK 510
2025-03-30 06:03:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:03:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:03:09 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:03:09 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:03:09 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:03:09 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:03:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:03:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:03:09 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:03:09 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:03:09 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:03:09 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:03:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:03:09 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:03:09 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:03:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:03:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:03:10 [DEBUG] clck_gen.py:128 IND CLOCK 612
2025-03-30 06:03:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:03:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:03:10 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:03:10 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:03:10 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:03:10 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:03:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:03:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:03:10 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:03:10 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:03:10 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:03:10 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:03:10 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:03:10 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:03:10 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:03:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:03:10 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:03:10 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:03:10 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:03:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:03:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:03:10 [DEBUG] clck_gen.py:128 IND CLOCK 714
2025-03-30 06:03:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:03:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:03:10 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:03:10 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:03:10 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:03:10 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:03:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:03:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:03:10 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:03:10 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:03:10 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:03:10 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:03:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:03:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:03:11 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:03:11 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:03:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:03:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:03:11 [DEBUG] clck_gen.py:128 IND CLOCK 816
2025-03-30 06:03:11 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:03:11 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:03:11 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:03:11 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:03:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:03:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:03:11 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:03:11 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:03:11 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:03:11 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:03:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:03:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:03:11 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:03:11 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:03:11 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:03:11 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:03:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:03:11 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:03:11 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:03:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:03:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:03:11 [DEBUG] clck_gen.py:128 IND CLOCK 918
2025-03-30 06:03:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:03:12 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:03:12 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:03:12 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:03:12 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:03:12 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:03:12 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:03:12 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:03:12 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:03:12 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:03:12 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:03:12 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:03:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:03:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:03:12 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:03:12 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:03:12 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:03:12 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:03:12 [DEBUG] clck_gen.py:128 IND CLOCK 1020
2025-03-30 06:03:12 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:03:12 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:03:12 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:03:12 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:03:12 [DEBUG] clck_gen.py:128 IND CLOCK 1122
2025-03-30 06:03:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:03:12 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:03:12 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:03:12 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:03:12 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:03:12 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:03:12 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:03:12 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:03:12 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:03:12 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:03:12 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:03:12 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:03:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:03:13 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:03:13 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:03:13 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:03:13 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:03:13 [DEBUG] clck_gen.py:128 IND CLOCK 1224
2025-03-30 06:03:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:03:13 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:03:13 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:03:13 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:03:13 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:03:13 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:03:13 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:03:13 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:03:13 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:03:13 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:03:13 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:03:13 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:03:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:03:13 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:03:13 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:03:13 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:03:13 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:03:13 [DEBUG] clck_gen.py:128 IND CLOCK 1326
2025-03-30 06:03:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:03:13 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:03:13 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:03:13 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:03:13 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:03:13 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:03:13 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:03:13 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:03:13 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:03:13 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:03:13 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:03:13 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:03:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:03:14 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:03:14 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:03:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:03:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:03:14 [DEBUG] clck_gen.py:128 IND CLOCK 1428
2025-03-30 06:03:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:03:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:03:14 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:03:14 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:03:14 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:03:14 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:03:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:03:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:03:14 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:03:14 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:03:14 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:03:14 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:03:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:03:14 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:03:14 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:03:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:03:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:03:14 [DEBUG] clck_gen.py:128 IND CLOCK 1530
2025-03-30 06:03:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:03:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:03:14 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:03:14 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:03:14 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:03:14 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:03:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:03:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:03:14 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:03:14 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:03:14 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:03:14 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:03:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:03:14 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:03:14 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:03:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:03:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:03:15 [DEBUG] clck_gen.py:128 IND CLOCK 1632
2025-03-30 06:03:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:03:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:03:15 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:03:15 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:03:15 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:03:15 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:03:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:03:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:03:15 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:03:15 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:03:15 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:03:15 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:03:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:03:15 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:03:15 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:03:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:03:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:03:15 [DEBUG] clck_gen.py:128 IND CLOCK 1734
2025-03-30 06:03:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:03:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:03:15 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:03:15 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:03:15 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:03:15 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:03:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:03:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:03:15 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:03:15 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:03:15 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:03:15 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:03:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:03:15 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:03:15 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:03:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:03:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:03:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:03:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:03:15 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:03:15 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:03:15 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:03:15 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:03:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:03:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:03:15 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:03:15 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:03:15 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:03:15 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:03:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:03:15 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:03:15 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:03:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:03:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:03:15 [DEBUG] clck_gen.py:128 IND CLOCK 1836
2025-03-30 06:03:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:03:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:03:16 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:03:16 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:03:16 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:03:16 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:03:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:03:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:03:16 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:03:16 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:03:16 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:03:16 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:03:16 [DEBUG] clck_gen.py:128 IND CLOCK 1938
2025-03-30 06:03:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:03:16 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:03:16 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:03:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:03:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:03:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:03:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:03:16 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:03:16 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:03:16 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:03:16 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:03:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:03:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:03:16 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:03:16 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:03:16 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:03:16 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:03:16 [DEBUG] clck_gen.py:128 IND CLOCK 2040
2025-03-30 06:03:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:03:16 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:03:16 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:03:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:03:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:03:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:03:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:03:17 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:03:17 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:03:17 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:03:17 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:03:17 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:03:17 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:03:17 [DEBUG] clck_gen.py:128 IND CLOCK 2142
2025-03-30 06:03:17 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:03:17 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:03:17 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:03:17 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:03:17 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 06:03:17 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 06:03:17 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 06:03:22 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 06:03:22 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 06:03:22 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:03:22 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:03:22 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:03:22 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:03:22 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:03:22 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 06:03:22 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:03:22 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 06:03:22 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 06:03:22 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 06:03:22 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 06:03:22 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 06:03:22 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:03:22 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:03:22 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 06:03:22 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 06:03:22 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 06:03:22 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 06:03:22 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 06:03:22 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 06:03:22 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:03:22 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:03:22 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 06:03:22 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 06:03:22 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 06:03:22 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 06:03:22 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 06:03:22 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 06:03:22 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:03:22 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:03:22 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 06:03:22 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 06:03:22 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 06:03:22 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 06:03:22 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 06:03:22 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 06:03:22 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 06:03:22 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 06:03:22 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 06:03:22 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 06:03:22 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 06:03:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 06:03:22 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:03:22 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:03:22 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 06:03:22 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:03:22 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:03:22 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:03:22 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 06:03:22 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 06:03:22 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 06:03:22 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 06:03:22 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:03:22 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:03:22 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:03:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 06:03:22 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:03:22 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:03:22 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:03:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:03:22 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:03:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:03:22 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:03:22 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:03:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:03:22 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:03:22 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:03:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:03:22 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:03:22 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:03:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:03:22 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:03:22 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:03:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:03:22 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:03:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:03:22 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:03:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:03:22 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:03:22 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:03:22 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-03-30 06:03:22 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-03-30 06:03:22 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-03-30 06:03:22 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-03-30 06:03:22 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-03-30 06:03:22 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-03-30 06:03:22 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-03-30 06:03:22 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-03-30 06:03:22 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-03-30 06:03:22 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-03-30 06:03:22 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=0 bl=148 pwr=0
2025-03-30 06:03:22 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=1 bl=148 pwr=0
2025-03-30 06:03:22 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=2 bl=148 pwr=0
2025-03-30 06:03:22 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=3 bl=148 pwr=0
2025-03-30 06:03:22 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=4 bl=148 pwr=0
2025-03-30 06:03:22 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=5 bl=148 pwr=0
2025-03-30 06:03:22 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=6 bl=148 pwr=0
2025-03-30 06:03:22 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=7 bl=148 pwr=0
2025-03-30 06:03:22 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 06:03:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:03:22 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 06:03:22 [DEBUG] fake_trx.py:317 (BTS@172.18.26.20:5700) Recv FAKE_CI cmd
2025-03-30 06:03:22 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:03:22 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:03:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:03:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:03:22 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:03:22 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:03:22 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:03:22 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:03:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:03:22 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:03:22 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:03:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:03:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:03:23 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-03-30 06:03:23 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:03:23 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:03:23 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:03:23 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:03:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:03:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:03:23 [DEBUG] clck_gen.py:128 IND CLOCK 306
2025-03-30 06:03:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:03:24 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:03:24 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:03:24 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:03:24 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:03:24 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:03:24 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:03:24 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:03:24 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:03:24 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:03:24 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:03:24 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:03:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:03:24 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:03:24 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:03:24 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:03:24 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:03:24 [DEBUG] clck_gen.py:128 IND CLOCK 408
2025-03-30 06:03:24 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:03:24 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:03:24 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:03:24 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:03:24 [DEBUG] clck_gen.py:128 IND CLOCK 510
2025-03-30 06:03:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:03:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:03:25 [DEBUG] clck_gen.py:128 IND CLOCK 612
2025-03-30 06:03:25 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:03:25 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:03:25 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:03:25 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:03:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:03:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:03:25 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:03:25 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:03:25 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:03:25 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:03:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:03:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:03:25 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:03:25 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:03:25 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:03:25 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:03:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:03:25 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:03:25 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:03:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:03:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:03:25 [DEBUG] clck_gen.py:128 IND CLOCK 714
2025-03-30 06:03:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:03:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:03:26 [DEBUG] clck_gen.py:128 IND CLOCK 816
2025-03-30 06:03:26 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:03:26 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:03:26 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:03:26 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:03:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:03:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:03:26 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:03:26 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:03:26 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:03:26 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:03:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:03:26 [DEBUG] clck_gen.py:128 IND CLOCK 918
2025-03-30 06:03:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:03:26 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:03:26 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:03:26 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:03:26 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:03:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:03:26 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:03:26 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:03:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:03:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:03:27 [DEBUG] clck_gen.py:128 IND CLOCK 1020
2025-03-30 06:03:27 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:03:27 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:03:27 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:03:27 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:03:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:03:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:03:27 [DEBUG] clck_gen.py:128 IND CLOCK 1122
2025-03-30 06:03:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:03:28 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:03:28 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:03:28 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:03:28 [DEBUG] clck_gen.py:128 IND CLOCK 1224
2025-03-30 06:03:28 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:03:28 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:03:28 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:03:28 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:03:28 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:03:28 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:03:28 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:03:28 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:03:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:03:28 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:03:28 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:03:28 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:03:28 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:03:28 [DEBUG] clck_gen.py:128 IND CLOCK 1326
2025-03-30 06:03:28 [DEBUG] clck_gen.py:128 IND CLOCK 1428
2025-03-30 06:03:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:03:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:03:29 [DEBUG] clck_gen.py:128 IND CLOCK 1530
2025-03-30 06:03:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:03:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:03:29 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:03:29 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:03:29 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:03:29 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:03:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:03:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:03:29 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:03:29 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:03:29 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:03:29 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:03:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:03:29 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:03:29 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:03:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:03:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:03:29 [DEBUG] clck_gen.py:128 IND CLOCK 1632
2025-03-30 06:03:30 [DEBUG] clck_gen.py:128 IND CLOCK 1734
2025-03-30 06:03:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:03:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:03:30 [DEBUG] clck_gen.py:128 IND CLOCK 1836
2025-03-30 06:03:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:03:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:03:31 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:03:31 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:03:31 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:03:31 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:03:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:03:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:03:31 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:03:31 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:03:31 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:03:31 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:03:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:03:31 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:03:31 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:03:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:03:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:03:31 [DEBUG] clck_gen.py:128 IND CLOCK 1938
2025-03-30 06:03:31 [DEBUG] clck_gen.py:128 IND CLOCK 2040
2025-03-30 06:03:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:03:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:03:32 [DEBUG] clck_gen.py:128 IND CLOCK 2142
2025-03-30 06:03:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:03:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:03:32 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:03:32 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:03:32 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:03:32 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:03:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:03:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:03:32 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:03:32 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:03:32 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:03:32 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:03:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:03:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:03:32 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:03:32 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:03:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:03:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:03:32 [DEBUG] clck_gen.py:128 IND CLOCK 2244
2025-03-30 06:03:33 [DEBUG] clck_gen.py:128 IND CLOCK 2346
2025-03-30 06:03:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:03:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:03:33 [DEBUG] clck_gen.py:128 IND CLOCK 2448
2025-03-30 06:03:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:03:34 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:03:34 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:03:34 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:03:34 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:03:34 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:03:34 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:03:34 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:03:34 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:03:34 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:03:34 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:03:34 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:03:34 [DEBUG] clck_gen.py:128 IND CLOCK 2550
2025-03-30 06:03:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:03:34 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:03:34 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:03:34 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:03:34 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:03:34 [DEBUG] clck_gen.py:128 IND CLOCK 2652
2025-03-30 06:03:35 [DEBUG] clck_gen.py:128 IND CLOCK 2754
2025-03-30 06:03:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:03:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:03:35 [DEBUG] clck_gen.py:128 IND CLOCK 2856
2025-03-30 06:03:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:03:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:03:35 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:03:35 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:03:35 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:03:35 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:03:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:03:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:03:35 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:03:35 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:03:35 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:03:35 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:03:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:03:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:03:35 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:03:35 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:03:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:03:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:03:36 [DEBUG] clck_gen.py:128 IND CLOCK 2958
2025-03-30 06:03:36 [DEBUG] clck_gen.py:128 IND CLOCK 3060
2025-03-30 06:03:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:03:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:03:36 [DEBUG] clck_gen.py:128 IND CLOCK 3162
2025-03-30 06:03:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:03:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:03:37 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:03:37 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:03:37 [DEBUG] clck_gen.py:128 IND CLOCK 3264
2025-03-30 06:03:37 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:03:37 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:03:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:03:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:03:37 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:03:37 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:03:37 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:03:37 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:03:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:03:37 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:03:37 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:03:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:03:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:03:37 [DEBUG] clck_gen.py:128 IND CLOCK 3366
2025-03-30 06:03:38 [DEBUG] clck_gen.py:128 IND CLOCK 3468
2025-03-30 06:03:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:03:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:03:38 [DEBUG] clck_gen.py:128 IND CLOCK 3570
2025-03-30 06:03:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:03:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:03:38 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:03:38 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:03:38 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:03:38 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:03:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:03:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:03:38 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:03:38 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:03:38 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:03:38 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:03:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:03:38 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:03:38 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:03:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:03:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:03:39 [DEBUG] clck_gen.py:128 IND CLOCK 3672
2025-03-30 06:03:39 [DEBUG] clck_gen.py:128 IND CLOCK 3774
2025-03-30 06:03:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:03:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:03:40 [DEBUG] clck_gen.py:128 IND CLOCK 3876
2025-03-30 06:03:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:03:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:03:40 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:03:40 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:03:40 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:03:40 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:03:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:03:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:03:40 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:03:40 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:03:40 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:03:40 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:03:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:03:40 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:03:40 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:03:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:03:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:03:40 [DEBUG] clck_gen.py:128 IND CLOCK 3978
2025-03-30 06:03:41 [DEBUG] clck_gen.py:128 IND CLOCK 4080
2025-03-30 06:03:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:03:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:03:41 [DEBUG] clck_gen.py:128 IND CLOCK 4182
2025-03-30 06:03:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:03:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:03:41 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:03:41 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:03:41 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:03:41 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:03:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:03:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:03:41 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:03:41 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:03:41 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:03:41 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:03:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:03:41 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:03:41 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:03:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:03:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:03:42 [DEBUG] clck_gen.py:128 IND CLOCK 4284
2025-03-30 06:03:42 [DEBUG] clck_gen.py:128 IND CLOCK 4386
2025-03-30 06:03:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:03:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:03:43 [DEBUG] clck_gen.py:128 IND CLOCK 4488
2025-03-30 06:03:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:03:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:03:43 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:03:43 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:03:43 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:03:43 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:03:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:03:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:03:43 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:03:43 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:03:43 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:03:43 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:03:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:03:43 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:03:43 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:03:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:03:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:03:43 [DEBUG] clck_gen.py:128 IND CLOCK 4590
2025-03-30 06:03:44 [DEBUG] clck_gen.py:128 IND CLOCK 4692
2025-03-30 06:03:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:03:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:03:44 [DEBUG] clck_gen.py:128 IND CLOCK 4794
2025-03-30 06:03:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:03:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:03:44 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:03:44 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:03:44 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:03:44 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:03:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:03:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:03:44 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:03:44 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:03:44 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:03:44 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:03:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:03:44 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:03:44 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:03:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:03:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:03:44 [DEBUG] clck_gen.py:128 IND CLOCK 4896
2025-03-30 06:03:45 [DEBUG] clck_gen.py:128 IND CLOCK 4998
2025-03-30 06:03:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:03:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:03:45 [DEBUG] clck_gen.py:128 IND CLOCK 5100
2025-03-30 06:03:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:03:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:03:46 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:03:46 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:03:46 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:03:46 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:03:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:03:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:03:46 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:03:46 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:03:46 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:03:46 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:03:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:03:46 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:03:46 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:03:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:03:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:03:46 [DEBUG] clck_gen.py:128 IND CLOCK 5202
2025-03-30 06:03:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:03:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:03:46 [DEBUG] clck_gen.py:128 IND CLOCK 5304
2025-03-30 06:03:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:03:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:03:47 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:03:47 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:03:47 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:03:47 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:03:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:03:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:03:47 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:03:47 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:03:47 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:03:47 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:03:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:03:47 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:03:47 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:03:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:03:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:03:47 [DEBUG] clck_gen.py:128 IND CLOCK 5406
2025-03-30 06:03:47 [DEBUG] clck_gen.py:128 IND CLOCK 5508
2025-03-30 06:03:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:03:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:03:48 [DEBUG] clck_gen.py:128 IND CLOCK 5610
2025-03-30 06:03:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:03:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:03:48 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:03:48 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:03:48 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:03:48 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:03:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:03:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:03:48 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:03:48 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:03:48 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:03:48 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:03:48 [DEBUG] clck_gen.py:128 IND CLOCK 5712
2025-03-30 06:03:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:03:48 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:03:48 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:03:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:03:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:03:49 [DEBUG] clck_gen.py:128 IND CLOCK 5814
2025-03-30 06:03:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:03:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:03:49 [DEBUG] clck_gen.py:128 IND CLOCK 5916
2025-03-30 06:03:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:03:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:03:50 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:03:50 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:03:50 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:03:50 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:03:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:03:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:03:50 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:03:50 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:03:50 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:03:50 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:03:50 [DEBUG] clck_gen.py:128 IND CLOCK 6018
2025-03-30 06:03:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:03:50 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:03:50 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:03:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:03:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:03:50 [DEBUG] clck_gen.py:128 IND CLOCK 6120
2025-03-30 06:03:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:03:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:03:51 [DEBUG] clck_gen.py:128 IND CLOCK 6222
2025-03-30 06:03:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:03:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:03:51 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:03:51 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:03:51 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:03:51 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:03:51 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:03:51 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:03:51 [DEBUG] clck_gen.py:128 IND CLOCK 6324
2025-03-30 06:03:51 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:03:51 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:03:51 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:03:51 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:03:51 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 06:03:51 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 06:03:51 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 06:03:56 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 06:03:56 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 06:03:56 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:03:56 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:03:56 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:03:56 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:03:56 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:03:56 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 06:03:56 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:03:56 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 06:03:56 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 06:03:56 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 06:03:56 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 06:03:56 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 06:03:56 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:03:56 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:03:56 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 06:03:56 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 06:03:56 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 06:03:56 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 06:03:56 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 06:03:56 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 06:03:56 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:03:56 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:03:56 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 06:03:56 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 06:03:56 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 06:03:56 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 06:03:56 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 06:03:56 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 06:03:56 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:03:56 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:03:56 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 06:03:56 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 06:03:56 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 06:03:56 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 06:03:56 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 06:03:56 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 06:03:56 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 06:03:56 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 06:03:56 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 06:03:56 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 06:03:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 06:03:56 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:03:56 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 06:03:56 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 06:03:56 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:03:56 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:03:56 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:03:56 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 06:03:56 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 06:03:56 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 06:03:56 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 06:03:56 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:03:56 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:03:56 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:03:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 06:03:56 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:03:56 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:03:56 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:03:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:03:56 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:03:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:03:56 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:03:56 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:03:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:03:56 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:03:56 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:03:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:03:56 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:03:56 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:03:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:03:56 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:03:56 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:03:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:03:56 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:03:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:03:56 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:03:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:03:56 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:03:56 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:03:56 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:03:56 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-03-30 06:03:57 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-03-30 06:03:57 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-03-30 06:03:57 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-03-30 06:03:57 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-03-30 06:03:57 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-03-30 06:03:57 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-03-30 06:03:57 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-03-30 06:03:57 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-03-30 06:03:57 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-03-30 06:03:57 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=0 bl=148 pwr=0
2025-03-30 06:03:57 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=1 bl=148 pwr=0
2025-03-30 06:03:57 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=2 bl=148 pwr=0
2025-03-30 06:03:57 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=3 bl=148 pwr=0
2025-03-30 06:03:57 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=4 bl=148 pwr=0
2025-03-30 06:03:57 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=5 bl=148 pwr=0
2025-03-30 06:03:57 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=6 bl=148 pwr=0
2025-03-30 06:03:57 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=7 bl=148 pwr=0
2025-03-30 06:03:57 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 06:03:57 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 06:03:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:03:57 [DEBUG] fake_trx.py:317 (BTS@172.18.26.20:5700) Recv FAKE_CI cmd
2025-03-30 06:03:57 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:03:57 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:03:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:03:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:03:57 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:03:57 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:03:57 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:03:57 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:03:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:03:57 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:03:57 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:03:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:03:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:03:57 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-03-30 06:03:57 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:03:57 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:03:57 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:03:57 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:03:58 [DEBUG] clck_gen.py:128 IND CLOCK 306
2025-03-30 06:03:58 [DEBUG] clck_gen.py:128 IND CLOCK 408
2025-03-30 06:03:58 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:03:58 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:03:58 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:03:58 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:03:58 [DEBUG] clck_gen.py:128 IND CLOCK 510
2025-03-30 06:03:59 [DEBUG] clck_gen.py:128 IND CLOCK 612
2025-03-30 06:03:59 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:03:59 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:03:59 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:03:59 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:03:59 [DEBUG] clck_gen.py:128 IND CLOCK 714
2025-03-30 06:04:00 [DEBUG] clck_gen.py:128 IND CLOCK 816
2025-03-30 06:04:00 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:04:00 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:04:00 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:04:00 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:04:00 [DEBUG] clck_gen.py:128 IND CLOCK 918
2025-03-30 06:04:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:04:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:04:01 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:04:01 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:04:01 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:04:01 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:04:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:04:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:04:01 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:04:01 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:04:01 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:04:01 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:04:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:04:01 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:04:01 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:04:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:04:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:04:01 [DEBUG] clck_gen.py:128 IND CLOCK 1020
2025-03-30 06:04:01 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:04:01 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:04:01 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:04:01 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:04:01 [DEBUG] clck_gen.py:128 IND CLOCK 1122
2025-03-30 06:04:02 [DEBUG] clck_gen.py:128 IND CLOCK 1224
2025-03-30 06:04:02 [DEBUG] clck_gen.py:128 IND CLOCK 1326
2025-03-30 06:04:03 [DEBUG] clck_gen.py:128 IND CLOCK 1428
2025-03-30 06:04:03 [DEBUG] clck_gen.py:128 IND CLOCK 1530
2025-03-30 06:04:04 [DEBUG] clck_gen.py:128 IND CLOCK 1632
2025-03-30 06:04:04 [DEBUG] clck_gen.py:128 IND CLOCK 1734
2025-03-30 06:04:05 [DEBUG] clck_gen.py:128 IND CLOCK 1836
2025-03-30 06:04:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:04:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:04:05 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:04:05 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:04:05 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:04:05 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:04:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:04:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:04:05 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:04:05 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:04:05 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:04:05 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:04:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:04:05 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:04:05 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:04:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:04:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:04:05 [DEBUG] clck_gen.py:128 IND CLOCK 1938
2025-03-30 06:04:06 [DEBUG] clck_gen.py:128 IND CLOCK 2040
2025-03-30 06:04:06 [DEBUG] clck_gen.py:128 IND CLOCK 2142
2025-03-30 06:04:06 [DEBUG] clck_gen.py:128 IND CLOCK 2244
2025-03-30 06:04:07 [DEBUG] clck_gen.py:128 IND CLOCK 2346
2025-03-30 06:04:07 [DEBUG] clck_gen.py:128 IND CLOCK 2448
2025-03-30 06:04:08 [DEBUG] clck_gen.py:128 IND CLOCK 2550
2025-03-30 06:04:08 [DEBUG] clck_gen.py:128 IND CLOCK 2652
2025-03-30 06:04:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:04:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:04:09 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:04:09 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:04:09 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:04:09 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:04:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:04:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:04:09 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:04:09 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:04:09 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:04:09 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:04:09 [DEBUG] clck_gen.py:128 IND CLOCK 2754
2025-03-30 06:04:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:04:09 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:04:09 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:04:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:04:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:04:09 [DEBUG] clck_gen.py:128 IND CLOCK 2856
2025-03-30 06:04:10 [DEBUG] clck_gen.py:128 IND CLOCK 2958
2025-03-30 06:04:10 [DEBUG] clck_gen.py:128 IND CLOCK 3060
2025-03-30 06:04:11 [DEBUG] clck_gen.py:128 IND CLOCK 3162
2025-03-30 06:04:11 [DEBUG] clck_gen.py:128 IND CLOCK 3264
2025-03-30 06:04:12 [DEBUG] clck_gen.py:128 IND CLOCK 3366
2025-03-30 06:04:12 [DEBUG] clck_gen.py:128 IND CLOCK 3468
2025-03-30 06:04:13 [DEBUG] clck_gen.py:128 IND CLOCK 3570
2025-03-30 06:04:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:04:13 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:04:13 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:04:13 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:04:13 [DEBUG] clck_gen.py:128 IND CLOCK 3672
2025-03-30 06:04:13 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:04:13 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:04:13 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:04:13 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:04:13 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:04:13 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:04:13 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:04:13 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:04:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:04:13 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:04:13 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:04:13 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:04:13 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:04:14 [DEBUG] clck_gen.py:128 IND CLOCK 3774
2025-03-30 06:04:14 [DEBUG] clck_gen.py:128 IND CLOCK 3876
2025-03-30 06:04:14 [DEBUG] clck_gen.py:128 IND CLOCK 3978
2025-03-30 06:04:15 [DEBUG] clck_gen.py:128 IND CLOCK 4080
2025-03-30 06:04:15 [DEBUG] clck_gen.py:128 IND CLOCK 4182
2025-03-30 06:04:16 [DEBUG] clck_gen.py:128 IND CLOCK 4284
2025-03-30 06:04:16 [DEBUG] clck_gen.py:128 IND CLOCK 4386
2025-03-30 06:04:17 [DEBUG] clck_gen.py:128 IND CLOCK 4488
2025-03-30 06:04:17 [DEBUG] clck_gen.py:128 IND CLOCK 4590
2025-03-30 06:04:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:04:18 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:04:18 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:04:18 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:04:18 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:04:18 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:04:18 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:04:18 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:04:18 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:04:18 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:04:18 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:04:18 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:04:18 [DEBUG] clck_gen.py:128 IND CLOCK 4692
2025-03-30 06:04:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:04:18 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:04:18 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:04:18 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:04:18 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:04:18 [DEBUG] clck_gen.py:128 IND CLOCK 4794
2025-03-30 06:04:19 [DEBUG] clck_gen.py:128 IND CLOCK 4896
2025-03-30 06:04:19 [DEBUG] clck_gen.py:128 IND CLOCK 4998
2025-03-30 06:04:20 [DEBUG] clck_gen.py:128 IND CLOCK 5100
2025-03-30 06:04:20 [DEBUG] clck_gen.py:128 IND CLOCK 5202
2025-03-30 06:04:21 [DEBUG] clck_gen.py:128 IND CLOCK 5304
2025-03-30 06:04:21 [DEBUG] clck_gen.py:128 IND CLOCK 5406
2025-03-30 06:04:22 [DEBUG] clck_gen.py:128 IND CLOCK 5508
2025-03-30 06:04:22 [DEBUG] clck_gen.py:128 IND CLOCK 5610
2025-03-30 06:04:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:04:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:04:22 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:04:22 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:04:22 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:04:22 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:04:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:04:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:04:22 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:04:22 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:04:22 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:04:22 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:04:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:04:22 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:04:22 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:04:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:04:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:04:22 [DEBUG] clck_gen.py:128 IND CLOCK 5712
2025-03-30 06:04:23 [DEBUG] clck_gen.py:128 IND CLOCK 5814
2025-03-30 06:04:23 [DEBUG] clck_gen.py:128 IND CLOCK 5916
2025-03-30 06:04:24 [DEBUG] clck_gen.py:128 IND CLOCK 6018
2025-03-30 06:04:24 [DEBUG] clck_gen.py:128 IND CLOCK 6120
2025-03-30 06:04:25 [DEBUG] clck_gen.py:128 IND CLOCK 6222
2025-03-30 06:04:25 [DEBUG] clck_gen.py:128 IND CLOCK 6324
2025-03-30 06:04:26 [DEBUG] clck_gen.py:128 IND CLOCK 6426
2025-03-30 06:04:26 [DEBUG] clck_gen.py:128 IND CLOCK 6528
2025-03-30 06:04:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:04:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:04:26 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:04:26 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:04:27 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:04:27 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:04:27 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:04:27 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:04:27 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:04:27 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:04:27 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:04:27 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:04:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:04:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:04:27 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:04:27 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:04:27 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:04:27 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:04:27 [DEBUG] clck_gen.py:128 IND CLOCK 6630
2025-03-30 06:04:27 [DEBUG] clck_gen.py:128 IND CLOCK 6732
2025-03-30 06:04:28 [DEBUG] clck_gen.py:128 IND CLOCK 6834
2025-03-30 06:04:28 [DEBUG] clck_gen.py:128 IND CLOCK 6936
2025-03-30 06:04:29 [DEBUG] clck_gen.py:128 IND CLOCK 7038
2025-03-30 06:04:29 [DEBUG] clck_gen.py:128 IND CLOCK 7140
2025-03-30 06:04:30 [DEBUG] clck_gen.py:128 IND CLOCK 7242
2025-03-30 06:04:30 [DEBUG] clck_gen.py:128 IND CLOCK 7344
2025-03-30 06:04:30 [DEBUG] clck_gen.py:128 IND CLOCK 7446
2025-03-30 06:04:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:04:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:04:31 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:04:31 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:04:31 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:04:31 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:04:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:04:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:04:31 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:04:31 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:04:31 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:04:31 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:04:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:04:31 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:04:31 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:04:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:04:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:04:31 [DEBUG] clck_gen.py:128 IND CLOCK 7548
2025-03-30 06:04:31 [DEBUG] clck_gen.py:128 IND CLOCK 7650
2025-03-30 06:04:32 [DEBUG] clck_gen.py:128 IND CLOCK 7752
2025-03-30 06:04:32 [DEBUG] clck_gen.py:128 IND CLOCK 7854
2025-03-30 06:04:33 [DEBUG] clck_gen.py:128 IND CLOCK 7956
2025-03-30 06:04:33 [DEBUG] clck_gen.py:128 IND CLOCK 8058
2025-03-30 06:04:34 [DEBUG] clck_gen.py:128 IND CLOCK 8160
2025-03-30 06:04:34 [DEBUG] clck_gen.py:128 IND CLOCK 8262
2025-03-30 06:04:35 [DEBUG] clck_gen.py:128 IND CLOCK 8364
2025-03-30 06:04:35 [DEBUG] clck_gen.py:128 IND CLOCK 8466
2025-03-30 06:04:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:04:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:04:35 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:04:35 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:04:35 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:04:35 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:04:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:04:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:04:35 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:04:35 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:04:35 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:04:35 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:04:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:04:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:04:35 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:04:35 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:04:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:04:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:04:36 [DEBUG] clck_gen.py:128 IND CLOCK 8568
2025-03-30 06:04:36 [DEBUG] clck_gen.py:128 IND CLOCK 8670
2025-03-30 06:04:37 [DEBUG] clck_gen.py:128 IND CLOCK 8772
2025-03-30 06:04:37 [DEBUG] clck_gen.py:128 IND CLOCK 8874
2025-03-30 06:04:38 [DEBUG] clck_gen.py:128 IND CLOCK 8976
2025-03-30 06:04:38 [DEBUG] clck_gen.py:128 IND CLOCK 9078
2025-03-30 06:04:38 [DEBUG] clck_gen.py:128 IND CLOCK 9180
2025-03-30 06:04:39 [DEBUG] clck_gen.py:128 IND CLOCK 9282
2025-03-30 06:04:39 [DEBUG] clck_gen.py:128 IND CLOCK 9384
2025-03-30 06:04:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:04:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:04:40 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:04:40 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:04:40 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:04:40 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:04:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:04:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:04:40 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:04:40 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:04:40 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:04:40 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:04:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:04:40 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:04:40 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:04:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:04:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:04:40 [DEBUG] clck_gen.py:128 IND CLOCK 9486
2025-03-30 06:04:40 [DEBUG] clck_gen.py:128 IND CLOCK 9588
2025-03-30 06:04:41 [DEBUG] clck_gen.py:128 IND CLOCK 9690
2025-03-30 06:04:41 [DEBUG] clck_gen.py:128 IND CLOCK 9792
2025-03-30 06:04:42 [DEBUG] clck_gen.py:128 IND CLOCK 9894
2025-03-30 06:04:42 [DEBUG] clck_gen.py:128 IND CLOCK 9996
2025-03-30 06:04:43 [DEBUG] clck_gen.py:128 IND CLOCK 10098
2025-03-30 06:04:43 [DEBUG] clck_gen.py:128 IND CLOCK 10200
2025-03-30 06:04:44 [DEBUG] clck_gen.py:128 IND CLOCK 10302
2025-03-30 06:04:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:04:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:04:44 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:04:44 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:04:44 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:04:44 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:04:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:04:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:04:44 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:04:44 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:04:44 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:04:44 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:04:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:04:44 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:04:44 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:04:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:04:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:04:44 [DEBUG] clck_gen.py:128 IND CLOCK 10404
2025-03-30 06:04:45 [DEBUG] clck_gen.py:128 IND CLOCK 10506
2025-03-30 06:04:45 [DEBUG] clck_gen.py:128 IND CLOCK 10608
2025-03-30 06:04:46 [DEBUG] clck_gen.py:128 IND CLOCK 10710
2025-03-30 06:04:46 [DEBUG] clck_gen.py:128 IND CLOCK 10812
2025-03-30 06:04:46 [DEBUG] clck_gen.py:128 IND CLOCK 10914
2025-03-30 06:04:47 [DEBUG] clck_gen.py:128 IND CLOCK 11016
2025-03-30 06:04:47 [DEBUG] clck_gen.py:128 IND CLOCK 11118
2025-03-30 06:04:48 [DEBUG] clck_gen.py:128 IND CLOCK 11220
2025-03-30 06:04:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:04:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:04:48 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:04:48 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:04:48 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:04:48 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:04:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:04:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:04:48 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:04:48 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:04:48 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:04:48 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:04:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:04:48 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:04:48 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:04:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:04:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:04:48 [DEBUG] clck_gen.py:128 IND CLOCK 11322
2025-03-30 06:04:49 [DEBUG] clck_gen.py:128 IND CLOCK 11424
2025-03-30 06:04:49 [DEBUG] clck_gen.py:128 IND CLOCK 11526
2025-03-30 06:04:50 [DEBUG] clck_gen.py:128 IND CLOCK 11628
2025-03-30 06:04:50 [DEBUG] clck_gen.py:128 IND CLOCK 11730
2025-03-30 06:04:51 [DEBUG] clck_gen.py:128 IND CLOCK 11832
2025-03-30 06:04:51 [DEBUG] clck_gen.py:128 IND CLOCK 11934
2025-03-30 06:04:52 [DEBUG] clck_gen.py:128 IND CLOCK 12036
2025-03-30 06:04:52 [DEBUG] clck_gen.py:128 IND CLOCK 12138
2025-03-30 06:04:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:04:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:04:52 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:04:52 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:04:52 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:04:52 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:04:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:04:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:04:52 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:04:52 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:04:52 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:04:52 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:04:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:04:52 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:04:52 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:04:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:04:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:04:53 [DEBUG] clck_gen.py:128 IND CLOCK 12240
2025-03-30 06:04:53 [DEBUG] clck_gen.py:128 IND CLOCK 12342
2025-03-30 06:04:54 [DEBUG] clck_gen.py:128 IND CLOCK 12444
2025-03-30 06:04:54 [DEBUG] clck_gen.py:128 IND CLOCK 12546
2025-03-30 06:04:55 [DEBUG] clck_gen.py:128 IND CLOCK 12648
2025-03-30 06:04:55 [DEBUG] clck_gen.py:128 IND CLOCK 12750
2025-03-30 06:04:55 [DEBUG] clck_gen.py:128 IND CLOCK 12852
2025-03-30 06:04:56 [DEBUG] clck_gen.py:128 IND CLOCK 12954
2025-03-30 06:04:56 [DEBUG] clck_gen.py:128 IND CLOCK 13056
2025-03-30 06:04:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:04:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:04:57 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:04:57 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:04:57 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:04:57 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:04:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:04:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:04:57 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:04:57 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:04:57 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:04:57 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:04:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:04:57 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:04:57 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:04:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:04:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:04:57 [DEBUG] clck_gen.py:128 IND CLOCK 13158
2025-03-30 06:04:57 [DEBUG] clck_gen.py:128 IND CLOCK 13260
2025-03-30 06:04:58 [DEBUG] clck_gen.py:128 IND CLOCK 13362
2025-03-30 06:04:58 [DEBUG] clck_gen.py:128 IND CLOCK 13464
2025-03-30 06:04:59 [DEBUG] clck_gen.py:128 IND CLOCK 13566
2025-03-30 06:04:59 [DEBUG] clck_gen.py:128 IND CLOCK 13668
2025-03-30 06:05:00 [DEBUG] clck_gen.py:128 IND CLOCK 13770
2025-03-30 06:05:00 [DEBUG] clck_gen.py:128 IND CLOCK 13872
2025-03-30 06:05:01 [DEBUG] clck_gen.py:128 IND CLOCK 13974
2025-03-30 06:05:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:05:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:05:01 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:05:01 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:05:01 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:05:01 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:05:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:05:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:05:01 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:05:01 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:05:01 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:05:01 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:05:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:05:01 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:05:01 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:05:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:05:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:05:01 [DEBUG] clck_gen.py:128 IND CLOCK 14076
2025-03-30 06:05:02 [DEBUG] clck_gen.py:128 IND CLOCK 14178
2025-03-30 06:05:02 [DEBUG] clck_gen.py:128 IND CLOCK 14280
2025-03-30 06:05:03 [DEBUG] clck_gen.py:128 IND CLOCK 14382
2025-03-30 06:05:03 [DEBUG] clck_gen.py:128 IND CLOCK 14484
2025-03-30 06:05:03 [DEBUG] clck_gen.py:128 IND CLOCK 14586
2025-03-30 06:05:04 [DEBUG] clck_gen.py:128 IND CLOCK 14688
2025-03-30 06:05:04 [DEBUG] clck_gen.py:128 IND CLOCK 14790
2025-03-30 06:05:05 [DEBUG] clck_gen.py:128 IND CLOCK 14892
2025-03-30 06:05:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:05:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:05:05 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:05:05 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:05:05 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:05:05 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:05:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:05:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:05:05 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:05:05 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:05:05 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:05:05 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:05:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:05:05 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:05:05 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:05:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:05:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:05:05 [DEBUG] clck_gen.py:128 IND CLOCK 14994
2025-03-30 06:05:06 [DEBUG] clck_gen.py:128 IND CLOCK 15096
2025-03-30 06:05:06 [DEBUG] clck_gen.py:128 IND CLOCK 15198
2025-03-30 06:05:07 [DEBUG] clck_gen.py:128 IND CLOCK 15300
2025-03-30 06:05:07 [DEBUG] clck_gen.py:128 IND CLOCK 15402
2025-03-30 06:05:08 [DEBUG] clck_gen.py:128 IND CLOCK 15504
2025-03-30 06:05:08 [DEBUG] clck_gen.py:128 IND CLOCK 15606
2025-03-30 06:05:09 [DEBUG] clck_gen.py:128 IND CLOCK 15708
2025-03-30 06:05:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:05:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:05:09 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:05:09 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:05:09 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:05:09 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:05:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:05:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:05:09 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:05:09 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:05:09 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:05:09 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:05:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:05:09 [DEBUG] clck_gen.py:128 IND CLOCK 15810
2025-03-30 06:05:09 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:05:09 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:05:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:05:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:05:10 [DEBUG] clck_gen.py:128 IND CLOCK 15912
2025-03-30 06:05:10 [DEBUG] clck_gen.py:128 IND CLOCK 16014
2025-03-30 06:05:11 [DEBUG] clck_gen.py:128 IND CLOCK 16116
2025-03-30 06:05:11 [DEBUG] clck_gen.py:128 IND CLOCK 16218
2025-03-30 06:05:11 [DEBUG] clck_gen.py:128 IND CLOCK 16320
2025-03-30 06:05:12 [DEBUG] clck_gen.py:128 IND CLOCK 16422
2025-03-30 06:05:12 [DEBUG] clck_gen.py:128 IND CLOCK 16524
2025-03-30 06:05:13 [DEBUG] clck_gen.py:128 IND CLOCK 16626
2025-03-30 06:05:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:05:13 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:05:13 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:05:13 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:05:13 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:05:13 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:05:13 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:05:13 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:05:13 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:05:13 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:05:13 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:05:13 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:05:13 [DEBUG] clck_gen.py:128 IND CLOCK 16728
2025-03-30 06:05:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:05:13 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:05:13 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:05:13 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:05:13 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:05:14 [DEBUG] clck_gen.py:128 IND CLOCK 16830
2025-03-30 06:05:14 [DEBUG] clck_gen.py:128 IND CLOCK 16932
2025-03-30 06:05:15 [DEBUG] clck_gen.py:128 IND CLOCK 17034
2025-03-30 06:05:15 [DEBUG] clck_gen.py:128 IND CLOCK 17136
2025-03-30 06:05:16 [DEBUG] clck_gen.py:128 IND CLOCK 17238
2025-03-30 06:05:16 [DEBUG] clck_gen.py:128 IND CLOCK 17340
2025-03-30 06:05:17 [DEBUG] clck_gen.py:128 IND CLOCK 17442
2025-03-30 06:05:17 [DEBUG] clck_gen.py:128 IND CLOCK 17544
2025-03-30 06:05:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:05:18 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:05:18 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:05:18 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:05:18 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:05:18 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:05:18 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:05:18 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:05:18 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:05:18 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:05:18 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:05:18 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:05:18 [DEBUG] clck_gen.py:128 IND CLOCK 17646
2025-03-30 06:05:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:05:18 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:05:18 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:05:18 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:05:18 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:05:18 [DEBUG] clck_gen.py:128 IND CLOCK 17748
2025-03-30 06:05:19 [DEBUG] clck_gen.py:128 IND CLOCK 17850
2025-03-30 06:05:19 [DEBUG] clck_gen.py:128 IND CLOCK 17952
2025-03-30 06:05:19 [DEBUG] clck_gen.py:128 IND CLOCK 18054
2025-03-30 06:05:20 [DEBUG] clck_gen.py:128 IND CLOCK 18156
2025-03-30 06:05:20 [DEBUG] clck_gen.py:128 IND CLOCK 18258
2025-03-30 06:05:21 [DEBUG] clck_gen.py:128 IND CLOCK 18360
2025-03-30 06:05:21 [DEBUG] clck_gen.py:128 IND CLOCK 18462
2025-03-30 06:05:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:05:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:05:22 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:05:22 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:05:22 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:05:22 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:05:22 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:05:22 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:05:22 [DEBUG] clck_gen.py:128 IND CLOCK 18564
2025-03-30 06:05:22 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:05:22 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:05:22 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:05:22 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:05:22 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 06:05:22 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 06:05:22 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 06:05:27 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 06:05:27 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 06:05:27 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:05:27 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:05:27 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:05:27 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:05:27 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:05:27 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 06:05:27 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:05:27 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 06:05:27 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 06:05:27 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 06:05:27 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 06:05:27 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 06:05:27 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:05:27 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:05:27 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 06:05:27 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 06:05:27 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 06:05:27 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 06:05:27 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 06:05:27 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 06:05:27 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:05:27 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:05:27 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 06:05:27 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 06:05:27 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 06:05:27 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 06:05:27 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 06:05:27 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 06:05:27 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:05:27 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:05:27 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 06:05:27 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 06:05:27 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 06:05:27 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 06:05:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 06:05:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 06:05:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 06:05:27 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 06:05:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 06:05:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 06:05:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 06:05:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 06:05:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:05:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:05:27 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 06:05:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:05:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:05:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:05:27 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 06:05:27 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 06:05:27 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 06:05:27 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 06:05:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:05:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:05:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:05:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 06:05:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:05:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:05:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:05:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:05:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:05:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:05:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:05:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:05:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:05:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:05:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:05:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:05:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:05:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:05:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:05:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:05:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:05:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:05:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:05:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:05:27 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:05:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:05:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:05:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:05:27 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:05:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:05:27 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:05:27 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:05:27 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 06:05:27 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 06:05:27 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 06:05:32 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 06:05:32 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 06:05:32 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:05:32 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:05:32 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:05:32 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:05:32 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:05:32 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 06:05:32 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:05:32 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 06:05:32 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 06:05:32 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 06:05:32 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 06:05:32 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 06:05:32 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:05:32 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:05:32 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 06:05:32 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 06:05:32 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 06:05:32 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 06:05:32 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 06:05:32 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 06:05:32 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:05:32 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:05:32 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 06:05:32 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 06:05:32 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 06:05:32 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 06:05:32 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 06:05:32 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 06:05:32 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:05:32 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:05:32 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 06:05:32 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 06:05:32 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 06:05:32 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 06:05:32 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 06:05:32 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 06:05:32 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 06:05:32 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 06:05:32 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 06:05:32 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 06:05:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 06:05:32 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:05:32 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 06:05:32 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 06:05:32 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:05:32 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:05:32 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 06:05:32 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 06:05:32 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 06:05:32 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:05:32 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 06:05:32 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:05:32 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:05:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 06:05:32 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:05:32 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:05:32 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:05:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:05:32 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:05:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:05:32 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:05:32 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:05:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:05:32 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:05:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:05:32 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:05:32 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:05:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:05:32 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:05:32 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:05:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:05:32 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:05:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:05:32 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:05:32 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:05:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:05:32 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:05:32 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:05:32 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:05:32 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:05:32 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-03-30 06:05:32 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-03-30 06:05:32 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-03-30 06:05:32 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-03-30 06:05:32 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-03-30 06:05:32 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-03-30 06:05:32 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-03-30 06:05:32 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-03-30 06:05:32 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-03-30 06:05:32 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-03-30 06:05:32 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=0 bl=148 pwr=0
2025-03-30 06:05:32 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=1 bl=148 pwr=0
2025-03-30 06:05:32 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=2 bl=148 pwr=0
2025-03-30 06:05:32 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=3 bl=148 pwr=0
2025-03-30 06:05:32 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=4 bl=148 pwr=0
2025-03-30 06:05:32 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=5 bl=148 pwr=0
2025-03-30 06:05:32 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=6 bl=148 pwr=0
2025-03-30 06:05:32 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=7 bl=148 pwr=0
2025-03-30 06:05:32 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 06:05:32 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 06:05:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:05:32 [DEBUG] fake_trx.py:317 (BTS@172.18.26.20:5700) Recv FAKE_CI cmd
2025-03-30 06:05:32 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:05:32 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:05:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:05:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:05:32 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:05:32 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:05:32 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:05:32 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:05:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:05:32 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:05:32 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:05:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:05:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:05:33 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-03-30 06:05:33 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:05:33 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:05:33 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:05:33 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:05:33 [DEBUG] clck_gen.py:128 IND CLOCK 306
2025-03-30 06:05:34 [DEBUG] clck_gen.py:128 IND CLOCK 408
2025-03-30 06:05:34 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:05:34 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:05:34 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:05:34 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:05:34 [DEBUG] clck_gen.py:128 IND CLOCK 510
2025-03-30 06:05:35 [DEBUG] clck_gen.py:128 IND CLOCK 612
2025-03-30 06:05:35 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:05:35 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:05:35 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:05:35 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:05:35 [DEBUG] clck_gen.py:128 IND CLOCK 714
2025-03-30 06:05:36 [DEBUG] clck_gen.py:128 IND CLOCK 816
2025-03-30 06:05:36 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:05:36 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:05:36 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:05:36 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:05:36 [DEBUG] clck_gen.py:128 IND CLOCK 918
2025-03-30 06:05:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:05:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:05:37 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:05:37 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:05:37 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:05:37 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:05:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:05:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:05:37 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:05:37 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:05:37 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:05:37 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:05:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:05:37 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:05:37 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:05:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:05:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:05:37 [DEBUG] clck_gen.py:128 IND CLOCK 1020
2025-03-30 06:05:37 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:05:37 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:05:37 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:05:37 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:05:37 [DEBUG] clck_gen.py:128 IND CLOCK 1122
2025-03-30 06:05:38 [DEBUG] clck_gen.py:128 IND CLOCK 1224
2025-03-30 06:05:38 [DEBUG] clck_gen.py:128 IND CLOCK 1326
2025-03-30 06:05:38 [DEBUG] clck_gen.py:128 IND CLOCK 1428
2025-03-30 06:05:39 [DEBUG] clck_gen.py:128 IND CLOCK 1530
2025-03-30 06:05:39 [DEBUG] clck_gen.py:128 IND CLOCK 1632
2025-03-30 06:05:40 [DEBUG] clck_gen.py:128 IND CLOCK 1734
2025-03-30 06:05:40 [DEBUG] clck_gen.py:128 IND CLOCK 1836
2025-03-30 06:05:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:05:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:05:41 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:05:41 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:05:41 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:05:41 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:05:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:05:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:05:41 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:05:41 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:05:41 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:05:41 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:05:41 [DEBUG] clck_gen.py:128 IND CLOCK 1938
2025-03-30 06:05:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:05:41 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:05:41 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:05:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:05:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:05:41 [DEBUG] clck_gen.py:128 IND CLOCK 2040
2025-03-30 06:05:42 [DEBUG] clck_gen.py:128 IND CLOCK 2142
2025-03-30 06:05:42 [DEBUG] clck_gen.py:128 IND CLOCK 2244
2025-03-30 06:05:43 [DEBUG] clck_gen.py:128 IND CLOCK 2346
2025-03-30 06:05:43 [DEBUG] clck_gen.py:128 IND CLOCK 2448
2025-03-30 06:05:44 [DEBUG] clck_gen.py:128 IND CLOCK 2550
2025-03-30 06:05:44 [DEBUG] clck_gen.py:128 IND CLOCK 2652
2025-03-30 06:05:45 [DEBUG] clck_gen.py:128 IND CLOCK 2754
2025-03-30 06:05:45 [DEBUG] clck_gen.py:128 IND CLOCK 2856
2025-03-30 06:05:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:05:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:05:45 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:05:45 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:05:45 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:05:45 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:05:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:05:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:05:45 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:05:45 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:05:45 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:05:45 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:05:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:05:45 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:05:45 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:05:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:05:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:05:46 [DEBUG] clck_gen.py:128 IND CLOCK 2958
2025-03-30 06:05:46 [DEBUG] clck_gen.py:128 IND CLOCK 3060
2025-03-30 06:05:46 [DEBUG] clck_gen.py:128 IND CLOCK 3162
2025-03-30 06:05:47 [DEBUG] clck_gen.py:128 IND CLOCK 3264
2025-03-30 06:05:47 [DEBUG] clck_gen.py:128 IND CLOCK 3366
2025-03-30 06:05:48 [DEBUG] clck_gen.py:128 IND CLOCK 3468
2025-03-30 06:05:48 [DEBUG] clck_gen.py:128 IND CLOCK 3570
2025-03-30 06:05:49 [DEBUG] clck_gen.py:128 IND CLOCK 3672
2025-03-30 06:05:49 [DEBUG] clck_gen.py:128 IND CLOCK 3774
2025-03-30 06:05:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:05:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:05:49 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:05:49 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:05:50 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:05:50 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:05:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:05:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:05:50 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:05:50 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:05:50 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:05:50 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:05:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:05:50 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:05:50 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:05:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:05:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:05:50 [DEBUG] clck_gen.py:128 IND CLOCK 3876
2025-03-30 06:05:50 [DEBUG] clck_gen.py:128 IND CLOCK 3978
2025-03-30 06:05:51 [DEBUG] clck_gen.py:128 IND CLOCK 4080
2025-03-30 06:05:51 [DEBUG] clck_gen.py:128 IND CLOCK 4182
2025-03-30 06:05:52 [DEBUG] clck_gen.py:128 IND CLOCK 4284
2025-03-30 06:05:52 [DEBUG] clck_gen.py:128 IND CLOCK 4386
2025-03-30 06:05:53 [DEBUG] clck_gen.py:128 IND CLOCK 4488
2025-03-30 06:05:53 [DEBUG] clck_gen.py:128 IND CLOCK 4590
2025-03-30 06:05:54 [DEBUG] clck_gen.py:128 IND CLOCK 4692
2025-03-30 06:05:54 [DEBUG] clck_gen.py:128 IND CLOCK 4794
2025-03-30 06:05:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:05:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:05:54 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:05:54 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:05:54 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:05:54 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:05:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:05:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:05:54 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:05:54 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:05:54 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:05:54 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:05:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:05:54 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:05:54 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:05:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:05:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:05:54 [DEBUG] clck_gen.py:128 IND CLOCK 4896
2025-03-30 06:05:55 [DEBUG] clck_gen.py:128 IND CLOCK 4998
2025-03-30 06:05:55 [DEBUG] clck_gen.py:128 IND CLOCK 5100
2025-03-30 06:05:56 [DEBUG] clck_gen.py:128 IND CLOCK 5202
2025-03-30 06:05:56 [DEBUG] clck_gen.py:128 IND CLOCK 5304
2025-03-30 06:05:57 [DEBUG] clck_gen.py:128 IND CLOCK 5406
2025-03-30 06:05:57 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=5424): ver=1 fn=5423 tn=0 bl=148 pwr=0
2025-03-30 06:05:57 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=5424): ver=1 fn=5423 tn=1 bl=148 pwr=0
2025-03-30 06:05:57 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=5424): ver=1 fn=5423 tn=2 bl=148 pwr=0
2025-03-30 06:05:57 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=5424): ver=1 fn=5423 tn=3 bl=148 pwr=0
2025-03-30 06:05:57 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=5424): ver=1 fn=5423 tn=4 bl=148 pwr=0
2025-03-30 06:05:57 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=5424): ver=1 fn=5423 tn=5 bl=148 pwr=0
2025-03-30 06:05:57 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=5424): ver=1 fn=5423 tn=6 bl=148 pwr=0
2025-03-30 06:05:57 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=5424): ver=1 fn=5423 tn=7 bl=148 pwr=0
2025-03-30 06:05:57 [DEBUG] clck_gen.py:128 IND CLOCK 5508
2025-03-30 06:05:58 [DEBUG] clck_gen.py:128 IND CLOCK 5610
2025-03-30 06:05:58 [DEBUG] clck_gen.py:128 IND CLOCK 5712
2025-03-30 06:05:59 [DEBUG] clck_gen.py:128 IND CLOCK 5814
2025-03-30 06:05:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:05:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:05:59 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:05:59 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:05:59 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:05:59 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:05:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:05:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:05:59 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:05:59 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:05:59 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:05:59 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:05:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:05:59 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:05:59 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:05:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:05:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:05:59 [DEBUG] clck_gen.py:128 IND CLOCK 5916
2025-03-30 06:06:00 [DEBUG] clck_gen.py:128 IND CLOCK 6018
2025-03-30 06:06:00 [DEBUG] clck_gen.py:128 IND CLOCK 6120
2025-03-30 06:06:01 [DEBUG] clck_gen.py:128 IND CLOCK 6222
2025-03-30 06:06:01 [DEBUG] clck_gen.py:128 IND CLOCK 6324
2025-03-30 06:06:02 [DEBUG] clck_gen.py:128 IND CLOCK 6426
2025-03-30 06:06:02 [DEBUG] clck_gen.py:128 IND CLOCK 6528
2025-03-30 06:06:02 [DEBUG] clck_gen.py:128 IND CLOCK 6630
2025-03-30 06:06:03 [DEBUG] clck_gen.py:128 IND CLOCK 6732
2025-03-30 06:06:03 [DEBUG] clck_gen.py:128 IND CLOCK 6834
2025-03-30 06:06:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:06:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:06:04 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:06:04 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:06:04 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:06:04 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:06:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:06:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:06:04 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:06:04 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:06:04 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:06:04 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:06:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:06:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:06:04 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:06:04 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:06:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:06:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:06:04 [DEBUG] clck_gen.py:128 IND CLOCK 6936
2025-03-30 06:06:04 [DEBUG] clck_gen.py:128 IND CLOCK 7038
2025-03-30 06:06:05 [DEBUG] clck_gen.py:128 IND CLOCK 7140
2025-03-30 06:06:05 [DEBUG] clck_gen.py:128 IND CLOCK 7242
2025-03-30 06:06:06 [DEBUG] clck_gen.py:128 IND CLOCK 7344
2025-03-30 06:06:06 [DEBUG] clck_gen.py:128 IND CLOCK 7446
2025-03-30 06:06:07 [DEBUG] clck_gen.py:128 IND CLOCK 7548
2025-03-30 06:06:07 [DEBUG] clck_gen.py:128 IND CLOCK 7650
2025-03-30 06:06:08 [DEBUG] clck_gen.py:128 IND CLOCK 7752
2025-03-30 06:06:08 [DEBUG] clck_gen.py:128 IND CLOCK 7854
2025-03-30 06:06:09 [DEBUG] clck_gen.py:128 IND CLOCK 7956
2025-03-30 06:06:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:06:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:06:09 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:06:09 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:06:09 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:06:09 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:06:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:06:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:06:09 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:06:09 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:06:09 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:06:09 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:06:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:06:09 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:06:09 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:06:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:06:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:06:09 [DEBUG] clck_gen.py:128 IND CLOCK 8058
2025-03-30 06:06:10 [DEBUG] clck_gen.py:128 IND CLOCK 8160
2025-03-30 06:06:10 [DEBUG] clck_gen.py:128 IND CLOCK 8262
2025-03-30 06:06:11 [DEBUG] clck_gen.py:128 IND CLOCK 8364
2025-03-30 06:06:11 [DEBUG] clck_gen.py:128 IND CLOCK 8466
2025-03-30 06:06:11 [DEBUG] clck_gen.py:128 IND CLOCK 8568
2025-03-30 06:06:12 [DEBUG] clck_gen.py:128 IND CLOCK 8670
2025-03-30 06:06:12 [WARNING] clck_gen.py:108 CLCKGen: time overrun by -16521us; resetting the clock
2025-03-30 06:06:12 [DEBUG] clck_gen.py:128 IND CLOCK 8772
2025-03-30 06:06:13 [DEBUG] clck_gen.py:128 IND CLOCK 8874
2025-03-30 06:06:13 [DEBUG] clck_gen.py:128 IND CLOCK 8976
2025-03-30 06:06:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:06:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:06:14 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:06:14 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:06:14 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:06:14 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:06:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:06:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:06:14 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:06:14 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:06:14 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:06:14 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:06:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:06:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:06:14 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:06:14 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:06:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:06:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:06:14 [DEBUG] clck_gen.py:128 IND CLOCK 9078
2025-03-30 06:06:14 [DEBUG] clck_gen.py:128 IND CLOCK 9180
2025-03-30 06:06:15 [DEBUG] clck_gen.py:128 IND CLOCK 9282
2025-03-30 06:06:15 [DEBUG] clck_gen.py:128 IND CLOCK 9384
2025-03-30 06:06:16 [DEBUG] clck_gen.py:128 IND CLOCK 9486
2025-03-30 06:06:16 [DEBUG] clck_gen.py:128 IND CLOCK 9588
2025-03-30 06:06:17 [DEBUG] clck_gen.py:128 IND CLOCK 9690
2025-03-30 06:06:17 [DEBUG] clck_gen.py:128 IND CLOCK 9792
2025-03-30 06:06:18 [DEBUG] clck_gen.py:128 IND CLOCK 9894
2025-03-30 06:06:18 [DEBUG] clck_gen.py:128 IND CLOCK 9996
2025-03-30 06:06:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:06:18 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:06:18 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:06:18 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:06:18 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:06:18 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:06:18 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:06:18 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:06:18 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:06:18 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:06:18 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:06:18 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:06:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:06:18 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:06:18 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:06:18 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:06:18 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:06:19 [DEBUG] clck_gen.py:128 IND CLOCK 10098
2025-03-30 06:06:19 [DEBUG] clck_gen.py:128 IND CLOCK 10200
2025-03-30 06:06:19 [DEBUG] clck_gen.py:128 IND CLOCK 10302
2025-03-30 06:06:20 [DEBUG] clck_gen.py:128 IND CLOCK 10404
2025-03-30 06:06:20 [DEBUG] clck_gen.py:128 IND CLOCK 10506
2025-03-30 06:06:21 [DEBUG] clck_gen.py:128 IND CLOCK 10608
2025-03-30 06:06:21 [DEBUG] clck_gen.py:128 IND CLOCK 10710
2025-03-30 06:06:22 [DEBUG] clck_gen.py:128 IND CLOCK 10812
2025-03-30 06:06:22 [DEBUG] clck_gen.py:128 IND CLOCK 10914
2025-03-30 06:06:23 [DEBUG] clck_gen.py:128 IND CLOCK 11016
2025-03-30 06:06:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:06:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:06:23 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:06:23 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:06:23 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:06:23 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:06:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:06:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:06:23 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:06:23 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:06:23 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:06:23 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:06:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:06:23 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:06:23 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:06:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:06:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:06:23 [DEBUG] clck_gen.py:128 IND CLOCK 11118
2025-03-30 06:06:24 [DEBUG] clck_gen.py:128 IND CLOCK 11220
2025-03-30 06:06:24 [DEBUG] clck_gen.py:128 IND CLOCK 11322
2025-03-30 06:06:25 [DEBUG] clck_gen.py:128 IND CLOCK 11424
2025-03-30 06:06:25 [DEBUG] clck_gen.py:128 IND CLOCK 11526
2025-03-30 06:06:26 [DEBUG] clck_gen.py:128 IND CLOCK 11628
2025-03-30 06:06:26 [DEBUG] clck_gen.py:128 IND CLOCK 11730
2025-03-30 06:06:27 [DEBUG] clck_gen.py:128 IND CLOCK 11832
2025-03-30 06:06:27 [DEBUG] clck_gen.py:128 IND CLOCK 11934
2025-03-30 06:06:27 [DEBUG] clck_gen.py:128 IND CLOCK 12036
2025-03-30 06:06:28 [DEBUG] clck_gen.py:128 IND CLOCK 12138
2025-03-30 06:06:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:06:28 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:06:28 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:06:28 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:06:28 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:06:28 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:06:28 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:06:28 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:06:28 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:06:28 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:06:28 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:06:28 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:06:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:06:28 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:06:28 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:06:28 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:06:28 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:06:28 [DEBUG] clck_gen.py:128 IND CLOCK 12240
2025-03-30 06:06:29 [DEBUG] clck_gen.py:128 IND CLOCK 12342
2025-03-30 06:06:29 [DEBUG] clck_gen.py:128 IND CLOCK 12444
2025-03-30 06:06:30 [DEBUG] clck_gen.py:128 IND CLOCK 12546
2025-03-30 06:06:30 [DEBUG] clck_gen.py:128 IND CLOCK 12648
2025-03-30 06:06:31 [DEBUG] clck_gen.py:128 IND CLOCK 12750
2025-03-30 06:06:31 [DEBUG] clck_gen.py:128 IND CLOCK 12852
2025-03-30 06:06:32 [DEBUG] clck_gen.py:128 IND CLOCK 12954
2025-03-30 06:06:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:06:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:06:32 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:06:32 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:06:32 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:06:32 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:06:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:06:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:06:32 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:06:32 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:06:32 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:06:32 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:06:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:06:32 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:06:32 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:06:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:06:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:06:32 [DEBUG] clck_gen.py:128 IND CLOCK 13056
2025-03-30 06:06:33 [DEBUG] clck_gen.py:128 IND CLOCK 13158
2025-03-30 06:06:33 [DEBUG] clck_gen.py:128 IND CLOCK 13260
2025-03-30 06:06:34 [DEBUG] clck_gen.py:128 IND CLOCK 13362
2025-03-30 06:06:34 [DEBUG] clck_gen.py:128 IND CLOCK 13464
2025-03-30 06:06:35 [DEBUG] clck_gen.py:128 IND CLOCK 13566
2025-03-30 06:06:35 [DEBUG] clck_gen.py:128 IND CLOCK 13668
2025-03-30 06:06:35 [DEBUG] clck_gen.py:128 IND CLOCK 13770
2025-03-30 06:06:36 [DEBUG] clck_gen.py:128 IND CLOCK 13872
2025-03-30 06:06:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:06:36 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:06:36 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:06:36 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:06:36 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:06:36 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:06:36 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:06:36 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:06:36 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:06:36 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:06:36 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:06:36 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:06:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:06:36 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:06:36 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:06:36 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:06:36 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:06:36 [DEBUG] clck_gen.py:128 IND CLOCK 13974
2025-03-30 06:06:37 [DEBUG] clck_gen.py:128 IND CLOCK 14076
2025-03-30 06:06:37 [DEBUG] clck_gen.py:128 IND CLOCK 14178
2025-03-30 06:06:38 [DEBUG] clck_gen.py:128 IND CLOCK 14280
2025-03-30 06:06:38 [DEBUG] clck_gen.py:128 IND CLOCK 14382
2025-03-30 06:06:39 [DEBUG] clck_gen.py:128 IND CLOCK 14484
2025-03-30 06:06:39 [DEBUG] clck_gen.py:128 IND CLOCK 14586
2025-03-30 06:06:40 [DEBUG] clck_gen.py:128 IND CLOCK 14688
2025-03-30 06:06:40 [DEBUG] clck_gen.py:128 IND CLOCK 14790
2025-03-30 06:06:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:06:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:06:41 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:06:41 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:06:41 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:06:41 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:06:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:06:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:06:41 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:06:41 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:06:41 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:06:41 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:06:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:06:41 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:06:41 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:06:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:06:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:06:41 [DEBUG] clck_gen.py:128 IND CLOCK 14892
2025-03-30 06:06:41 [DEBUG] clck_gen.py:128 IND CLOCK 14994
2025-03-30 06:06:42 [DEBUG] clck_gen.py:128 IND CLOCK 15096
2025-03-30 06:06:42 [DEBUG] clck_gen.py:128 IND CLOCK 15198
2025-03-30 06:06:43 [DEBUG] clck_gen.py:128 IND CLOCK 15300
2025-03-30 06:06:43 [DEBUG] clck_gen.py:128 IND CLOCK 15402
2025-03-30 06:06:43 [DEBUG] clck_gen.py:128 IND CLOCK 15504
2025-03-30 06:06:44 [DEBUG] clck_gen.py:128 IND CLOCK 15606
2025-03-30 06:06:44 [DEBUG] clck_gen.py:128 IND CLOCK 15708
2025-03-30 06:06:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:06:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:06:45 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:06:45 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:06:45 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:06:45 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:06:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:06:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:06:45 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:06:45 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:06:45 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:06:45 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:06:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:06:45 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:06:45 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:06:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:06:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:06:45 [DEBUG] clck_gen.py:128 IND CLOCK 15810
2025-03-30 06:06:45 [DEBUG] clck_gen.py:128 IND CLOCK 15912
2025-03-30 06:06:46 [DEBUG] clck_gen.py:128 IND CLOCK 16014
2025-03-30 06:06:46 [DEBUG] clck_gen.py:128 IND CLOCK 16116
2025-03-30 06:06:47 [DEBUG] clck_gen.py:128 IND CLOCK 16218
2025-03-30 06:06:47 [DEBUG] clck_gen.py:128 IND CLOCK 16320
2025-03-30 06:06:48 [DEBUG] clck_gen.py:128 IND CLOCK 16422
2025-03-30 06:06:48 [DEBUG] clck_gen.py:128 IND CLOCK 16524
2025-03-30 06:06:49 [DEBUG] clck_gen.py:128 IND CLOCK 16626
2025-03-30 06:06:49 [DEBUG] clck_gen.py:128 IND CLOCK 16728
2025-03-30 06:06:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:06:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:06:49 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:06:49 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:06:49 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:06:49 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:06:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:06:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:06:49 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:06:49 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:06:49 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:06:49 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:06:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:06:49 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:06:49 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:06:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:06:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:06:50 [DEBUG] clck_gen.py:128 IND CLOCK 16830
2025-03-30 06:06:50 [DEBUG] clck_gen.py:128 IND CLOCK 16932
2025-03-30 06:06:51 [DEBUG] clck_gen.py:128 IND CLOCK 17034
2025-03-30 06:06:51 [DEBUG] clck_gen.py:128 IND CLOCK 17136
2025-03-30 06:06:51 [DEBUG] clck_gen.py:128 IND CLOCK 17238
2025-03-30 06:06:52 [DEBUG] clck_gen.py:128 IND CLOCK 17340
2025-03-30 06:06:52 [DEBUG] clck_gen.py:128 IND CLOCK 17442
2025-03-30 06:06:53 [DEBUG] clck_gen.py:128 IND CLOCK 17544
2025-03-30 06:06:53 [DEBUG] clck_gen.py:128 IND CLOCK 17646
2025-03-30 06:06:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:06:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:06:53 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:06:53 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:06:53 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:06:53 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:06:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:06:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:06:54 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:06:54 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:06:54 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:06:54 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:06:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:06:54 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:06:54 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:06:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:06:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:06:54 [DEBUG] clck_gen.py:128 IND CLOCK 17748
2025-03-30 06:06:54 [DEBUG] clck_gen.py:128 IND CLOCK 17850
2025-03-30 06:06:55 [DEBUG] clck_gen.py:128 IND CLOCK 17952
2025-03-30 06:06:55 [DEBUG] clck_gen.py:128 IND CLOCK 18054
2025-03-30 06:06:56 [DEBUG] clck_gen.py:128 IND CLOCK 18156
2025-03-30 06:06:56 [DEBUG] clck_gen.py:128 IND CLOCK 18258
2025-03-30 06:06:57 [DEBUG] clck_gen.py:128 IND CLOCK 18360
2025-03-30 06:06:57 [DEBUG] clck_gen.py:128 IND CLOCK 18462
2025-03-30 06:06:58 [DEBUG] clck_gen.py:128 IND CLOCK 18564
2025-03-30 06:06:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:06:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:06:58 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:06:58 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:06:58 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:06:58 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:06:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:06:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:06:58 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:06:58 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:06:58 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:06:58 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:06:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:06:58 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:06:58 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:06:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:06:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:06:58 [DEBUG] clck_gen.py:128 IND CLOCK 18666
2025-03-30 06:06:59 [DEBUG] clck_gen.py:128 IND CLOCK 18768
2025-03-30 06:06:59 [DEBUG] clck_gen.py:128 IND CLOCK 18870
2025-03-30 06:06:59 [DEBUG] clck_gen.py:128 IND CLOCK 18972
2025-03-30 06:07:00 [DEBUG] clck_gen.py:128 IND CLOCK 19074
2025-03-30 06:07:00 [DEBUG] clck_gen.py:128 IND CLOCK 19176
2025-03-30 06:07:01 [DEBUG] clck_gen.py:128 IND CLOCK 19278
2025-03-30 06:07:01 [DEBUG] clck_gen.py:128 IND CLOCK 19380
2025-03-30 06:07:02 [DEBUG] clck_gen.py:128 IND CLOCK 19482
2025-03-30 06:07:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:07:02 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:07:02 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:07:02 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:07:02 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:07:02 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:07:02 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:07:02 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:07:02 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:07:02 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:07:02 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:07:02 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:07:02 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 06:07:02 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 06:07:02 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 06:07:07 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 06:07:07 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 06:07:07 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:07:07 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:07:07 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:07:07 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:07:07 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:07:07 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 06:07:07 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:07:07 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 06:07:07 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 06:07:07 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 06:07:07 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 06:07:07 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 06:07:07 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:07:07 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:07:07 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 06:07:07 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 06:07:07 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 06:07:07 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 06:07:07 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 06:07:07 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 06:07:07 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:07:07 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:07:07 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 06:07:07 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 06:07:07 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 06:07:07 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 06:07:07 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 06:07:07 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 06:07:07 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:07:07 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:07:07 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 06:07:07 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 06:07:07 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 06:07:07 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 06:07:07 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 06:07:07 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 06:07:07 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 06:07:07 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 06:07:07 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 06:07:07 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 06:07:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 06:07:07 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:07:07 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 06:07:07 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 06:07:07 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:07:07 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:07:07 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 06:07:07 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 06:07:07 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 06:07:07 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:07:07 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 06:07:07 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:07:07 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:07:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 06:07:07 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:07:07 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:07:07 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:07:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:07:07 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:07:07 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:07:07 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:07:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:07:07 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:07:07 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:07:07 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:07:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:07:07 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:07:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:07:07 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:07:07 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:07:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:07:07 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:07:07 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:07:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:07:07 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:07:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:07:07 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:07:07 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:07:07 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:07:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:07:07 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:07:07 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:07:07 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:07:07 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:07:07 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 06:07:07 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 06:07:07 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 06:07:12 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 06:07:12 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 06:07:12 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:07:12 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:07:12 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:07:12 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:07:12 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:07:12 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 06:07:12 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:07:12 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 06:07:12 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 06:07:12 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 06:07:12 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 06:07:12 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 06:07:12 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:07:12 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:07:12 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 06:07:12 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 06:07:12 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 06:07:12 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 06:07:12 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 06:07:12 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 06:07:12 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:07:12 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:07:12 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 06:07:12 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 06:07:12 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 06:07:12 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 06:07:12 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 06:07:12 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 06:07:12 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:07:12 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:07:12 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 06:07:12 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 06:07:12 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 06:07:12 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 06:07:12 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 06:07:12 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 06:07:12 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 06:07:12 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 06:07:12 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 06:07:12 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 06:07:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 06:07:12 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:07:12 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 06:07:12 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 06:07:12 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:07:12 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:07:12 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 06:07:12 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 06:07:12 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 06:07:12 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:07:12 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 06:07:12 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:07:12 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:07:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 06:07:12 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:07:12 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:07:12 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:07:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:07:12 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:07:12 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:07:12 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:07:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:07:12 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:07:12 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:07:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:07:12 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:07:12 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:07:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:07:12 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:07:12 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:07:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:07:12 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:07:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:07:12 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:07:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:07:12 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:07:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:07:12 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:07:12 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:07:12 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:07:12 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-03-30 06:07:13 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-03-30 06:07:13 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-03-30 06:07:13 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-03-30 06:07:13 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-03-30 06:07:13 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-03-30 06:07:13 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-03-30 06:07:13 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-03-30 06:07:13 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-03-30 06:07:13 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-03-30 06:07:13 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=0 bl=148 pwr=0
2025-03-30 06:07:13 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=1 bl=148 pwr=0
2025-03-30 06:07:13 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=2 bl=148 pwr=0
2025-03-30 06:07:13 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=3 bl=148 pwr=0
2025-03-30 06:07:13 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=4 bl=148 pwr=0
2025-03-30 06:07:13 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=5 bl=148 pwr=0
2025-03-30 06:07:13 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=6 bl=148 pwr=0
2025-03-30 06:07:13 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=7 bl=148 pwr=0
2025-03-30 06:07:13 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 06:07:13 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 06:07:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:07:13 [DEBUG] fake_trx.py:317 (BTS@172.18.26.20:5700) Recv FAKE_CI cmd
2025-03-30 06:07:13 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:07:13 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:07:13 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:07:13 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:07:13 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:07:13 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:07:13 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:07:13 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:07:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:07:13 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:07:13 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:07:13 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:07:13 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:07:13 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-03-30 06:07:13 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:07:13 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:07:13 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:07:13 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:07:14 [DEBUG] clck_gen.py:128 IND CLOCK 306
2025-03-30 06:07:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:07:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:07:14 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:07:14 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:07:14 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:07:14 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:07:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:07:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:07:14 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:07:14 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:07:14 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:07:14 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:07:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:07:14 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:07:14 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:07:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:07:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:07:14 [DEBUG] clck_gen.py:128 IND CLOCK 408
2025-03-30 06:07:14 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:07:14 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:07:14 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:07:14 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:07:14 [DEBUG] clck_gen.py:128 IND CLOCK 510
2025-03-30 06:07:15 [DEBUG] clck_gen.py:128 IND CLOCK 612
2025-03-30 06:07:15 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:07:15 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:07:15 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:07:15 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:07:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:07:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:07:15 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:07:15 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:07:15 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:07:15 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:07:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:07:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:07:15 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:07:15 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:07:15 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:07:15 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:07:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:07:15 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:07:15 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:07:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:07:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:07:15 [DEBUG] clck_gen.py:128 IND CLOCK 714
2025-03-30 06:07:16 [DEBUG] clck_gen.py:128 IND CLOCK 816
2025-03-30 06:07:16 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:07:16 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:07:16 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:07:16 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:07:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:07:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:07:16 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:07:16 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:07:16 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:07:16 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:07:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:07:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:07:16 [DEBUG] clck_gen.py:128 IND CLOCK 918
2025-03-30 06:07:16 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:07:16 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:07:16 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:07:16 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:07:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:07:16 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:07:16 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:07:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:07:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:07:17 [DEBUG] clck_gen.py:128 IND CLOCK 1020
2025-03-30 06:07:17 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:07:17 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:07:17 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:07:17 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:07:17 [DEBUG] clck_gen.py:128 IND CLOCK 1122
2025-03-30 06:07:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:07:18 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:07:18 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:07:18 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:07:18 [DEBUG] clck_gen.py:128 IND CLOCK 1224
2025-03-30 06:07:18 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:07:18 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:07:18 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:07:18 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:07:18 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:07:18 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:07:18 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:07:18 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:07:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:07:18 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:07:18 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:07:18 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:07:18 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:07:18 [DEBUG] clck_gen.py:128 IND CLOCK 1326
2025-03-30 06:07:19 [DEBUG] clck_gen.py:128 IND CLOCK 1428
2025-03-30 06:07:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:07:19 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:07:19 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:07:19 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:07:19 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:07:19 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:07:19 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:07:19 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:07:19 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:07:19 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:07:19 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:07:19 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:07:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:07:19 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:07:19 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:07:19 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:07:19 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:07:19 [DEBUG] clck_gen.py:128 IND CLOCK 1530
2025-03-30 06:07:20 [DEBUG] clck_gen.py:128 IND CLOCK 1632
2025-03-30 06:07:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:07:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:07:20 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:07:20 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:07:20 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:07:20 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:07:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:07:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:07:20 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:07:20 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:07:20 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:07:20 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:07:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:07:20 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:07:20 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:07:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:07:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:07:20 [DEBUG] clck_gen.py:128 IND CLOCK 1734
2025-03-30 06:07:21 [DEBUG] clck_gen.py:128 IND CLOCK 1836
2025-03-30 06:07:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:07:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:07:21 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:07:21 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:07:21 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:07:21 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:07:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:07:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:07:21 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:07:21 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:07:21 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:07:21 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:07:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:07:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:07:21 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:07:21 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:07:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:07:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:07:21 [DEBUG] clck_gen.py:128 IND CLOCK 1938
2025-03-30 06:07:22 [DEBUG] clck_gen.py:128 IND CLOCK 2040
2025-03-30 06:07:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:07:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:07:22 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:07:22 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:07:22 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:07:22 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:07:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:07:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:07:22 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:07:22 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:07:22 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:07:22 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:07:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:07:22 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:07:22 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:07:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:07:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:07:22 [DEBUG] clck_gen.py:128 IND CLOCK 2142
2025-03-30 06:07:22 [DEBUG] clck_gen.py:128 IND CLOCK 2244
2025-03-30 06:07:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:07:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:07:23 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:07:23 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:07:23 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:07:23 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:07:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:07:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:07:23 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:07:23 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:07:23 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:07:23 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:07:23 [DEBUG] clck_gen.py:128 IND CLOCK 2346
2025-03-30 06:07:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:07:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:07:23 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:07:23 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:07:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:07:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:07:23 [DEBUG] clck_gen.py:128 IND CLOCK 2448
2025-03-30 06:07:24 [DEBUG] clck_gen.py:128 IND CLOCK 2550
2025-03-30 06:07:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:07:24 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:07:24 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:07:24 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:07:24 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:07:24 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:07:24 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:07:24 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:07:24 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:07:24 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:07:24 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:07:24 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:07:24 [DEBUG] clck_gen.py:128 IND CLOCK 2652
2025-03-30 06:07:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:07:24 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:07:24 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:07:24 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:07:24 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:07:25 [DEBUG] clck_gen.py:128 IND CLOCK 2754
2025-03-30 06:07:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:07:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:07:25 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:07:25 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:07:25 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:07:25 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:07:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:07:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:07:25 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:07:25 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:07:25 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:07:25 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:07:25 [DEBUG] clck_gen.py:128 IND CLOCK 2856
2025-03-30 06:07:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:07:25 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:07:25 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:07:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:07:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:07:26 [DEBUG] clck_gen.py:128 IND CLOCK 2958
2025-03-30 06:07:26 [DEBUG] clck_gen.py:128 IND CLOCK 3060
2025-03-30 06:07:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:07:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:07:26 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:07:26 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:07:26 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:07:26 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:07:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:07:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:07:26 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:07:26 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:07:26 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:07:26 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:07:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:07:26 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:07:26 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:07:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:07:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:07:27 [DEBUG] clck_gen.py:128 IND CLOCK 3162
2025-03-30 06:07:27 [DEBUG] clck_gen.py:128 IND CLOCK 3264
2025-03-30 06:07:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:07:27 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:07:27 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:07:27 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:07:27 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:07:27 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:07:27 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:07:27 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:07:27 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:07:27 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:07:27 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:07:27 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:07:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:07:27 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:07:27 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:07:27 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:07:27 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:07:28 [DEBUG] clck_gen.py:128 IND CLOCK 3366
2025-03-30 06:07:28 [DEBUG] clck_gen.py:128 IND CLOCK 3468
2025-03-30 06:07:29 [DEBUG] clck_gen.py:128 IND CLOCK 3570
2025-03-30 06:07:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:07:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:07:29 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:07:29 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:07:29 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:07:29 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:07:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:07:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:07:29 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:07:29 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:07:29 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:07:29 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:07:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:07:29 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:07:29 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:07:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:07:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:07:29 [DEBUG] clck_gen.py:128 IND CLOCK 3672
2025-03-30 06:07:30 [DEBUG] clck_gen.py:128 IND CLOCK 3774
2025-03-30 06:07:30 [DEBUG] clck_gen.py:128 IND CLOCK 3876
2025-03-30 06:07:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:07:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:07:30 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:07:30 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:07:30 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:07:30 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:07:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:07:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:07:30 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:07:30 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:07:30 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:07:30 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:07:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:07:30 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:07:30 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:07:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:07:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:07:30 [DEBUG] clck_gen.py:128 IND CLOCK 3978
2025-03-30 06:07:31 [DEBUG] clck_gen.py:128 IND CLOCK 4080
2025-03-30 06:07:31 [DEBUG] clck_gen.py:128 IND CLOCK 4182
2025-03-30 06:07:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:07:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:07:32 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:07:32 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:07:32 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:07:32 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:07:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:07:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:07:32 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:07:32 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:07:32 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:07:32 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:07:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:07:32 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:07:32 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:07:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:07:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:07:32 [DEBUG] clck_gen.py:128 IND CLOCK 4284
2025-03-30 06:07:32 [DEBUG] clck_gen.py:128 IND CLOCK 4386
2025-03-30 06:07:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:07:33 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:07:33 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:07:33 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:07:33 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:07:33 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:07:33 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:07:33 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:07:33 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:07:33 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:07:33 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:07:33 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:07:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:07:33 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:07:33 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:07:33 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:07:33 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:07:33 [DEBUG] clck_gen.py:128 IND CLOCK 4488
2025-03-30 06:07:33 [DEBUG] clck_gen.py:128 IND CLOCK 4590
2025-03-30 06:07:34 [DEBUG] clck_gen.py:128 IND CLOCK 4692
2025-03-30 06:07:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:07:34 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:07:34 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:07:34 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:07:34 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:07:34 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:07:34 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:07:34 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:07:34 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:07:34 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:07:34 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:07:34 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:07:34 [DEBUG] clck_gen.py:128 IND CLOCK 4794
2025-03-30 06:07:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:07:34 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:07:34 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:07:34 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:07:34 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:07:35 [DEBUG] clck_gen.py:128 IND CLOCK 4896
2025-03-30 06:07:35 [DEBUG] clck_gen.py:128 IND CLOCK 4998
2025-03-30 06:07:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:07:36 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:07:36 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:07:36 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:07:36 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:07:36 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:07:36 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:07:36 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:07:36 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:07:36 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:07:36 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:07:36 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:07:36 [DEBUG] clck_gen.py:128 IND CLOCK 5100
2025-03-30 06:07:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:07:36 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:07:36 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:07:36 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:07:36 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:07:36 [DEBUG] clck_gen.py:128 IND CLOCK 5202
2025-03-30 06:07:37 [DEBUG] clck_gen.py:128 IND CLOCK 5304
2025-03-30 06:07:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:07:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:07:37 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:07:37 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:07:37 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:07:37 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:07:37 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:07:37 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:07:37 [DEBUG] clck_gen.py:128 IND CLOCK 5406
2025-03-30 06:07:37 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:07:37 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:07:37 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:07:37 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:07:37 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 06:07:37 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 06:07:37 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 06:07:42 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 06:07:42 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 06:07:42 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:07:42 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:07:42 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:07:42 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:07:42 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:07:42 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 06:07:42 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:07:42 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 06:07:42 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 06:07:42 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 06:07:42 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 06:07:42 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 06:07:42 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:07:42 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:07:42 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 06:07:42 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 06:07:42 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 06:07:42 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 06:07:42 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 06:07:42 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 06:07:42 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:07:42 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:07:42 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 06:07:42 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 06:07:42 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 06:07:42 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 06:07:42 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 06:07:42 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 06:07:42 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:07:42 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:07:42 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 06:07:42 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 06:07:42 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 06:07:42 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 06:07:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 06:07:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 06:07:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 06:07:42 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 06:07:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 06:07:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 06:07:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 06:07:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 06:07:42 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 06:07:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:07:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:07:42 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 06:07:42 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 06:07:42 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 06:07:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:07:42 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 06:07:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:07:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:07:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 06:07:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:07:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:07:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:07:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:07:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:07:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:07:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:07:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:07:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:07:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:07:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:07:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:07:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:07:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:07:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:07:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:07:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:07:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:07:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:07:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:07:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:07:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:07:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:07:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:07:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:07:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:07:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:07:42 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-03-30 06:07:43 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-03-30 06:07:43 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-03-30 06:07:43 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-03-30 06:07:43 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-03-30 06:07:43 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-03-30 06:07:43 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-03-30 06:07:43 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-03-30 06:07:43 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-03-30 06:07:43 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-03-30 06:07:43 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=0 bl=148 pwr=0
2025-03-30 06:07:43 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=1 bl=148 pwr=0
2025-03-30 06:07:43 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=2 bl=148 pwr=0
2025-03-30 06:07:43 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=3 bl=148 pwr=0
2025-03-30 06:07:43 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=4 bl=148 pwr=0
2025-03-30 06:07:43 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=5 bl=148 pwr=0
2025-03-30 06:07:43 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=6 bl=148 pwr=0
2025-03-30 06:07:43 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=7 bl=148 pwr=0
2025-03-30 06:07:43 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 06:07:43 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 06:07:43 [DEBUG] fake_trx.py:317 (BTS@172.18.26.20:5700) Recv FAKE_CI cmd
2025-03-30 06:07:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:07:43 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:07:43 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:07:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:07:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:07:43 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:07:43 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:07:43 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:07:43 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:07:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD HANDOVER
2025-03-30 06:07:43 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:07:43 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:07:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:07:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:07:43 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-03-30 06:07:43 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:07:43 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:07:43 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:07:43 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:07:43 [DEBUG] clck_gen.py:128 IND CLOCK 306
2025-03-30 06:07:44 [DEBUG] clck_gen.py:128 IND CLOCK 408
2025-03-30 06:07:44 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:07:44 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:07:44 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:07:44 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:07:44 [DEBUG] clck_gen.py:128 IND CLOCK 510
2025-03-30 06:07:45 [DEBUG] clck_gen.py:128 IND CLOCK 612
2025-03-30 06:07:45 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:07:45 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:07:45 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:07:45 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:07:45 [DEBUG] clck_gen.py:128 IND CLOCK 714
2025-03-30 06:07:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:07:46 [DEBUG] clck_gen.py:128 IND CLOCK 816
2025-03-30 06:07:46 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:07:46 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:07:46 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:07:46 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:07:46 [DEBUG] clck_gen.py:128 IND CLOCK 918
2025-03-30 06:07:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:07:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:07:46 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:07:46 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:07:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:07:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:07:46 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:07:46 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:07:46 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:07:46 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:07:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD HANDOVER
2025-03-30 06:07:46 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:07:46 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:07:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:07:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:07:47 [DEBUG] clck_gen.py:128 IND CLOCK 1020
2025-03-30 06:07:47 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:07:47 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:07:47 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:07:47 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:07:47 [DEBUG] clck_gen.py:128 IND CLOCK 1122
2025-03-30 06:07:48 [DEBUG] clck_gen.py:128 IND CLOCK 1224
2025-03-30 06:07:48 [DEBUG] clck_gen.py:128 IND CLOCK 1326
2025-03-30 06:07:49 [DEBUG] clck_gen.py:128 IND CLOCK 1428
2025-03-30 06:07:49 [DEBUG] clck_gen.py:128 IND CLOCK 1530
2025-03-30 06:07:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:07:50 [DEBUG] clck_gen.py:128 IND CLOCK 1632
2025-03-30 06:07:50 [DEBUG] clck_gen.py:128 IND CLOCK 1734
2025-03-30 06:07:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:07:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:07:50 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:07:50 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:07:50 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:07:50 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:07:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:07:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:07:50 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:07:50 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:07:50 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:07:50 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:07:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD HANDOVER
2025-03-30 06:07:50 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:07:50 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:07:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:07:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:07:51 [DEBUG] clck_gen.py:128 IND CLOCK 1836
2025-03-30 06:07:51 [DEBUG] clck_gen.py:128 IND CLOCK 1938
2025-03-30 06:07:52 [DEBUG] clck_gen.py:128 IND CLOCK 2040
2025-03-30 06:07:52 [DEBUG] clck_gen.py:128 IND CLOCK 2142
2025-03-30 06:07:52 [DEBUG] clck_gen.py:128 IND CLOCK 2244
2025-03-30 06:07:53 [DEBUG] clck_gen.py:128 IND CLOCK 2346
2025-03-30 06:07:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:07:53 [DEBUG] clck_gen.py:128 IND CLOCK 2448
2025-03-30 06:07:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:07:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:07:54 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:07:54 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:07:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:07:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:07:54 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:07:54 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:07:54 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:07:54 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:07:54 [DEBUG] clck_gen.py:128 IND CLOCK 2550
2025-03-30 06:07:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD HANDOVER
2025-03-30 06:07:54 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:07:54 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:07:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:07:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:07:54 [DEBUG] clck_gen.py:128 IND CLOCK 2652
2025-03-30 06:07:55 [DEBUG] clck_gen.py:128 IND CLOCK 2754
2025-03-30 06:07:55 [DEBUG] clck_gen.py:128 IND CLOCK 2856
2025-03-30 06:07:56 [DEBUG] clck_gen.py:128 IND CLOCK 2958
2025-03-30 06:07:56 [DEBUG] clck_gen.py:128 IND CLOCK 3060
2025-03-30 06:07:57 [DEBUG] clck_gen.py:128 IND CLOCK 3162
2025-03-30 06:07:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:07:57 [DEBUG] clck_gen.py:128 IND CLOCK 3264
2025-03-30 06:07:58 [DEBUG] clck_gen.py:128 IND CLOCK 3366
2025-03-30 06:07:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:07:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:07:58 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:07:58 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:07:58 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:07:58 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:07:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:07:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:07:58 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:07:58 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:07:58 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:07:58 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:07:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD HANDOVER
2025-03-30 06:07:58 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:07:58 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:07:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:07:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:07:58 [DEBUG] clck_gen.py:128 IND CLOCK 3468
2025-03-30 06:07:59 [DEBUG] clck_gen.py:128 IND CLOCK 3570
2025-03-30 06:07:59 [DEBUG] clck_gen.py:128 IND CLOCK 3672
2025-03-30 06:08:00 [DEBUG] clck_gen.py:128 IND CLOCK 3774
2025-03-30 06:08:00 [DEBUG] clck_gen.py:128 IND CLOCK 3876
2025-03-30 06:08:00 [DEBUG] clck_gen.py:128 IND CLOCK 3978
2025-03-30 06:08:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:08:01 [DEBUG] clck_gen.py:128 IND CLOCK 4080
2025-03-30 06:08:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:08:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:08:01 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:08:01 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:08:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:08:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:08:01 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:08:01 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:08:01 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:08:01 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:08:01 [DEBUG] clck_gen.py:128 IND CLOCK 4182
2025-03-30 06:08:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD HANDOVER
2025-03-30 06:08:01 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:08:01 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:08:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:08:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:08:02 [DEBUG] clck_gen.py:128 IND CLOCK 4284
2025-03-30 06:08:02 [DEBUG] clck_gen.py:128 IND CLOCK 4386
2025-03-30 06:08:03 [DEBUG] clck_gen.py:128 IND CLOCK 4488
2025-03-30 06:08:03 [DEBUG] clck_gen.py:128 IND CLOCK 4590
2025-03-30 06:08:04 [DEBUG] clck_gen.py:128 IND CLOCK 4692
2025-03-30 06:08:04 [DEBUG] clck_gen.py:128 IND CLOCK 4794
2025-03-30 06:08:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:08:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:08:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:08:05 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:08:05 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:08:05 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:08:05 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:08:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:08:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:08:05 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:08:05 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:08:05 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:08:05 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:08:05 [DEBUG] clck_gen.py:128 IND CLOCK 4896
2025-03-30 06:08:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD HANDOVER
2025-03-30 06:08:05 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:08:05 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:08:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:08:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:08:05 [DEBUG] clck_gen.py:128 IND CLOCK 4998
2025-03-30 06:08:06 [DEBUG] clck_gen.py:128 IND CLOCK 5100
2025-03-30 06:08:06 [DEBUG] clck_gen.py:128 IND CLOCK 5202
2025-03-30 06:08:07 [DEBUG] clck_gen.py:128 IND CLOCK 5304
2025-03-30 06:08:07 [DEBUG] clck_gen.py:128 IND CLOCK 5406
2025-03-30 06:08:08 [DEBUG] clck_gen.py:128 IND CLOCK 5508
2025-03-30 06:08:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:08:08 [DEBUG] clck_gen.py:128 IND CLOCK 5610
2025-03-30 06:08:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:08:08 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:08:08 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:08:08 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:08:08 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:08:08 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:08:08 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:08:08 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:08:08 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:08:08 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:08:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD HANDOVER
2025-03-30 06:08:08 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:08:08 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:08:08 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:08:08 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:08:08 [DEBUG] clck_gen.py:128 IND CLOCK 5712
2025-03-30 06:08:09 [DEBUG] clck_gen.py:128 IND CLOCK 5814
2025-03-30 06:08:09 [DEBUG] clck_gen.py:128 IND CLOCK 5916
2025-03-30 06:08:10 [DEBUG] clck_gen.py:128 IND CLOCK 6018
2025-03-30 06:08:10 [DEBUG] clck_gen.py:128 IND CLOCK 6120
2025-03-30 06:08:11 [DEBUG] clck_gen.py:128 IND CLOCK 6222
2025-03-30 06:08:11 [DEBUG] clck_gen.py:128 IND CLOCK 6324
2025-03-30 06:08:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:08:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:08:12 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:08:12 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:08:12 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:08:12 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:08:12 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:08:12 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:08:12 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:08:12 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:08:12 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:08:12 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:08:12 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:08:12 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 06:08:12 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 06:08:12 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 06:08:12 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=6417 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:08:12 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=6417 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:08:12 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=6417 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:08:12 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=6417 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:08:12 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=6417 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:08:12 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=6417 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:08:12 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=6417 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:08:12 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=6417 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:08:17 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 06:08:17 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 06:08:17 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:08:17 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:08:17 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:08:17 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:08:17 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:08:17 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 06:08:17 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:08:17 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 06:08:17 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 06:08:17 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 06:08:17 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 06:08:17 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 06:08:17 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:08:17 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:08:17 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 06:08:17 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 06:08:17 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 06:08:17 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 06:08:17 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 06:08:17 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 06:08:17 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:08:17 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:08:17 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 06:08:17 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 06:08:17 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 06:08:17 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 06:08:17 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 06:08:17 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 06:08:17 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:08:17 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:08:17 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 06:08:17 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 06:08:17 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 06:08:17 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 06:08:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 06:08:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 06:08:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 06:08:17 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 06:08:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 06:08:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 06:08:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 06:08:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:08:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 06:08:17 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 06:08:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:08:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:08:17 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 06:08:17 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 06:08:17 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 06:08:17 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 06:08:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:08:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:08:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:08:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 06:08:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:08:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:08:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:08:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:08:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:08:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:08:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:08:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:08:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:08:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:08:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:08:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:08:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:08:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:08:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:08:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:08:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:08:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:08:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:08:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:08:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:08:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:08:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:08:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:08:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:08:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:08:17 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-03-30 06:08:17 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-03-30 06:08:17 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-03-30 06:08:17 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-03-30 06:08:17 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-03-30 06:08:17 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-03-30 06:08:17 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-03-30 06:08:17 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-03-30 06:08:17 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-03-30 06:08:17 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-03-30 06:08:17 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=0 bl=148 pwr=0
2025-03-30 06:08:17 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=1 bl=148 pwr=0
2025-03-30 06:08:17 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=2 bl=148 pwr=0
2025-03-30 06:08:17 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=3 bl=148 pwr=0
2025-03-30 06:08:17 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=4 bl=148 pwr=0
2025-03-30 06:08:17 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=5 bl=148 pwr=0
2025-03-30 06:08:17 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=6 bl=148 pwr=0
2025-03-30 06:08:17 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=7 bl=148 pwr=0
2025-03-30 06:08:17 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 06:08:17 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 06:08:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:08:17 [DEBUG] fake_trx.py:317 (BTS@172.18.26.20:5700) Recv FAKE_CI cmd
2025-03-30 06:08:17 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:08:17 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:08:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:08:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:08:17 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:08:17 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:08:17 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:08:17 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:08:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD HANDOVER
2025-03-30 06:08:17 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:08:17 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:08:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:08:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:08:18 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-03-30 06:08:18 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:08:18 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:08:18 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:08:18 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:08:18 [DEBUG] clck_gen.py:128 IND CLOCK 306
2025-03-30 06:08:19 [DEBUG] clck_gen.py:128 IND CLOCK 408
2025-03-30 06:08:19 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:08:19 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:08:19 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:08:19 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:08:19 [DEBUG] clck_gen.py:128 IND CLOCK 510
2025-03-30 06:08:20 [DEBUG] clck_gen.py:128 IND CLOCK 612
2025-03-30 06:08:20 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:08:20 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:08:20 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:08:20 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:08:20 [DEBUG] clck_gen.py:128 IND CLOCK 714
2025-03-30 06:08:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:08:20 [DEBUG] clck_gen.py:128 IND CLOCK 816
2025-03-30 06:08:21 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:08:21 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:08:21 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:08:21 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:08:21 [DEBUG] clck_gen.py:128 IND CLOCK 918
2025-03-30 06:08:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:08:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:08:21 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:08:21 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:08:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:08:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:08:21 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:08:21 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:08:21 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:08:21 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:08:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD HANDOVER
2025-03-30 06:08:21 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:08:21 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:08:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:08:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:08:21 [DEBUG] clck_gen.py:128 IND CLOCK 1020
2025-03-30 06:08:22 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:08:22 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:08:22 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:08:22 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:08:22 [DEBUG] clck_gen.py:128 IND CLOCK 1122
2025-03-30 06:08:22 [DEBUG] clck_gen.py:128 IND CLOCK 1224
2025-03-30 06:08:23 [DEBUG] clck_gen.py:128 IND CLOCK 1326
2025-03-30 06:08:23 [DEBUG] clck_gen.py:128 IND CLOCK 1428
2025-03-30 06:08:24 [DEBUG] clck_gen.py:128 IND CLOCK 1530
2025-03-30 06:08:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:08:24 [DEBUG] clck_gen.py:128 IND CLOCK 1632
2025-03-30 06:08:25 [DEBUG] clck_gen.py:128 IND CLOCK 1734
2025-03-30 06:08:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:08:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:08:25 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:08:25 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:08:25 [WARNING] transceiver.py:287 (MS@172.18.26.22:6700) RX TRXD message (fn=1770 tn=3 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:08:25 [WARNING] transceiver.py:287 (MS@172.18.26.22:6700) RX TRXD message (fn=1770 tn=4 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:08:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:08:25 [WARNING] transceiver.py:287 (MS@172.18.26.22:6700) RX TRXD message (fn=1770 tn=5 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:08:25 [WARNING] transceiver.py:287 (MS@172.18.26.22:6700) RX TRXD message (fn=1770 tn=6 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:08:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:08:25 [WARNING] transceiver.py:287 (MS@172.18.26.22:6700) RX TRXD message (fn=1770 tn=7 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:08:25 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:08:25 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:08:25 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:08:25 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:08:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD HANDOVER
2025-03-30 06:08:25 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:08:25 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:08:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:08:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:08:25 [DEBUG] clck_gen.py:128 IND CLOCK 1836
2025-03-30 06:08:26 [DEBUG] clck_gen.py:128 IND CLOCK 1938
2025-03-30 06:08:26 [DEBUG] clck_gen.py:128 IND CLOCK 2040
2025-03-30 06:08:27 [DEBUG] clck_gen.py:128 IND CLOCK 2142
2025-03-30 06:08:27 [DEBUG] clck_gen.py:128 IND CLOCK 2244
2025-03-30 06:08:28 [DEBUG] clck_gen.py:128 IND CLOCK 2346
2025-03-30 06:08:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:08:28 [DEBUG] clck_gen.py:128 IND CLOCK 2448
2025-03-30 06:08:28 [DEBUG] clck_gen.py:128 IND CLOCK 2550
2025-03-30 06:08:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:08:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:08:29 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:08:29 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:08:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:08:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:08:29 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:08:29 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:08:29 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:08:29 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:08:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD HANDOVER
2025-03-30 06:08:29 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:08:29 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:08:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:08:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:08:29 [DEBUG] clck_gen.py:128 IND CLOCK 2652
2025-03-30 06:08:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:08:29 [DEBUG] clck_gen.py:128 IND CLOCK 2754
2025-03-30 06:08:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:08:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:08:30 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:08:30 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:08:30 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:08:30 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:08:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:08:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:08:30 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:08:30 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:08:30 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:08:30 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:08:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD HANDOVER
2025-03-30 06:08:30 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:08:30 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:08:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:08:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:08:30 [DEBUG] clck_gen.py:128 IND CLOCK 2856
2025-03-30 06:08:30 [DEBUG] clck_gen.py:128 IND CLOCK 2958
2025-03-30 06:08:31 [DEBUG] clck_gen.py:128 IND CLOCK 3060
2025-03-30 06:08:31 [DEBUG] clck_gen.py:128 IND CLOCK 3162
2025-03-30 06:08:32 [DEBUG] clck_gen.py:128 IND CLOCK 3264
2025-03-30 06:08:32 [DEBUG] clck_gen.py:128 IND CLOCK 3366
2025-03-30 06:08:33 [DEBUG] clck_gen.py:128 IND CLOCK 3468
2025-03-30 06:08:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:08:33 [DEBUG] clck_gen.py:128 IND CLOCK 3570
2025-03-30 06:08:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:08:33 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:08:33 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:08:33 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:08:33 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:08:33 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:08:33 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:08:33 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:08:33 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:08:33 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:08:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD HANDOVER
2025-03-30 06:08:33 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:08:33 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:08:33 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:08:33 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:08:34 [DEBUG] clck_gen.py:128 IND CLOCK 3672
2025-03-30 06:08:34 [DEBUG] clck_gen.py:128 IND CLOCK 3774
2025-03-30 06:08:35 [DEBUG] clck_gen.py:128 IND CLOCK 3876
2025-03-30 06:08:35 [DEBUG] clck_gen.py:128 IND CLOCK 3978
2025-03-30 06:08:36 [DEBUG] clck_gen.py:128 IND CLOCK 4080
2025-03-30 06:08:36 [DEBUG] clck_gen.py:128 IND CLOCK 4182
2025-03-30 06:08:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:08:36 [DEBUG] clck_gen.py:128 IND CLOCK 4284
2025-03-30 06:08:37 [DEBUG] clck_gen.py:128 IND CLOCK 4386
2025-03-30 06:08:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:08:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:08:37 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:08:37 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:08:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:08:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:08:37 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:08:37 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:08:37 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:08:37 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:08:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD HANDOVER
2025-03-30 06:08:37 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:08:37 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:08:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:08:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:08:37 [DEBUG] clck_gen.py:128 IND CLOCK 4488
2025-03-30 06:08:38 [DEBUG] clck_gen.py:128 IND CLOCK 4590
2025-03-30 06:08:38 [DEBUG] clck_gen.py:128 IND CLOCK 4692
2025-03-30 06:08:39 [DEBUG] clck_gen.py:128 IND CLOCK 4794
2025-03-30 06:08:39 [DEBUG] clck_gen.py:128 IND CLOCK 4896
2025-03-30 06:08:40 [DEBUG] clck_gen.py:128 IND CLOCK 4998
2025-03-30 06:08:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:08:40 [DEBUG] clck_gen.py:128 IND CLOCK 5100
2025-03-30 06:08:41 [DEBUG] clck_gen.py:128 IND CLOCK 5202
2025-03-30 06:08:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:08:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:08:41 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:08:41 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:08:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:08:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:08:41 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:08:41 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:08:41 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:08:41 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:08:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD HANDOVER
2025-03-30 06:08:41 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:08:41 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:08:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:08:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:08:41 [DEBUG] clck_gen.py:128 IND CLOCK 5304
2025-03-30 06:08:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:08:42 [DEBUG] clck_gen.py:128 IND CLOCK 5406
2025-03-30 06:08:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:08:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:08:42 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:08:42 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:08:42 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:08:42 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:08:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:08:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:08:42 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:08:42 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:08:42 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:08:42 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:08:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD HANDOVER
2025-03-30 06:08:42 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:08:42 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:08:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:08:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:08:42 [DEBUG] clck_gen.py:128 IND CLOCK 5508
2025-03-30 06:08:43 [DEBUG] clck_gen.py:128 IND CLOCK 5610
2025-03-30 06:08:43 [DEBUG] clck_gen.py:128 IND CLOCK 5712
2025-03-30 06:08:44 [DEBUG] clck_gen.py:128 IND CLOCK 5814
2025-03-30 06:08:44 [DEBUG] clck_gen.py:128 IND CLOCK 5916
2025-03-30 06:08:44 [DEBUG] clck_gen.py:128 IND CLOCK 6018
2025-03-30 06:08:45 [DEBUG] clck_gen.py:128 IND CLOCK 6120
2025-03-30 06:08:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:08:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:08:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:08:45 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:08:45 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:08:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:08:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:08:45 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:08:45 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:08:45 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:08:45 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:08:45 [DEBUG] clck_gen.py:128 IND CLOCK 6222
2025-03-30 06:08:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD HANDOVER
2025-03-30 06:08:45 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:08:45 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:08:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:08:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:08:46 [DEBUG] clck_gen.py:128 IND CLOCK 6324
2025-03-30 06:08:46 [DEBUG] clck_gen.py:128 IND CLOCK 6426
2025-03-30 06:08:47 [DEBUG] clck_gen.py:128 IND CLOCK 6528
2025-03-30 06:08:47 [DEBUG] clck_gen.py:128 IND CLOCK 6630
2025-03-30 06:08:48 [DEBUG] clck_gen.py:128 IND CLOCK 6732
2025-03-30 06:08:48 [DEBUG] clck_gen.py:128 IND CLOCK 6834
2025-03-30 06:08:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:08:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:08:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:08:49 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:08:49 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:08:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:08:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:08:49 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:08:49 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:08:49 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:08:49 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:08:49 [DEBUG] clck_gen.py:128 IND CLOCK 6936
2025-03-30 06:08:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD HANDOVER
2025-03-30 06:08:49 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:08:49 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:08:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:08:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:08:49 [DEBUG] clck_gen.py:128 IND CLOCK 7038
2025-03-30 06:08:50 [DEBUG] clck_gen.py:128 IND CLOCK 7140
2025-03-30 06:08:50 [DEBUG] clck_gen.py:128 IND CLOCK 7242
2025-03-30 06:08:51 [DEBUG] clck_gen.py:128 IND CLOCK 7344
2025-03-30 06:08:51 [DEBUG] clck_gen.py:128 IND CLOCK 7446
2025-03-30 06:08:52 [DEBUG] clck_gen.py:128 IND CLOCK 7548
2025-03-30 06:08:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:08:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:08:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:08:52 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:08:52 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:08:52 [WARNING] transceiver.py:287 (MS@172.18.26.22:6700) RX TRXD message (fn=7647 tn=5 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:08:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:08:52 [WARNING] transceiver.py:287 (MS@172.18.26.22:6700) RX TRXD message (fn=7647 tn=6 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:08:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:08:52 [WARNING] transceiver.py:287 (MS@172.18.26.22:6700) RX TRXD message (fn=7647 tn=7 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:08:52 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:08:52 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:08:52 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:08:52 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:08:52 [DEBUG] clck_gen.py:128 IND CLOCK 7650
2025-03-30 06:08:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD HANDOVER
2025-03-30 06:08:52 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:08:52 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:08:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:08:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:08:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:08:52 [DEBUG] clck_gen.py:128 IND CLOCK 7752
2025-03-30 06:08:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:08:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:08:53 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:08:53 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:08:53 [DEBUG] clck_gen.py:128 IND CLOCK 7854
2025-03-30 06:08:53 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:08:53 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:08:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:08:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:08:53 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:08:53 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:08:53 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:08:53 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:08:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD HANDOVER
2025-03-30 06:08:53 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:08:53 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:08:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:08:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:08:53 [DEBUG] clck_gen.py:128 IND CLOCK 7956
2025-03-30 06:08:54 [DEBUG] clck_gen.py:128 IND CLOCK 8058
2025-03-30 06:08:54 [DEBUG] clck_gen.py:128 IND CLOCK 8160
2025-03-30 06:08:55 [DEBUG] clck_gen.py:128 IND CLOCK 8262
2025-03-30 06:08:55 [DEBUG] clck_gen.py:128 IND CLOCK 8364
2025-03-30 06:08:56 [DEBUG] clck_gen.py:128 IND CLOCK 8466
2025-03-30 06:08:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:08:56 [DEBUG] clck_gen.py:128 IND CLOCK 8568
2025-03-30 06:08:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:08:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:08:57 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:08:57 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:08:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:08:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:08:57 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:08:57 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:08:57 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:08:57 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:08:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD HANDOVER
2025-03-30 06:08:57 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:08:57 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:08:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:08:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:08:57 [DEBUG] clck_gen.py:128 IND CLOCK 8670
2025-03-30 06:08:57 [DEBUG] clck_gen.py:128 IND CLOCK 8772
2025-03-30 06:08:58 [DEBUG] clck_gen.py:128 IND CLOCK 8874
2025-03-30 06:08:58 [DEBUG] clck_gen.py:128 IND CLOCK 8976
2025-03-30 06:08:59 [DEBUG] clck_gen.py:128 IND CLOCK 9078
2025-03-30 06:08:59 [DEBUG] clck_gen.py:128 IND CLOCK 9180
2025-03-30 06:09:00 [DEBUG] clck_gen.py:128 IND CLOCK 9282
2025-03-30 06:09:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:09:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:09:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:09:00 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:09:00 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:09:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:09:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:09:00 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:09:00 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:09:00 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:09:00 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:09:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD HANDOVER
2025-03-30 06:09:00 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:09:00 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:09:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:09:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:09:00 [DEBUG] clck_gen.py:128 IND CLOCK 9384
2025-03-30 06:09:01 [DEBUG] clck_gen.py:128 IND CLOCK 9486
2025-03-30 06:09:01 [DEBUG] clck_gen.py:128 IND CLOCK 9588
2025-03-30 06:09:01 [DEBUG] clck_gen.py:128 IND CLOCK 9690
2025-03-30 06:09:02 [DEBUG] clck_gen.py:128 IND CLOCK 9792
2025-03-30 06:09:02 [DEBUG] clck_gen.py:128 IND CLOCK 9894
2025-03-30 06:09:03 [DEBUG] clck_gen.py:128 IND CLOCK 9996
2025-03-30 06:09:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:09:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:09:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:09:03 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:09:03 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:09:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:09:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:09:03 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:09:03 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:09:03 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:09:03 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:09:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD HANDOVER
2025-03-30 06:09:03 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:09:03 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:09:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:09:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:09:03 [DEBUG] clck_gen.py:128 IND CLOCK 10098
2025-03-30 06:09:04 [DEBUG] clck_gen.py:128 IND CLOCK 10200
2025-03-30 06:09:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:09:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:09:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:09:04 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:09:04 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:09:04 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:09:04 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:09:04 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:09:04 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:09:04 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:09:04 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:09:04 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:09:04 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:09:04 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 06:09:04 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 06:09:04 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 06:09:09 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 06:09:09 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 06:09:09 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:09:09 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:09:09 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:09:09 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:09:09 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:09:09 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 06:09:09 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:09:09 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 06:09:09 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 06:09:09 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 06:09:09 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 06:09:09 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 06:09:09 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:09:09 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:09:09 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 06:09:09 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 06:09:09 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 06:09:09 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 06:09:09 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 06:09:09 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 06:09:09 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:09:09 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:09:09 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 06:09:09 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 06:09:09 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 06:09:09 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 06:09:09 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 06:09:09 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 06:09:09 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:09:09 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:09:09 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 06:09:09 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 06:09:09 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 06:09:09 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 06:09:09 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 06:09:09 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 06:09:09 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 06:09:09 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 06:09:09 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 06:09:09 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 06:09:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 06:09:09 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:09:09 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 06:09:09 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 06:09:09 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:09:09 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:09:09 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:09:09 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 06:09:09 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 06:09:09 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 06:09:09 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:09:09 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 06:09:09 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:09:09 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:09:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 06:09:09 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:09:09 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:09:09 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:09:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:09:09 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:09:09 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:09:09 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:09:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:09:09 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:09:09 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:09:09 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:09:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:09:09 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:09:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:09:09 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:09:09 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:09:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:09:09 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:09:09 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:09:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:09:09 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:09:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:09:09 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:09:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:09:09 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:09:09 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-03-30 06:09:10 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-03-30 06:09:10 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-03-30 06:09:10 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-03-30 06:09:10 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-03-30 06:09:10 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-03-30 06:09:10 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-03-30 06:09:10 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-03-30 06:09:10 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-03-30 06:09:10 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-03-30 06:09:10 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=0 bl=148 pwr=0
2025-03-30 06:09:10 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=1 bl=148 pwr=0
2025-03-30 06:09:10 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=2 bl=148 pwr=0
2025-03-30 06:09:10 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=3 bl=148 pwr=0
2025-03-30 06:09:10 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=4 bl=148 pwr=0
2025-03-30 06:09:10 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=5 bl=148 pwr=0
2025-03-30 06:09:10 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=6 bl=148 pwr=0
2025-03-30 06:09:10 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=7 bl=148 pwr=0
2025-03-30 06:09:10 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 06:09:10 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 06:09:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:09:10 [DEBUG] fake_trx.py:317 (BTS@172.18.26.20:5700) Recv FAKE_CI cmd
2025-03-30 06:09:10 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:09:10 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:09:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:09:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:09:10 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:09:10 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:09:10 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:09:10 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:09:10 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-03-30 06:09:10 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:09:10 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:09:10 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:09:10 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:09:11 [DEBUG] clck_gen.py:128 IND CLOCK 306
2025-03-30 06:09:11 [DEBUG] clck_gen.py:128 IND CLOCK 408
2025-03-30 06:09:11 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:09:11 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:09:11 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:09:11 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:09:12 [DEBUG] clck_gen.py:128 IND CLOCK 510
2025-03-30 06:09:12 [DEBUG] clck_gen.py:128 IND CLOCK 612
2025-03-30 06:09:12 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:09:12 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:09:12 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:09:12 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:09:13 [DEBUG] clck_gen.py:128 IND CLOCK 714
2025-03-30 06:09:13 [WARNING] transceiver.py:330 (MS@172.18.26.22:6700) Stale TRXD message (fn=761): fn=759 tn=0 bl=148 pwr=0
2025-03-30 06:09:13 [WARNING] transceiver.py:330 (MS@172.18.26.22:6700) Stale TRXD message (fn=761): fn=759 tn=1 pwr=0
2025-03-30 06:09:13 [WARNING] transceiver.py:330 (MS@172.18.26.22:6700) Stale TRXD message (fn=761): fn=759 tn=2 pwr=0
2025-03-30 06:09:13 [WARNING] transceiver.py:330 (MS@172.18.26.22:6700) Stale TRXD message (fn=761): fn=759 tn=3 pwr=0
2025-03-30 06:09:13 [WARNING] transceiver.py:330 (MS@172.18.26.22:6700) Stale TRXD message (fn=761): fn=759 tn=4 pwr=0
2025-03-30 06:09:13 [WARNING] transceiver.py:330 (MS@172.18.26.22:6700) Stale TRXD message (fn=761): fn=759 tn=5 pwr=0
2025-03-30 06:09:13 [WARNING] transceiver.py:330 (MS@172.18.26.22:6700) Stale TRXD message (fn=761): fn=759 tn=6 pwr=0
2025-03-30 06:09:13 [WARNING] transceiver.py:330 (MS@172.18.26.22:6700) Stale TRXD message (fn=761): fn=759 tn=7 pwr=0
2025-03-30 06:09:13 [WARNING] transceiver.py:330 (MS@172.18.26.22:6700) Stale TRXD message (fn=761): fn=760 tn=0 pwr=0
2025-03-30 06:09:13 [WARNING] transceiver.py:330 (MS@172.18.26.22:6700) Stale TRXD message (fn=761): fn=760 tn=1 pwr=0
2025-03-30 06:09:13 [WARNING] transceiver.py:330 (MS@172.18.26.22:6700) Stale TRXD message (fn=761): fn=760 tn=2 pwr=0
2025-03-30 06:09:13 [WARNING] transceiver.py:330 (MS@172.18.26.22:6700) Stale TRXD message (fn=761): fn=760 tn=3 pwr=0
2025-03-30 06:09:13 [WARNING] transceiver.py:330 (MS@172.18.26.22:6700) Stale TRXD message (fn=761): fn=760 tn=4 pwr=0
2025-03-30 06:09:13 [WARNING] transceiver.py:330 (MS@172.18.26.22:6700) Stale TRXD message (fn=761): fn=760 tn=5 pwr=0
2025-03-30 06:09:13 [WARNING] transceiver.py:330 (MS@172.18.26.22:6700) Stale TRXD message (fn=761): fn=760 tn=6 pwr=0
2025-03-30 06:09:13 [WARNING] transceiver.py:330 (MS@172.18.26.22:6700) Stale TRXD message (fn=761): fn=760 tn=7 pwr=0
2025-03-30 06:09:13 [DEBUG] clck_gen.py:128 IND CLOCK 816
2025-03-30 06:09:13 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:09:13 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:09:13 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:09:13 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:09:13 [DEBUG] clck_gen.py:128 IND CLOCK 918
2025-03-30 06:09:14 [DEBUG] clck_gen.py:128 IND CLOCK 1020
2025-03-30 06:09:14 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:09:14 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:09:14 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:09:14 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:09:14 [DEBUG] clck_gen.py:128 IND CLOCK 1122
2025-03-30 06:09:15 [DEBUG] clck_gen.py:128 IND CLOCK 1224
2025-03-30 06:09:15 [DEBUG] clck_gen.py:128 IND CLOCK 1326
2025-03-30 06:09:16 [DEBUG] clck_gen.py:128 IND CLOCK 1428
2025-03-30 06:09:16 [DEBUG] clck_gen.py:128 IND CLOCK 1530
2025-03-30 06:09:17 [DEBUG] clck_gen.py:128 IND CLOCK 1632
2025-03-30 06:09:17 [DEBUG] clck_gen.py:128 IND CLOCK 1734
2025-03-30 06:09:18 [DEBUG] clck_gen.py:128 IND CLOCK 1836
2025-03-30 06:09:18 [DEBUG] clck_gen.py:128 IND CLOCK 1938
2025-03-30 06:09:19 [DEBUG] clck_gen.py:128 IND CLOCK 2040
2025-03-30 06:09:19 [DEBUG] clck_gen.py:128 IND CLOCK 2142
2025-03-30 06:09:20 [DEBUG] clck_gen.py:128 IND CLOCK 2244
2025-03-30 06:09:20 [DEBUG] clck_gen.py:128 IND CLOCK 2346
2025-03-30 06:09:21 [DEBUG] clck_gen.py:128 IND CLOCK 2448
2025-03-30 06:09:21 [DEBUG] clck_gen.py:128 IND CLOCK 2550
2025-03-30 06:09:21 [DEBUG] clck_gen.py:128 IND CLOCK 2652
2025-03-30 06:09:22 [DEBUG] clck_gen.py:128 IND CLOCK 2754
2025-03-30 06:09:22 [DEBUG] clck_gen.py:128 IND CLOCK 2856
2025-03-30 06:09:23 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=2928): ver=1 fn=2927 tn=0 bl=148 pwr=0
2025-03-30 06:09:23 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=2928): ver=1 fn=2927 tn=1 bl=148 pwr=0
2025-03-30 06:09:23 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=2928): ver=1 fn=2927 tn=2 bl=148 pwr=0
2025-03-30 06:09:23 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=2928): ver=1 fn=2927 tn=3 bl=148 pwr=0
2025-03-30 06:09:23 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=2928): ver=1 fn=2927 tn=4 bl=148 pwr=0
2025-03-30 06:09:23 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=2928): ver=1 fn=2927 tn=5 bl=148 pwr=0
2025-03-30 06:09:23 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=2928): ver=1 fn=2927 tn=6 bl=148 pwr=0
2025-03-30 06:09:23 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=2928): ver=1 fn=2927 tn=7 bl=148 pwr=0
2025-03-30 06:09:23 [DEBUG] clck_gen.py:128 IND CLOCK 2958
2025-03-30 06:09:23 [DEBUG] clck_gen.py:128 IND CLOCK 3060
2025-03-30 06:09:24 [DEBUG] clck_gen.py:128 IND CLOCK 3162
2025-03-30 06:09:24 [DEBUG] clck_gen.py:128 IND CLOCK 3264
2025-03-30 06:09:25 [DEBUG] clck_gen.py:128 IND CLOCK 3366
2025-03-30 06:09:25 [DEBUG] clck_gen.py:128 IND CLOCK 3468
2025-03-30 06:09:26 [DEBUG] clck_gen.py:128 IND CLOCK 3570
2025-03-30 06:09:26 [DEBUG] clck_gen.py:128 IND CLOCK 3672
2025-03-30 06:09:27 [DEBUG] clck_gen.py:128 IND CLOCK 3774
2025-03-30 06:09:27 [DEBUG] clck_gen.py:128 IND CLOCK 3876
2025-03-30 06:09:28 [DEBUG] clck_gen.py:128 IND CLOCK 3978
2025-03-30 06:09:28 [DEBUG] clck_gen.py:128 IND CLOCK 4080
2025-03-30 06:09:29 [DEBUG] clck_gen.py:128 IND CLOCK 4182
2025-03-30 06:09:29 [DEBUG] clck_gen.py:128 IND CLOCK 4284
2025-03-30 06:09:29 [DEBUG] clck_gen.py:128 IND CLOCK 4386
2025-03-30 06:09:30 [DEBUG] clck_gen.py:128 IND CLOCK 4488
2025-03-30 06:09:30 [DEBUG] clck_gen.py:128 IND CLOCK 4590
2025-03-30 06:09:31 [DEBUG] clck_gen.py:128 IND CLOCK 4692
2025-03-30 06:09:31 [DEBUG] clck_gen.py:128 IND CLOCK 4794
2025-03-30 06:09:32 [DEBUG] clck_gen.py:128 IND CLOCK 4896
2025-03-30 06:09:32 [DEBUG] clck_gen.py:128 IND CLOCK 4998
2025-03-30 06:09:33 [WARNING] transceiver.py:330 (MS@172.18.26.22:6700) Stale TRXD message (fn=5096): fn=5094 tn=0 bl=148 pwr=0
2025-03-30 06:09:33 [WARNING] transceiver.py:330 (MS@172.18.26.22:6700) Stale TRXD message (fn=5096): fn=5094 tn=1 pwr=0
2025-03-30 06:09:33 [WARNING] transceiver.py:330 (MS@172.18.26.22:6700) Stale TRXD message (fn=5096): fn=5094 tn=2 pwr=0
2025-03-30 06:09:33 [WARNING] transceiver.py:330 (MS@172.18.26.22:6700) Stale TRXD message (fn=5096): fn=5094 tn=3 pwr=0
2025-03-30 06:09:33 [WARNING] transceiver.py:330 (MS@172.18.26.22:6700) Stale TRXD message (fn=5096): fn=5094 tn=4 pwr=0
2025-03-30 06:09:33 [WARNING] transceiver.py:330 (MS@172.18.26.22:6700) Stale TRXD message (fn=5096): fn=5094 tn=5 pwr=0
2025-03-30 06:09:33 [WARNING] transceiver.py:330 (MS@172.18.26.22:6700) Stale TRXD message (fn=5096): fn=5094 tn=6 pwr=0
2025-03-30 06:09:33 [WARNING] transceiver.py:330 (MS@172.18.26.22:6700) Stale TRXD message (fn=5096): fn=5094 tn=7 pwr=0
2025-03-30 06:09:33 [WARNING] transceiver.py:330 (MS@172.18.26.22:6700) Stale TRXD message (fn=5096): fn=5095 tn=0 pwr=0
2025-03-30 06:09:33 [WARNING] transceiver.py:330 (MS@172.18.26.22:6700) Stale TRXD message (fn=5096): fn=5095 tn=1 pwr=0
2025-03-30 06:09:33 [WARNING] transceiver.py:330 (MS@172.18.26.22:6700) Stale TRXD message (fn=5096): fn=5095 tn=2 pwr=0
2025-03-30 06:09:33 [WARNING] transceiver.py:330 (MS@172.18.26.22:6700) Stale TRXD message (fn=5096): fn=5095 tn=3 pwr=0
2025-03-30 06:09:33 [WARNING] transceiver.py:330 (MS@172.18.26.22:6700) Stale TRXD message (fn=5096): fn=5095 tn=4 pwr=0
2025-03-30 06:09:33 [WARNING] transceiver.py:330 (MS@172.18.26.22:6700) Stale TRXD message (fn=5096): fn=5095 tn=5 pwr=0
2025-03-30 06:09:33 [WARNING] transceiver.py:330 (MS@172.18.26.22:6700) Stale TRXD message (fn=5096): fn=5095 tn=6 pwr=0
2025-03-30 06:09:33 [WARNING] transceiver.py:330 (MS@172.18.26.22:6700) Stale TRXD message (fn=5096): fn=5095 tn=7 pwr=0
2025-03-30 06:09:33 [DEBUG] clck_gen.py:128 IND CLOCK 5100
2025-03-30 06:09:33 [DEBUG] clck_gen.py:128 IND CLOCK 5202
2025-03-30 06:09:34 [DEBUG] clck_gen.py:128 IND CLOCK 5304
2025-03-30 06:09:34 [DEBUG] clck_gen.py:128 IND CLOCK 5406
2025-03-30 06:09:35 [DEBUG] clck_gen.py:128 IND CLOCK 5508
2025-03-30 06:09:35 [DEBUG] clck_gen.py:128 IND CLOCK 5610
2025-03-30 06:09:36 [DEBUG] clck_gen.py:128 IND CLOCK 5712
2025-03-30 06:09:36 [DEBUG] clck_gen.py:128 IND CLOCK 5814
2025-03-30 06:09:37 [DEBUG] clck_gen.py:128 IND CLOCK 5916
2025-03-30 06:09:37 [DEBUG] clck_gen.py:128 IND CLOCK 6018
2025-03-30 06:09:37 [DEBUG] clck_gen.py:128 IND CLOCK 6120
2025-03-30 06:09:38 [DEBUG] clck_gen.py:128 IND CLOCK 6222
2025-03-30 06:09:38 [DEBUG] clck_gen.py:128 IND CLOCK 6324
2025-03-30 06:09:39 [DEBUG] clck_gen.py:128 IND CLOCK 6426
2025-03-30 06:09:39 [DEBUG] clck_gen.py:128 IND CLOCK 6528
2025-03-30 06:09:40 [DEBUG] clck_gen.py:128 IND CLOCK 6630
2025-03-30 06:09:40 [DEBUG] clck_gen.py:128 IND CLOCK 6732
2025-03-30 06:09:41 [DEBUG] clck_gen.py:128 IND CLOCK 6834
2025-03-30 06:09:41 [DEBUG] clck_gen.py:128 IND CLOCK 6936
2025-03-30 06:09:42 [DEBUG] clck_gen.py:128 IND CLOCK 7038
2025-03-30 06:09:42 [DEBUG] clck_gen.py:128 IND CLOCK 7140
2025-03-30 06:09:43 [DEBUG] clck_gen.py:128 IND CLOCK 7242
2025-03-30 06:09:43 [DEBUG] clck_gen.py:128 IND CLOCK 7344
2025-03-30 06:09:43 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:09:43 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:09:43 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:09:43 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:09:43 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:09:43 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:09:43 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:09:43 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:09:43 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:09:43 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 06:09:43 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 06:09:43 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 06:09:43 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:09:48 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 06:09:48 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 06:09:48 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:09:48 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:09:48 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:09:48 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:09:48 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:09:48 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 06:09:48 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:09:48 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 06:09:48 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 06:09:48 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 06:09:48 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 06:09:48 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 06:09:48 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:09:48 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:09:48 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 06:09:48 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 06:09:48 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 06:09:48 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 06:09:48 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 06:09:48 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 06:09:48 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:09:48 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:09:48 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 06:09:48 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 06:09:48 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 06:09:48 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 06:09:48 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 06:09:48 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 06:09:48 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:09:48 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:09:48 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 06:09:48 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 06:09:48 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 06:09:48 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 06:09:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 06:09:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 06:09:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 06:09:48 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 06:09:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 06:09:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 06:09:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 06:09:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 06:09:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:09:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:09:48 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 06:09:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:09:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:09:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:09:48 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 06:09:48 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 06:09:48 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 06:09:48 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 06:09:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:09:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:09:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:09:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 06:09:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:09:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:09:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:09:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:09:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:09:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:09:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:09:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:09:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:09:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:09:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:09:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:09:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:09:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:09:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:09:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:09:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:09:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:09:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:09:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:09:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:09:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:09:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:09:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:09:48 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-03-30 06:09:49 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-03-30 06:09:49 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-03-30 06:09:49 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-03-30 06:09:49 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-03-30 06:09:49 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-03-30 06:09:49 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-03-30 06:09:49 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-03-30 06:09:49 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-03-30 06:09:49 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-03-30 06:09:49 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=0 bl=148 pwr=0
2025-03-30 06:09:49 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=1 bl=148 pwr=0
2025-03-30 06:09:49 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=2 bl=148 pwr=0
2025-03-30 06:09:49 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=3 bl=148 pwr=0
2025-03-30 06:09:49 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=4 bl=148 pwr=0
2025-03-30 06:09:49 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=5 bl=148 pwr=0
2025-03-30 06:09:49 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=6 bl=148 pwr=0
2025-03-30 06:09:49 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=7 bl=148 pwr=0
2025-03-30 06:09:49 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 06:09:49 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 06:09:49 [DEBUG] fake_trx.py:317 (BTS@172.18.26.20:5700) Recv FAKE_CI cmd
2025-03-30 06:09:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:09:49 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:09:49 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:09:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:09:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:09:49 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:09:49 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:09:49 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:09:49 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:09:49 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-03-30 06:09:49 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:09:49 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:09:49 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:09:49 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:09:50 [DEBUG] clck_gen.py:128 IND CLOCK 306
2025-03-30 06:09:50 [DEBUG] clck_gen.py:128 IND CLOCK 408
2025-03-30 06:09:50 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:09:50 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:09:50 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:09:50 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:09:51 [DEBUG] clck_gen.py:128 IND CLOCK 510
2025-03-30 06:09:51 [DEBUG] clck_gen.py:128 IND CLOCK 612
2025-03-30 06:09:51 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:09:51 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:09:51 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:09:51 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:09:52 [DEBUG] clck_gen.py:128 IND CLOCK 714
2025-03-30 06:09:52 [DEBUG] clck_gen.py:128 IND CLOCK 816
2025-03-30 06:09:52 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:09:52 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:09:52 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:09:52 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:09:53 [DEBUG] clck_gen.py:128 IND CLOCK 918
2025-03-30 06:09:53 [DEBUG] clck_gen.py:128 IND CLOCK 1020
2025-03-30 06:09:53 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:09:53 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:09:53 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:09:53 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:09:54 [DEBUG] clck_gen.py:128 IND CLOCK 1122
2025-03-30 06:09:54 [DEBUG] clck_gen.py:128 IND CLOCK 1224
2025-03-30 06:09:55 [DEBUG] clck_gen.py:128 IND CLOCK 1326
2025-03-30 06:09:55 [DEBUG] clck_gen.py:128 IND CLOCK 1428
2025-03-30 06:09:56 [DEBUG] clck_gen.py:128 IND CLOCK 1530
2025-03-30 06:09:56 [DEBUG] clck_gen.py:128 IND CLOCK 1632
2025-03-30 06:09:56 [DEBUG] clck_gen.py:128 IND CLOCK 1734
2025-03-30 06:09:57 [DEBUG] clck_gen.py:128 IND CLOCK 1836
2025-03-30 06:09:57 [DEBUG] clck_gen.py:128 IND CLOCK 1938
2025-03-30 06:09:58 [DEBUG] clck_gen.py:128 IND CLOCK 2040
2025-03-30 06:09:58 [DEBUG] clck_gen.py:128 IND CLOCK 2142
2025-03-30 06:09:59 [DEBUG] clck_gen.py:128 IND CLOCK 2244
2025-03-30 06:09:59 [DEBUG] clck_gen.py:128 IND CLOCK 2346
2025-03-30 06:10:00 [DEBUG] clck_gen.py:128 IND CLOCK 2448
2025-03-30 06:10:00 [DEBUG] clck_gen.py:128 IND CLOCK 2550
2025-03-30 06:10:01 [DEBUG] clck_gen.py:128 IND CLOCK 2652
2025-03-30 06:10:01 [DEBUG] clck_gen.py:128 IND CLOCK 2754
2025-03-30 06:10:02 [DEBUG] clck_gen.py:128 IND CLOCK 2856
2025-03-30 06:10:02 [DEBUG] clck_gen.py:128 IND CLOCK 2958
2025-03-30 06:10:03 [DEBUG] clck_gen.py:128 IND CLOCK 3060
2025-03-30 06:10:03 [DEBUG] clck_gen.py:128 IND CLOCK 3162
2025-03-30 06:10:04 [DEBUG] clck_gen.py:128 IND CLOCK 3264
2025-03-30 06:10:04 [DEBUG] clck_gen.py:128 IND CLOCK 3366
2025-03-30 06:10:04 [DEBUG] clck_gen.py:128 IND CLOCK 3468
2025-03-30 06:10:05 [DEBUG] clck_gen.py:128 IND CLOCK 3570
2025-03-30 06:10:05 [DEBUG] clck_gen.py:128 IND CLOCK 3672
2025-03-30 06:10:06 [DEBUG] clck_gen.py:128 IND CLOCK 3774
2025-03-30 06:10:06 [DEBUG] clck_gen.py:128 IND CLOCK 3876
2025-03-30 06:10:07 [DEBUG] clck_gen.py:128 IND CLOCK 3978
2025-03-30 06:10:07 [DEBUG] clck_gen.py:128 IND CLOCK 4080
2025-03-30 06:10:08 [DEBUG] clck_gen.py:128 IND CLOCK 4182
2025-03-30 06:10:08 [DEBUG] clck_gen.py:128 IND CLOCK 4284
2025-03-30 06:10:09 [DEBUG] clck_gen.py:128 IND CLOCK 4386
2025-03-30 06:10:09 [DEBUG] clck_gen.py:128 IND CLOCK 4488
2025-03-30 06:10:10 [DEBUG] clck_gen.py:128 IND CLOCK 4590
2025-03-30 06:10:10 [DEBUG] clck_gen.py:128 IND CLOCK 4692
2025-03-30 06:10:11 [DEBUG] clck_gen.py:128 IND CLOCK 4794
2025-03-30 06:10:11 [DEBUG] clck_gen.py:128 IND CLOCK 4896
2025-03-30 06:10:12 [DEBUG] clck_gen.py:128 IND CLOCK 4998
2025-03-30 06:10:12 [DEBUG] clck_gen.py:128 IND CLOCK 5100
2025-03-30 06:10:12 [DEBUG] clck_gen.py:128 IND CLOCK 5202
2025-03-30 06:10:13 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:10:13 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:10:13 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:10:13 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:10:13 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:10:13 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:10:13 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:10:13 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:10:13 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:10:13 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:10:13 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 06:10:13 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 06:10:13 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 06:10:13 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=5240 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:10:13 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=5240 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:10:13 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=5240 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:10:13 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=5240 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:10:13 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=5240 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:10:13 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=5240 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:10:13 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=5240 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:10:13 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=5240 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:10:18 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 06:10:18 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 06:10:18 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:10:18 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:10:18 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:10:18 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:10:18 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:10:18 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 06:10:18 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:10:18 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 06:10:18 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 06:10:18 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 06:10:18 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 06:10:18 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 06:10:18 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:10:18 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:10:18 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 06:10:18 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 06:10:18 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 06:10:18 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 06:10:18 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 06:10:18 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 06:10:18 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:10:18 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:10:18 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 06:10:18 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 06:10:18 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 06:10:18 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 06:10:18 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 06:10:18 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 06:10:18 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:10:18 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:10:18 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 06:10:18 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 06:10:18 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 06:10:18 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 06:10:18 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 06:10:18 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 06:10:18 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 06:10:18 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 06:10:18 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 06:10:18 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 06:10:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 06:10:18 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:10:18 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 06:10:18 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 06:10:18 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:10:18 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:10:18 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 06:10:18 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 06:10:18 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 06:10:18 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 06:10:18 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:10:18 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:10:18 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:10:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 06:10:18 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:10:18 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:10:18 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:10:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:10:18 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:10:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:10:18 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:10:18 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:10:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:10:18 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:10:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:10:18 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:10:18 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:10:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:10:18 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:10:18 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:10:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:10:18 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:10:18 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:10:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:10:18 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:10:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:10:18 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:10:18 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:10:18 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:10:18 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:10:18 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-03-30 06:10:18 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-03-30 06:10:18 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-03-30 06:10:18 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-03-30 06:10:18 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-03-30 06:10:18 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-03-30 06:10:18 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-03-30 06:10:18 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-03-30 06:10:18 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-03-30 06:10:18 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-03-30 06:10:18 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=105 tn=0 bl=148 pwr=0
2025-03-30 06:10:18 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=105 tn=1 bl=148 pwr=0
2025-03-30 06:10:18 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=105 tn=2 bl=148 pwr=0
2025-03-30 06:10:18 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=105 tn=3 bl=148 pwr=0
2025-03-30 06:10:18 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=105 tn=4 bl=148 pwr=0
2025-03-30 06:10:18 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=105 tn=5 bl=148 pwr=0
2025-03-30 06:10:18 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=105 tn=6 bl=148 pwr=0
2025-03-30 06:10:18 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=105 tn=7 bl=148 pwr=0
2025-03-30 06:10:18 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=106 tn=0 bl=148 pwr=0
2025-03-30 06:10:18 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=106 tn=1 bl=148 pwr=0
2025-03-30 06:10:18 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=106 tn=2 bl=148 pwr=0
2025-03-30 06:10:18 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=106 tn=3 bl=148 pwr=0
2025-03-30 06:10:18 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=106 tn=4 bl=148 pwr=0
2025-03-30 06:10:18 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=106 tn=5 bl=148 pwr=0
2025-03-30 06:10:18 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=106 tn=6 bl=148 pwr=0
2025-03-30 06:10:18 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=106 tn=7 bl=148 pwr=0
2025-03-30 06:10:18 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=107 tn=0 bl=148 pwr=0
2025-03-30 06:10:18 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=107 tn=1 bl=148 pwr=0
2025-03-30 06:10:18 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=107 tn=2 bl=148 pwr=0
2025-03-30 06:10:18 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=107 tn=3 bl=148 pwr=0
2025-03-30 06:10:18 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=107 tn=4 bl=148 pwr=0
2025-03-30 06:10:18 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=107 tn=5 bl=148 pwr=0
2025-03-30 06:10:18 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=107 tn=6 bl=148 pwr=0
2025-03-30 06:10:18 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=107 tn=7 bl=148 pwr=0
2025-03-30 06:10:18 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 06:10:18 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 06:10:18 [DEBUG] fake_trx.py:317 (BTS@172.18.26.20:5700) Recv FAKE_CI cmd
2025-03-30 06:10:18 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:10:18 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:10:18 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:10:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:10:19 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-03-30 06:10:19 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:10:19 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:10:19 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:10:19 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:10:19 [DEBUG] clck_gen.py:128 IND CLOCK 306
2025-03-30 06:10:19 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:10:19 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:10:19 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:10:19 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:10:19 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:10:20 [DEBUG] clck_gen.py:128 IND CLOCK 408
2025-03-30 06:10:20 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:10:20 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:10:20 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:10:20 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:10:20 [DEBUG] clck_gen.py:128 IND CLOCK 510
2025-03-30 06:10:21 [DEBUG] clck_gen.py:128 IND CLOCK 612
2025-03-30 06:10:21 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:10:21 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:10:21 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:10:21 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:10:21 [DEBUG] clck_gen.py:128 IND CLOCK 714
2025-03-30 06:10:21 [DEBUG] clck_gen.py:128 IND CLOCK 816
2025-03-30 06:10:22 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:10:22 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:10:22 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:10:22 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:10:22 [DEBUG] clck_gen.py:128 IND CLOCK 918
2025-03-30 06:10:22 [DEBUG] clck_gen.py:128 IND CLOCK 1020
2025-03-30 06:10:23 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:10:23 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:10:23 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:10:23 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:10:23 [DEBUG] clck_gen.py:128 IND CLOCK 1122
2025-03-30 06:10:23 [DEBUG] clck_gen.py:128 IND CLOCK 1224
2025-03-30 06:10:24 [DEBUG] clck_gen.py:128 IND CLOCK 1326
2025-03-30 06:10:24 [DEBUG] clck_gen.py:128 IND CLOCK 1428
2025-03-30 06:10:25 [DEBUG] clck_gen.py:128 IND CLOCK 1530
2025-03-30 06:10:25 [DEBUG] clck_gen.py:128 IND CLOCK 1632
2025-03-30 06:10:26 [DEBUG] clck_gen.py:128 IND CLOCK 1734
2025-03-30 06:10:26 [DEBUG] clck_gen.py:128 IND CLOCK 1836
2025-03-30 06:10:27 [DEBUG] clck_gen.py:128 IND CLOCK 1938
2025-03-30 06:10:27 [DEBUG] clck_gen.py:128 IND CLOCK 2040
2025-03-30 06:10:28 [DEBUG] clck_gen.py:128 IND CLOCK 2142
2025-03-30 06:10:28 [DEBUG] clck_gen.py:128 IND CLOCK 2244
2025-03-30 06:10:29 [DEBUG] clck_gen.py:128 IND CLOCK 2346
2025-03-30 06:10:29 [DEBUG] clck_gen.py:128 IND CLOCK 2448
2025-03-30 06:10:29 [DEBUG] clck_gen.py:128 IND CLOCK 2550
2025-03-30 06:10:30 [DEBUG] clck_gen.py:128 IND CLOCK 2652
2025-03-30 06:10:30 [DEBUG] clck_gen.py:128 IND CLOCK 2754
2025-03-30 06:10:31 [DEBUG] clck_gen.py:128 IND CLOCK 2856
2025-03-30 06:10:31 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:10:31 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:10:31 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:10:31 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:10:31 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:10:31 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:10:31 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:10:31 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:10:31 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:10:31 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:10:31 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 06:10:31 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 06:10:31 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 06:10:36 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 06:10:36 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 06:10:36 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:10:36 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:10:36 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:10:36 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:10:36 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:10:36 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 06:10:36 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:10:36 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 06:10:36 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 06:10:36 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 06:10:36 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 06:10:36 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 06:10:36 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:10:36 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:10:36 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 06:10:36 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 06:10:36 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 06:10:36 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 06:10:36 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 06:10:36 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 06:10:36 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:10:36 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:10:36 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 06:10:36 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 06:10:36 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 06:10:36 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 06:10:36 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 06:10:36 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 06:10:36 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:10:36 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 06:10:36 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:10:36 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 06:10:36 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 06:10:36 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 06:10:36 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 06:10:36 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 06:10:36 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 06:10:36 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 06:10:36 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 06:10:36 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 06:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 06:10:36 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:10:36 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 06:10:36 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 06:10:36 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:10:36 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:10:36 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 06:10:36 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 06:10:36 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 06:10:36 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 06:10:36 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:10:36 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:10:36 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 06:10:36 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:10:36 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:10:36 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:10:36 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:10:36 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:10:36 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:10:36 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:10:36 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:10:36 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:10:36 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:10:36 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:10:36 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:10:36 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:10:36 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:10:36 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:10:36 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:10:36 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:10:36 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:10:36 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-03-30 06:10:37 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-03-30 06:10:37 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-03-30 06:10:37 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-03-30 06:10:37 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-03-30 06:10:37 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-03-30 06:10:37 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-03-30 06:10:37 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-03-30 06:10:37 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-03-30 06:10:37 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-03-30 06:10:37 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=0 bl=148 pwr=0
2025-03-30 06:10:37 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=1 bl=148 pwr=0
2025-03-30 06:10:37 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=2 bl=148 pwr=0
2025-03-30 06:10:37 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=3 bl=148 pwr=0
2025-03-30 06:10:37 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=4 bl=148 pwr=0
2025-03-30 06:10:37 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=5 bl=148 pwr=0
2025-03-30 06:10:37 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=6 bl=148 pwr=0
2025-03-30 06:10:37 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=7 bl=148 pwr=0
2025-03-30 06:10:37 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 06:10:37 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 06:10:37 [DEBUG] fake_trx.py:317 (BTS@172.18.26.20:5700) Recv FAKE_CI cmd
2025-03-30 06:10:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:10:37 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:10:37 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:10:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:10:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:10:37 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:10:37 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:10:37 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:10:37 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:10:37 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-03-30 06:10:37 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:10:37 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:10:37 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:10:37 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:10:37 [DEBUG] clck_gen.py:128 IND CLOCK 306
2025-03-30 06:10:38 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 06:10:38 [DEBUG] clck_gen.py:128 IND CLOCK 408
2025-03-30 06:10:38 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:10:38 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:10:38 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:10:38 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:10:38 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 06:10:38 [DEBUG] clck_gen.py:128 IND CLOCK 510
2025-03-30 06:10:39 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 06:10:39 [DEBUG] clck_gen.py:128 IND CLOCK 612
2025-03-30 06:10:39 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:10:39 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:10:39 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:10:39 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:10:39 [DEBUG] clck_gen.py:128 IND CLOCK 714
2025-03-30 06:10:40 [DEBUG] clck_gen.py:128 IND CLOCK 816
2025-03-30 06:10:40 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:10:40 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:10:40 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:10:40 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:10:40 [DEBUG] clck_gen.py:128 IND CLOCK 918
2025-03-30 06:10:41 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 06:10:41 [DEBUG] clck_gen.py:128 IND CLOCK 1020
2025-03-30 06:10:41 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:10:41 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:10:41 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:10:41 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:10:41 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 06:10:41 [DEBUG] clck_gen.py:128 IND CLOCK 1122
2025-03-30 06:10:42 [DEBUG] clck_gen.py:128 IND CLOCK 1224
2025-03-30 06:10:42 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 06:10:42 [DEBUG] clck_gen.py:128 IND CLOCK 1326
2025-03-30 06:10:42 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 06:10:43 [DEBUG] clck_gen.py:128 IND CLOCK 1428
2025-03-30 06:10:43 [DEBUG] clck_gen.py:128 IND CLOCK 1530
2025-03-30 06:10:44 [DEBUG] clck_gen.py:128 IND CLOCK 1632
2025-03-30 06:10:44 [DEBUG] clck_gen.py:128 IND CLOCK 1734
2025-03-30 06:10:44 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 06:10:45 [DEBUG] clck_gen.py:128 IND CLOCK 1836
2025-03-30 06:10:45 [DEBUG] clck_gen.py:128 IND CLOCK 1938
2025-03-30 06:10:45 [DEBUG] clck_gen.py:128 IND CLOCK 2040
2025-03-30 06:10:46 [DEBUG] clck_gen.py:128 IND CLOCK 2142
2025-03-30 06:10:46 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:10:46 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:10:46 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:10:46 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:10:46 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:10:46 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:10:46 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:10:46 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:10:46 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:10:46 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 06:10:46 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 06:10:46 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 06:10:46 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:10:51 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 06:10:51 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 06:10:51 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:10:51 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:10:51 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:10:51 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:10:51 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:10:51 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 06:10:51 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:10:51 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 06:10:51 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 06:10:51 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 06:10:51 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 06:10:51 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 06:10:51 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:10:51 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:10:51 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 06:10:51 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 06:10:51 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 06:10:51 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 06:10:51 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 06:10:51 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 06:10:51 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:10:51 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:10:51 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 06:10:51 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 06:10:51 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 06:10:51 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 06:10:51 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 06:10:51 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 06:10:51 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:10:51 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:10:51 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 06:10:51 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 06:10:51 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 06:10:51 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 06:10:51 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 06:10:51 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 06:10:51 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 06:10:51 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 06:10:51 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 06:10:51 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 06:10:51 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 06:10:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 06:10:51 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:10:51 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:10:51 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 06:10:51 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:10:51 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:10:51 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:10:51 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 06:10:51 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 06:10:51 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 06:10:51 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 06:10:51 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:10:51 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:10:51 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:10:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 06:10:51 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:10:51 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:10:51 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:10:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:10:51 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:10:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:10:51 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:10:51 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:10:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:10:51 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:10:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:10:51 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:10:51 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:10:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:10:51 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:10:51 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:10:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:10:51 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:10:51 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:10:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:10:51 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:10:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:10:51 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:10:51 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:10:51 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-03-30 06:10:52 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-03-30 06:10:52 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-03-30 06:10:52 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-03-30 06:10:52 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-03-30 06:10:52 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-03-30 06:10:52 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-03-30 06:10:52 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-03-30 06:10:52 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-03-30 06:10:52 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-03-30 06:10:52 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=0 bl=148 pwr=0
2025-03-30 06:10:52 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=1 bl=148 pwr=0
2025-03-30 06:10:52 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=2 bl=148 pwr=0
2025-03-30 06:10:52 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=3 bl=148 pwr=0
2025-03-30 06:10:52 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=4 bl=148 pwr=0
2025-03-30 06:10:52 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=5 bl=148 pwr=0
2025-03-30 06:10:52 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=6 bl=148 pwr=0
2025-03-30 06:10:52 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=7 bl=148 pwr=0
2025-03-30 06:10:52 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 06:10:52 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 06:10:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:10:52 [DEBUG] fake_trx.py:317 (BTS@172.18.26.20:5700) Recv FAKE_CI cmd
2025-03-30 06:10:52 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:10:52 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:10:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:10:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:10:52 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:10:52 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:10:52 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:10:52 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:10:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD HANDOVER
2025-03-30 06:10:52 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:10:52 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:10:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:10:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:10:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:10:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:10:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:10:52 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:10:52 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:10:52 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:10:52 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:10:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:10:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:10:52 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:10:52 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:10:52 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:10:52 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:10:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD HANDOVER
2025-03-30 06:10:52 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:10:52 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:10:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:10:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:10:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:10:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:10:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:10:52 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:10:52 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:10:52 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:10:52 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:10:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:10:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:10:52 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:10:52 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:10:52 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:10:52 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:10:52 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-03-30 06:10:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD HANDOVER
2025-03-30 06:10:52 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:10:52 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:10:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:10:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:10:52 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:10:52 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:10:52 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:10:52 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:10:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:10:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:10:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:10:52 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:10:52 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:10:52 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:10:52 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:10:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:10:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:10:52 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:10:52 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:10:52 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:10:52 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:10:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD HANDOVER
2025-03-30 06:10:53 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:10:53 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:10:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:10:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:10:53 [DEBUG] clck_gen.py:128 IND CLOCK 306
2025-03-30 06:10:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:10:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:10:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:10:53 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:10:53 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:10:53 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:10:53 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:10:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:10:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:10:53 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:10:53 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:10:53 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:10:53 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:10:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD HANDOVER
2025-03-30 06:10:53 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:10:53 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:10:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:10:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:10:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:10:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:10:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:10:53 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:10:53 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:10:53 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:10:53 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:10:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:10:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:10:53 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:10:53 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:10:53 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:10:53 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:10:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD HANDOVER
2025-03-30 06:10:53 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:10:53 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:10:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:10:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:10:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:10:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:10:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:10:53 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:10:53 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:10:53 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:10:53 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:10:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:10:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:10:53 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:10:53 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:10:53 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:10:53 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:10:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD HANDOVER
2025-03-30 06:10:53 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:10:53 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:10:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:10:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:10:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:10:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:10:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:10:53 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:10:53 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:10:53 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:10:53 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:10:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:10:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:10:53 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:10:53 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:10:53 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:10:53 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:10:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:10:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD HANDOVER
2025-03-30 06:10:53 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:10:53 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:10:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:10:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:10:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:10:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:10:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:10:53 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:10:53 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:10:53 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:10:53 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:10:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:10:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:10:53 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:10:53 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:10:53 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:10:53 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:10:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD HANDOVER
2025-03-30 06:10:53 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:10:53 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:10:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:10:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:10:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:10:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:10:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:10:53 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:10:53 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:10:53 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:10:53 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:10:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:10:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:10:53 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:10:53 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:10:53 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:10:53 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:10:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:10:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD HANDOVER
2025-03-30 06:10:53 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:10:53 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:10:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:10:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:10:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:10:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:10:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:10:53 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:10:53 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:10:53 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:10:53 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:10:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:10:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:10:53 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:10:53 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:10:53 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:10:53 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:10:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD HANDOVER
2025-03-30 06:10:53 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:10:53 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:10:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:10:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:10:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:10:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:10:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:10:53 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:10:53 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:10:53 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:10:53 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:10:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:10:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:10:53 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:10:53 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:10:53 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:10:53 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:10:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD HANDOVER
2025-03-30 06:10:53 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:10:53 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:10:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:10:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:10:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:10:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:10:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:10:53 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:10:53 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:10:53 [DEBUG] clck_gen.py:128 IND CLOCK 408
2025-03-30 06:10:53 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:10:53 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:10:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:10:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:10:53 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:10:53 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:10:53 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:10:53 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:10:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD HANDOVER
2025-03-30 06:10:53 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:10:53 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:10:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:10:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:10:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:10:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:10:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:10:53 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:10:53 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:10:53 [WARNING] transceiver.py:287 (MS@172.18.26.22:6700) RX TRXD message (fn=428 tn=2 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:10:53 [WARNING] transceiver.py:287 (MS@172.18.26.22:6700) RX TRXD message (fn=428 tn=3 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:10:53 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:10:53 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:10:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:10:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:10:53 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:10:53 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:10:53 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:10:53 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:10:53 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:10:53 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:10:53 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:10:53 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:10:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD HANDOVER
2025-03-30 06:10:53 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:10:53 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:10:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:10:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:10:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:10:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:10:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:10:54 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:10:54 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:10:54 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:10:54 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:10:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:10:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:10:54 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:10:54 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:10:54 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:10:54 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:10:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD HANDOVER
2025-03-30 06:10:54 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:10:54 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:10:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:10:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:10:54 [DEBUG] clck_gen.py:128 IND CLOCK 510
2025-03-30 06:10:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:10:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:10:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:10:54 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:10:54 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:10:54 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:10:54 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:10:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:10:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:10:54 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:10:54 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:10:54 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:10:54 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:10:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD HANDOVER
2025-03-30 06:10:54 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:10:54 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:10:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:10:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:10:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:10:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:10:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:10:54 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:10:54 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:10:54 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:10:54 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:10:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:10:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:10:54 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:10:54 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:10:54 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:10:54 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:10:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD HANDOVER
2025-03-30 06:10:54 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:10:54 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:10:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:10:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:10:54 [DEBUG] clck_gen.py:128 IND CLOCK 612
2025-03-30 06:10:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:10:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:10:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:10:54 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:10:54 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:10:54 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:10:54 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:10:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:10:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:10:54 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:10:54 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:10:54 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:10:54 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:10:54 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:10:54 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:10:54 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:10:54 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:10:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD HANDOVER
2025-03-30 06:10:54 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:10:54 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:10:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:10:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:10:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:10:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:10:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:10:55 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:10:55 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:10:55 [WARNING] transceiver.py:287 (MS@172.18.26.22:6700) RX TRXD message (fn=702 tn=2 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:10:55 [WARNING] transceiver.py:287 (MS@172.18.26.22:6700) RX TRXD message (fn=702 tn=3 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:10:55 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:10:55 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:10:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:10:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:10:55 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:10:55 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:10:55 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:10:55 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:10:55 [DEBUG] clck_gen.py:128 IND CLOCK 714
2025-03-30 06:10:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD HANDOVER
2025-03-30 06:10:55 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:10:55 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:10:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:10:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:10:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:10:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:10:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:10:55 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:10:55 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:10:55 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:10:55 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:10:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:10:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:10:55 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:10:55 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:10:55 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:10:55 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:10:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD HANDOVER
2025-03-30 06:10:55 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:10:55 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:10:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:10:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:10:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:10:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:10:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:10:55 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:10:55 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:10:55 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:10:55 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:10:55 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:10:55 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:10:55 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:10:55 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:10:55 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:10:55 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:10:55 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 06:10:55 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 06:10:55 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 06:11:00 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 06:11:00 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 06:11:00 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:11:00 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:11:00 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:11:00 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:11:00 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:11:00 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 06:11:00 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:11:00 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 06:11:00 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 06:11:00 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 06:11:00 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 06:11:00 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 06:11:00 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:11:00 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:11:00 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 06:11:00 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 06:11:00 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 06:11:00 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 06:11:00 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 06:11:00 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 06:11:00 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:11:00 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:11:00 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 06:11:00 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 06:11:00 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 06:11:00 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 06:11:00 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 06:11:00 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 06:11:00 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:11:00 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:11:00 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 06:11:00 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 06:11:00 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 06:11:00 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 06:11:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 06:11:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 06:11:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 06:11:00 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 06:11:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 06:11:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 06:11:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 06:11:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:11:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 06:11:00 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 06:11:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:11:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:11:00 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 06:11:00 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 06:11:00 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 06:11:00 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 06:11:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:11:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:11:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:11:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 06:11:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:11:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:11:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:11:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:11:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:11:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:11:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:11:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:11:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:11:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:11:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:11:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:11:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:11:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:11:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:11:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:11:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:11:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:11:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:11:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:11:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:11:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:11:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:11:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:11:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:11:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:11:00 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-03-30 06:11:01 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-03-30 06:11:01 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-03-30 06:11:01 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-03-30 06:11:01 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-03-30 06:11:01 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-03-30 06:11:01 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-03-30 06:11:01 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-03-30 06:11:01 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-03-30 06:11:01 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-03-30 06:11:01 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=0 bl=148 pwr=0
2025-03-30 06:11:01 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=1 bl=148 pwr=0
2025-03-30 06:11:01 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=2 bl=148 pwr=0
2025-03-30 06:11:01 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=3 bl=148 pwr=0
2025-03-30 06:11:01 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=4 bl=148 pwr=0
2025-03-30 06:11:01 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=5 bl=148 pwr=0
2025-03-30 06:11:01 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=6 bl=148 pwr=0
2025-03-30 06:11:01 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=7 bl=148 pwr=0
2025-03-30 06:11:01 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 06:11:01 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 06:11:01 [DEBUG] fake_trx.py:317 (BTS@172.18.26.20:5700) Recv FAKE_CI cmd
2025-03-30 06:11:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:11:01 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:11:01 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:11:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:11:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:11:01 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:11:01 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:11:01 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:11:01 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:11:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD HANDOVER
2025-03-30 06:11:01 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:11:01 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:11:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:11:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:11:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:11:01 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-03-30 06:11:01 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:11:01 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:11:01 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:11:01 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:11:01 [DEBUG] clck_gen.py:128 IND CLOCK 306
2025-03-30 06:11:02 [DEBUG] clck_gen.py:128 IND CLOCK 408
2025-03-30 06:11:02 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:11:02 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:11:02 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:11:02 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:11:02 [DEBUG] clck_gen.py:128 IND CLOCK 510
2025-03-30 06:11:03 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:11:03 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:11:03 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:11:03 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:11:03 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:11:03 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:11:03 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:11:03 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:11:03 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:11:03 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:11:03 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 06:11:03 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 06:11:03 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 06:11:08 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 06:11:08 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 06:11:08 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:11:08 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:11:08 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:11:08 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:11:08 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:11:08 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 06:11:08 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:11:08 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 06:11:08 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 06:11:08 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 06:11:08 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 06:11:08 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 06:11:08 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:11:08 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:11:08 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 06:11:08 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 06:11:08 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 06:11:08 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 06:11:08 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 06:11:08 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 06:11:08 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:11:08 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:11:08 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 06:11:08 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 06:11:08 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 06:11:08 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 06:11:08 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 06:11:08 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 06:11:08 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:11:08 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:11:08 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 06:11:08 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 06:11:08 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 06:11:08 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 06:11:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 06:11:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 06:11:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 06:11:08 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 06:11:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 06:11:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 06:11:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 06:11:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:11:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 06:11:08 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 06:11:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:11:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:11:08 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 06:11:08 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 06:11:08 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 06:11:08 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 06:11:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:11:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:11:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:11:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 06:11:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:11:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:11:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:11:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:11:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:11:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:11:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:11:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:11:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:11:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:11:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:11:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:11:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:11:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:11:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:11:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:11:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:11:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:11:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:11:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:11:08 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:11:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:11:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:11:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:11:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:11:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:11:08 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:11:08 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:11:08 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 06:11:08 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 06:11:08 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 06:11:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:11:13 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 06:11:13 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 06:11:13 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:11:13 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:11:13 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:11:13 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:11:13 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:11:13 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 06:11:13 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:11:13 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 06:11:13 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 06:11:13 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 06:11:13 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 06:11:13 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 06:11:13 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:11:13 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:11:13 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 06:11:13 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 06:11:13 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 06:11:13 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 06:11:13 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 06:11:13 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 06:11:13 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:11:13 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:11:13 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 06:11:13 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 06:11:13 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 06:11:13 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 06:11:13 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 06:11:13 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 06:11:13 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:11:13 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:11:13 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 06:11:13 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 06:11:13 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 06:11:13 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 06:11:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 06:11:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 06:11:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 06:11:13 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 06:11:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 06:11:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 06:11:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 06:11:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:11:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 06:11:13 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 06:11:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:11:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:11:13 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 06:11:13 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 06:11:13 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 06:11:13 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 06:11:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:11:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:11:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:11:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 06:11:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:11:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:11:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:11:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:11:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:11:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:11:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:11:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:11:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:11:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:11:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:11:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:11:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:11:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:11:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:11:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:11:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:11:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:11:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:11:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:11:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:11:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:11:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:11:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:11:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:11:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:11:13 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-03-30 06:11:13 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-03-30 06:11:13 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-03-30 06:11:13 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-03-30 06:11:13 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-03-30 06:11:13 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-03-30 06:11:13 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-03-30 06:11:13 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-03-30 06:11:13 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-03-30 06:11:13 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-03-30 06:11:13 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=0 bl=148 pwr=0
2025-03-30 06:11:13 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=1 bl=148 pwr=0
2025-03-30 06:11:13 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=2 bl=148 pwr=0
2025-03-30 06:11:13 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=3 bl=148 pwr=0
2025-03-30 06:11:13 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=4 bl=148 pwr=0
2025-03-30 06:11:13 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=5 bl=148 pwr=0
2025-03-30 06:11:13 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=6 bl=148 pwr=0
2025-03-30 06:11:13 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=7 bl=148 pwr=0
2025-03-30 06:11:13 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 06:11:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:11:13 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 06:11:13 [DEBUG] fake_trx.py:317 (BTS@172.18.26.20:5700) Recv FAKE_CI cmd
2025-03-30 06:11:14 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-03-30 06:11:14 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:11:14 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:11:14 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:11:14 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:11:14 [DEBUG] clck_gen.py:128 IND CLOCK 306
2025-03-30 06:11:15 [DEBUG] clck_gen.py:128 IND CLOCK 408
2025-03-30 06:11:15 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:11:15 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:11:15 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:11:15 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:11:15 [DEBUG] clck_gen.py:128 IND CLOCK 510
2025-03-30 06:11:16 [DEBUG] clck_gen.py:128 IND CLOCK 612
2025-03-30 06:11:16 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:11:16 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:11:16 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:11:16 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:11:16 [DEBUG] clck_gen.py:128 IND CLOCK 714
2025-03-30 06:11:17 [DEBUG] clck_gen.py:128 IND CLOCK 816
2025-03-30 06:11:17 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:11:17 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:11:17 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:11:17 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:11:17 [DEBUG] clck_gen.py:128 IND CLOCK 918
2025-03-30 06:11:18 [DEBUG] clck_gen.py:128 IND CLOCK 1020
2025-03-30 06:11:18 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:11:18 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:11:18 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:11:18 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:11:18 [DEBUG] clck_gen.py:128 IND CLOCK 1122
2025-03-30 06:11:18 [DEBUG] clck_gen.py:128 IND CLOCK 1224
2025-03-30 06:11:19 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:11:19 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:11:19 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:11:19 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:11:19 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:11:19 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:11:19 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:11:19 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:11:19 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 06:11:19 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 06:11:19 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 06:11:19 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=1305 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:11:19 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=1305 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:11:19 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=1305 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:11:19 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=1305 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:11:19 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=1305 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:11:19 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=1305 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:11:19 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=1306 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:11:19 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=1306 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:11:19 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=1306 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:11:19 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=1306 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:11:19 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=1306 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:11:19 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=1306 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:11:19 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=1306 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:11:19 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=1306 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:11:24 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 06:11:24 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 06:11:24 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:11:24 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:11:24 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:11:24 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:11:24 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:11:24 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 06:11:24 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:11:24 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 06:11:24 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 06:11:24 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 06:11:24 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 06:11:24 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 06:11:24 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:11:24 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:11:24 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 06:11:24 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 06:11:24 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 06:11:24 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 06:11:24 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 06:11:24 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 06:11:24 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:11:24 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:11:24 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 06:11:24 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 06:11:24 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 06:11:24 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 06:11:24 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 06:11:24 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 06:11:24 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:11:24 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:11:24 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 06:11:24 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 06:11:24 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 06:11:24 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 06:11:24 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 06:11:24 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 06:11:24 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 06:11:24 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 06:11:24 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 06:11:24 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 06:11:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 06:11:24 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:11:24 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 06:11:24 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 06:11:24 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:11:24 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:11:24 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 06:11:24 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 06:11:24 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 06:11:24 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 06:11:24 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:11:24 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:11:24 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:11:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 06:11:24 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:11:24 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:11:24 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:11:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:11:24 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:11:24 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:11:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:11:24 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:11:24 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:11:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:11:24 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:11:24 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:11:24 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:11:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:11:24 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:11:24 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:11:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:11:24 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:11:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:11:24 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:11:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:11:24 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:11:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:11:24 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:11:24 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:11:24 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:11:24 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-03-30 06:11:24 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-03-30 06:11:24 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-03-30 06:11:24 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-03-30 06:11:24 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-03-30 06:11:24 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-03-30 06:11:24 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-03-30 06:11:24 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-03-30 06:11:24 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-03-30 06:11:24 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-03-30 06:11:24 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=0 bl=148 pwr=0
2025-03-30 06:11:24 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=1 bl=148 pwr=0
2025-03-30 06:11:24 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=2 bl=148 pwr=0
2025-03-30 06:11:24 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=3 bl=148 pwr=0
2025-03-30 06:11:24 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=4 bl=148 pwr=0
2025-03-30 06:11:24 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=5 bl=148 pwr=0
2025-03-30 06:11:24 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=6 bl=148 pwr=0
2025-03-30 06:11:24 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=7 bl=148 pwr=0
2025-03-30 06:11:24 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 06:11:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:11:24 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 06:11:24 [DEBUG] fake_trx.py:317 (BTS@172.18.26.20:5700) Recv FAKE_CI cmd
2025-03-30 06:11:25 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-03-30 06:11:25 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:11:25 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:11:25 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:11:25 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:11:25 [DEBUG] clck_gen.py:128 IND CLOCK 306
2025-03-30 06:11:26 [DEBUG] clck_gen.py:128 IND CLOCK 408
2025-03-30 06:11:26 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:11:26 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:11:26 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:11:26 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:11:26 [DEBUG] clck_gen.py:128 IND CLOCK 510
2025-03-30 06:11:27 [DEBUG] clck_gen.py:128 IND CLOCK 612
2025-03-30 06:11:27 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:11:27 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:11:27 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:11:27 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:11:27 [DEBUG] clck_gen.py:128 IND CLOCK 714
2025-03-30 06:11:28 [DEBUG] clck_gen.py:128 IND CLOCK 816
2025-03-30 06:11:28 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:11:28 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:11:28 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:11:28 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:11:28 [DEBUG] clck_gen.py:128 IND CLOCK 918
2025-03-30 06:11:29 [DEBUG] clck_gen.py:128 IND CLOCK 1020
2025-03-30 06:11:29 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:11:29 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:11:29 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:11:29 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:11:29 [DEBUG] clck_gen.py:128 IND CLOCK 1122
2025-03-30 06:11:29 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:11:29 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:11:29 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:11:29 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:11:29 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:11:29 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:11:29 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:11:29 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:11:29 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 06:11:29 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 06:11:29 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 06:11:34 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 06:11:34 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 06:11:34 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:11:34 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:11:34 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:11:34 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:11:34 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:11:34 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 06:11:34 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:11:34 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 06:11:34 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 06:11:34 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 06:11:34 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 06:11:34 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 06:11:34 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:11:34 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:11:34 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 06:11:34 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 06:11:34 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 06:11:34 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 06:11:34 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 06:11:34 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 06:11:34 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:11:34 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:11:34 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 06:11:34 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 06:11:34 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 06:11:34 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 06:11:34 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 06:11:34 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 06:11:34 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:11:34 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:11:34 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 06:11:34 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 06:11:34 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 06:11:34 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 06:11:34 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 06:11:34 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 06:11:34 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 06:11:34 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 06:11:34 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 06:11:34 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 06:11:34 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 06:11:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 06:11:34 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:11:34 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:11:34 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 06:11:34 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:11:34 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:11:34 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:11:34 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 06:11:34 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 06:11:34 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 06:11:34 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 06:11:34 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:11:34 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:11:34 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:11:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 06:11:34 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:11:34 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:11:34 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:11:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:11:34 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:11:34 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:11:34 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:11:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:11:34 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:11:34 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:11:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:11:34 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:11:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:11:34 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:11:34 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:11:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:11:34 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:11:34 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:11:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:11:34 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:11:34 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:11:34 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:11:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:11:34 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:11:34 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:11:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:11:34 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:11:34 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:11:34 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 06:11:34 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 06:11:34 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 06:11:39 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 06:11:39 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 06:11:39 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:11:39 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:11:39 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:11:39 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:11:39 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:11:39 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 06:11:39 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:11:39 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 06:11:39 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 06:11:39 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 06:11:39 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 06:11:39 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 06:11:39 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:11:39 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:11:39 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 06:11:39 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 06:11:39 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 06:11:39 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 06:11:39 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 06:11:39 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 06:11:39 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:11:39 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:11:39 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 06:11:39 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 06:11:39 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 06:11:39 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 06:11:39 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 06:11:39 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 06:11:39 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:11:39 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:11:39 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 06:11:39 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 06:11:39 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 06:11:39 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 06:11:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 06:11:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 06:11:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 06:11:39 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 06:11:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 06:11:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 06:11:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 06:11:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:11:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 06:11:39 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 06:11:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:11:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:11:39 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 06:11:39 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 06:11:39 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 06:11:39 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 06:11:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:11:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:11:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:11:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 06:11:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:11:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:11:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:11:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:11:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:11:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:11:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:11:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:11:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:11:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:11:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:11:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:11:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:11:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:11:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:11:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:11:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:11:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:11:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:11:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:11:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:11:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:11:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:11:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:11:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:11:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:11:39 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-03-30 06:11:40 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-03-30 06:11:40 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-03-30 06:11:40 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-03-30 06:11:40 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-03-30 06:11:40 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-03-30 06:11:40 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-03-30 06:11:40 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-03-30 06:11:40 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-03-30 06:11:40 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-03-30 06:11:40 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=105 tn=0 bl=148 pwr=0
2025-03-30 06:11:40 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=105 tn=1 bl=148 pwr=0
2025-03-30 06:11:40 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=105 tn=2 bl=148 pwr=0
2025-03-30 06:11:40 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=105 tn=3 bl=148 pwr=0
2025-03-30 06:11:40 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=105 tn=4 bl=148 pwr=0
2025-03-30 06:11:40 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=105 tn=5 bl=148 pwr=0
2025-03-30 06:11:40 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=105 tn=6 bl=148 pwr=0
2025-03-30 06:11:40 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=105 tn=7 bl=148 pwr=0
2025-03-30 06:11:40 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=106 tn=0 bl=148 pwr=0
2025-03-30 06:11:40 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=106 tn=1 bl=148 pwr=0
2025-03-30 06:11:40 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=106 tn=2 bl=148 pwr=0
2025-03-30 06:11:40 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=106 tn=3 bl=148 pwr=0
2025-03-30 06:11:40 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=106 tn=4 bl=148 pwr=0
2025-03-30 06:11:40 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=106 tn=5 bl=148 pwr=0
2025-03-30 06:11:40 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=106 tn=6 bl=148 pwr=0
2025-03-30 06:11:40 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=106 tn=7 bl=148 pwr=0
2025-03-30 06:11:40 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=107 tn=0 bl=148 pwr=0
2025-03-30 06:11:40 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=107 tn=1 bl=148 pwr=0
2025-03-30 06:11:40 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=107 tn=2 bl=148 pwr=0
2025-03-30 06:11:40 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=107 tn=3 bl=148 pwr=0
2025-03-30 06:11:40 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=107 tn=4 bl=148 pwr=0
2025-03-30 06:11:40 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=107 tn=5 bl=148 pwr=0
2025-03-30 06:11:40 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=107 tn=6 bl=148 pwr=0
2025-03-30 06:11:40 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=107 tn=7 bl=148 pwr=0
2025-03-30 06:11:40 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 06:11:40 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 06:11:40 [DEBUG] fake_trx.py:317 (BTS@172.18.26.20:5700) Recv FAKE_CI cmd
2025-03-30 06:11:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:11:40 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:11:40 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:11:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:11:40 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-03-30 06:11:40 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:11:40 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:11:40 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:11:40 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:11:41 [DEBUG] clck_gen.py:128 IND CLOCK 306
2025-03-30 06:11:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:11:41 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:11:41 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:11:41 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:11:41 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:11:41 [DEBUG] clck_gen.py:128 IND CLOCK 408
2025-03-30 06:11:41 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:11:41 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:11:41 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:11:41 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:11:42 [DEBUG] clck_gen.py:128 IND CLOCK 510
2025-03-30 06:11:42 [DEBUG] clck_gen.py:128 IND CLOCK 612
2025-03-30 06:11:42 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:11:42 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:11:42 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:11:42 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:11:43 [DEBUG] clck_gen.py:128 IND CLOCK 714
2025-03-30 06:11:43 [DEBUG] clck_gen.py:128 IND CLOCK 816
2025-03-30 06:11:43 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:11:43 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:11:43 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:11:43 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:11:44 [DEBUG] clck_gen.py:128 IND CLOCK 918
2025-03-30 06:11:44 [DEBUG] clck_gen.py:128 IND CLOCK 1020
2025-03-30 06:11:44 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:11:44 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:11:44 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:11:44 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:11:45 [DEBUG] clck_gen.py:128 IND CLOCK 1122
2025-03-30 06:11:45 [DEBUG] clck_gen.py:128 IND CLOCK 1224
2025-03-30 06:11:46 [DEBUG] clck_gen.py:128 IND CLOCK 1326
2025-03-30 06:11:46 [DEBUG] clck_gen.py:128 IND CLOCK 1428
2025-03-30 06:11:47 [DEBUG] clck_gen.py:128 IND CLOCK 1530
2025-03-30 06:11:47 [DEBUG] clck_gen.py:128 IND CLOCK 1632
2025-03-30 06:11:47 [DEBUG] clck_gen.py:128 IND CLOCK 1734
2025-03-30 06:11:48 [DEBUG] clck_gen.py:128 IND CLOCK 1836
2025-03-30 06:11:48 [DEBUG] clck_gen.py:128 IND CLOCK 1938
2025-03-30 06:11:49 [DEBUG] clck_gen.py:128 IND CLOCK 2040
2025-03-30 06:11:49 [DEBUG] clck_gen.py:128 IND CLOCK 2142
2025-03-30 06:11:50 [DEBUG] clck_gen.py:128 IND CLOCK 2244
2025-03-30 06:11:50 [DEBUG] clck_gen.py:128 IND CLOCK 2346
2025-03-30 06:11:51 [DEBUG] clck_gen.py:128 IND CLOCK 2448
2025-03-30 06:11:51 [DEBUG] clck_gen.py:128 IND CLOCK 2550
2025-03-30 06:11:52 [DEBUG] clck_gen.py:128 IND CLOCK 2652
2025-03-30 06:11:52 [DEBUG] clck_gen.py:128 IND CLOCK 2754
2025-03-30 06:11:53 [DEBUG] clck_gen.py:128 IND CLOCK 2856
2025-03-30 06:11:53 [DEBUG] clck_gen.py:128 IND CLOCK 2958
2025-03-30 06:11:54 [DEBUG] clck_gen.py:128 IND CLOCK 3060
2025-03-30 06:11:54 [DEBUG] clck_gen.py:128 IND CLOCK 3162
2025-03-30 06:11:55 [DEBUG] clck_gen.py:128 IND CLOCK 3264
2025-03-30 06:11:55 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:11:55 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:11:55 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:11:55 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:11:55 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:11:55 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:11:55 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:11:55 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:11:55 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:11:55 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 06:11:55 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 06:11:55 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 06:11:55 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:12:00 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 06:12:00 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 06:12:00 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:12:00 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:12:00 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:12:00 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:12:00 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:12:00 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 06:12:00 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:12:00 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 06:12:00 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 06:12:00 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 06:12:00 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 06:12:00 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 06:12:00 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:12:00 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:12:00 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 06:12:00 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 06:12:00 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 06:12:00 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 06:12:00 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 06:12:00 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 06:12:00 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:12:00 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:12:00 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 06:12:00 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 06:12:00 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 06:12:00 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 06:12:00 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 06:12:00 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 06:12:00 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:12:00 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:12:00 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 06:12:00 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 06:12:00 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 06:12:00 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 06:12:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 06:12:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 06:12:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 06:12:00 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 06:12:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 06:12:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 06:12:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 06:12:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:12:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 06:12:00 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 06:12:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:12:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:12:00 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 06:12:00 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 06:12:00 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 06:12:00 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 06:12:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:12:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:12:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:12:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 06:12:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:12:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:12:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:12:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:12:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:12:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:12:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:12:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:12:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:12:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:12:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:12:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:12:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:12:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:12:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:12:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:12:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:12:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:12:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:12:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:12:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:12:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:12:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:12:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:12:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:12:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:12:00 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-03-30 06:12:00 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-03-30 06:12:00 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-03-30 06:12:00 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-03-30 06:12:00 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-03-30 06:12:00 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-03-30 06:12:00 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-03-30 06:12:00 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-03-30 06:12:00 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-03-30 06:12:00 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-03-30 06:12:00 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=0 bl=148 pwr=0
2025-03-30 06:12:00 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=1 bl=148 pwr=0
2025-03-30 06:12:00 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=2 bl=148 pwr=0
2025-03-30 06:12:00 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=3 bl=148 pwr=0
2025-03-30 06:12:00 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=4 bl=148 pwr=0
2025-03-30 06:12:00 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=5 bl=148 pwr=0
2025-03-30 06:12:00 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=6 bl=148 pwr=0
2025-03-30 06:12:00 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=7 bl=148 pwr=0
2025-03-30 06:12:00 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 06:12:00 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 06:12:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:12:00 [DEBUG] fake_trx.py:317 (BTS@172.18.26.20:5700) Recv FAKE_CI cmd
2025-03-30 06:12:00 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:12:00 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:12:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:12:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:12:00 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:12:00 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:12:00 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:12:00 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:12:00 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 06:12:00 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 06:12:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:12:00 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:12:00 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:12:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:12:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:12:01 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-03-30 06:12:01 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:12:01 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:12:01 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:12:01 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:12:01 [DEBUG] clck_gen.py:128 IND CLOCK 306
2025-03-30 06:12:01 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:12:01 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:12:01 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:12:01 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:12:01 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:12:01 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:12:01 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:12:01 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:12:01 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:12:01 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:12:01 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 06:12:01 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 06:12:01 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 06:12:06 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 06:12:06 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 06:12:06 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:12:06 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:12:06 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:12:06 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:12:06 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:12:06 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 06:12:06 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:12:06 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 06:12:06 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 06:12:06 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 06:12:06 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 06:12:06 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 06:12:06 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:12:06 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:12:06 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 06:12:06 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 06:12:06 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 06:12:06 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 06:12:06 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 06:12:06 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 06:12:06 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:12:06 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:12:06 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 06:12:06 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 06:12:06 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 06:12:06 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 06:12:06 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 06:12:06 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 06:12:06 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:12:06 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 06:12:06 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:12:06 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 06:12:06 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 06:12:06 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 06:12:06 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 06:12:06 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 06:12:06 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 06:12:06 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 06:12:06 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 06:12:06 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 06:12:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 06:12:06 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:12:06 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 06:12:06 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 06:12:06 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:12:06 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:12:06 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 06:12:06 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 06:12:06 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 06:12:06 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 06:12:06 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:12:06 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:12:06 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:12:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 06:12:06 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:12:06 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:12:06 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:12:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:12:06 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:12:06 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:12:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:12:06 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:12:06 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:12:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:12:06 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:12:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:12:06 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:12:06 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:12:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:12:06 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:12:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:12:06 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:12:06 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:12:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:12:06 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:12:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:12:06 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:12:06 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:12:06 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:12:06 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:12:06 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-03-30 06:12:07 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-03-30 06:12:07 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-03-30 06:12:07 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-03-30 06:12:07 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-03-30 06:12:07 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-03-30 06:12:07 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-03-30 06:12:07 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-03-30 06:12:07 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-03-30 06:12:07 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-03-30 06:12:07 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=105 tn=0 bl=148 pwr=0
2025-03-30 06:12:07 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=105 tn=1 bl=148 pwr=0
2025-03-30 06:12:07 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=105 tn=2 bl=148 pwr=0
2025-03-30 06:12:07 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=105 tn=3 bl=148 pwr=0
2025-03-30 06:12:07 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=105 tn=4 bl=148 pwr=0
2025-03-30 06:12:07 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=105 tn=5 bl=148 pwr=0
2025-03-30 06:12:07 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=105 tn=6 bl=148 pwr=0
2025-03-30 06:12:07 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=105 tn=7 bl=148 pwr=0
2025-03-30 06:12:07 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=106 tn=0 bl=148 pwr=0
2025-03-30 06:12:07 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=106 tn=1 bl=148 pwr=0
2025-03-30 06:12:07 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=106 tn=2 bl=148 pwr=0
2025-03-30 06:12:07 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=106 tn=3 bl=148 pwr=0
2025-03-30 06:12:07 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=106 tn=4 bl=148 pwr=0
2025-03-30 06:12:07 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=106 tn=5 bl=148 pwr=0
2025-03-30 06:12:07 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=106 tn=6 bl=148 pwr=0
2025-03-30 06:12:07 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=106 tn=7 bl=148 pwr=0
2025-03-30 06:12:07 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=107 tn=0 bl=148 pwr=0
2025-03-30 06:12:07 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=107 tn=1 bl=148 pwr=0
2025-03-30 06:12:07 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=107 tn=2 bl=148 pwr=0
2025-03-30 06:12:07 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=107 tn=3 bl=148 pwr=0
2025-03-30 06:12:07 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=107 tn=4 bl=148 pwr=0
2025-03-30 06:12:07 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=107 tn=5 bl=148 pwr=0
2025-03-30 06:12:07 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=107 tn=6 bl=148 pwr=0
2025-03-30 06:12:07 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=107 tn=7 bl=148 pwr=0
2025-03-30 06:12:07 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 06:12:07 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 06:12:07 [DEBUG] fake_trx.py:317 (BTS@172.18.26.20:5700) Recv FAKE_CI cmd
2025-03-30 06:12:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:12:07 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:12:07 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:12:07 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:12:07 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:12:07 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:12:07 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:12:07 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:12:07 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:12:07 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 06:12:07 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 06:12:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:12:07 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:12:07 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:12:07 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:12:07 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:12:07 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-03-30 06:12:07 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:12:07 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:12:07 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:12:07 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:12:08 [DEBUG] clck_gen.py:128 IND CLOCK 306
2025-03-30 06:12:08 [DEBUG] clck_gen.py:128 IND CLOCK 408
2025-03-30 06:12:08 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:12:08 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:12:08 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:12:08 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:12:09 [DEBUG] clck_gen.py:128 IND CLOCK 510
2025-03-30 06:12:09 [DEBUG] clck_gen.py:128 IND CLOCK 612
2025-03-30 06:12:09 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:12:09 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:12:09 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:12:09 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:12:10 [DEBUG] clck_gen.py:128 IND CLOCK 714
2025-03-30 06:12:10 [DEBUG] clck_gen.py:128 IND CLOCK 816
2025-03-30 06:12:10 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:12:10 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:12:10 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:12:10 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:12:11 [DEBUG] clck_gen.py:128 IND CLOCK 918
2025-03-30 06:12:11 [DEBUG] clck_gen.py:128 IND CLOCK 1020
2025-03-30 06:12:11 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:12:11 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:12:11 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:12:11 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:12:11 [DEBUG] clck_gen.py:128 IND CLOCK 1122
2025-03-30 06:12:12 [DEBUG] clck_gen.py:128 IND CLOCK 1224
2025-03-30 06:12:12 [DEBUG] clck_gen.py:128 IND CLOCK 1326
2025-03-30 06:12:13 [DEBUG] clck_gen.py:128 IND CLOCK 1428
2025-03-30 06:12:13 [DEBUG] clck_gen.py:128 IND CLOCK 1530
2025-03-30 06:12:14 [DEBUG] clck_gen.py:128 IND CLOCK 1632
2025-03-30 06:12:14 [DEBUG] clck_gen.py:128 IND CLOCK 1734
2025-03-30 06:12:15 [DEBUG] clck_gen.py:128 IND CLOCK 1836
2025-03-30 06:12:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:12:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:12:15 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:12:15 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:12:15 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:12:15 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:12:15 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:12:15 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:12:15 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:12:15 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:12:15 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:12:15 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 06:12:15 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 06:12:15 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 06:12:15 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:12:20 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 06:12:20 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 06:12:20 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:12:20 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:12:20 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:12:20 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:12:20 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:12:20 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 06:12:20 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:12:20 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 06:12:20 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 06:12:20 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 06:12:20 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 06:12:20 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 06:12:20 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:12:20 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:12:20 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 06:12:20 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 06:12:20 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 06:12:20 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 06:12:20 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 06:12:20 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 06:12:20 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:12:20 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:12:20 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 06:12:20 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 06:12:20 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 06:12:20 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 06:12:20 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 06:12:20 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 06:12:20 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:12:20 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:12:20 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 06:12:20 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 06:12:20 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 06:12:20 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 06:12:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 06:12:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 06:12:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 06:12:20 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 06:12:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 06:12:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 06:12:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 06:12:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:12:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 06:12:20 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 06:12:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:12:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:12:20 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 06:12:20 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 06:12:20 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 06:12:20 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 06:12:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:12:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:12:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:12:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 06:12:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:12:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:12:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:12:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:12:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:12:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:12:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:12:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:12:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:12:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:12:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:12:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:12:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:12:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:12:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:12:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:12:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:12:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:12:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:12:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:12:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:12:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:12:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:12:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:12:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:12:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:12:20 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-03-30 06:12:20 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-03-30 06:12:20 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-03-30 06:12:20 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-03-30 06:12:20 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-03-30 06:12:20 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-03-30 06:12:20 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-03-30 06:12:20 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-03-30 06:12:20 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-03-30 06:12:20 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-03-30 06:12:20 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=0 bl=148 pwr=0
2025-03-30 06:12:20 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=1 bl=148 pwr=0
2025-03-30 06:12:20 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=2 bl=148 pwr=0
2025-03-30 06:12:20 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=3 bl=148 pwr=0
2025-03-30 06:12:20 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=4 bl=148 pwr=0
2025-03-30 06:12:20 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=5 bl=148 pwr=0
2025-03-30 06:12:20 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=6 bl=148 pwr=0
2025-03-30 06:12:20 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=7 bl=148 pwr=0
2025-03-30 06:12:20 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 06:12:20 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 06:12:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:12:20 [DEBUG] fake_trx.py:317 (BTS@172.18.26.20:5700) Recv FAKE_CI cmd
2025-03-30 06:12:21 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:12:21 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:12:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:12:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:12:21 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:12:21 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:12:21 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:12:21 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:12:21 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 06:12:21 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 06:12:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:12:21 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:12:21 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:12:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:12:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:12:21 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-03-30 06:12:21 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:12:21 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:12:21 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:12:21 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:12:21 [DEBUG] clck_gen.py:128 IND CLOCK 306
2025-03-30 06:12:22 [DEBUG] clck_gen.py:128 IND CLOCK 408
2025-03-30 06:12:22 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:12:22 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:12:22 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:12:22 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:12:22 [DEBUG] clck_gen.py:128 IND CLOCK 510
2025-03-30 06:12:23 [DEBUG] clck_gen.py:128 IND CLOCK 612
2025-03-30 06:12:23 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:12:23 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:12:23 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:12:23 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:12:23 [DEBUG] clck_gen.py:128 IND CLOCK 714
2025-03-30 06:12:24 [DEBUG] clck_gen.py:128 IND CLOCK 816
2025-03-30 06:12:24 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:12:24 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:12:24 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:12:24 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:12:24 [DEBUG] clck_gen.py:128 IND CLOCK 918
2025-03-30 06:12:25 [DEBUG] clck_gen.py:128 IND CLOCK 1020
2025-03-30 06:12:25 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:12:25 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:12:25 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:12:25 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:12:25 [DEBUG] clck_gen.py:128 IND CLOCK 1122
2025-03-30 06:12:26 [DEBUG] clck_gen.py:128 IND CLOCK 1224
2025-03-30 06:12:26 [DEBUG] clck_gen.py:128 IND CLOCK 1326
2025-03-30 06:12:27 [DEBUG] clck_gen.py:128 IND CLOCK 1428
2025-03-30 06:12:27 [DEBUG] clck_gen.py:128 IND CLOCK 1530
2025-03-30 06:12:27 [DEBUG] clck_gen.py:128 IND CLOCK 1632
2025-03-30 06:12:28 [DEBUG] clck_gen.py:128 IND CLOCK 1734
2025-03-30 06:12:28 [DEBUG] clck_gen.py:128 IND CLOCK 1836
2025-03-30 06:12:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:12:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:12:29 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:12:29 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:12:29 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:12:29 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:12:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:12:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:12:29 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:12:29 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:12:29 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:12:29 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:12:29 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 06:12:29 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 06:12:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:12:29 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:12:29 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:12:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:12:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:12:29 [DEBUG] clck_gen.py:128 IND CLOCK 1938
2025-03-30 06:12:29 [DEBUG] clck_gen.py:128 IND CLOCK 2040
2025-03-30 06:12:30 [DEBUG] clck_gen.py:128 IND CLOCK 2142
2025-03-30 06:12:30 [DEBUG] clck_gen.py:128 IND CLOCK 2244
2025-03-30 06:12:31 [DEBUG] clck_gen.py:128 IND CLOCK 2346
2025-03-30 06:12:31 [DEBUG] clck_gen.py:128 IND CLOCK 2448
2025-03-30 06:12:32 [DEBUG] clck_gen.py:128 IND CLOCK 2550
2025-03-30 06:12:32 [DEBUG] clck_gen.py:128 IND CLOCK 2652
2025-03-30 06:12:33 [DEBUG] clck_gen.py:128 IND CLOCK 2754
2025-03-30 06:12:33 [DEBUG] clck_gen.py:128 IND CLOCK 2856
2025-03-30 06:12:34 [DEBUG] clck_gen.py:128 IND CLOCK 2958
2025-03-30 06:12:34 [DEBUG] clck_gen.py:128 IND CLOCK 3060
2025-03-30 06:12:35 [DEBUG] clck_gen.py:128 IND CLOCK 3162
2025-03-30 06:12:35 [DEBUG] clck_gen.py:128 IND CLOCK 3264
2025-03-30 06:12:35 [DEBUG] clck_gen.py:128 IND CLOCK 3366
2025-03-30 06:12:36 [DEBUG] clck_gen.py:128 IND CLOCK 3468
2025-03-30 06:12:36 [DEBUG] clck_gen.py:128 IND CLOCK 3570
2025-03-30 06:12:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:12:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:12:37 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:12:37 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:12:37 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:12:37 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:12:37 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:12:37 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:12:37 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:12:37 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:12:37 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:12:37 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:12:37 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 06:12:37 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 06:12:37 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 06:12:37 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=3605 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:12:37 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=3605 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:12:37 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=3605 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:12:37 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=3605 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:12:37 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=3605 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:12:37 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=3605 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:12:37 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=3605 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:12:37 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=3605 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:12:42 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 06:12:42 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 06:12:42 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:12:42 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:12:42 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:12:42 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:12:42 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:12:42 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 06:12:42 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:12:42 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 06:12:42 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 06:12:42 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 06:12:42 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 06:12:42 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 06:12:42 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:12:42 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:12:42 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 06:12:42 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 06:12:42 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 06:12:42 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 06:12:42 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 06:12:42 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 06:12:42 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:12:42 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 06:12:42 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:12:42 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 06:12:42 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 06:12:42 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 06:12:42 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 06:12:42 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 06:12:42 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:12:42 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 06:12:42 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:12:42 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 06:12:42 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 06:12:42 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 06:12:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 06:12:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 06:12:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 06:12:42 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 06:12:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 06:12:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 06:12:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 06:12:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:12:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 06:12:42 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 06:12:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:12:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:12:42 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 06:12:42 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 06:12:42 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 06:12:42 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 06:12:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:12:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:12:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:12:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 06:12:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:12:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:12:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:12:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:12:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:12:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:12:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:12:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:12:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:12:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:12:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:12:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:12:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:12:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:12:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:12:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:12:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:12:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:12:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:12:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:12:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:12:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:12:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:12:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:12:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:12:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:12:42 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-03-30 06:12:42 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-03-30 06:12:42 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-03-30 06:12:42 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-03-30 06:12:42 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-03-30 06:12:42 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-03-30 06:12:42 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-03-30 06:12:42 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-03-30 06:12:42 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-03-30 06:12:42 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-03-30 06:12:42 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=0 bl=148 pwr=0
2025-03-30 06:12:42 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=1 bl=148 pwr=0
2025-03-30 06:12:42 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=2 bl=148 pwr=0
2025-03-30 06:12:42 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=3 bl=148 pwr=0
2025-03-30 06:12:42 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=4 bl=148 pwr=0
2025-03-30 06:12:42 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=5 bl=148 pwr=0
2025-03-30 06:12:42 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=6 bl=148 pwr=0
2025-03-30 06:12:42 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=7 bl=148 pwr=0
2025-03-30 06:12:42 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 06:12:42 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 06:12:42 [DEBUG] fake_trx.py:317 (BTS@172.18.26.20:5700) Recv FAKE_CI cmd
2025-03-30 06:12:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:12:42 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:12:42 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:12:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:12:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:12:42 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:12:42 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:12:42 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:12:42 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:12:42 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 06:12:42 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 06:12:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:12:42 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:12:42 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:12:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:12:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:12:43 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-03-30 06:12:43 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:12:43 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:12:43 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:12:43 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:12:43 [DEBUG] clck_gen.py:128 IND CLOCK 306
2025-03-30 06:12:44 [DEBUG] clck_gen.py:128 IND CLOCK 408
2025-03-30 06:12:44 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:12:44 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:12:44 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:12:44 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:12:44 [DEBUG] clck_gen.py:128 IND CLOCK 510
2025-03-30 06:12:44 [DEBUG] clck_gen.py:128 IND CLOCK 612
2025-03-30 06:12:45 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:12:45 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:12:45 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:12:45 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:12:45 [DEBUG] clck_gen.py:128 IND CLOCK 714
2025-03-30 06:12:45 [DEBUG] clck_gen.py:128 IND CLOCK 816
2025-03-30 06:12:46 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:12:46 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:12:46 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:12:46 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:12:46 [DEBUG] clck_gen.py:128 IND CLOCK 918
2025-03-30 06:12:46 [DEBUG] clck_gen.py:128 IND CLOCK 1020
2025-03-30 06:12:47 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:12:47 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:12:47 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:12:47 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:12:47 [DEBUG] clck_gen.py:128 IND CLOCK 1122
2025-03-30 06:12:47 [DEBUG] clck_gen.py:128 IND CLOCK 1224
2025-03-30 06:12:48 [DEBUG] clck_gen.py:128 IND CLOCK 1326
2025-03-30 06:12:48 [DEBUG] clck_gen.py:128 IND CLOCK 1428
2025-03-30 06:12:49 [DEBUG] clck_gen.py:128 IND CLOCK 1530
2025-03-30 06:12:49 [DEBUG] clck_gen.py:128 IND CLOCK 1632
2025-03-30 06:12:50 [DEBUG] clck_gen.py:128 IND CLOCK 1734
2025-03-30 06:12:50 [DEBUG] clck_gen.py:128 IND CLOCK 1836
2025-03-30 06:12:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:12:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:12:50 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:12:50 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:12:50 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:12:50 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:12:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:12:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:12:50 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:12:50 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:12:50 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:12:50 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:12:50 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 06:12:50 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 06:12:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:12:50 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:12:50 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:12:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:12:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:12:51 [DEBUG] clck_gen.py:128 IND CLOCK 1938
2025-03-30 06:12:51 [DEBUG] clck_gen.py:128 IND CLOCK 2040
2025-03-30 06:12:52 [DEBUG] clck_gen.py:128 IND CLOCK 2142
2025-03-30 06:12:52 [DEBUG] clck_gen.py:128 IND CLOCK 2244
2025-03-30 06:12:52 [DEBUG] clck_gen.py:128 IND CLOCK 2346
2025-03-30 06:12:53 [DEBUG] clck_gen.py:128 IND CLOCK 2448
2025-03-30 06:12:53 [DEBUG] clck_gen.py:128 IND CLOCK 2550
2025-03-30 06:12:54 [DEBUG] clck_gen.py:128 IND CLOCK 2652
2025-03-30 06:12:54 [DEBUG] clck_gen.py:128 IND CLOCK 2754
2025-03-30 06:12:55 [DEBUG] clck_gen.py:128 IND CLOCK 2856
2025-03-30 06:12:55 [DEBUG] clck_gen.py:128 IND CLOCK 2958
2025-03-30 06:12:56 [DEBUG] clck_gen.py:128 IND CLOCK 3060
2025-03-30 06:12:56 [DEBUG] clck_gen.py:128 IND CLOCK 3162
2025-03-30 06:12:57 [DEBUG] clck_gen.py:128 IND CLOCK 3264
2025-03-30 06:12:57 [DEBUG] clck_gen.py:128 IND CLOCK 3366
2025-03-30 06:12:58 [DEBUG] clck_gen.py:128 IND CLOCK 3468
2025-03-30 06:12:58 [DEBUG] clck_gen.py:128 IND CLOCK 3570
2025-03-30 06:12:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:12:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:12:58 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:12:58 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:12:58 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:12:58 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:12:58 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:12:58 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:12:58 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:12:58 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:12:58 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:12:58 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:12:58 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 06:12:58 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 06:12:58 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 06:13:03 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 06:13:03 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 06:13:03 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:13:03 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:13:03 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:13:03 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:13:03 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:13:03 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 06:13:03 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:13:03 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 06:13:03 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 06:13:03 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 06:13:03 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 06:13:03 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 06:13:03 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:13:03 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:13:03 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 06:13:03 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 06:13:03 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 06:13:03 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 06:13:03 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 06:13:03 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 06:13:03 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:13:03 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:13:03 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 06:13:03 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 06:13:03 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 06:13:03 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 06:13:03 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 06:13:03 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 06:13:03 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:13:03 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:13:03 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 06:13:03 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 06:13:03 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 06:13:03 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 06:13:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 06:13:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 06:13:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 06:13:03 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 06:13:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 06:13:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 06:13:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 06:13:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:13:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 06:13:03 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 06:13:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:13:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:13:03 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 06:13:03 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 06:13:03 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 06:13:03 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 06:13:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:13:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:13:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:13:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 06:13:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:13:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:13:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:13:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:13:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:13:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:13:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:13:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:13:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:13:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:13:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:13:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:13:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:13:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:13:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:13:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:13:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:13:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:13:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:13:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:13:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:13:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:13:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:13:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:13:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:13:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:13:03 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-03-30 06:13:04 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-03-30 06:13:04 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-03-30 06:13:04 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-03-30 06:13:04 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-03-30 06:13:04 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-03-30 06:13:04 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-03-30 06:13:04 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-03-30 06:13:04 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-03-30 06:13:04 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-03-30 06:13:04 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=0 bl=148 pwr=0
2025-03-30 06:13:04 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=1 bl=148 pwr=0
2025-03-30 06:13:04 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=2 bl=148 pwr=0
2025-03-30 06:13:04 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=3 bl=148 pwr=0
2025-03-30 06:13:04 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=4 bl=148 pwr=0
2025-03-30 06:13:04 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=5 bl=148 pwr=0
2025-03-30 06:13:04 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=6 bl=148 pwr=0
2025-03-30 06:13:04 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=7 bl=148 pwr=0
2025-03-30 06:13:04 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 06:13:04 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 06:13:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:13:04 [DEBUG] fake_trx.py:317 (BTS@172.18.26.20:5700) Recv FAKE_CI cmd
2025-03-30 06:13:04 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:13:04 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:13:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:13:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:13:04 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:13:04 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:13:04 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:13:04 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:13:04 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 06:13:04 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 06:13:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:13:04 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:13:04 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:13:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:13:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:13:04 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-03-30 06:13:04 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:13:04 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:13:04 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:13:04 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:13:05 [DEBUG] clck_gen.py:128 IND CLOCK 306
2025-03-30 06:13:05 [DEBUG] clck_gen.py:128 IND CLOCK 408
2025-03-30 06:13:05 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:13:05 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:13:05 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:13:05 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:13:06 [DEBUG] clck_gen.py:128 IND CLOCK 510
2025-03-30 06:13:06 [DEBUG] clck_gen.py:128 IND CLOCK 612
2025-03-30 06:13:06 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:13:06 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:13:06 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:13:06 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:13:07 [DEBUG] clck_gen.py:128 IND CLOCK 714
2025-03-30 06:13:07 [DEBUG] clck_gen.py:128 IND CLOCK 816
2025-03-30 06:13:07 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:13:07 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:13:07 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:13:07 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:13:08 [DEBUG] clck_gen.py:128 IND CLOCK 918
2025-03-30 06:13:08 [DEBUG] clck_gen.py:128 IND CLOCK 1020
2025-03-30 06:13:08 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:13:08 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:13:08 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:13:08 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:13:09 [DEBUG] clck_gen.py:128 IND CLOCK 1122
2025-03-30 06:13:09 [DEBUG] clck_gen.py:128 IND CLOCK 1224
2025-03-30 06:13:09 [DEBUG] clck_gen.py:128 IND CLOCK 1326
2025-03-30 06:13:10 [DEBUG] clck_gen.py:128 IND CLOCK 1428
2025-03-30 06:13:10 [DEBUG] clck_gen.py:128 IND CLOCK 1530
2025-03-30 06:13:11 [DEBUG] clck_gen.py:128 IND CLOCK 1632
2025-03-30 06:13:11 [DEBUG] clck_gen.py:128 IND CLOCK 1734
2025-03-30 06:13:12 [DEBUG] clck_gen.py:128 IND CLOCK 1836
2025-03-30 06:13:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:13:12 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:13:12 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:13:12 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:13:12 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:13:12 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:13:12 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:13:12 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:13:12 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:13:12 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:13:12 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:13:12 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:13:12 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 06:13:12 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 06:13:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:13:12 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:13:12 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:13:12 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:13:12 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:13:12 [DEBUG] clck_gen.py:128 IND CLOCK 1938
2025-03-30 06:13:13 [DEBUG] clck_gen.py:128 IND CLOCK 2040
2025-03-30 06:13:13 [DEBUG] clck_gen.py:128 IND CLOCK 2142
2025-03-30 06:13:14 [DEBUG] clck_gen.py:128 IND CLOCK 2244
2025-03-30 06:13:14 [DEBUG] clck_gen.py:128 IND CLOCK 2346
2025-03-30 06:13:15 [DEBUG] clck_gen.py:128 IND CLOCK 2448
2025-03-30 06:13:15 [DEBUG] clck_gen.py:128 IND CLOCK 2550
2025-03-30 06:13:16 [DEBUG] clck_gen.py:128 IND CLOCK 2652
2025-03-30 06:13:16 [DEBUG] clck_gen.py:128 IND CLOCK 2754
2025-03-30 06:13:17 [DEBUG] clck_gen.py:128 IND CLOCK 2856
2025-03-30 06:13:17 [DEBUG] clck_gen.py:128 IND CLOCK 2958
2025-03-30 06:13:17 [DEBUG] clck_gen.py:128 IND CLOCK 3060
2025-03-30 06:13:18 [DEBUG] clck_gen.py:128 IND CLOCK 3162
2025-03-30 06:13:18 [DEBUG] clck_gen.py:128 IND CLOCK 3264
2025-03-30 06:13:19 [DEBUG] clck_gen.py:128 IND CLOCK 3366
2025-03-30 06:13:19 [DEBUG] clck_gen.py:128 IND CLOCK 3468
2025-03-30 06:13:20 [DEBUG] clck_gen.py:128 IND CLOCK 3570
2025-03-30 06:13:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:13:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:13:20 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:13:20 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:13:20 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:13:20 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:13:20 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:13:20 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:13:20 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:13:20 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:13:20 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:13:20 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:13:20 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 06:13:20 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 06:13:20 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 06:13:25 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 06:13:25 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 06:13:25 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:13:25 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:13:25 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:13:25 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:13:25 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:13:25 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 06:13:25 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:13:25 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 06:13:25 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 06:13:25 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 06:13:25 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 06:13:25 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 06:13:25 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:13:25 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:13:25 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 06:13:25 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 06:13:25 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 06:13:25 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 06:13:25 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 06:13:25 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 06:13:25 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:13:25 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:13:25 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 06:13:25 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 06:13:25 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 06:13:25 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 06:13:25 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 06:13:25 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 06:13:25 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:13:25 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:13:25 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 06:13:25 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 06:13:25 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 06:13:25 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 06:13:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 06:13:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 06:13:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 06:13:25 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 06:13:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 06:13:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 06:13:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 06:13:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:13:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 06:13:25 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 06:13:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:13:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:13:25 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 06:13:25 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 06:13:25 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 06:13:25 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 06:13:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:13:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:13:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:13:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 06:13:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:13:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:13:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:13:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:13:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:13:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:13:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:13:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:13:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:13:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:13:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:13:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:13:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:13:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:13:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:13:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:13:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:13:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:13:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:13:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:13:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:13:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:13:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:13:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:13:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:13:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:13:25 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-03-30 06:13:26 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-03-30 06:13:26 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-03-30 06:13:26 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-03-30 06:13:26 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-03-30 06:13:26 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-03-30 06:13:26 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-03-30 06:13:26 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-03-30 06:13:26 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-03-30 06:13:26 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-03-30 06:13:26 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=0 bl=148 pwr=0
2025-03-30 06:13:26 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=1 bl=148 pwr=0
2025-03-30 06:13:26 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=2 bl=148 pwr=0
2025-03-30 06:13:26 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=3 bl=148 pwr=0
2025-03-30 06:13:26 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=4 bl=148 pwr=0
2025-03-30 06:13:26 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=5 bl=148 pwr=0
2025-03-30 06:13:26 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=6 bl=148 pwr=0
2025-03-30 06:13:26 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=7 bl=148 pwr=0
2025-03-30 06:13:26 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 06:13:26 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 06:13:26 [DEBUG] fake_trx.py:317 (BTS@172.18.26.20:5700) Recv FAKE_CI cmd
2025-03-30 06:13:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:13:26 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:13:26 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:13:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:13:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:13:26 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:13:26 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:13:26 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:13:26 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:13:26 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 06:13:26 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 06:13:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:13:26 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:13:26 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:13:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:13:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:13:26 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-03-30 06:13:26 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:13:26 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:13:26 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:13:26 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:13:26 [DEBUG] clck_gen.py:128 IND CLOCK 306
2025-03-30 06:13:26 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:13:26 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:13:26 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:13:26 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:13:26 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:13:26 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:13:26 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:13:26 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:13:26 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:13:26 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:13:26 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 06:13:26 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 06:13:26 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 06:13:31 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 06:13:31 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 06:13:32 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:13:32 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:13:32 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:13:32 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:13:32 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:13:32 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 06:13:32 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:13:32 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 06:13:32 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 06:13:32 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 06:13:32 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 06:13:32 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 06:13:32 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:13:32 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 06:13:32 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:13:32 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 06:13:32 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 06:13:32 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 06:13:32 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 06:13:32 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 06:13:32 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:13:32 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 06:13:32 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:13:32 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 06:13:32 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 06:13:32 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 06:13:32 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 06:13:32 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 06:13:32 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:13:32 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:13:32 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 06:13:32 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 06:13:32 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 06:13:32 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 06:13:32 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 06:13:32 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 06:13:32 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 06:13:32 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 06:13:32 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 06:13:32 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 06:13:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 06:13:32 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:13:32 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 06:13:32 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 06:13:32 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:13:32 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:13:32 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 06:13:32 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 06:13:32 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 06:13:32 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 06:13:32 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:13:32 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:13:32 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:13:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 06:13:32 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:13:32 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:13:32 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:13:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:13:32 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:13:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:13:32 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:13:32 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:13:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:13:32 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:13:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:13:32 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:13:32 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:13:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:13:32 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:13:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:13:32 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:13:32 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:13:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:13:32 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:13:32 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:13:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:13:32 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:13:32 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:13:32 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:13:32 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:13:32 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-03-30 06:13:32 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-03-30 06:13:32 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-03-30 06:13:32 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-03-30 06:13:32 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-03-30 06:13:32 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-03-30 06:13:32 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-03-30 06:13:32 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-03-30 06:13:32 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-03-30 06:13:32 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-03-30 06:13:32 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=0 bl=148 pwr=0
2025-03-30 06:13:32 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=1 bl=148 pwr=0
2025-03-30 06:13:32 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=2 bl=148 pwr=0
2025-03-30 06:13:32 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=3 bl=148 pwr=0
2025-03-30 06:13:32 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=4 bl=148 pwr=0
2025-03-30 06:13:32 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=5 bl=148 pwr=0
2025-03-30 06:13:32 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=6 bl=148 pwr=0
2025-03-30 06:13:32 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=7 bl=148 pwr=0
2025-03-30 06:13:32 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 06:13:32 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 06:13:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:13:32 [DEBUG] fake_trx.py:317 (BTS@172.18.26.20:5700) Recv FAKE_CI cmd
2025-03-30 06:13:32 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:13:32 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:13:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:13:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:13:32 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:13:32 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:13:32 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:13:32 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:13:32 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 06:13:32 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 06:13:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:13:32 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:13:32 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:13:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:13:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:13:32 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-03-30 06:13:33 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:13:33 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:13:33 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:13:33 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:13:33 [DEBUG] clck_gen.py:128 IND CLOCK 306
2025-03-30 06:13:33 [DEBUG] clck_gen.py:128 IND CLOCK 408
2025-03-30 06:13:34 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:13:34 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:13:34 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:13:34 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:13:34 [DEBUG] clck_gen.py:128 IND CLOCK 510
2025-03-30 06:13:34 [DEBUG] clck_gen.py:128 IND CLOCK 612
2025-03-30 06:13:35 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:13:35 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:13:35 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:13:35 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:13:35 [DEBUG] clck_gen.py:128 IND CLOCK 714
2025-03-30 06:13:35 [DEBUG] clck_gen.py:128 IND CLOCK 816
2025-03-30 06:13:36 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:13:36 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:13:36 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:13:36 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:13:36 [DEBUG] clck_gen.py:128 IND CLOCK 918
2025-03-30 06:13:36 [DEBUG] clck_gen.py:128 IND CLOCK 1020
2025-03-30 06:13:37 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:13:37 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:13:37 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:13:37 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:13:37 [DEBUG] clck_gen.py:128 IND CLOCK 1122
2025-03-30 06:13:37 [DEBUG] clck_gen.py:128 IND CLOCK 1224
2025-03-30 06:13:38 [DEBUG] clck_gen.py:128 IND CLOCK 1326
2025-03-30 06:13:38 [DEBUG] clck_gen.py:128 IND CLOCK 1428
2025-03-30 06:13:39 [DEBUG] clck_gen.py:128 IND CLOCK 1530
2025-03-30 06:13:39 [DEBUG] clck_gen.py:128 IND CLOCK 1632
2025-03-30 06:13:40 [DEBUG] clck_gen.py:128 IND CLOCK 1734
2025-03-30 06:13:40 [DEBUG] clck_gen.py:128 IND CLOCK 1836
2025-03-30 06:13:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:13:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:13:40 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:13:40 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:13:40 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:13:40 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:13:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:13:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:13:40 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:13:40 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:13:40 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:13:40 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:13:40 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 06:13:40 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 06:13:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:13:40 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:13:40 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:13:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:13:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:13:40 [DEBUG] clck_gen.py:128 IND CLOCK 1938
2025-03-30 06:13:41 [DEBUG] clck_gen.py:128 IND CLOCK 2040
2025-03-30 06:13:41 [DEBUG] clck_gen.py:128 IND CLOCK 2142
2025-03-30 06:13:42 [DEBUG] clck_gen.py:128 IND CLOCK 2244
2025-03-30 06:13:42 [DEBUG] clck_gen.py:128 IND CLOCK 2346
2025-03-30 06:13:43 [DEBUG] clck_gen.py:128 IND CLOCK 2448
2025-03-30 06:13:43 [DEBUG] clck_gen.py:128 IND CLOCK 2550
2025-03-30 06:13:44 [DEBUG] clck_gen.py:128 IND CLOCK 2652
2025-03-30 06:13:44 [DEBUG] clck_gen.py:128 IND CLOCK 2754
2025-03-30 06:13:45 [DEBUG] clck_gen.py:128 IND CLOCK 2856
2025-03-30 06:13:45 [DEBUG] clck_gen.py:128 IND CLOCK 2958
2025-03-30 06:13:46 [DEBUG] clck_gen.py:128 IND CLOCK 3060
2025-03-30 06:13:46 [DEBUG] clck_gen.py:128 IND CLOCK 3162
2025-03-30 06:13:47 [DEBUG] clck_gen.py:128 IND CLOCK 3264
2025-03-30 06:13:47 [DEBUG] clck_gen.py:128 IND CLOCK 3366
2025-03-30 06:13:48 [DEBUG] clck_gen.py:128 IND CLOCK 3468
2025-03-30 06:13:48 [DEBUG] clck_gen.py:128 IND CLOCK 3570
2025-03-30 06:13:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:13:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:13:48 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:13:48 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:13:48 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:13:48 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:13:48 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:13:48 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:13:48 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:13:48 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:13:48 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:13:48 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:13:48 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 06:13:48 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 06:13:48 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 06:13:48 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=3608 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:13:48 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=3609 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:13:48 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=3609 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:13:48 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=3609 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:13:48 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=3609 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:13:48 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=3609 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:13:48 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=3609 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:13:48 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=3609 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:13:48 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=3609 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:13:53 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 06:13:53 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 06:13:53 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:13:53 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:13:53 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:13:53 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:13:53 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:13:53 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 06:13:53 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:13:53 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 06:13:53 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 06:13:53 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 06:13:53 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 06:13:53 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 06:13:53 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:13:53 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:13:53 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 06:13:53 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 06:13:53 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 06:13:53 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 06:13:53 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 06:13:53 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 06:13:53 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:13:53 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:13:53 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 06:13:53 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 06:13:53 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 06:13:53 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 06:13:53 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 06:13:53 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 06:13:53 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:13:53 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:13:53 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 06:13:53 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 06:13:53 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 06:13:53 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 06:13:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 06:13:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 06:13:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 06:13:53 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 06:13:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 06:13:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 06:13:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 06:13:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 06:13:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:13:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:13:53 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 06:13:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:13:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:13:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:13:53 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 06:13:53 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 06:13:53 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 06:13:53 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 06:13:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:13:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:13:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:13:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 06:13:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:13:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:13:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:13:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:13:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:13:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:13:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:13:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:13:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:13:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:13:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:13:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:13:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:13:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:13:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:13:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:13:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:13:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:13:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:13:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:13:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:13:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:13:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:13:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:13:53 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-03-30 06:13:54 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-03-30 06:13:54 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-03-30 06:13:54 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-03-30 06:13:54 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-03-30 06:13:54 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-03-30 06:13:54 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-03-30 06:13:54 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-03-30 06:13:54 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-03-30 06:13:54 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-03-30 06:13:54 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=0 bl=148 pwr=0
2025-03-30 06:13:54 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=1 bl=148 pwr=0
2025-03-30 06:13:54 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=2 bl=148 pwr=0
2025-03-30 06:13:54 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=3 bl=148 pwr=0
2025-03-30 06:13:54 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=4 bl=148 pwr=0
2025-03-30 06:13:54 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=5 bl=148 pwr=0
2025-03-30 06:13:54 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=6 bl=148 pwr=0
2025-03-30 06:13:54 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=7 bl=148 pwr=0
2025-03-30 06:13:54 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 06:13:54 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 06:13:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:13:54 [DEBUG] fake_trx.py:317 (BTS@172.18.26.20:5700) Recv FAKE_CI cmd
2025-03-30 06:13:54 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:13:54 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:13:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:13:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:13:54 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:13:54 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:13:54 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:13:54 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:13:54 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 06:13:54 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 06:13:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:13:54 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:13:54 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:13:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:13:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:13:54 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-03-30 06:13:54 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:13:54 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:13:54 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:13:54 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:13:55 [DEBUG] clck_gen.py:128 IND CLOCK 306
2025-03-30 06:13:55 [DEBUG] clck_gen.py:128 IND CLOCK 408
2025-03-30 06:13:55 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:13:55 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:13:55 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:13:55 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:13:56 [DEBUG] clck_gen.py:128 IND CLOCK 510
2025-03-30 06:13:56 [DEBUG] clck_gen.py:128 IND CLOCK 612
2025-03-30 06:13:56 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:13:56 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:13:56 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:13:56 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:13:57 [DEBUG] clck_gen.py:128 IND CLOCK 714
2025-03-30 06:13:57 [DEBUG] clck_gen.py:128 IND CLOCK 816
2025-03-30 06:13:57 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:13:57 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:13:57 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:13:57 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:13:57 [DEBUG] clck_gen.py:128 IND CLOCK 918
2025-03-30 06:13:58 [DEBUG] clck_gen.py:128 IND CLOCK 1020
2025-03-30 06:13:58 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:13:58 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:13:58 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:13:58 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:13:58 [DEBUG] clck_gen.py:128 IND CLOCK 1122
2025-03-30 06:13:59 [DEBUG] clck_gen.py:128 IND CLOCK 1224
2025-03-30 06:13:59 [DEBUG] clck_gen.py:128 IND CLOCK 1326
2025-03-30 06:14:00 [DEBUG] clck_gen.py:128 IND CLOCK 1428
2025-03-30 06:14:00 [DEBUG] clck_gen.py:128 IND CLOCK 1530
2025-03-30 06:14:01 [DEBUG] clck_gen.py:128 IND CLOCK 1632
2025-03-30 06:14:01 [DEBUG] clck_gen.py:128 IND CLOCK 1734
2025-03-30 06:14:02 [DEBUG] clck_gen.py:128 IND CLOCK 1836
2025-03-30 06:14:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:14:02 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:14:02 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:14:02 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:14:02 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:14:02 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:14:02 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:14:02 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:14:02 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:14:02 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:14:02 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:14:02 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:14:02 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 06:14:02 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 06:14:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:14:02 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:14:02 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:14:02 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:14:02 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:14:02 [DEBUG] clck_gen.py:128 IND CLOCK 1938
2025-03-30 06:14:03 [DEBUG] clck_gen.py:128 IND CLOCK 2040
2025-03-30 06:14:03 [DEBUG] clck_gen.py:128 IND CLOCK 2142
2025-03-30 06:14:04 [DEBUG] clck_gen.py:128 IND CLOCK 2244
2025-03-30 06:14:04 [DEBUG] clck_gen.py:128 IND CLOCK 2346
2025-03-30 06:14:05 [DEBUG] clck_gen.py:128 IND CLOCK 2448
2025-03-30 06:14:05 [DEBUG] clck_gen.py:128 IND CLOCK 2550
2025-03-30 06:14:05 [DEBUG] clck_gen.py:128 IND CLOCK 2652
2025-03-30 06:14:06 [DEBUG] clck_gen.py:128 IND CLOCK 2754
2025-03-30 06:14:06 [DEBUG] clck_gen.py:128 IND CLOCK 2856
2025-03-30 06:14:07 [DEBUG] clck_gen.py:128 IND CLOCK 2958
2025-03-30 06:14:07 [DEBUG] clck_gen.py:128 IND CLOCK 3060
2025-03-30 06:14:08 [DEBUG] clck_gen.py:128 IND CLOCK 3162
2025-03-30 06:14:08 [DEBUG] clck_gen.py:128 IND CLOCK 3264
2025-03-30 06:14:09 [DEBUG] clck_gen.py:128 IND CLOCK 3366
2025-03-30 06:14:09 [DEBUG] clck_gen.py:128 IND CLOCK 3468
2025-03-30 06:14:10 [DEBUG] clck_gen.py:128 IND CLOCK 3570
2025-03-30 06:14:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:14:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:14:10 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:14:10 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:14:10 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:14:10 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:14:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:14:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:14:10 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:14:10 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:14:10 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:14:10 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:14:10 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 06:14:10 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 06:14:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:14:10 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:14:10 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:14:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:14:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:14:10 [DEBUG] clck_gen.py:128 IND CLOCK 3672
2025-03-30 06:14:11 [DEBUG] clck_gen.py:128 IND CLOCK 3774
2025-03-30 06:14:11 [DEBUG] clck_gen.py:128 IND CLOCK 3876
2025-03-30 06:14:12 [DEBUG] clck_gen.py:128 IND CLOCK 3978
2025-03-30 06:14:12 [DEBUG] clck_gen.py:128 IND CLOCK 4080
2025-03-30 06:14:13 [DEBUG] clck_gen.py:128 IND CLOCK 4182
2025-03-30 06:14:13 [DEBUG] clck_gen.py:128 IND CLOCK 4284
2025-03-30 06:14:13 [DEBUG] clck_gen.py:128 IND CLOCK 4386
2025-03-30 06:14:14 [DEBUG] clck_gen.py:128 IND CLOCK 4488
2025-03-30 06:14:14 [DEBUG] clck_gen.py:128 IND CLOCK 4590
2025-03-30 06:14:15 [DEBUG] clck_gen.py:128 IND CLOCK 4692
2025-03-30 06:14:15 [DEBUG] clck_gen.py:128 IND CLOCK 4794
2025-03-30 06:14:16 [DEBUG] clck_gen.py:128 IND CLOCK 4896
2025-03-30 06:14:16 [DEBUG] clck_gen.py:128 IND CLOCK 4998
2025-03-30 06:14:17 [DEBUG] clck_gen.py:128 IND CLOCK 5100
2025-03-30 06:14:17 [DEBUG] clck_gen.py:128 IND CLOCK 5202
2025-03-30 06:14:18 [DEBUG] clck_gen.py:128 IND CLOCK 5304
2025-03-30 06:14:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:14:18 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:14:18 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:14:18 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:14:18 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:14:18 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:14:18 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:14:18 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:14:18 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:14:18 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:14:18 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:14:18 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:14:18 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 06:14:18 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 06:14:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:14:18 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:14:18 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:14:18 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:14:18 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:14:18 [DEBUG] clck_gen.py:128 IND CLOCK 5406
2025-03-30 06:14:19 [DEBUG] clck_gen.py:128 IND CLOCK 5508
2025-03-30 06:14:19 [DEBUG] clck_gen.py:128 IND CLOCK 5610
2025-03-30 06:14:20 [DEBUG] clck_gen.py:128 IND CLOCK 5712
2025-03-30 06:14:20 [DEBUG] clck_gen.py:128 IND CLOCK 5814
2025-03-30 06:14:21 [DEBUG] clck_gen.py:128 IND CLOCK 5916
2025-03-30 06:14:21 [DEBUG] clck_gen.py:128 IND CLOCK 6018
2025-03-30 06:14:21 [DEBUG] clck_gen.py:128 IND CLOCK 6120
2025-03-30 06:14:22 [DEBUG] clck_gen.py:128 IND CLOCK 6222
2025-03-30 06:14:22 [DEBUG] clck_gen.py:128 IND CLOCK 6324
2025-03-30 06:14:23 [DEBUG] clck_gen.py:128 IND CLOCK 6426
2025-03-30 06:14:23 [DEBUG] clck_gen.py:128 IND CLOCK 6528
2025-03-30 06:14:24 [DEBUG] clck_gen.py:128 IND CLOCK 6630
2025-03-30 06:14:24 [DEBUG] clck_gen.py:128 IND CLOCK 6732
2025-03-30 06:14:25 [DEBUG] clck_gen.py:128 IND CLOCK 6834
2025-03-30 06:14:25 [DEBUG] clck_gen.py:128 IND CLOCK 6936
2025-03-30 06:14:26 [DEBUG] clck_gen.py:128 IND CLOCK 7038
2025-03-30 06:14:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:14:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:14:26 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:14:26 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:14:26 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:14:26 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:14:26 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:14:26 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:14:26 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:14:26 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:14:26 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:14:26 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:14:26 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 06:14:26 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 06:14:26 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 06:14:26 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=7115 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:14:26 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=7115 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:14:26 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=7115 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:14:26 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=7115 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:14:26 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=7115 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:14:26 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=7116 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:14:26 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=7116 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:14:26 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=7116 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:14:26 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=7116 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:14:26 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=7116 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:14:26 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=7116 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:14:26 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=7116 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:14:26 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=7116 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:14:31 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 06:14:31 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 06:14:31 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:14:31 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:14:31 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:14:31 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:14:31 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:14:31 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 06:14:31 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:14:31 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 06:14:31 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 06:14:31 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 06:14:31 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 06:14:31 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 06:14:31 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:14:31 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:14:31 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 06:14:31 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 06:14:31 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 06:14:31 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 06:14:31 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 06:14:31 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 06:14:31 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:14:31 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:14:31 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 06:14:31 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 06:14:31 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 06:14:31 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 06:14:31 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 06:14:31 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 06:14:31 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:14:31 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:14:31 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 06:14:31 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 06:14:31 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 06:14:31 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 06:14:31 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 06:14:31 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 06:14:31 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 06:14:31 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 06:14:31 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 06:14:31 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 06:14:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 06:14:31 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:14:31 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 06:14:31 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 06:14:31 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:14:31 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:14:31 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 06:14:31 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 06:14:31 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 06:14:31 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 06:14:31 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:14:31 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:14:31 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:14:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 06:14:31 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:14:31 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:14:31 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:14:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:14:31 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:14:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:14:31 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:14:31 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:14:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:14:31 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:14:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:14:31 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:14:31 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:14:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:14:31 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:14:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:14:31 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:14:31 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:14:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:14:31 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:14:31 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:14:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:14:31 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:14:31 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:14:31 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:14:31 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:14:31 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-03-30 06:14:32 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-03-30 06:14:32 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-03-30 06:14:32 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-03-30 06:14:32 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-03-30 06:14:32 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-03-30 06:14:32 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-03-30 06:14:32 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-03-30 06:14:32 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-03-30 06:14:32 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-03-30 06:14:32 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=0 bl=148 pwr=0
2025-03-30 06:14:32 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=1 bl=148 pwr=0
2025-03-30 06:14:32 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=2 bl=148 pwr=0
2025-03-30 06:14:32 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=3 bl=148 pwr=0
2025-03-30 06:14:32 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=4 bl=148 pwr=0
2025-03-30 06:14:32 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=5 bl=148 pwr=0
2025-03-30 06:14:32 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=6 bl=148 pwr=0
2025-03-30 06:14:32 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=7 bl=148 pwr=0
2025-03-30 06:14:32 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 06:14:32 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 06:14:32 [DEBUG] fake_trx.py:317 (BTS@172.18.26.20:5700) Recv FAKE_CI cmd
2025-03-30 06:14:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:14:32 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:14:32 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:14:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:14:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:14:32 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:14:32 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:14:32 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:14:32 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:14:32 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 06:14:32 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 06:14:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:14:32 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:14:32 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:14:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:14:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:14:32 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-03-30 06:14:32 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:14:32 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:14:32 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:14:32 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:14:32 [DEBUG] clck_gen.py:128 IND CLOCK 306
2025-03-30 06:14:33 [DEBUG] clck_gen.py:128 IND CLOCK 408
2025-03-30 06:14:33 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:14:33 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:14:33 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:14:33 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:14:33 [DEBUG] clck_gen.py:128 IND CLOCK 510
2025-03-30 06:14:34 [DEBUG] clck_gen.py:128 IND CLOCK 612
2025-03-30 06:14:34 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:14:34 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:14:34 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:14:34 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:14:34 [DEBUG] clck_gen.py:128 IND CLOCK 714
2025-03-30 06:14:35 [DEBUG] clck_gen.py:128 IND CLOCK 816
2025-03-30 06:14:35 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:14:35 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:14:35 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:14:35 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:14:35 [DEBUG] clck_gen.py:128 IND CLOCK 918
2025-03-30 06:14:36 [DEBUG] clck_gen.py:128 IND CLOCK 1020
2025-03-30 06:14:36 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:14:36 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:14:36 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:14:36 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:14:36 [DEBUG] clck_gen.py:128 IND CLOCK 1122
2025-03-30 06:14:37 [DEBUG] clck_gen.py:128 IND CLOCK 1224
2025-03-30 06:14:37 [DEBUG] clck_gen.py:128 IND CLOCK 1326
2025-03-30 06:14:38 [DEBUG] clck_gen.py:128 IND CLOCK 1428
2025-03-30 06:14:38 [DEBUG] clck_gen.py:128 IND CLOCK 1530
2025-03-30 06:14:39 [DEBUG] clck_gen.py:128 IND CLOCK 1632
2025-03-30 06:14:39 [DEBUG] clck_gen.py:128 IND CLOCK 1734
2025-03-30 06:14:40 [DEBUG] clck_gen.py:128 IND CLOCK 1836
2025-03-30 06:14:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:14:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:14:40 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:14:40 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:14:40 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:14:40 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:14:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:14:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:14:40 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:14:40 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:14:40 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:14:40 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:14:40 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 06:14:40 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 06:14:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:14:40 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:14:40 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:14:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:14:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:14:40 [DEBUG] clck_gen.py:128 IND CLOCK 1938
2025-03-30 06:14:40 [DEBUG] clck_gen.py:128 IND CLOCK 2040
2025-03-30 06:14:41 [DEBUG] clck_gen.py:128 IND CLOCK 2142
2025-03-30 06:14:41 [DEBUG] clck_gen.py:128 IND CLOCK 2244
2025-03-30 06:14:42 [DEBUG] clck_gen.py:128 IND CLOCK 2346
2025-03-30 06:14:42 [DEBUG] clck_gen.py:128 IND CLOCK 2448
2025-03-30 06:14:43 [DEBUG] clck_gen.py:128 IND CLOCK 2550
2025-03-30 06:14:43 [DEBUG] clck_gen.py:128 IND CLOCK 2652
2025-03-30 06:14:44 [DEBUG] clck_gen.py:128 IND CLOCK 2754
2025-03-30 06:14:44 [DEBUG] clck_gen.py:128 IND CLOCK 2856
2025-03-30 06:14:45 [DEBUG] clck_gen.py:128 IND CLOCK 2958
2025-03-30 06:14:45 [DEBUG] clck_gen.py:128 IND CLOCK 3060
2025-03-30 06:14:46 [DEBUG] clck_gen.py:128 IND CLOCK 3162
2025-03-30 06:14:46 [DEBUG] clck_gen.py:128 IND CLOCK 3264
2025-03-30 06:14:47 [DEBUG] clck_gen.py:128 IND CLOCK 3366
2025-03-30 06:14:47 [DEBUG] clck_gen.py:128 IND CLOCK 3468
2025-03-30 06:14:48 [DEBUG] clck_gen.py:128 IND CLOCK 3570
2025-03-30 06:14:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:14:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:14:48 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:14:48 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:14:48 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:14:48 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:14:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:14:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:14:48 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:14:48 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:14:48 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:14:48 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:14:48 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 06:14:48 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 06:14:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:14:48 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:14:48 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:14:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:14:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:14:48 [DEBUG] clck_gen.py:128 IND CLOCK 3672
2025-03-30 06:14:48 [DEBUG] clck_gen.py:128 IND CLOCK 3774
2025-03-30 06:14:49 [DEBUG] clck_gen.py:128 IND CLOCK 3876
2025-03-30 06:14:49 [DEBUG] clck_gen.py:128 IND CLOCK 3978
2025-03-30 06:14:50 [DEBUG] clck_gen.py:128 IND CLOCK 4080
2025-03-30 06:14:50 [DEBUG] clck_gen.py:128 IND CLOCK 4182
2025-03-30 06:14:51 [DEBUG] clck_gen.py:128 IND CLOCK 4284
2025-03-30 06:14:51 [DEBUG] clck_gen.py:128 IND CLOCK 4386
2025-03-30 06:14:52 [DEBUG] clck_gen.py:128 IND CLOCK 4488
2025-03-30 06:14:52 [DEBUG] clck_gen.py:128 IND CLOCK 4590
2025-03-30 06:14:53 [DEBUG] clck_gen.py:128 IND CLOCK 4692
2025-03-30 06:14:53 [DEBUG] clck_gen.py:128 IND CLOCK 4794
2025-03-30 06:14:54 [DEBUG] clck_gen.py:128 IND CLOCK 4896
2025-03-30 06:14:54 [DEBUG] clck_gen.py:128 IND CLOCK 4998
2025-03-30 06:14:55 [DEBUG] clck_gen.py:128 IND CLOCK 5100
2025-03-30 06:14:55 [DEBUG] clck_gen.py:128 IND CLOCK 5202
2025-03-30 06:14:56 [DEBUG] clck_gen.py:128 IND CLOCK 5304
2025-03-30 06:14:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:14:56 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:14:56 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:14:56 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:14:56 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:14:56 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:14:56 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:14:56 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:14:56 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:14:56 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:14:56 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:14:56 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:14:56 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 06:14:56 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 06:14:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:14:56 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:14:56 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:14:56 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:14:56 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:14:56 [DEBUG] clck_gen.py:128 IND CLOCK 5406
2025-03-30 06:14:57 [DEBUG] clck_gen.py:128 IND CLOCK 5508
2025-03-30 06:14:57 [DEBUG] clck_gen.py:128 IND CLOCK 5610
2025-03-30 06:14:57 [DEBUG] clck_gen.py:128 IND CLOCK 5712
2025-03-30 06:14:58 [DEBUG] clck_gen.py:128 IND CLOCK 5814
2025-03-30 06:14:58 [DEBUG] clck_gen.py:128 IND CLOCK 5916
2025-03-30 06:14:59 [DEBUG] clck_gen.py:128 IND CLOCK 6018
2025-03-30 06:14:59 [DEBUG] clck_gen.py:128 IND CLOCK 6120
2025-03-30 06:15:00 [DEBUG] clck_gen.py:128 IND CLOCK 6222
2025-03-30 06:15:00 [DEBUG] clck_gen.py:128 IND CLOCK 6324
2025-03-30 06:15:01 [DEBUG] clck_gen.py:128 IND CLOCK 6426
2025-03-30 06:15:01 [DEBUG] clck_gen.py:128 IND CLOCK 6528
2025-03-30 06:15:02 [DEBUG] clck_gen.py:128 IND CLOCK 6630
2025-03-30 06:15:02 [DEBUG] clck_gen.py:128 IND CLOCK 6732
2025-03-30 06:15:03 [DEBUG] clck_gen.py:128 IND CLOCK 6834
2025-03-30 06:15:03 [DEBUG] clck_gen.py:128 IND CLOCK 6936
2025-03-30 06:15:04 [DEBUG] clck_gen.py:128 IND CLOCK 7038
2025-03-30 06:15:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:15:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:15:04 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:15:04 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:15:04 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:15:04 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:15:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:15:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:15:04 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:15:04 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:15:04 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:15:04 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:15:04 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 06:15:04 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 06:15:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:15:04 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:15:04 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:15:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:15:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:15:04 [DEBUG] clck_gen.py:128 IND CLOCK 7140
2025-03-30 06:15:05 [DEBUG] clck_gen.py:128 IND CLOCK 7242
2025-03-30 06:15:05 [DEBUG] clck_gen.py:128 IND CLOCK 7344
2025-03-30 06:15:05 [DEBUG] clck_gen.py:128 IND CLOCK 7446
2025-03-30 06:15:06 [DEBUG] clck_gen.py:128 IND CLOCK 7548
2025-03-30 06:15:06 [DEBUG] clck_gen.py:128 IND CLOCK 7650
2025-03-30 06:15:07 [DEBUG] clck_gen.py:128 IND CLOCK 7752
2025-03-30 06:15:07 [DEBUG] clck_gen.py:128 IND CLOCK 7854
2025-03-30 06:15:08 [DEBUG] clck_gen.py:128 IND CLOCK 7956
2025-03-30 06:15:08 [DEBUG] clck_gen.py:128 IND CLOCK 8058
2025-03-30 06:15:09 [DEBUG] clck_gen.py:128 IND CLOCK 8160
2025-03-30 06:15:09 [DEBUG] clck_gen.py:128 IND CLOCK 8262
2025-03-30 06:15:10 [DEBUG] clck_gen.py:128 IND CLOCK 8364
2025-03-30 06:15:10 [DEBUG] clck_gen.py:128 IND CLOCK 8466
2025-03-30 06:15:11 [DEBUG] clck_gen.py:128 IND CLOCK 8568
2025-03-30 06:15:11 [DEBUG] clck_gen.py:128 IND CLOCK 8670
2025-03-30 06:15:12 [DEBUG] clck_gen.py:128 IND CLOCK 8772
2025-03-30 06:15:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:15:12 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:15:12 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:15:12 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:15:12 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:15:12 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:15:12 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:15:12 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:15:12 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:15:12 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:15:12 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:15:12 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:15:12 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 06:15:12 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 06:15:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:15:12 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:15:12 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:15:12 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:15:12 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:15:12 [DEBUG] clck_gen.py:128 IND CLOCK 8874
2025-03-30 06:15:13 [DEBUG] clck_gen.py:128 IND CLOCK 8976
2025-03-30 06:15:13 [DEBUG] clck_gen.py:128 IND CLOCK 9078
2025-03-30 06:15:13 [DEBUG] clck_gen.py:128 IND CLOCK 9180
2025-03-30 06:15:14 [DEBUG] clck_gen.py:128 IND CLOCK 9282
2025-03-30 06:15:14 [DEBUG] clck_gen.py:128 IND CLOCK 9384
2025-03-30 06:15:15 [DEBUG] clck_gen.py:128 IND CLOCK 9486
2025-03-30 06:15:15 [DEBUG] clck_gen.py:128 IND CLOCK 9588
2025-03-30 06:15:16 [DEBUG] clck_gen.py:128 IND CLOCK 9690
2025-03-30 06:15:16 [DEBUG] clck_gen.py:128 IND CLOCK 9792
2025-03-30 06:15:17 [DEBUG] clck_gen.py:128 IND CLOCK 9894
2025-03-30 06:15:17 [DEBUG] clck_gen.py:128 IND CLOCK 9996
2025-03-30 06:15:18 [DEBUG] clck_gen.py:128 IND CLOCK 10098
2025-03-30 06:15:18 [DEBUG] clck_gen.py:128 IND CLOCK 10200
2025-03-30 06:15:19 [DEBUG] clck_gen.py:128 IND CLOCK 10302
2025-03-30 06:15:19 [DEBUG] clck_gen.py:128 IND CLOCK 10404
2025-03-30 06:15:20 [DEBUG] clck_gen.py:128 IND CLOCK 10506
2025-03-30 06:15:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:15:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:15:20 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:15:20 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:15:20 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:15:20 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:15:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:15:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:15:20 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:15:20 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:15:20 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:15:20 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:15:20 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 06:15:20 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 06:15:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:15:20 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:15:20 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:15:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:15:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:15:20 [DEBUG] clck_gen.py:128 IND CLOCK 10608
2025-03-30 06:15:21 [DEBUG] clck_gen.py:128 IND CLOCK 10710
2025-03-30 06:15:21 [DEBUG] clck_gen.py:128 IND CLOCK 10812
2025-03-30 06:15:21 [DEBUG] clck_gen.py:128 IND CLOCK 10914
2025-03-30 06:15:22 [DEBUG] clck_gen.py:128 IND CLOCK 11016
2025-03-30 06:15:22 [DEBUG] clck_gen.py:128 IND CLOCK 11118
2025-03-30 06:15:23 [DEBUG] clck_gen.py:128 IND CLOCK 11220
2025-03-30 06:15:23 [DEBUG] clck_gen.py:128 IND CLOCK 11322
2025-03-30 06:15:24 [DEBUG] clck_gen.py:128 IND CLOCK 11424
2025-03-30 06:15:24 [DEBUG] clck_gen.py:128 IND CLOCK 11526
2025-03-30 06:15:25 [DEBUG] clck_gen.py:128 IND CLOCK 11628
2025-03-30 06:15:25 [DEBUG] clck_gen.py:128 IND CLOCK 11730
2025-03-30 06:15:26 [DEBUG] clck_gen.py:128 IND CLOCK 11832
2025-03-30 06:15:26 [DEBUG] clck_gen.py:128 IND CLOCK 11934
2025-03-30 06:15:27 [DEBUG] clck_gen.py:128 IND CLOCK 12036
2025-03-30 06:15:27 [DEBUG] clck_gen.py:128 IND CLOCK 12138
2025-03-30 06:15:28 [DEBUG] clck_gen.py:128 IND CLOCK 12240
2025-03-30 06:15:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:15:28 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:15:28 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:15:28 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:15:28 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:15:28 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:15:28 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:15:28 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:15:28 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:15:28 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:15:28 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:15:28 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:15:28 [DEBUG] clck_gen.py:128 IND CLOCK 12342
2025-03-30 06:15:28 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 06:15:28 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 06:15:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:15:28 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:15:28 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:15:28 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:15:28 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:15:29 [DEBUG] clck_gen.py:128 IND CLOCK 12444
2025-03-30 06:15:29 [DEBUG] clck_gen.py:128 IND CLOCK 12546
2025-03-30 06:15:29 [DEBUG] clck_gen.py:128 IND CLOCK 12648
2025-03-30 06:15:30 [DEBUG] clck_gen.py:128 IND CLOCK 12750
2025-03-30 06:15:30 [DEBUG] clck_gen.py:128 IND CLOCK 12852
2025-03-30 06:15:31 [DEBUG] clck_gen.py:128 IND CLOCK 12954
2025-03-30 06:15:31 [DEBUG] clck_gen.py:128 IND CLOCK 13056
2025-03-30 06:15:32 [DEBUG] clck_gen.py:128 IND CLOCK 13158
2025-03-30 06:15:32 [DEBUG] clck_gen.py:128 IND CLOCK 13260
2025-03-30 06:15:33 [DEBUG] clck_gen.py:128 IND CLOCK 13362
2025-03-30 06:15:33 [DEBUG] clck_gen.py:128 IND CLOCK 13464
2025-03-30 06:15:34 [DEBUG] clck_gen.py:128 IND CLOCK 13566
2025-03-30 06:15:34 [DEBUG] clck_gen.py:128 IND CLOCK 13668
2025-03-30 06:15:35 [DEBUG] clck_gen.py:128 IND CLOCK 13770
2025-03-30 06:15:35 [DEBUG] clck_gen.py:128 IND CLOCK 13872
2025-03-30 06:15:36 [DEBUG] clck_gen.py:128 IND CLOCK 13974
2025-03-30 06:15:36 [DEBUG] clck_gen.py:128 IND CLOCK 14076
2025-03-30 06:15:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:15:36 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:15:36 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:15:36 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:15:36 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:15:36 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:15:36 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:15:36 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:15:36 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:15:36 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:15:36 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:15:36 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:15:36 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 06:15:36 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 06:15:36 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 06:15:41 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 06:15:41 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 06:15:41 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:15:41 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:15:41 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:15:41 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:15:41 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:15:41 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 06:15:41 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:15:41 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 06:15:41 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 06:15:41 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 06:15:41 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 06:15:41 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 06:15:41 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:15:41 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 06:15:41 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:15:41 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 06:15:41 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 06:15:41 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 06:15:41 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 06:15:41 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 06:15:41 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:15:41 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 06:15:41 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:15:41 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 06:15:41 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 06:15:41 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 06:15:41 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 06:15:41 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 06:15:41 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:15:41 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 06:15:41 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:15:41 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 06:15:41 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 06:15:41 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 06:15:41 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 06:15:41 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 06:15:41 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 06:15:41 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 06:15:41 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 06:15:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 06:15:41 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 06:15:41 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 06:15:41 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 06:15:41 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:15:41 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:15:41 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 06:15:41 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 06:15:41 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 06:15:41 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 06:15:41 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:15:41 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:15:41 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:15:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 06:15:41 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:15:41 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:15:41 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:15:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:15:41 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:15:41 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:15:41 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:15:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:15:41 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:15:41 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:15:41 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:15:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:15:41 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:15:41 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:15:41 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:15:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:15:41 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:15:41 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:15:41 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:15:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:15:41 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:15:41 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:15:41 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:15:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:15:41 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:15:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:15:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:15:41 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:15:41 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:15:41 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:15:41 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:15:41 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 06:15:41 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 06:15:41 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 06:15:46 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 06:15:46 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 06:15:46 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:15:46 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:15:46 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:15:46 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:15:46 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:15:46 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 06:15:46 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:15:46 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 06:15:46 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 06:15:46 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 06:15:46 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 06:15:46 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 06:15:46 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:15:46 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 06:15:46 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:15:46 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 06:15:46 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 06:15:46 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 06:15:46 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 06:15:46 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 06:15:46 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:15:46 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 06:15:46 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:15:46 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 06:15:46 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 06:15:46 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 06:15:46 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 06:15:46 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 06:15:46 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:15:46 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 06:15:46 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:15:46 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 06:15:46 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 06:15:46 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 06:15:46 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 06:15:46 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 06:15:46 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 06:15:46 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 06:15:46 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 06:15:46 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 06:15:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 06:15:46 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:15:46 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 06:15:46 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 06:15:46 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:15:46 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:15:46 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 06:15:46 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 06:15:46 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 06:15:46 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 06:15:46 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:15:46 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:15:46 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:15:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 06:15:46 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:15:46 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:15:46 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:15:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:15:46 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:15:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:15:46 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:15:46 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:15:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:15:46 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:15:46 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:15:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:15:46 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:15:46 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:15:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:15:46 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:15:46 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:15:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:15:46 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:15:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:15:46 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:15:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:15:46 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:15:46 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:15:46 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:15:46 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:15:46 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-03-30 06:15:47 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-03-30 06:15:47 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-03-30 06:15:47 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-03-30 06:15:47 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-03-30 06:15:47 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-03-30 06:15:47 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-03-30 06:15:47 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-03-30 06:15:47 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-03-30 06:15:47 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-03-30 06:15:47 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 06:15:47 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 06:15:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:15:47 [DEBUG] fake_trx.py:317 (BTS@172.18.26.20:5700) Recv FAKE_CI cmd
2025-03-30 06:15:47 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:15:47 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:15:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:15:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:15:47 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:15:47 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:15:47 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:15:47 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:15:47 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 06:15:47 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 06:15:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:15:47 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:15:47 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:15:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:15:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:15:47 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-03-30 06:15:47 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:15:47 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:15:47 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:15:47 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:15:48 [DEBUG] clck_gen.py:128 IND CLOCK 306
2025-03-30 06:15:48 [DEBUG] clck_gen.py:128 IND CLOCK 408
2025-03-30 06:15:48 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:15:48 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:15:48 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:15:48 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:15:48 [DEBUG] clck_gen.py:128 IND CLOCK 510
2025-03-30 06:15:49 [DEBUG] clck_gen.py:128 IND CLOCK 612
2025-03-30 06:15:49 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:15:49 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:15:49 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:15:49 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:15:49 [DEBUG] clck_gen.py:128 IND CLOCK 714
2025-03-30 06:15:50 [DEBUG] clck_gen.py:128 IND CLOCK 816
2025-03-30 06:15:50 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:15:50 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:15:50 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:15:50 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:15:50 [DEBUG] clck_gen.py:128 IND CLOCK 918
2025-03-30 06:15:51 [DEBUG] clck_gen.py:128 IND CLOCK 1020
2025-03-30 06:15:51 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:15:51 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:15:51 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:15:51 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:15:51 [DEBUG] clck_gen.py:128 IND CLOCK 1122
2025-03-30 06:15:52 [DEBUG] clck_gen.py:128 IND CLOCK 1224
2025-03-30 06:15:52 [DEBUG] clck_gen.py:128 IND CLOCK 1326
2025-03-30 06:15:53 [DEBUG] clck_gen.py:128 IND CLOCK 1428
2025-03-30 06:15:53 [DEBUG] clck_gen.py:128 IND CLOCK 1530
2025-03-30 06:15:54 [DEBUG] clck_gen.py:128 IND CLOCK 1632
2025-03-30 06:15:54 [DEBUG] clck_gen.py:128 IND CLOCK 1734
2025-03-30 06:15:55 [DEBUG] clck_gen.py:128 IND CLOCK 1836
2025-03-30 06:15:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:15:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:15:55 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:15:55 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:15:55 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:15:55 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:15:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:15:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:15:55 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:15:55 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:15:55 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:15:55 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:15:55 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 06:15:55 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 06:15:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:15:55 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:15:55 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:15:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:15:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:15:55 [DEBUG] clck_gen.py:128 IND CLOCK 1938
2025-03-30 06:15:56 [DEBUG] clck_gen.py:128 IND CLOCK 2040
2025-03-30 06:15:56 [DEBUG] clck_gen.py:128 IND CLOCK 2142
2025-03-30 06:15:56 [DEBUG] clck_gen.py:128 IND CLOCK 2244
2025-03-30 06:15:57 [DEBUG] clck_gen.py:128 IND CLOCK 2346
2025-03-30 06:15:57 [DEBUG] clck_gen.py:128 IND CLOCK 2448
2025-03-30 06:15:58 [DEBUG] clck_gen.py:128 IND CLOCK 2550
2025-03-30 06:15:58 [DEBUG] clck_gen.py:128 IND CLOCK 2652
2025-03-30 06:15:59 [DEBUG] clck_gen.py:128 IND CLOCK 2754
2025-03-30 06:15:59 [DEBUG] clck_gen.py:128 IND CLOCK 2856
2025-03-30 06:16:00 [DEBUG] clck_gen.py:128 IND CLOCK 2958
2025-03-30 06:16:00 [DEBUG] clck_gen.py:128 IND CLOCK 3060
2025-03-30 06:16:01 [DEBUG] clck_gen.py:128 IND CLOCK 3162
2025-03-30 06:16:01 [DEBUG] clck_gen.py:128 IND CLOCK 3264
2025-03-30 06:16:02 [DEBUG] clck_gen.py:128 IND CLOCK 3366
2025-03-30 06:16:02 [DEBUG] clck_gen.py:128 IND CLOCK 3468
2025-03-30 06:16:03 [DEBUG] clck_gen.py:128 IND CLOCK 3570
2025-03-30 06:16:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:16:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:16:03 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:16:03 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:16:03 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:16:03 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:16:03 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:16:03 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:16:03 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:16:03 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:16:03 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:16:03 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:16:03 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 06:16:03 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 06:16:03 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 06:16:03 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=3606 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:16:03 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=3606 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:16:03 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=3606 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:16:03 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=3606 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:16:03 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=3606 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:16:03 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=3606 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:16:03 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=3606 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:16:08 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 06:16:08 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 06:16:08 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:16:08 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:16:08 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:16:08 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:16:08 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:16:08 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 06:16:08 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:16:08 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 06:16:08 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 06:16:08 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 06:16:08 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 06:16:08 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 06:16:08 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:16:08 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:16:08 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 06:16:08 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 06:16:08 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 06:16:08 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 06:16:08 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 06:16:08 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 06:16:08 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:16:08 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:16:08 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 06:16:08 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 06:16:08 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 06:16:08 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 06:16:08 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 06:16:08 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 06:16:08 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:16:08 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:16:08 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 06:16:08 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 06:16:08 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 06:16:08 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 06:16:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 06:16:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 06:16:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 06:16:08 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 06:16:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 06:16:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 06:16:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 06:16:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:16:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 06:16:08 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 06:16:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:16:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:16:08 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 06:16:08 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 06:16:08 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 06:16:08 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 06:16:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:16:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:16:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:16:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 06:16:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:16:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:16:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:16:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:16:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:16:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:16:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:16:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:16:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:16:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:16:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:16:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:16:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:16:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:16:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:16:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:16:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:16:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:16:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:16:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:16:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:16:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:16:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:16:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:16:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:16:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:16:08 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-03-30 06:16:08 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-03-30 06:16:08 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-03-30 06:16:08 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-03-30 06:16:08 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-03-30 06:16:08 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-03-30 06:16:08 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-03-30 06:16:08 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-03-30 06:16:08 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-03-30 06:16:08 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-03-30 06:16:08 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=0 bl=148 pwr=0
2025-03-30 06:16:08 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=1 bl=148 pwr=0
2025-03-30 06:16:08 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=2 bl=148 pwr=0
2025-03-30 06:16:08 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=3 bl=148 pwr=0
2025-03-30 06:16:08 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=4 bl=148 pwr=0
2025-03-30 06:16:08 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=5 bl=148 pwr=0
2025-03-30 06:16:08 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=6 bl=148 pwr=0
2025-03-30 06:16:08 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=7 bl=148 pwr=0
2025-03-30 06:16:08 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 06:16:08 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 06:16:08 [DEBUG] fake_trx.py:317 (BTS@172.18.26.20:5700) Recv FAKE_CI cmd
2025-03-30 06:16:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:16:08 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:16:08 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:16:08 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:16:08 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:16:08 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:16:08 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:16:08 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:16:08 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:16:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:16:08 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:16:08 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:16:08 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:16:08 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:16:09 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-03-30 06:16:09 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:16:09 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:16:09 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:16:09 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:16:09 [DEBUG] clck_gen.py:128 IND CLOCK 306
2025-03-30 06:16:10 [DEBUG] clck_gen.py:128 IND CLOCK 408
2025-03-30 06:16:10 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:16:10 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:16:10 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:16:10 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:16:10 [DEBUG] clck_gen.py:128 IND CLOCK 510
2025-03-30 06:16:11 [DEBUG] clck_gen.py:128 IND CLOCK 612
2025-03-30 06:16:11 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:16:11 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:16:11 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:16:11 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:16:11 [DEBUG] clck_gen.py:128 IND CLOCK 714
2025-03-30 06:16:12 [DEBUG] clck_gen.py:128 IND CLOCK 816
2025-03-30 06:16:12 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=852): ver=1 fn=842 tn=0 bl=148 pwr=0
2025-03-30 06:16:12 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=852): ver=1 fn=842 tn=1 bl=148 pwr=0
2025-03-30 06:16:12 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=852): ver=1 fn=842 tn=2 bl=148 pwr=0
2025-03-30 06:16:12 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=852): ver=1 fn=842 tn=3 bl=148 pwr=0
2025-03-30 06:16:12 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=852): ver=1 fn=842 tn=4 bl=148 pwr=0
2025-03-30 06:16:12 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=852): ver=1 fn=842 tn=5 bl=148 pwr=0
2025-03-30 06:16:12 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=852): ver=1 fn=842 tn=6 bl=148 pwr=0
2025-03-30 06:16:12 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=852): ver=1 fn=842 tn=7 bl=148 pwr=0
2025-03-30 06:16:12 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=852): ver=1 fn=843 tn=0 bl=148 pwr=0
2025-03-30 06:16:12 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=852): ver=1 fn=843 tn=1 bl=148 pwr=0
2025-03-30 06:16:12 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=852): ver=1 fn=843 tn=2 bl=148 pwr=0
2025-03-30 06:16:12 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=852): ver=1 fn=843 tn=3 bl=148 pwr=0
2025-03-30 06:16:12 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=852): ver=1 fn=843 tn=4 bl=148 pwr=0
2025-03-30 06:16:12 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=852): ver=1 fn=843 tn=5 bl=148 pwr=0
2025-03-30 06:16:12 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=852): ver=1 fn=843 tn=6 bl=148 pwr=0
2025-03-30 06:16:12 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=852): ver=1 fn=843 tn=7 bl=148 pwr=0
2025-03-30 06:16:12 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=852): ver=1 fn=844 tn=0 bl=148 pwr=0
2025-03-30 06:16:12 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=852): ver=1 fn=844 tn=1 bl=148 pwr=0
2025-03-30 06:16:12 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=852): ver=1 fn=844 tn=2 bl=148 pwr=0
2025-03-30 06:16:12 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=852): ver=1 fn=844 tn=3 bl=148 pwr=0
2025-03-30 06:16:12 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=852): ver=1 fn=844 tn=4 bl=148 pwr=0
2025-03-30 06:16:12 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=852): ver=1 fn=844 tn=5 bl=148 pwr=0
2025-03-30 06:16:12 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=852): ver=1 fn=844 tn=6 bl=148 pwr=0
2025-03-30 06:16:12 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=852): ver=1 fn=844 tn=7 bl=148 pwr=0
2025-03-30 06:16:12 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=852): ver=1 fn=845 tn=0 bl=148 pwr=0
2025-03-30 06:16:12 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=852): ver=1 fn=845 tn=1 bl=148 pwr=0
2025-03-30 06:16:12 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=852): ver=1 fn=845 tn=2 bl=148 pwr=0
2025-03-30 06:16:12 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=852): ver=1 fn=845 tn=3 bl=148 pwr=0
2025-03-30 06:16:12 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=852): ver=1 fn=845 tn=4 bl=148 pwr=0
2025-03-30 06:16:12 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=852): ver=1 fn=845 tn=5 bl=148 pwr=0
2025-03-30 06:16:12 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=852): ver=1 fn=845 tn=6 bl=148 pwr=0
2025-03-30 06:16:12 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=852): ver=1 fn=845 tn=7 bl=148 pwr=0
2025-03-30 06:16:12 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=853): ver=1 fn=846 tn=0 bl=148 pwr=0
2025-03-30 06:16:12 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=853): ver=1 fn=846 tn=1 bl=148 pwr=0
2025-03-30 06:16:12 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=853): ver=1 fn=846 tn=2 bl=148 pwr=0
2025-03-30 06:16:12 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=853): ver=1 fn=846 tn=3 bl=148 pwr=0
2025-03-30 06:16:12 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=853): ver=1 fn=846 tn=4 bl=148 pwr=0
2025-03-30 06:16:12 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=853): ver=1 fn=846 tn=5 bl=148 pwr=0
2025-03-30 06:16:12 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=853): ver=1 fn=846 tn=6 bl=148 pwr=0
2025-03-30 06:16:12 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=853): ver=1 fn=846 tn=7 bl=148 pwr=0
2025-03-30 06:16:12 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=853): ver=1 fn=847 tn=0 bl=148 pwr=0
2025-03-30 06:16:12 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=853): ver=1 fn=847 tn=1 bl=148 pwr=0
2025-03-30 06:16:12 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=853): ver=1 fn=847 tn=2 bl=148 pwr=0
2025-03-30 06:16:12 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=853): ver=1 fn=847 tn=3 bl=148 pwr=0
2025-03-30 06:16:12 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=853): ver=1 fn=847 tn=4 bl=148 pwr=0
2025-03-30 06:16:12 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=853): ver=1 fn=847 tn=5 bl=148 pwr=0
2025-03-30 06:16:12 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=853): ver=1 fn=847 tn=6 bl=148 pwr=0
2025-03-30 06:16:12 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=853): ver=1 fn=847 tn=7 bl=148 pwr=0
2025-03-30 06:16:12 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=853): ver=1 fn=848 tn=0 bl=148 pwr=0
2025-03-30 06:16:12 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=853): ver=1 fn=848 tn=1 bl=148 pwr=0
2025-03-30 06:16:12 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=853): ver=1 fn=848 tn=2 bl=148 pwr=0
2025-03-30 06:16:12 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=853): ver=1 fn=848 tn=3 bl=148 pwr=0
2025-03-30 06:16:12 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=853): ver=1 fn=848 tn=4 bl=148 pwr=0
2025-03-30 06:16:12 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=853): ver=1 fn=848 tn=5 bl=148 pwr=0
2025-03-30 06:16:12 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=853): ver=1 fn=848 tn=6 bl=148 pwr=0
2025-03-30 06:16:12 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=853): ver=1 fn=848 tn=7 bl=148 pwr=0
2025-03-30 06:16:12 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=853): ver=1 fn=849 tn=0 bl=148 pwr=0
2025-03-30 06:16:12 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=853): ver=1 fn=849 tn=1 bl=148 pwr=0
2025-03-30 06:16:12 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=853): ver=1 fn=849 tn=2 bl=148 pwr=0
2025-03-30 06:16:12 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=853): ver=1 fn=849 tn=3 bl=148 pwr=0
2025-03-30 06:16:12 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=853): ver=1 fn=849 tn=4 bl=148 pwr=0
2025-03-30 06:16:12 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=853): ver=1 fn=849 tn=5 bl=148 pwr=0
2025-03-30 06:16:12 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=853): ver=1 fn=849 tn=6 bl=148 pwr=0
2025-03-30 06:16:12 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=853): ver=1 fn=849 tn=7 bl=148 pwr=0
2025-03-30 06:16:12 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=853): ver=1 fn=850 tn=0 bl=148 pwr=0
2025-03-30 06:16:12 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=853): ver=1 fn=850 tn=1 bl=148 pwr=0
2025-03-30 06:16:12 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=853): ver=1 fn=850 tn=2 bl=148 pwr=0
2025-03-30 06:16:12 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=853): ver=1 fn=850 tn=3 bl=148 pwr=0
2025-03-30 06:16:12 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=853): ver=1 fn=850 tn=4 bl=148 pwr=0
2025-03-30 06:16:12 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=853): ver=1 fn=850 tn=5 bl=148 pwr=0
2025-03-30 06:16:12 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=853): ver=1 fn=850 tn=6 bl=148 pwr=0
2025-03-30 06:16:12 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=853): ver=1 fn=850 tn=7 bl=148 pwr=0
2025-03-30 06:16:12 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=853): ver=1 fn=851 tn=0 bl=148 pwr=0
2025-03-30 06:16:12 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=853): ver=1 fn=851 tn=1 bl=148 pwr=0
2025-03-30 06:16:12 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=853): ver=1 fn=851 tn=2 bl=148 pwr=0
2025-03-30 06:16:12 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=853): ver=1 fn=851 tn=3 bl=148 pwr=0
2025-03-30 06:16:12 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=853): ver=1 fn=851 tn=4 bl=148 pwr=0
2025-03-30 06:16:12 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=853): ver=1 fn=851 tn=5 bl=148 pwr=0
2025-03-30 06:16:12 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=853): ver=1 fn=851 tn=6 bl=148 pwr=0
2025-03-30 06:16:12 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=853): ver=1 fn=851 tn=7 bl=148 pwr=0
2025-03-30 06:16:12 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=853): ver=1 fn=852 tn=0 bl=148 pwr=0
2025-03-30 06:16:12 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=853): ver=1 fn=852 tn=1 bl=148 pwr=0
2025-03-30 06:16:12 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=853): ver=1 fn=852 tn=2 bl=148 pwr=0
2025-03-30 06:16:12 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=853): ver=1 fn=852 tn=3 bl=148 pwr=0
2025-03-30 06:16:12 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=853): ver=1 fn=852 tn=4 bl=148 pwr=0
2025-03-30 06:16:12 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=853): ver=1 fn=852 tn=5 bl=148 pwr=0
2025-03-30 06:16:12 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=853): ver=1 fn=852 tn=6 bl=148 pwr=0
2025-03-30 06:16:12 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=853): ver=1 fn=852 tn=7 bl=148 pwr=0
2025-03-30 06:16:12 [WARNING] transceiver.py:330 (MS@172.18.26.22:6700) Stale TRXD message (fn=853): fn=841 tn=1 bl=148 pwr=0
2025-03-30 06:16:12 [WARNING] transceiver.py:330 (MS@172.18.26.22:6700) Stale TRXD message (fn=853): fn=841 tn=2 pwr=0
2025-03-30 06:16:12 [WARNING] transceiver.py:330 (MS@172.18.26.22:6700) Stale TRXD message (fn=853): fn=841 tn=3 pwr=0
2025-03-30 06:16:12 [WARNING] transceiver.py:330 (MS@172.18.26.22:6700) Stale TRXD message (fn=853): fn=841 tn=4 pwr=0
2025-03-30 06:16:12 [WARNING] transceiver.py:330 (MS@172.18.26.22:6700) Stale TRXD message (fn=853): fn=841 tn=5 pwr=0
2025-03-30 06:16:12 [WARNING] transceiver.py:330 (MS@172.18.26.22:6700) Stale TRXD message (fn=853): fn=841 tn=6 pwr=0
2025-03-30 06:16:12 [WARNING] transceiver.py:330 (MS@172.18.26.22:6700) Stale TRXD message (fn=853): fn=841 tn=7 pwr=0
2025-03-30 06:16:12 [WARNING] transceiver.py:330 (MS@172.18.26.22:6700) Stale TRXD message (fn=853): fn=842 tn=0 pwr=0
2025-03-30 06:16:12 [WARNING] transceiver.py:330 (MS@172.18.26.22:6700) Stale TRXD message (fn=853): fn=842 tn=1 bl=148 pwr=0
2025-03-30 06:16:12 [WARNING] transceiver.py:330 (MS@172.18.26.22:6700) Stale TRXD message (fn=853): fn=842 tn=2 pwr=0
2025-03-30 06:16:12 [WARNING] transceiver.py:330 (MS@172.18.26.22:6700) Stale TRXD message (fn=853): fn=842 tn=3 pwr=0
2025-03-30 06:16:12 [WARNING] transceiver.py:330 (MS@172.18.26.22:6700) Stale TRXD message (fn=853): fn=842 tn=4 pwr=0
2025-03-30 06:16:12 [WARNING] transceiver.py:330 (MS@172.18.26.22:6700) Stale TRXD message (fn=853): fn=842 tn=5 pwr=0
2025-03-30 06:16:12 [WARNING] transceiver.py:330 (MS@172.18.26.22:6700) Stale TRXD message (fn=853): fn=842 tn=6 pwr=0
2025-03-30 06:16:12 [WARNING] transceiver.py:330 (MS@172.18.26.22:6700) Stale TRXD message (fn=853): fn=842 tn=7 pwr=0
2025-03-30 06:16:12 [WARNING] transceiver.py:330 (MS@172.18.26.22:6700) Stale TRXD message (fn=853): fn=843 tn=0 pwr=0
2025-03-30 06:16:12 [WARNING] transceiver.py:330 (MS@172.18.26.22:6700) Stale TRXD message (fn=853): fn=843 tn=1 bl=148 pwr=0
2025-03-30 06:16:12 [WARNING] transceiver.py:330 (MS@172.18.26.22:6700) Stale TRXD message (fn=853): fn=843 tn=2 pwr=0
2025-03-30 06:16:12 [WARNING] transceiver.py:330 (MS@172.18.26.22:6700) Stale TRXD message (fn=853): fn=843 tn=3 pwr=0
2025-03-30 06:16:12 [WARNING] transceiver.py:330 (MS@172.18.26.22:6700) Stale TRXD message (fn=853): fn=843 tn=4 pwr=0
2025-03-30 06:16:12 [WARNING] transceiver.py:330 (MS@172.18.26.22:6700) Stale TRXD message (fn=853): fn=843 tn=5 pwr=0
2025-03-30 06:16:12 [WARNING] transceiver.py:330 (MS@172.18.26.22:6700) Stale TRXD message (fn=853): fn=843 tn=6 pwr=0
2025-03-30 06:16:12 [WARNING] transceiver.py:330 (MS@172.18.26.22:6700) Stale TRXD message (fn=853): fn=843 tn=7 pwr=0
2025-03-30 06:16:12 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:16:12 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:16:12 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:16:12 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:16:12 [DEBUG] clck_gen.py:128 IND CLOCK 918
2025-03-30 06:16:12 [DEBUG] clck_gen.py:128 IND CLOCK 1020
2025-03-30 06:16:13 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:16:13 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:16:13 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:16:13 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:16:13 [DEBUG] clck_gen.py:128 IND CLOCK 1122
2025-03-30 06:16:13 [DEBUG] clck_gen.py:128 IND CLOCK 1224
2025-03-30 06:16:14 [DEBUG] clck_gen.py:128 IND CLOCK 1326
2025-03-30 06:16:14 [DEBUG] clck_gen.py:128 IND CLOCK 1428
2025-03-30 06:16:15 [DEBUG] clck_gen.py:128 IND CLOCK 1530
2025-03-30 06:16:15 [DEBUG] clck_gen.py:128 IND CLOCK 1632
2025-03-30 06:16:16 [DEBUG] clck_gen.py:128 IND CLOCK 1734
2025-03-30 06:16:16 [DEBUG] clck_gen.py:128 IND CLOCK 1836
2025-03-30 06:16:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:16:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:16:16 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:16:16 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:16:16 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:16:16 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:16:16 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:16:16 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:16:16 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:16:16 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:16:16 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:16:16 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 06:16:16 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 06:16:16 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 06:16:16 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=1863 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:16:16 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:16:16 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=1863 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:16:16 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=1863 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:16:16 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=1863 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:16:16 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=1863 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:16:16 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=1863 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:16:16 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=1863 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:16:16 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=1863 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:16:21 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 06:16:21 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 06:16:21 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:16:21 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:16:21 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:16:21 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:16:21 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:16:21 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 06:16:21 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:16:21 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 06:16:21 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 06:16:21 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 06:16:21 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 06:16:21 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 06:16:21 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:16:21 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 06:16:21 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:16:21 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 06:16:21 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 06:16:21 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 06:16:21 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 06:16:21 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 06:16:21 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:16:21 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:16:21 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 06:16:21 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 06:16:21 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 06:16:21 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 06:16:21 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 06:16:21 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 06:16:21 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:16:21 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:16:21 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 06:16:21 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 06:16:21 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 06:16:21 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 06:16:21 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 06:16:21 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 06:16:21 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 06:16:21 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 06:16:21 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 06:16:21 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 06:16:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 06:16:21 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:16:21 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 06:16:21 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 06:16:21 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:16:21 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:16:21 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 06:16:21 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 06:16:21 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 06:16:21 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 06:16:21 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:16:21 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:16:21 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:16:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 06:16:21 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:16:21 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:16:21 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:16:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:16:21 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:16:21 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:16:21 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:16:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:16:21 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:16:21 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:16:21 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:16:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:16:21 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:16:21 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:16:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:16:21 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:16:21 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:16:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:16:21 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:16:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:16:21 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:16:21 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:16:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:16:21 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:16:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:16:21 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:16:21 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-03-30 06:16:22 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-03-30 06:16:22 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-03-30 06:16:22 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-03-30 06:16:22 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-03-30 06:16:22 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-03-30 06:16:22 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-03-30 06:16:22 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-03-30 06:16:22 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-03-30 06:16:22 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-03-30 06:16:22 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 06:16:22 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 06:16:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:16:22 [DEBUG] fake_trx.py:317 (BTS@172.18.26.20:5700) Recv FAKE_CI cmd
2025-03-30 06:16:22 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:16:22 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:16:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:16:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:16:22 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:16:22 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:16:22 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:16:22 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:16:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:16:22 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:16:22 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:16:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:16:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:16:22 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-03-30 06:16:22 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:16:22 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:16:22 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:16:22 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:16:23 [DEBUG] clck_gen.py:128 IND CLOCK 306
2025-03-30 06:16:23 [DEBUG] clck_gen.py:128 IND CLOCK 408
2025-03-30 06:16:23 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:16:23 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:16:23 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:16:23 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:16:24 [DEBUG] clck_gen.py:128 IND CLOCK 510
2025-03-30 06:16:24 [DEBUG] clck_gen.py:128 IND CLOCK 612
2025-03-30 06:16:24 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:16:24 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:16:24 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:16:24 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:16:25 [DEBUG] clck_gen.py:128 IND CLOCK 714
2025-03-30 06:16:25 [DEBUG] clck_gen.py:128 IND CLOCK 816
2025-03-30 06:16:25 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:16:25 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:16:25 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:16:25 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:16:26 [DEBUG] clck_gen.py:128 IND CLOCK 918
2025-03-30 06:16:26 [DEBUG] clck_gen.py:128 IND CLOCK 1020
2025-03-30 06:16:26 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:16:26 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:16:26 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:16:26 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:16:27 [DEBUG] clck_gen.py:128 IND CLOCK 1122
2025-03-30 06:16:27 [DEBUG] clck_gen.py:128 IND CLOCK 1224
2025-03-30 06:16:28 [DEBUG] clck_gen.py:128 IND CLOCK 1326
2025-03-30 06:16:28 [DEBUG] clck_gen.py:128 IND CLOCK 1428
2025-03-30 06:16:28 [DEBUG] clck_gen.py:128 IND CLOCK 1530
2025-03-30 06:16:29 [DEBUG] clck_gen.py:128 IND CLOCK 1632
2025-03-30 06:16:29 [DEBUG] clck_gen.py:128 IND CLOCK 1734
2025-03-30 06:16:30 [DEBUG] clck_gen.py:128 IND CLOCK 1836
2025-03-30 06:16:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:16:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:16:30 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:16:30 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:16:30 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:16:30 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:16:30 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:16:30 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:16:30 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:16:30 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:16:30 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:16:30 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 06:16:30 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 06:16:30 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 06:16:30 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:16:35 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 06:16:35 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 06:16:35 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:16:35 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:16:35 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:16:35 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:16:35 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:16:35 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 06:16:35 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:16:35 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 06:16:35 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 06:16:35 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 06:16:35 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 06:16:35 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 06:16:35 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:16:35 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:16:35 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 06:16:35 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 06:16:35 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 06:16:35 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 06:16:35 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 06:16:35 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 06:16:35 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:16:35 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:16:35 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 06:16:35 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 06:16:35 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 06:16:35 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 06:16:35 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 06:16:35 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 06:16:35 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:16:35 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:16:35 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 06:16:35 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 06:16:35 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 06:16:35 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 06:16:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 06:16:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 06:16:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 06:16:35 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 06:16:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 06:16:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 06:16:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 06:16:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:16:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 06:16:35 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 06:16:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:16:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:16:35 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 06:16:35 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 06:16:35 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 06:16:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:16:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:16:35 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 06:16:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:16:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 06:16:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:16:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:16:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:16:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:16:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:16:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:16:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:16:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:16:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:16:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:16:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:16:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:16:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:16:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:16:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:16:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:16:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:16:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:16:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:16:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:16:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:16:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:16:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:16:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:16:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:16:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:16:35 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-03-30 06:16:35 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-03-30 06:16:36 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=107): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-03-30 06:16:36 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=107): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-03-30 06:16:36 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=107): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-03-30 06:16:36 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=107): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-03-30 06:16:36 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=107): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-03-30 06:16:36 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=107): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-03-30 06:16:36 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=107): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-03-30 06:16:36 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=107): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-03-30 06:16:36 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=107): ver=1 fn=105 tn=0 bl=148 pwr=0
2025-03-30 06:16:36 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=107): ver=1 fn=105 tn=1 bl=148 pwr=0
2025-03-30 06:16:36 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=107): ver=1 fn=105 tn=2 bl=148 pwr=0
2025-03-30 06:16:36 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=107): ver=1 fn=105 tn=3 bl=148 pwr=0
2025-03-30 06:16:36 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=107): ver=1 fn=105 tn=4 bl=148 pwr=0
2025-03-30 06:16:36 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=107): ver=1 fn=105 tn=5 bl=148 pwr=0
2025-03-30 06:16:36 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=107): ver=1 fn=105 tn=6 bl=148 pwr=0
2025-03-30 06:16:36 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=107): ver=1 fn=105 tn=7 bl=148 pwr=0
2025-03-30 06:16:36 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=107): ver=1 fn=106 tn=0 bl=148 pwr=0
2025-03-30 06:16:36 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=107): ver=1 fn=106 tn=1 bl=148 pwr=0
2025-03-30 06:16:36 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=107): ver=1 fn=106 tn=2 bl=148 pwr=0
2025-03-30 06:16:36 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=107): ver=1 fn=106 tn=3 bl=148 pwr=0
2025-03-30 06:16:36 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=107): ver=1 fn=106 tn=4 bl=148 pwr=0
2025-03-30 06:16:36 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=107): ver=1 fn=106 tn=5 bl=148 pwr=0
2025-03-30 06:16:36 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=107): ver=1 fn=106 tn=6 bl=148 pwr=0
2025-03-30 06:16:36 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=107): ver=1 fn=106 tn=7 bl=148 pwr=0
2025-03-30 06:16:36 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=107 tn=7 bl=148 pwr=0
2025-03-30 06:16:36 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 06:16:36 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 06:16:36 [DEBUG] fake_trx.py:317 (BTS@172.18.26.20:5700) Recv FAKE_CI cmd
2025-03-30 06:16:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:16:36 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:16:36 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:16:36 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:16:36 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:16:36 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:16:36 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:16:36 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:16:36 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:16:36 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-03-30 06:16:36 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:16:36 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:16:36 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:16:36 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:16:36 [DEBUG] clck_gen.py:128 IND CLOCK 306
2025-03-30 06:16:37 [DEBUG] clck_gen.py:128 IND CLOCK 408
2025-03-30 06:16:37 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:16:37 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:16:37 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:16:37 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:16:37 [DEBUG] clck_gen.py:128 IND CLOCK 510
2025-03-30 06:16:38 [DEBUG] clck_gen.py:128 IND CLOCK 612
2025-03-30 06:16:38 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:16:38 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:16:38 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:16:38 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:16:38 [DEBUG] clck_gen.py:128 IND CLOCK 714
2025-03-30 06:16:39 [DEBUG] clck_gen.py:128 IND CLOCK 816
2025-03-30 06:16:39 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:16:39 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:16:39 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:16:39 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:16:39 [DEBUG] clck_gen.py:128 IND CLOCK 918
2025-03-30 06:16:40 [DEBUG] clck_gen.py:128 IND CLOCK 1020
2025-03-30 06:16:40 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:16:40 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:16:40 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:16:40 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:16:40 [DEBUG] clck_gen.py:128 IND CLOCK 1122
2025-03-30 06:16:41 [DEBUG] clck_gen.py:128 IND CLOCK 1224
2025-03-30 06:16:41 [DEBUG] clck_gen.py:128 IND CLOCK 1326
2025-03-30 06:16:42 [DEBUG] clck_gen.py:128 IND CLOCK 1428
2025-03-30 06:16:42 [DEBUG] clck_gen.py:128 IND CLOCK 1530
2025-03-30 06:16:42 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:16:42 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:16:42 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:16:42 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:16:42 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:16:42 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:16:42 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:16:42 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:16:42 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:16:42 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:16:42 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 06:16:42 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 06:16:42 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 06:16:47 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 06:16:47 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 06:16:47 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:16:47 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:16:47 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:16:47 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:16:47 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:16:47 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 06:16:47 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:16:47 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 06:16:47 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 06:16:47 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 06:16:47 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 06:16:47 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 06:16:47 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:16:47 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:16:47 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 06:16:47 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 06:16:47 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 06:16:47 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 06:16:47 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 06:16:47 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 06:16:47 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:16:47 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:16:47 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 06:16:47 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 06:16:47 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 06:16:47 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 06:16:47 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 06:16:47 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 06:16:47 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:16:47 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:16:47 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 06:16:47 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 06:16:47 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 06:16:47 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 06:16:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 06:16:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 06:16:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 06:16:47 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 06:16:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 06:16:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 06:16:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 06:16:47 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 06:16:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:16:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:16:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 06:16:47 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 06:16:47 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 06:16:47 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 06:16:47 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 06:16:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:16:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:16:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:16:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 06:16:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:16:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:16:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:16:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:16:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:16:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:16:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:16:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:16:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:16:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:16:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:16:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:16:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:16:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:16:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:16:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:16:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:16:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:16:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:16:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:16:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:16:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:16:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:16:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:16:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:16:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:16:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:16:47 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-03-30 06:16:48 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-03-30 06:16:48 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-03-30 06:16:48 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-03-30 06:16:48 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-03-30 06:16:48 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-03-30 06:16:48 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-03-30 06:16:48 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-03-30 06:16:48 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-03-30 06:16:48 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-03-30 06:16:48 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=0 bl=148 pwr=0
2025-03-30 06:16:48 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=1 bl=148 pwr=0
2025-03-30 06:16:48 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=2 bl=148 pwr=0
2025-03-30 06:16:48 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=3 bl=148 pwr=0
2025-03-30 06:16:48 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=4 bl=148 pwr=0
2025-03-30 06:16:48 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=5 bl=148 pwr=0
2025-03-30 06:16:48 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=6 bl=148 pwr=0
2025-03-30 06:16:48 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=7 bl=148 pwr=0
2025-03-30 06:16:48 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 06:16:48 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 06:16:48 [DEBUG] fake_trx.py:317 (BTS@172.18.26.20:5700) Recv FAKE_CI cmd
2025-03-30 06:16:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:16:48 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:16:48 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:16:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:16:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:16:48 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:16:48 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:16:48 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:16:48 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:16:48 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-03-30 06:16:48 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:16:48 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:16:48 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:16:48 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:16:49 [DEBUG] clck_gen.py:128 IND CLOCK 306
2025-03-30 06:16:49 [DEBUG] clck_gen.py:128 IND CLOCK 408
2025-03-30 06:16:49 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:16:49 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:16:49 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:16:49 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:16:50 [DEBUG] clck_gen.py:128 IND CLOCK 510
2025-03-30 06:16:50 [DEBUG] clck_gen.py:128 IND CLOCK 612
2025-03-30 06:16:50 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:16:50 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:16:50 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:16:50 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:16:51 [DEBUG] clck_gen.py:128 IND CLOCK 714
2025-03-30 06:16:51 [DEBUG] clck_gen.py:128 IND CLOCK 816
2025-03-30 06:16:51 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:16:51 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:16:51 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:16:51 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:16:51 [DEBUG] clck_gen.py:128 IND CLOCK 918
2025-03-30 06:16:52 [DEBUG] clck_gen.py:128 IND CLOCK 1020
2025-03-30 06:16:52 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:16:52 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:16:52 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:16:52 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:16:52 [DEBUG] clck_gen.py:128 IND CLOCK 1122
2025-03-30 06:16:52 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:16:52 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:16:52 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:16:52 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:16:52 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:16:52 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:16:52 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 06:16:52 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 06:16:52 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:16:52 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:16:52 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=1133 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:16:52 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=1133 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:16:52 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=1133 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:16:52 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=1133 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:16:52 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=1133 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:16:52 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=1133 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:16:52 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=1133 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:16:53 [DEBUG] clck_gen.py:128 IND CLOCK 1224
2025-03-30 06:16:53 [DEBUG] clck_gen.py:128 IND CLOCK 1326
2025-03-30 06:16:54 [DEBUG] clck_gen.py:128 IND CLOCK 1428
2025-03-30 06:16:54 [DEBUG] clck_gen.py:128 IND CLOCK 1530
2025-03-30 06:16:55 [DEBUG] clck_gen.py:128 IND CLOCK 1632
2025-03-30 06:16:55 [DEBUG] clck_gen.py:128 IND CLOCK 1734
2025-03-30 06:16:56 [DEBUG] clck_gen.py:128 IND CLOCK 1836
2025-03-30 06:16:56 [DEBUG] clck_gen.py:128 IND CLOCK 1938
2025-03-30 06:16:57 [DEBUG] clck_gen.py:128 IND CLOCK 2040
2025-03-30 06:16:57 [DEBUG] clck_gen.py:128 IND CLOCK 2142
2025-03-30 06:16:57 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 06:16:57 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 06:16:57 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:16:57 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:16:57 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:16:57 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 06:16:57 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:16:57 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:16:57 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:16:57 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:16:57 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 06:16:57 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:16:57 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 06:16:57 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 06:16:57 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 06:16:57 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 06:16:57 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 06:16:57 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:16:57 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:16:57 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 06:16:57 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 06:16:57 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 06:16:57 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 06:16:57 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 06:16:57 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 06:16:57 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:16:57 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:16:57 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 06:16:57 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 06:16:57 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 06:16:57 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 06:16:57 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 06:16:57 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 06:16:57 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:16:57 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:16:57 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 06:16:57 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 06:16:57 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 06:16:57 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 06:16:57 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 06:16:57 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 06:16:57 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 06:16:57 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 06:16:57 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 06:16:57 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 06:16:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 06:16:57 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:16:57 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 06:16:57 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 06:16:57 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:16:57 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:16:57 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 06:16:57 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 06:16:57 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 06:16:57 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 06:16:57 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:16:57 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:16:57 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:16:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 06:16:57 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:16:57 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:16:57 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:16:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:16:57 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:16:57 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:16:57 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:16:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:16:57 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:16:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:16:57 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:16:57 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:16:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:16:57 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:16:57 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:16:57 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:16:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:16:57 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:16:57 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:16:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:16:57 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:16:57 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:16:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:16:57 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:16:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:16:57 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:16:57 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:16:57 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:16:57 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:16:57 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 06:16:57 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 06:16:57 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 06:16:57 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:17:03 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 06:17:03 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 06:17:03 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:17:03 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:17:03 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:17:03 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:17:03 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:17:03 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 06:17:03 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:17:03 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 06:17:03 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 06:17:03 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 06:17:03 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 06:17:03 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 06:17:03 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:17:03 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 06:17:03 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:17:03 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 06:17:03 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 06:17:03 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 06:17:03 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 06:17:03 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 06:17:03 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:17:03 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 06:17:03 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:17:03 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 06:17:03 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 06:17:03 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 06:17:03 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 06:17:03 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 06:17:03 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:17:03 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 06:17:03 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:17:03 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 06:17:03 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 06:17:03 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 06:17:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 06:17:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 06:17:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 06:17:03 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 06:17:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 06:17:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 06:17:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 06:17:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:17:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 06:17:03 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 06:17:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:17:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:17:03 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 06:17:03 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 06:17:03 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 06:17:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:17:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:17:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:17:03 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 06:17:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 06:17:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:17:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:17:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:17:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:17:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:17:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:17:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:17:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:17:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:17:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:17:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:17:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:17:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:17:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:17:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:17:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:17:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:17:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:17:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:17:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:17:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:17:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:17:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:17:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:17:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:17:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:17:03 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-03-30 06:17:03 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-03-30 06:17:03 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-03-30 06:17:03 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-03-30 06:17:03 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-03-30 06:17:03 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-03-30 06:17:03 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-03-30 06:17:03 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-03-30 06:17:03 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-03-30 06:17:03 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-03-30 06:17:03 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 06:17:03 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 06:17:03 [DEBUG] fake_trx.py:317 (BTS@172.18.26.20:5700) Recv FAKE_CI cmd
2025-03-30 06:17:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:17:03 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:17:03 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:17:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:17:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:17:03 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:17:03 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:17:03 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:17:03 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:17:03 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-03-30 06:17:04 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:17:04 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:17:04 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:17:04 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:17:04 [DEBUG] clck_gen.py:128 IND CLOCK 306
2025-03-30 06:17:04 [DEBUG] clck_gen.py:128 IND CLOCK 408
2025-03-30 06:17:05 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:17:05 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:17:05 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:17:05 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:17:05 [DEBUG] clck_gen.py:128 IND CLOCK 510
2025-03-30 06:17:05 [DEBUG] clck_gen.py:128 IND CLOCK 612
2025-03-30 06:17:06 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:17:06 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:17:06 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:17:06 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:17:06 [DEBUG] clck_gen.py:128 IND CLOCK 714
2025-03-30 06:17:06 [DEBUG] clck_gen.py:128 IND CLOCK 816
2025-03-30 06:17:07 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:17:07 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:17:07 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:17:07 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:17:07 [DEBUG] clck_gen.py:128 IND CLOCK 918
2025-03-30 06:17:07 [DEBUG] clck_gen.py:128 IND CLOCK 1020
2025-03-30 06:17:08 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:17:08 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:17:08 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:17:08 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:17:08 [DEBUG] clck_gen.py:128 IND CLOCK 1122
2025-03-30 06:17:08 [DEBUG] clck_gen.py:128 IND CLOCK 1224
2025-03-30 06:17:09 [DEBUG] clck_gen.py:128 IND CLOCK 1326
2025-03-30 06:17:09 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:17:09 [DEBUG] clck_gen.py:128 IND CLOCK 1428
2025-03-30 06:17:10 [DEBUG] clck_gen.py:128 IND CLOCK 1530
2025-03-30 06:17:10 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:17:10 [DEBUG] clck_gen.py:128 IND CLOCK 1632
2025-03-30 06:17:11 [DEBUG] clck_gen.py:128 IND CLOCK 1734
2025-03-30 06:17:11 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:17:11 [DEBUG] clck_gen.py:128 IND CLOCK 1836
2025-03-30 06:17:11 [DEBUG] clck_gen.py:128 IND CLOCK 1938
2025-03-30 06:17:12 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:17:12 [DEBUG] clck_gen.py:128 IND CLOCK 2040
2025-03-30 06:17:12 [DEBUG] clck_gen.py:128 IND CLOCK 2142
2025-03-30 06:17:13 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:17:13 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:17:13 [DEBUG] clck_gen.py:128 IND CLOCK 2244
2025-03-30 06:17:13 [DEBUG] clck_gen.py:128 IND CLOCK 2346
2025-03-30 06:17:14 [DEBUG] clck_gen.py:128 IND CLOCK 2448
2025-03-30 06:17:14 [DEBUG] clck_gen.py:128 IND CLOCK 2550
2025-03-30 06:17:15 [DEBUG] clck_gen.py:128 IND CLOCK 2652
2025-03-30 06:17:15 [DEBUG] clck_gen.py:128 IND CLOCK 2754
2025-03-30 06:17:16 [DEBUG] clck_gen.py:128 IND CLOCK 2856
2025-03-30 06:17:16 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:17:16 [DEBUG] clck_gen.py:128 IND CLOCK 2958
2025-03-30 06:17:17 [DEBUG] clck_gen.py:128 IND CLOCK 3060
2025-03-30 06:17:17 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:17:17 [DEBUG] clck_gen.py:128 IND CLOCK 3162
2025-03-30 06:17:18 [DEBUG] clck_gen.py:128 IND CLOCK 3264
2025-03-30 06:17:18 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:17:18 [DEBUG] clck_gen.py:128 IND CLOCK 3366
2025-03-30 06:17:19 [DEBUG] clck_gen.py:128 IND CLOCK 3468
2025-03-30 06:17:19 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:17:19 [DEBUG] clck_gen.py:128 IND CLOCK 3570
2025-03-30 06:17:19 [DEBUG] clck_gen.py:128 IND CLOCK 3672
2025-03-30 06:17:20 [DEBUG] clck_gen.py:128 IND CLOCK 3774
2025-03-30 06:17:20 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:17:20 [DEBUG] clck_gen.py:128 IND CLOCK 3876
2025-03-30 06:17:21 [DEBUG] clck_gen.py:128 IND CLOCK 3978
2025-03-30 06:17:21 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:17:21 [DEBUG] clck_gen.py:128 IND CLOCK 4080
2025-03-30 06:17:22 [DEBUG] clck_gen.py:128 IND CLOCK 4182
2025-03-30 06:17:22 [DEBUG] clck_gen.py:128 IND CLOCK 4284
2025-03-30 06:17:23 [DEBUG] clck_gen.py:128 IND CLOCK 4386
2025-03-30 06:17:23 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:17:23 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:17:23 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:17:23 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:17:23 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:17:23 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:17:23 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:17:23 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:17:23 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:17:23 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 06:17:23 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 06:17:23 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 06:17:23 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:17:28 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 06:17:28 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 06:17:28 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:17:28 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:17:28 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:17:28 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:17:28 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:17:28 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 06:17:28 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 06:17:28 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 06:17:28 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 06:17:28 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:17:28 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 06:17:28 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 06:17:28 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 06:17:28 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 06:17:28 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 06:17:28 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 06:17:28 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:17:28 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 06:17:28 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:17:28 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 06:17:28 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:17:28 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:17:28 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:17:28 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 06:17:28 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:17:28 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 06:17:28 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 06:17:28 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 06:17:28 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 06:17:28 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 06:17:28 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 06:17:28 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 06:17:28 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 06:17:28 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 06:17:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 06:17:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 06:17:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 06:17:28 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 06:17:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 06:17:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 06:17:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 06:17:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:17:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 06:17:28 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 06:17:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:17:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:17:28 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 06:17:28 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 06:17:28 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 06:17:28 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 06:17:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:17:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:17:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:17:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 06:17:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:17:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:17:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:17:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:17:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:17:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:17:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:17:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:17:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:17:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:17:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:17:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:17:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:17:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:17:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:17:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:17:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:17:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:17:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:17:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:17:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:17:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:17:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:17:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:17:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:17:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:17:28 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-03-30 06:17:29 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-03-30 06:17:29 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-03-30 06:17:29 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-03-30 06:17:29 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-03-30 06:17:29 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-03-30 06:17:29 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-03-30 06:17:29 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-03-30 06:17:29 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-03-30 06:17:29 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-03-30 06:17:29 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 06:17:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:17:29 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 06:17:29 [DEBUG] fake_trx.py:317 (BTS@172.18.26.20:5700) Recv FAKE_CI cmd
2025-03-30 06:17:29 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:17:29 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:17:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:17:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:17:29 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:17:29 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:17:29 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:17:29 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:17:29 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 06:17:29 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 06:17:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD NOHANDOVER
2025-03-30 06:17:29 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:17:29 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:17:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:17:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:17:29 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=117 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-03-30 06:17:29 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=118 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-03-30 06:17:29 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=119 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-03-30 06:17:29 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=120 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-03-30 06:17:29 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=121 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-03-30 06:17:29 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=122 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-03-30 06:17:29 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=123 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-03-30 06:17:29 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=124 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-03-30 06:17:29 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=125 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-03-30 06:17:29 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=126 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-03-30 06:17:29 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=127 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-03-30 06:17:29 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=128 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-03-30 06:17:29 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=130 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-03-30 06:17:29 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=131 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-03-30 06:17:29 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=132 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-03-30 06:17:29 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=133 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-03-30 06:17:29 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=134 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-03-30 06:17:29 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=135 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-03-30 06:17:29 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=136 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-03-30 06:17:29 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=137 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-03-30 06:17:29 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=138 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-03-30 06:17:29 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=139 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-03-30 06:17:29 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=140 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-03-30 06:17:29 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=141 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-03-30 06:17:29 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=143 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-03-30 06:17:29 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=144 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-03-30 06:17:29 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=145 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-03-30 06:17:29 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=146 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-03-30 06:17:29 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=147 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-03-30 06:17:29 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=148 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-03-30 06:17:29 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=149 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-03-30 06:17:29 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=150 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-03-30 06:17:29 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=151 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-03-30 06:17:29 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=152 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-03-30 06:17:29 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=153 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-03-30 06:17:29 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=154 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-03-30 06:17:29 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=156 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-03-30 06:17:29 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=157 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-03-30 06:17:29 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=158 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-03-30 06:17:29 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=159 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-03-30 06:17:29 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=160 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-03-30 06:17:29 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=161 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-03-30 06:17:29 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=162 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-03-30 06:17:29 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=163 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-03-30 06:17:29 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=164 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-03-30 06:17:29 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=165 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-03-30 06:17:29 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=166 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-03-30 06:17:29 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=167 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-03-30 06:17:29 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=169 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-03-30 06:17:29 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=170 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-03-30 06:17:29 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=171 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-03-30 06:17:29 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=172 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-03-30 06:17:29 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=173 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-03-30 06:17:29 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=174 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-03-30 06:17:29 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=175 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-03-30 06:17:29 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=176 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-03-30 06:17:29 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=177 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-03-30 06:17:29 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=178 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-03-30 06:17:29 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=179 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-03-30 06:17:29 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=180 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-03-30 06:17:29 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=182 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-03-30 06:17:29 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=183 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-03-30 06:17:29 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=184 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-03-30 06:17:29 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=185 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-03-30 06:17:29 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=186 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-03-30 06:17:29 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=187 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-03-30 06:17:29 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=188 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-03-30 06:17:29 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=189 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-03-30 06:17:29 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=190 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-03-30 06:17:29 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=191 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-03-30 06:17:29 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=192 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-03-30 06:17:29 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=193 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-03-30 06:17:29 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=195 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-03-30 06:17:29 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=196 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-03-30 06:17:29 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=197 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-03-30 06:17:29 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=198 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-03-30 06:17:29 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=199 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-03-30 06:17:29 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=200 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-03-30 06:17:29 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=201 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-03-30 06:17:29 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=202 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-03-30 06:17:29 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=203 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-03-30 06:17:29 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-03-30 06:17:29 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=204 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-03-30 06:17:29 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=205 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-03-30 06:17:29 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=206 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-03-30 06:17:29 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=208 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-03-30 06:17:29 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=209 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-03-30 06:17:29 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=210 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-03-30 06:17:29 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=211 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-03-30 06:17:29 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=212 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-03-30 06:17:29 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=213 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-03-30 06:17:29 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=214 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-03-30 06:17:29 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=215 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-03-30 06:17:29 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=216 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-03-30 06:17:29 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:17:29 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:17:29 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:17:29 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:17:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD NOHANDOVER
2025-03-30 06:17:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:17:29 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:17:29 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:17:29 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:17:29 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:17:29 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:17:29 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:17:29 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:17:29 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:17:29 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:17:29 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:17:29 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 06:17:29 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 06:17:29 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 06:17:29 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=302 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:17:29 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=302 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:17:29 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=302 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:17:29 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=302 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:17:29 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=302 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:17:29 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=302 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:17:29 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=302 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:17:29 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=302 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:17:34 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 06:17:34 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 06:17:34 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:17:34 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:17:34 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:17:34 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:17:34 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:17:34 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 06:17:34 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:17:34 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 06:17:34 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 06:17:34 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 06:17:34 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 06:17:34 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 06:17:34 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:17:34 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:17:34 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 06:17:34 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 06:17:34 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 06:17:34 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 06:17:34 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 06:17:34 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 06:17:34 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:17:34 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 06:17:34 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:17:34 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 06:17:34 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 06:17:34 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 06:17:34 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 06:17:34 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 06:17:34 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:17:34 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 06:17:34 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:17:34 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 06:17:34 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 06:17:34 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 06:17:34 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 06:17:34 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 06:17:34 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 06:17:34 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 06:17:34 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 06:17:34 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 06:17:34 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 06:17:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 06:17:34 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:17:34 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:17:34 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 06:17:34 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:17:34 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:17:34 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:17:34 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 06:17:34 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 06:17:34 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 06:17:34 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 06:17:34 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:17:34 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:17:34 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:17:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 06:17:34 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:17:34 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:17:34 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:17:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:17:34 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:17:34 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:17:34 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:17:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:17:34 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:17:34 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:17:34 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:17:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:17:34 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:17:34 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:17:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:17:34 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:17:34 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:17:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:17:34 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:17:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:17:34 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:17:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:17:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:17:34 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:17:34 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-03-30 06:17:35 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-03-30 06:17:35 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-03-30 06:17:35 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-03-30 06:17:35 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-03-30 06:17:35 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-03-30 06:17:35 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-03-30 06:17:35 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-03-30 06:17:35 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-03-30 06:17:35 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-03-30 06:17:35 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=105 tn=0 bl=148 pwr=0
2025-03-30 06:17:35 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=105 tn=1 bl=148 pwr=0
2025-03-30 06:17:35 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=105 tn=2 bl=148 pwr=0
2025-03-30 06:17:35 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=105 tn=3 bl=148 pwr=0
2025-03-30 06:17:35 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=105 tn=4 bl=148 pwr=0
2025-03-30 06:17:35 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=105 tn=5 bl=148 pwr=0
2025-03-30 06:17:35 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=105 tn=6 bl=148 pwr=0
2025-03-30 06:17:35 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=105 tn=7 bl=148 pwr=0
2025-03-30 06:17:35 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=106 tn=0 bl=148 pwr=0
2025-03-30 06:17:35 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=106 tn=1 bl=148 pwr=0
2025-03-30 06:17:35 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=106 tn=2 bl=148 pwr=0
2025-03-30 06:17:35 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=106 tn=3 bl=148 pwr=0
2025-03-30 06:17:35 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=106 tn=4 bl=148 pwr=0
2025-03-30 06:17:35 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=106 tn=5 bl=148 pwr=0
2025-03-30 06:17:35 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=106 tn=6 bl=148 pwr=0
2025-03-30 06:17:35 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=106 tn=7 bl=148 pwr=0
2025-03-30 06:17:35 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=107 tn=0 bl=148 pwr=0
2025-03-30 06:17:35 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=107 tn=1 bl=148 pwr=0
2025-03-30 06:17:35 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=107 tn=2 bl=148 pwr=0
2025-03-30 06:17:35 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=107 tn=3 bl=148 pwr=0
2025-03-30 06:17:35 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=107 tn=4 bl=148 pwr=0
2025-03-30 06:17:35 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=107 tn=5 bl=148 pwr=0
2025-03-30 06:17:35 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=107 tn=6 bl=148 pwr=0
2025-03-30 06:17:35 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=107 tn=7 bl=148 pwr=0
2025-03-30 06:17:35 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 06:17:35 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 06:17:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:17:35 [DEBUG] fake_trx.py:317 (BTS@172.18.26.20:5700) Recv FAKE_CI cmd
2025-03-30 06:17:35 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:17:35 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:17:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:17:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:17:35 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:17:35 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:17:35 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:17:35 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:17:35 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 06:17:35 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 06:17:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD NOHANDOVER
2025-03-30 06:17:35 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:17:35 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:17:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:17:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:17:35 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=130 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-03-30 06:17:35 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=131 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-03-30 06:17:35 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=132 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-03-30 06:17:35 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=133 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-03-30 06:17:35 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=134 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-03-30 06:17:35 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=135 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-03-30 06:17:35 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=136 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-03-30 06:17:35 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=137 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-03-30 06:17:35 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=138 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-03-30 06:17:35 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=139 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-03-30 06:17:35 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=140 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-03-30 06:17:35 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=141 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-03-30 06:17:35 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=143 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-03-30 06:17:35 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=144 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-03-30 06:17:35 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=145 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-03-30 06:17:35 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=146 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-03-30 06:17:35 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=147 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-03-30 06:17:35 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=148 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-03-30 06:17:35 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=149 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-03-30 06:17:35 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=150 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-03-30 06:17:35 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=151 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-03-30 06:17:35 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=152 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-03-30 06:17:35 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=153 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-03-30 06:17:35 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=154 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-03-30 06:17:35 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=156 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-03-30 06:17:35 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=157 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-03-30 06:17:35 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=158 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-03-30 06:17:35 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=159 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-03-30 06:17:35 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=160 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-03-30 06:17:35 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=161 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-03-30 06:17:35 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=162 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-03-30 06:17:35 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=163 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-03-30 06:17:35 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=164 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-03-30 06:17:35 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=165 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-03-30 06:17:35 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=166 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-03-30 06:17:35 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=167 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-03-30 06:17:35 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=169 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-03-30 06:17:35 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=170 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-03-30 06:17:35 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=171 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-03-30 06:17:35 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=172 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-03-30 06:17:35 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=173 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-03-30 06:17:35 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=174 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-03-30 06:17:35 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=175 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-03-30 06:17:35 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=176 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-03-30 06:17:35 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=177 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-03-30 06:17:35 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=178 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-03-30 06:17:35 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=179 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-03-30 06:17:35 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=180 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-03-30 06:17:35 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=182 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-03-30 06:17:35 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=183 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-03-30 06:17:35 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=184 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-03-30 06:17:35 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=185 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-03-30 06:17:35 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=186 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-03-30 06:17:35 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=187 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-03-30 06:17:35 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=188 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-03-30 06:17:35 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=189 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-03-30 06:17:35 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=190 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-03-30 06:17:35 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=191 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-03-30 06:17:35 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=192 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-03-30 06:17:35 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=193 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-03-30 06:17:35 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=195 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-03-30 06:17:35 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=196 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-03-30 06:17:35 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=197 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-03-30 06:17:35 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=198 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-03-30 06:17:35 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=199 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-03-30 06:17:35 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=200 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-03-30 06:17:35 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=201 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-03-30 06:17:35 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=202 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-03-30 06:17:35 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=203 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-03-30 06:17:35 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-03-30 06:17:35 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=204 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-03-30 06:17:35 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=205 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-03-30 06:17:35 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=206 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-03-30 06:17:35 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=208 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-03-30 06:17:35 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=209 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-03-30 06:17:35 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=210 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-03-30 06:17:35 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=211 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-03-30 06:17:35 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=212 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-03-30 06:17:35 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=213 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-03-30 06:17:35 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=214 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-03-30 06:17:35 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=215 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-03-30 06:17:35 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=216 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-03-30 06:17:35 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:17:35 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:17:35 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:17:35 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:17:36 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD NOHANDOVER
2025-03-30 06:17:36 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:17:36 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:17:36 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:17:36 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:17:36 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:17:36 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:17:36 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:17:36 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:17:36 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:17:36 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:17:36 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:17:36 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 06:17:36 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 06:17:36 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 06:17:41 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 06:17:41 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 06:17:41 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:17:41 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:17:41 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:17:41 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:17:41 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:17:41 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 06:17:41 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:17:41 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 06:17:41 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 06:17:41 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 06:17:41 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 06:17:41 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 06:17:41 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:17:41 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:17:41 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 06:17:41 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 06:17:41 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 06:17:41 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 06:17:41 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 06:17:41 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 06:17:41 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:17:41 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 06:17:41 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:17:41 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 06:17:41 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 06:17:41 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 06:17:41 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 06:17:41 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 06:17:41 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:17:41 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:17:41 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 06:17:41 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 06:17:41 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 06:17:41 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 06:17:41 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 06:17:41 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 06:17:41 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 06:17:41 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 06:17:41 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 06:17:41 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 06:17:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 06:17:41 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:17:41 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 06:17:41 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 06:17:41 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:17:41 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:17:41 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 06:17:41 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 06:17:41 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 06:17:41 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 06:17:41 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:17:41 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:17:41 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:17:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 06:17:41 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:17:41 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:17:41 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:17:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:17:41 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:17:41 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:17:41 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:17:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:17:41 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:17:41 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:17:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:17:41 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:17:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:17:41 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:17:41 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:17:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:17:41 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:17:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:17:41 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:17:41 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:17:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:17:41 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:17:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:17:41 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:17:41 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:17:41 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:17:41 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-03-30 06:17:41 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-03-30 06:17:41 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-03-30 06:17:41 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-03-30 06:17:41 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-03-30 06:17:41 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-03-30 06:17:41 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-03-30 06:17:41 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-03-30 06:17:41 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-03-30 06:17:41 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-03-30 06:17:41 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=105 tn=0 bl=148 pwr=0
2025-03-30 06:17:41 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=105 tn=1 bl=148 pwr=0
2025-03-30 06:17:41 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=105 tn=2 bl=148 pwr=0
2025-03-30 06:17:41 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=105 tn=3 bl=148 pwr=0
2025-03-30 06:17:41 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=105 tn=4 bl=148 pwr=0
2025-03-30 06:17:41 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=105 tn=5 bl=148 pwr=0
2025-03-30 06:17:41 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=105 tn=6 bl=148 pwr=0
2025-03-30 06:17:41 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=105 tn=7 bl=148 pwr=0
2025-03-30 06:17:41 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=106 tn=0 bl=148 pwr=0
2025-03-30 06:17:41 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=106 tn=1 bl=148 pwr=0
2025-03-30 06:17:41 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=106 tn=2 bl=148 pwr=0
2025-03-30 06:17:41 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=106 tn=3 bl=148 pwr=0
2025-03-30 06:17:41 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=106 tn=4 bl=148 pwr=0
2025-03-30 06:17:41 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=106 tn=5 bl=148 pwr=0
2025-03-30 06:17:41 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=106 tn=6 bl=148 pwr=0
2025-03-30 06:17:41 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=106 tn=7 bl=148 pwr=0
2025-03-30 06:17:41 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=107 tn=0 bl=148 pwr=0
2025-03-30 06:17:41 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=107 tn=1 bl=148 pwr=0
2025-03-30 06:17:41 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=107 tn=2 bl=148 pwr=0
2025-03-30 06:17:41 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=107 tn=3 bl=148 pwr=0
2025-03-30 06:17:41 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=107 tn=4 bl=148 pwr=0
2025-03-30 06:17:41 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=107 tn=5 bl=148 pwr=0
2025-03-30 06:17:41 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=107 tn=6 bl=148 pwr=0
2025-03-30 06:17:41 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=107 tn=7 bl=148 pwr=0
2025-03-30 06:17:41 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 06:17:41 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 06:17:41 [DEBUG] fake_trx.py:317 (BTS@172.18.26.20:5700) Recv FAKE_CI cmd
2025-03-30 06:17:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:17:41 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:17:41 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:17:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:17:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:17:41 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:17:41 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:17:41 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:17:41 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:17:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:17:42 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:17:42 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:17:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:17:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:17:42 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-03-30 06:17:42 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:17:42 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:17:42 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:17:42 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:17:42 [DEBUG] clck_gen.py:128 IND CLOCK 306
2025-03-30 06:17:43 [DEBUG] clck_gen.py:128 IND CLOCK 408
2025-03-30 06:17:43 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:17:43 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:17:43 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:17:43 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:17:43 [DEBUG] clck_gen.py:128 IND CLOCK 510
2025-03-30 06:17:44 [DEBUG] clck_gen.py:128 IND CLOCK 612
2025-03-30 06:17:44 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:17:44 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:17:44 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:17:44 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:17:44 [DEBUG] clck_gen.py:128 IND CLOCK 714
2025-03-30 06:17:45 [DEBUG] clck_gen.py:128 IND CLOCK 816
2025-03-30 06:17:45 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:17:45 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:17:45 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:17:45 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:17:45 [DEBUG] clck_gen.py:128 IND CLOCK 918
2025-03-30 06:17:46 [DEBUG] clck_gen.py:128 IND CLOCK 1020
2025-03-30 06:17:46 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:17:46 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:17:46 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:17:46 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:17:46 [DEBUG] clck_gen.py:128 IND CLOCK 1122
2025-03-30 06:17:47 [DEBUG] clck_gen.py:128 IND CLOCK 1224
2025-03-30 06:17:47 [DEBUG] clck_gen.py:128 IND CLOCK 1326
2025-03-30 06:17:48 [DEBUG] clck_gen.py:128 IND CLOCK 1428
2025-03-30 06:17:48 [DEBUG] clck_gen.py:128 IND CLOCK 1530
2025-03-30 06:17:48 [DEBUG] clck_gen.py:128 IND CLOCK 1632
2025-03-30 06:17:49 [DEBUG] clck_gen.py:128 IND CLOCK 1734
2025-03-30 06:17:49 [DEBUG] clck_gen.py:128 IND CLOCK 1836
2025-03-30 06:17:50 [DEBUG] clck_gen.py:128 IND CLOCK 1938
2025-03-30 06:17:50 [DEBUG] clck_gen.py:128 IND CLOCK 2040
2025-03-30 06:17:51 [DEBUG] clck_gen.py:128 IND CLOCK 2142
2025-03-30 06:17:51 [DEBUG] clck_gen.py:128 IND CLOCK 2244
2025-03-30 06:17:52 [DEBUG] clck_gen.py:128 IND CLOCK 2346
2025-03-30 06:17:52 [DEBUG] clck_gen.py:128 IND CLOCK 2448
2025-03-30 06:17:53 [DEBUG] clck_gen.py:128 IND CLOCK 2550
2025-03-30 06:17:53 [DEBUG] clck_gen.py:128 IND CLOCK 2652
2025-03-30 06:17:54 [DEBUG] clck_gen.py:128 IND CLOCK 2754
2025-03-30 06:17:54 [DEBUG] clck_gen.py:128 IND CLOCK 2856
2025-03-30 06:17:55 [DEBUG] clck_gen.py:128 IND CLOCK 2958
2025-03-30 06:17:55 [DEBUG] clck_gen.py:128 IND CLOCK 3060
2025-03-30 06:17:56 [DEBUG] clck_gen.py:128 IND CLOCK 3162
2025-03-30 06:17:56 [DEBUG] clck_gen.py:128 IND CLOCK 3264
2025-03-30 06:17:56 [DEBUG] clck_gen.py:128 IND CLOCK 3366
2025-03-30 06:17:57 [DEBUG] clck_gen.py:128 IND CLOCK 3468
2025-03-30 06:17:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:17:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:17:57 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:17:57 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:17:57 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:17:57 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:17:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:17:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:17:57 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:17:57 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:17:57 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:17:57 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:17:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:17:57 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:17:57 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:17:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:17:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:17:57 [DEBUG] clck_gen.py:128 IND CLOCK 3570
2025-03-30 06:17:58 [DEBUG] clck_gen.py:128 IND CLOCK 3672
2025-03-30 06:17:58 [DEBUG] clck_gen.py:128 IND CLOCK 3774
2025-03-30 06:17:59 [DEBUG] clck_gen.py:128 IND CLOCK 3876
2025-03-30 06:17:59 [DEBUG] clck_gen.py:128 IND CLOCK 3978
2025-03-30 06:18:00 [DEBUG] clck_gen.py:128 IND CLOCK 4080
2025-03-30 06:18:00 [DEBUG] clck_gen.py:128 IND CLOCK 4182
2025-03-30 06:18:01 [DEBUG] clck_gen.py:128 IND CLOCK 4284
2025-03-30 06:18:01 [DEBUG] clck_gen.py:128 IND CLOCK 4386
2025-03-30 06:18:02 [DEBUG] clck_gen.py:128 IND CLOCK 4488
2025-03-30 06:18:02 [DEBUG] clck_gen.py:128 IND CLOCK 4590
2025-03-30 06:18:03 [DEBUG] clck_gen.py:128 IND CLOCK 4692
2025-03-30 06:18:03 [DEBUG] clck_gen.py:128 IND CLOCK 4794
2025-03-30 06:18:04 [DEBUG] clck_gen.py:128 IND CLOCK 4896
2025-03-30 06:18:04 [DEBUG] clck_gen.py:128 IND CLOCK 4998
2025-03-30 06:18:04 [DEBUG] clck_gen.py:128 IND CLOCK 5100
2025-03-30 06:18:05 [DEBUG] clck_gen.py:128 IND CLOCK 5202
2025-03-30 06:18:05 [DEBUG] clck_gen.py:128 IND CLOCK 5304
2025-03-30 06:18:06 [DEBUG] clck_gen.py:128 IND CLOCK 5406
2025-03-30 06:18:06 [DEBUG] clck_gen.py:128 IND CLOCK 5508
2025-03-30 06:18:07 [DEBUG] clck_gen.py:128 IND CLOCK 5610
2025-03-30 06:18:07 [DEBUG] clck_gen.py:128 IND CLOCK 5712
2025-03-30 06:18:08 [DEBUG] clck_gen.py:128 IND CLOCK 5814
2025-03-30 06:18:08 [DEBUG] clck_gen.py:128 IND CLOCK 5916
2025-03-30 06:18:09 [DEBUG] clck_gen.py:128 IND CLOCK 6018
2025-03-30 06:18:09 [DEBUG] clck_gen.py:128 IND CLOCK 6120
2025-03-30 06:18:10 [DEBUG] clck_gen.py:128 IND CLOCK 6222
2025-03-30 06:18:10 [DEBUG] clck_gen.py:128 IND CLOCK 6324
2025-03-30 06:18:11 [DEBUG] clck_gen.py:128 IND CLOCK 6426
2025-03-30 06:18:11 [DEBUG] clck_gen.py:128 IND CLOCK 6528
2025-03-30 06:18:12 [DEBUG] clck_gen.py:128 IND CLOCK 6630
2025-03-30 06:18:12 [DEBUG] clck_gen.py:128 IND CLOCK 6732
2025-03-30 06:18:12 [DEBUG] clck_gen.py:128 IND CLOCK 6834
2025-03-30 06:18:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:18:13 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:18:13 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:18:13 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:18:13 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:18:13 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:18:13 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:18:13 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:18:13 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:18:13 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:18:13 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:18:13 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:18:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:18:13 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:18:13 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:18:13 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:18:13 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:18:13 [DEBUG] clck_gen.py:128 IND CLOCK 6936
2025-03-30 06:18:13 [DEBUG] clck_gen.py:128 IND CLOCK 7038
2025-03-30 06:18:14 [DEBUG] clck_gen.py:128 IND CLOCK 7140
2025-03-30 06:18:14 [DEBUG] clck_gen.py:128 IND CLOCK 7242
2025-03-30 06:18:15 [DEBUG] clck_gen.py:128 IND CLOCK 7344
2025-03-30 06:18:15 [DEBUG] clck_gen.py:128 IND CLOCK 7446
2025-03-30 06:18:16 [DEBUG] clck_gen.py:128 IND CLOCK 7548
2025-03-30 06:18:16 [DEBUG] clck_gen.py:128 IND CLOCK 7650
2025-03-30 06:18:17 [DEBUG] clck_gen.py:128 IND CLOCK 7752
2025-03-30 06:18:17 [DEBUG] clck_gen.py:128 IND CLOCK 7854
2025-03-30 06:18:18 [DEBUG] clck_gen.py:128 IND CLOCK 7956
2025-03-30 06:18:18 [DEBUG] clck_gen.py:128 IND CLOCK 8058
2025-03-30 06:18:19 [DEBUG] clck_gen.py:128 IND CLOCK 8160
2025-03-30 06:18:19 [DEBUG] clck_gen.py:128 IND CLOCK 8262
2025-03-30 06:18:20 [DEBUG] clck_gen.py:128 IND CLOCK 8364
2025-03-30 06:18:20 [DEBUG] clck_gen.py:128 IND CLOCK 8466
2025-03-30 06:18:20 [DEBUG] clck_gen.py:128 IND CLOCK 8568
2025-03-30 06:18:21 [DEBUG] clck_gen.py:128 IND CLOCK 8670
2025-03-30 06:18:21 [DEBUG] clck_gen.py:128 IND CLOCK 8772
2025-03-30 06:18:22 [DEBUG] clck_gen.py:128 IND CLOCK 8874
2025-03-30 06:18:22 [DEBUG] clck_gen.py:128 IND CLOCK 8976
2025-03-30 06:18:23 [DEBUG] clck_gen.py:128 IND CLOCK 9078
2025-03-30 06:18:23 [DEBUG] clck_gen.py:128 IND CLOCK 9180
2025-03-30 06:18:24 [DEBUG] clck_gen.py:128 IND CLOCK 9282
2025-03-30 06:18:24 [DEBUG] clck_gen.py:128 IND CLOCK 9384
2025-03-30 06:18:25 [DEBUG] clck_gen.py:128 IND CLOCK 9486
2025-03-30 06:18:25 [DEBUG] clck_gen.py:128 IND CLOCK 9588
2025-03-30 06:18:26 [DEBUG] clck_gen.py:128 IND CLOCK 9690
2025-03-30 06:18:26 [DEBUG] clck_gen.py:128 IND CLOCK 9792
2025-03-30 06:18:27 [DEBUG] clck_gen.py:128 IND CLOCK 9894
2025-03-30 06:18:27 [DEBUG] clck_gen.py:128 IND CLOCK 9996
2025-03-30 06:18:28 [DEBUG] clck_gen.py:128 IND CLOCK 10098
2025-03-30 06:18:28 [DEBUG] clck_gen.py:128 IND CLOCK 10200
2025-03-30 06:18:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:18:28 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:18:28 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:18:28 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:18:28 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:18:28 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:18:28 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:18:28 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:18:28 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:18:28 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:18:28 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:18:28 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:18:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:18:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:18:28 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:18:28 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:18:28 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:18:28 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:18:28 [DEBUG] clck_gen.py:128 IND CLOCK 10302
2025-03-30 06:18:29 [DEBUG] clck_gen.py:128 IND CLOCK 10404
2025-03-30 06:18:29 [DEBUG] clck_gen.py:128 IND CLOCK 10506
2025-03-30 06:18:30 [DEBUG] clck_gen.py:128 IND CLOCK 10608
2025-03-30 06:18:30 [DEBUG] clck_gen.py:128 IND CLOCK 10710
2025-03-30 06:18:31 [DEBUG] clck_gen.py:128 IND CLOCK 10812
2025-03-30 06:18:31 [DEBUG] clck_gen.py:128 IND CLOCK 10914
2025-03-30 06:18:32 [DEBUG] clck_gen.py:128 IND CLOCK 11016
2025-03-30 06:18:32 [DEBUG] clck_gen.py:128 IND CLOCK 11118
2025-03-30 06:18:32 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=11175): ver=1 fn=11170 tn=0 bl=148 pwr=0
2025-03-30 06:18:32 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=11175): ver=1 fn=11170 tn=1 bl=148 pwr=0
2025-03-30 06:18:32 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=11175): ver=1 fn=11170 tn=2 bl=148 pwr=0
2025-03-30 06:18:32 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=11175): ver=1 fn=11170 tn=3 bl=148 pwr=0
2025-03-30 06:18:32 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=11175): ver=1 fn=11170 tn=4 bl=148 pwr=0
2025-03-30 06:18:32 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=11175): ver=1 fn=11170 tn=5 bl=148 pwr=0
2025-03-30 06:18:32 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=11175): ver=1 fn=11170 tn=6 bl=148 pwr=0
2025-03-30 06:18:32 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=11175): ver=1 fn=11170 tn=7 bl=148 pwr=0
2025-03-30 06:18:32 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=11175): ver=1 fn=11171 tn=0 bl=148 pwr=0
2025-03-30 06:18:32 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=11175): ver=1 fn=11171 tn=1 bl=148 pwr=0
2025-03-30 06:18:32 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=11175): ver=1 fn=11171 tn=2 bl=148 pwr=0
2025-03-30 06:18:32 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=11175): ver=1 fn=11171 tn=3 bl=148 pwr=0
2025-03-30 06:18:32 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=11175): ver=1 fn=11171 tn=4 bl=148 pwr=0
2025-03-30 06:18:32 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=11175): ver=1 fn=11171 tn=5 bl=148 pwr=0
2025-03-30 06:18:32 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=11175): ver=1 fn=11171 tn=6 bl=148 pwr=0
2025-03-30 06:18:32 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=11175): ver=1 fn=11171 tn=7 bl=148 pwr=0
2025-03-30 06:18:32 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=11175): ver=1 fn=11172 tn=0 bl=148 pwr=0
2025-03-30 06:18:32 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=11175): ver=1 fn=11172 tn=1 bl=148 pwr=0
2025-03-30 06:18:32 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=11175): ver=1 fn=11172 tn=2 bl=148 pwr=0
2025-03-30 06:18:32 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=11175): ver=1 fn=11172 tn=3 bl=148 pwr=0
2025-03-30 06:18:32 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=11175): ver=1 fn=11172 tn=4 bl=148 pwr=0
2025-03-30 06:18:32 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=11175): ver=1 fn=11172 tn=5 bl=148 pwr=0
2025-03-30 06:18:33 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=11176): ver=1 fn=11172 tn=6 bl=148 pwr=0
2025-03-30 06:18:33 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=11176): ver=1 fn=11172 tn=7 bl=148 pwr=0
2025-03-30 06:18:33 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=11176): ver=1 fn=11173 tn=0 bl=148 pwr=0
2025-03-30 06:18:33 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=11176): ver=1 fn=11173 tn=1 bl=148 pwr=0
2025-03-30 06:18:33 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=11176): ver=1 fn=11173 tn=2 bl=148 pwr=0
2025-03-30 06:18:33 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=11176): ver=1 fn=11173 tn=3 bl=148 pwr=0
2025-03-30 06:18:33 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=11176): ver=1 fn=11173 tn=4 bl=148 pwr=0
2025-03-30 06:18:33 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=11176): ver=1 fn=11173 tn=5 bl=148 pwr=0
2025-03-30 06:18:33 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=11176): ver=1 fn=11173 tn=6 bl=148 pwr=0
2025-03-30 06:18:33 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=11176): ver=1 fn=11173 tn=7 bl=148 pwr=0
2025-03-30 06:18:33 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=11176): ver=1 fn=11174 tn=0 bl=148 pwr=0
2025-03-30 06:18:33 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=11176): ver=1 fn=11174 tn=1 bl=148 pwr=0
2025-03-30 06:18:33 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=11176): ver=1 fn=11174 tn=2 bl=148 pwr=0
2025-03-30 06:18:33 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=11176): ver=1 fn=11174 tn=3 bl=148 pwr=0
2025-03-30 06:18:33 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=11176): ver=1 fn=11174 tn=4 bl=148 pwr=0
2025-03-30 06:18:33 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=11176): ver=1 fn=11174 tn=5 bl=148 pwr=0
2025-03-30 06:18:33 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=11176): ver=1 fn=11174 tn=6 bl=148 pwr=0
2025-03-30 06:18:33 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=11176): ver=1 fn=11174 tn=7 bl=148 pwr=0
2025-03-30 06:18:33 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=11176): ver=1 fn=11175 tn=0 bl=148 pwr=0
2025-03-30 06:18:33 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=11176): ver=1 fn=11175 tn=1 bl=148 pwr=0
2025-03-30 06:18:33 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=11176): ver=1 fn=11175 tn=2 bl=148 pwr=0
2025-03-30 06:18:33 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=11176): ver=1 fn=11175 tn=3 bl=148 pwr=0
2025-03-30 06:18:33 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=11176): ver=1 fn=11175 tn=4 bl=148 pwr=0
2025-03-30 06:18:33 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=11176): ver=1 fn=11175 tn=5 bl=148 pwr=0
2025-03-30 06:18:33 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=11176): ver=1 fn=11175 tn=6 bl=148 pwr=0
2025-03-30 06:18:33 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=11176): ver=1 fn=11175 tn=7 bl=148 pwr=0
2025-03-30 06:18:33 [DEBUG] clck_gen.py:128 IND CLOCK 11220
2025-03-30 06:18:33 [DEBUG] clck_gen.py:128 IND CLOCK 11322
2025-03-30 06:18:34 [DEBUG] clck_gen.py:128 IND CLOCK 11424
2025-03-30 06:18:34 [DEBUG] clck_gen.py:128 IND CLOCK 11526
2025-03-30 06:18:35 [DEBUG] clck_gen.py:128 IND CLOCK 11628
2025-03-30 06:18:35 [DEBUG] clck_gen.py:128 IND CLOCK 11730
2025-03-30 06:18:36 [DEBUG] clck_gen.py:128 IND CLOCK 11832
2025-03-30 06:18:36 [DEBUG] clck_gen.py:128 IND CLOCK 11934
2025-03-30 06:18:36 [DEBUG] clck_gen.py:128 IND CLOCK 12036
2025-03-30 06:18:37 [DEBUG] clck_gen.py:128 IND CLOCK 12138
2025-03-30 06:18:37 [DEBUG] clck_gen.py:128 IND CLOCK 12240
2025-03-30 06:18:38 [DEBUG] clck_gen.py:128 IND CLOCK 12342
2025-03-30 06:18:38 [DEBUG] clck_gen.py:128 IND CLOCK 12444
2025-03-30 06:18:39 [DEBUG] clck_gen.py:128 IND CLOCK 12546
2025-03-30 06:18:39 [DEBUG] clck_gen.py:128 IND CLOCK 12648
2025-03-30 06:18:40 [DEBUG] clck_gen.py:128 IND CLOCK 12750
2025-03-30 06:18:40 [DEBUG] clck_gen.py:128 IND CLOCK 12852
2025-03-30 06:18:41 [DEBUG] clck_gen.py:128 IND CLOCK 12954
2025-03-30 06:18:41 [DEBUG] clck_gen.py:128 IND CLOCK 13056
2025-03-30 06:18:42 [DEBUG] clck_gen.py:128 IND CLOCK 13158
2025-03-30 06:18:42 [DEBUG] clck_gen.py:128 IND CLOCK 13260
2025-03-30 06:18:43 [DEBUG] clck_gen.py:128 IND CLOCK 13362
2025-03-30 06:18:43 [DEBUG] clck_gen.py:128 IND CLOCK 13464
2025-03-30 06:18:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:18:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:18:44 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:18:44 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:18:44 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:18:44 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:18:44 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:18:44 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:18:44 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:18:44 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:18:44 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:18:44 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:18:44 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 06:18:44 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 06:18:44 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 06:18:49 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 06:18:49 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 06:18:49 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:18:49 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:18:49 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:18:49 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:18:49 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:18:49 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 06:18:49 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:18:49 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 06:18:49 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 06:18:49 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 06:18:49 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 06:18:49 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 06:18:49 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:18:49 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:18:49 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 06:18:49 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 06:18:49 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 06:18:49 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 06:18:49 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 06:18:49 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 06:18:49 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:18:49 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:18:49 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 06:18:49 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 06:18:49 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 06:18:49 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 06:18:49 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 06:18:49 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 06:18:49 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:18:49 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:18:49 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 06:18:49 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 06:18:49 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 06:18:49 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 06:18:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 06:18:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 06:18:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 06:18:49 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 06:18:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 06:18:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 06:18:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 06:18:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:18:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 06:18:49 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 06:18:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:18:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:18:49 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 06:18:49 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 06:18:49 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 06:18:49 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 06:18:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:18:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:18:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:18:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 06:18:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:18:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:18:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:18:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:18:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:18:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:18:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:18:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:18:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:18:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:18:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:18:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:18:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:18:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:18:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:18:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:18:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:18:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:18:49 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:18:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:18:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:18:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:18:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:18:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:18:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:18:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:18:49 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:18:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:18:49 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:18:49 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:18:49 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 06:18:49 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 06:18:49 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 06:18:54 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 06:18:54 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 06:18:54 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:18:54 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:18:54 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:18:54 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:18:54 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:18:54 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 06:18:54 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:18:54 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 06:18:54 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 06:18:54 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 06:18:54 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 06:18:54 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 06:18:54 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:18:54 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:18:54 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 06:18:54 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 06:18:54 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 06:18:54 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 06:18:54 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 06:18:54 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 06:18:54 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:18:54 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:18:54 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 06:18:54 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 06:18:54 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 06:18:54 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 06:18:54 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 06:18:54 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 06:18:54 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:18:54 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:18:54 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 06:18:54 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 06:18:54 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 06:18:54 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 06:18:54 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 06:18:54 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 06:18:54 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 06:18:54 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 06:18:54 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 06:18:54 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 06:18:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 06:18:54 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:18:54 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 06:18:54 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 06:18:54 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:18:54 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:18:54 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 06:18:54 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 06:18:54 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 06:18:54 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 06:18:54 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:18:54 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:18:54 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:18:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 06:18:54 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:18:54 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:18:54 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:18:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:18:54 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:18:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:18:54 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:18:54 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:18:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:18:54 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:18:54 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:18:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:18:54 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:18:54 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:18:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:18:54 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:18:54 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:18:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:18:54 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:18:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:18:54 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:18:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:18:54 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:18:54 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:18:54 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:18:54 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:18:54 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-03-30 06:18:54 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-03-30 06:18:54 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=107): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-03-30 06:18:54 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=107): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-03-30 06:18:54 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=107): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-03-30 06:18:54 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=107): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-03-30 06:18:54 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=107): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-03-30 06:18:54 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=107): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-03-30 06:18:54 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=107): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-03-30 06:18:54 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=107): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-03-30 06:18:54 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=107): ver=1 fn=105 tn=0 bl=148 pwr=0
2025-03-30 06:18:54 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=107): ver=1 fn=105 tn=1 bl=148 pwr=0
2025-03-30 06:18:54 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=107): ver=1 fn=105 tn=2 bl=148 pwr=0
2025-03-30 06:18:54 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=107): ver=1 fn=105 tn=3 bl=148 pwr=0
2025-03-30 06:18:54 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=107): ver=1 fn=105 tn=4 bl=148 pwr=0
2025-03-30 06:18:54 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=107): ver=1 fn=105 tn=5 bl=148 pwr=0
2025-03-30 06:18:54 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=107): ver=1 fn=105 tn=6 bl=148 pwr=0
2025-03-30 06:18:54 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=107): ver=1 fn=105 tn=7 bl=148 pwr=0
2025-03-30 06:18:54 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=107): ver=1 fn=106 tn=0 bl=148 pwr=0
2025-03-30 06:18:54 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=107): ver=1 fn=106 tn=1 bl=148 pwr=0
2025-03-30 06:18:54 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=107): ver=1 fn=106 tn=2 bl=148 pwr=0
2025-03-30 06:18:54 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=107): ver=1 fn=106 tn=3 bl=148 pwr=0
2025-03-30 06:18:54 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=107): ver=1 fn=106 tn=4 bl=148 pwr=0
2025-03-30 06:18:54 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=107): ver=1 fn=106 tn=5 bl=148 pwr=0
2025-03-30 06:18:54 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=107): ver=1 fn=106 tn=6 bl=148 pwr=0
2025-03-30 06:18:54 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=107): ver=1 fn=106 tn=7 bl=148 pwr=0
2025-03-30 06:18:54 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 06:18:54 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 06:18:54 [DEBUG] fake_trx.py:317 (BTS@172.18.26.20:5700) Recv FAKE_CI cmd
2025-03-30 06:18:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:18:54 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:18:54 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:18:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:18:54 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 06:18:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:18:54 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:18:54 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:18:54 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:18:54 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:18:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:18:54 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:18:54 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:18:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:18:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:18:55 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-03-30 06:18:55 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:18:55 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:18:55 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:18:55 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:18:55 [DEBUG] clck_gen.py:128 IND CLOCK 306
2025-03-30 06:18:55 [DEBUG] clck_gen.py:128 IND CLOCK 408
2025-03-30 06:18:56 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:18:56 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:18:56 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:18:56 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:18:56 [DEBUG] clck_gen.py:128 IND CLOCK 510
2025-03-30 06:18:56 [DEBUG] clck_gen.py:128 IND CLOCK 612
2025-03-30 06:18:57 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:18:57 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:18:57 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:18:57 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:18:57 [DEBUG] clck_gen.py:128 IND CLOCK 714
2025-03-30 06:18:57 [DEBUG] clck_gen.py:128 IND CLOCK 816
2025-03-30 06:18:58 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:18:58 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:18:58 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:18:58 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:18:58 [DEBUG] clck_gen.py:128 IND CLOCK 918
2025-03-30 06:18:58 [DEBUG] clck_gen.py:128 IND CLOCK 1020
2025-03-30 06:18:59 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:18:59 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:18:59 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:18:59 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:18:59 [DEBUG] clck_gen.py:128 IND CLOCK 1122
2025-03-30 06:18:59 [DEBUG] clck_gen.py:128 IND CLOCK 1224
2025-03-30 06:19:00 [DEBUG] clck_gen.py:128 IND CLOCK 1326
2025-03-30 06:19:00 [DEBUG] clck_gen.py:128 IND CLOCK 1428
2025-03-30 06:19:01 [DEBUG] clck_gen.py:128 IND CLOCK 1530
2025-03-30 06:19:01 [DEBUG] clck_gen.py:128 IND CLOCK 1632
2025-03-30 06:19:02 [DEBUG] clck_gen.py:128 IND CLOCK 1734
2025-03-30 06:19:02 [DEBUG] clck_gen.py:128 IND CLOCK 1836
2025-03-30 06:19:03 [DEBUG] clck_gen.py:128 IND CLOCK 1938
2025-03-30 06:19:03 [DEBUG] clck_gen.py:128 IND CLOCK 2040
2025-03-30 06:19:03 [DEBUG] clck_gen.py:128 IND CLOCK 2142
2025-03-30 06:19:04 [DEBUG] clck_gen.py:128 IND CLOCK 2244
2025-03-30 06:19:04 [DEBUG] clck_gen.py:128 IND CLOCK 2346
2025-03-30 06:19:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:19:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:19:05 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:19:05 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:19:05 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:19:05 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:19:05 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:19:05 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:19:05 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:19:05 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:19:05 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:19:05 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:19:05 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 06:19:05 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 06:19:05 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 06:19:10 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 06:19:10 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 06:19:10 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:19:10 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:19:10 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:19:10 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:19:10 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:19:10 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 06:19:10 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:19:10 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 06:19:10 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 06:19:10 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 06:19:10 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 06:19:10 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 06:19:10 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:19:10 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:19:10 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 06:19:10 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 06:19:10 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 06:19:10 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 06:19:10 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 06:19:10 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 06:19:10 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:19:10 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:19:10 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 06:19:10 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 06:19:10 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 06:19:10 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 06:19:10 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 06:19:10 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 06:19:10 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:19:10 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:19:10 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 06:19:10 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 06:19:10 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 06:19:10 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 06:19:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 06:19:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 06:19:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 06:19:10 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 06:19:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 06:19:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 06:19:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 06:19:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 06:19:10 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 06:19:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:19:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:19:10 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 06:19:10 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 06:19:10 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 06:19:10 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 06:19:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:19:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:19:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:19:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 06:19:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:19:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:19:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:19:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:19:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:19:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:19:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:19:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:19:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:19:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:19:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:19:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:19:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:19:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:19:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:19:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:19:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:19:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:19:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:19:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:19:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:19:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:19:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:19:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:19:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:19:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:19:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:19:10 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-03-30 06:19:10 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-03-30 06:19:10 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-03-30 06:19:10 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-03-30 06:19:10 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-03-30 06:19:10 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-03-30 06:19:10 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-03-30 06:19:10 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-03-30 06:19:10 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-03-30 06:19:10 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-03-30 06:19:10 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=0 bl=148 pwr=0
2025-03-30 06:19:10 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=1 bl=148 pwr=0
2025-03-30 06:19:10 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=2 bl=148 pwr=0
2025-03-30 06:19:10 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=3 bl=148 pwr=0
2025-03-30 06:19:10 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=4 bl=148 pwr=0
2025-03-30 06:19:10 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=5 bl=148 pwr=0
2025-03-30 06:19:10 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=6 bl=148 pwr=0
2025-03-30 06:19:10 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=7 bl=148 pwr=0
2025-03-30 06:19:10 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 06:19:10 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 06:19:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:19:10 [DEBUG] fake_trx.py:317 (BTS@172.18.26.20:5700) Recv FAKE_CI cmd
2025-03-30 06:19:10 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:19:10 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:19:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:19:10 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 06:19:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:19:10 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:19:10 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:19:10 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:19:10 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:19:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:19:10 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:19:10 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:19:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:19:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:19:11 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-03-30 06:19:11 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:19:11 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:19:11 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:19:11 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:19:11 [DEBUG] clck_gen.py:128 IND CLOCK 306
2025-03-30 06:19:12 [DEBUG] clck_gen.py:128 IND CLOCK 408
2025-03-30 06:19:12 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:19:12 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:19:12 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:19:12 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:19:12 [DEBUG] clck_gen.py:128 IND CLOCK 510
2025-03-30 06:19:12 [DEBUG] clck_gen.py:128 IND CLOCK 612
2025-03-30 06:19:13 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:19:13 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:19:13 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:19:13 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:19:13 [DEBUG] clck_gen.py:128 IND CLOCK 714
2025-03-30 06:19:13 [DEBUG] clck_gen.py:128 IND CLOCK 816
2025-03-30 06:19:14 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:19:14 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:19:14 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:19:14 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:19:14 [DEBUG] clck_gen.py:128 IND CLOCK 918
2025-03-30 06:19:14 [DEBUG] clck_gen.py:128 IND CLOCK 1020
2025-03-30 06:19:15 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:19:15 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:19:15 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:19:15 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:19:15 [DEBUG] clck_gen.py:128 IND CLOCK 1122
2025-03-30 06:19:15 [DEBUG] clck_gen.py:128 IND CLOCK 1224
2025-03-30 06:19:16 [DEBUG] clck_gen.py:128 IND CLOCK 1326
2025-03-30 06:19:16 [DEBUG] clck_gen.py:128 IND CLOCK 1428
2025-03-30 06:19:17 [DEBUG] clck_gen.py:128 IND CLOCK 1530
2025-03-30 06:19:17 [DEBUG] clck_gen.py:128 IND CLOCK 1632
2025-03-30 06:19:18 [DEBUG] clck_gen.py:128 IND CLOCK 1734
2025-03-30 06:19:18 [DEBUG] clck_gen.py:128 IND CLOCK 1836
2025-03-30 06:19:19 [DEBUG] clck_gen.py:128 IND CLOCK 1938
2025-03-30 06:19:19 [DEBUG] clck_gen.py:128 IND CLOCK 2040
2025-03-30 06:19:20 [DEBUG] clck_gen.py:128 IND CLOCK 2142
2025-03-30 06:19:20 [DEBUG] clck_gen.py:128 IND CLOCK 2244
2025-03-30 06:19:20 [DEBUG] clck_gen.py:128 IND CLOCK 2346
2025-03-30 06:19:21 [DEBUG] clck_gen.py:128 IND CLOCK 2448
2025-03-30 06:19:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:19:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:19:21 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:19:21 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:19:21 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:19:21 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:19:21 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:19:21 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:19:21 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:19:21 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:19:21 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:19:21 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:19:21 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 06:19:21 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 06:19:21 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 06:19:21 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=2485 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:19:21 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=2485 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:19:21 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=2485 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:19:21 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=2485 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:19:21 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=2485 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:19:21 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=2485 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:19:26 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 06:19:26 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 06:19:26 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:19:26 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:19:26 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:19:26 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:19:26 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:19:26 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 06:19:26 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:19:26 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 06:19:26 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 06:19:26 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 06:19:26 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 06:19:26 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 06:19:26 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:19:26 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:19:26 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 06:19:26 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 06:19:26 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 06:19:26 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 06:19:26 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 06:19:26 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 06:19:26 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:19:26 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:19:26 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 06:19:26 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 06:19:26 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 06:19:26 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 06:19:26 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 06:19:26 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 06:19:26 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:19:26 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:19:26 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 06:19:26 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 06:19:26 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 06:19:26 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 06:19:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 06:19:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 06:19:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 06:19:26 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 06:19:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 06:19:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 06:19:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 06:19:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:19:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 06:19:26 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 06:19:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:19:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:19:26 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 06:19:26 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 06:19:26 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 06:19:26 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 06:19:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:19:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:19:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:19:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 06:19:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:19:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:19:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:19:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:19:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:19:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:19:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:19:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:19:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:19:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:19:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:19:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:19:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:19:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:19:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:19:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:19:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:19:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:19:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:19:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:19:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:19:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:19:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:19:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:19:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:19:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:19:26 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-03-30 06:19:27 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-03-30 06:19:27 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-03-30 06:19:27 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-03-30 06:19:27 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-03-30 06:19:27 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-03-30 06:19:27 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-03-30 06:19:27 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-03-30 06:19:27 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-03-30 06:19:27 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-03-30 06:19:27 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 06:19:27 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 06:19:27 [DEBUG] fake_trx.py:317 (BTS@172.18.26.20:5700) Recv FAKE_CI cmd
2025-03-30 06:19:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:19:27 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:19:27 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:19:27 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:19:27 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 06:19:27 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:19:27 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:19:27 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:19:27 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:19:27 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:19:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:19:27 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:19:27 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:19:27 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:19:27 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:19:27 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-03-30 06:19:27 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:19:27 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:19:27 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:19:27 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:19:28 [DEBUG] clck_gen.py:128 IND CLOCK 306
2025-03-30 06:19:28 [DEBUG] clck_gen.py:128 IND CLOCK 408
2025-03-30 06:19:28 [DEBUG] fake_trx.py:264 (MS@172.18.26.22:6700) Recv SETTA cmd
2025-03-30 06:19:28 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:19:28 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:19:28 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:19:28 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:19:28 [DEBUG] clck_gen.py:128 IND CLOCK 510
2025-03-30 06:19:29 [DEBUG] clck_gen.py:128 IND CLOCK 612
2025-03-30 06:19:29 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:19:29 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:19:29 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:19:29 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:19:29 [DEBUG] clck_gen.py:128 IND CLOCK 714
2025-03-30 06:19:30 [DEBUG] clck_gen.py:128 IND CLOCK 816
2025-03-30 06:19:30 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:19:30 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:19:30 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:19:30 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:19:30 [DEBUG] clck_gen.py:128 IND CLOCK 918
2025-03-30 06:19:31 [DEBUG] clck_gen.py:128 IND CLOCK 1020
2025-03-30 06:19:31 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:19:31 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:19:31 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:19:31 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:19:31 [DEBUG] clck_gen.py:128 IND CLOCK 1122
2025-03-30 06:19:32 [DEBUG] clck_gen.py:128 IND CLOCK 1224
2025-03-30 06:19:32 [DEBUG] clck_gen.py:128 IND CLOCK 1326
2025-03-30 06:19:33 [DEBUG] clck_gen.py:128 IND CLOCK 1428
2025-03-30 06:19:33 [DEBUG] clck_gen.py:128 IND CLOCK 1530
2025-03-30 06:19:34 [DEBUG] clck_gen.py:128 IND CLOCK 1632
2025-03-30 06:19:34 [DEBUG] clck_gen.py:128 IND CLOCK 1734
2025-03-30 06:19:35 [DEBUG] clck_gen.py:128 IND CLOCK 1836
2025-03-30 06:19:35 [DEBUG] clck_gen.py:128 IND CLOCK 1938
2025-03-30 06:19:36 [DEBUG] clck_gen.py:128 IND CLOCK 2040
2025-03-30 06:19:36 [DEBUG] clck_gen.py:128 IND CLOCK 2142
2025-03-30 06:19:36 [DEBUG] clck_gen.py:128 IND CLOCK 2244
2025-03-30 06:19:37 [DEBUG] clck_gen.py:128 IND CLOCK 2346
2025-03-30 06:19:37 [DEBUG] clck_gen.py:128 IND CLOCK 2448
2025-03-30 06:19:38 [DEBUG] clck_gen.py:128 IND CLOCK 2550
2025-03-30 06:19:38 [DEBUG] clck_gen.py:128 IND CLOCK 2652
2025-03-30 06:19:39 [DEBUG] clck_gen.py:128 IND CLOCK 2754
2025-03-30 06:19:39 [DEBUG] clck_gen.py:128 IND CLOCK 2856
2025-03-30 06:19:40 [DEBUG] clck_gen.py:128 IND CLOCK 2958
2025-03-30 06:19:40 [DEBUG] clck_gen.py:128 IND CLOCK 3060
2025-03-30 06:19:41 [DEBUG] clck_gen.py:128 IND CLOCK 3162
2025-03-30 06:19:41 [DEBUG] clck_gen.py:128 IND CLOCK 3264
2025-03-30 06:19:42 [DEBUG] clck_gen.py:128 IND CLOCK 3366
2025-03-30 06:19:42 [DEBUG] clck_gen.py:128 IND CLOCK 3468
2025-03-30 06:19:43 [DEBUG] clck_gen.py:128 IND CLOCK 3570
2025-03-30 06:19:43 [DEBUG] clck_gen.py:128 IND CLOCK 3672
2025-03-30 06:19:44 [DEBUG] clck_gen.py:128 IND CLOCK 3774
2025-03-30 06:19:44 [DEBUG] clck_gen.py:128 IND CLOCK 3876
2025-03-30 06:19:44 [DEBUG] clck_gen.py:128 IND CLOCK 3978
2025-03-30 06:19:45 [DEBUG] clck_gen.py:128 IND CLOCK 4080
2025-03-30 06:19:45 [DEBUG] clck_gen.py:128 IND CLOCK 4182
2025-03-30 06:19:46 [DEBUG] clck_gen.py:128 IND CLOCK 4284
2025-03-30 06:19:46 [DEBUG] clck_gen.py:128 IND CLOCK 4386
2025-03-30 06:19:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:19:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:19:47 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:19:47 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:19:47 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:19:47 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:19:47 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:19:47 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:19:47 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:19:47 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:19:47 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:19:47 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:19:47 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 06:19:47 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 06:19:47 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 06:19:47 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=4478 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:19:47 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=4478 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:19:47 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=4478 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:19:47 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=4478 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:19:47 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=4478 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:19:47 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=4478 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:19:52 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 06:19:52 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 06:19:52 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:19:52 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:19:52 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:19:52 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:19:52 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:19:52 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 06:19:52 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:19:52 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 06:19:52 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 06:19:52 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 06:19:52 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 06:19:52 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 06:19:52 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:19:52 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:19:52 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 06:19:52 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 06:19:52 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 06:19:52 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 06:19:52 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 06:19:52 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 06:19:52 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:19:52 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:19:52 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 06:19:52 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 06:19:52 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 06:19:52 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 06:19:52 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 06:19:52 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 06:19:52 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:19:52 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 06:19:52 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:19:52 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 06:19:52 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 06:19:52 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 06:19:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 06:19:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 06:19:52 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 06:19:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 06:19:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 06:19:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 06:19:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 06:19:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:19:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 06:19:52 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 06:19:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:19:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:19:52 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 06:19:52 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 06:19:52 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 06:19:52 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 06:19:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:19:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:19:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:19:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 06:19:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:19:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:19:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:19:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:19:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:19:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:19:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:19:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:19:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:19:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:19:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:19:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:19:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:19:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:19:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:19:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:19:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:19:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:19:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:19:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:19:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:19:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:19:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:19:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:19:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:19:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:19:52 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-03-30 06:19:52 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-03-30 06:19:52 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-03-30 06:19:52 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-03-30 06:19:52 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-03-30 06:19:52 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-03-30 06:19:52 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-03-30 06:19:52 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-03-30 06:19:52 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-03-30 06:19:52 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-03-30 06:19:52 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 06:19:52 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 06:19:52 [DEBUG] fake_trx.py:317 (BTS@172.18.26.20:5700) Recv FAKE_CI cmd
2025-03-30 06:19:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:19:52 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:19:52 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:19:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:19:52 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 06:19:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:19:52 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:19:52 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:19:52 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:19:52 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:19:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:19:52 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:19:52 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:19:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:19:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:19:53 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-03-30 06:19:53 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:19:53 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:19:53 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:19:53 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:19:53 [DEBUG] clck_gen.py:128 IND CLOCK 306
2025-03-30 06:19:54 [DEBUG] clck_gen.py:128 IND CLOCK 408
2025-03-30 06:19:54 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:19:54 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:19:54 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:19:54 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:19:54 [DEBUG] clck_gen.py:128 IND CLOCK 510
2025-03-30 06:19:55 [DEBUG] clck_gen.py:128 IND CLOCK 612
2025-03-30 06:19:55 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:19:55 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:19:55 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:19:55 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:19:55 [DEBUG] clck_gen.py:128 IND CLOCK 714
2025-03-30 06:19:56 [DEBUG] clck_gen.py:128 IND CLOCK 816
2025-03-30 06:19:56 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:19:56 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:19:56 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:19:56 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:19:56 [DEBUG] clck_gen.py:128 IND CLOCK 918
2025-03-30 06:19:56 [DEBUG] clck_gen.py:128 IND CLOCK 1020
2025-03-30 06:19:57 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:19:57 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:19:57 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:19:57 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:19:57 [DEBUG] clck_gen.py:128 IND CLOCK 1122
2025-03-30 06:19:57 [DEBUG] clck_gen.py:128 IND CLOCK 1224
2025-03-30 06:19:58 [DEBUG] clck_gen.py:128 IND CLOCK 1326
2025-03-30 06:19:58 [DEBUG] clck_gen.py:128 IND CLOCK 1428
2025-03-30 06:19:59 [DEBUG] clck_gen.py:128 IND CLOCK 1530
2025-03-30 06:19:59 [DEBUG] clck_gen.py:128 IND CLOCK 1632
2025-03-30 06:20:00 [DEBUG] clck_gen.py:128 IND CLOCK 1734
2025-03-30 06:20:00 [DEBUG] clck_gen.py:128 IND CLOCK 1836
2025-03-30 06:20:01 [DEBUG] clck_gen.py:128 IND CLOCK 1938
2025-03-30 06:20:01 [DEBUG] clck_gen.py:128 IND CLOCK 2040
2025-03-30 06:20:02 [DEBUG] clck_gen.py:128 IND CLOCK 2142
2025-03-30 06:20:02 [DEBUG] clck_gen.py:128 IND CLOCK 2244
2025-03-30 06:20:03 [DEBUG] clck_gen.py:128 IND CLOCK 2346
2025-03-30 06:20:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:20:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:20:03 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:20:03 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:20:03 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:20:03 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:20:03 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:20:03 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:20:03 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:20:03 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:20:03 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 06:20:03 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 06:20:03 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 06:20:03 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:20:03 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=2379 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:20:03 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:20:03 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=2379 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:20:03 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=2379 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:20:03 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=2379 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:20:03 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=2379 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:20:03 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=2379 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:20:03 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=2379 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:20:03 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=2379 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:20:08 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 06:20:08 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 06:20:08 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:20:08 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:20:08 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:20:08 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:20:08 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:20:08 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 06:20:08 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:20:08 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 06:20:08 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 06:20:08 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 06:20:08 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 06:20:08 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 06:20:08 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:20:08 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:20:08 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 06:20:08 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 06:20:08 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 06:20:08 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 06:20:08 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 06:20:08 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 06:20:08 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:20:08 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:20:08 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 06:20:08 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 06:20:08 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 06:20:08 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 06:20:08 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 06:20:08 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 06:20:08 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:20:08 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:20:08 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 06:20:08 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 06:20:08 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 06:20:08 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 06:20:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 06:20:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 06:20:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 06:20:08 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 06:20:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 06:20:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 06:20:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 06:20:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:20:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 06:20:08 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 06:20:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:20:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:20:08 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 06:20:08 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 06:20:08 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 06:20:08 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 06:20:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:20:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:20:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:20:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 06:20:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:20:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:20:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:20:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:20:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:20:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:20:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:20:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:20:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:20:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:20:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:20:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:20:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:20:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:20:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:20:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:20:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:20:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:20:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:20:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:20:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:20:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:20:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:20:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:20:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:20:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:20:08 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-03-30 06:20:08 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-03-30 06:20:08 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-03-30 06:20:08 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-03-30 06:20:08 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-03-30 06:20:08 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-03-30 06:20:08 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-03-30 06:20:08 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-03-30 06:20:08 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-03-30 06:20:08 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-03-30 06:20:08 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=105 tn=0 bl=148 pwr=0
2025-03-30 06:20:08 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=105 tn=1 bl=148 pwr=0
2025-03-30 06:20:08 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=105 tn=2 bl=148 pwr=0
2025-03-30 06:20:08 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=105 tn=3 bl=148 pwr=0
2025-03-30 06:20:08 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=105 tn=4 bl=148 pwr=0
2025-03-30 06:20:08 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=105 tn=5 bl=148 pwr=0
2025-03-30 06:20:08 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=105 tn=6 bl=148 pwr=0
2025-03-30 06:20:08 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=105 tn=7 bl=148 pwr=0
2025-03-30 06:20:08 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=106 tn=0 bl=148 pwr=0
2025-03-30 06:20:08 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=106 tn=1 bl=148 pwr=0
2025-03-30 06:20:08 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=106 tn=2 bl=148 pwr=0
2025-03-30 06:20:08 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=106 tn=3 bl=148 pwr=0
2025-03-30 06:20:08 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=106 tn=4 bl=148 pwr=0
2025-03-30 06:20:08 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=106 tn=5 bl=148 pwr=0
2025-03-30 06:20:08 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=106 tn=6 bl=148 pwr=0
2025-03-30 06:20:08 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=106 tn=7 bl=148 pwr=0
2025-03-30 06:20:08 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=107 tn=0 bl=148 pwr=0
2025-03-30 06:20:08 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=107 tn=1 bl=148 pwr=0
2025-03-30 06:20:08 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=107 tn=2 bl=148 pwr=0
2025-03-30 06:20:08 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=107 tn=3 bl=148 pwr=0
2025-03-30 06:20:08 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=107 tn=4 bl=148 pwr=0
2025-03-30 06:20:08 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=107 tn=5 bl=148 pwr=0
2025-03-30 06:20:08 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=107 tn=6 bl=148 pwr=0
2025-03-30 06:20:08 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=107 tn=7 bl=148 pwr=0
2025-03-30 06:20:08 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 06:20:08 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 06:20:08 [DEBUG] fake_trx.py:317 (BTS@172.18.26.20:5700) Recv FAKE_CI cmd
2025-03-30 06:20:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:20:08 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:20:08 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:20:08 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:20:08 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 06:20:08 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:20:08 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:20:08 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:20:08 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:20:08 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:20:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:20:08 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:20:08 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 06:20:08 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:20:08 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:20:08 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:20:09 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-03-30 06:20:09 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:20:09 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:20:09 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:20:09 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:20:09 [DEBUG] clck_gen.py:128 IND CLOCK 306
2025-03-30 06:20:09 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 06:20:10 [DEBUG] clck_gen.py:128 IND CLOCK 408
2025-03-30 06:20:10 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:20:10 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:20:10 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:20:10 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:20:10 [DEBUG] clck_gen.py:128 IND CLOCK 510
2025-03-30 06:20:11 [DEBUG] clck_gen.py:128 IND CLOCK 612
2025-03-30 06:20:11 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:20:11 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:20:11 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:20:11 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:20:11 [DEBUG] clck_gen.py:128 IND CLOCK 714
2025-03-30 06:20:12 [DEBUG] clck_gen.py:128 IND CLOCK 816
2025-03-30 06:20:12 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:20:12 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:20:12 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:20:12 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:20:12 [DEBUG] clck_gen.py:128 IND CLOCK 918
2025-03-30 06:20:13 [DEBUG] clck_gen.py:128 IND CLOCK 1020
2025-03-30 06:20:13 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:20:13 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:20:13 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:20:13 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:20:13 [DEBUG] clck_gen.py:128 IND CLOCK 1122
2025-03-30 06:20:13 [DEBUG] clck_gen.py:128 IND CLOCK 1224
2025-03-30 06:20:14 [DEBUG] clck_gen.py:128 IND CLOCK 1326
2025-03-30 06:20:14 [DEBUG] clck_gen.py:128 IND CLOCK 1428
2025-03-30 06:20:15 [DEBUG] clck_gen.py:128 IND CLOCK 1530
2025-03-30 06:20:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:20:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:20:15 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:20:15 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:20:15 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:20:15 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:20:15 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:20:15 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:20:15 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:20:15 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:20:15 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:20:15 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 06:20:15 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 06:20:15 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 06:20:15 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:20:20 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 06:20:20 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 06:20:20 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:20:20 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:20:20 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:20:20 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:20:20 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:20:20 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 06:20:20 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:20:20 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 06:20:20 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 06:20:20 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 06:20:20 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 06:20:20 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 06:20:20 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:20:20 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:20:20 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 06:20:20 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 06:20:20 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 06:20:20 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 06:20:20 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 06:20:20 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 06:20:20 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:20:20 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:20:20 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 06:20:20 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 06:20:20 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 06:20:20 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 06:20:20 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 06:20:20 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 06:20:20 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:20:20 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:20:20 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 06:20:20 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 06:20:20 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 06:20:20 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 06:20:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 06:20:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 06:20:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 06:20:20 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 06:20:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 06:20:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 06:20:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 06:20:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:20:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 06:20:20 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 06:20:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:20:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:20:20 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 06:20:20 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 06:20:20 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 06:20:20 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 06:20:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:20:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:20:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:20:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 06:20:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:20:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:20:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:20:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:20:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:20:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:20:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:20:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:20:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:20:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:20:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:20:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:20:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:20:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:20:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:20:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:20:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:20:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:20:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:20:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:20:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:20:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:20:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:20:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:20:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:20:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:20:20 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-03-30 06:20:21 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-03-30 06:20:21 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-03-30 06:20:21 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-03-30 06:20:21 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-03-30 06:20:21 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-03-30 06:20:21 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-03-30 06:20:21 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-03-30 06:20:21 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-03-30 06:20:21 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-03-30 06:20:21 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 06:20:21 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 06:20:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:20:21 [DEBUG] fake_trx.py:317 (BTS@172.18.26.20:5700) Recv FAKE_CI cmd
2025-03-30 06:20:21 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:20:21 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:20:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:20:21 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 06:20:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:20:21 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:20:21 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:20:21 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:20:21 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:20:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:20:21 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:20:21 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:20:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:20:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:20:21 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-03-30 06:20:21 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:20:21 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:20:21 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:20:21 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:20:21 [DEBUG] clck_gen.py:128 IND CLOCK 306
2025-03-30 06:20:22 [DEBUG] clck_gen.py:128 IND CLOCK 408
2025-03-30 06:20:22 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:20:22 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:20:22 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:20:22 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:20:22 [DEBUG] clck_gen.py:128 IND CLOCK 510
2025-03-30 06:20:23 [DEBUG] clck_gen.py:128 IND CLOCK 612
2025-03-30 06:20:23 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:20:23 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:20:23 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:20:23 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:20:23 [DEBUG] clck_gen.py:128 IND CLOCK 714
2025-03-30 06:20:24 [DEBUG] clck_gen.py:128 IND CLOCK 816
2025-03-30 06:20:24 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:20:24 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:20:24 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:20:24 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:20:24 [DEBUG] clck_gen.py:128 IND CLOCK 918
2025-03-30 06:20:25 [DEBUG] clck_gen.py:128 IND CLOCK 1020
2025-03-30 06:20:25 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:20:25 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:20:25 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:20:25 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:20:25 [DEBUG] clck_gen.py:128 IND CLOCK 1122
2025-03-30 06:20:26 [DEBUG] clck_gen.py:128 IND CLOCK 1224
2025-03-30 06:20:26 [DEBUG] clck_gen.py:128 IND CLOCK 1326
2025-03-30 06:20:27 [DEBUG] clck_gen.py:128 IND CLOCK 1428
2025-03-30 06:20:27 [DEBUG] clck_gen.py:128 IND CLOCK 1530
2025-03-30 06:20:28 [DEBUG] clck_gen.py:128 IND CLOCK 1632
2025-03-30 06:20:28 [DEBUG] clck_gen.py:128 IND CLOCK 1734
2025-03-30 06:20:29 [DEBUG] clck_gen.py:128 IND CLOCK 1836
2025-03-30 06:20:29 [DEBUG] clck_gen.py:128 IND CLOCK 1938
2025-03-30 06:20:29 [DEBUG] clck_gen.py:128 IND CLOCK 2040
2025-03-30 06:20:30 [DEBUG] clck_gen.py:128 IND CLOCK 2142
2025-03-30 06:20:30 [DEBUG] clck_gen.py:128 IND CLOCK 2244
2025-03-30 06:20:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:20:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:20:31 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:20:31 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:20:31 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:20:31 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:20:31 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:20:31 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:20:31 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:20:31 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:20:31 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:20:31 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 06:20:31 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 06:20:31 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 06:20:31 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:20:36 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 06:20:36 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 06:20:36 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:20:36 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:20:36 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:20:36 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:20:36 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:20:36 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 06:20:36 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:20:36 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 06:20:36 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 06:20:36 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 06:20:36 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 06:20:36 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 06:20:36 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:20:36 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:20:36 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 06:20:36 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 06:20:36 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 06:20:36 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 06:20:36 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 06:20:36 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 06:20:36 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:20:36 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:20:36 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 06:20:36 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 06:20:36 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 06:20:36 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 06:20:36 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 06:20:36 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 06:20:36 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:20:36 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:20:36 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 06:20:36 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 06:20:36 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 06:20:36 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 06:20:36 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 06:20:36 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 06:20:36 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 06:20:36 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 06:20:36 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 06:20:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 06:20:36 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 06:20:36 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 06:20:36 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 06:20:36 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:20:36 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:20:36 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:20:36 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 06:20:36 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 06:20:36 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 06:20:36 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 06:20:36 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:20:36 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:20:36 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:20:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 06:20:36 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:20:36 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:20:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:20:36 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:20:36 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:20:36 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:20:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:20:36 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:20:36 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:20:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:20:36 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:20:36 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:20:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:20:36 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:20:36 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:20:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:20:36 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:20:36 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:20:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:20:36 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:20:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:20:36 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:20:36 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:20:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:20:36 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:20:36 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:20:36 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-03-30 06:20:36 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-03-30 06:20:36 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-03-30 06:20:36 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-03-30 06:20:36 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-03-30 06:20:36 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-03-30 06:20:36 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-03-30 06:20:36 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-03-30 06:20:36 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-03-30 06:20:36 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-03-30 06:20:36 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 06:20:36 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 06:20:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:20:36 [DEBUG] fake_trx.py:317 (BTS@172.18.26.20:5700) Recv FAKE_CI cmd
2025-03-30 06:20:36 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:20:36 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:20:36 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:20:36 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:20:36 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:20:36 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:20:36 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:20:36 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:20:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:20:36 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:20:36 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:20:36 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:20:36 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:20:37 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-03-30 06:20:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:20:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:20:37 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:20:37 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:20:37 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:20:37 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:20:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:20:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:20:37 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:20:37 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:20:37 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:20:37 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:20:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:20:37 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:20:37 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:20:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:20:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:20:37 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:20:37 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:20:37 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:20:37 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:20:37 [DEBUG] clck_gen.py:128 IND CLOCK 306
2025-03-30 06:20:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:20:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:20:37 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:20:37 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:20:37 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:20:37 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:20:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:20:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:20:37 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:20:37 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:20:37 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:20:37 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:20:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:20:37 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:20:37 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:20:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:20:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:20:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:20:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:20:38 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:20:38 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:20:38 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:20:38 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:20:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:20:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:20:38 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:20:38 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:20:38 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:20:38 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:20:38 [DEBUG] clck_gen.py:128 IND CLOCK 408
2025-03-30 06:20:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:20:38 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:20:38 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:20:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:20:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:20:38 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:20:38 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:20:38 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:20:38 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:20:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:20:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:20:38 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:20:38 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:20:38 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:20:38 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:20:38 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:20:38 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:20:38 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:20:38 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:20:38 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:20:38 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:20:38 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 06:20:38 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 06:20:38 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 06:20:38 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=498 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:20:38 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=498 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:20:38 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=498 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:20:38 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=498 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:20:43 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 06:20:43 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 06:20:43 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:20:43 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:20:43 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:20:43 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:20:43 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:20:43 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 06:20:43 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:20:43 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 06:20:43 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 06:20:43 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 06:20:43 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 06:20:43 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 06:20:43 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:20:43 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 06:20:43 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:20:43 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 06:20:43 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 06:20:43 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 06:20:43 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 06:20:43 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 06:20:43 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:20:43 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 06:20:43 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:20:43 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 06:20:43 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 06:20:43 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 06:20:43 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 06:20:43 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 06:20:43 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:20:43 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 06:20:43 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:20:43 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 06:20:43 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 06:20:43 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 06:20:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 06:20:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 06:20:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 06:20:43 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 06:20:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 06:20:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 06:20:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 06:20:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:20:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 06:20:43 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 06:20:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:20:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:20:43 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 06:20:43 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 06:20:43 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 06:20:43 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 06:20:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:20:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:20:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:20:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 06:20:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:20:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:20:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:20:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:20:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:20:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:20:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:20:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:20:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:20:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:20:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:20:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:20:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:20:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:20:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:20:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:20:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:20:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:20:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:20:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:20:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:20:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:20:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:20:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:20:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:20:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:20:43 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-03-30 06:20:43 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-03-30 06:20:43 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-03-30 06:20:43 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-03-30 06:20:43 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-03-30 06:20:43 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-03-30 06:20:43 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-03-30 06:20:43 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-03-30 06:20:43 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-03-30 06:20:43 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-03-30 06:20:43 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 06:20:43 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 06:20:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:20:43 [DEBUG] fake_trx.py:317 (BTS@172.18.26.20:5700) Recv FAKE_CI cmd
2025-03-30 06:20:43 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:20:43 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:20:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:20:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:20:43 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:20:43 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:20:43 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:20:43 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:20:43 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 06:20:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:20:44 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:20:44 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:20:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:20:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:20:44 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-03-30 06:20:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:20:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:20:44 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:20:44 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:20:44 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:20:44 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:20:44 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:20:44 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:20:44 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:20:44 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:20:44 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:20:44 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:20:44 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 06:20:44 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 06:20:44 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 06:20:44 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=211 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:20:44 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=211 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:20:44 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=211 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:20:44 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=211 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:20:44 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=211 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:20:44 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=211 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:20:44 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=211 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:20:44 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=211 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:20:49 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 06:20:49 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 06:20:49 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:20:49 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:20:49 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:20:49 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:20:49 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:20:49 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 06:20:49 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:20:49 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 06:20:49 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 06:20:49 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 06:20:49 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 06:20:49 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 06:20:49 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:20:49 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:20:49 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 06:20:49 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 06:20:49 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 06:20:49 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 06:20:49 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 06:20:49 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 06:20:49 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:20:49 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:20:49 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 06:20:49 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 06:20:49 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 06:20:49 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 06:20:49 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 06:20:49 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 06:20:49 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:20:49 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:20:49 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 06:20:49 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 06:20:49 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 06:20:49 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 06:20:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 06:20:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 06:20:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 06:20:49 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 06:20:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 06:20:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 06:20:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 06:20:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 06:20:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:20:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:20:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:20:49 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 06:20:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:20:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:20:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:20:49 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 06:20:49 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 06:20:49 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 06:20:49 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 06:20:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:20:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:20:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:20:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 06:20:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:20:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:20:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:20:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:20:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:20:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:20:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:20:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:20:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:20:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:20:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:20:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:20:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:20:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:20:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:20:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:20:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:20:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:20:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:20:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:20:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:20:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:20:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:20:49 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-03-30 06:20:49 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-03-30 06:20:49 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-03-30 06:20:49 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-03-30 06:20:49 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-03-30 06:20:49 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-03-30 06:20:49 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-03-30 06:20:49 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-03-30 06:20:49 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-03-30 06:20:49 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-03-30 06:20:49 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=0 bl=148 pwr=0
2025-03-30 06:20:49 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=1 bl=148 pwr=0
2025-03-30 06:20:49 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=2 bl=148 pwr=0
2025-03-30 06:20:49 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=3 bl=148 pwr=0
2025-03-30 06:20:49 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=4 bl=148 pwr=0
2025-03-30 06:20:49 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=5 bl=148 pwr=0
2025-03-30 06:20:49 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=6 bl=148 pwr=0
2025-03-30 06:20:49 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=7 bl=148 pwr=0
2025-03-30 06:20:49 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 06:20:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:20:49 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 06:20:49 [DEBUG] fake_trx.py:317 (BTS@172.18.26.20:5700) Recv FAKE_CI cmd
2025-03-30 06:20:50 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:20:50 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:20:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:20:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:20:50 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:20:50 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:20:50 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:20:50 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:20:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:20:50 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:20:50 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:20:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:20:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:20:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:20:50 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-03-30 06:20:50 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:20:50 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:20:50 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:20:50 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:20:50 [DEBUG] clck_gen.py:128 IND CLOCK 306
2025-03-30 06:20:51 [DEBUG] clck_gen.py:128 IND CLOCK 408
2025-03-30 06:20:51 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:20:51 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:20:51 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:20:51 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:20:51 [DEBUG] clck_gen.py:128 IND CLOCK 510
2025-03-30 06:20:52 [DEBUG] clck_gen.py:128 IND CLOCK 612
2025-03-30 06:20:52 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:20:52 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:20:52 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:20:52 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:20:52 [DEBUG] clck_gen.py:128 IND CLOCK 714
2025-03-30 06:20:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:20:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:20:53 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:20:53 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:20:53 [DEBUG] clck_gen.py:128 IND CLOCK 816
2025-03-30 06:20:53 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:20:53 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:20:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:20:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:20:53 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:20:53 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:20:53 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:20:53 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:20:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:20:53 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:20:53 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:20:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:20:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:20:53 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:20:53 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:20:53 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:20:53 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:20:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:20:53 [DEBUG] clck_gen.py:128 IND CLOCK 918
2025-03-30 06:20:54 [DEBUG] clck_gen.py:128 IND CLOCK 1020
2025-03-30 06:20:54 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:20:54 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:20:54 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:20:54 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:20:54 [DEBUG] clck_gen.py:128 IND CLOCK 1122
2025-03-30 06:20:55 [DEBUG] clck_gen.py:128 IND CLOCK 1224
2025-03-30 06:20:55 [DEBUG] clck_gen.py:128 IND CLOCK 1326
2025-03-30 06:20:56 [DEBUG] clck_gen.py:128 IND CLOCK 1428
2025-03-30 06:20:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:20:56 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:20:56 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:20:56 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:20:56 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:20:56 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:20:56 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:20:56 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:20:56 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:20:56 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:20:56 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:20:56 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:20:56 [DEBUG] clck_gen.py:128 IND CLOCK 1530
2025-03-30 06:20:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:20:56 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:20:56 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:20:56 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:20:56 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:20:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:20:56 [DEBUG] clck_gen.py:128 IND CLOCK 1632
2025-03-30 06:20:57 [DEBUG] clck_gen.py:128 IND CLOCK 1734
2025-03-30 06:20:57 [DEBUG] clck_gen.py:128 IND CLOCK 1836
2025-03-30 06:20:58 [DEBUG] clck_gen.py:128 IND CLOCK 1938
2025-03-30 06:20:58 [DEBUG] clck_gen.py:128 IND CLOCK 2040
2025-03-30 06:20:59 [DEBUG] clck_gen.py:128 IND CLOCK 2142
2025-03-30 06:20:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:20:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:20:59 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:20:59 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:20:59 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:20:59 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:20:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:20:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:20:59 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:20:59 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:20:59 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:20:59 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:20:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:20:59 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:20:59 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:20:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:20:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:20:59 [DEBUG] clck_gen.py:128 IND CLOCK 2244
2025-03-30 06:20:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:21:00 [DEBUG] clck_gen.py:128 IND CLOCK 2346
2025-03-30 06:21:00 [DEBUG] clck_gen.py:128 IND CLOCK 2448
2025-03-30 06:21:01 [DEBUG] clck_gen.py:128 IND CLOCK 2550
2025-03-30 06:21:01 [DEBUG] clck_gen.py:128 IND CLOCK 2652
2025-03-30 06:21:02 [DEBUG] clck_gen.py:128 IND CLOCK 2754
2025-03-30 06:21:02 [DEBUG] clck_gen.py:128 IND CLOCK 2856
2025-03-30 06:21:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:21:02 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:21:02 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:21:02 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:21:02 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:21:02 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:21:02 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:21:02 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:21:02 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:21:02 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:21:02 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:21:02 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:21:02 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 06:21:02 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 06:21:02 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 06:21:07 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 06:21:07 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 06:21:07 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:21:07 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:21:07 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:21:07 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:21:07 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 06:21:07 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 06:21:07 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:21:07 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 06:21:07 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 06:21:07 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 06:21:07 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:21:07 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 06:21:07 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:21:07 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 06:21:07 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:21:07 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 06:21:07 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 06:21:07 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:21:07 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:21:07 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 06:21:07 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 06:21:07 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 06:21:07 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 06:21:07 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 06:21:07 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 06:21:07 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 06:21:07 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 06:21:07 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 06:21:07 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:21:07 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:21:07 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 06:21:07 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 06:21:07 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 06:21:07 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 06:21:07 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 06:21:07 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 06:21:07 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 06:21:07 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 06:21:07 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 06:21:07 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 06:21:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 06:21:07 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:21:07 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 06:21:07 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 06:21:07 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:21:07 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:21:07 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 06:21:07 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 06:21:07 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 06:21:07 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 06:21:07 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:21:07 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:21:07 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:21:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 06:21:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:21:07 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:21:07 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:21:07 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:21:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:21:07 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:21:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:21:07 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:21:07 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:21:07 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:21:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:21:07 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:21:07 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:21:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:21:07 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:21:07 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:21:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:21:07 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:21:07 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:21:07 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:21:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:21:07 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:21:07 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:21:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:21:07 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:21:07 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:21:07 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-03-30 06:21:08 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-03-30 06:21:08 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-03-30 06:21:08 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-03-30 06:21:08 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-03-30 06:21:08 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-03-30 06:21:08 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-03-30 06:21:08 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-03-30 06:21:08 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-03-30 06:21:08 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-03-30 06:21:08 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 06:21:08 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 06:21:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:21:08 [DEBUG] fake_trx.py:317 (BTS@172.18.26.20:5700) Recv FAKE_CI cmd
2025-03-30 06:21:08 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:21:08 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:21:08 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:21:08 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:21:08 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:21:08 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:21:08 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:21:08 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:21:08 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-03-30 06:21:08 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:21:08 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:21:08 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:21:08 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:21:09 [DEBUG] clck_gen.py:128 IND CLOCK 306
2025-03-30 06:21:09 [DEBUG] clck_gen.py:128 IND CLOCK 408
2025-03-30 06:21:09 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:21:09 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:21:09 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:21:09 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:21:10 [DEBUG] clck_gen.py:128 IND CLOCK 510
2025-03-30 06:21:10 [DEBUG] clck_gen.py:128 IND CLOCK 612
2025-03-30 06:21:10 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:21:10 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:21:10 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:21:10 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:21:11 [DEBUG] clck_gen.py:128 IND CLOCK 714
2025-03-30 06:21:11 [DEBUG] clck_gen.py:128 IND CLOCK 816
2025-03-30 06:21:11 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:21:11 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:21:11 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:21:11 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:21:12 [DEBUG] clck_gen.py:128 IND CLOCK 918
2025-03-30 06:21:12 [DEBUG] clck_gen.py:128 IND CLOCK 1020
2025-03-30 06:21:12 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:21:12 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:21:12 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:21:12 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:21:13 [DEBUG] clck_gen.py:128 IND CLOCK 1122
2025-03-30 06:21:13 [DEBUG] clck_gen.py:128 IND CLOCK 1224
2025-03-30 06:21:14 [DEBUG] clck_gen.py:128 IND CLOCK 1326
2025-03-30 06:21:14 [DEBUG] clck_gen.py:128 IND CLOCK 1428
2025-03-30 06:21:15 [DEBUG] clck_gen.py:128 IND CLOCK 1530
2025-03-30 06:21:15 [DEBUG] clck_gen.py:128 IND CLOCK 1632
2025-03-30 06:21:15 [DEBUG] clck_gen.py:128 IND CLOCK 1734
2025-03-30 06:21:16 [DEBUG] clck_gen.py:128 IND CLOCK 1836
2025-03-30 06:21:16 [DEBUG] clck_gen.py:128 IND CLOCK 1938
2025-03-30 06:21:17 [DEBUG] clck_gen.py:128 IND CLOCK 2040
2025-03-30 06:21:17 [DEBUG] clck_gen.py:128 IND CLOCK 2142
2025-03-30 06:21:18 [DEBUG] clck_gen.py:128 IND CLOCK 2244
2025-03-30 06:21:18 [DEBUG] clck_gen.py:128 IND CLOCK 2346
2025-03-30 06:21:19 [DEBUG] clck_gen.py:128 IND CLOCK 2448
2025-03-30 06:21:19 [DEBUG] clck_gen.py:128 IND CLOCK 2550
2025-03-30 06:21:20 [DEBUG] clck_gen.py:128 IND CLOCK 2652
2025-03-30 06:21:20 [DEBUG] clck_gen.py:128 IND CLOCK 2754
2025-03-30 06:21:21 [DEBUG] clck_gen.py:128 IND CLOCK 2856
2025-03-30 06:21:21 [DEBUG] clck_gen.py:128 IND CLOCK 2958
2025-03-30 06:21:22 [DEBUG] clck_gen.py:128 IND CLOCK 3060
2025-03-30 06:21:22 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:21:22 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:21:22 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:21:22 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:21:22 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:21:22 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:21:22 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:21:22 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 06:21:22 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 06:21:22 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:21:22 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:21:22 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:21:22 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 06:21:27 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 06:21:27 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 06:21:27 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:21:27 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:21:27 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:21:27 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:21:27 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:21:27 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 06:21:27 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:21:27 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 06:21:27 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 06:21:27 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 06:21:27 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 06:21:27 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 06:21:27 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:21:27 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:21:27 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 06:21:27 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 06:21:27 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 06:21:27 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 06:21:27 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 06:21:27 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 06:21:27 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:21:27 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:21:27 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 06:21:27 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 06:21:27 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 06:21:27 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 06:21:27 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 06:21:27 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 06:21:27 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:21:27 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:21:27 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 06:21:27 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 06:21:27 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 06:21:27 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 06:21:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 06:21:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 06:21:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 06:21:27 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 06:21:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 06:21:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 06:21:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 06:21:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 06:21:27 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 06:21:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:21:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:21:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:21:27 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 06:21:27 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 06:21:27 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 06:21:27 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 06:21:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:21:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:21:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:21:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 06:21:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:21:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:21:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:21:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:21:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:21:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:21:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:21:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:21:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:21:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:21:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:21:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:21:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:21:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:21:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:21:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:21:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:21:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:21:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:21:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:21:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:21:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:21:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:21:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:21:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:21:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:21:27 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-03-30 06:21:27 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-03-30 06:21:27 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-03-30 06:21:27 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-03-30 06:21:27 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-03-30 06:21:27 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-03-30 06:21:27 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-03-30 06:21:27 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-03-30 06:21:27 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-03-30 06:21:27 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-03-30 06:21:27 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=0 bl=148 pwr=0
2025-03-30 06:21:27 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=1 bl=148 pwr=0
2025-03-30 06:21:27 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=2 bl=148 pwr=0
2025-03-30 06:21:27 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=3 bl=148 pwr=0
2025-03-30 06:21:27 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=4 bl=148 pwr=0
2025-03-30 06:21:27 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=5 bl=148 pwr=0
2025-03-30 06:21:27 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=6 bl=148 pwr=0
2025-03-30 06:21:27 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=7 bl=148 pwr=0
2025-03-30 06:21:27 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 06:21:27 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 06:21:27 [DEBUG] fake_trx.py:317 (BTS@172.18.26.20:5700) Recv FAKE_CI cmd
2025-03-30 06:21:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:21:27 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:21:27 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:21:27 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:21:27 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:21:27 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:21:27 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:21:27 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:21:27 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:21:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:21:28 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:21:28 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:21:28 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:21:28 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:21:28 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-03-30 06:21:28 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:21:28 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:21:28 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:21:28 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:21:28 [DEBUG] clck_gen.py:128 IND CLOCK 306
2025-03-30 06:21:29 [DEBUG] clck_gen.py:128 IND CLOCK 408
2025-03-30 06:21:29 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:21:29 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:21:29 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:21:29 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:21:29 [DEBUG] clck_gen.py:128 IND CLOCK 510
2025-03-30 06:21:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:21:30 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:21:30 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:21:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:21:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:21:30 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:21:30 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:21:30 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:21:30 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:21:30 [DEBUG] clck_gen.py:128 IND CLOCK 612
2025-03-30 06:21:30 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:21:30 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:21:30 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:21:30 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:21:30 [DEBUG] clck_gen.py:128 IND CLOCK 714
2025-03-30 06:21:31 [DEBUG] clck_gen.py:128 IND CLOCK 816
2025-03-30 06:21:31 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:21:31 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:21:31 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:21:31 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:21:31 [DEBUG] clck_gen.py:128 IND CLOCK 918
2025-03-30 06:21:32 [DEBUG] clck_gen.py:128 IND CLOCK 1020
2025-03-30 06:21:32 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:21:32 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:21:32 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:21:32 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:21:32 [DEBUG] clck_gen.py:128 IND CLOCK 1122
2025-03-30 06:21:33 [DEBUG] clck_gen.py:128 IND CLOCK 1224
2025-03-30 06:21:33 [DEBUG] clck_gen.py:128 IND CLOCK 1326
2025-03-30 06:21:34 [DEBUG] clck_gen.py:128 IND CLOCK 1428
2025-03-30 06:21:34 [DEBUG] clck_gen.py:128 IND CLOCK 1530
2025-03-30 06:21:34 [DEBUG] clck_gen.py:128 IND CLOCK 1632
2025-03-30 06:21:35 [DEBUG] clck_gen.py:128 IND CLOCK 1734
2025-03-30 06:21:35 [DEBUG] clck_gen.py:128 IND CLOCK 1836
2025-03-30 06:21:36 [DEBUG] clck_gen.py:128 IND CLOCK 1938
2025-03-30 06:21:36 [DEBUG] clck_gen.py:128 IND CLOCK 2040
2025-03-30 06:21:37 [DEBUG] clck_gen.py:128 IND CLOCK 2142
2025-03-30 06:21:37 [DEBUG] clck_gen.py:128 IND CLOCK 2244
2025-03-30 06:21:38 [DEBUG] clck_gen.py:128 IND CLOCK 2346
2025-03-30 06:21:38 [DEBUG] clck_gen.py:128 IND CLOCK 2448
2025-03-30 06:21:39 [DEBUG] clck_gen.py:128 IND CLOCK 2550
2025-03-30 06:21:39 [DEBUG] clck_gen.py:128 IND CLOCK 2652
2025-03-30 06:21:40 [DEBUG] clck_gen.py:128 IND CLOCK 2754
2025-03-30 06:21:40 [DEBUG] clck_gen.py:128 IND CLOCK 2856
2025-03-30 06:21:41 [DEBUG] clck_gen.py:128 IND CLOCK 2958
2025-03-30 06:21:41 [DEBUG] clck_gen.py:128 IND CLOCK 3060
2025-03-30 06:21:42 [DEBUG] clck_gen.py:128 IND CLOCK 3162
2025-03-30 06:21:42 [DEBUG] clck_gen.py:128 IND CLOCK 3264
2025-03-30 06:21:42 [DEBUG] clck_gen.py:128 IND CLOCK 3366
2025-03-30 06:21:43 [DEBUG] clck_gen.py:128 IND CLOCK 3468
2025-03-30 06:21:43 [DEBUG] clck_gen.py:128 IND CLOCK 3570
2025-03-30 06:21:44 [DEBUG] clck_gen.py:128 IND CLOCK 3672
2025-03-30 06:21:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:21:44 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:21:44 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:21:44 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:21:44 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:21:44 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:21:44 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:21:44 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:21:44 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:21:44 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:21:44 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 06:21:44 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 06:21:44 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 06:21:44 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:21:49 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 06:21:49 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 06:21:49 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:21:49 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:21:49 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:21:49 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:21:49 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:21:49 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 06:21:49 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:21:49 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 06:21:49 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 06:21:49 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 06:21:49 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 06:21:49 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 06:21:49 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:21:49 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:21:49 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 06:21:49 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 06:21:49 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 06:21:49 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 06:21:49 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 06:21:49 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 06:21:49 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:21:49 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:21:49 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 06:21:49 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 06:21:49 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 06:21:49 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 06:21:49 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 06:21:49 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 06:21:49 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:21:49 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:21:49 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 06:21:49 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 06:21:49 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 06:21:49 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 06:21:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 06:21:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 06:21:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 06:21:49 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 06:21:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 06:21:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 06:21:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 06:21:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 06:21:49 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 06:21:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:21:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:21:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:21:49 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 06:21:49 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 06:21:49 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 06:21:49 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 06:21:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:21:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:21:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:21:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 06:21:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:21:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:21:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:21:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:21:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:21:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:21:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:21:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:21:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:21:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:21:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:21:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:21:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:21:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:21:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:21:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:21:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:21:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:21:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:21:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:21:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:21:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:21:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:21:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:21:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:21:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:21:49 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-03-30 06:21:50 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-03-30 06:21:50 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-03-30 06:21:50 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-03-30 06:21:50 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-03-30 06:21:50 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-03-30 06:21:50 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-03-30 06:21:50 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-03-30 06:21:50 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-03-30 06:21:50 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-03-30 06:21:50 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 06:21:50 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 06:21:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:21:50 [DEBUG] fake_trx.py:317 (BTS@172.18.26.20:5700) Recv FAKE_CI cmd
2025-03-30 06:21:50 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:21:50 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:21:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:21:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:21:50 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:21:50 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:21:50 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:21:50 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:21:50 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-03-30 06:21:50 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:21:50 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:21:50 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:21:50 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:21:51 [DEBUG] clck_gen.py:128 IND CLOCK 306
2025-03-30 06:21:51 [DEBUG] clck_gen.py:128 IND CLOCK 408
2025-03-30 06:21:51 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:21:51 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:21:51 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:21:51 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:21:52 [DEBUG] clck_gen.py:128 IND CLOCK 510
2025-03-30 06:21:52 [DEBUG] clck_gen.py:128 IND CLOCK 612
2025-03-30 06:21:52 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:21:52 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:21:52 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:21:52 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:21:53 [DEBUG] clck_gen.py:128 IND CLOCK 714
2025-03-30 06:21:53 [DEBUG] clck_gen.py:128 IND CLOCK 816
2025-03-30 06:21:53 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:21:53 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:21:53 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:21:53 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:21:53 [DEBUG] clck_gen.py:128 IND CLOCK 918
2025-03-30 06:21:54 [DEBUG] clck_gen.py:128 IND CLOCK 1020
2025-03-30 06:21:54 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:21:54 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:21:54 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:21:54 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:21:54 [DEBUG] clck_gen.py:128 IND CLOCK 1122
2025-03-30 06:21:55 [DEBUG] clck_gen.py:128 IND CLOCK 1224
2025-03-30 06:21:55 [DEBUG] clck_gen.py:128 IND CLOCK 1326
2025-03-30 06:21:56 [DEBUG] clck_gen.py:128 IND CLOCK 1428
2025-03-30 06:21:56 [DEBUG] clck_gen.py:128 IND CLOCK 1530
2025-03-30 06:21:57 [DEBUG] clck_gen.py:128 IND CLOCK 1632
2025-03-30 06:21:57 [DEBUG] clck_gen.py:128 IND CLOCK 1734
2025-03-30 06:21:58 [DEBUG] clck_gen.py:128 IND CLOCK 1836
2025-03-30 06:21:58 [DEBUG] clck_gen.py:128 IND CLOCK 1938
2025-03-30 06:21:59 [DEBUG] clck_gen.py:128 IND CLOCK 2040
2025-03-30 06:21:59 [DEBUG] clck_gen.py:128 IND CLOCK 2142
2025-03-30 06:22:00 [DEBUG] clck_gen.py:128 IND CLOCK 2244
2025-03-30 06:22:00 [DEBUG] clck_gen.py:128 IND CLOCK 2346
2025-03-30 06:22:01 [DEBUG] clck_gen.py:128 IND CLOCK 2448
2025-03-30 06:22:01 [DEBUG] clck_gen.py:128 IND CLOCK 2550
2025-03-30 06:22:01 [DEBUG] clck_gen.py:128 IND CLOCK 2652
2025-03-30 06:22:02 [DEBUG] clck_gen.py:128 IND CLOCK 2754
2025-03-30 06:22:02 [DEBUG] clck_gen.py:128 IND CLOCK 2856
2025-03-30 06:22:03 [DEBUG] clck_gen.py:128 IND CLOCK 2958
2025-03-30 06:22:03 [DEBUG] clck_gen.py:128 IND CLOCK 3060
2025-03-30 06:22:04 [DEBUG] clck_gen.py:128 IND CLOCK 3162
2025-03-30 06:22:04 [DEBUG] clck_gen.py:128 IND CLOCK 3264
2025-03-30 06:22:05 [DEBUG] clck_gen.py:128 IND CLOCK 3366
2025-03-30 06:22:05 [DEBUG] clck_gen.py:128 IND CLOCK 3468
2025-03-30 06:22:06 [DEBUG] clck_gen.py:128 IND CLOCK 3570
2025-03-30 06:22:06 [DEBUG] clck_gen.py:128 IND CLOCK 3672
2025-03-30 06:22:07 [DEBUG] clck_gen.py:128 IND CLOCK 3774
2025-03-30 06:22:07 [DEBUG] clck_gen.py:128 IND CLOCK 3876
2025-03-30 06:22:08 [DEBUG] clck_gen.py:128 IND CLOCK 3978
2025-03-30 06:22:08 [DEBUG] clck_gen.py:128 IND CLOCK 4080
2025-03-30 06:22:09 [DEBUG] clck_gen.py:128 IND CLOCK 4182
2025-03-30 06:22:09 [DEBUG] clck_gen.py:128 IND CLOCK 4284
2025-03-30 06:22:09 [DEBUG] clck_gen.py:128 IND CLOCK 4386
2025-03-30 06:22:10 [DEBUG] clck_gen.py:128 IND CLOCK 4488
2025-03-30 06:22:10 [DEBUG] clck_gen.py:128 IND CLOCK 4590
2025-03-30 06:22:11 [DEBUG] clck_gen.py:128 IND CLOCK 4692
2025-03-30 06:22:11 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:22:11 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:22:11 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:22:11 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:22:11 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:22:11 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:22:11 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:22:11 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:22:11 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:22:11 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:22:11 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 06:22:11 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 06:22:11 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 06:22:11 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=4773 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:22:11 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=4773 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:22:11 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=4773 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:22:11 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=4773 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:22:11 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=4773 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:22:11 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=4773 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:22:11 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=4773 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:22:11 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=4773 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:22:16 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 06:22:16 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 06:22:16 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:22:16 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:22:16 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:22:16 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:22:16 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:22:16 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 06:22:16 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:22:16 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 06:22:16 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 06:22:16 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 06:22:16 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 06:22:16 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 06:22:16 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:22:16 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:22:16 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 06:22:16 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 06:22:16 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 06:22:16 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 06:22:16 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 06:22:16 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 06:22:16 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:22:16 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:22:16 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 06:22:16 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 06:22:16 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 06:22:16 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 06:22:16 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 06:22:16 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 06:22:16 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:22:16 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:22:16 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 06:22:16 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 06:22:16 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 06:22:16 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 06:22:16 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 06:22:16 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 06:22:16 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 06:22:16 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 06:22:16 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 06:22:16 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 06:22:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 06:22:16 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:22:16 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 06:22:16 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 06:22:16 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:22:16 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:22:16 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 06:22:16 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 06:22:16 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 06:22:16 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 06:22:16 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:22:16 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:22:16 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:22:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 06:22:16 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:22:16 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:22:16 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:22:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:22:16 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:22:16 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:22:16 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:22:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:22:16 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:22:16 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:22:16 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:22:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:22:16 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:22:16 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:22:16 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:22:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:22:16 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:22:16 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:22:16 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:22:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:22:16 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:22:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:22:16 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:22:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:22:16 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:22:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:22:16 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-03-30 06:22:17 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-03-30 06:22:17 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-03-30 06:22:17 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-03-30 06:22:17 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-03-30 06:22:17 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-03-30 06:22:17 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-03-30 06:22:17 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-03-30 06:22:17 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-03-30 06:22:17 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-03-30 06:22:17 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 06:22:17 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 06:22:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:22:17 [DEBUG] fake_trx.py:317 (BTS@172.18.26.20:5700) Recv FAKE_CI cmd
2025-03-30 06:22:17 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:22:17 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:22:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:22:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:22:17 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:22:17 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:22:17 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:22:17 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:22:17 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-03-30 06:22:17 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:22:17 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:22:17 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:22:17 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:22:18 [DEBUG] clck_gen.py:128 IND CLOCK 306
2025-03-30 06:22:18 [DEBUG] clck_gen.py:128 IND CLOCK 408
2025-03-30 06:22:18 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:22:18 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:22:18 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:22:18 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:22:19 [DEBUG] clck_gen.py:128 IND CLOCK 510
2025-03-30 06:22:19 [DEBUG] clck_gen.py:128 IND CLOCK 612
2025-03-30 06:22:19 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:22:19 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:22:19 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:22:19 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:22:20 [DEBUG] clck_gen.py:128 IND CLOCK 714
2025-03-30 06:22:20 [DEBUG] clck_gen.py:128 IND CLOCK 816
2025-03-30 06:22:20 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:22:20 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:22:20 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:22:20 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:22:21 [DEBUG] clck_gen.py:128 IND CLOCK 918
2025-03-30 06:22:21 [DEBUG] clck_gen.py:128 IND CLOCK 1020
2025-03-30 06:22:21 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:22:21 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:22:21 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:22:21 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:22:21 [DEBUG] clck_gen.py:128 IND CLOCK 1122
2025-03-30 06:22:22 [DEBUG] clck_gen.py:128 IND CLOCK 1224
2025-03-30 06:22:22 [DEBUG] clck_gen.py:128 IND CLOCK 1326
2025-03-30 06:22:23 [DEBUG] clck_gen.py:128 IND CLOCK 1428
2025-03-30 06:22:23 [DEBUG] clck_gen.py:128 IND CLOCK 1530
2025-03-30 06:22:24 [DEBUG] clck_gen.py:128 IND CLOCK 1632
2025-03-30 06:22:24 [DEBUG] clck_gen.py:128 IND CLOCK 1734
2025-03-30 06:22:25 [DEBUG] clck_gen.py:128 IND CLOCK 1836
2025-03-30 06:22:25 [DEBUG] clck_gen.py:128 IND CLOCK 1938
2025-03-30 06:22:26 [DEBUG] clck_gen.py:128 IND CLOCK 2040
2025-03-30 06:22:26 [DEBUG] clck_gen.py:128 IND CLOCK 2142
2025-03-30 06:22:27 [DEBUG] clck_gen.py:128 IND CLOCK 2244
2025-03-30 06:22:27 [DEBUG] clck_gen.py:128 IND CLOCK 2346
2025-03-30 06:22:28 [DEBUG] clck_gen.py:128 IND CLOCK 2448
2025-03-30 06:22:28 [DEBUG] clck_gen.py:128 IND CLOCK 2550
2025-03-30 06:22:29 [DEBUG] clck_gen.py:128 IND CLOCK 2652
2025-03-30 06:22:29 [DEBUG] clck_gen.py:128 IND CLOCK 2754
2025-03-30 06:22:29 [DEBUG] clck_gen.py:128 IND CLOCK 2856
2025-03-30 06:22:30 [DEBUG] clck_gen.py:128 IND CLOCK 2958
2025-03-30 06:22:30 [DEBUG] clck_gen.py:128 IND CLOCK 3060
2025-03-30 06:22:31 [DEBUG] clck_gen.py:128 IND CLOCK 3162
2025-03-30 06:22:31 [DEBUG] clck_gen.py:128 IND CLOCK 3264
2025-03-30 06:22:32 [DEBUG] clck_gen.py:128 IND CLOCK 3366
2025-03-30 06:22:32 [DEBUG] clck_gen.py:128 IND CLOCK 3468
2025-03-30 06:22:33 [DEBUG] clck_gen.py:128 IND CLOCK 3570
2025-03-30 06:22:33 [DEBUG] clck_gen.py:128 IND CLOCK 3672
2025-03-30 06:22:34 [DEBUG] clck_gen.py:128 IND CLOCK 3774
2025-03-30 06:22:34 [DEBUG] clck_gen.py:128 IND CLOCK 3876
2025-03-30 06:22:35 [DEBUG] clck_gen.py:128 IND CLOCK 3978
2025-03-30 06:22:35 [DEBUG] clck_gen.py:128 IND CLOCK 4080
2025-03-30 06:22:36 [DEBUG] clck_gen.py:128 IND CLOCK 4182
2025-03-30 06:22:36 [DEBUG] clck_gen.py:128 IND CLOCK 4284
2025-03-30 06:22:37 [DEBUG] clck_gen.py:128 IND CLOCK 4386
2025-03-30 06:22:37 [DEBUG] clck_gen.py:128 IND CLOCK 4488
2025-03-30 06:22:37 [DEBUG] clck_gen.py:128 IND CLOCK 4590
2025-03-30 06:22:38 [DEBUG] clck_gen.py:128 IND CLOCK 4692
2025-03-30 06:22:38 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:22:38 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:22:38 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:22:38 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:22:38 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:22:38 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:22:38 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:22:38 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:22:38 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:22:38 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:22:38 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 06:22:38 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 06:22:38 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 06:22:38 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=4772 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:22:38 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=4772 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:22:38 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=4772 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:22:38 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=4772 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:22:38 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=4772 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:22:38 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=4772 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:22:43 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 06:22:43 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 06:22:43 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:22:43 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:22:43 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:22:43 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:22:43 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:22:43 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 06:22:43 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:22:43 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 06:22:43 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 06:22:43 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 06:22:43 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 06:22:43 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 06:22:43 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:22:43 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:22:43 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 06:22:43 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 06:22:43 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 06:22:43 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 06:22:43 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 06:22:43 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 06:22:43 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:22:43 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:22:43 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 06:22:43 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 06:22:43 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 06:22:43 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 06:22:43 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 06:22:43 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 06:22:43 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:22:43 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:22:43 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 06:22:43 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 06:22:43 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 06:22:43 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 06:22:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 06:22:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 06:22:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 06:22:43 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 06:22:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 06:22:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 06:22:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 06:22:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:22:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 06:22:43 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 06:22:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:22:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:22:43 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 06:22:43 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 06:22:43 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 06:22:43 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 06:22:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:22:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:22:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:22:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 06:22:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:22:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:22:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:22:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:22:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:22:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:22:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:22:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:22:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:22:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:22:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:22:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:22:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:22:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:22:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:22:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:22:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:22:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:22:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:22:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:22:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:22:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:22:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:22:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:22:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:22:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:22:43 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-03-30 06:22:44 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-03-30 06:22:44 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-03-30 06:22:44 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-03-30 06:22:44 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-03-30 06:22:44 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-03-30 06:22:44 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-03-30 06:22:44 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-03-30 06:22:44 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-03-30 06:22:44 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-03-30 06:22:44 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 06:22:44 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 06:22:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:22:44 [DEBUG] fake_trx.py:317 (BTS@172.18.26.20:5700) Recv FAKE_CI cmd
2025-03-30 06:22:44 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:22:44 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:22:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:22:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:22:44 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:22:44 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:22:44 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:22:44 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:22:44 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-03-30 06:22:44 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:22:44 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:22:44 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:22:44 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:22:45 [DEBUG] clck_gen.py:128 IND CLOCK 306
2025-03-30 06:22:45 [DEBUG] clck_gen.py:128 IND CLOCK 408
2025-03-30 06:22:45 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:22:45 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:22:45 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:22:45 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:22:46 [DEBUG] clck_gen.py:128 IND CLOCK 510
2025-03-30 06:22:46 [DEBUG] clck_gen.py:128 IND CLOCK 612
2025-03-30 06:22:46 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:22:46 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:22:46 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:22:46 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:22:47 [DEBUG] clck_gen.py:128 IND CLOCK 714
2025-03-30 06:22:47 [DEBUG] clck_gen.py:128 IND CLOCK 816
2025-03-30 06:22:47 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:22:47 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:22:47 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:22:47 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:22:48 [DEBUG] clck_gen.py:128 IND CLOCK 918
2025-03-30 06:22:48 [DEBUG] clck_gen.py:128 IND CLOCK 1020
2025-03-30 06:22:48 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:22:48 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:22:48 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:22:48 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:22:49 [DEBUG] clck_gen.py:128 IND CLOCK 1122
2025-03-30 06:22:49 [DEBUG] clck_gen.py:128 IND CLOCK 1224
2025-03-30 06:22:49 [DEBUG] clck_gen.py:128 IND CLOCK 1326
2025-03-30 06:22:50 [DEBUG] clck_gen.py:128 IND CLOCK 1428
2025-03-30 06:22:50 [DEBUG] clck_gen.py:128 IND CLOCK 1530
2025-03-30 06:22:51 [DEBUG] clck_gen.py:128 IND CLOCK 1632
2025-03-30 06:22:51 [DEBUG] clck_gen.py:128 IND CLOCK 1734
2025-03-30 06:22:52 [DEBUG] clck_gen.py:128 IND CLOCK 1836
2025-03-30 06:22:52 [DEBUG] clck_gen.py:128 IND CLOCK 1938
2025-03-30 06:22:53 [DEBUG] clck_gen.py:128 IND CLOCK 2040
2025-03-30 06:22:53 [DEBUG] clck_gen.py:128 IND CLOCK 2142
2025-03-30 06:22:54 [DEBUG] clck_gen.py:128 IND CLOCK 2244
2025-03-30 06:22:54 [DEBUG] clck_gen.py:128 IND CLOCK 2346
2025-03-30 06:22:55 [DEBUG] clck_gen.py:128 IND CLOCK 2448
2025-03-30 06:22:55 [DEBUG] clck_gen.py:128 IND CLOCK 2550
2025-03-30 06:22:56 [DEBUG] clck_gen.py:128 IND CLOCK 2652
2025-03-30 06:22:56 [DEBUG] clck_gen.py:128 IND CLOCK 2754
2025-03-30 06:22:57 [DEBUG] clck_gen.py:128 IND CLOCK 2856
2025-03-30 06:22:57 [DEBUG] clck_gen.py:128 IND CLOCK 2958
2025-03-30 06:22:57 [DEBUG] clck_gen.py:128 IND CLOCK 3060
2025-03-30 06:22:58 [DEBUG] clck_gen.py:128 IND CLOCK 3162
2025-03-30 06:22:58 [DEBUG] clck_gen.py:128 IND CLOCK 3264
2025-03-30 06:22:59 [DEBUG] clck_gen.py:128 IND CLOCK 3366
2025-03-30 06:22:59 [DEBUG] clck_gen.py:128 IND CLOCK 3468
2025-03-30 06:23:00 [DEBUG] clck_gen.py:128 IND CLOCK 3570
2025-03-30 06:23:00 [DEBUG] clck_gen.py:128 IND CLOCK 3672
2025-03-30 06:23:01 [DEBUG] clck_gen.py:128 IND CLOCK 3774
2025-03-30 06:23:01 [DEBUG] clck_gen.py:128 IND CLOCK 3876
2025-03-30 06:23:02 [DEBUG] clck_gen.py:128 IND CLOCK 3978
2025-03-30 06:23:02 [DEBUG] clck_gen.py:128 IND CLOCK 4080
2025-03-30 06:23:03 [DEBUG] clck_gen.py:128 IND CLOCK 4182
2025-03-30 06:23:03 [DEBUG] clck_gen.py:128 IND CLOCK 4284
2025-03-30 06:23:04 [DEBUG] clck_gen.py:128 IND CLOCK 4386
2025-03-30 06:23:04 [DEBUG] clck_gen.py:128 IND CLOCK 4488
2025-03-30 06:23:05 [DEBUG] clck_gen.py:128 IND CLOCK 4590
2025-03-30 06:23:05 [DEBUG] clck_gen.py:128 IND CLOCK 4692
2025-03-30 06:23:05 [DEBUG] clck_gen.py:128 IND CLOCK 4794
2025-03-30 06:23:06 [DEBUG] clck_gen.py:128 IND CLOCK 4896
2025-03-30 06:23:06 [DEBUG] clck_gen.py:128 IND CLOCK 4998
2025-03-30 06:23:07 [DEBUG] clck_gen.py:128 IND CLOCK 5100
2025-03-30 06:23:07 [DEBUG] clck_gen.py:128 IND CLOCK 5202
2025-03-30 06:23:08 [DEBUG] clck_gen.py:128 IND CLOCK 5304
2025-03-30 06:23:08 [DEBUG] clck_gen.py:128 IND CLOCK 5406
2025-03-30 06:23:09 [DEBUG] clck_gen.py:128 IND CLOCK 5508
2025-03-30 06:23:09 [DEBUG] clck_gen.py:128 IND CLOCK 5610
2025-03-30 06:23:10 [DEBUG] clck_gen.py:128 IND CLOCK 5712
2025-03-30 06:23:10 [DEBUG] clck_gen.py:128 IND CLOCK 5814
2025-03-30 06:23:11 [DEBUG] clck_gen.py:128 IND CLOCK 5916
2025-03-30 06:23:11 [DEBUG] clck_gen.py:128 IND CLOCK 6018
2025-03-30 06:23:12 [DEBUG] clck_gen.py:128 IND CLOCK 6120
2025-03-30 06:23:12 [DEBUG] clck_gen.py:128 IND CLOCK 6222
2025-03-30 06:23:13 [DEBUG] clck_gen.py:128 IND CLOCK 6324
2025-03-30 06:23:13 [DEBUG] clck_gen.py:128 IND CLOCK 6426
2025-03-30 06:23:13 [DEBUG] clck_gen.py:128 IND CLOCK 6528
2025-03-30 06:23:14 [DEBUG] clck_gen.py:128 IND CLOCK 6630
2025-03-30 06:23:14 [DEBUG] clck_gen.py:128 IND CLOCK 6732
2025-03-30 06:23:15 [DEBUG] clck_gen.py:128 IND CLOCK 6834
2025-03-30 06:23:15 [DEBUG] clck_gen.py:128 IND CLOCK 6936
2025-03-30 06:23:16 [DEBUG] clck_gen.py:128 IND CLOCK 7038
2025-03-30 06:23:16 [DEBUG] clck_gen.py:128 IND CLOCK 7140
2025-03-30 06:23:17 [DEBUG] clck_gen.py:128 IND CLOCK 7242
2025-03-30 06:23:17 [DEBUG] clck_gen.py:128 IND CLOCK 7344
2025-03-30 06:23:17 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:23:17 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:23:17 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:23:17 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:23:17 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:23:17 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:23:17 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:23:17 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:23:17 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 06:23:17 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 06:23:17 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 06:23:17 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:23:17 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:23:17 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=7375 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:23:17 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=7375 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:23:17 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=7375 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:23:17 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=7375 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:23:17 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=7375 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:23:17 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=7375 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:23:17 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=7375 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:23:17 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=7376 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:23:17 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=7376 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:23:17 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=7376 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:23:17 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=7376 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:23:17 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=7376 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:23:17 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=7376 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:23:17 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=7376 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:23:17 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=7376 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:23:22 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 06:23:22 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 06:23:22 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:23:22 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:23:22 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:23:22 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:23:22 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:23:22 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 06:23:22 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:23:22 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 06:23:22 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 06:23:22 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 06:23:22 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 06:23:22 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 06:23:22 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:23:22 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:23:22 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 06:23:22 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 06:23:22 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 06:23:22 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 06:23:22 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 06:23:22 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 06:23:22 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:23:22 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:23:22 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 06:23:22 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 06:23:22 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 06:23:22 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 06:23:22 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 06:23:22 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 06:23:22 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:23:22 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:23:22 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 06:23:22 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 06:23:22 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 06:23:22 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 06:23:22 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 06:23:22 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 06:23:22 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 06:23:22 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 06:23:22 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 06:23:22 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 06:23:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 06:23:22 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:23:22 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 06:23:22 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 06:23:22 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:23:22 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:23:22 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 06:23:22 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 06:23:22 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 06:23:22 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 06:23:22 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:23:22 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:23:22 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:23:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 06:23:22 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:23:22 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:23:22 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:23:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:23:22 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:23:22 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:23:22 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:23:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:23:22 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:23:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:23:22 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:23:22 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:23:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:23:22 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:23:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:23:22 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:23:22 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:23:22 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:23:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:23:22 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:23:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:23:22 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:23:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:23:22 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:23:22 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:23:22 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:23:22 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-03-30 06:23:23 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-03-30 06:23:23 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=107): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-03-30 06:23:23 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=107): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-03-30 06:23:23 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=107): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-03-30 06:23:23 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=107): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-03-30 06:23:23 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=107): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-03-30 06:23:23 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=107): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-03-30 06:23:23 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=107): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-03-30 06:23:23 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=107): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-03-30 06:23:23 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=107): ver=1 fn=105 tn=0 bl=148 pwr=0
2025-03-30 06:23:23 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=107): ver=1 fn=105 tn=1 bl=148 pwr=0
2025-03-30 06:23:23 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=107): ver=1 fn=105 tn=2 bl=148 pwr=0
2025-03-30 06:23:23 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=107): ver=1 fn=105 tn=3 bl=148 pwr=0
2025-03-30 06:23:23 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=107): ver=1 fn=105 tn=4 bl=148 pwr=0
2025-03-30 06:23:23 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=107): ver=1 fn=105 tn=5 bl=148 pwr=0
2025-03-30 06:23:23 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=107): ver=1 fn=105 tn=6 bl=148 pwr=0
2025-03-30 06:23:23 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=107): ver=1 fn=105 tn=7 bl=148 pwr=0
2025-03-30 06:23:23 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=107): ver=1 fn=106 tn=0 bl=148 pwr=0
2025-03-30 06:23:23 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=107): ver=1 fn=106 tn=1 bl=148 pwr=0
2025-03-30 06:23:23 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=107): ver=1 fn=106 tn=2 bl=148 pwr=0
2025-03-30 06:23:23 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=107): ver=1 fn=106 tn=3 bl=148 pwr=0
2025-03-30 06:23:23 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=107): ver=1 fn=106 tn=4 bl=148 pwr=0
2025-03-30 06:23:23 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=107): ver=1 fn=106 tn=5 bl=148 pwr=0
2025-03-30 06:23:23 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=107): ver=1 fn=106 tn=6 bl=148 pwr=0
2025-03-30 06:23:23 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=107): ver=1 fn=106 tn=7 bl=148 pwr=0
2025-03-30 06:23:23 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 06:23:23 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 06:23:23 [DEBUG] fake_trx.py:317 (BTS@172.18.26.20:5700) Recv FAKE_CI cmd
2025-03-30 06:23:23 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:23:23 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:23:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:23:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:23:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:23:23 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:23:23 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:23:23 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:23:23 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:23:23 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-03-30 06:23:23 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:23:23 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:23:23 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:23:23 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:23:24 [DEBUG] clck_gen.py:128 IND CLOCK 306
2025-03-30 06:23:24 [DEBUG] clck_gen.py:128 IND CLOCK 408
2025-03-30 06:23:24 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:23:24 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:23:24 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:23:24 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:23:25 [DEBUG] clck_gen.py:128 IND CLOCK 510
2025-03-30 06:23:25 [DEBUG] clck_gen.py:128 IND CLOCK 612
2025-03-30 06:23:25 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:23:25 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:23:25 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:23:25 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:23:26 [DEBUG] clck_gen.py:128 IND CLOCK 714
2025-03-30 06:23:26 [DEBUG] clck_gen.py:128 IND CLOCK 816
2025-03-30 06:23:26 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:23:26 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:23:26 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:23:26 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:23:27 [DEBUG] clck_gen.py:128 IND CLOCK 918
2025-03-30 06:23:27 [DEBUG] clck_gen.py:128 IND CLOCK 1020
2025-03-30 06:23:27 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:23:27 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:23:27 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:23:27 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:23:28 [DEBUG] clck_gen.py:128 IND CLOCK 1122
2025-03-30 06:23:28 [DEBUG] clck_gen.py:128 IND CLOCK 1224
2025-03-30 06:23:29 [DEBUG] clck_gen.py:128 IND CLOCK 1326
2025-03-30 06:23:29 [DEBUG] clck_gen.py:128 IND CLOCK 1428
2025-03-30 06:23:29 [DEBUG] clck_gen.py:128 IND CLOCK 1530
2025-03-30 06:23:30 [DEBUG] clck_gen.py:128 IND CLOCK 1632
2025-03-30 06:23:30 [DEBUG] clck_gen.py:128 IND CLOCK 1734
2025-03-30 06:23:31 [DEBUG] clck_gen.py:128 IND CLOCK 1836
2025-03-30 06:23:31 [DEBUG] clck_gen.py:128 IND CLOCK 1938
2025-03-30 06:23:32 [DEBUG] clck_gen.py:128 IND CLOCK 2040
2025-03-30 06:23:32 [DEBUG] clck_gen.py:128 IND CLOCK 2142
2025-03-30 06:23:33 [DEBUG] clck_gen.py:128 IND CLOCK 2244
2025-03-30 06:23:33 [DEBUG] clck_gen.py:128 IND CLOCK 2346
2025-03-30 06:23:34 [DEBUG] clck_gen.py:128 IND CLOCK 2448
2025-03-30 06:23:34 [DEBUG] clck_gen.py:128 IND CLOCK 2550
2025-03-30 06:23:35 [DEBUG] clck_gen.py:128 IND CLOCK 2652
2025-03-30 06:23:35 [DEBUG] clck_gen.py:128 IND CLOCK 2754
2025-03-30 06:23:36 [DEBUG] clck_gen.py:128 IND CLOCK 2856
2025-03-30 06:23:36 [DEBUG] clck_gen.py:128 IND CLOCK 2958
2025-03-30 06:23:37 [DEBUG] clck_gen.py:128 IND CLOCK 3060
2025-03-30 06:23:37 [DEBUG] clck_gen.py:128 IND CLOCK 3162
2025-03-30 06:23:37 [DEBUG] clck_gen.py:128 IND CLOCK 3264
2025-03-30 06:23:38 [DEBUG] clck_gen.py:128 IND CLOCK 3366
2025-03-30 06:23:38 [DEBUG] clck_gen.py:128 IND CLOCK 3468
2025-03-30 06:23:39 [DEBUG] clck_gen.py:128 IND CLOCK 3570
2025-03-30 06:23:39 [DEBUG] clck_gen.py:128 IND CLOCK 3672
2025-03-30 06:23:40 [DEBUG] clck_gen.py:128 IND CLOCK 3774
2025-03-30 06:23:40 [DEBUG] clck_gen.py:128 IND CLOCK 3876
2025-03-30 06:23:41 [DEBUG] clck_gen.py:128 IND CLOCK 3978
2025-03-30 06:23:41 [DEBUG] clck_gen.py:128 IND CLOCK 4080
2025-03-30 06:23:42 [DEBUG] clck_gen.py:128 IND CLOCK 4182
2025-03-30 06:23:42 [DEBUG] clck_gen.py:128 IND CLOCK 4284
2025-03-30 06:23:43 [DEBUG] clck_gen.py:128 IND CLOCK 4386
2025-03-30 06:23:43 [DEBUG] clck_gen.py:128 IND CLOCK 4488
2025-03-30 06:23:44 [DEBUG] clck_gen.py:128 IND CLOCK 4590
2025-03-30 06:23:44 [DEBUG] clck_gen.py:128 IND CLOCK 4692
2025-03-30 06:23:45 [DEBUG] clck_gen.py:128 IND CLOCK 4794
2025-03-30 06:23:45 [DEBUG] clck_gen.py:128 IND CLOCK 4896
2025-03-30 06:23:45 [DEBUG] clck_gen.py:128 IND CLOCK 4998
2025-03-30 06:23:46 [DEBUG] clck_gen.py:128 IND CLOCK 5100
2025-03-30 06:23:46 [DEBUG] clck_gen.py:128 IND CLOCK 5202
2025-03-30 06:23:47 [DEBUG] clck_gen.py:128 IND CLOCK 5304
2025-03-30 06:23:47 [DEBUG] clck_gen.py:128 IND CLOCK 5406
2025-03-30 06:23:48 [DEBUG] clck_gen.py:128 IND CLOCK 5508
2025-03-30 06:23:48 [DEBUG] clck_gen.py:128 IND CLOCK 5610
2025-03-30 06:23:49 [DEBUG] clck_gen.py:128 IND CLOCK 5712
2025-03-30 06:23:49 [DEBUG] clck_gen.py:128 IND CLOCK 5814
2025-03-30 06:23:50 [DEBUG] clck_gen.py:128 IND CLOCK 5916
2025-03-30 06:23:50 [DEBUG] clck_gen.py:128 IND CLOCK 6018
2025-03-30 06:23:50 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:23:50 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:23:50 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:23:50 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:23:50 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:23:50 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:23:50 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:23:50 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:23:50 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:23:50 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:23:50 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 06:23:50 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 06:23:50 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 06:23:55 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 06:23:55 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 06:23:55 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:23:55 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:23:55 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:23:55 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:23:55 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:23:55 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 06:23:55 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:23:55 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 06:23:55 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 06:23:55 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 06:23:55 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 06:23:55 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 06:23:55 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:23:55 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:23:55 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 06:23:55 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 06:23:55 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 06:23:55 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 06:23:55 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 06:23:55 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 06:23:55 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:23:55 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:23:55 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 06:23:55 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 06:23:55 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 06:23:55 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 06:23:55 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 06:23:55 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 06:23:55 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:23:55 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:23:55 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 06:23:55 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 06:23:55 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 06:23:55 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 06:23:55 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 06:23:55 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 06:23:55 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 06:23:55 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 06:23:55 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 06:23:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 06:23:55 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 06:23:55 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 06:23:55 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 06:23:55 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:23:55 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:23:55 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 06:23:55 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 06:23:55 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 06:23:55 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 06:23:55 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:23:55 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:23:55 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:23:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 06:23:55 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:23:55 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:23:55 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:23:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:23:55 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:23:55 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:23:55 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:23:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:23:55 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:23:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:23:55 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:23:55 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:23:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:23:55 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:23:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:23:55 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:23:55 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:23:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:23:55 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:23:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:23:55 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:23:55 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:23:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:23:55 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:23:55 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:23:55 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:23:55 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:23:55 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-03-30 06:23:56 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-03-30 06:23:56 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-03-30 06:23:56 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-03-30 06:23:56 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-03-30 06:23:56 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-03-30 06:23:56 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-03-30 06:23:56 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-03-30 06:23:56 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-03-30 06:23:56 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-03-30 06:23:56 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=0 bl=148 pwr=0
2025-03-30 06:23:56 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=1 bl=148 pwr=0
2025-03-30 06:23:56 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=2 bl=148 pwr=0
2025-03-30 06:23:56 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=3 bl=148 pwr=0
2025-03-30 06:23:56 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=4 bl=148 pwr=0
2025-03-30 06:23:56 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=5 bl=148 pwr=0
2025-03-30 06:23:56 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=6 bl=148 pwr=0
2025-03-30 06:23:56 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=7 bl=148 pwr=0
2025-03-30 06:23:56 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 06:23:56 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 06:23:56 [DEBUG] fake_trx.py:317 (BTS@172.18.26.20:5700) Recv FAKE_CI cmd
2025-03-30 06:23:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:23:56 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:23:56 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:23:56 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:23:56 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:23:56 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:23:56 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:23:56 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:23:56 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 06:23:56 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 06:23:56 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 06:23:56 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:24:01 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 06:24:01 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 06:24:01 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:24:01 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:24:01 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:24:01 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:24:01 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:24:01 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 06:24:01 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:24:01 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 06:24:01 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 06:24:01 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 06:24:01 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 06:24:01 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 06:24:01 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:24:01 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:24:01 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 06:24:01 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 06:24:01 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 06:24:01 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 06:24:01 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 06:24:01 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 06:24:01 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:24:01 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:24:01 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 06:24:01 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 06:24:01 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 06:24:01 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 06:24:01 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 06:24:01 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 06:24:01 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:24:01 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:24:01 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 06:24:01 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 06:24:01 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 06:24:01 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 06:24:01 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 06:24:01 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 06:24:01 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 06:24:01 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 06:24:01 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 06:24:01 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 06:24:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 06:24:01 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:24:01 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 06:24:01 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 06:24:01 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:24:01 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:24:01 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 06:24:01 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 06:24:01 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 06:24:01 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 06:24:01 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:24:01 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:24:01 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:24:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 06:24:01 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:24:01 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:24:01 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:24:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:24:01 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:24:01 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:24:01 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:24:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:24:01 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:24:01 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:24:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:24:01 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:24:01 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:24:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:24:01 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:24:01 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:24:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:24:01 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:24:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:24:01 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:24:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:24:01 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:24:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:24:01 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:24:01 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:24:01 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:24:01 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-03-30 06:24:02 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-03-30 06:24:02 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-03-30 06:24:02 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-03-30 06:24:02 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-03-30 06:24:02 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-03-30 06:24:02 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-03-30 06:24:02 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-03-30 06:24:02 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-03-30 06:24:02 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-03-30 06:24:02 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=105 tn=0 bl=148 pwr=0
2025-03-30 06:24:02 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=105 tn=1 bl=148 pwr=0
2025-03-30 06:24:02 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=105 tn=2 bl=148 pwr=0
2025-03-30 06:24:02 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=105 tn=3 bl=148 pwr=0
2025-03-30 06:24:02 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=105 tn=4 bl=148 pwr=0
2025-03-30 06:24:02 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=105 tn=5 bl=148 pwr=0
2025-03-30 06:24:02 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=105 tn=6 bl=148 pwr=0
2025-03-30 06:24:02 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=105 tn=7 bl=148 pwr=0
2025-03-30 06:24:02 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=106 tn=0 bl=148 pwr=0
2025-03-30 06:24:02 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=106 tn=1 bl=148 pwr=0
2025-03-30 06:24:02 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=106 tn=2 bl=148 pwr=0
2025-03-30 06:24:02 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=106 tn=3 bl=148 pwr=0
2025-03-30 06:24:02 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=106 tn=4 bl=148 pwr=0
2025-03-30 06:24:02 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=106 tn=5 bl=148 pwr=0
2025-03-30 06:24:02 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=106 tn=6 bl=148 pwr=0
2025-03-30 06:24:02 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=106 tn=7 bl=148 pwr=0
2025-03-30 06:24:02 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=107 tn=0 bl=148 pwr=0
2025-03-30 06:24:02 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=107 tn=1 bl=148 pwr=0
2025-03-30 06:24:02 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=107 tn=2 bl=148 pwr=0
2025-03-30 06:24:02 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=107 tn=3 bl=148 pwr=0
2025-03-30 06:24:02 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=107 tn=4 bl=148 pwr=0
2025-03-30 06:24:02 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=107 tn=5 bl=148 pwr=0
2025-03-30 06:24:02 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=107 tn=6 bl=148 pwr=0
2025-03-30 06:24:02 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=107 tn=7 bl=148 pwr=0
2025-03-30 06:24:02 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 06:24:02 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 06:24:02 [DEBUG] fake_trx.py:317 (BTS@172.18.26.20:5700) Recv FAKE_CI cmd
2025-03-30 06:24:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:24:02 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:24:02 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:24:02 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:24:02 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:24:02 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:24:02 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:24:02 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:24:02 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:24:02 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 06:24:02 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 06:24:02 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 06:24:02 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=115 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:24:02 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=115 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:24:02 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=115 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:24:02 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=115 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:24:02 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=115 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:24:02 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=115 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:24:02 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=115 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:24:02 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=115 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:24:07 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 06:24:07 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 06:24:07 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:24:07 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:24:07 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:24:07 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:24:07 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:24:07 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 06:24:07 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:24:07 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 06:24:07 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 06:24:07 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 06:24:07 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 06:24:07 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 06:24:07 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:24:07 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:24:07 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 06:24:07 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 06:24:07 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 06:24:07 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 06:24:07 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 06:24:07 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 06:24:07 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:24:07 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:24:07 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 06:24:07 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 06:24:07 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 06:24:07 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 06:24:07 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 06:24:07 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 06:24:07 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:24:07 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:24:07 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 06:24:07 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 06:24:07 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 06:24:07 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 06:24:07 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 06:24:07 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 06:24:07 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 06:24:07 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 06:24:07 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 06:24:07 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 06:24:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 06:24:07 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:24:07 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 06:24:07 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 06:24:07 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:24:07 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:24:07 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 06:24:07 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 06:24:07 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 06:24:07 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 06:24:07 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:24:07 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:24:07 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:24:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 06:24:07 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:24:07 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:24:07 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:24:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:24:07 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:24:07 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:24:07 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:24:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:24:07 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:24:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:24:07 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:24:07 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:24:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:24:07 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:24:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:24:07 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:24:07 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:24:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:24:07 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:24:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:24:07 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:24:07 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:24:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:24:07 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:24:07 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:24:07 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:24:07 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-03-30 06:24:07 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-03-30 06:24:07 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-03-30 06:24:07 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-03-30 06:24:07 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-03-30 06:24:07 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-03-30 06:24:07 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-03-30 06:24:07 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-03-30 06:24:07 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-03-30 06:24:07 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-03-30 06:24:07 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=0 bl=148 pwr=0
2025-03-30 06:24:07 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=1 bl=148 pwr=0
2025-03-30 06:24:07 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=2 bl=148 pwr=0
2025-03-30 06:24:07 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=3 bl=148 pwr=0
2025-03-30 06:24:07 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=4 bl=148 pwr=0
2025-03-30 06:24:07 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=5 bl=148 pwr=0
2025-03-30 06:24:07 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=6 bl=148 pwr=0
2025-03-30 06:24:07 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=7 bl=148 pwr=0
2025-03-30 06:24:07 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 06:24:07 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 06:24:07 [DEBUG] fake_trx.py:317 (BTS@172.18.26.20:5700) Recv FAKE_CI cmd
2025-03-30 06:24:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:24:07 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:24:07 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:24:07 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:24:07 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:24:07 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:24:07 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:24:07 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:24:07 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 06:24:07 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 06:24:07 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 06:24:07 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=126 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:24:07 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:24:07 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=126 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:24:07 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=126 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:24:07 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=126 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:24:07 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=126 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:24:12 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 06:24:12 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 06:24:12 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:24:12 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:24:12 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:24:12 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:24:12 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:24:12 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 06:24:12 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:24:12 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 06:24:12 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 06:24:12 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 06:24:12 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 06:24:12 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 06:24:12 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:24:12 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:24:12 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 06:24:12 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 06:24:12 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 06:24:12 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 06:24:12 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 06:24:12 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 06:24:12 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:24:12 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 06:24:12 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:24:12 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 06:24:12 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 06:24:12 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 06:24:12 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 06:24:12 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 06:24:12 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:24:12 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 06:24:12 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:24:12 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 06:24:12 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 06:24:12 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 06:24:12 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 06:24:12 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 06:24:12 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 06:24:12 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 06:24:12 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 06:24:12 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 06:24:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 06:24:12 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:24:12 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 06:24:12 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 06:24:12 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:24:12 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:24:12 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 06:24:12 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 06:24:12 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 06:24:12 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 06:24:12 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:24:12 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:24:12 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:24:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 06:24:12 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:24:12 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:24:12 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:24:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:24:12 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:24:12 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:24:12 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:24:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:24:12 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:24:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:24:12 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:24:12 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:24:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:24:12 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:24:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:24:12 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:24:12 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:24:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:24:12 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:24:12 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:24:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:24:12 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:24:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:24:12 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:24:12 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:24:12 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:24:12 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-03-30 06:24:13 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-03-30 06:24:13 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-03-30 06:24:13 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-03-30 06:24:13 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-03-30 06:24:13 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-03-30 06:24:13 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-03-30 06:24:13 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-03-30 06:24:13 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-03-30 06:24:13 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-03-30 06:24:13 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=105 tn=0 bl=148 pwr=0
2025-03-30 06:24:13 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=105 tn=1 bl=148 pwr=0
2025-03-30 06:24:13 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=105 tn=2 bl=148 pwr=0
2025-03-30 06:24:13 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=105 tn=3 bl=148 pwr=0
2025-03-30 06:24:13 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=105 tn=4 bl=148 pwr=0
2025-03-30 06:24:13 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=105 tn=5 bl=148 pwr=0
2025-03-30 06:24:13 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=105 tn=6 bl=148 pwr=0
2025-03-30 06:24:13 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=105 tn=7 bl=148 pwr=0
2025-03-30 06:24:13 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=106 tn=0 bl=148 pwr=0
2025-03-30 06:24:13 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=106 tn=1 bl=148 pwr=0
2025-03-30 06:24:13 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=106 tn=2 bl=148 pwr=0
2025-03-30 06:24:13 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=106 tn=3 bl=148 pwr=0
2025-03-30 06:24:13 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=106 tn=4 bl=148 pwr=0
2025-03-30 06:24:13 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=106 tn=5 bl=148 pwr=0
2025-03-30 06:24:13 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=106 tn=6 bl=148 pwr=0
2025-03-30 06:24:13 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=106 tn=7 bl=148 pwr=0
2025-03-30 06:24:13 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=107 tn=0 bl=148 pwr=0
2025-03-30 06:24:13 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=107 tn=1 bl=148 pwr=0
2025-03-30 06:24:13 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=107 tn=2 bl=148 pwr=0
2025-03-30 06:24:13 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=107 tn=3 bl=148 pwr=0
2025-03-30 06:24:13 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=107 tn=4 bl=148 pwr=0
2025-03-30 06:24:13 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=107 tn=5 bl=148 pwr=0
2025-03-30 06:24:13 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=107 tn=6 bl=148 pwr=0
2025-03-30 06:24:13 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=107 tn=7 bl=148 pwr=0
2025-03-30 06:24:13 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 06:24:13 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 06:24:13 [DEBUG] fake_trx.py:317 (BTS@172.18.26.20:5700) Recv FAKE_CI cmd
2025-03-30 06:24:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:24:13 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:24:13 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:24:13 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:24:13 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:24:13 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:24:13 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:24:13 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:24:13 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:24:13 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-03-30 06:24:13 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:24:13 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:24:13 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:24:13 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:24:14 [DEBUG] clck_gen.py:128 IND CLOCK 306
2025-03-30 06:24:14 [DEBUG] clck_gen.py:128 IND CLOCK 408
2025-03-30 06:24:14 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:24:14 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:24:14 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:24:14 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:24:15 [DEBUG] clck_gen.py:128 IND CLOCK 510
2025-03-30 06:24:15 [DEBUG] clck_gen.py:128 IND CLOCK 612
2025-03-30 06:24:15 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:24:15 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:24:15 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:24:15 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:24:16 [DEBUG] clck_gen.py:128 IND CLOCK 714
2025-03-30 06:24:16 [DEBUG] clck_gen.py:128 IND CLOCK 816
2025-03-30 06:24:16 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:24:16 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:24:16 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:24:16 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:24:17 [DEBUG] clck_gen.py:128 IND CLOCK 918
2025-03-30 06:24:17 [DEBUG] clck_gen.py:128 IND CLOCK 1020
2025-03-30 06:24:17 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:24:17 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:24:17 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:24:17 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:24:17 [DEBUG] clck_gen.py:128 IND CLOCK 1122
2025-03-30 06:24:18 [DEBUG] clck_gen.py:128 IND CLOCK 1224
2025-03-30 06:24:18 [DEBUG] clck_gen.py:128 IND CLOCK 1326
2025-03-30 06:24:19 [DEBUG] clck_gen.py:128 IND CLOCK 1428
2025-03-30 06:24:19 [DEBUG] clck_gen.py:128 IND CLOCK 1530
2025-03-30 06:24:20 [DEBUG] clck_gen.py:128 IND CLOCK 1632
2025-03-30 06:24:20 [DEBUG] clck_gen.py:128 IND CLOCK 1734
2025-03-30 06:24:21 [DEBUG] clck_gen.py:128 IND CLOCK 1836
2025-03-30 06:24:21 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:24:21 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:24:21 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:24:21 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:24:21 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:24:21 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:24:21 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:24:21 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:24:21 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:24:21 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:24:21 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 06:24:21 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 06:24:21 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 06:24:21 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=1853 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:24:21 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=1853 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:24:21 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=1853 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:24:21 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=1853 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:24:21 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=1853 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:24:21 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=1853 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:24:26 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 06:24:26 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 06:24:26 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:24:26 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:24:26 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:24:26 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:24:26 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:24:26 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 06:24:26 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:24:26 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 06:24:26 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 06:24:26 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 06:24:26 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 06:24:26 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 06:24:26 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:24:26 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:24:26 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 06:24:26 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 06:24:26 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 06:24:26 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 06:24:26 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 06:24:26 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 06:24:26 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:24:26 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:24:26 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 06:24:26 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 06:24:26 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 06:24:26 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 06:24:26 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 06:24:26 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 06:24:26 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:24:26 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:24:26 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 06:24:26 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 06:24:26 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 06:24:26 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 06:24:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 06:24:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 06:24:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 06:24:26 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 06:24:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 06:24:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 06:24:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 06:24:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:24:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 06:24:26 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 06:24:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:24:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:24:26 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 06:24:26 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 06:24:26 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 06:24:26 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 06:24:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:24:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:24:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:24:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 06:24:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:24:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:24:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:24:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:24:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:24:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:24:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:24:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:24:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:24:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:24:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:24:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:24:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:24:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:24:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:24:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:24:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:24:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:24:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:24:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:24:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:24:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:24:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:24:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:24:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:24:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:24:26 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-03-30 06:24:26 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-03-30 06:24:26 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-03-30 06:24:26 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-03-30 06:24:26 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-03-30 06:24:26 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-03-30 06:24:26 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-03-30 06:24:26 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-03-30 06:24:26 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-03-30 06:24:26 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-03-30 06:24:26 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=0 bl=148 pwr=0
2025-03-30 06:24:26 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=1 bl=148 pwr=0
2025-03-30 06:24:26 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=2 bl=148 pwr=0
2025-03-30 06:24:26 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=3 bl=148 pwr=0
2025-03-30 06:24:26 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=4 bl=148 pwr=0
2025-03-30 06:24:26 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=5 bl=148 pwr=0
2025-03-30 06:24:26 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=6 bl=148 pwr=0
2025-03-30 06:24:26 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=7 bl=148 pwr=0
2025-03-30 06:24:26 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 06:24:26 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 06:24:26 [DEBUG] fake_trx.py:317 (BTS@172.18.26.20:5700) Recv FAKE_CI cmd
2025-03-30 06:24:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:24:26 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:24:26 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:24:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:24:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:24:26 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:24:26 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:24:26 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:24:26 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:24:27 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-03-30 06:24:27 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:24:27 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:24:27 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:24:27 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:24:27 [DEBUG] clck_gen.py:128 IND CLOCK 306
2025-03-30 06:24:28 [DEBUG] clck_gen.py:128 IND CLOCK 408
2025-03-30 06:24:28 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:24:28 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:24:28 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:24:28 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:24:28 [DEBUG] clck_gen.py:128 IND CLOCK 510
2025-03-30 06:24:29 [DEBUG] clck_gen.py:128 IND CLOCK 612
2025-03-30 06:24:29 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:24:29 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:24:29 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:24:29 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:24:29 [DEBUG] clck_gen.py:128 IND CLOCK 714
2025-03-30 06:24:30 [DEBUG] clck_gen.py:128 IND CLOCK 816
2025-03-30 06:24:30 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:24:30 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:24:30 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:24:30 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:24:30 [DEBUG] clck_gen.py:128 IND CLOCK 918
2025-03-30 06:24:31 [DEBUG] clck_gen.py:128 IND CLOCK 1020
2025-03-30 06:24:31 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:24:31 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:24:31 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:24:31 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:24:31 [DEBUG] clck_gen.py:128 IND CLOCK 1122
2025-03-30 06:24:32 [DEBUG] clck_gen.py:128 IND CLOCK 1224
2025-03-30 06:24:32 [DEBUG] clck_gen.py:128 IND CLOCK 1326
2025-03-30 06:24:32 [DEBUG] clck_gen.py:128 IND CLOCK 1428
2025-03-30 06:24:33 [DEBUG] clck_gen.py:128 IND CLOCK 1530
2025-03-30 06:24:33 [DEBUG] clck_gen.py:128 IND CLOCK 1632
2025-03-30 06:24:34 [DEBUG] clck_gen.py:128 IND CLOCK 1734
2025-03-30 06:24:34 [DEBUG] clck_gen.py:128 IND CLOCK 1836
2025-03-30 06:24:34 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:24:34 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:24:34 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:24:34 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:24:34 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:24:34 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:24:34 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:24:34 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:24:34 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:24:34 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:24:34 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 06:24:34 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 06:24:34 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 06:24:34 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=1863 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:24:34 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=1863 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:24:39 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 06:24:39 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 06:24:39 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:24:39 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:24:39 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:24:39 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:24:39 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:24:39 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 06:24:39 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:24:39 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 06:24:39 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 06:24:39 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 06:24:39 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 06:24:39 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 06:24:39 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:24:39 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:24:39 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 06:24:39 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 06:24:39 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 06:24:39 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 06:24:39 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 06:24:39 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 06:24:39 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:24:39 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:24:39 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 06:24:39 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 06:24:39 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 06:24:39 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 06:24:39 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 06:24:39 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 06:24:39 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:24:39 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:24:39 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 06:24:39 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 06:24:39 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 06:24:40 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 06:24:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 06:24:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 06:24:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 06:24:40 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 06:24:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 06:24:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 06:24:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 06:24:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:24:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 06:24:40 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 06:24:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:24:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:24:40 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 06:24:40 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 06:24:40 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 06:24:40 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 06:24:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:24:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:24:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:24:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 06:24:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:24:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:24:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:24:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:24:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:24:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:24:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:24:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:24:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:24:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:24:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:24:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:24:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:24:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:24:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:24:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:24:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:24:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:24:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:24:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:24:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:24:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:24:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:24:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:24:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:24:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:24:40 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-03-30 06:24:40 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-03-30 06:24:40 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-03-30 06:24:40 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-03-30 06:24:40 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-03-30 06:24:40 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-03-30 06:24:40 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-03-30 06:24:40 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-03-30 06:24:40 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-03-30 06:24:40 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-03-30 06:24:40 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=0 bl=148 pwr=0
2025-03-30 06:24:40 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=1 bl=148 pwr=0
2025-03-30 06:24:40 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=2 bl=148 pwr=0
2025-03-30 06:24:40 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=3 bl=148 pwr=0
2025-03-30 06:24:40 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=4 bl=148 pwr=0
2025-03-30 06:24:40 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=5 bl=148 pwr=0
2025-03-30 06:24:40 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=6 bl=148 pwr=0
2025-03-30 06:24:40 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=7 bl=148 pwr=0
2025-03-30 06:24:40 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 06:24:40 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 06:24:40 [DEBUG] fake_trx.py:317 (BTS@172.18.26.20:5700) Recv FAKE_CI cmd
2025-03-30 06:24:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:24:40 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:24:40 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:24:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:24:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:24:40 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:24:40 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:24:40 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:24:40 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:24:40 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-03-30 06:24:41 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:24:41 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:24:41 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:24:41 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:24:41 [DEBUG] clck_gen.py:128 IND CLOCK 306
2025-03-30 06:24:41 [DEBUG] clck_gen.py:128 IND CLOCK 408
2025-03-30 06:24:42 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:24:42 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:24:42 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:24:42 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:24:42 [DEBUG] clck_gen.py:128 IND CLOCK 510
2025-03-30 06:24:42 [DEBUG] clck_gen.py:128 IND CLOCK 612
2025-03-30 06:24:43 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:24:43 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:24:43 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:24:43 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:24:43 [DEBUG] clck_gen.py:128 IND CLOCK 714
2025-03-30 06:24:43 [DEBUG] clck_gen.py:128 IND CLOCK 816
2025-03-30 06:24:44 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:24:44 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:24:44 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:24:44 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:24:44 [DEBUG] clck_gen.py:128 IND CLOCK 918
2025-03-30 06:24:44 [DEBUG] clck_gen.py:128 IND CLOCK 1020
2025-03-30 06:24:45 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:24:45 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:24:45 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:24:45 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:24:45 [DEBUG] clck_gen.py:128 IND CLOCK 1122
2025-03-30 06:24:45 [DEBUG] clck_gen.py:128 IND CLOCK 1224
2025-03-30 06:24:46 [DEBUG] clck_gen.py:128 IND CLOCK 1326
2025-03-30 06:24:46 [DEBUG] clck_gen.py:128 IND CLOCK 1428
2025-03-30 06:24:47 [DEBUG] clck_gen.py:128 IND CLOCK 1530
2025-03-30 06:24:47 [DEBUG] clck_gen.py:128 IND CLOCK 1632
2025-03-30 06:24:48 [DEBUG] clck_gen.py:128 IND CLOCK 1734
2025-03-30 06:24:48 [DEBUG] clck_gen.py:128 IND CLOCK 1836
2025-03-30 06:24:48 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:24:48 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:24:48 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:24:48 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:24:48 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:24:48 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:24:48 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:24:48 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:24:48 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:24:48 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 06:24:48 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 06:24:48 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 06:24:48 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:24:53 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 06:24:53 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 06:24:53 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:24:53 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:24:53 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:24:53 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:24:53 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:24:53 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 06:24:53 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:24:53 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 06:24:53 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 06:24:53 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 06:24:53 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 06:24:53 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 06:24:53 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:24:53 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:24:53 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 06:24:53 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 06:24:53 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 06:24:53 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 06:24:53 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 06:24:53 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 06:24:53 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:24:53 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:24:53 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 06:24:53 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 06:24:53 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 06:24:53 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 06:24:53 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 06:24:53 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 06:24:53 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:24:53 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:24:53 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 06:24:53 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 06:24:53 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 06:24:53 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 06:24:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 06:24:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 06:24:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 06:24:53 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 06:24:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 06:24:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 06:24:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 06:24:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 06:24:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:24:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:24:53 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 06:24:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:24:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:24:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:24:53 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 06:24:53 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 06:24:53 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 06:24:53 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 06:24:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:24:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:24:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:24:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 06:24:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:24:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:24:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:24:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:24:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:24:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:24:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:24:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:24:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:24:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:24:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:24:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:24:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:24:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:24:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:24:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:24:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:24:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:24:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:24:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:24:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:24:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:24:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:24:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:24:53 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-03-30 06:24:54 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-03-30 06:24:54 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-03-30 06:24:54 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-03-30 06:24:54 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-03-30 06:24:54 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-03-30 06:24:54 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-03-30 06:24:54 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-03-30 06:24:54 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-03-30 06:24:54 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-03-30 06:24:54 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=105 tn=0 bl=148 pwr=0
2025-03-30 06:24:54 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=105 tn=1 bl=148 pwr=0
2025-03-30 06:24:54 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=105 tn=2 bl=148 pwr=0
2025-03-30 06:24:54 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=105 tn=3 bl=148 pwr=0
2025-03-30 06:24:54 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=105 tn=4 bl=148 pwr=0
2025-03-30 06:24:54 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=105 tn=5 bl=148 pwr=0
2025-03-30 06:24:54 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=105 tn=6 bl=148 pwr=0
2025-03-30 06:24:54 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=105 tn=7 bl=148 pwr=0
2025-03-30 06:24:54 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=106 tn=0 bl=148 pwr=0
2025-03-30 06:24:54 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=106 tn=1 bl=148 pwr=0
2025-03-30 06:24:54 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=106 tn=2 bl=148 pwr=0
2025-03-30 06:24:54 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=106 tn=3 bl=148 pwr=0
2025-03-30 06:24:54 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=106 tn=4 bl=148 pwr=0
2025-03-30 06:24:54 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=106 tn=5 bl=148 pwr=0
2025-03-30 06:24:54 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=106 tn=6 bl=148 pwr=0
2025-03-30 06:24:54 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=106 tn=7 bl=148 pwr=0
2025-03-30 06:24:54 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=107 tn=0 bl=148 pwr=0
2025-03-30 06:24:54 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=107 tn=1 bl=148 pwr=0
2025-03-30 06:24:54 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=107 tn=2 bl=148 pwr=0
2025-03-30 06:24:54 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=107 tn=3 bl=148 pwr=0
2025-03-30 06:24:54 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=107 tn=4 bl=148 pwr=0
2025-03-30 06:24:54 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=107 tn=5 bl=148 pwr=0
2025-03-30 06:24:54 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=107 tn=6 bl=148 pwr=0
2025-03-30 06:24:54 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=107 tn=7 bl=148 pwr=0
2025-03-30 06:24:54 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 06:24:54 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 06:24:54 [DEBUG] fake_trx.py:317 (BTS@172.18.26.20:5700) Recv FAKE_CI cmd
2025-03-30 06:24:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:24:54 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:24:54 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:24:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:24:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:24:54 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:24:54 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:24:54 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:24:54 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:24:54 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-03-30 06:24:54 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:24:54 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:24:54 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:24:54 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:24:55 [DEBUG] clck_gen.py:128 IND CLOCK 306
2025-03-30 06:24:55 [DEBUG] clck_gen.py:128 IND CLOCK 408
2025-03-30 06:24:55 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:24:55 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:24:55 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:24:55 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:24:55 [DEBUG] clck_gen.py:128 IND CLOCK 510
2025-03-30 06:24:56 [DEBUG] clck_gen.py:128 IND CLOCK 612
2025-03-30 06:24:56 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:24:56 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:24:56 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:24:56 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:24:56 [DEBUG] clck_gen.py:128 IND CLOCK 714
2025-03-30 06:24:57 [DEBUG] clck_gen.py:128 IND CLOCK 816
2025-03-30 06:24:57 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:24:57 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:24:57 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:24:57 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:24:57 [DEBUG] clck_gen.py:128 IND CLOCK 918
2025-03-30 06:24:58 [DEBUG] clck_gen.py:128 IND CLOCK 1020
2025-03-30 06:24:58 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:24:58 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:24:58 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:24:58 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:24:58 [DEBUG] clck_gen.py:128 IND CLOCK 1122
2025-03-30 06:24:59 [DEBUG] clck_gen.py:128 IND CLOCK 1224
2025-03-30 06:24:59 [DEBUG] clck_gen.py:128 IND CLOCK 1326
2025-03-30 06:25:00 [DEBUG] clck_gen.py:128 IND CLOCK 1428
2025-03-30 06:25:00 [DEBUG] clck_gen.py:128 IND CLOCK 1530
2025-03-30 06:25:01 [DEBUG] clck_gen.py:128 IND CLOCK 1632
2025-03-30 06:25:01 [DEBUG] clck_gen.py:128 IND CLOCK 1734
2025-03-30 06:25:02 [DEBUG] clck_gen.py:128 IND CLOCK 1836
2025-03-30 06:25:02 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:25:02 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:25:02 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:25:02 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:25:02 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:25:02 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:25:02 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:25:02 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:25:02 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:25:02 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:25:02 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 06:25:02 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 06:25:02 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 06:25:07 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 06:25:07 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 06:25:07 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:25:07 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:25:07 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:25:07 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:25:07 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:25:07 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 06:25:07 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:25:07 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 06:25:07 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 06:25:07 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 06:25:07 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 06:25:07 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 06:25:07 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:25:07 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:25:07 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 06:25:07 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 06:25:07 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 06:25:07 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 06:25:07 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 06:25:07 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 06:25:07 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:25:07 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 06:25:07 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:25:07 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 06:25:07 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 06:25:07 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 06:25:07 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 06:25:07 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 06:25:07 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:25:07 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 06:25:07 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:25:07 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 06:25:07 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 06:25:07 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 06:25:07 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 06:25:07 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 06:25:07 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 06:25:07 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 06:25:07 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 06:25:07 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 06:25:07 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 06:25:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 06:25:07 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:25:07 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:25:07 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 06:25:07 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:25:07 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:25:07 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:25:07 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 06:25:07 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 06:25:07 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 06:25:07 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 06:25:07 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:25:07 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:25:07 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:25:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 06:25:07 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:25:07 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:25:07 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:25:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:25:07 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:25:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:25:07 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:25:07 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:25:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:25:07 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:25:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:25:07 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:25:07 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:25:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:25:07 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:25:07 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:25:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:25:07 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:25:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:25:07 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:25:07 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:25:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:25:07 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:25:07 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:25:07 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-03-30 06:25:07 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-03-30 06:25:07 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-03-30 06:25:07 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-03-30 06:25:07 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-03-30 06:25:07 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-03-30 06:25:07 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-03-30 06:25:07 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-03-30 06:25:07 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-03-30 06:25:07 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-03-30 06:25:07 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=0 bl=148 pwr=0
2025-03-30 06:25:07 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=1 bl=148 pwr=0
2025-03-30 06:25:07 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=2 bl=148 pwr=0
2025-03-30 06:25:07 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=3 bl=148 pwr=0
2025-03-30 06:25:07 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=4 bl=148 pwr=0
2025-03-30 06:25:07 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=5 bl=148 pwr=0
2025-03-30 06:25:07 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=6 bl=148 pwr=0
2025-03-30 06:25:07 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=7 bl=148 pwr=0
2025-03-30 06:25:07 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 06:25:07 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 06:25:07 [DEBUG] fake_trx.py:317 (BTS@172.18.26.20:5700) Recv FAKE_CI cmd
2025-03-30 06:25:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:25:07 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:25:07 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:25:07 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:25:07 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:25:07 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:25:07 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:25:07 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:25:07 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:25:08 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-03-30 06:25:08 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:25:08 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:25:08 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:25:08 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:25:08 [DEBUG] clck_gen.py:128 IND CLOCK 306
2025-03-30 06:25:09 [DEBUG] clck_gen.py:128 IND CLOCK 408
2025-03-30 06:25:09 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:25:09 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:25:09 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:25:09 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:25:09 [DEBUG] clck_gen.py:128 IND CLOCK 510
2025-03-30 06:25:10 [DEBUG] clck_gen.py:128 IND CLOCK 612
2025-03-30 06:25:10 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:25:10 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:25:10 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:25:10 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:25:10 [DEBUG] clck_gen.py:128 IND CLOCK 714
2025-03-30 06:25:10 [DEBUG] clck_gen.py:128 IND CLOCK 816
2025-03-30 06:25:11 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:25:11 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:25:11 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:25:11 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:25:11 [DEBUG] clck_gen.py:128 IND CLOCK 918
2025-03-30 06:25:11 [DEBUG] clck_gen.py:128 IND CLOCK 1020
2025-03-30 06:25:12 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:25:12 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:25:12 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:25:12 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:25:12 [DEBUG] clck_gen.py:128 IND CLOCK 1122
2025-03-30 06:25:12 [DEBUG] clck_gen.py:128 IND CLOCK 1224
2025-03-30 06:25:13 [DEBUG] clck_gen.py:128 IND CLOCK 1326
2025-03-30 06:25:13 [DEBUG] clck_gen.py:128 IND CLOCK 1428
2025-03-30 06:25:14 [DEBUG] clck_gen.py:128 IND CLOCK 1530
2025-03-30 06:25:14 [DEBUG] clck_gen.py:128 IND CLOCK 1632
2025-03-30 06:25:15 [DEBUG] clck_gen.py:128 IND CLOCK 1734
2025-03-30 06:25:15 [DEBUG] clck_gen.py:128 IND CLOCK 1836
2025-03-30 06:25:15 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:25:15 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:25:15 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:25:15 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:25:15 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:25:15 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:25:15 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:25:15 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:25:15 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:25:15 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:25:15 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 06:25:15 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 06:25:15 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 06:25:20 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 06:25:20 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 06:25:20 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:25:20 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:25:20 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:25:20 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:25:20 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:25:20 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 06:25:20 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:25:20 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 06:25:20 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 06:25:20 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 06:25:20 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 06:25:20 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 06:25:20 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:25:20 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:25:20 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 06:25:20 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 06:25:20 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 06:25:20 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 06:25:20 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 06:25:20 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 06:25:20 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:25:20 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 06:25:20 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:25:20 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 06:25:20 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 06:25:20 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 06:25:20 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 06:25:20 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 06:25:20 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:25:20 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 06:25:20 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:25:20 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 06:25:20 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 06:25:20 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 06:25:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 06:25:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 06:25:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 06:25:20 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 06:25:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 06:25:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 06:25:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 06:25:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:25:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 06:25:20 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 06:25:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:25:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:25:20 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 06:25:20 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 06:25:20 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 06:25:20 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 06:25:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:25:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:25:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:25:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 06:25:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:25:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:25:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:25:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:25:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:25:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:25:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:25:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:25:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:25:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:25:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:25:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:25:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:25:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:25:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:25:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:25:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:25:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:25:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:25:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:25:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:25:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:25:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:25:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:25:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:25:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:25:20 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-03-30 06:25:21 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-03-30 06:25:21 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-03-30 06:25:21 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-03-30 06:25:21 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-03-30 06:25:21 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-03-30 06:25:21 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-03-30 06:25:21 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-03-30 06:25:21 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-03-30 06:25:21 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-03-30 06:25:21 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=0 bl=148 pwr=0
2025-03-30 06:25:21 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=1 bl=148 pwr=0
2025-03-30 06:25:21 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=2 bl=148 pwr=0
2025-03-30 06:25:21 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=3 bl=148 pwr=0
2025-03-30 06:25:21 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=4 bl=148 pwr=0
2025-03-30 06:25:21 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=5 bl=148 pwr=0
2025-03-30 06:25:21 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=6 bl=148 pwr=0
2025-03-30 06:25:21 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=7 bl=148 pwr=0
2025-03-30 06:25:21 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 06:25:21 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 06:25:21 [DEBUG] fake_trx.py:317 (BTS@172.18.26.20:5700) Recv FAKE_CI cmd
2025-03-30 06:25:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:25:21 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:25:21 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:25:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:25:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:25:21 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:25:21 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:25:21 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:25:21 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:25:21 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-03-30 06:25:21 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:25:21 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:25:21 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:25:21 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:25:22 [DEBUG] clck_gen.py:128 IND CLOCK 306
2025-03-30 06:25:22 [DEBUG] clck_gen.py:128 IND CLOCK 408
2025-03-30 06:25:22 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:25:22 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:25:22 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:25:22 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:25:23 [DEBUG] clck_gen.py:128 IND CLOCK 510
2025-03-30 06:25:23 [DEBUG] clck_gen.py:128 IND CLOCK 612
2025-03-30 06:25:23 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:25:23 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:25:23 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:25:23 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:25:24 [DEBUG] clck_gen.py:128 IND CLOCK 714
2025-03-30 06:25:24 [DEBUG] clck_gen.py:128 IND CLOCK 816
2025-03-30 06:25:24 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:25:24 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:25:24 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:25:24 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:25:25 [DEBUG] clck_gen.py:128 IND CLOCK 918
2025-03-30 06:25:25 [DEBUG] clck_gen.py:128 IND CLOCK 1020
2025-03-30 06:25:25 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:25:25 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:25:25 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:25:25 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:25:26 [DEBUG] clck_gen.py:128 IND CLOCK 1122
2025-03-30 06:25:26 [DEBUG] clck_gen.py:128 IND CLOCK 1224
2025-03-30 06:25:26 [DEBUG] clck_gen.py:128 IND CLOCK 1326
2025-03-30 06:25:27 [DEBUG] clck_gen.py:128 IND CLOCK 1428
2025-03-30 06:25:27 [DEBUG] clck_gen.py:128 IND CLOCK 1530
2025-03-30 06:25:28 [DEBUG] clck_gen.py:128 IND CLOCK 1632
2025-03-30 06:25:28 [DEBUG] clck_gen.py:128 IND CLOCK 1734
2025-03-30 06:25:29 [DEBUG] clck_gen.py:128 IND CLOCK 1836
2025-03-30 06:25:29 [DEBUG] clck_gen.py:128 IND CLOCK 1938
2025-03-30 06:25:30 [DEBUG] clck_gen.py:128 IND CLOCK 2040
2025-03-30 06:25:30 [DEBUG] clck_gen.py:128 IND CLOCK 2142
2025-03-30 06:25:31 [DEBUG] clck_gen.py:128 IND CLOCK 2244
2025-03-30 06:25:31 [DEBUG] clck_gen.py:128 IND CLOCK 2346
2025-03-30 06:25:32 [DEBUG] clck_gen.py:128 IND CLOCK 2448
2025-03-30 06:25:32 [DEBUG] clck_gen.py:128 IND CLOCK 2550
2025-03-30 06:25:33 [DEBUG] clck_gen.py:128 IND CLOCK 2652
2025-03-30 06:25:33 [DEBUG] clck_gen.py:128 IND CLOCK 2754
2025-03-30 06:25:34 [DEBUG] clck_gen.py:128 IND CLOCK 2856
2025-03-30 06:25:34 [DEBUG] clck_gen.py:128 IND CLOCK 2958
2025-03-30 06:25:34 [DEBUG] clck_gen.py:128 IND CLOCK 3060
2025-03-30 06:25:35 [DEBUG] clck_gen.py:128 IND CLOCK 3162
2025-03-30 06:25:35 [DEBUG] clck_gen.py:128 IND CLOCK 3264
2025-03-30 06:25:36 [DEBUG] clck_gen.py:128 IND CLOCK 3366
2025-03-30 06:25:36 [DEBUG] clck_gen.py:128 IND CLOCK 3468
2025-03-30 06:25:37 [DEBUG] clck_gen.py:128 IND CLOCK 3570
2025-03-30 06:25:37 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:25:37 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:25:37 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:25:37 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:25:37 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:25:37 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:25:37 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:25:37 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:25:37 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:25:37 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:25:37 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 06:25:37 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 06:25:37 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 06:25:42 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 06:25:42 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 06:25:42 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:25:42 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:25:42 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:25:42 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:25:42 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:25:42 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 06:25:42 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:25:42 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 06:25:42 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 06:25:42 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 06:25:42 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 06:25:42 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 06:25:42 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:25:42 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:25:42 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 06:25:42 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 06:25:42 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 06:25:42 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 06:25:42 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 06:25:42 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 06:25:42 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:25:42 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:25:42 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 06:25:42 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 06:25:42 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 06:25:42 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 06:25:42 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 06:25:42 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 06:25:42 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:25:42 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:25:42 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 06:25:42 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 06:25:42 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 06:25:42 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 06:25:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 06:25:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 06:25:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 06:25:42 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 06:25:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 06:25:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 06:25:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 06:25:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:25:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 06:25:42 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 06:25:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:25:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:25:42 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 06:25:42 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 06:25:42 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 06:25:42 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 06:25:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:25:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:25:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:25:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 06:25:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:25:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:25:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:25:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:25:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:25:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:25:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:25:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:25:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:25:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:25:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:25:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:25:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:25:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:25:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:25:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:25:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:25:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:25:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:25:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:25:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:25:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:25:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:25:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:25:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:25:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:25:42 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-03-30 06:25:42 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-03-30 06:25:42 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-03-30 06:25:42 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-03-30 06:25:42 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-03-30 06:25:42 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-03-30 06:25:42 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-03-30 06:25:42 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-03-30 06:25:42 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-03-30 06:25:42 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-03-30 06:25:42 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=0 bl=148 pwr=0
2025-03-30 06:25:42 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=1 bl=148 pwr=0
2025-03-30 06:25:42 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=2 bl=148 pwr=0
2025-03-30 06:25:42 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=3 bl=148 pwr=0
2025-03-30 06:25:42 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=4 bl=148 pwr=0
2025-03-30 06:25:42 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=5 bl=148 pwr=0
2025-03-30 06:25:42 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=6 bl=148 pwr=0
2025-03-30 06:25:42 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=7 bl=148 pwr=0
2025-03-30 06:25:42 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 06:25:42 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 06:25:42 [DEBUG] fake_trx.py:317 (BTS@172.18.26.20:5700) Recv FAKE_CI cmd
2025-03-30 06:25:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:25:43 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:25:43 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:25:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:25:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:25:43 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:25:43 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:25:43 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:25:43 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:25:43 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-03-30 06:25:43 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:25:43 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:25:43 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:25:43 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:25:43 [DEBUG] clck_gen.py:128 IND CLOCK 306
2025-03-30 06:25:44 [DEBUG] clck_gen.py:128 IND CLOCK 408
2025-03-30 06:25:44 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:25:44 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:25:44 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:25:44 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:25:44 [DEBUG] clck_gen.py:128 IND CLOCK 510
2025-03-30 06:25:45 [DEBUG] clck_gen.py:128 IND CLOCK 612
2025-03-30 06:25:45 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:25:45 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:25:45 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:25:45 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:25:45 [DEBUG] clck_gen.py:128 IND CLOCK 714
2025-03-30 06:25:46 [DEBUG] clck_gen.py:128 IND CLOCK 816
2025-03-30 06:25:46 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:25:46 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:25:46 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:25:46 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:25:46 [DEBUG] clck_gen.py:128 IND CLOCK 918
2025-03-30 06:25:47 [DEBUG] clck_gen.py:128 IND CLOCK 1020
2025-03-30 06:25:47 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:25:47 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:25:47 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:25:47 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:25:47 [DEBUG] clck_gen.py:128 IND CLOCK 1122
2025-03-30 06:25:48 [DEBUG] clck_gen.py:128 IND CLOCK 1224
2025-03-30 06:25:48 [DEBUG] clck_gen.py:128 IND CLOCK 1326
2025-03-30 06:25:49 [DEBUG] clck_gen.py:128 IND CLOCK 1428
2025-03-30 06:25:49 [DEBUG] clck_gen.py:128 IND CLOCK 1530
2025-03-30 06:25:49 [DEBUG] clck_gen.py:128 IND CLOCK 1632
2025-03-30 06:25:50 [DEBUG] clck_gen.py:128 IND CLOCK 1734
2025-03-30 06:25:50 [DEBUG] clck_gen.py:128 IND CLOCK 1836
2025-03-30 06:25:51 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:25:51 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:25:51 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:25:51 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:25:51 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:25:51 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:25:51 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:25:51 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:25:51 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:25:51 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:25:51 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 06:25:51 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 06:25:51 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 06:25:51 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=1863 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:25:51 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=1863 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:25:51 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=1863 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:25:51 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=1863 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:25:51 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=1863 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:25:51 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=1863 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:25:51 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=1864 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:25:51 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=1864 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:25:51 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=1864 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:25:51 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=1864 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:25:51 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=1864 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:25:51 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=1864 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:25:51 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=1864 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:25:51 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=1864 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:25:56 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 06:25:56 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 06:25:56 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:25:56 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:25:56 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:25:56 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:25:56 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:25:56 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 06:25:56 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:25:56 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 06:25:56 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 06:25:56 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 06:25:56 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 06:25:56 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 06:25:56 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:25:56 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:25:56 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 06:25:56 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 06:25:56 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 06:25:56 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 06:25:56 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 06:25:56 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 06:25:56 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:25:56 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 06:25:56 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:25:56 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 06:25:56 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 06:25:56 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 06:25:56 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 06:25:56 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 06:25:56 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:25:56 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:25:56 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 06:25:56 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 06:25:56 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 06:25:56 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 06:25:56 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 06:25:56 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 06:25:56 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 06:25:56 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 06:25:56 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 06:25:56 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 06:25:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 06:25:56 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:25:56 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 06:25:56 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 06:25:56 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:25:56 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:25:56 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 06:25:56 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 06:25:56 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 06:25:56 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 06:25:56 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:25:56 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:25:56 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:25:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 06:25:56 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:25:56 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:25:56 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:25:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:25:56 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:25:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:25:56 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:25:56 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:25:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:25:56 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:25:56 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:25:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:25:56 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:25:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:25:56 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:25:56 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:25:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:25:56 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:25:56 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:25:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:25:56 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:25:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:25:56 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:25:56 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:25:56 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:25:56 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:25:56 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-03-30 06:25:56 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-03-30 06:25:56 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-03-30 06:25:56 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-03-30 06:25:56 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-03-30 06:25:56 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-03-30 06:25:56 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-03-30 06:25:56 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-03-30 06:25:56 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-03-30 06:25:56 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-03-30 06:25:56 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=0 bl=148 pwr=0
2025-03-30 06:25:56 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=1 bl=148 pwr=0
2025-03-30 06:25:56 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=2 bl=148 pwr=0
2025-03-30 06:25:56 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=3 bl=148 pwr=0
2025-03-30 06:25:56 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=4 bl=148 pwr=0
2025-03-30 06:25:56 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=5 bl=148 pwr=0
2025-03-30 06:25:56 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=6 bl=148 pwr=0
2025-03-30 06:25:56 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=7 bl=148 pwr=0
2025-03-30 06:25:56 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 06:25:56 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 06:25:56 [DEBUG] fake_trx.py:317 (BTS@172.18.26.20:5700) Recv FAKE_CI cmd
2025-03-30 06:25:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:25:56 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:25:56 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:25:56 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:25:56 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:25:56 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:25:56 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:25:56 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:25:56 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:25:57 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-03-30 06:25:57 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:25:57 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:25:57 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:25:57 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:25:57 [DEBUG] clck_gen.py:128 IND CLOCK 306
2025-03-30 06:25:57 [DEBUG] clck_gen.py:128 IND CLOCK 408
2025-03-30 06:25:57 [WARNING] clck_gen.py:108 CLCKGen: time overrun by -767us; resetting the clock
2025-03-30 06:25:58 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:25:58 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:25:58 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:25:58 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:25:58 [DEBUG] clck_gen.py:128 IND CLOCK 510
2025-03-30 06:25:58 [DEBUG] clck_gen.py:128 IND CLOCK 612
2025-03-30 06:25:59 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:25:59 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:25:59 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:25:59 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:25:59 [DEBUG] clck_gen.py:128 IND CLOCK 714
2025-03-30 06:25:59 [DEBUG] clck_gen.py:128 IND CLOCK 816
2025-03-30 06:26:00 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:26:00 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:26:00 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:26:00 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:26:00 [DEBUG] clck_gen.py:128 IND CLOCK 918
2025-03-30 06:26:00 [DEBUG] clck_gen.py:128 IND CLOCK 1020
2025-03-30 06:26:01 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:26:01 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:26:01 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:26:01 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:26:01 [DEBUG] clck_gen.py:128 IND CLOCK 1122
2025-03-30 06:26:01 [DEBUG] clck_gen.py:128 IND CLOCK 1224
2025-03-30 06:26:02 [DEBUG] clck_gen.py:128 IND CLOCK 1326
2025-03-30 06:26:02 [DEBUG] clck_gen.py:128 IND CLOCK 1428
2025-03-30 06:26:03 [DEBUG] clck_gen.py:128 IND CLOCK 1530
2025-03-30 06:26:03 [DEBUG] clck_gen.py:128 IND CLOCK 1632
2025-03-30 06:26:04 [DEBUG] clck_gen.py:128 IND CLOCK 1734
2025-03-30 06:26:04 [DEBUG] clck_gen.py:128 IND CLOCK 1836
2025-03-30 06:26:05 [DEBUG] clck_gen.py:128 IND CLOCK 1938
2025-03-30 06:26:05 [DEBUG] clck_gen.py:128 IND CLOCK 2040
2025-03-30 06:26:05 [DEBUG] clck_gen.py:128 IND CLOCK 2142
2025-03-30 06:26:06 [DEBUG] clck_gen.py:128 IND CLOCK 2244
2025-03-30 06:26:06 [DEBUG] clck_gen.py:128 IND CLOCK 2346
2025-03-30 06:26:07 [DEBUG] clck_gen.py:128 IND CLOCK 2448
2025-03-30 06:26:07 [DEBUG] clck_gen.py:128 IND CLOCK 2550
2025-03-30 06:26:08 [DEBUG] clck_gen.py:128 IND CLOCK 2652
2025-03-30 06:26:08 [DEBUG] clck_gen.py:128 IND CLOCK 2754
2025-03-30 06:26:09 [DEBUG] clck_gen.py:128 IND CLOCK 2856
2025-03-30 06:26:09 [DEBUG] clck_gen.py:128 IND CLOCK 2958
2025-03-30 06:26:10 [DEBUG] clck_gen.py:128 IND CLOCK 3060
2025-03-30 06:26:10 [DEBUG] clck_gen.py:128 IND CLOCK 3162
2025-03-30 06:26:11 [DEBUG] clck_gen.py:128 IND CLOCK 3264
2025-03-30 06:26:11 [DEBUG] clck_gen.py:128 IND CLOCK 3366
2025-03-30 06:26:12 [DEBUG] clck_gen.py:128 IND CLOCK 3468
2025-03-30 06:26:12 [DEBUG] clck_gen.py:128 IND CLOCK 3570
2025-03-30 06:26:12 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:26:12 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:26:12 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:26:12 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:26:12 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:26:12 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:26:12 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:26:12 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:26:12 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 06:26:12 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 06:26:12 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 06:26:12 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:26:12 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:26:17 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 06:26:17 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 06:26:17 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:26:17 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:26:17 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:26:17 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:26:17 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:26:17 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 06:26:17 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:26:17 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 06:26:17 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 06:26:17 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 06:26:17 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 06:26:17 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 06:26:17 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:26:17 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:26:17 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 06:26:17 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 06:26:17 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 06:26:17 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 06:26:17 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 06:26:17 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 06:26:17 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:26:17 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:26:17 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 06:26:17 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 06:26:17 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 06:26:17 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 06:26:17 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 06:26:17 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 06:26:17 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:26:17 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:26:17 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 06:26:17 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 06:26:17 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 06:26:17 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 06:26:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 06:26:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 06:26:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 06:26:17 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 06:26:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 06:26:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 06:26:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 06:26:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:26:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 06:26:17 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 06:26:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:26:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:26:17 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 06:26:17 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 06:26:17 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 06:26:17 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 06:26:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:26:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:26:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:26:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 06:26:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:26:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:26:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:26:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:26:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:26:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:26:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:26:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:26:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:26:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:26:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:26:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:26:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:26:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:26:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:26:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:26:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:26:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:26:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:26:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:26:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:26:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:26:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:26:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:26:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:26:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:26:17 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-03-30 06:26:18 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-03-30 06:26:18 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=110): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-03-30 06:26:18 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=110): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-03-30 06:26:18 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=110): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-03-30 06:26:18 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=110): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-03-30 06:26:18 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=110): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-03-30 06:26:18 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=110): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-03-30 06:26:18 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=110): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-03-30 06:26:18 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=110): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-03-30 06:26:18 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=110): ver=1 fn=105 tn=0 bl=148 pwr=0
2025-03-30 06:26:18 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=110): ver=1 fn=105 tn=1 bl=148 pwr=0
2025-03-30 06:26:18 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=110): ver=1 fn=105 tn=2 bl=148 pwr=0
2025-03-30 06:26:18 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=110): ver=1 fn=105 tn=3 bl=148 pwr=0
2025-03-30 06:26:18 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=110): ver=1 fn=105 tn=4 bl=148 pwr=0
2025-03-30 06:26:18 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=110): ver=1 fn=105 tn=5 bl=148 pwr=0
2025-03-30 06:26:18 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=110): ver=1 fn=105 tn=6 bl=148 pwr=0
2025-03-30 06:26:18 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=110): ver=1 fn=105 tn=7 bl=148 pwr=0
2025-03-30 06:26:18 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=110): ver=1 fn=106 tn=0 bl=148 pwr=0
2025-03-30 06:26:18 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=110): ver=1 fn=106 tn=1 bl=148 pwr=0
2025-03-30 06:26:18 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=110): ver=1 fn=106 tn=2 bl=148 pwr=0
2025-03-30 06:26:18 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=110): ver=1 fn=106 tn=3 bl=148 pwr=0
2025-03-30 06:26:18 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=110): ver=1 fn=106 tn=4 bl=148 pwr=0
2025-03-30 06:26:18 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=110): ver=1 fn=106 tn=5 bl=148 pwr=0
2025-03-30 06:26:18 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=110): ver=1 fn=106 tn=6 bl=148 pwr=0
2025-03-30 06:26:18 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=110): ver=1 fn=106 tn=7 bl=148 pwr=0
2025-03-30 06:26:18 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=110): ver=1 fn=107 tn=0 bl=148 pwr=0
2025-03-30 06:26:18 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=110): ver=1 fn=107 tn=1 bl=148 pwr=0
2025-03-30 06:26:18 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=110): ver=1 fn=107 tn=2 bl=148 pwr=0
2025-03-30 06:26:18 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=110): ver=1 fn=107 tn=3 bl=148 pwr=0
2025-03-30 06:26:18 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=110): ver=1 fn=107 tn=4 bl=148 pwr=0
2025-03-30 06:26:18 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=110): ver=1 fn=107 tn=5 bl=148 pwr=0
2025-03-30 06:26:18 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=110): ver=1 fn=107 tn=6 bl=148 pwr=0
2025-03-30 06:26:18 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=110): ver=1 fn=107 tn=7 bl=148 pwr=0
2025-03-30 06:26:18 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=111): ver=1 fn=108 tn=0 bl=148 pwr=0
2025-03-30 06:26:18 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=111): ver=1 fn=108 tn=1 bl=148 pwr=0
2025-03-30 06:26:18 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=111): ver=1 fn=108 tn=2 bl=148 pwr=0
2025-03-30 06:26:18 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=111): ver=1 fn=108 tn=3 bl=148 pwr=0
2025-03-30 06:26:18 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=111): ver=1 fn=108 tn=4 bl=148 pwr=0
2025-03-30 06:26:18 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=111): ver=1 fn=108 tn=5 bl=148 pwr=0
2025-03-30 06:26:18 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=111): ver=1 fn=108 tn=6 bl=148 pwr=0
2025-03-30 06:26:18 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=111): ver=1 fn=108 tn=7 bl=148 pwr=0
2025-03-30 06:26:18 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 06:26:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:26:18 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 06:26:18 [DEBUG] fake_trx.py:317 (BTS@172.18.26.20:5700) Recv FAKE_CI cmd
2025-03-30 06:26:18 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=112): ver=1 fn=109 tn=0 bl=148 pwr=0
2025-03-30 06:26:18 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=112): ver=1 fn=109 tn=1 bl=148 pwr=0
2025-03-30 06:26:18 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=112): ver=1 fn=109 tn=2 bl=148 pwr=0
2025-03-30 06:26:18 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=112): ver=1 fn=109 tn=3 bl=148 pwr=0
2025-03-30 06:26:18 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=112): ver=1 fn=109 tn=4 bl=148 pwr=0
2025-03-30 06:26:18 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=112): ver=1 fn=109 tn=5 bl=148 pwr=0
2025-03-30 06:26:18 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=112): ver=1 fn=109 tn=6 bl=148 pwr=0
2025-03-30 06:26:18 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=112): ver=1 fn=109 tn=7 bl=148 pwr=0
2025-03-30 06:26:18 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=113): ver=1 fn=110 tn=0 bl=148 pwr=0
2025-03-30 06:26:18 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=113): ver=1 fn=110 tn=1 bl=148 pwr=0
2025-03-30 06:26:18 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=113): ver=1 fn=110 tn=2 bl=148 pwr=0
2025-03-30 06:26:18 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=113): ver=1 fn=110 tn=3 bl=148 pwr=0
2025-03-30 06:26:18 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=113): ver=1 fn=110 tn=4 bl=148 pwr=0
2025-03-30 06:26:18 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=113): ver=1 fn=110 tn=5 bl=148 pwr=0
2025-03-30 06:26:18 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=113): ver=1 fn=110 tn=6 bl=148 pwr=0
2025-03-30 06:26:18 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=113): ver=1 fn=110 tn=7 bl=148 pwr=0
2025-03-30 06:26:18 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=114): ver=1 fn=111 tn=0 bl=148 pwr=0
2025-03-30 06:26:18 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=114): ver=1 fn=111 tn=1 bl=148 pwr=0
2025-03-30 06:26:18 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=114): ver=1 fn=111 tn=2 bl=148 pwr=0
2025-03-30 06:26:18 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=114): ver=1 fn=111 tn=3 bl=148 pwr=0
2025-03-30 06:26:18 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=114): ver=1 fn=111 tn=4 bl=148 pwr=0
2025-03-30 06:26:18 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=114): ver=1 fn=111 tn=5 bl=148 pwr=0
2025-03-30 06:26:18 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=114): ver=1 fn=111 tn=6 bl=148 pwr=0
2025-03-30 06:26:18 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=114): ver=1 fn=111 tn=7 bl=148 pwr=0
2025-03-30 06:26:18 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:26:18 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:26:18 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:26:18 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=115): ver=1 fn=112 tn=0 bl=148 pwr=0
2025-03-30 06:26:18 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=115): ver=1 fn=112 tn=1 bl=148 pwr=0
2025-03-30 06:26:18 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=115): ver=1 fn=112 tn=2 bl=148 pwr=0
2025-03-30 06:26:18 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=115): ver=1 fn=112 tn=3 bl=148 pwr=0
2025-03-30 06:26:18 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=115): ver=1 fn=112 tn=4 bl=148 pwr=0
2025-03-30 06:26:18 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=115): ver=1 fn=112 tn=5 bl=148 pwr=0
2025-03-30 06:26:18 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=115): ver=1 fn=112 tn=6 bl=148 pwr=0
2025-03-30 06:26:18 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=115): ver=1 fn=112 tn=7 bl=148 pwr=0
2025-03-30 06:26:18 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=116): ver=1 fn=113 tn=0 bl=148 pwr=0
2025-03-30 06:26:18 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=116): ver=1 fn=113 tn=1 bl=148 pwr=0
2025-03-30 06:26:18 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=116): ver=1 fn=113 tn=2 bl=148 pwr=0
2025-03-30 06:26:18 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=116): ver=1 fn=113 tn=3 bl=148 pwr=0
2025-03-30 06:26:18 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=116): ver=1 fn=113 tn=4 bl=148 pwr=0
2025-03-30 06:26:18 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=116): ver=1 fn=113 tn=5 bl=148 pwr=0
2025-03-30 06:26:18 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=116): ver=1 fn=113 tn=6 bl=148 pwr=0
2025-03-30 06:26:18 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=116): ver=1 fn=113 tn=7 bl=148 pwr=0
2025-03-30 06:26:18 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=117): ver=1 fn=114 tn=0 bl=148 pwr=0
2025-03-30 06:26:18 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=117): ver=1 fn=114 tn=1 bl=148 pwr=0
2025-03-30 06:26:18 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=117): ver=1 fn=114 tn=2 bl=148 pwr=0
2025-03-30 06:26:18 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=117): ver=1 fn=114 tn=3 bl=148 pwr=0
2025-03-30 06:26:18 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=117): ver=1 fn=114 tn=4 bl=148 pwr=0
2025-03-30 06:26:18 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=117): ver=1 fn=114 tn=5 bl=148 pwr=0
2025-03-30 06:26:18 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=117): ver=1 fn=114 tn=6 bl=148 pwr=0
2025-03-30 06:26:18 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=117): ver=1 fn=114 tn=7 bl=148 pwr=0
2025-03-30 06:26:18 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=118): ver=1 fn=115 tn=0 bl=148 pwr=0
2025-03-30 06:26:18 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=118): ver=1 fn=115 tn=1 bl=148 pwr=0
2025-03-30 06:26:18 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=118): ver=1 fn=115 tn=2 bl=148 pwr=0
2025-03-30 06:26:18 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=118): ver=1 fn=115 tn=3 bl=148 pwr=0
2025-03-30 06:26:18 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=118): ver=1 fn=115 tn=4 bl=148 pwr=0
2025-03-30 06:26:18 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=118): ver=1 fn=115 tn=5 bl=148 pwr=0
2025-03-30 06:26:18 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=118): ver=1 fn=115 tn=6 bl=148 pwr=0
2025-03-30 06:26:18 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=118): ver=1 fn=115 tn=7 bl=148 pwr=0
2025-03-30 06:26:18 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=119): ver=1 fn=116 tn=0 bl=148 pwr=0
2025-03-30 06:26:18 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=119): ver=1 fn=116 tn=1 bl=148 pwr=0
2025-03-30 06:26:18 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=119): ver=1 fn=116 tn=2 bl=148 pwr=0
2025-03-30 06:26:18 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=119): ver=1 fn=116 tn=3 bl=148 pwr=0
2025-03-30 06:26:18 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=119): ver=1 fn=116 tn=4 bl=148 pwr=0
2025-03-30 06:26:18 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=119): ver=1 fn=116 tn=5 bl=148 pwr=0
2025-03-30 06:26:18 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=119): ver=1 fn=116 tn=6 bl=148 pwr=0
2025-03-30 06:26:18 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=119): ver=1 fn=116 tn=7 bl=148 pwr=0
2025-03-30 06:26:18 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=120): ver=1 fn=117 tn=0 bl=148 pwr=0
2025-03-30 06:26:18 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=120): ver=1 fn=117 tn=1 bl=148 pwr=0
2025-03-30 06:26:18 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=120): ver=1 fn=117 tn=2 bl=148 pwr=0
2025-03-30 06:26:18 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=120): ver=1 fn=117 tn=3 bl=148 pwr=0
2025-03-30 06:26:18 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=120): ver=1 fn=117 tn=4 bl=148 pwr=0
2025-03-30 06:26:18 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=120): ver=1 fn=117 tn=5 bl=148 pwr=0
2025-03-30 06:26:18 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=120): ver=1 fn=117 tn=6 bl=148 pwr=0
2025-03-30 06:26:18 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=120): ver=1 fn=117 tn=7 bl=148 pwr=0
2025-03-30 06:26:18 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=121): ver=1 fn=118 tn=0 bl=148 pwr=0
2025-03-30 06:26:18 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=121): ver=1 fn=118 tn=1 bl=148 pwr=0
2025-03-30 06:26:18 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=121): ver=1 fn=118 tn=2 bl=148 pwr=0
2025-03-30 06:26:18 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=121): ver=1 fn=118 tn=3 bl=148 pwr=0
2025-03-30 06:26:18 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=121): ver=1 fn=118 tn=4 bl=148 pwr=0
2025-03-30 06:26:18 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=121): ver=1 fn=118 tn=5 bl=148 pwr=0
2025-03-30 06:26:18 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=121): ver=1 fn=118 tn=6 bl=148 pwr=0
2025-03-30 06:26:18 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=121): ver=1 fn=118 tn=7 bl=148 pwr=0
2025-03-30 06:26:18 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=122): ver=1 fn=119 tn=0 bl=148 pwr=0
2025-03-30 06:26:18 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=122): ver=1 fn=119 tn=1 bl=148 pwr=0
2025-03-30 06:26:18 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=122): ver=1 fn=119 tn=2 bl=148 pwr=0
2025-03-30 06:26:18 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=122): ver=1 fn=119 tn=3 bl=148 pwr=0
2025-03-30 06:26:18 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=122): ver=1 fn=119 tn=4 bl=148 pwr=0
2025-03-30 06:26:18 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=122): ver=1 fn=119 tn=5 bl=148 pwr=0
2025-03-30 06:26:18 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=122): ver=1 fn=119 tn=6 bl=148 pwr=0
2025-03-30 06:26:18 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=122): ver=1 fn=119 tn=7 bl=148 pwr=0
2025-03-30 06:26:18 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=123): ver=1 fn=120 tn=0 bl=148 pwr=0
2025-03-30 06:26:18 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=123): ver=1 fn=120 tn=1 bl=148 pwr=0
2025-03-30 06:26:18 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=123): ver=1 fn=120 tn=2 bl=148 pwr=0
2025-03-30 06:26:18 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=123): ver=1 fn=120 tn=3 bl=148 pwr=0
2025-03-30 06:26:18 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=123): ver=1 fn=120 tn=4 bl=148 pwr=0
2025-03-30 06:26:18 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=123): ver=1 fn=120 tn=5 bl=148 pwr=0
2025-03-30 06:26:18 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=123): ver=1 fn=120 tn=6 bl=148 pwr=0
2025-03-30 06:26:18 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=123): ver=1 fn=120 tn=7 bl=148 pwr=0
2025-03-30 06:26:18 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:26:18 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:26:18 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:26:18 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:26:18 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:26:18 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:26:18 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:26:18 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:26:18 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 06:26:18 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 06:26:18 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 06:26:23 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 06:26:23 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 06:26:23 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:26:23 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:26:23 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:26:23 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:26:23 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:26:23 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 06:26:23 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:26:23 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 06:26:23 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 06:26:23 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 06:26:23 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 06:26:23 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 06:26:23 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:26:23 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:26:23 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 06:26:23 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 06:26:23 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 06:26:23 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 06:26:23 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 06:26:23 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 06:26:23 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:26:23 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:26:23 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 06:26:23 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 06:26:23 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 06:26:23 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 06:26:23 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 06:26:23 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 06:26:23 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:26:23 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:26:23 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 06:26:23 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 06:26:23 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 06:26:23 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 06:26:23 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 06:26:23 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 06:26:23 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 06:26:23 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 06:26:23 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 06:26:23 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 06:26:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 06:26:23 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:26:23 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 06:26:23 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 06:26:23 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:26:23 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:26:23 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 06:26:23 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 06:26:23 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 06:26:23 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 06:26:23 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:26:23 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:26:23 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:26:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 06:26:23 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:26:23 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:26:23 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:26:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:26:23 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:26:23 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:26:23 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:26:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:26:23 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:26:23 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:26:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:26:23 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:26:23 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:26:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:26:23 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:26:23 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:26:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:26:23 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:26:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:26:23 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:26:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:26:23 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:26:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:26:23 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:26:23 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:26:23 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:26:23 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-03-30 06:26:23 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-03-30 06:26:23 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-03-30 06:26:23 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-03-30 06:26:23 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-03-30 06:26:23 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-03-30 06:26:23 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-03-30 06:26:23 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-03-30 06:26:23 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-03-30 06:26:23 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-03-30 06:26:23 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=0 bl=148 pwr=0
2025-03-30 06:26:23 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=1 bl=148 pwr=0
2025-03-30 06:26:23 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=2 bl=148 pwr=0
2025-03-30 06:26:23 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=3 bl=148 pwr=0
2025-03-30 06:26:23 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=4 bl=148 pwr=0
2025-03-30 06:26:23 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=5 bl=148 pwr=0
2025-03-30 06:26:23 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=6 bl=148 pwr=0
2025-03-30 06:26:23 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=7 bl=148 pwr=0
2025-03-30 06:26:23 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 06:26:23 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 06:26:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:26:23 [DEBUG] fake_trx.py:317 (BTS@172.18.26.20:5700) Recv FAKE_CI cmd
2025-03-30 06:26:23 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:26:23 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:26:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:26:23 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:26:23 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:26:23 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:26:23 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:26:23 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:26:23 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:26:23 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:26:23 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:26:23 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 06:26:23 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 06:26:23 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 06:26:23 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=131 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:26:23 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=131 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:26:23 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=131 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:26:23 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=131 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:26:23 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=131 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:26:23 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=131 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:26:28 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 06:26:28 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 06:26:28 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:26:28 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:26:28 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:26:28 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:26:28 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:26:28 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 06:26:28 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:26:28 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 06:26:28 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 06:26:28 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 06:26:28 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 06:26:28 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 06:26:28 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:26:28 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:26:28 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 06:26:28 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 06:26:28 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 06:26:28 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 06:26:28 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 06:26:28 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 06:26:28 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:26:28 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:26:28 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 06:26:28 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 06:26:28 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 06:26:28 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 06:26:28 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 06:26:28 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 06:26:28 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:26:28 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:26:28 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 06:26:28 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 06:26:28 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 06:26:28 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 06:26:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 06:26:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 06:26:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 06:26:28 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 06:26:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 06:26:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 06:26:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 06:26:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:26:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 06:26:28 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 06:26:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:26:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:26:28 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 06:26:28 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 06:26:28 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 06:26:28 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 06:26:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:26:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:26:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:26:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 06:26:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:26:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:26:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:26:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:26:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:26:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:26:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:26:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:26:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:26:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:26:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:26:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:26:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:26:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:26:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:26:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:26:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:26:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:26:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:26:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:26:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:26:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:26:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:26:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:26:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:26:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:26:28 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-03-30 06:26:29 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-03-30 06:26:29 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-03-30 06:26:29 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-03-30 06:26:29 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-03-30 06:26:29 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-03-30 06:26:29 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-03-30 06:26:29 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-03-30 06:26:29 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-03-30 06:26:29 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-03-30 06:26:29 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=0 bl=148 pwr=0
2025-03-30 06:26:29 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=1 bl=148 pwr=0
2025-03-30 06:26:29 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=2 bl=148 pwr=0
2025-03-30 06:26:29 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=3 bl=148 pwr=0
2025-03-30 06:26:29 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=4 bl=148 pwr=0
2025-03-30 06:26:29 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=5 bl=148 pwr=0
2025-03-30 06:26:29 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=6 bl=148 pwr=0
2025-03-30 06:26:29 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=7 bl=148 pwr=0
2025-03-30 06:26:29 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 06:26:29 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 06:26:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:26:29 [DEBUG] fake_trx.py:317 (BTS@172.18.26.20:5700) Recv FAKE_CI cmd
2025-03-30 06:26:29 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:26:29 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:26:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:26:29 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:26:29 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:26:29 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:26:29 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:26:29 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:26:29 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:26:29 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:26:29 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 06:26:29 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 06:26:29 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 06:26:29 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=130 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:26:29 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:26:29 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=130 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:26:29 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=130 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:26:29 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=130 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:26:29 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=130 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:26:29 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=130 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:26:34 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 06:26:34 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 06:26:34 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:26:34 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:26:34 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:26:34 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:26:34 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:26:34 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 06:26:34 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:26:34 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 06:26:34 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 06:26:34 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 06:26:34 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 06:26:34 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 06:26:34 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:26:34 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:26:34 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 06:26:34 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 06:26:34 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 06:26:34 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 06:26:34 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 06:26:34 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 06:26:34 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:26:34 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:26:34 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 06:26:34 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 06:26:34 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 06:26:34 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 06:26:34 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 06:26:34 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 06:26:34 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:26:34 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:26:34 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 06:26:34 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 06:26:34 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 06:26:34 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 06:26:34 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 06:26:34 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 06:26:34 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 06:26:34 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 06:26:34 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 06:26:34 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 06:26:34 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 06:26:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 06:26:34 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:26:34 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:26:34 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:26:34 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 06:26:34 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:26:34 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:26:34 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:26:34 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 06:26:34 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 06:26:34 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 06:26:34 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 06:26:34 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:26:34 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:26:34 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:26:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 06:26:34 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:26:34 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:26:34 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:26:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:26:34 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:26:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:26:34 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:26:34 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:26:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:26:34 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:26:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:26:34 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:26:34 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:26:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:26:34 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:26:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:26:34 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:26:34 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:26:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:26:34 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:26:34 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:26:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:26:34 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:26:34 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-03-30 06:26:35 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-03-30 06:26:35 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-03-30 06:26:35 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-03-30 06:26:35 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-03-30 06:26:35 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-03-30 06:26:35 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-03-30 06:26:35 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-03-30 06:26:35 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-03-30 06:26:35 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-03-30 06:26:35 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=0 bl=148 pwr=0
2025-03-30 06:26:35 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=1 bl=148 pwr=0
2025-03-30 06:26:35 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=2 bl=148 pwr=0
2025-03-30 06:26:35 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=3 bl=148 pwr=0
2025-03-30 06:26:35 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=4 bl=148 pwr=0
2025-03-30 06:26:35 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=5 bl=148 pwr=0
2025-03-30 06:26:35 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=6 bl=148 pwr=0
2025-03-30 06:26:35 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=7 bl=148 pwr=0
2025-03-30 06:26:35 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 06:26:35 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 06:26:35 [DEBUG] fake_trx.py:317 (BTS@172.18.26.20:5700) Recv FAKE_CI cmd
2025-03-30 06:26:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:26:35 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:26:35 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:26:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:26:35 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:26:35 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:26:35 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:26:35 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:26:35 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:26:35 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:26:35 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:26:35 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:26:35 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 06:26:35 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 06:26:35 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 06:26:40 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 06:26:40 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 06:26:40 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:26:40 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:26:40 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:26:40 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:26:40 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:26:40 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 06:26:40 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:26:40 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 06:26:40 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 06:26:40 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 06:26:40 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 06:26:40 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 06:26:40 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:26:40 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:26:40 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 06:26:40 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 06:26:40 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 06:26:40 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 06:26:40 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 06:26:40 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 06:26:40 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:26:40 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:26:40 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 06:26:40 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 06:26:40 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 06:26:40 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 06:26:40 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 06:26:40 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 06:26:40 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:26:40 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:26:40 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 06:26:40 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 06:26:40 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 06:26:40 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 06:26:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 06:26:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 06:26:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 06:26:40 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 06:26:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 06:26:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 06:26:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 06:26:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:26:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 06:26:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:26:40 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 06:26:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:26:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:26:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:26:40 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 06:26:40 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 06:26:40 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 06:26:40 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 06:26:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:26:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:26:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:26:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 06:26:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:26:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:26:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:26:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:26:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:26:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:26:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:26:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:26:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:26:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:26:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:26:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:26:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:26:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:26:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:26:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:26:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:26:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:26:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:26:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:26:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:26:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:26:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:26:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:26:40 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-03-30 06:26:40 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-03-30 06:26:40 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-03-30 06:26:40 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-03-30 06:26:40 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-03-30 06:26:40 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-03-30 06:26:40 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-03-30 06:26:40 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-03-30 06:26:40 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-03-30 06:26:40 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-03-30 06:26:40 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=105 tn=0 bl=148 pwr=0
2025-03-30 06:26:40 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=105 tn=1 bl=148 pwr=0
2025-03-30 06:26:40 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=105 tn=2 bl=148 pwr=0
2025-03-30 06:26:40 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=105 tn=3 bl=148 pwr=0
2025-03-30 06:26:40 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=105 tn=4 bl=148 pwr=0
2025-03-30 06:26:40 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=105 tn=5 bl=148 pwr=0
2025-03-30 06:26:40 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=105 tn=6 bl=148 pwr=0
2025-03-30 06:26:40 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=105 tn=7 bl=148 pwr=0
2025-03-30 06:26:40 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=106 tn=0 bl=148 pwr=0
2025-03-30 06:26:40 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=106 tn=1 bl=148 pwr=0
2025-03-30 06:26:40 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=106 tn=2 bl=148 pwr=0
2025-03-30 06:26:40 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=106 tn=3 bl=148 pwr=0
2025-03-30 06:26:40 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=106 tn=4 bl=148 pwr=0
2025-03-30 06:26:40 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=106 tn=5 bl=148 pwr=0
2025-03-30 06:26:40 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=106 tn=6 bl=148 pwr=0
2025-03-30 06:26:40 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=106 tn=7 bl=148 pwr=0
2025-03-30 06:26:40 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=107 tn=0 bl=148 pwr=0
2025-03-30 06:26:40 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=107 tn=1 bl=148 pwr=0
2025-03-30 06:26:40 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=107 tn=2 bl=148 pwr=0
2025-03-30 06:26:40 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=107 tn=3 bl=148 pwr=0
2025-03-30 06:26:40 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=107 tn=4 bl=148 pwr=0
2025-03-30 06:26:40 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=107 tn=5 bl=148 pwr=0
2025-03-30 06:26:40 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=107 tn=6 bl=148 pwr=0
2025-03-30 06:26:40 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=107 tn=7 bl=148 pwr=0
2025-03-30 06:26:40 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 06:26:40 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 06:26:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:26:40 [DEBUG] fake_trx.py:317 (BTS@172.18.26.20:5700) Recv FAKE_CI cmd
2025-03-30 06:26:40 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:26:40 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:26:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:26:40 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:26:40 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:26:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:26:40 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:26:40 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:26:40 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:26:40 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:26:40 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:26:40 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:26:40 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:26:40 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:26:40 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 06:26:40 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 06:26:40 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 06:26:45 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 06:26:45 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 06:26:45 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:26:45 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:26:45 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:26:45 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:26:45 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:26:45 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 06:26:45 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:26:45 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 06:26:45 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 06:26:45 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 06:26:45 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 06:26:45 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 06:26:45 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:26:45 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:26:45 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 06:26:45 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 06:26:45 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 06:26:45 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 06:26:45 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 06:26:45 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 06:26:45 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:26:45 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:26:45 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 06:26:45 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 06:26:45 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 06:26:45 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 06:26:45 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 06:26:45 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 06:26:45 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:26:45 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:26:45 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 06:26:45 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 06:26:45 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 06:26:45 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 06:26:45 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 06:26:45 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 06:26:45 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 06:26:45 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 06:26:45 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 06:26:45 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 06:26:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 06:26:45 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:26:45 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 06:26:45 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 06:26:45 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:26:45 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:26:45 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 06:26:45 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 06:26:45 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 06:26:45 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 06:26:45 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:26:45 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:26:45 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:26:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 06:26:45 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:26:45 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:26:45 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:26:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:26:45 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:26:45 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:26:45 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:26:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:26:45 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:26:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:26:45 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:26:45 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:26:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:26:45 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:26:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:26:45 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:26:45 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:26:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:26:45 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:26:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:26:45 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:26:45 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:26:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:26:45 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:26:45 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:26:45 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:26:45 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-03-30 06:26:46 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-03-30 06:26:46 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-03-30 06:26:46 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-03-30 06:26:46 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-03-30 06:26:46 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-03-30 06:26:46 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-03-30 06:26:46 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-03-30 06:26:46 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-03-30 06:26:46 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-03-30 06:26:46 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=0 bl=148 pwr=0
2025-03-30 06:26:46 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=1 bl=148 pwr=0
2025-03-30 06:26:46 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=2 bl=148 pwr=0
2025-03-30 06:26:46 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=3 bl=148 pwr=0
2025-03-30 06:26:46 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=4 bl=148 pwr=0
2025-03-30 06:26:46 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=5 bl=148 pwr=0
2025-03-30 06:26:46 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=6 bl=148 pwr=0
2025-03-30 06:26:46 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=7 bl=148 pwr=0
2025-03-30 06:26:46 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 06:26:46 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 06:26:46 [DEBUG] fake_trx.py:317 (BTS@172.18.26.20:5700) Recv FAKE_CI cmd
2025-03-30 06:26:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:26:46 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:26:46 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:26:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:26:46 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:26:46 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:26:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:26:46 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:26:46 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:26:46 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:26:46 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:26:46 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:26:46 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:26:46 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:26:46 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 06:26:46 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 06:26:46 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 06:26:46 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=131 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:26:46 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:26:46 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=131 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:26:46 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=131 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:26:46 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=131 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:26:51 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 06:26:51 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 06:26:51 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:26:51 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:26:51 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:26:51 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:26:51 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:26:51 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 06:26:51 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:26:51 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 06:26:51 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 06:26:51 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 06:26:51 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 06:26:51 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 06:26:51 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:26:51 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:26:51 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 06:26:51 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 06:26:51 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 06:26:51 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 06:26:51 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 06:26:51 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 06:26:51 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:26:51 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:26:51 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 06:26:51 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 06:26:51 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 06:26:51 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 06:26:51 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 06:26:51 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 06:26:51 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:26:51 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:26:51 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 06:26:51 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 06:26:51 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 06:26:51 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 06:26:51 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 06:26:51 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 06:26:51 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 06:26:51 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 06:26:51 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 06:26:51 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 06:26:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 06:26:51 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:26:51 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 06:26:51 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 06:26:51 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:26:51 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:26:51 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 06:26:51 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 06:26:51 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 06:26:51 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 06:26:51 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:26:51 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:26:51 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:26:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 06:26:51 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:26:51 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:26:51 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:26:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:26:51 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:26:51 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:26:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:26:51 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:26:51 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:26:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:26:51 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:26:51 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:26:51 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:26:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:26:51 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:26:51 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:26:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:26:51 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:26:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:26:51 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:26:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:26:51 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:26:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:26:51 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:26:51 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:26:51 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:26:51 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-03-30 06:26:51 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-03-30 06:26:52 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-03-30 06:26:52 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-03-30 06:26:52 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-03-30 06:26:52 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-03-30 06:26:52 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-03-30 06:26:52 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-03-30 06:26:52 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-03-30 06:26:52 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-03-30 06:26:52 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=0 bl=148 pwr=0
2025-03-30 06:26:52 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=1 bl=148 pwr=0
2025-03-30 06:26:52 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=2 bl=148 pwr=0
2025-03-30 06:26:52 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=3 bl=148 pwr=0
2025-03-30 06:26:52 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=4 bl=148 pwr=0
2025-03-30 06:26:52 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=5 bl=148 pwr=0
2025-03-30 06:26:52 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=6 bl=148 pwr=0
2025-03-30 06:26:52 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=7 bl=148 pwr=0
2025-03-30 06:26:52 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 06:26:52 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 06:26:52 [DEBUG] fake_trx.py:317 (BTS@172.18.26.20:5700) Recv FAKE_CI cmd
2025-03-30 06:26:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:26:52 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:26:52 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:26:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:26:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:26:52 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:26:52 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:26:52 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:26:52 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:26:52 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-03-30 06:26:52 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:26:52 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:26:52 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:26:52 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:26:52 [DEBUG] clck_gen.py:128 IND CLOCK 306
2025-03-30 06:26:53 [DEBUG] clck_gen.py:128 IND CLOCK 408
2025-03-30 06:26:53 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:26:53 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:26:53 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:26:53 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:26:53 [DEBUG] clck_gen.py:128 IND CLOCK 510
2025-03-30 06:26:54 [DEBUG] clck_gen.py:128 IND CLOCK 612
2025-03-30 06:26:54 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:26:54 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:26:54 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:26:54 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:26:54 [DEBUG] clck_gen.py:128 IND CLOCK 714
2025-03-30 06:26:55 [DEBUG] clck_gen.py:128 IND CLOCK 816
2025-03-30 06:26:55 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:26:55 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:26:55 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:26:55 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:26:55 [DEBUG] clck_gen.py:128 IND CLOCK 918
2025-03-30 06:26:56 [DEBUG] clck_gen.py:128 IND CLOCK 1020
2025-03-30 06:26:56 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:26:56 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:26:56 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:26:56 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:26:56 [DEBUG] clck_gen.py:128 IND CLOCK 1122
2025-03-30 06:26:57 [DEBUG] clck_gen.py:128 IND CLOCK 1224
2025-03-30 06:26:57 [DEBUG] clck_gen.py:128 IND CLOCK 1326
2025-03-30 06:26:58 [DEBUG] clck_gen.py:128 IND CLOCK 1428
2025-03-30 06:26:58 [DEBUG] clck_gen.py:128 IND CLOCK 1530
2025-03-30 06:26:58 [WARNING] clck_gen.py:108 CLCKGen: time overrun by -5621us; resetting the clock
2025-03-30 06:26:59 [DEBUG] clck_gen.py:128 IND CLOCK 1632
2025-03-30 06:26:59 [DEBUG] clck_gen.py:128 IND CLOCK 1734
2025-03-30 06:27:00 [DEBUG] clck_gen.py:128 IND CLOCK 1836
2025-03-30 06:27:00 [DEBUG] clck_gen.py:128 IND CLOCK 1938
2025-03-30 06:27:00 [DEBUG] clck_gen.py:128 IND CLOCK 2040
2025-03-30 06:27:01 [DEBUG] clck_gen.py:128 IND CLOCK 2142
2025-03-30 06:27:01 [DEBUG] clck_gen.py:128 IND CLOCK 2244
2025-03-30 06:27:02 [DEBUG] clck_gen.py:128 IND CLOCK 2346
2025-03-30 06:27:02 [DEBUG] clck_gen.py:128 IND CLOCK 2448
2025-03-30 06:27:03 [DEBUG] clck_gen.py:128 IND CLOCK 2550
2025-03-30 06:27:03 [DEBUG] clck_gen.py:128 IND CLOCK 2652
2025-03-30 06:27:04 [DEBUG] clck_gen.py:128 IND CLOCK 2754
2025-03-30 06:27:04 [DEBUG] clck_gen.py:128 IND CLOCK 2856
2025-03-30 06:27:05 [DEBUG] clck_gen.py:128 IND CLOCK 2958
2025-03-30 06:27:05 [DEBUG] clck_gen.py:128 IND CLOCK 3060
2025-03-30 06:27:06 [DEBUG] clck_gen.py:128 IND CLOCK 3162
2025-03-30 06:27:06 [DEBUG] clck_gen.py:128 IND CLOCK 3264
2025-03-30 06:27:07 [DEBUG] clck_gen.py:128 IND CLOCK 3366
2025-03-30 06:27:07 [DEBUG] clck_gen.py:128 IND CLOCK 3468
2025-03-30 06:27:08 [DEBUG] clck_gen.py:128 IND CLOCK 3570
2025-03-30 06:27:08 [DEBUG] clck_gen.py:128 IND CLOCK 3672
2025-03-30 06:27:08 [DEBUG] clck_gen.py:128 IND CLOCK 3774
2025-03-30 06:27:09 [DEBUG] clck_gen.py:128 IND CLOCK 3876
2025-03-30 06:27:09 [DEBUG] clck_gen.py:128 IND CLOCK 3978
2025-03-30 06:27:10 [DEBUG] clck_gen.py:128 IND CLOCK 4080
2025-03-30 06:27:10 [DEBUG] clck_gen.py:128 IND CLOCK 4182
2025-03-30 06:27:11 [DEBUG] clck_gen.py:128 IND CLOCK 4284
2025-03-30 06:27:11 [DEBUG] clck_gen.py:128 IND CLOCK 4386
2025-03-30 06:27:12 [DEBUG] clck_gen.py:128 IND CLOCK 4488
2025-03-30 06:27:12 [DEBUG] clck_gen.py:128 IND CLOCK 4590
2025-03-30 06:27:13 [DEBUG] clck_gen.py:128 IND CLOCK 4692
2025-03-30 06:27:13 [DEBUG] clck_gen.py:128 IND CLOCK 4794
2025-03-30 06:27:14 [DEBUG] clck_gen.py:128 IND CLOCK 4896
2025-03-30 06:27:14 [DEBUG] clck_gen.py:128 IND CLOCK 4998
2025-03-30 06:27:15 [DEBUG] clck_gen.py:128 IND CLOCK 5100
2025-03-30 06:27:15 [DEBUG] clck_gen.py:128 IND CLOCK 5202
2025-03-30 06:27:16 [DEBUG] clck_gen.py:128 IND CLOCK 5304
2025-03-30 06:27:16 [DEBUG] clck_gen.py:128 IND CLOCK 5406
2025-03-30 06:27:16 [DEBUG] clck_gen.py:128 IND CLOCK 5508
2025-03-30 06:27:17 [DEBUG] clck_gen.py:128 IND CLOCK 5610
2025-03-30 06:27:17 [DEBUG] clck_gen.py:128 IND CLOCK 5712
2025-03-30 06:27:18 [DEBUG] clck_gen.py:128 IND CLOCK 5814
2025-03-30 06:27:18 [DEBUG] clck_gen.py:128 IND CLOCK 5916
2025-03-30 06:27:19 [DEBUG] clck_gen.py:128 IND CLOCK 6018
2025-03-30 06:27:19 [DEBUG] clck_gen.py:128 IND CLOCK 6120
2025-03-30 06:27:20 [DEBUG] clck_gen.py:128 IND CLOCK 6222
2025-03-30 06:27:20 [DEBUG] clck_gen.py:128 IND CLOCK 6324
2025-03-30 06:27:21 [DEBUG] clck_gen.py:128 IND CLOCK 6426
2025-03-30 06:27:21 [DEBUG] clck_gen.py:128 IND CLOCK 6528
2025-03-30 06:27:22 [DEBUG] clck_gen.py:128 IND CLOCK 6630
2025-03-30 06:27:22 [DEBUG] clck_gen.py:128 IND CLOCK 6732
2025-03-30 06:27:23 [DEBUG] clck_gen.py:128 IND CLOCK 6834
2025-03-30 06:27:23 [DEBUG] clck_gen.py:128 IND CLOCK 6936
2025-03-30 06:27:24 [DEBUG] clck_gen.py:128 IND CLOCK 7038
2025-03-30 06:27:24 [DEBUG] clck_gen.py:128 IND CLOCK 7140
2025-03-30 06:27:24 [DEBUG] clck_gen.py:128 IND CLOCK 7242
2025-03-30 06:27:25 [DEBUG] clck_gen.py:128 IND CLOCK 7344
2025-03-30 06:27:25 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:27:25 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:27:25 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:27:25 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:27:25 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:27:25 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:27:25 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:27:25 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:27:25 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:27:25 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:27:25 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 06:27:25 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 06:27:25 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 06:27:30 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 06:27:30 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 06:27:30 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:27:30 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:27:30 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:27:30 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:27:30 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:27:30 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 06:27:30 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:27:30 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 06:27:30 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 06:27:30 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 06:27:30 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 06:27:30 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 06:27:30 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:27:30 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:27:30 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 06:27:30 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 06:27:30 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 06:27:30 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 06:27:30 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 06:27:30 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 06:27:30 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:27:30 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:27:30 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 06:27:30 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 06:27:30 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 06:27:30 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 06:27:30 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 06:27:30 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 06:27:30 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:27:30 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:27:30 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 06:27:30 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 06:27:30 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 06:27:30 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 06:27:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 06:27:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 06:27:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 06:27:30 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 06:27:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 06:27:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 06:27:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 06:27:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 06:27:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:27:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:27:30 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 06:27:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:27:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:27:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:27:30 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 06:27:30 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 06:27:30 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 06:27:30 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 06:27:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:27:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:27:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:27:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 06:27:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:27:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:27:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:27:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:27:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:27:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:27:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:27:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:27:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:27:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:27:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:27:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:27:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:27:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:27:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:27:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:27:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:27:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:27:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:27:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:27:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:27:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:27:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:27:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:27:30 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-03-30 06:27:31 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-03-30 06:27:31 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-03-30 06:27:31 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-03-30 06:27:31 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-03-30 06:27:31 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-03-30 06:27:31 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-03-30 06:27:31 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-03-30 06:27:31 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-03-30 06:27:31 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-03-30 06:27:31 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=0 bl=148 pwr=0
2025-03-30 06:27:31 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=1 bl=148 pwr=0
2025-03-30 06:27:31 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=2 bl=148 pwr=0
2025-03-30 06:27:31 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=3 bl=148 pwr=0
2025-03-30 06:27:31 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=4 bl=148 pwr=0
2025-03-30 06:27:31 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=5 bl=148 pwr=0
2025-03-30 06:27:31 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=6 bl=148 pwr=0
2025-03-30 06:27:31 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=7 bl=148 pwr=0
2025-03-30 06:27:31 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 06:27:31 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 06:27:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:27:31 [DEBUG] fake_trx.py:317 (BTS@172.18.26.20:5700) Recv FAKE_CI cmd
2025-03-30 06:27:31 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-03-30 06:27:31 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:27:31 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:27:31 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:27:31 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:27:31 [DEBUG] clck_gen.py:128 IND CLOCK 306
2025-03-30 06:27:32 [DEBUG] clck_gen.py:128 IND CLOCK 408
2025-03-30 06:27:32 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:27:32 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:27:32 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:27:32 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:27:32 [DEBUG] clck_gen.py:128 IND CLOCK 510
2025-03-30 06:27:33 [DEBUG] clck_gen.py:128 IND CLOCK 612
2025-03-30 06:27:33 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:27:33 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:27:33 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:27:33 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:27:33 [DEBUG] clck_gen.py:128 IND CLOCK 714
2025-03-30 06:27:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:27:34 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:27:34 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:27:34 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:27:34 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:27:34 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:27:34 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:27:34 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:27:34 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:27:34 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 06:27:34 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 06:27:34 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 06:27:39 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 06:27:39 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 06:27:39 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:27:39 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:27:39 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:27:39 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:27:39 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:27:39 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 06:27:39 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:27:39 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 06:27:39 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 06:27:39 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 06:27:39 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 06:27:39 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 06:27:39 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:27:39 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:27:39 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 06:27:39 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 06:27:39 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 06:27:39 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 06:27:39 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 06:27:39 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 06:27:39 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:27:39 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:27:39 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 06:27:39 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 06:27:39 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 06:27:39 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 06:27:39 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 06:27:39 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 06:27:39 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:27:39 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:27:39 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 06:27:39 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 06:27:39 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 06:27:39 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 06:27:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 06:27:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 06:27:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 06:27:39 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 06:27:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 06:27:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 06:27:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 06:27:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:27:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 06:27:39 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 06:27:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:27:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:27:39 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 06:27:39 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 06:27:39 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 06:27:39 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 06:27:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:27:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:27:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:27:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 06:27:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:27:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:27:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:27:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:27:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:27:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:27:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:27:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:27:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:27:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:27:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:27:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:27:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:27:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:27:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:27:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:27:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:27:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:27:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:27:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:27:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:27:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:27:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:27:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:27:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:27:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:27:39 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-03-30 06:27:39 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-03-30 06:27:39 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-03-30 06:27:39 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-03-30 06:27:39 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-03-30 06:27:39 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-03-30 06:27:39 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-03-30 06:27:39 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-03-30 06:27:39 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-03-30 06:27:39 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-03-30 06:27:39 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=0 bl=148 pwr=0
2025-03-30 06:27:39 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=1 bl=148 pwr=0
2025-03-30 06:27:39 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=2 bl=148 pwr=0
2025-03-30 06:27:39 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=3 bl=148 pwr=0
2025-03-30 06:27:39 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=4 bl=148 pwr=0
2025-03-30 06:27:39 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=5 bl=148 pwr=0
2025-03-30 06:27:39 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=6 bl=148 pwr=0
2025-03-30 06:27:39 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=7 bl=148 pwr=0
2025-03-30 06:27:39 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 06:27:39 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 06:27:39 [DEBUG] fake_trx.py:317 (BTS@172.18.26.20:5700) Recv FAKE_CI cmd
2025-03-30 06:27:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:27:40 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-03-30 06:27:40 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:27:40 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:27:40 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:27:40 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:27:40 [DEBUG] clck_gen.py:128 IND CLOCK 306
2025-03-30 06:27:41 [DEBUG] clck_gen.py:128 IND CLOCK 408
2025-03-30 06:27:41 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:27:41 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:27:41 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:27:41 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:27:41 [DEBUG] clck_gen.py:128 IND CLOCK 510
2025-03-30 06:27:41 [DEBUG] clck_gen.py:128 IND CLOCK 612
2025-03-30 06:27:42 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:27:42 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:27:42 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:27:42 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:27:42 [DEBUG] clck_gen.py:128 IND CLOCK 714
2025-03-30 06:27:42 [DEBUG] clck_gen.py:128 IND CLOCK 816
2025-03-30 06:27:43 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:27:43 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:27:43 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:27:43 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:27:43 [DEBUG] clck_gen.py:128 IND CLOCK 918
2025-03-30 06:27:43 [DEBUG] clck_gen.py:128 IND CLOCK 1020
2025-03-30 06:27:44 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:27:44 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:27:44 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:27:44 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:27:44 [DEBUG] clck_gen.py:128 IND CLOCK 1122
2025-03-30 06:27:44 [DEBUG] clck_gen.py:128 IND CLOCK 1224
2025-03-30 06:27:45 [DEBUG] clck_gen.py:128 IND CLOCK 1326
2025-03-30 06:27:45 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:27:45 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:27:45 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:27:45 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:27:45 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:27:45 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:27:45 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:27:45 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:27:45 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 06:27:45 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 06:27:45 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 06:27:45 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=1421 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:27:45 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=1421 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:27:45 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=1421 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:27:45 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=1421 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:27:45 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=1421 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:27:45 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=1421 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:27:45 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=1421 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:27:50 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 06:27:50 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 06:27:50 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:27:50 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:27:50 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:27:50 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:27:50 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:27:50 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 06:27:50 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:27:50 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 06:27:50 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 06:27:50 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 06:27:50 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 06:27:50 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 06:27:50 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:27:50 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:27:50 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 06:27:50 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 06:27:50 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 06:27:50 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 06:27:50 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 06:27:50 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 06:27:50 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:27:50 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:27:50 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 06:27:50 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 06:27:50 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 06:27:50 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 06:27:50 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 06:27:50 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 06:27:50 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:27:50 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 06:27:50 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:27:50 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 06:27:50 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 06:27:50 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 06:27:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 06:27:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 06:27:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 06:27:50 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 06:27:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 06:27:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 06:27:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 06:27:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:27:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 06:27:50 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 06:27:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:27:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:27:50 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 06:27:50 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 06:27:50 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 06:27:50 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 06:27:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:27:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:27:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:27:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 06:27:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:27:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:27:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:27:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:27:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:27:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:27:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:27:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:27:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:27:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:27:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:27:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:27:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:27:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:27:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:27:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:27:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:27:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:27:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:27:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:27:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:27:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:27:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:27:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:27:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:27:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:27:50 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-03-30 06:27:51 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-03-30 06:27:51 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-03-30 06:27:51 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-03-30 06:27:51 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-03-30 06:27:51 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-03-30 06:27:51 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-03-30 06:27:51 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-03-30 06:27:51 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-03-30 06:27:51 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-03-30 06:27:51 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=0 bl=148 pwr=0
2025-03-30 06:27:51 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=1 bl=148 pwr=0
2025-03-30 06:27:51 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=2 bl=148 pwr=0
2025-03-30 06:27:51 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=3 bl=148 pwr=0
2025-03-30 06:27:51 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=4 bl=148 pwr=0
2025-03-30 06:27:51 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=5 bl=148 pwr=0
2025-03-30 06:27:51 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=6 bl=148 pwr=0
2025-03-30 06:27:51 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=7 bl=148 pwr=0
2025-03-30 06:27:51 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 06:27:51 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 06:27:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:27:51 [DEBUG] fake_trx.py:317 (BTS@172.18.26.20:5700) Recv FAKE_CI cmd
2025-03-30 06:27:51 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-03-30 06:27:51 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:27:51 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:27:51 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:27:51 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:27:52 [DEBUG] clck_gen.py:128 IND CLOCK 306
2025-03-30 06:27:52 [DEBUG] clck_gen.py:128 IND CLOCK 408
2025-03-30 06:27:52 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:27:52 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:27:52 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:27:52 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:27:53 [DEBUG] clck_gen.py:128 IND CLOCK 510
2025-03-30 06:27:53 [DEBUG] clck_gen.py:128 IND CLOCK 612
2025-03-30 06:27:53 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=628): ver=1 fn=626 tn=0 bl=148 pwr=0
2025-03-30 06:27:53 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=629): ver=1 fn=626 tn=1 bl=148 pwr=0
2025-03-30 06:27:53 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=629): ver=1 fn=626 tn=2 bl=148 pwr=0
2025-03-30 06:27:53 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=629): ver=1 fn=626 tn=3 bl=148 pwr=0
2025-03-30 06:27:53 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=629): ver=1 fn=626 tn=4 bl=148 pwr=0
2025-03-30 06:27:53 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=629): ver=1 fn=626 tn=5 bl=148 pwr=0
2025-03-30 06:27:53 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=629): ver=1 fn=626 tn=6 bl=148 pwr=0
2025-03-30 06:27:53 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=629): ver=1 fn=626 tn=7 bl=148 pwr=0
2025-03-30 06:27:53 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=629): ver=1 fn=627 tn=0 bl=148 pwr=0
2025-03-30 06:27:53 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=629): ver=1 fn=627 tn=1 bl=148 pwr=0
2025-03-30 06:27:53 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=629): ver=1 fn=627 tn=2 bl=148 pwr=0
2025-03-30 06:27:53 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=629): ver=1 fn=627 tn=3 bl=148 pwr=0
2025-03-30 06:27:53 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=629): ver=1 fn=627 tn=4 bl=148 pwr=0
2025-03-30 06:27:53 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=629): ver=1 fn=627 tn=5 bl=148 pwr=0
2025-03-30 06:27:53 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=629): ver=1 fn=627 tn=6 bl=148 pwr=0
2025-03-30 06:27:53 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=629): ver=1 fn=627 tn=7 bl=148 pwr=0
2025-03-30 06:27:53 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=629): ver=1 fn=628 tn=0 bl=148 pwr=0
2025-03-30 06:27:53 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=629): ver=1 fn=628 tn=1 bl=148 pwr=0
2025-03-30 06:27:53 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=629): ver=1 fn=628 tn=2 bl=148 pwr=0
2025-03-30 06:27:53 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=629): ver=1 fn=628 tn=3 bl=148 pwr=0
2025-03-30 06:27:53 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=629): ver=1 fn=628 tn=4 bl=148 pwr=0
2025-03-30 06:27:53 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=629): ver=1 fn=628 tn=5 bl=148 pwr=0
2025-03-30 06:27:53 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=629): ver=1 fn=628 tn=6 bl=148 pwr=0
2025-03-30 06:27:53 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=629): ver=1 fn=628 tn=7 bl=148 pwr=0
2025-03-30 06:27:53 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:27:53 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:27:53 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:27:53 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:27:54 [DEBUG] clck_gen.py:128 IND CLOCK 714
2025-03-30 06:27:54 [DEBUG] clck_gen.py:128 IND CLOCK 816
2025-03-30 06:27:54 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:27:54 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:27:54 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:27:54 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:27:54 [DEBUG] clck_gen.py:128 IND CLOCK 918
2025-03-30 06:27:55 [DEBUG] clck_gen.py:128 IND CLOCK 1020
2025-03-30 06:27:55 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:27:55 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:27:55 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:27:55 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:27:55 [DEBUG] clck_gen.py:128 IND CLOCK 1122
2025-03-30 06:27:56 [DEBUG] clck_gen.py:128 IND CLOCK 1224
2025-03-30 06:27:56 [DEBUG] clck_gen.py:128 IND CLOCK 1326
2025-03-30 06:27:57 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:27:57 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:27:57 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:27:57 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:27:57 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:27:57 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:27:57 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:27:57 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 06:27:57 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 06:27:57 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 06:27:57 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=1420 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:27:57 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:27:57 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=1420 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:27:57 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=1420 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:27:57 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=1420 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:27:57 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=1420 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:27:57 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=1420 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:28:02 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 06:28:02 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 06:28:02 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:28:02 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:28:02 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:28:02 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:28:02 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:28:02 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 06:28:02 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:28:02 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 06:28:02 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 06:28:02 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 06:28:02 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 06:28:02 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 06:28:02 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:28:02 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:28:02 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 06:28:02 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 06:28:02 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 06:28:02 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 06:28:02 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 06:28:02 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 06:28:02 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:28:02 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:28:02 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 06:28:02 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 06:28:02 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 06:28:02 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 06:28:02 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 06:28:02 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 06:28:02 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:28:02 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:28:02 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 06:28:02 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 06:28:02 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 06:28:02 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 06:28:02 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 06:28:02 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 06:28:02 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 06:28:02 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 06:28:02 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 06:28:02 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 06:28:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 06:28:02 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:28:02 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 06:28:02 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 06:28:02 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:28:02 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:28:02 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 06:28:02 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 06:28:02 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 06:28:02 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 06:28:02 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:28:02 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:28:02 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:28:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 06:28:02 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:28:02 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:28:02 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:28:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:28:02 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:28:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:28:02 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:28:02 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:28:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:28:02 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:28:02 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:28:02 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:28:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:28:02 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:28:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:28:02 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:28:02 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:28:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:28:02 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:28:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:28:02 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:28:02 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:28:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:28:02 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:28:02 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:28:02 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:28:02 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-03-30 06:28:02 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-03-30 06:28:02 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-03-30 06:28:02 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-03-30 06:28:02 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-03-30 06:28:02 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-03-30 06:28:02 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-03-30 06:28:02 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-03-30 06:28:02 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-03-30 06:28:02 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-03-30 06:28:02 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=0 bl=148 pwr=0
2025-03-30 06:28:02 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=1 bl=148 pwr=0
2025-03-30 06:28:02 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=2 bl=148 pwr=0
2025-03-30 06:28:02 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=3 bl=148 pwr=0
2025-03-30 06:28:02 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=4 bl=148 pwr=0
2025-03-30 06:28:02 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=5 bl=148 pwr=0
2025-03-30 06:28:02 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=6 bl=148 pwr=0
2025-03-30 06:28:02 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=7 bl=148 pwr=0
2025-03-30 06:28:02 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 06:28:02 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 06:28:02 [DEBUG] fake_trx.py:317 (BTS@172.18.26.20:5700) Recv FAKE_CI cmd
2025-03-30 06:28:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:28:03 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-03-30 06:28:03 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:28:03 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:28:03 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:28:03 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:28:03 [DEBUG] clck_gen.py:128 IND CLOCK 306
2025-03-30 06:28:04 [DEBUG] clck_gen.py:128 IND CLOCK 408
2025-03-30 06:28:04 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:28:04 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:28:04 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:28:04 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:28:04 [DEBUG] clck_gen.py:128 IND CLOCK 510
2025-03-30 06:28:05 [DEBUG] clck_gen.py:128 IND CLOCK 612
2025-03-30 06:28:05 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:28:05 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:28:05 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:28:05 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:28:05 [DEBUG] clck_gen.py:128 IND CLOCK 714
2025-03-30 06:28:06 [DEBUG] clck_gen.py:128 IND CLOCK 816
2025-03-30 06:28:06 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:28:06 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:28:06 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:28:06 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:28:06 [DEBUG] clck_gen.py:128 IND CLOCK 918
2025-03-30 06:28:07 [DEBUG] clck_gen.py:128 IND CLOCK 1020
2025-03-30 06:28:07 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:28:07 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:28:07 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:28:07 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:28:07 [DEBUG] clck_gen.py:128 IND CLOCK 1122
2025-03-30 06:28:07 [DEBUG] clck_gen.py:128 IND CLOCK 1224
2025-03-30 06:28:08 [DEBUG] clck_gen.py:128 IND CLOCK 1326
2025-03-30 06:28:08 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:28:08 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:28:08 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:28:08 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:28:08 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:28:08 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:28:08 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:28:08 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 06:28:08 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 06:28:08 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 06:28:08 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:28:13 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 06:28:13 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 06:28:13 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:28:13 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:28:13 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:28:13 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:28:13 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:28:13 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 06:28:13 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:28:13 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 06:28:13 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 06:28:13 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 06:28:13 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 06:28:13 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 06:28:13 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:28:13 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:28:13 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 06:28:13 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 06:28:13 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 06:28:13 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 06:28:13 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 06:28:13 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 06:28:13 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:28:13 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 06:28:13 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:28:13 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 06:28:13 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 06:28:13 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 06:28:13 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 06:28:13 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 06:28:13 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:28:13 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:28:13 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 06:28:13 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 06:28:13 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 06:28:13 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 06:28:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 06:28:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 06:28:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 06:28:13 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 06:28:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 06:28:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 06:28:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 06:28:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:28:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 06:28:13 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 06:28:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:28:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:28:13 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 06:28:13 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 06:28:13 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 06:28:13 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 06:28:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:28:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:28:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:28:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 06:28:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:28:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:28:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:28:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:28:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:28:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:28:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:28:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:28:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:28:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:28:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:28:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:28:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:28:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:28:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:28:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:28:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:28:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:28:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:28:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:28:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:28:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:28:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:28:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:28:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:28:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:28:13 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-03-30 06:28:14 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-03-30 06:28:14 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-03-30 06:28:14 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-03-30 06:28:14 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-03-30 06:28:14 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-03-30 06:28:14 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-03-30 06:28:14 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-03-30 06:28:14 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-03-30 06:28:14 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-03-30 06:28:14 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=0 bl=148 pwr=0
2025-03-30 06:28:14 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=1 bl=148 pwr=0
2025-03-30 06:28:14 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=2 bl=148 pwr=0
2025-03-30 06:28:14 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=3 bl=148 pwr=0
2025-03-30 06:28:14 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=4 bl=148 pwr=0
2025-03-30 06:28:14 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=5 bl=148 pwr=0
2025-03-30 06:28:14 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=6 bl=148 pwr=0
2025-03-30 06:28:14 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=7 bl=148 pwr=0
2025-03-30 06:28:14 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 06:28:14 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 06:28:14 [DEBUG] fake_trx.py:317 (BTS@172.18.26.20:5700) Recv FAKE_CI cmd
2025-03-30 06:28:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:28:14 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-03-30 06:28:14 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:28:14 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:28:14 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:28:14 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:28:15 [DEBUG] clck_gen.py:128 IND CLOCK 306
2025-03-30 06:28:15 [DEBUG] clck_gen.py:128 IND CLOCK 408
2025-03-30 06:28:15 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:28:15 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:28:15 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:28:15 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:28:16 [DEBUG] clck_gen.py:128 IND CLOCK 510
2025-03-30 06:28:16 [DEBUG] clck_gen.py:128 IND CLOCK 612
2025-03-30 06:28:16 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:28:16 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:28:16 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:28:16 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:28:17 [DEBUG] clck_gen.py:128 IND CLOCK 714
2025-03-30 06:28:17 [DEBUG] clck_gen.py:128 IND CLOCK 816
2025-03-30 06:28:17 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:28:17 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:28:17 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:28:17 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:28:18 [DEBUG] clck_gen.py:128 IND CLOCK 918
2025-03-30 06:28:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:28:18 [DEBUG] clck_gen.py:128 IND CLOCK 1020
2025-03-30 06:28:18 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:28:18 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:28:18 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:28:18 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:28:19 [DEBUG] clck_gen.py:128 IND CLOCK 1122
2025-03-30 06:28:19 [DEBUG] clck_gen.py:128 IND CLOCK 1224
2025-03-30 06:28:20 [DEBUG] clck_gen.py:128 IND CLOCK 1326
2025-03-30 06:28:20 [DEBUG] clck_gen.py:128 IND CLOCK 1428
2025-03-30 06:28:21 [DEBUG] clck_gen.py:128 IND CLOCK 1530
2025-03-30 06:28:21 [DEBUG] clck_gen.py:128 IND CLOCK 1632
2025-03-30 06:28:21 [DEBUG] clck_gen.py:128 IND CLOCK 1734
2025-03-30 06:28:22 [DEBUG] clck_gen.py:128 IND CLOCK 1836
2025-03-30 06:28:22 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:28:22 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:28:22 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:28:22 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:28:22 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:28:22 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:28:22 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:28:22 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:28:22 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 06:28:22 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 06:28:22 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 06:28:27 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 06:28:27 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 06:28:27 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:28:27 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:28:27 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:28:27 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:28:27 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:28:27 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 06:28:27 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:28:27 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 06:28:27 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 06:28:27 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 06:28:27 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 06:28:27 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 06:28:27 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:28:27 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:28:27 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 06:28:27 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 06:28:27 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 06:28:27 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 06:28:27 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 06:28:27 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 06:28:27 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:28:27 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:28:27 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 06:28:27 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 06:28:27 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 06:28:27 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 06:28:27 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 06:28:27 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 06:28:27 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:28:27 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:28:27 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 06:28:27 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 06:28:27 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 06:28:27 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 06:28:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 06:28:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 06:28:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 06:28:27 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 06:28:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 06:28:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 06:28:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 06:28:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:28:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 06:28:27 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 06:28:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:28:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:28:27 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 06:28:27 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 06:28:27 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 06:28:27 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 06:28:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:28:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:28:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:28:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 06:28:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:28:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:28:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:28:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:28:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:28:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:28:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:28:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:28:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:28:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:28:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:28:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:28:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:28:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:28:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:28:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:28:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:28:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:28:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:28:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:28:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:28:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:28:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:28:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:28:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:28:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:28:27 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-03-30 06:28:28 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-03-30 06:28:28 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-03-30 06:28:28 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-03-30 06:28:28 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-03-30 06:28:28 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-03-30 06:28:28 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-03-30 06:28:28 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-03-30 06:28:28 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-03-30 06:28:28 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-03-30 06:28:28 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=0 bl=148 pwr=0
2025-03-30 06:28:28 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=1 bl=148 pwr=0
2025-03-30 06:28:28 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=2 bl=148 pwr=0
2025-03-30 06:28:28 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=3 bl=148 pwr=0
2025-03-30 06:28:28 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=4 bl=148 pwr=0
2025-03-30 06:28:28 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=5 bl=148 pwr=0
2025-03-30 06:28:28 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=6 bl=148 pwr=0
2025-03-30 06:28:28 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=7 bl=148 pwr=0
2025-03-30 06:28:28 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 06:28:28 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 06:28:28 [DEBUG] fake_trx.py:317 (BTS@172.18.26.20:5700) Recv FAKE_CI cmd
2025-03-30 06:28:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:28:28 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-03-30 06:28:28 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:28:28 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:28:28 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:28:28 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:28:28 [DEBUG] clck_gen.py:128 IND CLOCK 306
2025-03-30 06:28:29 [DEBUG] clck_gen.py:128 IND CLOCK 408
2025-03-30 06:28:29 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:28:29 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:28:29 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:28:29 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:28:29 [DEBUG] clck_gen.py:128 IND CLOCK 510
2025-03-30 06:28:29 [WARNING] clck_gen.py:108 CLCKGen: time overrun by -5310us; resetting the clock
2025-03-30 06:28:30 [DEBUG] clck_gen.py:128 IND CLOCK 612
2025-03-30 06:28:30 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:28:30 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:28:30 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:28:30 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:28:30 [DEBUG] clck_gen.py:128 IND CLOCK 714
2025-03-30 06:28:31 [DEBUG] clck_gen.py:128 IND CLOCK 816
2025-03-30 06:28:31 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:28:31 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:28:31 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:28:31 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:28:31 [DEBUG] clck_gen.py:128 IND CLOCK 918
2025-03-30 06:28:32 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:28:32 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:28:32 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:28:32 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:28:32 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:28:32 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:28:32 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:28:32 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 06:28:32 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 06:28:32 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 06:28:32 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:28:37 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 06:28:37 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 06:28:37 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:28:37 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:28:37 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:28:37 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:28:37 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:28:37 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 06:28:37 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:28:37 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 06:28:37 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 06:28:37 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 06:28:37 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 06:28:37 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 06:28:37 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:28:37 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:28:37 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 06:28:37 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 06:28:37 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 06:28:37 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 06:28:37 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 06:28:37 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 06:28:37 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:28:37 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:28:37 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 06:28:37 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 06:28:37 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 06:28:37 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 06:28:37 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 06:28:37 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 06:28:37 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:28:37 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:28:37 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 06:28:37 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 06:28:37 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 06:28:37 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 06:28:37 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 06:28:37 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 06:28:37 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 06:28:37 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 06:28:37 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 06:28:37 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 06:28:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 06:28:37 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:28:37 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 06:28:37 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 06:28:37 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:28:37 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:28:37 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 06:28:37 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 06:28:37 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 06:28:37 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 06:28:37 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:28:37 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:28:37 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:28:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 06:28:37 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:28:37 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:28:37 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:28:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:28:37 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:28:37 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:28:37 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:28:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:28:37 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:28:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:28:37 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:28:37 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:28:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:28:37 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:28:37 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:28:37 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:28:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:28:37 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:28:37 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:28:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:28:37 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:28:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:28:37 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:28:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:28:37 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:28:37 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:28:37 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-03-30 06:28:37 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-03-30 06:28:37 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-03-30 06:28:37 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-03-30 06:28:37 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-03-30 06:28:37 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-03-30 06:28:37 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-03-30 06:28:37 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-03-30 06:28:37 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-03-30 06:28:37 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-03-30 06:28:37 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=0 bl=148 pwr=0
2025-03-30 06:28:37 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=1 bl=148 pwr=0
2025-03-30 06:28:37 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=2 bl=148 pwr=0
2025-03-30 06:28:37 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=3 bl=148 pwr=0
2025-03-30 06:28:37 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=4 bl=148 pwr=0
2025-03-30 06:28:37 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=5 bl=148 pwr=0
2025-03-30 06:28:37 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=6 bl=148 pwr=0
2025-03-30 06:28:37 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=7 bl=148 pwr=0
2025-03-30 06:28:37 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 06:28:37 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 06:28:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:28:37 [DEBUG] fake_trx.py:317 (BTS@172.18.26.20:5700) Recv FAKE_CI cmd
2025-03-30 06:28:37 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:28:37 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:28:37 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:28:37 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:28:37 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:28:37 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:28:37 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:28:37 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:28:37 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 06:28:37 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 06:28:37 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 06:28:37 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=129 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:28:37 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=129 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:28:37 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=129 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:28:37 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=129 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:28:37 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=129 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:28:37 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=129 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:28:42 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 06:28:42 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 06:28:42 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:28:42 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:28:42 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:28:42 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:28:42 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:28:42 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 06:28:42 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:28:42 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 06:28:42 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 06:28:42 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 06:28:42 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 06:28:42 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 06:28:42 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:28:42 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:28:42 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 06:28:42 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 06:28:42 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 06:28:42 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 06:28:42 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 06:28:42 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 06:28:42 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:28:42 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:28:42 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 06:28:42 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 06:28:42 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 06:28:42 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 06:28:42 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 06:28:42 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 06:28:42 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:28:42 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:28:42 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 06:28:42 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 06:28:42 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 06:28:42 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 06:28:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 06:28:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 06:28:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 06:28:42 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 06:28:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 06:28:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 06:28:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 06:28:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:28:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 06:28:42 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 06:28:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:28:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:28:42 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 06:28:42 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 06:28:42 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 06:28:42 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 06:28:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:28:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:28:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:28:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 06:28:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:28:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:28:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:28:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:28:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:28:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:28:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:28:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:28:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:28:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:28:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:28:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:28:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:28:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:28:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:28:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:28:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:28:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:28:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:28:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:28:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:28:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:28:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:28:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:28:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:28:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:28:42 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-03-30 06:28:43 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-03-30 06:28:43 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-03-30 06:28:43 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-03-30 06:28:43 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-03-30 06:28:43 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-03-30 06:28:43 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-03-30 06:28:43 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-03-30 06:28:43 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-03-30 06:28:43 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-03-30 06:28:43 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=0 bl=148 pwr=0
2025-03-30 06:28:43 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=1 bl=148 pwr=0
2025-03-30 06:28:43 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=2 bl=148 pwr=0
2025-03-30 06:28:43 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=3 bl=148 pwr=0
2025-03-30 06:28:43 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=4 bl=148 pwr=0
2025-03-30 06:28:43 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=5 bl=148 pwr=0
2025-03-30 06:28:43 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=6 bl=148 pwr=0
2025-03-30 06:28:43 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=7 bl=148 pwr=0
2025-03-30 06:28:43 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 06:28:43 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 06:28:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:28:43 [DEBUG] fake_trx.py:317 (BTS@172.18.26.20:5700) Recv FAKE_CI cmd
2025-03-30 06:28:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:28:43 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:28:43 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:28:43 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:28:43 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:28:43 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:28:43 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:28:43 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:28:43 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:28:43 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 06:28:43 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 06:28:43 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 06:28:48 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 06:28:48 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 06:28:48 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:28:48 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:28:48 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:28:48 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:28:48 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:28:48 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 06:28:48 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:28:48 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 06:28:48 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 06:28:48 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 06:28:48 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 06:28:48 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 06:28:48 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:28:48 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:28:48 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 06:28:48 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 06:28:48 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 06:28:48 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 06:28:48 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 06:28:48 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 06:28:48 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:28:48 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 06:28:48 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:28:48 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 06:28:48 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 06:28:48 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 06:28:48 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 06:28:48 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 06:28:48 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:28:48 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 06:28:48 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:28:48 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 06:28:48 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 06:28:48 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 06:28:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 06:28:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 06:28:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 06:28:48 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 06:28:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 06:28:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 06:28:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 06:28:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 06:28:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:28:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:28:48 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 06:28:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:28:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:28:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:28:48 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 06:28:48 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 06:28:48 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 06:28:48 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 06:28:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:28:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:28:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:28:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 06:28:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:28:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:28:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:28:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:28:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:28:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:28:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:28:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:28:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:28:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:28:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:28:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:28:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:28:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:28:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:28:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:28:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:28:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:28:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:28:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:28:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:28:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:28:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:28:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:28:48 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-03-30 06:28:48 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-03-30 06:28:48 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-03-30 06:28:48 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-03-30 06:28:48 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-03-30 06:28:48 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-03-30 06:28:48 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-03-30 06:28:48 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-03-30 06:28:48 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-03-30 06:28:48 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-03-30 06:28:48 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=105 tn=0 bl=148 pwr=0
2025-03-30 06:28:48 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=105 tn=1 bl=148 pwr=0
2025-03-30 06:28:48 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=105 tn=2 bl=148 pwr=0
2025-03-30 06:28:48 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=105 tn=3 bl=148 pwr=0
2025-03-30 06:28:48 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=105 tn=4 bl=148 pwr=0
2025-03-30 06:28:48 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=105 tn=5 bl=148 pwr=0
2025-03-30 06:28:48 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=105 tn=6 bl=148 pwr=0
2025-03-30 06:28:48 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=105 tn=7 bl=148 pwr=0
2025-03-30 06:28:48 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=106 tn=0 bl=148 pwr=0
2025-03-30 06:28:48 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=106 tn=1 bl=148 pwr=0
2025-03-30 06:28:48 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=106 tn=2 bl=148 pwr=0
2025-03-30 06:28:48 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=106 tn=3 bl=148 pwr=0
2025-03-30 06:28:48 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=106 tn=4 bl=148 pwr=0
2025-03-30 06:28:48 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=106 tn=5 bl=148 pwr=0
2025-03-30 06:28:48 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=106 tn=6 bl=148 pwr=0
2025-03-30 06:28:48 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=106 tn=7 bl=148 pwr=0
2025-03-30 06:28:48 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=107 tn=0 bl=148 pwr=0
2025-03-30 06:28:48 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=107 tn=1 bl=148 pwr=0
2025-03-30 06:28:48 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=107 tn=2 bl=148 pwr=0
2025-03-30 06:28:48 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=107 tn=3 bl=148 pwr=0
2025-03-30 06:28:48 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=107 tn=4 bl=148 pwr=0
2025-03-30 06:28:48 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=107 tn=5 bl=148 pwr=0
2025-03-30 06:28:48 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=107 tn=6 bl=148 pwr=0
2025-03-30 06:28:48 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=107 tn=7 bl=148 pwr=0
2025-03-30 06:28:48 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 06:28:48 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 06:28:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:28:48 [DEBUG] fake_trx.py:317 (BTS@172.18.26.20:5700) Recv FAKE_CI cmd
2025-03-30 06:28:48 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:28:48 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:28:48 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:28:48 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:28:48 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:28:48 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:28:48 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:28:48 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:28:48 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 06:28:48 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 06:28:48 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 06:28:48 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=124 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:28:48 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=124 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:28:48 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=124 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:28:48 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=124 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:28:48 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=124 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:28:53 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 06:28:53 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 06:28:53 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:28:53 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:28:53 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:28:53 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:28:53 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:28:53 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 06:28:53 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:28:53 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 06:28:53 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 06:28:53 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 06:28:53 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 06:28:53 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 06:28:53 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:28:53 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:28:53 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 06:28:53 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 06:28:53 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 06:28:53 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 06:28:53 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 06:28:53 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 06:28:53 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:28:53 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:28:53 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 06:28:53 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 06:28:53 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 06:28:53 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 06:28:53 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 06:28:53 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 06:28:53 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:28:53 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:28:53 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 06:28:53 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 06:28:53 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 06:28:53 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 06:28:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 06:28:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 06:28:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 06:28:53 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 06:28:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 06:28:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 06:28:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 06:28:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:28:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 06:28:53 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 06:28:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:28:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:28:53 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 06:28:53 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 06:28:53 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 06:28:53 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 06:28:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:28:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:28:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:28:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 06:28:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:28:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:28:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:28:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:28:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:28:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:28:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:28:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:28:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:28:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:28:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:28:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:28:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:28:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:28:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:28:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:28:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:28:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:28:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:28:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:28:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:28:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:28:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:28:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:28:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:28:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:28:53 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-03-30 06:28:54 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-03-30 06:28:54 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-03-30 06:28:54 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-03-30 06:28:54 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-03-30 06:28:54 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-03-30 06:28:54 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-03-30 06:28:54 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-03-30 06:28:54 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-03-30 06:28:54 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-03-30 06:28:54 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=0 bl=148 pwr=0
2025-03-30 06:28:54 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=1 bl=148 pwr=0
2025-03-30 06:28:54 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=2 bl=148 pwr=0
2025-03-30 06:28:54 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=3 bl=148 pwr=0
2025-03-30 06:28:54 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=4 bl=148 pwr=0
2025-03-30 06:28:54 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=5 bl=148 pwr=0
2025-03-30 06:28:54 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=6 bl=148 pwr=0
2025-03-30 06:28:54 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=7 bl=148 pwr=0
2025-03-30 06:28:54 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 06:28:54 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 06:28:54 [DEBUG] fake_trx.py:317 (BTS@172.18.26.20:5700) Recv FAKE_CI cmd
2025-03-30 06:28:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:28:54 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:28:54 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:28:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:28:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:28:54 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:28:54 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:28:54 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:28:54 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:28:54 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-03-30 06:28:54 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:28:54 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:28:54 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:28:54 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:28:55 [DEBUG] clck_gen.py:128 IND CLOCK 306
2025-03-30 06:28:55 [DEBUG] clck_gen.py:128 IND CLOCK 408
2025-03-30 06:28:55 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:28:55 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:28:55 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:28:55 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:28:56 [DEBUG] clck_gen.py:128 IND CLOCK 510
2025-03-30 06:28:56 [DEBUG] clck_gen.py:128 IND CLOCK 612
2025-03-30 06:28:56 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:28:56 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:28:56 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:28:56 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:28:57 [DEBUG] clck_gen.py:128 IND CLOCK 714
2025-03-30 06:28:57 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:28:57 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:28:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:28:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:28:57 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:28:57 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:28:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:28:57 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:28:57 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:28:57 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:28:57 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:28:57 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:28:57 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:28:57 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:28:57 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:28:57 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 06:28:57 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 06:28:57 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 06:29:02 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 06:29:02 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 06:29:02 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:29:02 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:29:02 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:29:02 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:29:02 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:29:02 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 06:29:02 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:29:02 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 06:29:02 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 06:29:02 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 06:29:02 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 06:29:02 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 06:29:02 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:29:02 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:29:02 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 06:29:02 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 06:29:02 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 06:29:02 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 06:29:02 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 06:29:02 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 06:29:02 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:29:02 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:29:02 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 06:29:02 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 06:29:02 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 06:29:02 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 06:29:02 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 06:29:02 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 06:29:02 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:29:02 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:29:02 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 06:29:02 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 06:29:02 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 06:29:02 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 06:29:02 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 06:29:02 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 06:29:02 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 06:29:02 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 06:29:02 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 06:29:02 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 06:29:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 06:29:02 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:29:02 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 06:29:02 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 06:29:02 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:29:02 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:29:02 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 06:29:02 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 06:29:02 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 06:29:02 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 06:29:02 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:29:02 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:29:02 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:29:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 06:29:02 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:29:02 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:29:02 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:29:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:29:02 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:29:02 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:29:02 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:29:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:29:02 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:29:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:29:02 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:29:02 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:29:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:29:02 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:29:02 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:29:02 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:29:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:29:02 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:29:02 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:29:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:29:02 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:29:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:29:02 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:29:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:29:02 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:29:02 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:29:02 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-03-30 06:29:03 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-03-30 06:29:03 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-03-30 06:29:03 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-03-30 06:29:03 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-03-30 06:29:03 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-03-30 06:29:03 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-03-30 06:29:03 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-03-30 06:29:03 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-03-30 06:29:03 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-03-30 06:29:03 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=105 tn=0 bl=148 pwr=0
2025-03-30 06:29:03 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=105 tn=1 bl=148 pwr=0
2025-03-30 06:29:03 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=105 tn=2 bl=148 pwr=0
2025-03-30 06:29:03 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=105 tn=3 bl=148 pwr=0
2025-03-30 06:29:03 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=105 tn=4 bl=148 pwr=0
2025-03-30 06:29:03 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=105 tn=5 bl=148 pwr=0
2025-03-30 06:29:03 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=105 tn=6 bl=148 pwr=0
2025-03-30 06:29:03 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=105 tn=7 bl=148 pwr=0
2025-03-30 06:29:03 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=106 tn=0 bl=148 pwr=0
2025-03-30 06:29:03 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=106 tn=1 bl=148 pwr=0
2025-03-30 06:29:03 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=106 tn=2 bl=148 pwr=0
2025-03-30 06:29:03 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=106 tn=3 bl=148 pwr=0
2025-03-30 06:29:03 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=106 tn=4 bl=148 pwr=0
2025-03-30 06:29:03 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=106 tn=5 bl=148 pwr=0
2025-03-30 06:29:03 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=106 tn=6 bl=148 pwr=0
2025-03-30 06:29:03 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=106 tn=7 bl=148 pwr=0
2025-03-30 06:29:03 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=107 tn=0 bl=148 pwr=0
2025-03-30 06:29:03 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=107 tn=1 bl=148 pwr=0
2025-03-30 06:29:03 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=107 tn=2 bl=148 pwr=0
2025-03-30 06:29:03 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=107 tn=3 bl=148 pwr=0
2025-03-30 06:29:03 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=107 tn=4 bl=148 pwr=0
2025-03-30 06:29:03 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=107 tn=5 bl=148 pwr=0
2025-03-30 06:29:03 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=107 tn=6 bl=148 pwr=0
2025-03-30 06:29:03 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=107 tn=7 bl=148 pwr=0
2025-03-30 06:29:03 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 06:29:03 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 06:29:03 [DEBUG] fake_trx.py:317 (BTS@172.18.26.20:5700) Recv FAKE_CI cmd
2025-03-30 06:29:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:29:03 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:29:03 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:29:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:29:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:29:03 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:29:03 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:29:03 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:29:03 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:29:03 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-03-30 06:29:03 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:29:03 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:29:03 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:29:03 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:29:04 [DEBUG] clck_gen.py:128 IND CLOCK 306
2025-03-30 06:29:04 [DEBUG] clck_gen.py:128 IND CLOCK 408
2025-03-30 06:29:04 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:29:04 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:29:04 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:29:04 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:29:05 [DEBUG] clck_gen.py:128 IND CLOCK 510
2025-03-30 06:29:05 [DEBUG] clck_gen.py:128 IND CLOCK 612
2025-03-30 06:29:05 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:29:05 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:29:05 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:29:05 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:29:05 [DEBUG] clck_gen.py:128 IND CLOCK 714
2025-03-30 06:29:06 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:29:06 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:29:06 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:29:06 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:29:06 [DEBUG] clck_gen.py:128 IND CLOCK 816
2025-03-30 06:29:06 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:29:06 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:29:06 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:29:06 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:29:06 [DEBUG] clck_gen.py:128 IND CLOCK 918
2025-03-30 06:29:06 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:29:06 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:29:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:29:06 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:29:06 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:29:06 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:29:06 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:29:06 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:29:06 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:29:06 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:29:06 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:29:06 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 06:29:06 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 06:29:06 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 06:29:11 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 06:29:11 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 06:29:11 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:29:11 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:29:11 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:29:11 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:29:11 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:29:11 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 06:29:11 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:29:11 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 06:29:11 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 06:29:11 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 06:29:11 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 06:29:11 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 06:29:11 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:29:11 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:29:11 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 06:29:11 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 06:29:11 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 06:29:11 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 06:29:11 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 06:29:11 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 06:29:11 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:29:11 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:29:11 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 06:29:11 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 06:29:11 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 06:29:11 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 06:29:11 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 06:29:11 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 06:29:11 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:29:11 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:29:11 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 06:29:11 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 06:29:11 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 06:29:11 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 06:29:11 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 06:29:11 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 06:29:11 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 06:29:11 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 06:29:11 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 06:29:11 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 06:29:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 06:29:11 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:29:11 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 06:29:11 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 06:29:11 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:29:11 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:29:11 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 06:29:11 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 06:29:11 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 06:29:11 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 06:29:11 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:29:11 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:29:11 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:29:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 06:29:11 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:29:11 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:29:11 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:29:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:29:11 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:29:11 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:29:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:29:11 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:29:11 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:29:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:29:11 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:29:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:29:11 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:29:11 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:29:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:29:11 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:29:11 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:29:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:29:11 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:29:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:29:11 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:29:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:29:11 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:29:11 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:29:11 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:29:11 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:29:11 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-03-30 06:29:12 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-03-30 06:29:12 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-03-30 06:29:12 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-03-30 06:29:12 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-03-30 06:29:12 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-03-30 06:29:12 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-03-30 06:29:12 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-03-30 06:29:12 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-03-30 06:29:12 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-03-30 06:29:12 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=0 bl=148 pwr=0
2025-03-30 06:29:12 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=1 bl=148 pwr=0
2025-03-30 06:29:12 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=2 bl=148 pwr=0
2025-03-30 06:29:12 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=3 bl=148 pwr=0
2025-03-30 06:29:12 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=4 bl=148 pwr=0
2025-03-30 06:29:12 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=5 bl=148 pwr=0
2025-03-30 06:29:12 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=6 bl=148 pwr=0
2025-03-30 06:29:12 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=7 bl=148 pwr=0
2025-03-30 06:29:12 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 06:29:12 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 06:29:12 [DEBUG] fake_trx.py:317 (BTS@172.18.26.20:5700) Recv FAKE_CI cmd
2025-03-30 06:29:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:29:12 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:29:12 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:29:12 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:29:12 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:29:12 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:29:12 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:29:12 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:29:12 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:29:12 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-03-30 06:29:12 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:29:12 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:29:12 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:29:12 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:29:13 [DEBUG] clck_gen.py:128 IND CLOCK 306
2025-03-30 06:29:13 [DEBUG] clck_gen.py:128 IND CLOCK 408
2025-03-30 06:29:13 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:29:13 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:29:13 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:29:13 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:29:14 [DEBUG] clck_gen.py:128 IND CLOCK 510
2025-03-30 06:29:14 [DEBUG] clck_gen.py:128 IND CLOCK 612
2025-03-30 06:29:14 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:29:14 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:29:14 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:29:14 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:29:15 [DEBUG] clck_gen.py:128 IND CLOCK 714
2025-03-30 06:29:15 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:29:15 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:29:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:29:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:29:15 [DEBUG] clck_gen.py:128 IND CLOCK 816
2025-03-30 06:29:15 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:29:15 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:29:15 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:29:15 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:29:16 [DEBUG] clck_gen.py:128 IND CLOCK 918
2025-03-30 06:29:16 [DEBUG] clck_gen.py:128 IND CLOCK 1020
2025-03-30 06:29:16 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:29:16 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:29:16 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:29:16 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:29:17 [DEBUG] clck_gen.py:128 IND CLOCK 1122
2025-03-30 06:29:17 [DEBUG] clck_gen.py:128 IND CLOCK 1224
2025-03-30 06:29:18 [DEBUG] clck_gen.py:128 IND CLOCK 1326
2025-03-30 06:29:18 [DEBUG] clck_gen.py:128 IND CLOCK 1428
2025-03-30 06:29:19 [DEBUG] clck_gen.py:128 IND CLOCK 1530
2025-03-30 06:29:19 [DEBUG] clck_gen.py:128 IND CLOCK 1632
2025-03-30 06:29:19 [DEBUG] clck_gen.py:128 IND CLOCK 1734
2025-03-30 06:29:20 [WARNING] transceiver.py:330 (MS@172.18.26.22:6700) Stale TRXD message (fn=1827): fn=1825 tn=7 pwr=0
2025-03-30 06:29:20 [WARNING] transceiver.py:330 (MS@172.18.26.22:6700) Stale TRXD message (fn=1827): fn=1826 tn=0 pwr=0
2025-03-30 06:29:20 [WARNING] transceiver.py:330 (MS@172.18.26.22:6700) Stale TRXD message (fn=1827): fn=1826 tn=1 pwr=0
2025-03-30 06:29:20 [WARNING] transceiver.py:330 (MS@172.18.26.22:6700) Stale TRXD message (fn=1827): fn=1826 tn=2 pwr=0
2025-03-30 06:29:20 [WARNING] transceiver.py:330 (MS@172.18.26.22:6700) Stale TRXD message (fn=1827): fn=1826 tn=3 pwr=0
2025-03-30 06:29:20 [WARNING] transceiver.py:330 (MS@172.18.26.22:6700) Stale TRXD message (fn=1827): fn=1826 tn=4 pwr=0
2025-03-30 06:29:20 [WARNING] transceiver.py:330 (MS@172.18.26.22:6700) Stale TRXD message (fn=1827): fn=1826 tn=5 pwr=0
2025-03-30 06:29:20 [WARNING] transceiver.py:330 (MS@172.18.26.22:6700) Stale TRXD message (fn=1827): fn=1826 tn=6 pwr=0
2025-03-30 06:29:20 [WARNING] transceiver.py:330 (MS@172.18.26.22:6700) Stale TRXD message (fn=1827): fn=1826 tn=7 pwr=0
2025-03-30 06:29:20 [DEBUG] clck_gen.py:128 IND CLOCK 1836
2025-03-30 06:29:20 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:29:20 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:29:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:29:20 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:29:20 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:29:20 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:29:20 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:29:20 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:29:20 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:29:20 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:29:20 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:29:20 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 06:29:20 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 06:29:20 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 06:29:20 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=1866 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:29:25 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 06:29:25 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 06:29:25 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:29:25 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:29:25 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:29:25 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:29:25 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:29:25 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 06:29:25 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:29:25 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 06:29:25 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 06:29:25 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 06:29:25 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 06:29:25 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 06:29:25 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:29:25 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:29:25 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 06:29:25 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 06:29:25 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 06:29:25 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 06:29:25 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 06:29:25 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 06:29:25 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:29:25 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:29:25 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 06:29:25 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 06:29:25 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 06:29:25 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 06:29:25 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 06:29:25 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 06:29:25 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:29:25 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:29:25 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 06:29:25 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 06:29:25 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 06:29:25 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 06:29:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 06:29:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 06:29:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 06:29:25 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 06:29:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 06:29:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 06:29:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 06:29:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:29:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 06:29:25 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 06:29:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:29:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:29:25 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 06:29:25 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 06:29:25 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 06:29:25 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 06:29:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:29:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:29:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:29:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 06:29:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:29:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:29:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:29:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:29:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:29:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:29:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:29:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:29:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:29:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:29:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:29:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:29:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:29:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:29:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:29:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:29:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:29:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:29:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:29:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:29:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:29:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:29:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:29:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:29:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:29:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:29:25 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-03-30 06:29:26 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-03-30 06:29:26 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-03-30 06:29:26 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-03-30 06:29:26 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-03-30 06:29:26 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-03-30 06:29:26 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-03-30 06:29:26 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-03-30 06:29:26 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-03-30 06:29:26 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-03-30 06:29:26 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=0 bl=148 pwr=0
2025-03-30 06:29:26 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=1 bl=148 pwr=0
2025-03-30 06:29:26 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=2 bl=148 pwr=0
2025-03-30 06:29:26 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=3 bl=148 pwr=0
2025-03-30 06:29:26 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=4 bl=148 pwr=0
2025-03-30 06:29:26 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=5 bl=148 pwr=0
2025-03-30 06:29:26 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=6 bl=148 pwr=0
2025-03-30 06:29:26 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=7 bl=148 pwr=0
2025-03-30 06:29:26 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 06:29:26 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 06:29:26 [DEBUG] fake_trx.py:317 (BTS@172.18.26.20:5700) Recv FAKE_CI cmd
2025-03-30 06:29:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:29:26 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:29:26 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:29:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:29:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:29:26 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:29:26 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:29:26 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:29:26 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:29:26 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-03-30 06:29:26 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:29:26 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:29:26 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:29:26 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:29:27 [DEBUG] clck_gen.py:128 IND CLOCK 306
2025-03-30 06:29:27 [DEBUG] clck_gen.py:128 IND CLOCK 408
2025-03-30 06:29:27 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:29:27 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:29:27 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:29:27 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:29:27 [DEBUG] clck_gen.py:128 IND CLOCK 510
2025-03-30 06:29:28 [DEBUG] clck_gen.py:128 IND CLOCK 612
2025-03-30 06:29:28 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:29:28 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:29:28 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:29:28 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:29:28 [DEBUG] clck_gen.py:128 IND CLOCK 714
2025-03-30 06:29:29 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:29:29 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:29:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:29:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:29:29 [DEBUG] clck_gen.py:128 IND CLOCK 816
2025-03-30 06:29:29 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:29:29 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:29:29 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:29:29 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:29:29 [DEBUG] clck_gen.py:128 IND CLOCK 918
2025-03-30 06:29:30 [DEBUG] clck_gen.py:128 IND CLOCK 1020
2025-03-30 06:29:30 [WARNING] transceiver.py:330 (MS@172.18.26.22:6700) Stale TRXD message (fn=1037): fn=1036 tn=7 pwr=0
2025-03-30 06:29:30 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:29:30 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:29:30 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:29:30 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:29:30 [DEBUG] clck_gen.py:128 IND CLOCK 1122
2025-03-30 06:29:31 [DEBUG] clck_gen.py:128 IND CLOCK 1224
2025-03-30 06:29:31 [DEBUG] clck_gen.py:128 IND CLOCK 1326
2025-03-30 06:29:32 [DEBUG] clck_gen.py:128 IND CLOCK 1428
2025-03-30 06:29:32 [DEBUG] clck_gen.py:128 IND CLOCK 1530
2025-03-30 06:29:33 [DEBUG] clck_gen.py:128 IND CLOCK 1632
2025-03-30 06:29:33 [DEBUG] clck_gen.py:128 IND CLOCK 1734
2025-03-30 06:29:34 [DEBUG] clck_gen.py:128 IND CLOCK 1836
2025-03-30 06:29:34 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:29:34 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:29:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:29:34 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:29:34 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:29:34 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:29:34 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:29:34 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:29:34 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:29:34 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:29:34 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:29:34 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 06:29:34 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 06:29:34 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 06:29:34 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=1866 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:29:34 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=1866 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:29:34 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=1866 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:29:34 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=1866 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:29:34 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=1866 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:29:34 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=1866 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:29:39 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 06:29:39 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 06:29:39 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:29:39 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:29:39 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:29:39 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:29:39 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:29:39 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 06:29:39 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:29:39 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 06:29:39 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 06:29:39 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 06:29:39 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 06:29:39 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 06:29:39 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:29:39 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:29:39 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 06:29:39 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 06:29:39 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 06:29:39 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 06:29:39 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 06:29:39 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 06:29:39 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:29:39 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:29:39 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 06:29:39 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 06:29:39 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 06:29:39 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 06:29:39 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 06:29:39 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 06:29:39 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:29:39 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 06:29:39 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:29:39 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 06:29:39 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 06:29:39 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 06:29:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 06:29:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 06:29:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 06:29:39 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 06:29:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 06:29:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 06:29:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 06:29:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:29:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 06:29:39 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 06:29:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:29:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:29:39 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 06:29:39 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 06:29:39 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 06:29:39 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 06:29:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:29:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:29:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:29:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 06:29:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:29:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:29:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:29:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:29:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:29:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:29:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:29:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:29:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:29:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:29:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:29:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:29:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:29:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:29:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:29:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:29:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:29:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:29:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:29:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:29:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:29:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:29:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:29:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:29:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:29:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:29:39 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-03-30 06:29:39 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-03-30 06:29:39 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-03-30 06:29:39 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-03-30 06:29:39 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-03-30 06:29:39 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-03-30 06:29:39 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-03-30 06:29:39 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-03-30 06:29:39 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-03-30 06:29:39 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-03-30 06:29:39 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=105 tn=0 bl=148 pwr=0
2025-03-30 06:29:39 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=105 tn=1 bl=148 pwr=0
2025-03-30 06:29:39 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=105 tn=2 bl=148 pwr=0
2025-03-30 06:29:39 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=105 tn=3 bl=148 pwr=0
2025-03-30 06:29:39 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=105 tn=4 bl=148 pwr=0
2025-03-30 06:29:39 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=105 tn=5 bl=148 pwr=0
2025-03-30 06:29:39 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=105 tn=6 bl=148 pwr=0
2025-03-30 06:29:39 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=105 tn=7 bl=148 pwr=0
2025-03-30 06:29:39 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=106 tn=0 bl=148 pwr=0
2025-03-30 06:29:39 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=106 tn=1 bl=148 pwr=0
2025-03-30 06:29:39 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=106 tn=2 bl=148 pwr=0
2025-03-30 06:29:39 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=106 tn=3 bl=148 pwr=0
2025-03-30 06:29:39 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=106 tn=4 bl=148 pwr=0
2025-03-30 06:29:39 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=106 tn=5 bl=148 pwr=0
2025-03-30 06:29:39 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=106 tn=6 bl=148 pwr=0
2025-03-30 06:29:39 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=106 tn=7 bl=148 pwr=0
2025-03-30 06:29:39 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=107 tn=0 bl=148 pwr=0
2025-03-30 06:29:39 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=107 tn=1 bl=148 pwr=0
2025-03-30 06:29:39 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=107 tn=2 bl=148 pwr=0
2025-03-30 06:29:39 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=107 tn=3 bl=148 pwr=0
2025-03-30 06:29:39 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=107 tn=4 bl=148 pwr=0
2025-03-30 06:29:39 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=107 tn=5 bl=148 pwr=0
2025-03-30 06:29:39 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=107 tn=6 bl=148 pwr=0
2025-03-30 06:29:39 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=107 tn=7 bl=148 pwr=0
2025-03-30 06:29:39 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 06:29:39 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 06:29:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:29:39 [DEBUG] fake_trx.py:317 (BTS@172.18.26.20:5700) Recv FAKE_CI cmd
2025-03-30 06:29:39 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:29:39 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:29:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:29:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:29:39 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:29:39 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:29:39 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:29:39 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:29:40 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-03-30 06:29:40 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:29:40 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:29:40 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:29:40 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:29:40 [DEBUG] clck_gen.py:128 IND CLOCK 306
2025-03-30 06:29:41 [DEBUG] clck_gen.py:128 IND CLOCK 408
2025-03-30 06:29:41 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:29:41 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:29:41 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:29:41 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:29:41 [DEBUG] clck_gen.py:128 IND CLOCK 510
2025-03-30 06:29:42 [DEBUG] clck_gen.py:128 IND CLOCK 612
2025-03-30 06:29:42 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:29:42 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:29:42 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:29:42 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:29:42 [DEBUG] clck_gen.py:128 IND CLOCK 714
2025-03-30 06:29:42 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:29:42 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:29:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:29:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:29:43 [DEBUG] clck_gen.py:128 IND CLOCK 816
2025-03-30 06:29:43 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:29:43 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:29:43 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:29:43 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:29:43 [DEBUG] clck_gen.py:128 IND CLOCK 918
2025-03-30 06:29:44 [DEBUG] clck_gen.py:128 IND CLOCK 1020
2025-03-30 06:29:44 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:29:44 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:29:44 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:29:44 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:29:44 [DEBUG] clck_gen.py:128 IND CLOCK 1122
2025-03-30 06:29:44 [DEBUG] clck_gen.py:128 IND CLOCK 1224
2025-03-30 06:29:45 [DEBUG] clck_gen.py:128 IND CLOCK 1326
2025-03-30 06:29:45 [WARNING] transceiver.py:330 (MS@172.18.26.22:6700) Stale TRXD message (fn=1344): fn=1340 tn=7 pwr=0
2025-03-30 06:29:45 [WARNING] transceiver.py:330 (MS@172.18.26.22:6700) Stale TRXD message (fn=1344): fn=1341 tn=0 pwr=0
2025-03-30 06:29:45 [WARNING] transceiver.py:330 (MS@172.18.26.22:6700) Stale TRXD message (fn=1344): fn=1341 tn=1 pwr=0
2025-03-30 06:29:45 [WARNING] transceiver.py:330 (MS@172.18.26.22:6700) Stale TRXD message (fn=1344): fn=1341 tn=2 pwr=0
2025-03-30 06:29:45 [WARNING] transceiver.py:330 (MS@172.18.26.22:6700) Stale TRXD message (fn=1344): fn=1341 tn=3 pwr=0
2025-03-30 06:29:45 [WARNING] transceiver.py:330 (MS@172.18.26.22:6700) Stale TRXD message (fn=1344): fn=1341 tn=4 pwr=0
2025-03-30 06:29:45 [WARNING] transceiver.py:330 (MS@172.18.26.22:6700) Stale TRXD message (fn=1344): fn=1341 tn=5 pwr=0
2025-03-30 06:29:45 [WARNING] transceiver.py:330 (MS@172.18.26.22:6700) Stale TRXD message (fn=1344): fn=1341 tn=6 pwr=0
2025-03-30 06:29:45 [WARNING] transceiver.py:330 (MS@172.18.26.22:6700) Stale TRXD message (fn=1344): fn=1341 tn=7 pwr=0
2025-03-30 06:29:45 [WARNING] transceiver.py:330 (MS@172.18.26.22:6700) Stale TRXD message (fn=1344): fn=1342 tn=0 pwr=0
2025-03-30 06:29:45 [WARNING] transceiver.py:330 (MS@172.18.26.22:6700) Stale TRXD message (fn=1344): fn=1342 tn=1 pwr=0
2025-03-30 06:29:45 [WARNING] transceiver.py:330 (MS@172.18.26.22:6700) Stale TRXD message (fn=1344): fn=1342 tn=2 pwr=0
2025-03-30 06:29:45 [WARNING] transceiver.py:330 (MS@172.18.26.22:6700) Stale TRXD message (fn=1344): fn=1342 tn=3 pwr=0
2025-03-30 06:29:45 [WARNING] transceiver.py:330 (MS@172.18.26.22:6700) Stale TRXD message (fn=1344): fn=1342 tn=4 pwr=0
2025-03-30 06:29:45 [WARNING] transceiver.py:330 (MS@172.18.26.22:6700) Stale TRXD message (fn=1344): fn=1342 tn=5 pwr=0
2025-03-30 06:29:45 [WARNING] transceiver.py:330 (MS@172.18.26.22:6700) Stale TRXD message (fn=1344): fn=1342 tn=6 pwr=0
2025-03-30 06:29:45 [WARNING] transceiver.py:330 (MS@172.18.26.22:6700) Stale TRXD message (fn=1344): fn=1342 tn=7 pwr=0
2025-03-30 06:29:45 [WARNING] transceiver.py:330 (MS@172.18.26.22:6700) Stale TRXD message (fn=1344): fn=1343 tn=0 pwr=0
2025-03-30 06:29:45 [WARNING] transceiver.py:330 (MS@172.18.26.22:6700) Stale TRXD message (fn=1344): fn=1343 tn=1 pwr=0
2025-03-30 06:29:45 [WARNING] transceiver.py:330 (MS@172.18.26.22:6700) Stale TRXD message (fn=1344): fn=1343 tn=2 pwr=0
2025-03-30 06:29:45 [WARNING] transceiver.py:330 (MS@172.18.26.22:6700) Stale TRXD message (fn=1344): fn=1343 tn=3 pwr=0
2025-03-30 06:29:45 [WARNING] transceiver.py:330 (MS@172.18.26.22:6700) Stale TRXD message (fn=1344): fn=1343 tn=4 pwr=0
2025-03-30 06:29:45 [WARNING] transceiver.py:330 (MS@172.18.26.22:6700) Stale TRXD message (fn=1344): fn=1343 tn=5 pwr=0
2025-03-30 06:29:45 [WARNING] transceiver.py:330 (MS@172.18.26.22:6700) Stale TRXD message (fn=1344): fn=1343 tn=6 pwr=0
2025-03-30 06:29:45 [WARNING] transceiver.py:330 (MS@172.18.26.22:6700) Stale TRXD message (fn=1344): fn=1343 tn=7 pwr=0
2025-03-30 06:29:45 [DEBUG] clck_gen.py:128 IND CLOCK 1428
2025-03-30 06:29:46 [DEBUG] clck_gen.py:128 IND CLOCK 1530
2025-03-30 06:29:46 [DEBUG] clck_gen.py:128 IND CLOCK 1632
2025-03-30 06:29:47 [DEBUG] clck_gen.py:128 IND CLOCK 1734
2025-03-30 06:29:47 [DEBUG] clck_gen.py:128 IND CLOCK 1836
2025-03-30 06:29:47 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:29:47 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:29:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:29:47 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:29:47 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:29:47 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:29:47 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:29:47 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:29:47 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:29:47 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:29:47 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:29:47 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 06:29:47 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 06:29:47 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 06:29:52 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 06:29:52 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 06:29:52 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:29:52 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:29:52 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:29:52 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:29:52 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:29:52 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 06:29:52 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:29:52 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 06:29:52 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 06:29:52 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 06:29:52 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 06:29:52 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 06:29:52 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:29:52 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:29:52 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 06:29:52 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 06:29:52 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 06:29:52 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 06:29:52 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 06:29:52 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 06:29:52 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:29:52 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:29:52 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 06:29:52 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 06:29:52 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 06:29:52 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 06:29:52 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 06:29:52 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 06:29:52 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:29:52 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:29:52 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 06:29:52 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 06:29:52 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 06:29:52 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 06:29:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 06:29:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 06:29:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 06:29:52 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 06:29:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 06:29:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 06:29:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 06:29:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:29:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 06:29:52 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 06:29:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:29:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:29:52 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 06:29:52 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 06:29:52 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 06:29:52 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 06:29:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:29:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:29:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:29:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 06:29:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:29:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:29:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:29:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:29:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:29:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:29:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:29:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:29:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:29:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:29:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:29:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:29:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:29:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:29:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:29:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:29:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:29:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:29:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:29:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:29:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:29:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:29:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:29:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:29:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:29:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:29:52 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-03-30 06:29:53 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-03-30 06:29:53 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-03-30 06:29:53 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-03-30 06:29:53 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-03-30 06:29:53 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-03-30 06:29:53 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-03-30 06:29:53 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-03-30 06:29:53 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-03-30 06:29:53 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-03-30 06:29:53 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=0 bl=148 pwr=0
2025-03-30 06:29:53 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=1 bl=148 pwr=0
2025-03-30 06:29:53 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=2 bl=148 pwr=0
2025-03-30 06:29:53 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=3 bl=148 pwr=0
2025-03-30 06:29:53 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=4 bl=148 pwr=0
2025-03-30 06:29:53 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=5 bl=148 pwr=0
2025-03-30 06:29:53 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=6 bl=148 pwr=0
2025-03-30 06:29:53 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=7 bl=148 pwr=0
2025-03-30 06:29:53 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 06:29:53 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 06:29:53 [DEBUG] fake_trx.py:317 (BTS@172.18.26.20:5700) Recv FAKE_CI cmd
2025-03-30 06:29:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:29:53 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:29:53 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:29:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:29:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:29:53 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:29:53 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:29:53 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:29:53 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:29:53 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:29:53 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:29:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:29:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:29:53 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-03-30 06:29:53 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:29:53 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:29:53 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:29:53 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:29:54 [DEBUG] clck_gen.py:128 IND CLOCK 306
2025-03-30 06:29:54 [DEBUG] clck_gen.py:128 IND CLOCK 408
2025-03-30 06:29:54 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:29:54 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:29:54 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:29:54 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:29:55 [DEBUG] clck_gen.py:128 IND CLOCK 510
2025-03-30 06:29:55 [DEBUG] clck_gen.py:128 IND CLOCK 612
2025-03-30 06:29:55 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:29:55 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:29:55 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:29:55 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:29:56 [DEBUG] clck_gen.py:128 IND CLOCK 714
2025-03-30 06:29:56 [DEBUG] clck_gen.py:128 IND CLOCK 816
2025-03-30 06:29:56 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:29:56 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:29:56 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:29:56 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:29:57 [DEBUG] clck_gen.py:128 IND CLOCK 918
2025-03-30 06:29:57 [DEBUG] clck_gen.py:128 IND CLOCK 1020
2025-03-30 06:29:57 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:29:57 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:29:57 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:29:57 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:29:58 [DEBUG] clck_gen.py:128 IND CLOCK 1122
2025-03-30 06:29:58 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:29:58 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:29:58 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:29:58 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:29:58 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:29:58 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:29:58 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:29:58 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:29:58 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:29:58 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:29:58 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 06:29:58 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 06:29:58 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 06:30:03 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 06:30:03 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 06:30:03 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:30:03 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:30:03 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:30:03 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:30:03 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:30:03 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 06:30:03 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:30:03 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 06:30:03 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 06:30:03 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 06:30:03 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 06:30:03 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 06:30:03 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:30:03 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:30:03 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 06:30:03 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 06:30:03 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 06:30:03 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 06:30:03 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 06:30:03 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 06:30:03 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:30:03 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:30:03 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 06:30:03 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 06:30:03 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 06:30:03 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 06:30:03 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 06:30:03 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 06:30:03 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:30:03 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:30:03 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 06:30:03 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 06:30:03 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 06:30:03 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 06:30:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 06:30:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 06:30:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 06:30:03 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 06:30:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 06:30:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 06:30:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 06:30:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:30:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 06:30:03 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 06:30:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:30:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:30:03 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 06:30:03 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 06:30:03 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 06:30:03 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 06:30:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:30:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:30:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:30:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 06:30:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:30:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:30:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:30:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:30:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:30:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:30:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:30:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:30:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:30:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:30:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:30:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:30:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:30:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:30:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:30:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:30:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:30:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:30:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:30:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:30:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:30:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:30:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:30:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:30:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:30:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:30:03 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-03-30 06:30:04 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-03-30 06:30:04 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-03-30 06:30:04 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-03-30 06:30:04 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-03-30 06:30:04 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-03-30 06:30:04 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-03-30 06:30:04 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-03-30 06:30:04 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-03-30 06:30:04 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-03-30 06:30:04 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=0 bl=148 pwr=0
2025-03-30 06:30:04 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=1 bl=148 pwr=0
2025-03-30 06:30:04 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=2 bl=148 pwr=0
2025-03-30 06:30:04 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=3 bl=148 pwr=0
2025-03-30 06:30:04 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=4 bl=148 pwr=0
2025-03-30 06:30:04 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=5 bl=148 pwr=0
2025-03-30 06:30:04 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=6 bl=148 pwr=0
2025-03-30 06:30:04 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=7 bl=148 pwr=0
2025-03-30 06:30:04 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 06:30:04 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 06:30:04 [DEBUG] fake_trx.py:317 (BTS@172.18.26.20:5700) Recv FAKE_CI cmd
2025-03-30 06:30:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:30:04 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:30:04 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:30:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:30:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:30:04 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:30:04 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:30:04 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:30:04 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:30:04 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-03-30 06:30:04 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:30:04 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:30:04 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:30:04 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:30:04 [DEBUG] clck_gen.py:128 IND CLOCK 306
2025-03-30 06:30:05 [DEBUG] clck_gen.py:128 IND CLOCK 408
2025-03-30 06:30:05 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:30:05 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:30:05 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:30:05 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:30:05 [DEBUG] clck_gen.py:128 IND CLOCK 510
2025-03-30 06:30:06 [DEBUG] clck_gen.py:128 IND CLOCK 612
2025-03-30 06:30:06 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:30:06 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:30:06 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:30:06 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:30:06 [DEBUG] clck_gen.py:128 IND CLOCK 714
2025-03-30 06:30:07 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:30:07 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:30:07 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:30:07 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:30:07 [DEBUG] clck_gen.py:128 IND CLOCK 816
2025-03-30 06:30:07 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:30:07 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:30:07 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:30:07 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:30:07 [DEBUG] clck_gen.py:128 IND CLOCK 918
2025-03-30 06:30:08 [DEBUG] clck_gen.py:128 IND CLOCK 1020
2025-03-30 06:30:08 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:30:08 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:30:08 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:30:08 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:30:08 [DEBUG] clck_gen.py:128 IND CLOCK 1122
2025-03-30 06:30:09 [DEBUG] clck_gen.py:128 IND CLOCK 1224
2025-03-30 06:30:09 [DEBUG] clck_gen.py:128 IND CLOCK 1326
2025-03-30 06:30:09 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:30:09 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:30:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:30:09 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:30:09 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:30:09 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:30:09 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:30:09 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:30:09 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:30:09 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:30:09 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:30:09 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 06:30:09 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 06:30:09 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 06:30:09 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=1342 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:30:09 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=1342 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:30:09 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=1342 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:30:09 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=1342 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:30:09 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=1342 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:30:09 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=1342 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:30:09 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=1343 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:30:09 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=1343 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:30:09 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=1343 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:30:09 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=1343 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:30:09 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=1343 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:30:09 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=1343 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:30:09 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=1343 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:30:09 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=1343 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:30:09 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=1344 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:30:09 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=1344 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:30:09 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=1344 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:30:09 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=1344 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:30:09 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=1344 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:30:09 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=1344 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:30:09 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=1344 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:30:09 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=1344 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:30:14 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 06:30:14 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 06:30:14 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:30:14 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:30:14 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:30:14 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:30:14 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:30:14 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 06:30:14 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:30:14 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 06:30:14 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 06:30:14 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 06:30:14 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 06:30:14 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 06:30:14 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:30:14 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:30:14 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 06:30:14 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 06:30:14 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 06:30:14 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 06:30:14 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 06:30:14 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 06:30:14 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:30:14 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:30:14 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 06:30:14 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 06:30:14 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 06:30:14 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 06:30:14 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 06:30:14 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 06:30:14 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:30:14 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:30:14 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 06:30:14 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 06:30:14 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 06:30:14 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 06:30:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 06:30:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 06:30:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 06:30:14 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 06:30:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 06:30:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 06:30:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 06:30:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:30:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 06:30:14 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 06:30:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:30:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:30:14 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 06:30:14 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 06:30:14 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 06:30:14 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 06:30:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:30:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:30:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:30:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 06:30:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:30:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:30:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:30:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:30:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:30:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:30:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:30:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:30:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:30:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:30:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:30:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:30:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:30:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:30:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:30:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:30:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:30:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:30:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:30:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:30:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:30:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:30:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:30:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:30:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:30:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:30:14 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-03-30 06:30:15 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-03-30 06:30:15 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-03-30 06:30:15 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-03-30 06:30:15 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-03-30 06:30:15 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-03-30 06:30:15 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-03-30 06:30:15 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-03-30 06:30:15 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-03-30 06:30:15 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-03-30 06:30:15 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=105 tn=0 bl=148 pwr=0
2025-03-30 06:30:15 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=105 tn=1 bl=148 pwr=0
2025-03-30 06:30:15 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=105 tn=2 bl=148 pwr=0
2025-03-30 06:30:15 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=105 tn=3 bl=148 pwr=0
2025-03-30 06:30:15 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=105 tn=4 bl=148 pwr=0
2025-03-30 06:30:15 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=105 tn=5 bl=148 pwr=0
2025-03-30 06:30:15 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=105 tn=6 bl=148 pwr=0
2025-03-30 06:30:15 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=105 tn=7 bl=148 pwr=0
2025-03-30 06:30:15 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=106 tn=0 bl=148 pwr=0
2025-03-30 06:30:15 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=106 tn=1 bl=148 pwr=0
2025-03-30 06:30:15 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=106 tn=2 bl=148 pwr=0
2025-03-30 06:30:15 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=106 tn=3 bl=148 pwr=0
2025-03-30 06:30:15 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=106 tn=4 bl=148 pwr=0
2025-03-30 06:30:15 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=106 tn=5 bl=148 pwr=0
2025-03-30 06:30:15 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=106 tn=6 bl=148 pwr=0
2025-03-30 06:30:15 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=106 tn=7 bl=148 pwr=0
2025-03-30 06:30:15 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=107 tn=0 bl=148 pwr=0
2025-03-30 06:30:15 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=107 tn=1 bl=148 pwr=0
2025-03-30 06:30:15 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=107 tn=2 bl=148 pwr=0
2025-03-30 06:30:15 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=107 tn=3 bl=148 pwr=0
2025-03-30 06:30:15 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=107 tn=4 bl=148 pwr=0
2025-03-30 06:30:15 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=107 tn=5 bl=148 pwr=0
2025-03-30 06:30:15 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=107 tn=6 bl=148 pwr=0
2025-03-30 06:30:15 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=107 tn=7 bl=148 pwr=0
2025-03-30 06:30:15 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 06:30:15 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 06:30:15 [DEBUG] fake_trx.py:317 (BTS@172.18.26.20:5700) Recv FAKE_CI cmd
2025-03-30 06:30:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:30:15 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:30:15 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:30:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:30:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:30:15 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:30:15 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:30:15 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:30:15 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:30:15 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-03-30 06:30:15 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:30:15 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:30:15 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:30:15 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:30:16 [DEBUG] clck_gen.py:128 IND CLOCK 306
2025-03-30 06:30:16 [DEBUG] clck_gen.py:128 IND CLOCK 408
2025-03-30 06:30:16 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:30:16 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:30:16 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:30:16 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:30:17 [DEBUG] clck_gen.py:128 IND CLOCK 510
2025-03-30 06:30:17 [DEBUG] clck_gen.py:128 IND CLOCK 612
2025-03-30 06:30:17 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:30:17 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:30:17 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:30:17 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:30:18 [DEBUG] clck_gen.py:128 IND CLOCK 714
2025-03-30 06:30:18 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:30:18 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:30:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:30:18 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:30:18 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:30:18 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:30:18 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:30:18 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:30:18 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:30:18 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:30:18 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:30:18 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 06:30:18 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 06:30:18 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 06:30:23 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 06:30:23 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 06:30:23 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:30:23 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:30:23 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:30:23 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:30:23 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:30:23 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 06:30:23 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:30:23 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 06:30:23 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 06:30:23 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 06:30:23 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 06:30:23 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 06:30:23 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:30:23 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:30:23 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 06:30:23 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 06:30:23 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 06:30:23 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 06:30:23 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 06:30:23 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 06:30:23 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:30:23 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:30:23 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 06:30:23 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 06:30:23 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 06:30:23 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 06:30:23 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 06:30:23 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 06:30:23 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:30:23 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:30:23 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 06:30:23 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 06:30:23 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 06:30:23 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 06:30:23 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 06:30:23 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 06:30:23 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 06:30:23 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 06:30:23 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 06:30:23 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 06:30:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 06:30:23 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:30:23 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 06:30:23 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 06:30:23 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:30:23 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:30:23 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 06:30:23 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 06:30:23 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 06:30:23 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 06:30:23 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:30:23 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:30:23 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:30:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 06:30:23 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:30:23 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:30:23 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:30:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:30:23 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:30:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:30:23 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:30:23 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:30:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:30:23 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:30:23 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:30:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:30:23 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:30:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:30:23 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:30:23 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:30:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:30:23 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:30:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:30:23 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:30:23 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:30:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:30:23 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:30:23 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:30:23 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:30:23 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:30:23 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-03-30 06:30:23 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-03-30 06:30:23 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-03-30 06:30:23 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-03-30 06:30:23 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-03-30 06:30:23 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-03-30 06:30:23 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-03-30 06:30:23 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-03-30 06:30:23 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-03-30 06:30:23 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-03-30 06:30:23 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=0 bl=148 pwr=0
2025-03-30 06:30:23 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=1 bl=148 pwr=0
2025-03-30 06:30:23 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=2 bl=148 pwr=0
2025-03-30 06:30:23 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=3 bl=148 pwr=0
2025-03-30 06:30:23 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=4 bl=148 pwr=0
2025-03-30 06:30:23 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=5 bl=148 pwr=0
2025-03-30 06:30:23 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=6 bl=148 pwr=0
2025-03-30 06:30:23 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=7 bl=148 pwr=0
2025-03-30 06:30:23 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 06:30:23 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 06:30:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:30:23 [DEBUG] fake_trx.py:317 (BTS@172.18.26.20:5700) Recv FAKE_CI cmd
2025-03-30 06:30:23 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:30:23 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:30:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:30:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:30:23 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:30:23 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:30:23 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:30:23 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:30:24 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-03-30 06:30:24 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:30:24 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:30:24 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:30:24 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:30:24 [DEBUG] clck_gen.py:128 IND CLOCK 306
2025-03-30 06:30:25 [DEBUG] clck_gen.py:128 IND CLOCK 408
2025-03-30 06:30:25 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:30:25 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:30:25 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:30:25 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:30:25 [DEBUG] clck_gen.py:128 IND CLOCK 510
2025-03-30 06:30:26 [DEBUG] clck_gen.py:128 IND CLOCK 612
2025-03-30 06:30:26 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:30:26 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:30:26 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:30:26 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:30:26 [DEBUG] clck_gen.py:128 IND CLOCK 714
2025-03-30 06:30:27 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:30:27 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:30:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:30:27 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:30:27 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:30:27 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:30:27 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:30:27 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:30:27 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:30:27 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:30:27 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 06:30:27 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 06:30:27 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 06:30:27 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:30:32 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 06:30:32 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 06:30:32 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:30:32 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:30:32 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:30:32 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:30:32 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:30:32 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 06:30:32 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:30:32 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 06:30:32 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 06:30:32 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 06:30:32 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 06:30:32 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 06:30:32 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:30:32 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:30:32 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 06:30:32 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 06:30:32 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 06:30:32 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 06:30:32 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 06:30:32 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 06:30:32 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:30:32 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:30:32 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 06:30:32 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 06:30:32 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 06:30:32 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 06:30:32 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 06:30:32 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 06:30:32 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:30:32 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:30:32 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 06:30:32 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 06:30:32 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 06:30:32 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 06:30:32 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 06:30:32 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 06:30:32 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 06:30:32 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 06:30:32 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 06:30:32 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 06:30:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 06:30:32 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:30:32 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 06:30:32 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 06:30:32 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:30:32 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:30:32 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 06:30:32 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 06:30:32 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 06:30:32 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 06:30:32 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:30:32 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:30:32 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:30:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 06:30:32 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:30:32 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:30:32 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:30:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:30:32 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:30:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:30:32 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:30:32 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:30:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:30:32 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:30:32 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:30:32 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:30:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:30:32 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:30:32 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:30:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:30:32 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:30:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:30:32 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:30:32 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:30:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:30:32 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:30:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:30:32 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:30:32 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:30:32 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:30:32 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-03-30 06:30:32 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-03-30 06:30:32 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-03-30 06:30:32 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-03-30 06:30:32 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-03-30 06:30:32 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-03-30 06:30:32 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-03-30 06:30:32 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-03-30 06:30:32 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-03-30 06:30:32 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-03-30 06:30:32 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=105 tn=0 bl=148 pwr=0
2025-03-30 06:30:32 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=105 tn=1 bl=148 pwr=0
2025-03-30 06:30:32 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=105 tn=2 bl=148 pwr=0
2025-03-30 06:30:32 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=105 tn=3 bl=148 pwr=0
2025-03-30 06:30:32 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=105 tn=4 bl=148 pwr=0
2025-03-30 06:30:32 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=105 tn=5 bl=148 pwr=0
2025-03-30 06:30:32 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=105 tn=6 bl=148 pwr=0
2025-03-30 06:30:32 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=105 tn=7 bl=148 pwr=0
2025-03-30 06:30:32 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=106 tn=0 bl=148 pwr=0
2025-03-30 06:30:32 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=106 tn=1 bl=148 pwr=0
2025-03-30 06:30:32 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=106 tn=2 bl=148 pwr=0
2025-03-30 06:30:32 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=106 tn=3 bl=148 pwr=0
2025-03-30 06:30:32 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=106 tn=4 bl=148 pwr=0
2025-03-30 06:30:32 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=106 tn=5 bl=148 pwr=0
2025-03-30 06:30:32 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=106 tn=6 bl=148 pwr=0
2025-03-30 06:30:32 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=106 tn=7 bl=148 pwr=0
2025-03-30 06:30:32 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=107 tn=0 bl=148 pwr=0
2025-03-30 06:30:32 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=107 tn=1 bl=148 pwr=0
2025-03-30 06:30:32 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=107 tn=2 bl=148 pwr=0
2025-03-30 06:30:32 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=107 tn=3 bl=148 pwr=0
2025-03-30 06:30:32 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=107 tn=4 bl=148 pwr=0
2025-03-30 06:30:32 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=107 tn=5 bl=148 pwr=0
2025-03-30 06:30:32 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=107 tn=6 bl=148 pwr=0
2025-03-30 06:30:32 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=107 tn=7 bl=148 pwr=0
2025-03-30 06:30:32 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 06:30:32 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 06:30:32 [DEBUG] fake_trx.py:317 (BTS@172.18.26.20:5700) Recv FAKE_CI cmd
2025-03-30 06:30:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:30:32 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:30:32 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:30:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:30:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:30:32 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:30:32 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:30:32 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:30:32 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:30:32 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:30:32 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:30:32 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:30:32 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:30:32 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:30:32 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:30:32 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:30:32 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:30:32 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:30:32 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:30:32 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 06:30:32 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 06:30:32 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 06:30:37 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 06:30:37 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 06:30:37 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:30:37 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:30:37 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:30:37 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:30:37 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:30:37 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 06:30:37 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:30:37 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 06:30:37 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 06:30:37 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 06:30:37 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 06:30:37 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 06:30:37 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:30:37 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:30:37 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 06:30:37 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 06:30:37 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 06:30:37 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 06:30:37 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 06:30:37 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 06:30:37 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:30:37 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:30:37 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 06:30:37 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 06:30:37 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 06:30:37 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 06:30:37 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 06:30:37 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 06:30:37 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:30:37 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:30:37 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 06:30:37 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 06:30:37 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 06:30:37 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 06:30:37 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 06:30:37 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 06:30:37 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 06:30:37 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 06:30:37 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 06:30:37 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 06:30:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 06:30:37 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:30:37 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 06:30:37 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 06:30:37 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:30:37 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:30:37 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 06:30:37 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 06:30:37 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 06:30:37 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 06:30:37 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:30:37 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:30:37 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:30:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 06:30:37 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:30:37 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:30:37 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:30:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:30:37 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:30:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:30:37 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:30:37 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:30:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:30:37 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:30:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:30:37 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:30:37 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:30:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:30:37 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:30:37 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:30:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:30:37 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:30:37 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:30:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:30:37 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:30:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:30:37 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:30:37 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:30:37 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:30:37 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:30:37 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-03-30 06:30:38 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-03-30 06:30:38 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-03-30 06:30:38 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-03-30 06:30:38 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-03-30 06:30:38 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-03-30 06:30:38 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-03-30 06:30:38 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-03-30 06:30:38 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-03-30 06:30:38 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-03-30 06:30:38 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=0 bl=148 pwr=0
2025-03-30 06:30:38 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=1 bl=148 pwr=0
2025-03-30 06:30:38 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=2 bl=148 pwr=0
2025-03-30 06:30:38 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=3 bl=148 pwr=0
2025-03-30 06:30:38 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=4 bl=148 pwr=0
2025-03-30 06:30:38 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=5 bl=148 pwr=0
2025-03-30 06:30:38 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=6 bl=148 pwr=0
2025-03-30 06:30:38 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=7 bl=148 pwr=0
2025-03-30 06:30:38 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 06:30:38 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 06:30:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:30:38 [DEBUG] fake_trx.py:317 (BTS@172.18.26.20:5700) Recv FAKE_CI cmd
2025-03-30 06:30:38 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:30:38 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:30:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:30:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:30:38 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:30:38 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:30:38 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:30:38 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:30:38 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:30:38 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:30:38 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:30:38 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:30:38 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:30:38 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:30:38 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:30:38 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:30:38 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:30:38 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:30:38 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 06:30:38 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 06:30:38 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 06:30:43 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 06:30:43 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 06:30:43 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:30:43 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:30:43 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:30:43 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:30:43 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:30:43 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 06:30:43 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:30:43 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 06:30:43 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 06:30:43 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 06:30:43 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 06:30:43 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 06:30:43 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:30:43 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:30:43 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 06:30:43 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 06:30:43 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 06:30:43 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 06:30:43 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 06:30:43 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 06:30:43 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:30:43 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:30:43 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 06:30:43 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 06:30:43 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 06:30:43 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 06:30:43 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 06:30:43 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 06:30:43 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:30:43 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 06:30:43 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:30:43 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 06:30:43 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 06:30:43 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 06:30:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 06:30:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 06:30:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 06:30:43 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 06:30:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 06:30:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 06:30:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 06:30:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:30:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 06:30:43 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 06:30:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:30:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:30:43 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 06:30:43 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 06:30:43 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 06:30:43 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 06:30:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:30:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:30:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:30:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 06:30:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:30:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:30:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:30:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:30:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:30:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:30:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:30:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:30:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:30:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:30:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:30:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:30:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:30:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:30:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:30:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:30:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:30:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:30:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:30:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:30:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:30:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:30:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:30:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:30:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:30:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:30:43 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-03-30 06:30:44 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-03-30 06:30:44 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=107): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-03-30 06:30:44 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=107): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-03-30 06:30:44 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=107): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-03-30 06:30:44 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=107): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-03-30 06:30:44 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=107): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-03-30 06:30:44 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=107): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-03-30 06:30:44 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=107): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-03-30 06:30:44 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=107): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-03-30 06:30:44 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=107): ver=1 fn=105 tn=0 bl=148 pwr=0
2025-03-30 06:30:44 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=107): ver=1 fn=105 tn=1 bl=148 pwr=0
2025-03-30 06:30:44 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=107): ver=1 fn=105 tn=2 bl=148 pwr=0
2025-03-30 06:30:44 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=107): ver=1 fn=105 tn=3 bl=148 pwr=0
2025-03-30 06:30:44 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=107): ver=1 fn=105 tn=4 bl=148 pwr=0
2025-03-30 06:30:44 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=107): ver=1 fn=105 tn=5 bl=148 pwr=0
2025-03-30 06:30:44 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=107): ver=1 fn=105 tn=6 bl=148 pwr=0
2025-03-30 06:30:44 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=107): ver=1 fn=105 tn=7 bl=148 pwr=0
2025-03-30 06:30:44 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=107): ver=1 fn=106 tn=0 bl=148 pwr=0
2025-03-30 06:30:44 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=107): ver=1 fn=106 tn=1 bl=148 pwr=0
2025-03-30 06:30:44 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=107): ver=1 fn=106 tn=2 bl=148 pwr=0
2025-03-30 06:30:44 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=107): ver=1 fn=106 tn=3 bl=148 pwr=0
2025-03-30 06:30:44 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=107): ver=1 fn=106 tn=4 bl=148 pwr=0
2025-03-30 06:30:44 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=107): ver=1 fn=106 tn=5 bl=148 pwr=0
2025-03-30 06:30:44 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=107): ver=1 fn=106 tn=6 bl=148 pwr=0
2025-03-30 06:30:44 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=107): ver=1 fn=106 tn=7 bl=148 pwr=0
2025-03-30 06:30:44 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 06:30:44 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 06:30:44 [DEBUG] fake_trx.py:317 (BTS@172.18.26.20:5700) Recv FAKE_CI cmd
2025-03-30 06:30:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:30:44 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:30:44 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:30:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:30:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:30:44 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:30:44 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:30:44 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:30:44 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:30:44 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-03-30 06:30:44 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:30:44 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:30:44 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:30:44 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:30:45 [DEBUG] clck_gen.py:128 IND CLOCK 306
2025-03-30 06:30:45 [DEBUG] clck_gen.py:128 IND CLOCK 408
2025-03-30 06:30:45 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:30:45 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:30:45 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:30:45 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:30:46 [DEBUG] clck_gen.py:128 IND CLOCK 510
2025-03-30 06:30:46 [DEBUG] clck_gen.py:128 IND CLOCK 612
2025-03-30 06:30:46 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:30:46 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:30:46 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:30:46 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:30:47 [DEBUG] clck_gen.py:128 IND CLOCK 714
2025-03-30 06:30:47 [DEBUG] clck_gen.py:128 IND CLOCK 816
2025-03-30 06:30:47 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:30:47 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:30:47 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:30:47 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:30:47 [DEBUG] clck_gen.py:128 IND CLOCK 918
2025-03-30 06:30:48 [DEBUG] clck_gen.py:128 IND CLOCK 1020
2025-03-30 06:30:48 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:30:48 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:30:48 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:30:48 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:30:48 [DEBUG] clck_gen.py:128 IND CLOCK 1122
2025-03-30 06:30:49 [DEBUG] clck_gen.py:128 IND CLOCK 1224
2025-03-30 06:30:49 [DEBUG] clck_gen.py:128 IND CLOCK 1326
2025-03-30 06:30:50 [DEBUG] clck_gen.py:128 IND CLOCK 1428
2025-03-30 06:30:50 [DEBUG] clck_gen.py:128 IND CLOCK 1530
2025-03-30 06:30:51 [DEBUG] clck_gen.py:128 IND CLOCK 1632
2025-03-30 06:30:51 [DEBUG] clck_gen.py:128 IND CLOCK 1734
2025-03-30 06:30:52 [DEBUG] clck_gen.py:128 IND CLOCK 1836
2025-03-30 06:30:52 [DEBUG] clck_gen.py:128 IND CLOCK 1938
2025-03-30 06:30:53 [DEBUG] clck_gen.py:128 IND CLOCK 2040
2025-03-30 06:30:53 [DEBUG] clck_gen.py:128 IND CLOCK 2142
2025-03-30 06:30:54 [DEBUG] clck_gen.py:128 IND CLOCK 2244
2025-03-30 06:30:54 [DEBUG] clck_gen.py:128 IND CLOCK 2346
2025-03-30 06:30:54 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=2421): ver=1 fn=2420 tn=0 bl=148 pwr=0
2025-03-30 06:30:54 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=2421): ver=1 fn=2420 tn=1 bl=148 pwr=0
2025-03-30 06:30:54 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=2421): ver=1 fn=2420 tn=2 bl=148 pwr=0
2025-03-30 06:30:54 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=2421): ver=1 fn=2420 tn=3 bl=148 pwr=0
2025-03-30 06:30:54 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=2421): ver=1 fn=2420 tn=4 bl=148 pwr=0
2025-03-30 06:30:54 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=2421): ver=1 fn=2420 tn=5 bl=148 pwr=0
2025-03-30 06:30:54 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=2421): ver=1 fn=2420 tn=6 bl=148 pwr=0
2025-03-30 06:30:54 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=2421): ver=1 fn=2420 tn=7 bl=148 pwr=0
2025-03-30 06:30:55 [DEBUG] clck_gen.py:128 IND CLOCK 2448
2025-03-30 06:30:55 [DEBUG] clck_gen.py:128 IND CLOCK 2550
2025-03-30 06:30:55 [DEBUG] clck_gen.py:128 IND CLOCK 2652
2025-03-30 06:30:56 [DEBUG] clck_gen.py:128 IND CLOCK 2754
2025-03-30 06:30:56 [DEBUG] clck_gen.py:128 IND CLOCK 2856
2025-03-30 06:30:57 [DEBUG] clck_gen.py:128 IND CLOCK 2958
2025-03-30 06:30:57 [DEBUG] clck_gen.py:128 IND CLOCK 3060
2025-03-30 06:30:58 [DEBUG] clck_gen.py:128 IND CLOCK 3162
2025-03-30 06:30:58 [DEBUG] clck_gen.py:128 IND CLOCK 3264
2025-03-30 06:30:59 [DEBUG] clck_gen.py:128 IND CLOCK 3366
2025-03-30 06:30:59 [DEBUG] clck_gen.py:128 IND CLOCK 3468
2025-03-30 06:31:00 [DEBUG] clck_gen.py:128 IND CLOCK 3570
2025-03-30 06:31:00 [DEBUG] clck_gen.py:128 IND CLOCK 3672
2025-03-30 06:31:01 [DEBUG] clck_gen.py:128 IND CLOCK 3774
2025-03-30 06:31:01 [DEBUG] clck_gen.py:128 IND CLOCK 3876
2025-03-30 06:31:02 [DEBUG] clck_gen.py:128 IND CLOCK 3978
2025-03-30 06:31:02 [DEBUG] clck_gen.py:128 IND CLOCK 4080
2025-03-30 06:31:03 [DEBUG] clck_gen.py:128 IND CLOCK 4182
2025-03-30 06:31:03 [DEBUG] clck_gen.py:128 IND CLOCK 4284
2025-03-30 06:31:03 [DEBUG] clck_gen.py:128 IND CLOCK 4386
2025-03-30 06:31:04 [DEBUG] clck_gen.py:128 IND CLOCK 4488
2025-03-30 06:31:04 [DEBUG] clck_gen.py:128 IND CLOCK 4590
2025-03-30 06:31:05 [DEBUG] clck_gen.py:128 IND CLOCK 4692
2025-03-30 06:31:05 [DEBUG] clck_gen.py:128 IND CLOCK 4794
2025-03-30 06:31:06 [DEBUG] clck_gen.py:128 IND CLOCK 4896
2025-03-30 06:31:06 [DEBUG] clck_gen.py:128 IND CLOCK 4998
2025-03-30 06:31:07 [DEBUG] clck_gen.py:128 IND CLOCK 5100
2025-03-30 06:31:07 [DEBUG] clck_gen.py:128 IND CLOCK 5202
2025-03-30 06:31:07 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:31:07 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:31:07 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:31:07 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:31:07 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:31:07 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:31:07 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:31:07 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:31:07 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:31:07 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:31:07 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 06:31:07 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 06:31:07 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 06:31:07 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=5223 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:31:07 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=5223 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:31:12 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 06:31:12 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 06:31:12 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:31:12 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:31:12 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:31:12 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:31:12 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:31:12 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 06:31:12 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:31:12 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 06:31:12 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 06:31:12 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 06:31:12 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 06:31:12 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 06:31:12 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:31:12 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 06:31:12 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 06:31:12 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 06:31:12 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:31:12 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 06:31:12 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 06:31:12 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 06:31:12 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:31:12 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 06:31:12 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:31:12 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 06:31:12 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 06:31:12 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 06:31:12 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 06:31:12 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 06:31:12 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:31:12 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 06:31:12 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:31:12 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 06:31:12 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 06:31:12 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 06:31:12 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 06:31:12 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 06:31:12 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 06:31:12 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 06:31:12 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 06:31:12 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 06:31:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 06:31:12 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:31:12 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 06:31:12 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 06:31:12 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:31:12 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:31:12 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 06:31:12 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 06:31:12 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 06:31:12 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 06:31:12 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:31:12 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:31:12 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:31:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 06:31:12 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:31:12 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:31:12 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:31:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:31:12 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:31:12 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:31:12 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:31:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:31:12 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:31:12 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:31:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:31:12 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:31:12 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:31:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:31:12 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:31:12 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:31:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:31:12 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:31:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:31:12 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:31:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:31:12 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:31:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:31:12 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:31:12 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:31:12 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:31:12 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-03-30 06:31:13 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-03-30 06:31:13 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-03-30 06:31:13 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-03-30 06:31:13 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-03-30 06:31:13 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-03-30 06:31:13 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-03-30 06:31:13 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-03-30 06:31:13 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-03-30 06:31:13 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-03-30 06:31:13 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=0 bl=148 pwr=0
2025-03-30 06:31:13 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=1 bl=148 pwr=0
2025-03-30 06:31:13 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=2 bl=148 pwr=0
2025-03-30 06:31:13 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=3 bl=148 pwr=0
2025-03-30 06:31:13 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=4 bl=148 pwr=0
2025-03-30 06:31:13 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=5 bl=148 pwr=0
2025-03-30 06:31:13 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=6 bl=148 pwr=0
2025-03-30 06:31:13 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=7 bl=148 pwr=0
2025-03-30 06:31:13 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 06:31:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:31:13 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 06:31:13 [DEBUG] fake_trx.py:317 (BTS@172.18.26.20:5700) Recv FAKE_CI cmd
2025-03-30 06:31:13 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:31:13 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:31:13 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:31:13 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:31:13 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:31:13 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:31:13 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:31:13 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:31:13 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-03-30 06:31:13 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:31:13 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:31:13 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:31:13 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:31:14 [DEBUG] clck_gen.py:128 IND CLOCK 306
2025-03-30 06:31:14 [DEBUG] clck_gen.py:128 IND CLOCK 408
2025-03-30 06:31:14 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:31:14 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:31:14 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:31:14 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:31:15 [DEBUG] clck_gen.py:128 IND CLOCK 510
2025-03-30 06:31:15 [DEBUG] clck_gen.py:128 IND CLOCK 612
2025-03-30 06:31:15 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:31:15 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:31:15 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:31:15 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:31:16 [DEBUG] clck_gen.py:128 IND CLOCK 714
2025-03-30 06:31:16 [DEBUG] clck_gen.py:128 IND CLOCK 816
2025-03-30 06:31:16 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:31:16 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:31:16 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:31:16 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:31:17 [DEBUG] clck_gen.py:128 IND CLOCK 918
2025-03-30 06:31:17 [DEBUG] clck_gen.py:128 IND CLOCK 1020
2025-03-30 06:31:17 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:31:17 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:31:17 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:31:17 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:31:18 [DEBUG] clck_gen.py:128 IND CLOCK 1122
2025-03-30 06:31:18 [DEBUG] clck_gen.py:128 IND CLOCK 1224
2025-03-30 06:31:18 [DEBUG] clck_gen.py:128 IND CLOCK 1326
2025-03-30 06:31:19 [DEBUG] clck_gen.py:128 IND CLOCK 1428
2025-03-30 06:31:19 [DEBUG] clck_gen.py:128 IND CLOCK 1530
2025-03-30 06:31:20 [DEBUG] clck_gen.py:128 IND CLOCK 1632
2025-03-30 06:31:20 [DEBUG] clck_gen.py:128 IND CLOCK 1734
2025-03-30 06:31:21 [DEBUG] clck_gen.py:128 IND CLOCK 1836
2025-03-30 06:31:21 [DEBUG] clck_gen.py:128 IND CLOCK 1938
2025-03-30 06:31:22 [DEBUG] clck_gen.py:128 IND CLOCK 2040
2025-03-30 06:31:22 [DEBUG] clck_gen.py:128 IND CLOCK 2142
2025-03-30 06:31:23 [DEBUG] clck_gen.py:128 IND CLOCK 2244
2025-03-30 06:31:23 [DEBUG] clck_gen.py:128 IND CLOCK 2346
2025-03-30 06:31:24 [DEBUG] clck_gen.py:128 IND CLOCK 2448
2025-03-30 06:31:24 [DEBUG] clck_gen.py:128 IND CLOCK 2550
2025-03-30 06:31:25 [DEBUG] clck_gen.py:128 IND CLOCK 2652
2025-03-30 06:31:25 [DEBUG] clck_gen.py:128 IND CLOCK 2754
2025-03-30 06:31:26 [DEBUG] clck_gen.py:128 IND CLOCK 2856
2025-03-30 06:31:26 [DEBUG] clck_gen.py:128 IND CLOCK 2958
2025-03-30 06:31:26 [DEBUG] clck_gen.py:128 IND CLOCK 3060
2025-03-30 06:31:27 [DEBUG] clck_gen.py:128 IND CLOCK 3162
2025-03-30 06:31:27 [DEBUG] clck_gen.py:128 IND CLOCK 3264
2025-03-30 06:31:28 [DEBUG] clck_gen.py:128 IND CLOCK 3366
2025-03-30 06:31:28 [DEBUG] clck_gen.py:128 IND CLOCK 3468
2025-03-30 06:31:29 [DEBUG] clck_gen.py:128 IND CLOCK 3570
2025-03-30 06:31:29 [DEBUG] clck_gen.py:128 IND CLOCK 3672
2025-03-30 06:31:30 [DEBUG] clck_gen.py:128 IND CLOCK 3774
2025-03-30 06:31:30 [DEBUG] clck_gen.py:128 IND CLOCK 3876
2025-03-30 06:31:31 [DEBUG] clck_gen.py:128 IND CLOCK 3978
2025-03-30 06:31:31 [WARNING] clck_gen.py:108 CLCKGen: time overrun by -12487us; resetting the clock
2025-03-30 06:31:31 [DEBUG] clck_gen.py:128 IND CLOCK 4080
2025-03-30 06:31:32 [DEBUG] clck_gen.py:128 IND CLOCK 4182
2025-03-30 06:31:32 [DEBUG] clck_gen.py:128 IND CLOCK 4284
2025-03-30 06:31:33 [DEBUG] clck_gen.py:128 IND CLOCK 4386
2025-03-30 06:31:33 [DEBUG] clck_gen.py:128 IND CLOCK 4488
2025-03-30 06:31:34 [DEBUG] clck_gen.py:128 IND CLOCK 4590
2025-03-30 06:31:34 [DEBUG] clck_gen.py:128 IND CLOCK 4692
2025-03-30 06:31:35 [DEBUG] clck_gen.py:128 IND CLOCK 4794
2025-03-30 06:31:35 [DEBUG] clck_gen.py:128 IND CLOCK 4896
2025-03-30 06:31:35 [DEBUG] clck_gen.py:128 IND CLOCK 4998
2025-03-30 06:31:36 [WARNING] transceiver.py:330 (MS@172.18.26.22:6700) Stale TRXD message (fn=5064): fn=5063 tn=0 bl=148 pwr=0
2025-03-30 06:31:36 [WARNING] transceiver.py:330 (MS@172.18.26.22:6700) Stale TRXD message (fn=5064): fn=5063 tn=1 pwr=0
2025-03-30 06:31:36 [WARNING] transceiver.py:330 (MS@172.18.26.22:6700) Stale TRXD message (fn=5064): fn=5063 tn=2 pwr=0
2025-03-30 06:31:36 [WARNING] transceiver.py:330 (MS@172.18.26.22:6700) Stale TRXD message (fn=5064): fn=5063 tn=3 pwr=0
2025-03-30 06:31:36 [WARNING] transceiver.py:330 (MS@172.18.26.22:6700) Stale TRXD message (fn=5064): fn=5063 tn=4 pwr=0
2025-03-30 06:31:36 [WARNING] transceiver.py:330 (MS@172.18.26.22:6700) Stale TRXD message (fn=5064): fn=5063 tn=5 pwr=0
2025-03-30 06:31:36 [WARNING] transceiver.py:330 (MS@172.18.26.22:6700) Stale TRXD message (fn=5064): fn=5063 tn=6 pwr=0
2025-03-30 06:31:36 [WARNING] transceiver.py:330 (MS@172.18.26.22:6700) Stale TRXD message (fn=5064): fn=5063 tn=7 pwr=0
2025-03-30 06:31:36 [DEBUG] clck_gen.py:128 IND CLOCK 5100
2025-03-30 06:31:36 [DEBUG] clck_gen.py:128 IND CLOCK 5202
2025-03-30 06:31:37 [DEBUG] clck_gen.py:128 IND CLOCK 5304
2025-03-30 06:31:37 [DEBUG] clck_gen.py:128 IND CLOCK 5406
2025-03-30 06:31:38 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:31:38 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:31:38 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:31:38 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:31:38 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:31:38 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:31:38 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:31:38 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:31:38 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:31:38 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:31:38 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 06:31:38 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 06:31:38 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 06:31:43 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 06:31:43 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 06:31:43 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:31:43 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:31:43 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:31:43 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:31:43 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:31:43 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 06:31:43 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:31:43 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 06:31:43 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 06:31:43 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 06:31:43 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 06:31:43 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 06:31:43 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:31:43 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:31:43 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 06:31:43 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 06:31:43 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 06:31:43 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 06:31:43 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 06:31:43 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 06:31:43 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:31:43 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:31:43 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 06:31:43 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 06:31:43 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 06:31:43 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 06:31:43 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 06:31:43 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 06:31:43 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:31:43 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:31:43 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 06:31:43 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 06:31:43 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 06:31:43 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 06:31:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 06:31:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 06:31:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 06:31:43 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 06:31:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 06:31:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 06:31:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 06:31:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:31:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 06:31:43 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 06:31:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:31:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:31:43 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 06:31:43 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 06:31:43 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 06:31:43 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 06:31:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:31:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:31:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:31:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 06:31:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:31:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:31:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:31:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:31:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:31:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:31:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:31:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:31:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:31:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:31:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:31:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:31:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:31:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:31:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:31:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:31:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:31:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:31:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:31:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:31:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:31:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:31:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:31:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:31:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:31:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:31:43 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-03-30 06:31:43 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-03-30 06:31:43 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-03-30 06:31:43 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-03-30 06:31:43 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-03-30 06:31:43 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-03-30 06:31:43 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-03-30 06:31:43 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-03-30 06:31:43 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-03-30 06:31:43 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-03-30 06:31:43 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 06:31:43 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 06:31:43 [DEBUG] fake_trx.py:317 (BTS@172.18.26.20:5700) Recv FAKE_CI cmd
2025-03-30 06:31:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:31:43 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:31:43 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:31:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:31:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:31:43 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:31:43 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:31:43 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:31:43 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:31:44 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-03-30 06:31:44 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:31:44 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:31:44 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:31:44 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:31:44 [DEBUG] clck_gen.py:128 IND CLOCK 306
2025-03-30 06:31:45 [DEBUG] clck_gen.py:128 IND CLOCK 408
2025-03-30 06:31:45 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:31:45 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:31:45 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:31:45 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:31:45 [DEBUG] clck_gen.py:128 IND CLOCK 510
2025-03-30 06:31:46 [DEBUG] clck_gen.py:128 IND CLOCK 612
2025-03-30 06:31:46 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:31:46 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:31:46 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:31:46 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:31:46 [DEBUG] clck_gen.py:128 IND CLOCK 714
2025-03-30 06:31:46 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:31:46 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:31:46 [DEBUG] fake_trx.py:317 (BTS@172.18.26.20:5700) Recv FAKE_CI cmd
2025-03-30 06:31:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:31:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:31:47 [DEBUG] clck_gen.py:128 IND CLOCK 816
2025-03-30 06:31:47 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:31:47 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:31:47 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:31:47 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:31:47 [DEBUG] clck_gen.py:128 IND CLOCK 918
2025-03-30 06:31:47 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:31:47 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:31:47 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:31:47 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:31:47 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:31:47 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:31:47 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:31:47 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:31:47 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:31:47 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:31:47 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 06:31:47 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 06:31:47 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 06:31:52 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 06:31:52 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 06:31:52 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:31:52 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:31:52 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:31:52 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:31:52 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:31:52 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 06:31:52 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:31:52 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 06:31:52 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 06:31:52 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 06:31:52 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 06:31:52 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 06:31:52 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:31:52 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:31:52 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 06:31:52 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 06:31:52 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 06:31:52 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 06:31:52 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 06:31:52 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 06:31:52 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:31:52 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:31:52 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 06:31:52 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 06:31:52 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 06:31:52 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 06:31:52 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 06:31:52 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 06:31:52 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:31:52 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:31:52 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 06:31:52 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 06:31:52 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 06:31:52 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 06:31:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 06:31:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 06:31:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 06:31:52 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 06:31:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 06:31:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 06:31:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 06:31:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 06:31:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:31:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:31:52 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 06:31:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:31:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:31:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:31:52 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 06:31:52 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 06:31:52 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 06:31:52 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 06:31:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:31:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:31:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:31:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 06:31:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:31:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:31:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:31:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:31:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:31:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:31:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:31:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:31:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:31:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:31:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:31:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:31:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:31:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:31:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:31:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:31:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:31:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:31:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:31:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:31:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:31:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:31:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:31:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:31:52 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-03-30 06:31:53 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-03-30 06:31:53 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-03-30 06:31:53 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-03-30 06:31:53 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-03-30 06:31:53 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-03-30 06:31:53 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-03-30 06:31:53 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-03-30 06:31:53 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-03-30 06:31:53 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-03-30 06:31:53 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=0 bl=148 pwr=0
2025-03-30 06:31:53 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=1 bl=148 pwr=0
2025-03-30 06:31:53 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=2 bl=148 pwr=0
2025-03-30 06:31:53 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=3 bl=148 pwr=0
2025-03-30 06:31:53 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=4 bl=148 pwr=0
2025-03-30 06:31:53 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=5 bl=148 pwr=0
2025-03-30 06:31:53 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=6 bl=148 pwr=0
2025-03-30 06:31:53 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=7 bl=148 pwr=0
2025-03-30 06:31:53 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 06:31:53 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 06:31:53 [DEBUG] fake_trx.py:317 (BTS@172.18.26.20:5700) Recv FAKE_CI cmd
2025-03-30 06:31:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:31:53 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:31:53 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:31:53 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:31:53 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:31:53 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:31:53 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:31:53 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:31:53 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:31:53 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 06:31:53 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 06:31:53 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 06:31:53 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=176 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:31:53 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=176 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:31:53 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=176 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:31:53 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=176 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:31:53 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=176 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:31:53 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=176 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:31:58 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 06:31:58 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 06:31:58 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:31:58 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:31:58 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:31:58 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:31:58 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:31:58 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 06:31:58 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:31:58 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 06:31:58 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 06:31:58 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 06:31:58 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 06:31:58 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 06:31:58 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:31:58 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:31:58 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 06:31:58 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 06:31:58 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 06:31:58 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 06:31:58 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 06:31:58 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 06:31:58 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:31:58 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:31:58 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 06:31:58 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 06:31:58 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 06:31:58 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 06:31:58 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 06:31:58 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 06:31:58 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:31:58 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:31:58 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 06:31:58 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 06:31:58 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 06:31:58 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 06:31:58 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 06:31:58 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 06:31:58 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 06:31:58 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 06:31:58 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 06:31:58 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 06:31:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 06:31:58 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:31:58 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 06:31:58 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 06:31:58 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:31:58 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:31:58 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 06:31:58 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 06:31:58 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 06:31:58 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 06:31:58 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:31:58 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:31:58 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:31:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 06:31:58 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:31:58 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:31:58 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:31:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:31:58 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:31:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:31:58 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:31:58 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:31:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:31:58 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:31:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:31:58 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:31:58 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:31:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:31:58 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:31:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:31:58 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:31:58 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:31:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:31:58 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:31:58 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:31:58 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:31:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:31:58 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:31:58 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:31:58 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:31:58 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-03-30 06:31:59 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-03-30 06:31:59 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-03-30 06:31:59 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-03-30 06:31:59 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-03-30 06:31:59 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-03-30 06:31:59 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-03-30 06:31:59 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-03-30 06:31:59 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-03-30 06:31:59 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-03-30 06:31:59 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=0 bl=148 pwr=0
2025-03-30 06:31:59 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=1 bl=148 pwr=0
2025-03-30 06:31:59 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=2 bl=148 pwr=0
2025-03-30 06:31:59 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=3 bl=148 pwr=0
2025-03-30 06:31:59 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=4 bl=148 pwr=0
2025-03-30 06:31:59 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=5 bl=148 pwr=0
2025-03-30 06:31:59 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=6 bl=148 pwr=0
2025-03-30 06:31:59 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=7 bl=148 pwr=0
2025-03-30 06:31:59 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 06:31:59 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 06:31:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:31:59 [DEBUG] fake_trx.py:317 (BTS@172.18.26.20:5700) Recv FAKE_CI cmd
2025-03-30 06:31:59 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-03-30 06:31:59 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:31:59 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:31:59 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:31:59 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:32:00 [DEBUG] clck_gen.py:128 IND CLOCK 306
2025-03-30 06:32:00 [DEBUG] clck_gen.py:128 IND CLOCK 408
2025-03-30 06:32:00 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:32:00 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:32:00 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:32:00 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:32:01 [DEBUG] clck_gen.py:128 IND CLOCK 510
2025-03-30 06:32:01 [DEBUG] clck_gen.py:128 IND CLOCK 612
2025-03-30 06:32:01 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:32:01 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:32:01 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:32:01 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:32:02 [DEBUG] clck_gen.py:128 IND CLOCK 714
2025-03-30 06:32:02 [DEBUG] clck_gen.py:128 IND CLOCK 816
2025-03-30 06:32:02 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:32:02 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:32:02 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:32:02 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:32:03 [DEBUG] clck_gen.py:128 IND CLOCK 918
2025-03-30 06:32:03 [DEBUG] clck_gen.py:128 IND CLOCK 1020
2025-03-30 06:32:03 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:32:03 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:32:03 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:32:03 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:32:03 [DEBUG] clck_gen.py:128 IND CLOCK 1122
2025-03-30 06:32:04 [DEBUG] clck_gen.py:128 IND CLOCK 1224
2025-03-30 06:32:04 [DEBUG] clck_gen.py:128 IND CLOCK 1326
2025-03-30 06:32:05 [DEBUG] clck_gen.py:128 IND CLOCK 1428
2025-03-30 06:32:05 [DEBUG] clck_gen.py:128 IND CLOCK 1530
2025-03-30 06:32:06 [DEBUG] clck_gen.py:128 IND CLOCK 1632
2025-03-30 06:32:06 [DEBUG] clck_gen.py:128 IND CLOCK 1734
2025-03-30 06:32:07 [DEBUG] clck_gen.py:128 IND CLOCK 1836
2025-03-30 06:32:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:32:07 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:32:07 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:32:07 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:32:07 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:32:07 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:32:07 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:32:07 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:32:07 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 06:32:07 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 06:32:07 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 06:32:07 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:32:07 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=1856 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:32:07 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=1856 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:32:07 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=1856 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:32:07 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=1856 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:32:07 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=1856 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:32:07 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=1856 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:32:07 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=1856 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:32:07 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=1856 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:32:12 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 06:32:12 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 06:32:12 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:32:12 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:32:12 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:32:12 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:32:12 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:32:12 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 06:32:12 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:32:12 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 06:32:12 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 06:32:12 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 06:32:12 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 06:32:12 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 06:32:12 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:32:12 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 06:32:12 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:32:12 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 06:32:12 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 06:32:12 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 06:32:12 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 06:32:12 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 06:32:12 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:32:12 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:32:12 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 06:32:12 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 06:32:12 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 06:32:12 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 06:32:12 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 06:32:12 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 06:32:12 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:32:12 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:32:12 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 06:32:12 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 06:32:12 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 06:32:12 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 06:32:12 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 06:32:12 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 06:32:12 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 06:32:12 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 06:32:12 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 06:32:12 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 06:32:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 06:32:12 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:32:12 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 06:32:12 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 06:32:12 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:32:12 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:32:12 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 06:32:12 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 06:32:12 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 06:32:12 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 06:32:12 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:32:12 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:32:12 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:32:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 06:32:12 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:32:12 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:32:12 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:32:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:32:12 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:32:12 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:32:12 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:32:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:32:12 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:32:12 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:32:12 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:32:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:32:12 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:32:12 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:32:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:32:12 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:32:12 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:32:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:32:12 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:32:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:32:12 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:32:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:32:12 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:32:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:32:12 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:32:12 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:32:12 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-03-30 06:32:12 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-03-30 06:32:12 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-03-30 06:32:12 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-03-30 06:32:12 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-03-30 06:32:12 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-03-30 06:32:12 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-03-30 06:32:12 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-03-30 06:32:12 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-03-30 06:32:12 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-03-30 06:32:12 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=0 bl=148 pwr=0
2025-03-30 06:32:12 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=1 bl=148 pwr=0
2025-03-30 06:32:12 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=2 bl=148 pwr=0
2025-03-30 06:32:12 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=3 bl=148 pwr=0
2025-03-30 06:32:12 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=4 bl=148 pwr=0
2025-03-30 06:32:12 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=5 bl=148 pwr=0
2025-03-30 06:32:12 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=6 bl=148 pwr=0
2025-03-30 06:32:12 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=7 bl=148 pwr=0
2025-03-30 06:32:12 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 06:32:12 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 06:32:12 [DEBUG] fake_trx.py:317 (BTS@172.18.26.20:5700) Recv FAKE_CI cmd
2025-03-30 06:32:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:32:13 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-03-30 06:32:13 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:32:13 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:32:13 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:32:13 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:32:13 [DEBUG] clck_gen.py:128 IND CLOCK 306
2025-03-30 06:32:14 [DEBUG] clck_gen.py:128 IND CLOCK 408
2025-03-30 06:32:14 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:32:14 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:32:14 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:32:14 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:32:14 [DEBUG] clck_gen.py:128 IND CLOCK 510
2025-03-30 06:32:15 [DEBUG] clck_gen.py:128 IND CLOCK 612
2025-03-30 06:32:15 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:32:15 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:32:15 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:32:15 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:32:15 [DEBUG] clck_gen.py:128 IND CLOCK 714
2025-03-30 06:32:16 [DEBUG] clck_gen.py:128 IND CLOCK 816
2025-03-30 06:32:16 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:32:16 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:32:16 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:32:16 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:32:16 [DEBUG] clck_gen.py:128 IND CLOCK 918
2025-03-30 06:32:17 [DEBUG] clck_gen.py:128 IND CLOCK 1020
2025-03-30 06:32:17 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:32:17 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:32:17 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:32:17 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:32:17 [DEBUG] clck_gen.py:128 IND CLOCK 1122
2025-03-30 06:32:18 [DEBUG] clck_gen.py:128 IND CLOCK 1224
2025-03-30 06:32:18 [DEBUG] clck_gen.py:128 IND CLOCK 1326
2025-03-30 06:32:18 [DEBUG] clck_gen.py:128 IND CLOCK 1428
2025-03-30 06:32:19 [DEBUG] clck_gen.py:128 IND CLOCK 1530
2025-03-30 06:32:19 [DEBUG] clck_gen.py:128 IND CLOCK 1632
2025-03-30 06:32:20 [DEBUG] clck_gen.py:128 IND CLOCK 1734
2025-03-30 06:32:20 [DEBUG] clck_gen.py:128 IND CLOCK 1836
2025-03-30 06:32:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:32:20 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:32:20 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:32:20 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:32:20 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:32:20 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:32:20 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:32:20 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:32:20 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:32:20 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 06:32:20 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 06:32:20 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 06:32:20 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=1856 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:32:20 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=1856 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:32:25 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 06:32:25 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 06:32:25 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:32:25 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:32:25 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:32:25 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:32:25 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:32:25 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 06:32:25 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:32:25 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 06:32:25 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 06:32:25 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 06:32:25 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 06:32:25 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 06:32:25 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:32:25 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 06:32:25 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:32:25 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 06:32:25 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 06:32:25 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 06:32:25 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 06:32:25 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 06:32:25 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:32:25 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:32:25 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 06:32:25 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 06:32:25 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 06:32:25 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 06:32:25 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 06:32:25 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 06:32:25 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:32:25 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:32:25 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 06:32:25 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 06:32:25 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 06:32:25 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 06:32:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 06:32:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 06:32:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 06:32:25 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 06:32:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 06:32:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 06:32:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 06:32:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:32:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 06:32:25 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 06:32:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:32:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:32:25 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 06:32:25 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 06:32:25 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 06:32:25 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 06:32:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:32:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:32:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:32:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 06:32:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:32:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:32:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:32:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:32:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:32:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:32:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:32:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:32:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:32:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:32:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:32:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:32:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:32:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:32:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:32:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:32:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:32:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:32:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:32:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:32:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:32:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:32:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:32:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:32:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:32:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:32:25 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-03-30 06:32:26 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-03-30 06:32:26 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-03-30 06:32:26 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-03-30 06:32:26 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-03-30 06:32:26 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-03-30 06:32:26 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-03-30 06:32:26 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-03-30 06:32:26 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-03-30 06:32:26 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-03-30 06:32:26 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=105 tn=0 bl=148 pwr=0
2025-03-30 06:32:26 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=105 tn=1 bl=148 pwr=0
2025-03-30 06:32:26 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=105 tn=2 bl=148 pwr=0
2025-03-30 06:32:26 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=105 tn=3 bl=148 pwr=0
2025-03-30 06:32:26 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=105 tn=4 bl=148 pwr=0
2025-03-30 06:32:26 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=105 tn=5 bl=148 pwr=0
2025-03-30 06:32:26 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=105 tn=6 bl=148 pwr=0
2025-03-30 06:32:26 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=105 tn=7 bl=148 pwr=0
2025-03-30 06:32:26 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=106 tn=0 bl=148 pwr=0
2025-03-30 06:32:26 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=106 tn=1 bl=148 pwr=0
2025-03-30 06:32:26 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=106 tn=2 bl=148 pwr=0
2025-03-30 06:32:26 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=106 tn=3 bl=148 pwr=0
2025-03-30 06:32:26 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=106 tn=4 bl=148 pwr=0
2025-03-30 06:32:26 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=106 tn=5 bl=148 pwr=0
2025-03-30 06:32:26 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=106 tn=6 bl=148 pwr=0
2025-03-30 06:32:26 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=106 tn=7 bl=148 pwr=0
2025-03-30 06:32:26 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=107 tn=0 bl=148 pwr=0
2025-03-30 06:32:26 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=107 tn=1 bl=148 pwr=0
2025-03-30 06:32:26 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=107 tn=2 bl=148 pwr=0
2025-03-30 06:32:26 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=107 tn=3 bl=148 pwr=0
2025-03-30 06:32:26 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=107 tn=4 bl=148 pwr=0
2025-03-30 06:32:26 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=107 tn=5 bl=148 pwr=0
2025-03-30 06:32:26 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=107 tn=6 bl=148 pwr=0
2025-03-30 06:32:26 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=107 tn=7 bl=148 pwr=0
2025-03-30 06:32:26 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 06:32:26 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 06:32:26 [DEBUG] fake_trx.py:317 (BTS@172.18.26.20:5700) Recv FAKE_CI cmd
2025-03-30 06:32:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:32:26 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-03-30 06:32:26 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:32:26 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:32:26 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:32:26 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:32:27 [DEBUG] clck_gen.py:128 IND CLOCK 306
2025-03-30 06:32:27 [DEBUG] clck_gen.py:128 IND CLOCK 408
2025-03-30 06:32:27 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:32:27 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:32:27 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:32:27 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:32:28 [DEBUG] clck_gen.py:128 IND CLOCK 510
2025-03-30 06:32:28 [DEBUG] clck_gen.py:128 IND CLOCK 612
2025-03-30 06:32:28 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:32:28 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:32:28 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:32:28 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:32:29 [DEBUG] clck_gen.py:128 IND CLOCK 714
2025-03-30 06:32:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:32:29 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:32:29 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:32:29 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:32:29 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:32:29 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:32:29 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:32:29 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:32:29 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:32:29 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 06:32:29 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 06:32:29 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 06:32:34 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 06:32:34 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 06:32:34 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:32:34 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:32:34 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:32:34 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:32:34 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:32:34 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 06:32:34 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:32:34 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 06:32:34 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 06:32:34 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 06:32:34 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 06:32:34 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 06:32:34 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:32:34 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:32:34 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 06:32:34 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 06:32:34 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 06:32:34 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 06:32:34 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 06:32:34 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 06:32:34 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:32:34 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:32:34 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 06:32:34 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 06:32:34 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 06:32:34 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 06:32:34 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 06:32:34 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 06:32:34 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:32:34 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:32:34 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 06:32:34 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 06:32:34 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 06:32:34 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 06:32:34 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 06:32:34 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 06:32:34 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 06:32:34 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 06:32:34 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 06:32:34 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 06:32:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 06:32:34 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:32:34 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 06:32:34 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 06:32:34 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:32:34 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:32:34 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 06:32:34 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 06:32:34 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 06:32:34 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 06:32:34 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:32:34 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:32:34 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:32:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 06:32:34 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:32:34 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:32:34 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:32:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:32:34 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:32:34 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:32:34 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:32:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:32:34 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:32:34 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:32:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:32:34 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:32:34 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:32:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:32:34 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:32:34 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:32:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:32:34 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:32:34 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:32:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:32:34 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:32:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:32:34 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:32:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:32:34 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:32:34 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:32:34 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-03-30 06:32:35 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-03-30 06:32:35 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-03-30 06:32:35 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-03-30 06:32:35 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-03-30 06:32:35 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-03-30 06:32:35 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-03-30 06:32:35 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-03-30 06:32:35 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-03-30 06:32:35 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-03-30 06:32:35 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=105 tn=0 bl=148 pwr=0
2025-03-30 06:32:35 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=105 tn=1 bl=148 pwr=0
2025-03-30 06:32:35 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=105 tn=2 bl=148 pwr=0
2025-03-30 06:32:35 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=105 tn=3 bl=148 pwr=0
2025-03-30 06:32:35 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=105 tn=4 bl=148 pwr=0
2025-03-30 06:32:35 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=105 tn=5 bl=148 pwr=0
2025-03-30 06:32:35 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=105 tn=6 bl=148 pwr=0
2025-03-30 06:32:35 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=105 tn=7 bl=148 pwr=0
2025-03-30 06:32:35 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=106 tn=0 bl=148 pwr=0
2025-03-30 06:32:35 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=106 tn=1 bl=148 pwr=0
2025-03-30 06:32:35 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=106 tn=2 bl=148 pwr=0
2025-03-30 06:32:35 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=106 tn=3 bl=148 pwr=0
2025-03-30 06:32:35 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=106 tn=4 bl=148 pwr=0
2025-03-30 06:32:35 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=106 tn=5 bl=148 pwr=0
2025-03-30 06:32:35 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=106 tn=6 bl=148 pwr=0
2025-03-30 06:32:35 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=106 tn=7 bl=148 pwr=0
2025-03-30 06:32:35 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=107 tn=0 bl=148 pwr=0
2025-03-30 06:32:35 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=107 tn=1 bl=148 pwr=0
2025-03-30 06:32:35 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=107 tn=2 bl=148 pwr=0
2025-03-30 06:32:35 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=107 tn=3 bl=148 pwr=0
2025-03-30 06:32:35 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=107 tn=4 bl=148 pwr=0
2025-03-30 06:32:35 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=107 tn=5 bl=148 pwr=0
2025-03-30 06:32:35 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=107 tn=6 bl=148 pwr=0
2025-03-30 06:32:35 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=107 tn=7 bl=148 pwr=0
2025-03-30 06:32:35 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 06:32:35 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 06:32:35 [DEBUG] fake_trx.py:317 (BTS@172.18.26.20:5700) Recv FAKE_CI cmd
2025-03-30 06:32:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:32:35 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:32:35 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:32:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:32:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:32:35 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:32:35 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:32:35 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:32:35 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:32:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:32:35 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:32:35 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:32:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:32:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:32:35 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-03-30 06:32:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:32:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:32:35 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:32:35 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:32:35 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:32:35 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:32:35 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:32:35 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:32:35 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:32:35 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:32:35 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:32:35 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:32:35 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 06:32:35 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 06:32:35 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 06:32:40 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 06:32:40 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 06:32:40 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:32:40 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:32:40 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:32:40 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:32:40 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:32:40 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 06:32:40 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:32:40 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 06:32:40 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 06:32:40 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 06:32:40 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 06:32:40 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 06:32:40 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:32:40 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:32:40 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 06:32:40 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 06:32:40 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 06:32:40 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 06:32:40 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 06:32:40 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 06:32:40 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:32:40 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:32:40 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 06:32:40 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 06:32:40 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 06:32:40 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 06:32:40 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 06:32:40 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 06:32:40 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:32:40 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:32:40 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 06:32:40 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 06:32:40 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 06:32:40 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 06:32:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 06:32:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 06:32:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 06:32:40 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 06:32:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 06:32:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 06:32:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 06:32:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:32:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 06:32:40 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 06:32:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:32:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:32:40 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 06:32:40 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 06:32:40 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 06:32:40 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 06:32:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:32:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:32:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:32:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 06:32:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:32:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:32:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:32:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:32:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:32:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:32:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:32:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:32:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:32:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:32:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:32:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:32:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:32:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:32:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:32:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:32:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:32:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:32:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:32:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:32:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:32:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:32:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:32:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:32:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:32:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:32:40 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-03-30 06:32:41 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-03-30 06:32:41 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-03-30 06:32:41 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-03-30 06:32:41 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-03-30 06:32:41 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-03-30 06:32:41 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-03-30 06:32:41 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-03-30 06:32:41 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-03-30 06:32:41 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-03-30 06:32:41 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=105 tn=0 bl=148 pwr=0
2025-03-30 06:32:41 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=105 tn=1 bl=148 pwr=0
2025-03-30 06:32:41 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=105 tn=2 bl=148 pwr=0
2025-03-30 06:32:41 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=105 tn=3 bl=148 pwr=0
2025-03-30 06:32:41 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=105 tn=4 bl=148 pwr=0
2025-03-30 06:32:41 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=105 tn=5 bl=148 pwr=0
2025-03-30 06:32:41 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=105 tn=6 bl=148 pwr=0
2025-03-30 06:32:41 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=105 tn=7 bl=148 pwr=0
2025-03-30 06:32:41 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=106 tn=0 bl=148 pwr=0
2025-03-30 06:32:41 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=106 tn=1 bl=148 pwr=0
2025-03-30 06:32:41 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=106 tn=2 bl=148 pwr=0
2025-03-30 06:32:41 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=106 tn=3 bl=148 pwr=0
2025-03-30 06:32:41 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=106 tn=4 bl=148 pwr=0
2025-03-30 06:32:41 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=106 tn=5 bl=148 pwr=0
2025-03-30 06:32:41 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=106 tn=6 bl=148 pwr=0
2025-03-30 06:32:41 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=106 tn=7 bl=148 pwr=0
2025-03-30 06:32:41 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=107 tn=0 bl=148 pwr=0
2025-03-30 06:32:41 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=107 tn=1 bl=148 pwr=0
2025-03-30 06:32:41 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=107 tn=2 bl=148 pwr=0
2025-03-30 06:32:41 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=107 tn=3 bl=148 pwr=0
2025-03-30 06:32:41 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=107 tn=4 bl=148 pwr=0
2025-03-30 06:32:41 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=107 tn=5 bl=148 pwr=0
2025-03-30 06:32:41 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=107 tn=6 bl=148 pwr=0
2025-03-30 06:32:41 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=107 tn=7 bl=148 pwr=0
2025-03-30 06:32:41 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 06:32:41 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 06:32:41 [DEBUG] fake_trx.py:317 (BTS@172.18.26.20:5700) Recv FAKE_CI cmd
2025-03-30 06:32:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:32:41 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:32:41 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:32:41 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:32:41 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:32:41 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:32:41 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:32:41 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:32:41 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:32:41 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 06:32:41 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 06:32:41 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 06:32:41 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=118 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:32:41 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=118 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:32:41 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=118 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:32:41 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=118 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:32:41 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=118 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:32:41 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=118 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:32:41 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=119 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:32:41 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=119 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:32:41 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=119 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:32:41 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=119 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:32:41 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=119 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:32:41 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=119 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:32:41 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=119 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:32:41 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=119 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:32:46 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 06:32:46 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 06:32:46 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:32:46 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:32:46 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:32:46 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:32:46 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:32:46 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 06:32:46 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:32:46 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 06:32:46 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 06:32:46 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 06:32:46 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 06:32:46 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 06:32:46 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:32:46 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:32:46 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 06:32:46 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 06:32:46 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 06:32:46 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 06:32:46 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 06:32:46 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 06:32:46 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:32:46 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:32:46 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 06:32:46 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 06:32:46 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 06:32:46 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 06:32:46 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 06:32:46 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 06:32:46 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:32:46 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 06:32:46 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:32:46 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 06:32:46 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 06:32:46 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 06:32:46 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 06:32:46 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 06:32:46 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 06:32:46 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 06:32:46 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 06:32:46 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 06:32:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 06:32:46 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:32:46 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 06:32:46 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 06:32:46 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:32:46 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:32:46 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 06:32:46 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 06:32:46 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 06:32:46 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 06:32:46 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:32:46 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:32:46 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:32:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 06:32:46 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:32:46 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:32:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:32:46 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:32:46 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:32:46 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:32:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:32:46 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:32:46 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:32:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:32:46 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:32:46 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:32:46 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:32:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:32:46 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:32:46 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:32:46 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:32:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:32:46 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:32:46 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:32:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:32:46 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:32:46 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:32:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:32:46 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:32:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:32:46 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-03-30 06:32:46 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-03-30 06:32:46 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-03-30 06:32:46 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-03-30 06:32:46 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-03-30 06:32:46 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-03-30 06:32:46 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-03-30 06:32:46 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-03-30 06:32:46 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-03-30 06:32:46 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-03-30 06:32:46 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 06:32:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:32:46 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 06:32:46 [DEBUG] fake_trx.py:317 (BTS@172.18.26.20:5700) Recv FAKE_CI cmd
2025-03-30 06:32:47 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-03-30 06:32:47 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:32:47 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:32:47 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:32:47 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:32:47 [DEBUG] clck_gen.py:128 IND CLOCK 306
2025-03-30 06:32:48 [DEBUG] clck_gen.py:128 IND CLOCK 408
2025-03-30 06:32:48 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:32:48 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:32:48 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:32:48 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:32:48 [DEBUG] clck_gen.py:128 IND CLOCK 510
2025-03-30 06:32:48 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:32:48 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:32:48 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:32:48 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:32:48 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:32:48 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:32:48 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 06:32:48 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 06:32:48 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 06:32:48 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:32:48 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:32:53 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 06:32:53 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 06:32:53 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:32:53 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:32:53 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:32:53 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:32:53 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:32:53 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 06:32:53 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:32:53 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 06:32:53 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 06:32:53 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 06:32:53 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 06:32:53 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 06:32:53 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:32:53 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:32:53 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 06:32:53 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 06:32:53 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 06:32:53 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 06:32:53 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 06:32:53 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 06:32:53 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:32:53 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 06:32:53 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:32:53 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 06:32:53 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 06:32:53 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 06:32:53 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 06:32:53 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 06:32:53 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:32:53 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:32:53 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 06:32:53 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 06:32:53 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 06:32:53 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 06:32:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 06:32:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 06:32:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 06:32:53 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 06:32:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 06:32:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 06:32:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 06:32:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 06:32:53 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 06:32:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:32:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:32:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:32:53 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 06:32:53 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 06:32:53 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 06:32:53 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 06:32:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:32:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:32:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:32:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 06:32:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:32:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:32:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:32:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:32:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:32:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:32:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:32:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:32:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:32:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:32:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:32:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:32:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:32:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:32:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:32:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:32:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:32:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:32:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:32:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:32:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:32:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:32:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:32:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:32:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:32:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:32:53 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-03-30 06:32:54 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-03-30 06:32:54 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-03-30 06:32:54 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-03-30 06:32:54 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-03-30 06:32:54 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-03-30 06:32:54 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-03-30 06:32:54 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-03-30 06:32:54 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-03-30 06:32:54 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-03-30 06:32:54 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=105 tn=0 bl=148 pwr=0
2025-03-30 06:32:54 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=105 tn=1 bl=148 pwr=0
2025-03-30 06:32:54 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=105 tn=2 bl=148 pwr=0
2025-03-30 06:32:54 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=105 tn=3 bl=148 pwr=0
2025-03-30 06:32:54 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=105 tn=4 bl=148 pwr=0
2025-03-30 06:32:54 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=105 tn=5 bl=148 pwr=0
2025-03-30 06:32:54 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=105 tn=6 bl=148 pwr=0
2025-03-30 06:32:54 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=105 tn=7 bl=148 pwr=0
2025-03-30 06:32:54 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=106 tn=0 bl=148 pwr=0
2025-03-30 06:32:54 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=106 tn=1 bl=148 pwr=0
2025-03-30 06:32:54 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=106 tn=2 bl=148 pwr=0
2025-03-30 06:32:54 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=106 tn=3 bl=148 pwr=0
2025-03-30 06:32:54 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=106 tn=4 bl=148 pwr=0
2025-03-30 06:32:54 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=106 tn=5 bl=148 pwr=0
2025-03-30 06:32:54 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=106 tn=6 bl=148 pwr=0
2025-03-30 06:32:54 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=106 tn=7 bl=148 pwr=0
2025-03-30 06:32:54 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=107 tn=0 bl=148 pwr=0
2025-03-30 06:32:54 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=107 tn=1 bl=148 pwr=0
2025-03-30 06:32:54 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=107 tn=2 bl=148 pwr=0
2025-03-30 06:32:54 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=107 tn=3 bl=148 pwr=0
2025-03-30 06:32:54 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=107 tn=4 bl=148 pwr=0
2025-03-30 06:32:54 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=107 tn=5 bl=148 pwr=0
2025-03-30 06:32:54 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=107 tn=6 bl=148 pwr=0
2025-03-30 06:32:54 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=107 tn=7 bl=148 pwr=0
2025-03-30 06:32:54 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 06:32:54 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 06:32:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:32:54 [DEBUG] fake_trx.py:317 (BTS@172.18.26.20:5700) Recv FAKE_CI cmd
2025-03-30 06:32:54 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:32:54 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:32:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:32:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:32:54 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:32:54 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:32:54 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:32:54 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:32:54 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-03-30 06:32:54 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:32:54 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:32:54 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:32:54 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:32:55 [DEBUG] clck_gen.py:128 IND CLOCK 306
2025-03-30 06:32:55 [DEBUG] clck_gen.py:128 IND CLOCK 408
2025-03-30 06:32:55 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:32:55 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:32:55 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:32:55 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:32:56 [DEBUG] clck_gen.py:128 IND CLOCK 510
2025-03-30 06:32:56 [DEBUG] clck_gen.py:128 IND CLOCK 612
2025-03-30 06:32:56 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:32:56 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:32:56 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:32:56 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:32:56 [DEBUG] clck_gen.py:128 IND CLOCK 714
2025-03-30 06:32:57 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:32:57 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:32:57 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:32:57 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:32:57 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:32:57 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:32:57 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:32:57 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:32:57 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:32:57 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:32:57 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 06:32:57 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 06:32:57 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 06:33:02 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 06:33:02 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 06:33:02 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:33:02 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:33:02 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:33:02 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:33:02 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:33:02 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 06:33:02 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:33:02 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 06:33:02 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 06:33:02 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 06:33:02 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 06:33:02 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 06:33:02 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:33:02 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:33:02 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 06:33:02 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 06:33:02 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 06:33:02 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 06:33:02 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 06:33:02 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 06:33:02 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:33:02 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:33:02 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 06:33:02 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 06:33:02 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 06:33:02 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 06:33:02 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 06:33:02 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 06:33:02 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:33:02 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:33:02 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 06:33:02 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 06:33:02 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 06:33:02 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 06:33:02 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 06:33:02 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 06:33:02 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 06:33:02 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 06:33:02 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 06:33:02 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 06:33:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 06:33:02 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:33:02 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 06:33:02 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 06:33:02 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:33:02 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:33:02 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 06:33:02 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 06:33:02 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 06:33:02 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 06:33:02 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:33:02 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:33:02 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:33:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 06:33:02 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:33:02 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:33:02 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:33:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:33:02 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:33:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:33:02 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:33:02 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:33:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:33:02 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:33:02 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:33:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:33:02 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:33:02 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:33:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:33:02 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:33:02 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:33:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:33:02 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:33:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:33:02 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:33:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:33:02 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:33:02 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:33:02 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:33:02 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:33:02 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-03-30 06:33:02 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-03-30 06:33:02 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-03-30 06:33:02 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-03-30 06:33:02 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-03-30 06:33:02 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-03-30 06:33:02 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-03-30 06:33:02 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-03-30 06:33:02 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-03-30 06:33:02 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-03-30 06:33:02 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=105 tn=0 bl=148 pwr=0
2025-03-30 06:33:02 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=105 tn=1 bl=148 pwr=0
2025-03-30 06:33:02 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=105 tn=2 bl=148 pwr=0
2025-03-30 06:33:02 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=105 tn=3 bl=148 pwr=0
2025-03-30 06:33:02 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=105 tn=4 bl=148 pwr=0
2025-03-30 06:33:02 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=105 tn=5 bl=148 pwr=0
2025-03-30 06:33:02 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=105 tn=6 bl=148 pwr=0
2025-03-30 06:33:02 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=105 tn=7 bl=148 pwr=0
2025-03-30 06:33:02 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=106 tn=0 bl=148 pwr=0
2025-03-30 06:33:02 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=106 tn=1 bl=148 pwr=0
2025-03-30 06:33:02 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=106 tn=2 bl=148 pwr=0
2025-03-30 06:33:02 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=106 tn=3 bl=148 pwr=0
2025-03-30 06:33:02 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=106 tn=4 bl=148 pwr=0
2025-03-30 06:33:02 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=106 tn=5 bl=148 pwr=0
2025-03-30 06:33:02 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=106 tn=6 bl=148 pwr=0
2025-03-30 06:33:02 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=106 tn=7 bl=148 pwr=0
2025-03-30 06:33:02 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=107 tn=0 bl=148 pwr=0
2025-03-30 06:33:02 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=107 tn=1 bl=148 pwr=0
2025-03-30 06:33:02 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=107 tn=2 bl=148 pwr=0
2025-03-30 06:33:02 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=107 tn=3 bl=148 pwr=0
2025-03-30 06:33:02 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=107 tn=4 bl=148 pwr=0
2025-03-30 06:33:02 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=107 tn=5 bl=148 pwr=0
2025-03-30 06:33:02 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=107 tn=6 bl=148 pwr=0
2025-03-30 06:33:02 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=107 tn=7 bl=148 pwr=0
2025-03-30 06:33:02 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 06:33:02 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 06:33:02 [DEBUG] fake_trx.py:317 (BTS@172.18.26.20:5700) Recv FAKE_CI cmd
2025-03-30 06:33:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:33:02 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:33:02 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:33:02 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:33:02 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:33:02 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:33:02 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:33:02 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:33:02 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:33:03 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-03-30 06:33:03 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:33:03 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:33:03 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:33:03 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:33:03 [DEBUG] clck_gen.py:128 IND CLOCK 306
2025-03-30 06:33:03 [DEBUG] clck_gen.py:128 IND CLOCK 408
2025-03-30 06:33:04 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:33:04 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:33:04 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:33:04 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:33:04 [DEBUG] clck_gen.py:128 IND CLOCK 510
2025-03-30 06:33:04 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:33:04 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:33:04 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:33:04 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:33:04 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:33:04 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:33:04 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:33:04 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:33:04 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:33:04 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:33:04 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 06:33:04 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 06:33:04 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 06:33:09 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 06:33:09 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 06:33:09 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:33:09 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:33:09 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:33:09 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:33:09 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:33:09 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 06:33:09 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:33:09 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 06:33:09 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 06:33:09 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 06:33:09 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 06:33:09 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 06:33:09 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:33:09 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:33:09 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 06:33:09 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 06:33:09 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 06:33:09 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 06:33:09 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 06:33:09 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 06:33:09 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:33:09 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:33:09 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 06:33:09 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 06:33:09 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 06:33:09 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 06:33:09 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 06:33:09 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 06:33:09 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:33:09 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 06:33:09 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:33:09 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 06:33:09 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 06:33:09 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 06:33:09 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 06:33:09 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 06:33:09 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 06:33:09 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 06:33:09 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 06:33:09 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 06:33:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 06:33:09 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:33:09 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 06:33:09 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 06:33:09 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:33:09 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:33:09 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 06:33:09 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 06:33:09 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 06:33:09 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 06:33:09 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:33:09 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:33:09 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:33:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 06:33:09 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:33:09 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:33:09 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:33:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:33:09 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:33:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:33:09 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:33:09 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:33:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:33:09 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:33:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:33:09 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:33:09 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:33:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:33:09 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:33:09 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:33:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:33:09 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:33:09 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:33:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:33:09 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:33:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:33:09 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:33:09 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:33:09 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:33:09 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:33:09 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-03-30 06:33:10 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-03-30 06:33:10 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-03-30 06:33:10 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-03-30 06:33:10 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-03-30 06:33:10 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-03-30 06:33:10 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-03-30 06:33:10 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-03-30 06:33:10 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-03-30 06:33:10 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-03-30 06:33:10 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=105 tn=0 bl=148 pwr=0
2025-03-30 06:33:10 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=105 tn=1 bl=148 pwr=0
2025-03-30 06:33:10 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=105 tn=2 bl=148 pwr=0
2025-03-30 06:33:10 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=105 tn=3 bl=148 pwr=0
2025-03-30 06:33:10 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=105 tn=4 bl=148 pwr=0
2025-03-30 06:33:10 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=105 tn=5 bl=148 pwr=0
2025-03-30 06:33:10 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=105 tn=6 bl=148 pwr=0
2025-03-30 06:33:10 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=105 tn=7 bl=148 pwr=0
2025-03-30 06:33:10 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=106 tn=0 bl=148 pwr=0
2025-03-30 06:33:10 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=106 tn=1 bl=148 pwr=0
2025-03-30 06:33:10 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=106 tn=2 bl=148 pwr=0
2025-03-30 06:33:10 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=106 tn=3 bl=148 pwr=0
2025-03-30 06:33:10 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=106 tn=4 bl=148 pwr=0
2025-03-30 06:33:10 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=106 tn=5 bl=148 pwr=0
2025-03-30 06:33:10 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=106 tn=6 bl=148 pwr=0
2025-03-30 06:33:10 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=106 tn=7 bl=148 pwr=0
2025-03-30 06:33:10 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=107 tn=0 bl=148 pwr=0
2025-03-30 06:33:10 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=107 tn=1 bl=148 pwr=0
2025-03-30 06:33:10 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=107 tn=2 bl=148 pwr=0
2025-03-30 06:33:10 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=107 tn=3 bl=148 pwr=0
2025-03-30 06:33:10 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=107 tn=4 bl=148 pwr=0
2025-03-30 06:33:10 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=107 tn=5 bl=148 pwr=0
2025-03-30 06:33:10 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=107 tn=6 bl=148 pwr=0
2025-03-30 06:33:10 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=107 tn=7 bl=148 pwr=0
2025-03-30 06:33:10 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 06:33:10 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 06:33:10 [DEBUG] fake_trx.py:317 (BTS@172.18.26.20:5700) Recv FAKE_CI cmd
2025-03-30 06:33:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:33:10 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:33:10 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:33:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:33:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:33:10 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:33:10 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:33:10 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:33:10 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:33:10 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-03-30 06:33:10 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:33:10 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:33:10 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:33:10 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:33:11 [DEBUG] clck_gen.py:128 IND CLOCK 306
2025-03-30 06:33:11 [DEBUG] clck_gen.py:128 IND CLOCK 408
2025-03-30 06:33:11 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:33:11 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:33:11 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:33:11 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:33:12 [DEBUG] clck_gen.py:128 IND CLOCK 510
2025-03-30 06:33:12 [DEBUG] clck_gen.py:128 IND CLOCK 612
2025-03-30 06:33:12 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:33:12 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:33:12 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:33:12 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:33:13 [DEBUG] clck_gen.py:128 IND CLOCK 714
2025-03-30 06:33:13 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:33:13 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:33:13 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:33:13 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:33:13 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:33:13 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:33:13 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:33:13 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:33:13 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:33:13 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:33:13 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 06:33:13 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 06:33:13 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 06:33:13 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=723 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:33:13 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=723 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:33:13 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=723 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:33:13 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=723 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:33:13 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=723 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:33:13 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=723 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:33:13 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=724 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:33:13 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=724 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:33:13 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=724 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:33:13 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=724 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:33:13 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=724 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:33:13 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=724 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:33:13 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=724 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:33:13 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=724 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:33:13 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=725 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:33:13 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=725 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:33:13 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=725 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:33:13 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=725 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:33:13 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=725 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:33:13 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=725 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:33:13 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=725 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:33:13 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=725 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:33:18 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 06:33:18 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 06:33:18 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:33:18 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:33:18 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:33:18 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:33:18 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:33:18 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 06:33:18 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:33:18 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 06:33:18 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 06:33:18 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 06:33:18 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 06:33:18 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 06:33:18 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:33:18 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 06:33:18 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:33:18 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 06:33:18 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 06:33:18 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 06:33:18 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 06:33:18 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 06:33:18 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:33:18 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:33:18 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 06:33:18 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 06:33:18 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 06:33:18 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 06:33:18 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 06:33:18 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 06:33:18 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:33:18 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:33:18 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 06:33:18 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 06:33:18 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 06:33:18 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 06:33:18 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 06:33:18 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 06:33:18 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 06:33:18 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 06:33:18 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 06:33:18 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 06:33:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 06:33:18 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:33:18 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 06:33:18 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 06:33:18 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:33:18 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:33:18 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 06:33:18 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 06:33:18 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 06:33:18 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 06:33:18 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:33:18 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:33:18 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:33:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 06:33:18 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:33:18 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:33:18 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:33:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:33:18 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:33:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:33:18 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:33:18 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:33:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:33:18 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:33:18 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:33:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:33:18 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:33:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:33:18 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:33:18 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:33:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:33:18 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:33:18 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:33:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:33:18 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:33:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:33:18 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:33:18 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:33:18 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:33:18 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:33:18 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-03-30 06:33:18 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-03-30 06:33:18 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-03-30 06:33:18 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-03-30 06:33:18 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-03-30 06:33:18 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-03-30 06:33:18 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-03-30 06:33:18 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-03-30 06:33:18 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-03-30 06:33:18 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-03-30 06:33:18 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=105 tn=0 bl=148 pwr=0
2025-03-30 06:33:18 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=105 tn=1 bl=148 pwr=0
2025-03-30 06:33:18 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=105 tn=2 bl=148 pwr=0
2025-03-30 06:33:18 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=105 tn=3 bl=148 pwr=0
2025-03-30 06:33:18 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=105 tn=4 bl=148 pwr=0
2025-03-30 06:33:18 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=105 tn=5 bl=148 pwr=0
2025-03-30 06:33:18 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=105 tn=6 bl=148 pwr=0
2025-03-30 06:33:18 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=105 tn=7 bl=148 pwr=0
2025-03-30 06:33:18 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=106 tn=0 bl=148 pwr=0
2025-03-30 06:33:18 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=106 tn=1 bl=148 pwr=0
2025-03-30 06:33:18 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=106 tn=2 bl=148 pwr=0
2025-03-30 06:33:18 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=106 tn=3 bl=148 pwr=0
2025-03-30 06:33:18 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=106 tn=4 bl=148 pwr=0
2025-03-30 06:33:18 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=106 tn=5 bl=148 pwr=0
2025-03-30 06:33:18 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=106 tn=6 bl=148 pwr=0
2025-03-30 06:33:18 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=106 tn=7 bl=148 pwr=0
2025-03-30 06:33:18 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=107 tn=0 bl=148 pwr=0
2025-03-30 06:33:18 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=107 tn=1 bl=148 pwr=0
2025-03-30 06:33:18 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=107 tn=2 bl=148 pwr=0
2025-03-30 06:33:18 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=107 tn=3 bl=148 pwr=0
2025-03-30 06:33:18 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=107 tn=4 bl=148 pwr=0
2025-03-30 06:33:18 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=107 tn=5 bl=148 pwr=0
2025-03-30 06:33:18 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=107 tn=6 bl=148 pwr=0
2025-03-30 06:33:18 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=107 tn=7 bl=148 pwr=0
2025-03-30 06:33:18 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 06:33:18 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 06:33:18 [DEBUG] fake_trx.py:317 (BTS@172.18.26.20:5700) Recv FAKE_CI cmd
2025-03-30 06:33:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:33:18 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:33:18 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:33:18 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:33:18 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:33:18 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:33:18 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:33:18 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:33:18 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:33:19 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-03-30 06:33:19 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:33:19 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:33:19 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:33:19 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:33:19 [DEBUG] clck_gen.py:128 IND CLOCK 306
2025-03-30 06:33:19 [DEBUG] clck_gen.py:128 IND CLOCK 408
2025-03-30 06:33:20 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:33:20 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:33:20 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:33:20 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:33:20 [DEBUG] clck_gen.py:128 IND CLOCK 510
2025-03-30 06:33:20 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:33:20 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:33:20 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:33:20 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:33:20 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:33:20 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:33:20 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:33:20 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:33:20 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:33:20 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:33:20 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 06:33:20 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 06:33:20 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 06:33:20 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=572 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:33:20 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=572 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:33:20 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=572 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:33:20 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=572 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:33:20 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=572 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:33:20 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=572 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:33:25 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 06:33:25 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 06:33:25 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:33:25 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:33:25 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:33:25 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:33:25 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:33:25 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 06:33:25 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:33:25 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 06:33:25 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 06:33:25 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 06:33:25 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 06:33:25 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 06:33:25 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:33:25 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:33:25 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 06:33:25 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 06:33:25 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 06:33:25 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 06:33:25 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 06:33:25 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 06:33:25 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:33:25 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 06:33:25 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:33:25 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 06:33:25 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 06:33:25 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 06:33:25 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 06:33:25 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 06:33:25 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:33:25 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:33:25 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 06:33:25 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 06:33:25 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 06:33:25 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 06:33:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 06:33:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 06:33:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 06:33:25 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 06:33:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 06:33:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 06:33:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 06:33:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:33:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 06:33:25 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 06:33:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:33:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:33:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:33:25 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 06:33:25 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 06:33:25 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 06:33:25 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 06:33:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:33:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:33:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:33:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 06:33:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:33:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:33:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:33:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:33:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:33:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:33:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:33:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:33:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:33:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:33:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:33:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:33:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:33:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:33:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:33:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:33:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:33:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:33:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:33:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:33:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:33:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:33:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:33:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:33:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:33:25 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-03-30 06:33:26 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-03-30 06:33:26 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-03-30 06:33:26 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-03-30 06:33:26 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-03-30 06:33:26 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-03-30 06:33:26 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-03-30 06:33:26 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-03-30 06:33:26 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-03-30 06:33:26 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-03-30 06:33:26 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=105 tn=0 bl=148 pwr=0
2025-03-30 06:33:26 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=105 tn=1 bl=148 pwr=0
2025-03-30 06:33:26 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=105 tn=2 bl=148 pwr=0
2025-03-30 06:33:26 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=105 tn=3 bl=148 pwr=0
2025-03-30 06:33:26 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=105 tn=4 bl=148 pwr=0
2025-03-30 06:33:26 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=105 tn=5 bl=148 pwr=0
2025-03-30 06:33:26 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=105 tn=6 bl=148 pwr=0
2025-03-30 06:33:26 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=105 tn=7 bl=148 pwr=0
2025-03-30 06:33:26 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=106 tn=0 bl=148 pwr=0
2025-03-30 06:33:26 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=106 tn=1 bl=148 pwr=0
2025-03-30 06:33:26 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=106 tn=2 bl=148 pwr=0
2025-03-30 06:33:26 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=106 tn=3 bl=148 pwr=0
2025-03-30 06:33:26 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=106 tn=4 bl=148 pwr=0
2025-03-30 06:33:26 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=106 tn=5 bl=148 pwr=0
2025-03-30 06:33:26 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=106 tn=6 bl=148 pwr=0
2025-03-30 06:33:26 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=106 tn=7 bl=148 pwr=0
2025-03-30 06:33:26 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=107 tn=0 bl=148 pwr=0
2025-03-30 06:33:26 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=107 tn=1 bl=148 pwr=0
2025-03-30 06:33:26 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=107 tn=2 bl=148 pwr=0
2025-03-30 06:33:26 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=107 tn=3 bl=148 pwr=0
2025-03-30 06:33:26 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=107 tn=4 bl=148 pwr=0
2025-03-30 06:33:26 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=107 tn=5 bl=148 pwr=0
2025-03-30 06:33:26 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=107 tn=6 bl=148 pwr=0
2025-03-30 06:33:26 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=107 tn=7 bl=148 pwr=0
2025-03-30 06:33:26 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 06:33:26 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 06:33:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:33:26 [DEBUG] fake_trx.py:317 (BTS@172.18.26.20:5700) Recv FAKE_CI cmd
2025-03-30 06:33:26 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:33:26 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:33:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:33:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:33:26 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:33:26 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:33:26 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:33:26 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:33:26 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-03-30 06:33:26 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:33:26 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:33:26 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:33:26 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:33:27 [DEBUG] clck_gen.py:128 IND CLOCK 306
2025-03-30 06:33:27 [DEBUG] clck_gen.py:128 IND CLOCK 408
2025-03-30 06:33:27 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:33:27 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:33:27 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:33:27 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:33:28 [DEBUG] clck_gen.py:128 IND CLOCK 510
2025-03-30 06:33:28 [DEBUG] clck_gen.py:128 IND CLOCK 612
2025-03-30 06:33:28 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:33:28 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:33:28 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:33:28 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:33:29 [DEBUG] clck_gen.py:128 IND CLOCK 714
2025-03-30 06:33:29 [DEBUG] clck_gen.py:128 IND CLOCK 816
2025-03-30 06:33:29 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:33:29 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:33:29 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:33:29 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:33:29 [DEBUG] clck_gen.py:128 IND CLOCK 918
2025-03-30 06:33:29 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:33:29 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:33:29 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:33:29 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:33:29 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:33:29 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:33:29 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:33:29 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:33:29 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:33:29 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:33:29 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 06:33:29 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 06:33:29 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 06:33:34 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 06:33:34 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 06:33:34 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:33:34 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:33:34 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:33:34 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:33:34 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:33:34 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 06:33:34 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:33:34 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 06:33:34 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 06:33:34 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 06:33:34 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 06:33:34 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 06:33:34 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:33:34 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:33:34 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 06:33:34 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 06:33:34 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 06:33:34 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 06:33:34 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 06:33:34 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 06:33:34 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:33:34 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 06:33:34 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:33:34 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 06:33:34 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 06:33:34 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 06:33:34 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 06:33:34 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 06:33:34 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:33:34 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:33:34 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 06:33:34 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 06:33:34 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 06:33:34 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 06:33:34 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 06:33:34 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 06:33:34 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 06:33:34 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 06:33:34 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 06:33:34 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 06:33:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 06:33:34 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:33:34 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 06:33:34 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 06:33:34 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:33:34 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:33:34 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 06:33:34 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 06:33:34 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 06:33:34 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 06:33:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:33:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:33:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:33:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 06:33:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:33:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:33:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:33:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:33:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:33:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:33:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:33:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:33:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:33:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:33:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:33:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:33:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:33:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:33:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:33:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:33:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:33:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:33:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:33:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:33:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:33:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:33:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:33:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:33:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:33:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:33:35 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-03-30 06:33:35 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-03-30 06:33:35 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-03-30 06:33:35 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-03-30 06:33:35 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-03-30 06:33:35 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-03-30 06:33:35 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-03-30 06:33:35 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-03-30 06:33:35 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-03-30 06:33:35 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-03-30 06:33:35 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 06:33:35 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 06:33:35 [DEBUG] fake_trx.py:317 (BTS@172.18.26.20:5700) Recv FAKE_CI cmd
2025-03-30 06:33:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:33:35 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:33:35 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:33:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:33:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:33:35 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:33:35 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:33:35 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:33:35 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:33:35 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-03-30 06:33:36 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:33:36 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:33:36 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:33:36 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:33:36 [DEBUG] clck_gen.py:128 IND CLOCK 306
2025-03-30 06:33:36 [DEBUG] clck_gen.py:128 IND CLOCK 408
2025-03-30 06:33:37 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:33:37 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:33:37 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:33:37 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:33:37 [DEBUG] clck_gen.py:128 IND CLOCK 510
2025-03-30 06:33:37 [DEBUG] clck_gen.py:128 IND CLOCK 612
2025-03-30 06:33:38 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:33:38 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:33:38 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:33:38 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:33:38 [DEBUG] clck_gen.py:128 IND CLOCK 714
2025-03-30 06:33:38 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:33:38 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:33:38 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:33:38 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:33:38 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:33:38 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:33:38 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:33:38 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:33:38 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:33:38 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:33:38 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 06:33:38 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 06:33:38 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 06:33:43 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 06:33:43 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 06:33:43 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:33:43 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:33:43 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:33:43 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:33:43 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:33:43 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 06:33:43 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:33:43 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 06:33:43 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 06:33:43 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 06:33:43 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 06:33:43 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 06:33:43 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:33:43 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:33:43 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 06:33:43 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 06:33:43 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 06:33:43 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 06:33:43 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 06:33:43 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 06:33:43 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:33:43 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:33:43 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 06:33:43 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 06:33:43 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 06:33:43 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 06:33:43 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 06:33:43 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 06:33:43 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:33:43 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:33:43 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 06:33:43 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 06:33:43 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 06:33:43 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 06:33:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 06:33:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 06:33:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 06:33:43 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 06:33:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 06:33:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 06:33:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 06:33:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 06:33:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:33:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:33:43 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 06:33:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:33:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:33:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:33:43 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 06:33:43 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 06:33:43 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 06:33:43 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 06:33:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:33:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:33:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:33:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 06:33:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:33:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:33:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:33:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:33:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:33:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:33:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:33:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:33:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:33:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:33:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:33:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:33:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:33:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:33:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:33:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:33:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:33:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:33:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:33:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:33:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:33:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:33:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:33:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:33:43 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-03-30 06:33:44 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-03-30 06:33:44 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-03-30 06:33:44 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-03-30 06:33:44 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-03-30 06:33:44 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-03-30 06:33:44 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-03-30 06:33:44 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-03-30 06:33:44 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-03-30 06:33:44 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-03-30 06:33:44 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=105 tn=0 bl=148 pwr=0
2025-03-30 06:33:44 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=105 tn=1 bl=148 pwr=0
2025-03-30 06:33:44 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=105 tn=2 bl=148 pwr=0
2025-03-30 06:33:44 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=105 tn=3 bl=148 pwr=0
2025-03-30 06:33:44 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=105 tn=4 bl=148 pwr=0
2025-03-30 06:33:44 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=105 tn=5 bl=148 pwr=0
2025-03-30 06:33:44 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=105 tn=6 bl=148 pwr=0
2025-03-30 06:33:44 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=105 tn=7 bl=148 pwr=0
2025-03-30 06:33:44 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=106 tn=0 bl=148 pwr=0
2025-03-30 06:33:44 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=106 tn=1 bl=148 pwr=0
2025-03-30 06:33:44 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=106 tn=2 bl=148 pwr=0
2025-03-30 06:33:44 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=106 tn=3 bl=148 pwr=0
2025-03-30 06:33:44 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=106 tn=4 bl=148 pwr=0
2025-03-30 06:33:44 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=106 tn=5 bl=148 pwr=0
2025-03-30 06:33:44 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=106 tn=6 bl=148 pwr=0
2025-03-30 06:33:44 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=106 tn=7 bl=148 pwr=0
2025-03-30 06:33:44 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=107 tn=0 bl=148 pwr=0
2025-03-30 06:33:44 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=107 tn=1 bl=148 pwr=0
2025-03-30 06:33:44 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=107 tn=2 bl=148 pwr=0
2025-03-30 06:33:44 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=107 tn=3 bl=148 pwr=0
2025-03-30 06:33:44 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=107 tn=4 bl=148 pwr=0
2025-03-30 06:33:44 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=107 tn=5 bl=148 pwr=0
2025-03-30 06:33:44 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=107 tn=6 bl=148 pwr=0
2025-03-30 06:33:44 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=107 tn=7 bl=148 pwr=0
2025-03-30 06:33:44 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=109): ver=1 fn=108 tn=0 bl=148 pwr=0
2025-03-30 06:33:44 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=109): ver=1 fn=108 tn=1 bl=148 pwr=0
2025-03-30 06:33:44 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=109): ver=1 fn=108 tn=2 bl=148 pwr=0
2025-03-30 06:33:44 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=109): ver=1 fn=108 tn=3 bl=148 pwr=0
2025-03-30 06:33:44 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=109): ver=1 fn=108 tn=4 bl=148 pwr=0
2025-03-30 06:33:44 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=109): ver=1 fn=108 tn=5 bl=148 pwr=0
2025-03-30 06:33:44 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=109): ver=1 fn=108 tn=6 bl=148 pwr=0
2025-03-30 06:33:44 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=109): ver=1 fn=108 tn=7 bl=148 pwr=0
2025-03-30 06:33:44 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 06:33:44 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 06:33:44 [DEBUG] fake_trx.py:317 (BTS@172.18.26.20:5700) Recv FAKE_CI cmd
2025-03-30 06:33:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:33:44 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-03-30 06:33:44 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:33:44 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:33:44 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:33:44 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:33:45 [DEBUG] clck_gen.py:128 IND CLOCK 306
2025-03-30 06:33:45 [DEBUG] clck_gen.py:128 IND CLOCK 408
2025-03-30 06:33:45 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:33:45 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:33:45 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:33:45 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:33:45 [DEBUG] clck_gen.py:128 IND CLOCK 510
2025-03-30 06:33:46 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:33:46 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:33:46 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:33:46 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:33:46 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:33:46 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:33:46 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:33:46 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:33:46 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 06:33:46 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 06:33:46 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 06:33:46 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=550 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:33:46 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=550 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:33:46 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=550 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:33:46 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=550 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:33:46 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=550 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:33:51 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 06:33:51 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 06:33:51 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:33:51 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:33:51 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:33:51 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:33:51 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:33:51 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 06:33:51 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:33:51 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 06:33:51 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 06:33:51 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 06:33:51 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 06:33:51 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 06:33:51 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:33:51 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:33:51 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 06:33:51 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 06:33:51 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 06:33:51 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 06:33:51 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 06:33:51 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 06:33:51 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:33:51 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:33:51 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 06:33:51 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 06:33:51 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 06:33:51 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 06:33:51 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 06:33:51 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 06:33:51 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:33:51 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:33:51 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 06:33:51 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 06:33:51 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 06:33:51 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 06:33:51 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 06:33:51 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 06:33:51 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 06:33:51 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 06:33:51 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 06:33:51 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 06:33:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 06:33:51 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:33:51 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 06:33:51 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 06:33:51 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:33:51 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:33:51 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 06:33:51 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 06:33:51 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 06:33:51 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 06:33:51 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:33:51 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:33:51 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:33:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 06:33:51 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:33:51 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:33:51 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:33:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:33:51 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:33:51 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:33:51 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:33:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:33:51 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:33:51 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:33:51 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:33:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:33:51 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:33:51 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:33:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:33:51 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:33:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:33:51 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:33:51 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:33:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:33:51 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:33:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:33:51 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:33:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:33:51 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:33:51 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:33:51 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-03-30 06:33:51 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-03-30 06:33:51 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-03-30 06:33:51 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-03-30 06:33:51 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-03-30 06:33:51 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-03-30 06:33:51 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-03-30 06:33:51 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-03-30 06:33:51 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-03-30 06:33:51 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-03-30 06:33:51 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=105 tn=0 bl=148 pwr=0
2025-03-30 06:33:51 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=105 tn=1 bl=148 pwr=0
2025-03-30 06:33:51 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=105 tn=2 bl=148 pwr=0
2025-03-30 06:33:51 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=105 tn=3 bl=148 pwr=0
2025-03-30 06:33:51 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=105 tn=4 bl=148 pwr=0
2025-03-30 06:33:51 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=105 tn=5 bl=148 pwr=0
2025-03-30 06:33:51 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=105 tn=6 bl=148 pwr=0
2025-03-30 06:33:51 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=105 tn=7 bl=148 pwr=0
2025-03-30 06:33:51 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=106 tn=0 bl=148 pwr=0
2025-03-30 06:33:51 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=106 tn=1 bl=148 pwr=0
2025-03-30 06:33:51 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=106 tn=2 bl=148 pwr=0
2025-03-30 06:33:51 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=106 tn=3 bl=148 pwr=0
2025-03-30 06:33:51 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=106 tn=4 bl=148 pwr=0
2025-03-30 06:33:51 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=106 tn=5 bl=148 pwr=0
2025-03-30 06:33:51 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=106 tn=6 bl=148 pwr=0
2025-03-30 06:33:51 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=106 tn=7 bl=148 pwr=0
2025-03-30 06:33:51 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=107 tn=0 bl=148 pwr=0
2025-03-30 06:33:51 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=107 tn=1 bl=148 pwr=0
2025-03-30 06:33:51 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=107 tn=2 bl=148 pwr=0
2025-03-30 06:33:51 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=107 tn=3 bl=148 pwr=0
2025-03-30 06:33:51 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=107 tn=4 bl=148 pwr=0
2025-03-30 06:33:51 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=107 tn=5 bl=148 pwr=0
2025-03-30 06:33:51 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=107 tn=6 bl=148 pwr=0
2025-03-30 06:33:51 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=107 tn=7 bl=148 pwr=0
2025-03-30 06:33:51 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 06:33:51 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 06:33:51 [DEBUG] fake_trx.py:317 (BTS@172.18.26.20:5700) Recv FAKE_CI cmd
2025-03-30 06:33:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:33:51 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:33:51 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:33:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:33:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:33:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:33:52 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-03-30 06:33:52 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:33:52 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:33:52 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:33:52 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:33:52 [DEBUG] clck_gen.py:128 IND CLOCK 306
2025-03-30 06:33:53 [DEBUG] clck_gen.py:128 IND CLOCK 408
2025-03-30 06:33:53 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:33:53 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:33:53 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:33:53 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:33:53 [DEBUG] clck_gen.py:128 IND CLOCK 510
2025-03-30 06:33:53 [DEBUG] clck_gen.py:128 IND CLOCK 612
2025-03-30 06:33:54 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:33:54 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:33:54 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:33:54 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:33:54 [DEBUG] clck_gen.py:128 IND CLOCK 714
2025-03-30 06:33:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:33:54 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:33:54 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:33:54 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:33:54 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:33:54 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:33:54 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:33:54 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:33:54 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:33:54 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 06:33:54 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 06:33:54 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 06:33:59 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 06:33:59 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 06:33:59 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:33:59 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:33:59 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:33:59 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:33:59 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:33:59 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 06:33:59 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:33:59 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 06:33:59 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 06:33:59 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 06:33:59 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 06:33:59 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 06:33:59 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:33:59 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 06:33:59 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:33:59 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 06:33:59 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 06:33:59 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 06:33:59 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 06:33:59 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 06:33:59 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:33:59 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 06:33:59 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:33:59 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 06:33:59 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 06:33:59 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 06:33:59 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 06:33:59 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 06:33:59 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:33:59 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 06:33:59 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:33:59 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 06:33:59 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 06:33:59 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 06:33:59 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 06:33:59 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 06:33:59 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 06:33:59 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 06:33:59 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 06:33:59 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 06:33:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 06:33:59 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:33:59 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 06:33:59 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 06:33:59 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:33:59 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:33:59 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 06:33:59 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 06:33:59 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 06:33:59 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 06:33:59 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:33:59 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:33:59 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:33:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 06:33:59 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:33:59 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:33:59 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:33:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:33:59 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:33:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:33:59 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:33:59 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:33:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:33:59 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:33:59 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:33:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:33:59 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:33:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:33:59 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:33:59 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:33:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:33:59 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:33:59 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:33:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:33:59 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:33:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:33:59 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:33:59 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:33:59 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:33:59 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:33:59 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-03-30 06:34:00 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-03-30 06:34:00 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-03-30 06:34:00 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-03-30 06:34:00 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-03-30 06:34:00 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-03-30 06:34:00 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-03-30 06:34:00 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-03-30 06:34:00 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-03-30 06:34:00 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-03-30 06:34:00 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=105 tn=0 bl=148 pwr=0
2025-03-30 06:34:00 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=105 tn=1 bl=148 pwr=0
2025-03-30 06:34:00 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=105 tn=2 bl=148 pwr=0
2025-03-30 06:34:00 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=105 tn=3 bl=148 pwr=0
2025-03-30 06:34:00 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=105 tn=4 bl=148 pwr=0
2025-03-30 06:34:00 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=105 tn=5 bl=148 pwr=0
2025-03-30 06:34:00 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=105 tn=6 bl=148 pwr=0
2025-03-30 06:34:00 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=105 tn=7 bl=148 pwr=0
2025-03-30 06:34:00 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=106 tn=0 bl=148 pwr=0
2025-03-30 06:34:00 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=106 tn=1 bl=148 pwr=0
2025-03-30 06:34:00 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=106 tn=2 bl=148 pwr=0
2025-03-30 06:34:00 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=106 tn=3 bl=148 pwr=0
2025-03-30 06:34:00 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=106 tn=4 bl=148 pwr=0
2025-03-30 06:34:00 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=106 tn=5 bl=148 pwr=0
2025-03-30 06:34:00 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=106 tn=6 bl=148 pwr=0
2025-03-30 06:34:00 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=106 tn=7 bl=148 pwr=0
2025-03-30 06:34:00 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=107 tn=0 bl=148 pwr=0
2025-03-30 06:34:00 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=107 tn=1 bl=148 pwr=0
2025-03-30 06:34:00 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=107 tn=2 bl=148 pwr=0
2025-03-30 06:34:00 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=107 tn=3 bl=148 pwr=0
2025-03-30 06:34:00 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=107 tn=4 bl=148 pwr=0
2025-03-30 06:34:00 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=107 tn=5 bl=148 pwr=0
2025-03-30 06:34:00 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=107 tn=6 bl=148 pwr=0
2025-03-30 06:34:00 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=107 tn=7 bl=148 pwr=0
2025-03-30 06:34:00 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 06:34:00 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 06:34:00 [DEBUG] fake_trx.py:317 (BTS@172.18.26.20:5700) Recv FAKE_CI cmd
2025-03-30 06:34:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:34:00 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:34:00 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:34:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:34:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:34:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:34:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:34:00 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:34:00 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:34:00 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:34:00 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:34:00 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:34:00 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:34:00 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:34:00 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:34:00 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 06:34:00 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 06:34:00 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 06:34:00 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=128 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:34:00 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=128 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:34:00 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=128 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:34:00 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=128 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:34:00 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=128 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:34:00 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=128 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:34:05 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 06:34:05 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 06:34:05 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:34:05 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:34:05 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:34:05 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:34:05 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:34:05 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 06:34:05 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:34:05 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 06:34:05 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 06:34:05 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 06:34:05 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 06:34:05 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 06:34:05 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:34:05 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:34:05 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 06:34:05 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 06:34:05 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 06:34:05 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 06:34:05 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 06:34:05 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 06:34:05 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:34:05 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:34:05 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 06:34:05 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 06:34:05 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 06:34:05 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 06:34:05 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 06:34:05 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 06:34:05 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:34:05 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:34:05 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 06:34:05 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 06:34:05 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 06:34:05 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 06:34:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 06:34:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 06:34:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 06:34:05 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 06:34:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 06:34:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 06:34:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 06:34:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:34:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 06:34:05 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 06:34:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:34:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:34:05 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 06:34:05 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 06:34:05 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 06:34:05 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 06:34:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:34:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:34:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:34:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 06:34:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:34:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:34:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:34:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:34:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:34:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:34:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:34:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:34:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:34:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:34:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:34:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:34:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:34:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:34:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:34:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:34:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:34:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:34:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:34:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:34:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:34:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:34:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:34:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:34:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:34:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:34:05 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-03-30 06:34:05 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-03-30 06:34:05 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-03-30 06:34:05 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-03-30 06:34:05 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-03-30 06:34:05 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-03-30 06:34:05 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-03-30 06:34:05 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-03-30 06:34:05 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-03-30 06:34:05 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-03-30 06:34:05 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=105 tn=0 bl=148 pwr=0
2025-03-30 06:34:05 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=105 tn=1 bl=148 pwr=0
2025-03-30 06:34:05 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=105 tn=2 bl=148 pwr=0
2025-03-30 06:34:05 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=105 tn=3 bl=148 pwr=0
2025-03-30 06:34:05 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=105 tn=4 bl=148 pwr=0
2025-03-30 06:34:05 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=105 tn=5 bl=148 pwr=0
2025-03-30 06:34:05 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=105 tn=6 bl=148 pwr=0
2025-03-30 06:34:05 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=105 tn=7 bl=148 pwr=0
2025-03-30 06:34:05 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=106 tn=0 bl=148 pwr=0
2025-03-30 06:34:05 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=106 tn=1 bl=148 pwr=0
2025-03-30 06:34:05 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=106 tn=2 bl=148 pwr=0
2025-03-30 06:34:05 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=106 tn=3 bl=148 pwr=0
2025-03-30 06:34:05 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=106 tn=4 bl=148 pwr=0
2025-03-30 06:34:05 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=106 tn=5 bl=148 pwr=0
2025-03-30 06:34:05 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=106 tn=6 bl=148 pwr=0
2025-03-30 06:34:05 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=106 tn=7 bl=148 pwr=0
2025-03-30 06:34:05 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=107 tn=0 bl=148 pwr=0
2025-03-30 06:34:05 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=107 tn=1 bl=148 pwr=0
2025-03-30 06:34:05 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=107 tn=2 bl=148 pwr=0
2025-03-30 06:34:05 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=107 tn=3 bl=148 pwr=0
2025-03-30 06:34:05 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=107 tn=4 bl=148 pwr=0
2025-03-30 06:34:05 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=107 tn=5 bl=148 pwr=0
2025-03-30 06:34:05 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=107 tn=6 bl=148 pwr=0
2025-03-30 06:34:05 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=107 tn=7 bl=148 pwr=0
2025-03-30 06:34:05 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 06:34:05 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 06:34:05 [DEBUG] fake_trx.py:317 (BTS@172.18.26.20:5700) Recv FAKE_CI cmd
2025-03-30 06:34:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:34:05 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:34:05 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:34:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:34:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:34:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:34:06 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-03-30 06:34:06 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:34:06 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:34:06 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:34:06 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:34:06 [DEBUG] clck_gen.py:128 IND CLOCK 306
2025-03-30 06:34:07 [DEBUG] clck_gen.py:128 IND CLOCK 408
2025-03-30 06:34:07 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:34:07 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:34:07 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:34:07 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:34:07 [DEBUG] clck_gen.py:128 IND CLOCK 510
2025-03-30 06:34:08 [DEBUG] clck_gen.py:128 IND CLOCK 612
2025-03-30 06:34:08 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:34:08 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:34:08 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:34:08 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:34:08 [DEBUG] clck_gen.py:128 IND CLOCK 714
2025-03-30 06:34:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:34:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:34:08 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:34:08 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:34:08 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:34:08 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:34:08 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:34:08 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:34:08 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:34:08 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:34:08 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 06:34:08 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 06:34:08 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 06:34:08 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=782 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:34:08 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=782 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:34:08 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=782 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:34:08 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=782 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:34:08 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=782 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:34:08 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=782 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:34:08 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=782 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:34:09 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=782 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:34:13 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 06:34:13 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 06:34:13 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:34:13 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:34:13 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:34:13 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:34:14 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:34:14 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 06:34:14 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:34:14 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 06:34:14 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 06:34:14 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 06:34:14 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 06:34:14 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 06:34:14 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:34:14 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:34:14 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 06:34:14 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 06:34:14 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 06:34:14 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 06:34:14 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 06:34:14 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 06:34:14 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:34:14 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:34:14 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 06:34:14 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 06:34:14 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 06:34:14 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 06:34:14 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 06:34:14 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 06:34:14 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:34:14 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:34:14 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 06:34:14 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 06:34:14 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 06:34:14 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 06:34:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 06:34:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 06:34:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 06:34:14 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 06:34:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 06:34:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 06:34:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 06:34:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:34:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 06:34:14 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 06:34:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:34:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:34:14 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 06:34:14 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 06:34:14 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 06:34:14 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 06:34:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:34:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:34:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:34:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 06:34:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:34:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:34:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:34:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:34:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:34:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:34:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:34:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:34:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:34:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:34:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:34:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:34:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:34:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:34:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:34:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:34:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:34:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:34:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:34:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:34:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:34:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:34:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:34:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:34:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:34:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:34:14 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-03-30 06:34:14 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-03-30 06:34:14 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-03-30 06:34:14 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-03-30 06:34:14 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-03-30 06:34:14 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-03-30 06:34:14 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-03-30 06:34:14 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-03-30 06:34:14 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-03-30 06:34:14 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-03-30 06:34:14 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=0 bl=148 pwr=0
2025-03-30 06:34:14 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=1 bl=148 pwr=0
2025-03-30 06:34:14 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=2 bl=148 pwr=0
2025-03-30 06:34:14 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=3 bl=148 pwr=0
2025-03-30 06:34:14 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=4 bl=148 pwr=0
2025-03-30 06:34:14 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=5 bl=148 pwr=0
2025-03-30 06:34:14 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=6 bl=148 pwr=0
2025-03-30 06:34:14 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=7 bl=148 pwr=0
2025-03-30 06:34:14 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 06:34:14 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 06:34:14 [DEBUG] fake_trx.py:317 (BTS@172.18.26.20:5700) Recv FAKE_CI cmd
2025-03-30 06:34:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:34:14 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:34:14 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:34:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:34:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:34:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:34:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:34:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:34:14 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:34:14 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:34:14 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:34:14 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:34:14 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:34:14 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:34:14 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:34:14 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:34:14 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 06:34:14 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 06:34:14 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 06:34:14 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=132 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:34:14 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=132 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:34:14 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=132 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:34:14 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=132 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:34:14 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=132 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:34:14 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=132 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:34:14 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=133 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:34:14 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=133 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:34:14 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=133 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:34:14 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=133 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:34:14 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=133 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:34:14 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=133 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:34:14 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=133 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:34:14 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=133 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:34:19 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 06:34:19 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 06:34:19 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:34:19 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:34:19 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:34:19 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:34:19 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:34:19 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 06:34:19 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:34:19 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 06:34:19 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 06:34:19 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 06:34:19 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 06:34:19 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 06:34:19 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:34:19 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:34:19 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 06:34:19 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 06:34:19 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 06:34:19 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 06:34:19 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 06:34:19 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 06:34:19 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:34:19 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:34:19 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 06:34:19 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 06:34:19 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 06:34:19 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 06:34:19 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 06:34:19 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 06:34:19 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:34:19 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 06:34:19 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:34:19 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 06:34:19 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 06:34:19 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 06:34:19 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 06:34:19 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 06:34:19 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 06:34:19 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 06:34:19 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 06:34:19 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 06:34:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 06:34:19 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:34:19 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 06:34:19 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 06:34:19 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:34:19 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:34:19 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 06:34:19 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 06:34:19 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 06:34:19 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 06:34:19 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:34:19 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:34:19 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:34:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 06:34:19 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:34:19 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:34:19 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:34:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:34:19 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:34:19 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:34:19 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:34:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:34:19 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:34:19 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:34:19 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:34:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:34:19 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:34:19 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:34:19 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:34:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:34:19 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:34:19 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:34:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:34:19 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:34:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:34:19 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:34:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:34:19 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:34:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:34:19 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:34:19 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-03-30 06:34:20 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-03-30 06:34:20 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-03-30 06:34:20 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-03-30 06:34:20 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-03-30 06:34:20 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-03-30 06:34:20 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-03-30 06:34:20 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-03-30 06:34:20 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-03-30 06:34:20 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-03-30 06:34:20 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=0 bl=148 pwr=0
2025-03-30 06:34:20 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=1 bl=148 pwr=0
2025-03-30 06:34:20 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=2 bl=148 pwr=0
2025-03-30 06:34:20 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=3 bl=148 pwr=0
2025-03-30 06:34:20 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=4 bl=148 pwr=0
2025-03-30 06:34:20 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=5 bl=148 pwr=0
2025-03-30 06:34:20 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=6 bl=148 pwr=0
2025-03-30 06:34:20 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=7 bl=148 pwr=0
2025-03-30 06:34:20 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 06:34:20 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 06:34:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:34:20 [DEBUG] fake_trx.py:317 (BTS@172.18.26.20:5700) Recv FAKE_CI cmd
2025-03-30 06:34:20 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:34:20 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:34:20 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:34:20 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:34:20 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:34:20 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:34:20 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:34:20 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:34:20 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 06:34:20 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 06:34:20 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 06:34:20 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=120 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:34:20 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=120 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:34:20 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=120 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:34:20 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=120 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:34:20 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=120 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:34:20 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=120 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:34:20 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=121 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:34:20 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=121 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:34:20 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=121 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:34:20 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=121 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:34:20 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=121 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:34:20 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=121 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:34:20 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=121 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:34:20 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=121 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:34:25 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 06:34:25 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 06:34:25 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:34:25 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:34:25 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:34:25 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:34:25 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:34:25 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 06:34:25 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:34:25 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 06:34:25 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 06:34:25 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 06:34:25 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 06:34:25 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 06:34:25 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:34:25 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:34:25 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 06:34:25 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 06:34:25 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 06:34:25 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 06:34:25 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 06:34:25 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 06:34:25 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:34:25 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:34:25 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 06:34:25 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 06:34:25 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 06:34:25 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 06:34:25 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 06:34:25 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 06:34:25 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:34:25 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:34:25 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 06:34:25 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 06:34:25 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 06:34:25 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 06:34:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 06:34:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 06:34:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 06:34:25 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 06:34:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 06:34:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 06:34:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 06:34:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:34:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 06:34:25 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 06:34:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:34:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:34:25 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 06:34:25 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 06:34:25 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 06:34:25 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 06:34:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:34:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:34:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:34:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 06:34:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:34:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:34:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:34:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:34:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:34:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:34:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:34:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:34:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:34:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:34:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:34:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:34:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:34:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:34:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:34:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:34:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:34:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:34:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:34:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:34:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:34:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:34:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:34:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:34:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:34:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:34:25 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-03-30 06:34:25 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-03-30 06:34:25 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-03-30 06:34:25 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-03-30 06:34:25 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-03-30 06:34:25 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-03-30 06:34:25 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-03-30 06:34:25 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-03-30 06:34:25 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-03-30 06:34:25 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-03-30 06:34:25 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 06:34:25 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 06:34:25 [DEBUG] fake_trx.py:317 (BTS@172.18.26.20:5700) Recv FAKE_CI cmd
2025-03-30 06:34:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:34:25 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:34:25 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:34:25 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:34:25 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:34:25 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:34:25 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:34:25 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:34:25 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:34:25 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 06:34:25 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 06:34:25 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 06:34:25 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=113 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:34:25 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=113 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:34:25 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=113 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:34:25 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=113 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:34:30 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 06:34:30 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 06:34:30 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:34:30 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:34:30 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:34:30 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:34:30 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:34:30 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 06:34:30 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:34:30 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 06:34:30 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 06:34:30 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 06:34:30 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 06:34:30 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 06:34:30 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:34:30 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:34:30 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 06:34:30 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 06:34:30 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 06:34:30 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 06:34:30 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 06:34:30 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 06:34:30 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:34:30 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:34:30 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 06:34:30 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 06:34:30 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 06:34:30 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 06:34:30 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 06:34:30 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 06:34:30 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:34:30 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:34:30 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 06:34:30 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 06:34:30 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 06:34:30 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 06:34:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 06:34:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 06:34:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 06:34:30 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 06:34:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 06:34:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 06:34:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 06:34:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:34:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 06:34:30 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 06:34:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:34:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:34:30 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 06:34:30 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 06:34:30 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 06:34:30 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 06:34:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:34:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:34:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:34:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 06:34:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:34:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:34:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:34:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:34:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:34:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:34:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:34:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:34:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:34:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:34:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:34:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:34:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:34:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:34:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:34:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:34:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:34:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:34:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:34:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:34:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:34:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:34:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:34:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:34:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:34:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:34:30 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-03-30 06:34:31 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-03-30 06:34:31 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-03-30 06:34:31 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-03-30 06:34:31 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-03-30 06:34:31 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-03-30 06:34:31 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-03-30 06:34:31 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-03-30 06:34:31 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-03-30 06:34:31 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-03-30 06:34:31 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=0 bl=148 pwr=0
2025-03-30 06:34:31 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=1 bl=148 pwr=0
2025-03-30 06:34:31 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=2 bl=148 pwr=0
2025-03-30 06:34:31 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=3 bl=148 pwr=0
2025-03-30 06:34:31 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=4 bl=148 pwr=0
2025-03-30 06:34:31 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=5 bl=148 pwr=0
2025-03-30 06:34:31 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=6 bl=148 pwr=0
2025-03-30 06:34:31 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=7 bl=148 pwr=0
2025-03-30 06:34:31 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 06:34:31 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 06:34:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:34:31 [DEBUG] fake_trx.py:317 (BTS@172.18.26.20:5700) Recv FAKE_CI cmd
2025-03-30 06:34:31 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:34:31 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:34:31 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:34:31 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:34:31 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:34:31 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:34:31 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:34:31 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:34:31 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 06:34:31 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 06:34:31 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 06:34:36 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 06:34:36 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 06:34:36 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:34:36 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:34:36 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:34:36 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:34:36 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:34:36 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 06:34:36 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:34:36 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 06:34:36 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 06:34:36 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 06:34:36 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 06:34:36 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 06:34:36 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:34:36 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:34:36 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 06:34:36 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 06:34:36 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 06:34:36 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 06:34:36 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 06:34:36 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 06:34:36 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:34:36 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:34:36 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 06:34:36 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 06:34:36 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 06:34:36 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 06:34:36 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 06:34:36 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 06:34:36 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:34:36 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:34:36 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 06:34:36 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 06:34:36 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 06:34:36 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 06:34:36 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 06:34:36 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 06:34:36 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 06:34:36 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 06:34:36 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 06:34:36 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 06:34:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 06:34:36 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:34:36 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 06:34:36 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 06:34:36 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:34:36 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:34:36 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 06:34:36 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 06:34:36 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 06:34:36 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 06:34:36 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:34:36 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:34:36 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:34:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 06:34:36 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:34:36 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:34:36 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:34:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:34:36 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:34:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:34:36 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:34:36 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:34:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:34:36 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:34:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:34:36 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:34:36 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:34:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:34:36 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:34:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:34:36 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:34:36 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:34:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:34:36 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:34:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:34:36 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:34:36 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:34:36 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:34:36 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:34:36 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:34:36 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-03-30 06:34:36 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-03-30 06:34:36 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-03-30 06:34:36 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-03-30 06:34:36 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-03-30 06:34:36 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-03-30 06:34:36 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-03-30 06:34:36 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-03-30 06:34:36 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-03-30 06:34:36 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-03-30 06:34:36 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=0 bl=148 pwr=0
2025-03-30 06:34:36 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=1 bl=148 pwr=0
2025-03-30 06:34:36 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=2 bl=148 pwr=0
2025-03-30 06:34:36 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=3 bl=148 pwr=0
2025-03-30 06:34:36 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=4 bl=148 pwr=0
2025-03-30 06:34:36 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=5 bl=148 pwr=0
2025-03-30 06:34:36 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=6 bl=148 pwr=0
2025-03-30 06:34:36 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=7 bl=148 pwr=0
2025-03-30 06:34:36 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 06:34:36 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 06:34:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:34:36 [DEBUG] fake_trx.py:317 (BTS@172.18.26.20:5700) Recv FAKE_CI cmd
2025-03-30 06:34:36 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:34:36 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:34:36 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:34:36 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:34:36 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:34:36 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:34:36 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:34:36 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:34:36 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 06:34:36 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 06:34:36 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 06:34:36 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=116 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:34:36 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=116 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:34:36 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=116 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:34:36 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=116 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:34:36 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=116 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:34:36 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=116 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:34:36 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=117 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:34:36 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=117 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:34:36 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=117 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:34:36 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=117 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:34:36 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=117 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:34:36 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=117 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:34:36 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=117 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:34:36 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=117 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:34:36 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=118 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:34:36 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=118 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:34:36 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=118 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:34:36 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=118 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:34:36 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=118 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:34:36 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=118 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:34:36 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=118 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:34:36 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=118 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:34:41 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 06:34:41 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 06:34:41 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:34:41 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:34:41 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:34:41 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:34:41 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:34:41 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 06:34:41 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:34:41 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 06:34:41 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 06:34:41 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 06:34:41 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 06:34:41 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 06:34:41 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:34:41 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:34:41 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 06:34:41 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 06:34:41 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 06:34:41 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 06:34:41 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 06:34:41 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 06:34:41 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:34:41 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:34:41 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 06:34:41 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 06:34:41 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 06:34:41 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 06:34:41 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 06:34:41 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 06:34:41 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:34:41 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:34:41 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 06:34:41 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 06:34:41 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 06:34:41 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 06:34:41 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 06:34:41 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 06:34:41 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 06:34:41 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 06:34:41 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 06:34:41 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 06:34:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 06:34:41 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:34:41 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:34:41 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 06:34:41 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 06:34:41 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:34:41 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:34:41 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 06:34:41 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 06:34:41 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 06:34:41 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 06:34:41 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:34:41 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:34:41 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:34:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 06:34:41 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:34:41 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:34:41 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:34:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:34:41 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:34:41 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:34:41 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:34:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:34:41 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:34:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:34:41 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:34:41 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:34:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:34:41 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:34:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:34:41 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:34:41 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:34:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:34:41 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:34:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:34:41 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:34:41 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:34:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:34:41 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:34:41 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:34:41 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-03-30 06:34:42 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-03-30 06:34:42 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=107): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-03-30 06:34:42 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=107): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-03-30 06:34:42 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=107): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-03-30 06:34:42 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=107): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-03-30 06:34:42 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=107): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-03-30 06:34:42 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=107): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-03-30 06:34:42 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=107): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-03-30 06:34:42 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=107): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-03-30 06:34:42 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=107): ver=1 fn=105 tn=0 bl=148 pwr=0
2025-03-30 06:34:42 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=107): ver=1 fn=105 tn=1 bl=148 pwr=0
2025-03-30 06:34:42 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=107): ver=1 fn=105 tn=2 bl=148 pwr=0
2025-03-30 06:34:42 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=107): ver=1 fn=105 tn=3 bl=148 pwr=0
2025-03-30 06:34:42 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=107): ver=1 fn=105 tn=4 bl=148 pwr=0
2025-03-30 06:34:42 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=107): ver=1 fn=105 tn=5 bl=148 pwr=0
2025-03-30 06:34:42 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=107): ver=1 fn=105 tn=6 bl=148 pwr=0
2025-03-30 06:34:42 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=107): ver=1 fn=105 tn=7 bl=148 pwr=0
2025-03-30 06:34:42 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=107): ver=1 fn=106 tn=0 bl=148 pwr=0
2025-03-30 06:34:42 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=107): ver=1 fn=106 tn=1 bl=148 pwr=0
2025-03-30 06:34:42 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=107): ver=1 fn=106 tn=2 bl=148 pwr=0
2025-03-30 06:34:42 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=107): ver=1 fn=106 tn=3 bl=148 pwr=0
2025-03-30 06:34:42 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=107): ver=1 fn=106 tn=4 bl=148 pwr=0
2025-03-30 06:34:42 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=107): ver=1 fn=106 tn=5 bl=148 pwr=0
2025-03-30 06:34:42 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=107): ver=1 fn=106 tn=6 bl=148 pwr=0
2025-03-30 06:34:42 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=107): ver=1 fn=106 tn=7 bl=148 pwr=0
2025-03-30 06:34:42 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 06:34:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:34:42 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 06:34:42 [DEBUG] fake_trx.py:317 (BTS@172.18.26.20:5700) Recv FAKE_CI cmd
2025-03-30 06:34:42 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-03-30 06:34:42 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:34:42 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:34:42 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:34:42 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:34:43 [DEBUG] clck_gen.py:128 IND CLOCK 306
2025-03-30 06:34:43 [DEBUG] clck_gen.py:128 IND CLOCK 408
2025-03-30 06:34:43 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:34:43 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:34:43 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:34:43 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:34:44 [DEBUG] clck_gen.py:128 IND CLOCK 510
2025-03-30 06:34:44 [DEBUG] clck_gen.py:128 IND CLOCK 612
2025-03-30 06:34:44 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:34:44 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:34:44 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:34:44 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:34:45 [DEBUG] clck_gen.py:128 IND CLOCK 714
2025-03-30 06:34:45 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:34:45 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:34:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:34:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:34:45 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:34:45 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:34:45 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:34:45 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:34:45 [DEBUG] clck_gen.py:128 IND CLOCK 816
2025-03-30 06:34:45 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:34:45 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:34:45 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:34:45 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:34:46 [DEBUG] clck_gen.py:128 IND CLOCK 918
2025-03-30 06:34:46 [DEBUG] clck_gen.py:128 IND CLOCK 1020
2025-03-30 06:34:46 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:34:46 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:34:46 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:34:46 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:34:47 [DEBUG] clck_gen.py:128 IND CLOCK 1122
2025-03-30 06:34:47 [DEBUG] clck_gen.py:128 IND CLOCK 1224
2025-03-30 06:34:47 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:34:47 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:34:47 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:34:47 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:34:47 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:34:47 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:34:47 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:34:47 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 06:34:47 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 06:34:47 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 06:34:47 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=1254 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:34:47 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:34:47 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:34:47 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:34:47 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=1254 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:34:47 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=1254 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:34:47 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=1254 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:34:47 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=1254 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:34:47 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=1254 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:34:47 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=1254 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:34:47 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=1254 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:34:47 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=1255 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:34:47 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=1255 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:34:47 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=1255 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:34:47 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=1255 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:34:47 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=1255 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:34:47 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=1255 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:34:47 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=1255 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:34:47 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=1255 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:34:47 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=1256 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:34:47 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=1256 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:34:47 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=1256 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:34:47 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=1256 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:34:47 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=1256 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:34:47 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=1256 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:34:47 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=1256 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:34:47 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=1256 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:34:52 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 06:34:52 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 06:34:52 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:34:52 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:34:52 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:34:52 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:34:52 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:34:52 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 06:34:52 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:34:52 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 06:34:52 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 06:34:52 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 06:34:52 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 06:34:52 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 06:34:52 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:34:52 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:34:52 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 06:34:52 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 06:34:52 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 06:34:52 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 06:34:52 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 06:34:52 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 06:34:52 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:34:52 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:34:52 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 06:34:52 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 06:34:52 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 06:34:52 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 06:34:52 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 06:34:52 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 06:34:52 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:34:52 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:34:52 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 06:34:52 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 06:34:52 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 06:34:52 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 06:34:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 06:34:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 06:34:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 06:34:52 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 06:34:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 06:34:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 06:34:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 06:34:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 06:34:52 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 06:34:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:34:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:34:52 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 06:34:52 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 06:34:52 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 06:34:52 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 06:34:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:34:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:34:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:34:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 06:34:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:34:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:34:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:34:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:34:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:34:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:34:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:34:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:34:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:34:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:34:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:34:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:34:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:34:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:34:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:34:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:34:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:34:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:34:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:34:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:34:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:34:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:34:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:34:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:34:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:34:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:34:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:34:52 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-03-30 06:34:53 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-03-30 06:34:53 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-03-30 06:34:53 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-03-30 06:34:53 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-03-30 06:34:53 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-03-30 06:34:53 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-03-30 06:34:53 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-03-30 06:34:53 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-03-30 06:34:53 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-03-30 06:34:53 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=0 bl=148 pwr=0
2025-03-30 06:34:53 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=1 bl=148 pwr=0
2025-03-30 06:34:53 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=2 bl=148 pwr=0
2025-03-30 06:34:53 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=3 bl=148 pwr=0
2025-03-30 06:34:53 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=4 bl=148 pwr=0
2025-03-30 06:34:53 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=5 bl=148 pwr=0
2025-03-30 06:34:53 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=6 bl=148 pwr=0
2025-03-30 06:34:53 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=7 bl=148 pwr=0
2025-03-30 06:34:53 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 06:34:53 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 06:34:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:34:53 [DEBUG] fake_trx.py:317 (BTS@172.18.26.20:5700) Recv FAKE_CI cmd
2025-03-30 06:34:53 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:34:53 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:34:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:34:53 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:34:53 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:34:53 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:34:53 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:34:53 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:34:53 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:34:53 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:34:53 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:34:53 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 06:34:53 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 06:34:53 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 06:34:53 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=130 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:34:53 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=130 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:34:53 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=130 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:34:53 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=130 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:34:53 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=130 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:34:53 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=130 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:34:53 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=131 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:34:53 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=131 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:34:53 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=131 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:34:53 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=131 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:34:53 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=131 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:34:53 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=131 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:34:53 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=131 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:34:53 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=131 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:34:58 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 06:34:58 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 06:34:58 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:34:58 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:34:58 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:34:58 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:34:58 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:34:58 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 06:34:58 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:34:58 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 06:34:58 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 06:34:58 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 06:34:58 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 06:34:58 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 06:34:58 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:34:58 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:34:58 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 06:34:58 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 06:34:58 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 06:34:58 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 06:34:58 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 06:34:58 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 06:34:58 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:34:58 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:34:58 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 06:34:58 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 06:34:58 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 06:34:58 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 06:34:58 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 06:34:58 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 06:34:58 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:34:58 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:34:58 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 06:34:58 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 06:34:58 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 06:34:58 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 06:34:58 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 06:34:58 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 06:34:58 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 06:34:58 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 06:34:58 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 06:34:58 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 06:34:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 06:34:58 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:34:58 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 06:34:58 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 06:34:58 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:34:58 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:34:58 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 06:34:58 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 06:34:58 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 06:34:58 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 06:34:58 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:34:58 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:34:58 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:34:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 06:34:58 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:34:58 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:34:58 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:34:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:34:58 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:34:58 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:34:58 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:34:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:34:58 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:34:58 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:34:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:34:58 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:34:58 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:34:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:34:58 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:34:58 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:34:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:34:58 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:34:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:34:58 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:34:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:34:58 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:34:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:34:58 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:34:58 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:34:58 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:34:58 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-03-30 06:34:58 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-03-30 06:34:58 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-03-30 06:34:58 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-03-30 06:34:58 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-03-30 06:34:58 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-03-30 06:34:58 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-03-30 06:34:58 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-03-30 06:34:58 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-03-30 06:34:58 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-03-30 06:34:58 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=105 tn=0 bl=148 pwr=0
2025-03-30 06:34:58 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=105 tn=1 bl=148 pwr=0
2025-03-30 06:34:58 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=105 tn=2 bl=148 pwr=0
2025-03-30 06:34:58 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=105 tn=3 bl=148 pwr=0
2025-03-30 06:34:58 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=105 tn=4 bl=148 pwr=0
2025-03-30 06:34:58 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=105 tn=5 bl=148 pwr=0
2025-03-30 06:34:58 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=105 tn=6 bl=148 pwr=0
2025-03-30 06:34:58 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=105 tn=7 bl=148 pwr=0
2025-03-30 06:34:58 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=106 tn=0 bl=148 pwr=0
2025-03-30 06:34:58 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=106 tn=1 bl=148 pwr=0
2025-03-30 06:34:58 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=106 tn=2 bl=148 pwr=0
2025-03-30 06:34:58 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=106 tn=3 bl=148 pwr=0
2025-03-30 06:34:58 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=106 tn=4 bl=148 pwr=0
2025-03-30 06:34:58 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=106 tn=5 bl=148 pwr=0
2025-03-30 06:34:58 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=106 tn=6 bl=148 pwr=0
2025-03-30 06:34:58 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=106 tn=7 bl=148 pwr=0
2025-03-30 06:34:58 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=107 tn=0 bl=148 pwr=0
2025-03-30 06:34:58 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=107 tn=1 bl=148 pwr=0
2025-03-30 06:34:58 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=107 tn=2 bl=148 pwr=0
2025-03-30 06:34:58 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=107 tn=3 bl=148 pwr=0
2025-03-30 06:34:58 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=107 tn=4 bl=148 pwr=0
2025-03-30 06:34:58 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=107 tn=5 bl=148 pwr=0
2025-03-30 06:34:58 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=107 tn=6 bl=148 pwr=0
2025-03-30 06:34:58 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=107 tn=7 bl=148 pwr=0
2025-03-30 06:34:58 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 06:34:58 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 06:34:58 [DEBUG] fake_trx.py:317 (BTS@172.18.26.20:5700) Recv FAKE_CI cmd
2025-03-30 06:34:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:34:58 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:34:58 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:34:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:34:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:34:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:34:58 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:34:58 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:34:58 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:34:58 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:34:58 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:34:58 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:34:58 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:34:58 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:34:58 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 06:34:58 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 06:34:58 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 06:34:58 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=127 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:34:58 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=127 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:34:58 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=127 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:34:58 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=127 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:34:58 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=127 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:34:58 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=127 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:34:58 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=127 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:34:58 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=127 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:35:03 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 06:35:03 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 06:35:03 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:35:03 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:35:03 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:35:03 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:35:03 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:35:03 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 06:35:03 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:35:03 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 06:35:03 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 06:35:04 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 06:35:04 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 06:35:04 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 06:35:04 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:35:04 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:35:04 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 06:35:04 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 06:35:04 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 06:35:04 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 06:35:04 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 06:35:04 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 06:35:04 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:35:04 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:35:04 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 06:35:04 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 06:35:04 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 06:35:04 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 06:35:04 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 06:35:04 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 06:35:04 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:35:04 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:35:04 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 06:35:04 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 06:35:04 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 06:35:04 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 06:35:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 06:35:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 06:35:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 06:35:04 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 06:35:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 06:35:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 06:35:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 06:35:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:35:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 06:35:04 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 06:35:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:35:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:35:04 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 06:35:04 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 06:35:04 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 06:35:04 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 06:35:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:35:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:35:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:35:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 06:35:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:35:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:35:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:35:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:35:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:35:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:35:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:35:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:35:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:35:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:35:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:35:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:35:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:35:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:35:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:35:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:35:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:35:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:35:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:35:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:35:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:35:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:35:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:35:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:35:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:35:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:35:04 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-03-30 06:35:04 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-03-30 06:35:04 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-03-30 06:35:04 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-03-30 06:35:04 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-03-30 06:35:04 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-03-30 06:35:04 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-03-30 06:35:04 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-03-30 06:35:04 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-03-30 06:35:04 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-03-30 06:35:04 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=0 bl=148 pwr=0
2025-03-30 06:35:04 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=1 bl=148 pwr=0
2025-03-30 06:35:04 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=2 bl=148 pwr=0
2025-03-30 06:35:04 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=3 bl=148 pwr=0
2025-03-30 06:35:04 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=4 bl=148 pwr=0
2025-03-30 06:35:04 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=5 bl=148 pwr=0
2025-03-30 06:35:04 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=6 bl=148 pwr=0
2025-03-30 06:35:04 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=7 bl=148 pwr=0
2025-03-30 06:35:04 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 06:35:04 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 06:35:04 [DEBUG] fake_trx.py:317 (BTS@172.18.26.20:5700) Recv FAKE_CI cmd
2025-03-30 06:35:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:35:04 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:35:04 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:35:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:35:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:35:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:35:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:35:04 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:35:04 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:35:04 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:35:04 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:35:04 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:35:04 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:35:04 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:35:04 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:35:04 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 06:35:04 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 06:35:04 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 06:35:04 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=123 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:35:04 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=123 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:35:04 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=123 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:35:04 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=123 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:35:04 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=123 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:35:04 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=123 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:35:04 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=124 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:35:04 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=124 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:35:04 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=124 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:35:04 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=124 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:35:04 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=124 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:35:04 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=124 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:35:04 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=124 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:35:04 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=124 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:35:04 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=125 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:35:04 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=125 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:35:04 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=125 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:35:04 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=125 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:35:04 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=125 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:35:04 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=125 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:35:04 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=125 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:35:04 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=125 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:35:09 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 06:35:09 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 06:35:09 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:35:09 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:35:09 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:35:09 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:35:09 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:35:09 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 06:35:09 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:35:09 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 06:35:09 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 06:35:09 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 06:35:09 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 06:35:09 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 06:35:09 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:35:09 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 06:35:09 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:35:09 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 06:35:09 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 06:35:09 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 06:35:09 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 06:35:09 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 06:35:09 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:35:09 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 06:35:09 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:35:09 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 06:35:09 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 06:35:09 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 06:35:09 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 06:35:09 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 06:35:09 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:35:09 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:35:09 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 06:35:09 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 06:35:09 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 06:35:09 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 06:35:09 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 06:35:09 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 06:35:09 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 06:35:09 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 06:35:09 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 06:35:09 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 06:35:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 06:35:09 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:35:09 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 06:35:09 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 06:35:09 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:35:09 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:35:09 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 06:35:09 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 06:35:09 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 06:35:09 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 06:35:09 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:35:09 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:35:09 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:35:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 06:35:09 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:35:09 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:35:09 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:35:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:35:09 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:35:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:35:09 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:35:09 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:35:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:35:09 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:35:09 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:35:09 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:35:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:35:09 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:35:09 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:35:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:35:09 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:35:09 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:35:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:35:09 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:35:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:35:09 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:35:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:35:09 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:35:09 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:35:09 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:35:09 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-03-30 06:35:10 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-03-30 06:35:10 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-03-30 06:35:10 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-03-30 06:35:10 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-03-30 06:35:10 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-03-30 06:35:10 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-03-30 06:35:10 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-03-30 06:35:10 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-03-30 06:35:10 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-03-30 06:35:10 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 06:35:10 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 06:35:10 [DEBUG] fake_trx.py:317 (BTS@172.18.26.20:5700) Recv FAKE_CI cmd
2025-03-30 06:35:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:35:10 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:35:10 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:35:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:35:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:35:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:35:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:35:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:35:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:35:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:35:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:35:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:35:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:35:10 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:35:10 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:35:10 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:35:10 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:35:10 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:35:10 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:35:10 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:35:10 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:35:10 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 06:35:10 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 06:35:10 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 06:35:10 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=124 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:35:10 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=124 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:35:10 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=124 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:35:10 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=124 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:35:10 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=124 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:35:10 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=124 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:35:15 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 06:35:15 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 06:35:15 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:35:15 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:35:15 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:35:15 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:35:15 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:35:15 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 06:35:15 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:35:15 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 06:35:15 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 06:35:15 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 06:35:15 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 06:35:15 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 06:35:15 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:35:15 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:35:15 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 06:35:15 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 06:35:15 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 06:35:15 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 06:35:15 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 06:35:15 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 06:35:15 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:35:15 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:35:15 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 06:35:15 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 06:35:15 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 06:35:15 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 06:35:15 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 06:35:15 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 06:35:15 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:35:15 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:35:15 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 06:35:15 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 06:35:15 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 06:35:15 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 06:35:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 06:35:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 06:35:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 06:35:15 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 06:35:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 06:35:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 06:35:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 06:35:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:35:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 06:35:15 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 06:35:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:35:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:35:15 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 06:35:15 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 06:35:15 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 06:35:15 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 06:35:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:35:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:35:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:35:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 06:35:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:35:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:35:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:35:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:35:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:35:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:35:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:35:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:35:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:35:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:35:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:35:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:35:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:35:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:35:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:35:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:35:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:35:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:35:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:35:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:35:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:35:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:35:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:35:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:35:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:35:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:35:15 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-03-30 06:35:15 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-03-30 06:35:15 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-03-30 06:35:15 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-03-30 06:35:15 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-03-30 06:35:15 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-03-30 06:35:15 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-03-30 06:35:15 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-03-30 06:35:15 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-03-30 06:35:15 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-03-30 06:35:15 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=105 tn=0 bl=148 pwr=0
2025-03-30 06:35:15 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=105 tn=1 bl=148 pwr=0
2025-03-30 06:35:15 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=105 tn=2 bl=148 pwr=0
2025-03-30 06:35:15 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=105 tn=3 bl=148 pwr=0
2025-03-30 06:35:15 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=105 tn=4 bl=148 pwr=0
2025-03-30 06:35:15 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=105 tn=5 bl=148 pwr=0
2025-03-30 06:35:15 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=105 tn=6 bl=148 pwr=0
2025-03-30 06:35:15 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=105 tn=7 bl=148 pwr=0
2025-03-30 06:35:15 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=106 tn=0 bl=148 pwr=0
2025-03-30 06:35:15 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=106 tn=1 bl=148 pwr=0
2025-03-30 06:35:15 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=106 tn=2 bl=148 pwr=0
2025-03-30 06:35:15 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=106 tn=3 bl=148 pwr=0
2025-03-30 06:35:15 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=106 tn=4 bl=148 pwr=0
2025-03-30 06:35:15 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=106 tn=5 bl=148 pwr=0
2025-03-30 06:35:15 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=106 tn=6 bl=148 pwr=0
2025-03-30 06:35:15 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=106 tn=7 bl=148 pwr=0
2025-03-30 06:35:15 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=107 tn=0 bl=148 pwr=0
2025-03-30 06:35:15 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=107 tn=1 bl=148 pwr=0
2025-03-30 06:35:15 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=107 tn=2 bl=148 pwr=0
2025-03-30 06:35:15 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=107 tn=3 bl=148 pwr=0
2025-03-30 06:35:15 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=107 tn=4 bl=148 pwr=0
2025-03-30 06:35:15 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=107 tn=5 bl=148 pwr=0
2025-03-30 06:35:15 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=107 tn=6 bl=148 pwr=0
2025-03-30 06:35:15 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=107 tn=7 bl=148 pwr=0
2025-03-30 06:35:15 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 06:35:15 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 06:35:15 [DEBUG] fake_trx.py:317 (BTS@172.18.26.20:5700) Recv FAKE_CI cmd
2025-03-30 06:35:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:35:15 [DEBUG] fake_trx.py:377 (BTS@172.18.26.20:5700) Recv FAKE_TRXC_DELAY cmd
2025-03-30 06:35:15 [INFO] fake_trx.py:380 (BTS@172.18.26.20:5700) Artificial TRXC delay set to 200
2025-03-30 06:35:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD FAKE_TRXC_DELAY
2025-03-30 06:35:15 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=154): ver=1 fn=112 tn=0 bl=148 pwr=0
2025-03-30 06:35:15 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=154): ver=1 fn=112 tn=1 bl=148 pwr=0
2025-03-30 06:35:15 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=154): ver=1 fn=112 tn=2 bl=148 pwr=0
2025-03-30 06:35:15 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=154): ver=1 fn=112 tn=3 bl=148 pwr=0
2025-03-30 06:35:15 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=154): ver=1 fn=112 tn=4 bl=148 pwr=0
2025-03-30 06:35:15 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=154): ver=1 fn=112 tn=5 bl=148 pwr=0
2025-03-30 06:35:15 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=154): ver=1 fn=112 tn=6 bl=148 pwr=0
2025-03-30 06:35:15 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=154): ver=1 fn=112 tn=7 bl=148 pwr=0
2025-03-30 06:35:15 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=154): ver=1 fn=113 tn=0 bl=148 pwr=0
2025-03-30 06:35:15 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=154): ver=1 fn=113 tn=1 bl=148 pwr=0
2025-03-30 06:35:15 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=154): ver=1 fn=113 tn=2 bl=148 pwr=0
2025-03-30 06:35:15 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=154): ver=1 fn=113 tn=3 bl=148 pwr=0
2025-03-30 06:35:15 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=154): ver=1 fn=113 tn=4 bl=148 pwr=0
2025-03-30 06:35:15 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=154): ver=1 fn=113 tn=5 bl=148 pwr=0
2025-03-30 06:35:15 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=154): ver=1 fn=113 tn=6 bl=148 pwr=0
2025-03-30 06:35:15 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=154): ver=1 fn=113 tn=7 bl=148 pwr=0
2025-03-30 06:35:15 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=154): ver=1 fn=114 tn=0 bl=148 pwr=0
2025-03-30 06:35:15 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=154): ver=1 fn=114 tn=1 bl=148 pwr=0
2025-03-30 06:35:15 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=154): ver=1 fn=114 tn=2 bl=148 pwr=0
2025-03-30 06:35:15 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=154): ver=1 fn=114 tn=3 bl=148 pwr=0
2025-03-30 06:35:15 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=154): ver=1 fn=114 tn=4 bl=148 pwr=0
2025-03-30 06:35:15 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=154): ver=1 fn=114 tn=5 bl=148 pwr=0
2025-03-30 06:35:15 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=154): ver=1 fn=114 tn=6 bl=148 pwr=0
2025-03-30 06:35:15 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=154): ver=1 fn=114 tn=7 bl=148 pwr=0
2025-03-30 06:35:15 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=154): ver=1 fn=115 tn=0 bl=148 pwr=0
2025-03-30 06:35:15 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=154): ver=1 fn=115 tn=1 bl=148 pwr=0
2025-03-30 06:35:15 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=154): ver=1 fn=115 tn=2 bl=148 pwr=0
2025-03-30 06:35:15 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=154): ver=1 fn=115 tn=3 bl=148 pwr=0
2025-03-30 06:35:15 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=154): ver=1 fn=115 tn=4 bl=148 pwr=0
2025-03-30 06:35:15 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=154): ver=1 fn=115 tn=5 bl=148 pwr=0
2025-03-30 06:35:15 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=154): ver=1 fn=115 tn=6 bl=148 pwr=0
2025-03-30 06:35:15 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=154): ver=1 fn=115 tn=7 bl=148 pwr=0
2025-03-30 06:35:15 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=154): ver=1 fn=116 tn=0 bl=148 pwr=0
2025-03-30 06:35:15 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=154): ver=1 fn=116 tn=1 bl=148 pwr=0
2025-03-30 06:35:15 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=154): ver=1 fn=116 tn=2 bl=148 pwr=0
2025-03-30 06:35:15 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=154): ver=1 fn=116 tn=3 bl=148 pwr=0
2025-03-30 06:35:15 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=154): ver=1 fn=116 tn=4 bl=148 pwr=0
2025-03-30 06:35:15 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=154): ver=1 fn=116 tn=5 bl=148 pwr=0
2025-03-30 06:35:15 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=154): ver=1 fn=116 tn=6 bl=148 pwr=0
2025-03-30 06:35:15 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=154): ver=1 fn=116 tn=7 bl=148 pwr=0
2025-03-30 06:35:15 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=154): ver=1 fn=117 tn=0 bl=148 pwr=0
2025-03-30 06:35:15 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=154): ver=1 fn=117 tn=1 bl=148 pwr=0
2025-03-30 06:35:15 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=154): ver=1 fn=117 tn=2 bl=148 pwr=0
2025-03-30 06:35:15 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=154): ver=1 fn=117 tn=3 bl=148 pwr=0
2025-03-30 06:35:15 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=154): ver=1 fn=117 tn=4 bl=148 pwr=0
2025-03-30 06:35:15 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=154): ver=1 fn=117 tn=5 bl=148 pwr=0
2025-03-30 06:35:15 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=154): ver=1 fn=117 tn=6 bl=148 pwr=0
2025-03-30 06:35:15 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=154): ver=1 fn=117 tn=7 bl=148 pwr=0
2025-03-30 06:35:15 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=154): ver=1 fn=118 tn=0 bl=148 pwr=0
2025-03-30 06:35:15 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=154): ver=1 fn=118 tn=1 bl=148 pwr=0
2025-03-30 06:35:15 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=154): ver=1 fn=118 tn=2 bl=148 pwr=0
2025-03-30 06:35:15 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=154): ver=1 fn=118 tn=3 bl=148 pwr=0
2025-03-30 06:35:15 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=154): ver=1 fn=118 tn=4 bl=148 pwr=0
2025-03-30 06:35:15 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=154): ver=1 fn=118 tn=5 bl=148 pwr=0
2025-03-30 06:35:15 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=154): ver=1 fn=118 tn=6 bl=148 pwr=0
2025-03-30 06:35:15 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=154): ver=1 fn=118 tn=7 bl=148 pwr=0
2025-03-30 06:35:15 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=154): ver=1 fn=119 tn=0 bl=148 pwr=0
2025-03-30 06:35:15 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=154): ver=1 fn=119 tn=1 bl=148 pwr=0
2025-03-30 06:35:15 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=154): ver=1 fn=119 tn=2 bl=148 pwr=0
2025-03-30 06:35:15 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=154): ver=1 fn=119 tn=3 bl=148 pwr=0
2025-03-30 06:35:15 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=154): ver=1 fn=119 tn=4 bl=148 pwr=0
2025-03-30 06:35:15 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=154): ver=1 fn=119 tn=5 bl=148 pwr=0
2025-03-30 06:35:15 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=154): ver=1 fn=119 tn=6 bl=148 pwr=0
2025-03-30 06:35:15 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=154): ver=1 fn=119 tn=7 bl=148 pwr=0
2025-03-30 06:35:15 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=154): ver=1 fn=120 tn=0 bl=148 pwr=0
2025-03-30 06:35:15 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=154): ver=1 fn=120 tn=1 bl=148 pwr=0
2025-03-30 06:35:15 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=154): ver=1 fn=120 tn=2 bl=148 pwr=0
2025-03-30 06:35:15 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=154): ver=1 fn=120 tn=3 bl=148 pwr=0
2025-03-30 06:35:15 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=154): ver=1 fn=120 tn=4 bl=148 pwr=0
2025-03-30 06:35:15 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=154): ver=1 fn=120 tn=5 bl=148 pwr=0
2025-03-30 06:35:15 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=154): ver=1 fn=120 tn=6 bl=148 pwr=0
2025-03-30 06:35:15 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=154): ver=1 fn=120 tn=7 bl=148 pwr=0
2025-03-30 06:35:15 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=154): ver=1 fn=121 tn=0 bl=148 pwr=0
2025-03-30 06:35:15 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=154): ver=1 fn=121 tn=1 bl=148 pwr=0
2025-03-30 06:35:15 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=154): ver=1 fn=121 tn=2 bl=148 pwr=0
2025-03-30 06:35:15 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=154): ver=1 fn=121 tn=3 bl=148 pwr=0
2025-03-30 06:35:15 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=154): ver=1 fn=121 tn=4 bl=148 pwr=0
2025-03-30 06:35:15 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=154): ver=1 fn=121 tn=5 bl=148 pwr=0
2025-03-30 06:35:15 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=154): ver=1 fn=121 tn=6 bl=148 pwr=0
2025-03-30 06:35:15 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=154): ver=1 fn=121 tn=7 bl=148 pwr=0
2025-03-30 06:35:15 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=154): ver=1 fn=122 tn=0 bl=148 pwr=0
2025-03-30 06:35:15 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=154): ver=1 fn=122 tn=1 bl=148 pwr=0
2025-03-30 06:35:15 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=154): ver=1 fn=122 tn=2 bl=148 pwr=0
2025-03-30 06:35:15 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=154): ver=1 fn=122 tn=3 bl=148 pwr=0
2025-03-30 06:35:15 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=154): ver=1 fn=122 tn=4 bl=148 pwr=0
2025-03-30 06:35:15 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=154): ver=1 fn=122 tn=5 bl=148 pwr=0
2025-03-30 06:35:15 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=154): ver=1 fn=122 tn=6 bl=148 pwr=0
2025-03-30 06:35:15 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=154): ver=1 fn=122 tn=7 bl=148 pwr=0
2025-03-30 06:35:15 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=154): ver=1 fn=123 tn=0 bl=148 pwr=0
2025-03-30 06:35:15 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=154): ver=1 fn=123 tn=1 bl=148 pwr=0
2025-03-30 06:35:15 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=154): ver=1 fn=123 tn=2 bl=148 pwr=0
2025-03-30 06:35:15 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=154): ver=1 fn=123 tn=3 bl=148 pwr=0
2025-03-30 06:35:15 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=154): ver=1 fn=123 tn=4 bl=148 pwr=0
2025-03-30 06:35:15 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=154): ver=1 fn=123 tn=5 bl=148 pwr=0
2025-03-30 06:35:15 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=154): ver=1 fn=123 tn=6 bl=148 pwr=0
2025-03-30 06:35:15 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=154): ver=1 fn=123 tn=7 bl=148 pwr=0
2025-03-30 06:35:15 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=154): ver=1 fn=124 tn=0 bl=148 pwr=0
2025-03-30 06:35:15 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=154): ver=1 fn=124 tn=1 bl=148 pwr=0
2025-03-30 06:35:15 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=154): ver=1 fn=124 tn=2 bl=148 pwr=0
2025-03-30 06:35:15 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=154): ver=1 fn=124 tn=3 bl=148 pwr=0
2025-03-30 06:35:15 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=154): ver=1 fn=124 tn=4 bl=148 pwr=0
2025-03-30 06:35:15 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=154): ver=1 fn=124 tn=5 bl=148 pwr=0
2025-03-30 06:35:15 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=154): ver=1 fn=124 tn=6 bl=148 pwr=0
2025-03-30 06:35:15 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=154): ver=1 fn=124 tn=7 bl=148 pwr=0
2025-03-30 06:35:15 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=154): ver=1 fn=125 tn=0 bl=148 pwr=0
2025-03-30 06:35:15 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=154): ver=1 fn=125 tn=1 bl=148 pwr=0
2025-03-30 06:35:15 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=154): ver=1 fn=125 tn=2 bl=148 pwr=0
2025-03-30 06:35:15 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=154): ver=1 fn=125 tn=3 bl=148 pwr=0
2025-03-30 06:35:15 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=154): ver=1 fn=125 tn=4 bl=148 pwr=0
2025-03-30 06:35:15 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=154): ver=1 fn=125 tn=5 bl=148 pwr=0
2025-03-30 06:35:15 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=154): ver=1 fn=125 tn=6 bl=148 pwr=0
2025-03-30 06:35:15 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=154): ver=1 fn=125 tn=7 bl=148 pwr=0
2025-03-30 06:35:15 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=154): ver=1 fn=126 tn=0 bl=148 pwr=0
2025-03-30 06:35:15 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=154): ver=1 fn=126 tn=1 bl=148 pwr=0
2025-03-30 06:35:15 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=154): ver=1 fn=126 tn=2 bl=148 pwr=0
2025-03-30 06:35:15 [WARNING] clck_gen.py:108 CLCKGen: time overrun by -6488us; resetting the clock
2025-03-30 06:35:15 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=155): ver=1 fn=126 tn=3 bl=148 pwr=0
2025-03-30 06:35:15 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=155): ver=1 fn=126 tn=4 bl=148 pwr=0
2025-03-30 06:35:15 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=155): ver=1 fn=126 tn=5 bl=148 pwr=0
2025-03-30 06:35:15 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=155): ver=1 fn=126 tn=6 bl=148 pwr=0
2025-03-30 06:35:15 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=155): ver=1 fn=126 tn=7 bl=148 pwr=0
2025-03-30 06:35:15 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=155): ver=1 fn=127 tn=0 bl=148 pwr=0
2025-03-30 06:35:15 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=155): ver=1 fn=127 tn=1 bl=148 pwr=0
2025-03-30 06:35:15 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=155): ver=1 fn=127 tn=2 bl=148 pwr=0
2025-03-30 06:35:15 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=155): ver=1 fn=127 tn=3 bl=148 pwr=0
2025-03-30 06:35:15 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=155): ver=1 fn=127 tn=4 bl=148 pwr=0
2025-03-30 06:35:15 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=155): ver=1 fn=127 tn=5 bl=148 pwr=0
2025-03-30 06:35:15 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=155): ver=1 fn=127 tn=6 bl=148 pwr=0
2025-03-30 06:35:15 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=155): ver=1 fn=127 tn=7 bl=148 pwr=0
2025-03-30 06:35:15 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=155): ver=1 fn=128 tn=0 bl=148 pwr=0
2025-03-30 06:35:15 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=155): ver=1 fn=128 tn=1 bl=148 pwr=0
2025-03-30 06:35:15 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=155): ver=1 fn=128 tn=2 bl=148 pwr=0
2025-03-30 06:35:15 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=155): ver=1 fn=128 tn=3 bl=148 pwr=0
2025-03-30 06:35:15 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=155): ver=1 fn=128 tn=4 bl=148 pwr=0
2025-03-30 06:35:15 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=155): ver=1 fn=128 tn=5 bl=148 pwr=0
2025-03-30 06:35:15 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=155): ver=1 fn=128 tn=6 bl=148 pwr=0
2025-03-30 06:35:15 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=155): ver=1 fn=128 tn=7 bl=148 pwr=0
2025-03-30 06:35:15 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=155): ver=1 fn=129 tn=0 bl=148 pwr=0
2025-03-30 06:35:15 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=155): ver=1 fn=129 tn=1 bl=148 pwr=0
2025-03-30 06:35:15 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=155): ver=1 fn=129 tn=2 bl=148 pwr=0
2025-03-30 06:35:15 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=155): ver=1 fn=129 tn=3 bl=148 pwr=0
2025-03-30 06:35:15 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=155): ver=1 fn=129 tn=4 bl=148 pwr=0
2025-03-30 06:35:15 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=156): ver=1 fn=129 tn=5 bl=148 pwr=0
2025-03-30 06:35:15 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=156): ver=1 fn=129 tn=6 bl=148 pwr=0
2025-03-30 06:35:15 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=156): ver=1 fn=129 tn=7 bl=148 pwr=0
2025-03-30 06:35:15 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=156): ver=1 fn=130 tn=0 bl=148 pwr=0
2025-03-30 06:35:15 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=156): ver=1 fn=130 tn=1 bl=148 pwr=0
2025-03-30 06:35:15 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=156): ver=1 fn=130 tn=2 bl=148 pwr=0
2025-03-30 06:35:15 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=156): ver=1 fn=130 tn=3 bl=148 pwr=0
2025-03-30 06:35:15 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=156): ver=1 fn=130 tn=4 bl=148 pwr=0
2025-03-30 06:35:15 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=156): ver=1 fn=130 tn=5 bl=148 pwr=0
2025-03-30 06:35:15 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=156): ver=1 fn=130 tn=6 bl=148 pwr=0
2025-03-30 06:35:15 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=156): ver=1 fn=130 tn=7 bl=148 pwr=0
2025-03-30 06:35:15 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=156): ver=1 fn=131 tn=0 bl=148 pwr=0
2025-03-30 06:35:15 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=156): ver=1 fn=131 tn=1 bl=148 pwr=0
2025-03-30 06:35:15 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=156): ver=1 fn=131 tn=2 bl=148 pwr=0
2025-03-30 06:35:15 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=156): ver=1 fn=131 tn=3 bl=148 pwr=0
2025-03-30 06:35:15 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=156): ver=1 fn=131 tn=4 bl=148 pwr=0
2025-03-30 06:35:15 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=156): ver=1 fn=131 tn=5 bl=148 pwr=0
2025-03-30 06:35:15 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=156): ver=1 fn=131 tn=6 bl=148 pwr=0
2025-03-30 06:35:15 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=156): ver=1 fn=131 tn=7 bl=148 pwr=0
2025-03-30 06:35:15 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=156): ver=1 fn=132 tn=0 bl=148 pwr=0
2025-03-30 06:35:15 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=156): ver=1 fn=132 tn=1 bl=148 pwr=0
2025-03-30 06:35:15 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=156): ver=1 fn=132 tn=2 bl=148 pwr=0
2025-03-30 06:35:15 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=156): ver=1 fn=132 tn=3 bl=148 pwr=0
2025-03-30 06:35:15 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=156): ver=1 fn=132 tn=4 bl=148 pwr=0
2025-03-30 06:35:15 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=156): ver=1 fn=132 tn=5 bl=148 pwr=0
2025-03-30 06:35:15 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=156): ver=1 fn=132 tn=6 bl=148 pwr=0
2025-03-30 06:35:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:35:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:35:16 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=201): ver=1 fn=161 tn=0 bl=148 pwr=0
2025-03-30 06:35:16 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=201): ver=1 fn=161 tn=1 bl=148 pwr=0
2025-03-30 06:35:16 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=201): ver=1 fn=161 tn=2 bl=148 pwr=0
2025-03-30 06:35:16 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=201): ver=1 fn=161 tn=3 bl=148 pwr=0
2025-03-30 06:35:16 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=201): ver=1 fn=161 tn=4 bl=148 pwr=0
2025-03-30 06:35:16 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=201): ver=1 fn=161 tn=5 bl=148 pwr=0
2025-03-30 06:35:16 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=201): ver=1 fn=161 tn=6 bl=148 pwr=0
2025-03-30 06:35:16 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=201): ver=1 fn=161 tn=7 bl=148 pwr=0
2025-03-30 06:35:16 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=201): ver=1 fn=162 tn=0 bl=148 pwr=0
2025-03-30 06:35:16 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=201): ver=1 fn=162 tn=1 bl=148 pwr=0
2025-03-30 06:35:16 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=201): ver=1 fn=162 tn=2 bl=148 pwr=0
2025-03-30 06:35:16 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=201): ver=1 fn=162 tn=3 bl=148 pwr=0
2025-03-30 06:35:16 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=201): ver=1 fn=162 tn=4 bl=148 pwr=0
2025-03-30 06:35:16 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=201): ver=1 fn=162 tn=5 bl=148 pwr=0
2025-03-30 06:35:16 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=201): ver=1 fn=162 tn=6 bl=148 pwr=0
2025-03-30 06:35:16 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=201): ver=1 fn=162 tn=7 bl=148 pwr=0
2025-03-30 06:35:16 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=201): ver=1 fn=163 tn=0 bl=148 pwr=0
2025-03-30 06:35:16 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=201): ver=1 fn=163 tn=1 bl=148 pwr=0
2025-03-30 06:35:16 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=201): ver=1 fn=163 tn=2 bl=148 pwr=0
2025-03-30 06:35:16 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=201): ver=1 fn=163 tn=3 bl=148 pwr=0
2025-03-30 06:35:16 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=201): ver=1 fn=163 tn=4 bl=148 pwr=0
2025-03-30 06:35:16 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=201): ver=1 fn=163 tn=5 bl=148 pwr=0
2025-03-30 06:35:16 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=201): ver=1 fn=163 tn=6 bl=148 pwr=0
2025-03-30 06:35:16 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=201): ver=1 fn=163 tn=7 bl=148 pwr=0
2025-03-30 06:35:16 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=201): ver=1 fn=164 tn=0 bl=148 pwr=0
2025-03-30 06:35:16 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=201): ver=1 fn=164 tn=1 bl=148 pwr=0
2025-03-30 06:35:16 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=201): ver=1 fn=164 tn=2 bl=148 pwr=0
2025-03-30 06:35:16 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=201): ver=1 fn=164 tn=3 bl=148 pwr=0
2025-03-30 06:35:16 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=201): ver=1 fn=164 tn=4 bl=148 pwr=0
2025-03-30 06:35:16 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=201): ver=1 fn=164 tn=5 bl=148 pwr=0
2025-03-30 06:35:16 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=201): ver=1 fn=164 tn=6 bl=148 pwr=0
2025-03-30 06:35:16 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=201): ver=1 fn=164 tn=7 bl=148 pwr=0
2025-03-30 06:35:16 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=201): ver=1 fn=165 tn=0 bl=148 pwr=0
2025-03-30 06:35:16 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=201): ver=1 fn=165 tn=1 bl=148 pwr=0
2025-03-30 06:35:16 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=201): ver=1 fn=165 tn=2 bl=148 pwr=0
2025-03-30 06:35:16 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=201): ver=1 fn=165 tn=3 bl=148 pwr=0
2025-03-30 06:35:16 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=201): ver=1 fn=165 tn=4 bl=148 pwr=0
2025-03-30 06:35:16 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=201): ver=1 fn=165 tn=5 bl=148 pwr=0
2025-03-30 06:35:16 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=201): ver=1 fn=165 tn=6 bl=148 pwr=0
2025-03-30 06:35:16 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=201): ver=1 fn=165 tn=7 bl=148 pwr=0
2025-03-30 06:35:16 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=201): ver=1 fn=166 tn=0 bl=148 pwr=0
2025-03-30 06:35:16 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=201): ver=1 fn=166 tn=1 bl=148 pwr=0
2025-03-30 06:35:16 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=201): ver=1 fn=166 tn=2 bl=148 pwr=0
2025-03-30 06:35:16 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=201): ver=1 fn=166 tn=3 bl=148 pwr=0
2025-03-30 06:35:16 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=201): ver=1 fn=166 tn=4 bl=148 pwr=0
2025-03-30 06:35:16 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=201): ver=1 fn=166 tn=5 bl=148 pwr=0
2025-03-30 06:35:16 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=201): ver=1 fn=166 tn=6 bl=148 pwr=0
2025-03-30 06:35:16 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=201): ver=1 fn=166 tn=7 bl=148 pwr=0
2025-03-30 06:35:16 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=201): ver=1 fn=167 tn=0 bl=148 pwr=0
2025-03-30 06:35:16 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=201): ver=1 fn=167 tn=1 bl=148 pwr=0
2025-03-30 06:35:16 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=201): ver=1 fn=167 tn=2 bl=148 pwr=0
2025-03-30 06:35:16 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=201): ver=1 fn=167 tn=3 bl=148 pwr=0
2025-03-30 06:35:16 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=201): ver=1 fn=167 tn=4 bl=148 pwr=0
2025-03-30 06:35:16 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=201): ver=1 fn=167 tn=5 bl=148 pwr=0
2025-03-30 06:35:16 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=201): ver=1 fn=167 tn=6 bl=148 pwr=0
2025-03-30 06:35:16 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=201): ver=1 fn=167 tn=7 bl=148 pwr=0
2025-03-30 06:35:16 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=201): ver=1 fn=168 tn=0 bl=148 pwr=0
2025-03-30 06:35:16 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=201): ver=1 fn=168 tn=1 bl=148 pwr=0
2025-03-30 06:35:16 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=201): ver=1 fn=168 tn=2 bl=148 pwr=0
2025-03-30 06:35:16 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=201): ver=1 fn=168 tn=3 bl=148 pwr=0
2025-03-30 06:35:16 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=201): ver=1 fn=168 tn=4 bl=148 pwr=0
2025-03-30 06:35:16 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=201): ver=1 fn=168 tn=5 bl=148 pwr=0
2025-03-30 06:35:16 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=201): ver=1 fn=168 tn=6 bl=148 pwr=0
2025-03-30 06:35:16 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=201): ver=1 fn=168 tn=7 bl=148 pwr=0
2025-03-30 06:35:16 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=201): ver=1 fn=169 tn=0 bl=148 pwr=0
2025-03-30 06:35:16 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=201): ver=1 fn=169 tn=1 bl=148 pwr=0
2025-03-30 06:35:16 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=201): ver=1 fn=169 tn=2 bl=148 pwr=0
2025-03-30 06:35:16 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=201): ver=1 fn=169 tn=3 bl=148 pwr=0
2025-03-30 06:35:16 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=201): ver=1 fn=169 tn=4 bl=148 pwr=0
2025-03-30 06:35:16 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=201): ver=1 fn=169 tn=5 bl=148 pwr=0
2025-03-30 06:35:16 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=201): ver=1 fn=169 tn=6 bl=148 pwr=0
2025-03-30 06:35:16 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=201): ver=1 fn=169 tn=7 bl=148 pwr=0
2025-03-30 06:35:16 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=201): ver=1 fn=170 tn=0 bl=148 pwr=0
2025-03-30 06:35:16 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=201): ver=1 fn=170 tn=1 bl=148 pwr=0
2025-03-30 06:35:16 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=201): ver=1 fn=170 tn=2 bl=148 pwr=0
2025-03-30 06:35:16 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=201): ver=1 fn=170 tn=3 bl=148 pwr=0
2025-03-30 06:35:16 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=201): ver=1 fn=170 tn=4 bl=148 pwr=0
2025-03-30 06:35:16 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=201): ver=1 fn=170 tn=5 bl=148 pwr=0
2025-03-30 06:35:16 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=201): ver=1 fn=170 tn=6 bl=148 pwr=0
2025-03-30 06:35:16 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=201): ver=1 fn=170 tn=7 bl=148 pwr=0
2025-03-30 06:35:16 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=201): ver=1 fn=171 tn=0 bl=148 pwr=0
2025-03-30 06:35:16 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=201): ver=1 fn=171 tn=1 bl=148 pwr=0
2025-03-30 06:35:16 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=201): ver=1 fn=171 tn=2 bl=148 pwr=0
2025-03-30 06:35:16 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-03-30 06:35:16 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:35:16 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:35:16 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:35:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:35:16 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=245): ver=1 fn=171 tn=3 bl=148 pwr=0
2025-03-30 06:35:16 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=245): ver=1 fn=171 tn=4 bl=148 pwr=0
2025-03-30 06:35:16 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:35:16 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=288): ver=1 fn=171 tn=5 bl=148 pwr=0
2025-03-30 06:35:16 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=288): ver=1 fn=171 tn=6 bl=148 pwr=0
2025-03-30 06:35:16 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=288): ver=1 fn=171 tn=7 bl=148 pwr=0
2025-03-30 06:35:16 [DEBUG] clck_gen.py:128 IND CLOCK 306
2025-03-30 06:35:16 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=331): ver=1 fn=172 tn=0 bl=148 pwr=0
2025-03-30 06:35:16 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=331): ver=1 fn=172 tn=1 bl=148 pwr=0
2025-03-30 06:35:16 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=331): ver=1 fn=172 tn=2 bl=148 pwr=0
2025-03-30 06:35:16 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=331): ver=1 fn=172 tn=3 bl=148 pwr=0
2025-03-30 06:35:16 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=331): ver=1 fn=172 tn=4 bl=148 pwr=0
2025-03-30 06:35:16 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=331): ver=1 fn=172 tn=5 bl=148 pwr=0
2025-03-30 06:35:16 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=331): ver=1 fn=172 tn=6 bl=148 pwr=0
2025-03-30 06:35:16 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=331): ver=1 fn=172 tn=7 bl=148 pwr=0
2025-03-30 06:35:16 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=331): ver=1 fn=173 tn=0 bl=148 pwr=0
2025-03-30 06:35:16 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=331): ver=1 fn=173 tn=1 bl=148 pwr=0
2025-03-30 06:35:16 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=332): ver=1 fn=173 tn=2 bl=148 pwr=0
2025-03-30 06:35:16 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=332): ver=1 fn=173 tn=3 bl=148 pwr=0
2025-03-30 06:35:16 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=332): ver=1 fn=173 tn=4 bl=148 pwr=0
2025-03-30 06:35:16 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=332): ver=1 fn=173 tn=5 bl=148 pwr=0
2025-03-30 06:35:16 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=332): ver=1 fn=173 tn=6 bl=148 pwr=0
2025-03-30 06:35:16 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=332): ver=1 fn=173 tn=7 bl=148 pwr=0
2025-03-30 06:35:16 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=332): ver=1 fn=174 tn=0 bl=148 pwr=0
2025-03-30 06:35:16 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=332): ver=1 fn=174 tn=1 bl=148 pwr=0
2025-03-30 06:35:16 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=332): ver=1 fn=174 tn=2 bl=148 pwr=0
2025-03-30 06:35:16 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=332): ver=1 fn=174 tn=3 bl=148 pwr=0
2025-03-30 06:35:16 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=332): ver=1 fn=174 tn=4 bl=148 pwr=0
2025-03-30 06:35:16 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=332): ver=1 fn=174 tn=5 bl=148 pwr=0
2025-03-30 06:35:16 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=332): ver=1 fn=174 tn=6 bl=148 pwr=0
2025-03-30 06:35:16 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=332): ver=1 fn=174 tn=7 bl=148 pwr=0
2025-03-30 06:35:16 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=332): ver=1 fn=175 tn=0 bl=148 pwr=0
2025-03-30 06:35:16 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=332): ver=1 fn=175 tn=1 bl=148 pwr=0
2025-03-30 06:35:16 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=332): ver=1 fn=175 tn=2 bl=148 pwr=0
2025-03-30 06:35:16 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=332): ver=1 fn=175 tn=3 bl=148 pwr=0
2025-03-30 06:35:16 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=332): ver=1 fn=175 tn=4 bl=148 pwr=0
2025-03-30 06:35:16 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=332): ver=1 fn=175 tn=5 bl=148 pwr=0
2025-03-30 06:35:16 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=332): ver=1 fn=175 tn=6 bl=148 pwr=0
2025-03-30 06:35:16 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=332): ver=1 fn=175 tn=7 bl=148 pwr=0
2025-03-30 06:35:16 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=332): ver=1 fn=176 tn=0 bl=148 pwr=0
2025-03-30 06:35:16 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=332): ver=1 fn=176 tn=1 bl=148 pwr=0
2025-03-30 06:35:16 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=332): ver=1 fn=176 tn=2 bl=148 pwr=0
2025-03-30 06:35:16 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=332): ver=1 fn=176 tn=3 bl=148 pwr=0
2025-03-30 06:35:16 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=332): ver=1 fn=176 tn=4 bl=148 pwr=0
2025-03-30 06:35:16 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=332): ver=1 fn=176 tn=5 bl=148 pwr=0
2025-03-30 06:35:16 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=332): ver=1 fn=176 tn=6 bl=148 pwr=0
2025-03-30 06:35:16 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=332): ver=1 fn=176 tn=7 bl=148 pwr=0
2025-03-30 06:35:16 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=332): ver=1 fn=177 tn=0 bl=148 pwr=0
2025-03-30 06:35:16 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=332): ver=1 fn=177 tn=1 bl=148 pwr=0
2025-03-30 06:35:16 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=332): ver=1 fn=177 tn=2 bl=148 pwr=0
2025-03-30 06:35:16 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=332): ver=1 fn=177 tn=3 bl=148 pwr=0
2025-03-30 06:35:16 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=332): ver=1 fn=177 tn=4 bl=148 pwr=0
2025-03-30 06:35:16 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=332): ver=1 fn=177 tn=5 bl=148 pwr=0
2025-03-30 06:35:16 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=332): ver=1 fn=177 tn=6 bl=148 pwr=0
2025-03-30 06:35:16 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=332): ver=1 fn=177 tn=7 bl=148 pwr=0
2025-03-30 06:35:16 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=332): ver=1 fn=178 tn=0 bl=148 pwr=0
2025-03-30 06:35:16 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=332): ver=1 fn=178 tn=1 bl=148 pwr=0
2025-03-30 06:35:16 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=332): ver=1 fn=178 tn=2 bl=148 pwr=0
2025-03-30 06:35:16 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=332): ver=1 fn=178 tn=3 bl=148 pwr=0
2025-03-30 06:35:16 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=332): ver=1 fn=178 tn=4 bl=148 pwr=0
2025-03-30 06:35:16 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=332): ver=1 fn=178 tn=5 bl=148 pwr=0
2025-03-30 06:35:16 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=332): ver=1 fn=178 tn=6 bl=148 pwr=0
2025-03-30 06:35:16 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=332): ver=1 fn=178 tn=7 bl=148 pwr=0
2025-03-30 06:35:16 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=332): ver=1 fn=179 tn=0 bl=148 pwr=0
2025-03-30 06:35:16 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=332): ver=1 fn=179 tn=1 bl=148 pwr=0
2025-03-30 06:35:16 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=332): ver=1 fn=179 tn=2 bl=148 pwr=0
2025-03-30 06:35:16 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=332): ver=1 fn=179 tn=3 bl=148 pwr=0
2025-03-30 06:35:16 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=332): ver=1 fn=179 tn=4 bl=148 pwr=0
2025-03-30 06:35:16 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=332): ver=1 fn=179 tn=5 bl=148 pwr=0
2025-03-30 06:35:16 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=332): ver=1 fn=179 tn=6 bl=148 pwr=0
2025-03-30 06:35:16 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=332): ver=1 fn=179 tn=7 bl=148 pwr=0
2025-03-30 06:35:16 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=332): ver=1 fn=180 tn=0 bl=148 pwr=0
2025-03-30 06:35:16 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=332): ver=1 fn=180 tn=1 bl=148 pwr=0
2025-03-30 06:35:16 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=332): ver=1 fn=180 tn=2 bl=148 pwr=0
2025-03-30 06:35:16 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=332): ver=1 fn=180 tn=3 bl=148 pwr=0
2025-03-30 06:35:16 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=332): ver=1 fn=180 tn=4 bl=148 pwr=0
2025-03-30 06:35:16 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=332): ver=1 fn=180 tn=5 bl=148 pwr=0
2025-03-30 06:35:16 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=332): ver=1 fn=180 tn=6 bl=148 pwr=0
2025-03-30 06:35:16 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=332): ver=1 fn=180 tn=7 bl=148 pwr=0
2025-03-30 06:35:16 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=332): ver=1 fn=181 tn=0 bl=148 pwr=0
2025-03-30 06:35:16 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=332): ver=1 fn=181 tn=1 bl=148 pwr=0
2025-03-30 06:35:16 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=332): ver=1 fn=181 tn=2 bl=148 pwr=0
2025-03-30 06:35:16 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=332): ver=1 fn=181 tn=3 bl=148 pwr=0
2025-03-30 06:35:16 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=332): ver=1 fn=181 tn=4 bl=148 pwr=0
2025-03-30 06:35:16 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=332): ver=1 fn=181 tn=5 bl=148 pwr=0
2025-03-30 06:35:16 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=332): ver=1 fn=181 tn=6 bl=148 pwr=0
2025-03-30 06:35:16 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=332): ver=1 fn=204 tn=0 bl=148 pwr=0
2025-03-30 06:35:16 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=332): ver=1 fn=204 tn=1 bl=148 pwr=0
2025-03-30 06:35:16 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=332): ver=1 fn=204 tn=2 bl=148 pwr=0
2025-03-30 06:35:16 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=332): ver=1 fn=204 tn=3 bl=148 pwr=0
2025-03-30 06:35:16 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=332): ver=1 fn=204 tn=4 bl=148 pwr=0
2025-03-30 06:35:16 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=332): ver=1 fn=204 tn=5 bl=148 pwr=0
2025-03-30 06:35:16 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=332): ver=1 fn=204 tn=6 bl=148 pwr=0
2025-03-30 06:35:16 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=332): ver=1 fn=204 tn=7 bl=148 pwr=0
2025-03-30 06:35:16 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=332): ver=1 fn=205 tn=0 bl=148 pwr=0
2025-03-30 06:35:16 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=332): ver=1 fn=205 tn=1 bl=148 pwr=0
2025-03-30 06:35:16 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=332): ver=1 fn=205 tn=2 bl=148 pwr=0
2025-03-30 06:35:16 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=332): ver=1 fn=205 tn=3 bl=148 pwr=0
2025-03-30 06:35:16 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=332): ver=1 fn=205 tn=4 bl=148 pwr=0
2025-03-30 06:35:16 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=332): ver=1 fn=205 tn=5 bl=148 pwr=0
2025-03-30 06:35:16 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=332): ver=1 fn=205 tn=6 bl=148 pwr=0
2025-03-30 06:35:16 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=332): ver=1 fn=205 tn=7 bl=148 pwr=0
2025-03-30 06:35:16 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=332): ver=1 fn=206 tn=0 bl=148 pwr=0
2025-03-30 06:35:16 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=332): ver=1 fn=206 tn=1 bl=148 pwr=0
2025-03-30 06:35:16 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=332): ver=1 fn=206 tn=2 bl=148 pwr=0
2025-03-30 06:35:16 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=332): ver=1 fn=206 tn=3 bl=148 pwr=0
2025-03-30 06:35:16 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=332): ver=1 fn=206 tn=4 bl=148 pwr=0
2025-03-30 06:35:16 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=332): ver=1 fn=206 tn=5 bl=148 pwr=0
2025-03-30 06:35:16 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=332): ver=1 fn=206 tn=6 bl=148 pwr=0
2025-03-30 06:35:16 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=332): ver=1 fn=206 tn=7 bl=148 pwr=0
2025-03-30 06:35:16 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=332): ver=1 fn=207 tn=0 bl=148 pwr=0
2025-03-30 06:35:16 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=332): ver=1 fn=207 tn=1 bl=148 pwr=0
2025-03-30 06:35:16 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=332): ver=1 fn=207 tn=2 bl=148 pwr=0
2025-03-30 06:35:16 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=332): ver=1 fn=207 tn=3 bl=148 pwr=0
2025-03-30 06:35:16 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=332): ver=1 fn=207 tn=4 bl=148 pwr=0
2025-03-30 06:35:16 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=332): ver=1 fn=207 tn=5 bl=148 pwr=0
2025-03-30 06:35:16 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=332): ver=1 fn=207 tn=6 bl=148 pwr=0
2025-03-30 06:35:16 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=332): ver=1 fn=207 tn=7 bl=148 pwr=0
2025-03-30 06:35:16 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=332): ver=1 fn=208 tn=0 bl=148 pwr=0
2025-03-30 06:35:16 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=332): ver=1 fn=208 tn=1 bl=148 pwr=0
2025-03-30 06:35:16 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=332): ver=1 fn=208 tn=2 bl=148 pwr=0
2025-03-30 06:35:16 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=332): ver=1 fn=208 tn=3 bl=148 pwr=0
2025-03-30 06:35:16 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=332): ver=1 fn=208 tn=4 bl=148 pwr=0
2025-03-30 06:35:16 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=332): ver=1 fn=208 tn=5 bl=148 pwr=0
2025-03-30 06:35:16 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=332): ver=1 fn=208 tn=6 bl=148 pwr=0
2025-03-30 06:35:16 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=332): ver=1 fn=208 tn=7 bl=148 pwr=0
2025-03-30 06:35:16 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=332): ver=1 fn=209 tn=0 bl=148 pwr=0
2025-03-30 06:35:16 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=332): ver=1 fn=209 tn=1 bl=148 pwr=0
2025-03-30 06:35:16 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=332): ver=1 fn=246 tn=0 bl=148 pwr=0
2025-03-30 06:35:16 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=332): ver=1 fn=246 tn=1 bl=148 pwr=0
2025-03-30 06:35:16 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=332): ver=1 fn=246 tn=2 bl=148 pwr=0
2025-03-30 06:35:16 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=332): ver=1 fn=246 tn=3 bl=148 pwr=0
2025-03-30 06:35:16 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=332): ver=1 fn=246 tn=4 bl=148 pwr=0
2025-03-30 06:35:16 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=332): ver=1 fn=246 tn=5 bl=148 pwr=0
2025-03-30 06:35:16 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=332): ver=1 fn=246 tn=6 bl=148 pwr=0
2025-03-30 06:35:16 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=332): ver=1 fn=246 tn=7 bl=148 pwr=0
2025-03-30 06:35:16 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=332): ver=1 fn=247 tn=0 bl=148 pwr=0
2025-03-30 06:35:16 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=332): ver=1 fn=247 tn=1 bl=148 pwr=0
2025-03-30 06:35:16 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=332): ver=1 fn=247 tn=2 bl=148 pwr=0
2025-03-30 06:35:16 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=332): ver=1 fn=247 tn=3 bl=148 pwr=0
2025-03-30 06:35:16 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=332): ver=1 fn=247 tn=4 bl=148 pwr=0
2025-03-30 06:35:16 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=332): ver=1 fn=247 tn=5 bl=148 pwr=0
2025-03-30 06:35:16 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=332): ver=1 fn=247 tn=6 bl=148 pwr=0
2025-03-30 06:35:16 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=332): ver=1 fn=247 tn=7 bl=148 pwr=0
2025-03-30 06:35:16 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=332): ver=1 fn=248 tn=0 bl=148 pwr=0
2025-03-30 06:35:16 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=332): ver=1 fn=248 tn=1 bl=148 pwr=0
2025-03-30 06:35:16 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=332): ver=1 fn=248 tn=2 bl=148 pwr=0
2025-03-30 06:35:16 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=332): ver=1 fn=248 tn=3 bl=148 pwr=0
2025-03-30 06:35:16 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=332): ver=1 fn=248 tn=4 bl=148 pwr=0
2025-03-30 06:35:16 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=332): ver=1 fn=248 tn=5 bl=148 pwr=0
2025-03-30 06:35:16 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=332): ver=1 fn=248 tn=6 bl=148 pwr=0
2025-03-30 06:35:16 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=332): ver=1 fn=248 tn=7 bl=148 pwr=0
2025-03-30 06:35:16 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=332): ver=1 fn=249 tn=0 bl=148 pwr=0
2025-03-30 06:35:16 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=332): ver=1 fn=249 tn=1 bl=148 pwr=0
2025-03-30 06:35:16 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=332): ver=1 fn=249 tn=2 bl=148 pwr=0
2025-03-30 06:35:16 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=332): ver=1 fn=249 tn=3 bl=148 pwr=0
2025-03-30 06:35:16 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=332): ver=1 fn=249 tn=4 bl=148 pwr=0
2025-03-30 06:35:16 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=332): ver=1 fn=249 tn=5 bl=148 pwr=0
2025-03-30 06:35:16 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=332): ver=1 fn=249 tn=6 bl=148 pwr=0
2025-03-30 06:35:16 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=332): ver=1 fn=249 tn=7 bl=148 pwr=0
2025-03-30 06:35:16 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=332): ver=1 fn=250 tn=0 bl=148 pwr=0
2025-03-30 06:35:16 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=332): ver=1 fn=250 tn=1 bl=148 pwr=0
2025-03-30 06:35:16 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=332): ver=1 fn=250 tn=2 bl=148 pwr=0
2025-03-30 06:35:16 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=332): ver=1 fn=250 tn=3 bl=148 pwr=0
2025-03-30 06:35:16 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=332): ver=1 fn=250 tn=4 bl=148 pwr=0
2025-03-30 06:35:16 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=332): ver=1 fn=250 tn=5 bl=148 pwr=0
2025-03-30 06:35:16 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=332): ver=1 fn=250 tn=6 bl=148 pwr=0
2025-03-30 06:35:16 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=332): ver=1 fn=250 tn=7 bl=148 pwr=0
2025-03-30 06:35:16 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=332): ver=1 fn=251 tn=0 bl=148 pwr=0
2025-03-30 06:35:16 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=332): ver=1 fn=251 tn=1 bl=148 pwr=0
2025-03-30 06:35:16 [WARNING] clck_gen.py:108 CLCKGen: time overrun by -8279us; resetting the clock
2025-03-30 06:35:17 [DEBUG] clck_gen.py:128 IND CLOCK 408
2025-03-30 06:35:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:35:17 [DEBUG] fake_trx.py:377 (BTS@172.18.26.20:5700) Recv FAKE_TRXC_DELAY cmd
2025-03-30 06:35:17 [INFO] fake_trx.py:380 (BTS@172.18.26.20:5700) Artificial TRXC delay set to 0
2025-03-30 06:35:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD FAKE_TRXC_DELAY
2025-03-30 06:35:17 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:35:17 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:35:17 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:35:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:35:17 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=461): ver=1 fn=420 tn=0 bl=148 pwr=0
2025-03-30 06:35:17 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=461): ver=1 fn=420 tn=1 bl=148 pwr=0
2025-03-30 06:35:17 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=461): ver=1 fn=420 tn=2 bl=148 pwr=0
2025-03-30 06:35:17 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=461): ver=1 fn=420 tn=3 bl=148 pwr=0
2025-03-30 06:35:17 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=461): ver=1 fn=420 tn=4 bl=148 pwr=0
2025-03-30 06:35:17 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=461): ver=1 fn=420 tn=5 bl=148 pwr=0
2025-03-30 06:35:17 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=461): ver=1 fn=420 tn=6 bl=148 pwr=0
2025-03-30 06:35:17 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=461): ver=1 fn=420 tn=7 bl=148 pwr=0
2025-03-30 06:35:17 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=461): ver=1 fn=421 tn=0 bl=148 pwr=0
2025-03-30 06:35:17 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=461): ver=1 fn=421 tn=1 bl=148 pwr=0
2025-03-30 06:35:17 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=461): ver=1 fn=421 tn=2 bl=148 pwr=0
2025-03-30 06:35:17 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=461): ver=1 fn=421 tn=3 bl=148 pwr=0
2025-03-30 06:35:17 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=461): ver=1 fn=421 tn=4 bl=148 pwr=0
2025-03-30 06:35:17 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=461): ver=1 fn=421 tn=5 bl=148 pwr=0
2025-03-30 06:35:17 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=461): ver=1 fn=421 tn=6 bl=148 pwr=0
2025-03-30 06:35:17 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=461): ver=1 fn=421 tn=7 bl=148 pwr=0
2025-03-30 06:35:17 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=461): ver=1 fn=422 tn=0 bl=148 pwr=0
2025-03-30 06:35:17 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=461): ver=1 fn=422 tn=1 bl=148 pwr=0
2025-03-30 06:35:17 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=461): ver=1 fn=422 tn=2 bl=148 pwr=0
2025-03-30 06:35:17 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=461): ver=1 fn=422 tn=3 bl=148 pwr=0
2025-03-30 06:35:17 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=461): ver=1 fn=422 tn=4 bl=148 pwr=0
2025-03-30 06:35:17 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=462): ver=1 fn=422 tn=5 bl=148 pwr=0
2025-03-30 06:35:17 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=462): ver=1 fn=422 tn=6 bl=148 pwr=0
2025-03-30 06:35:17 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=462): ver=1 fn=422 tn=7 bl=148 pwr=0
2025-03-30 06:35:17 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=462): ver=1 fn=423 tn=0 bl=148 pwr=0
2025-03-30 06:35:17 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=462): ver=1 fn=423 tn=1 bl=148 pwr=0
2025-03-30 06:35:17 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=462): ver=1 fn=423 tn=2 bl=148 pwr=0
2025-03-30 06:35:17 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=462): ver=1 fn=423 tn=3 bl=148 pwr=0
2025-03-30 06:35:17 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=462): ver=1 fn=423 tn=4 bl=148 pwr=0
2025-03-30 06:35:17 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=462): ver=1 fn=423 tn=5 bl=148 pwr=0
2025-03-30 06:35:17 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=462): ver=1 fn=423 tn=6 bl=148 pwr=0
2025-03-30 06:35:17 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=462): ver=1 fn=423 tn=7 bl=148 pwr=0
2025-03-30 06:35:17 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=462): ver=1 fn=424 tn=0 bl=148 pwr=0
2025-03-30 06:35:17 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=462): ver=1 fn=424 tn=1 bl=148 pwr=0
2025-03-30 06:35:17 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=462): ver=1 fn=424 tn=2 bl=148 pwr=0
2025-03-30 06:35:17 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=462): ver=1 fn=424 tn=3 bl=148 pwr=0
2025-03-30 06:35:17 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=462): ver=1 fn=424 tn=4 bl=148 pwr=0
2025-03-30 06:35:17 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=462): ver=1 fn=424 tn=5 bl=148 pwr=0
2025-03-30 06:35:17 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=462): ver=1 fn=424 tn=6 bl=148 pwr=0
2025-03-30 06:35:17 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=462): ver=1 fn=424 tn=7 bl=148 pwr=0
2025-03-30 06:35:17 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=462): ver=1 fn=425 tn=0 bl=148 pwr=0
2025-03-30 06:35:17 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=462): ver=1 fn=425 tn=1 bl=148 pwr=0
2025-03-30 06:35:17 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=462): ver=1 fn=425 tn=2 bl=148 pwr=0
2025-03-30 06:35:17 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=462): ver=1 fn=425 tn=3 bl=148 pwr=0
2025-03-30 06:35:17 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=462): ver=1 fn=425 tn=4 bl=148 pwr=0
2025-03-30 06:35:17 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=462): ver=1 fn=425 tn=5 bl=148 pwr=0
2025-03-30 06:35:17 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=462): ver=1 fn=425 tn=6 bl=148 pwr=0
2025-03-30 06:35:17 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=462): ver=1 fn=425 tn=7 bl=148 pwr=0
2025-03-30 06:35:17 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=462): ver=1 fn=426 tn=0 bl=148 pwr=0
2025-03-30 06:35:17 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=462): ver=1 fn=426 tn=1 bl=148 pwr=0
2025-03-30 06:35:17 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=462): ver=1 fn=426 tn=2 bl=148 pwr=0
2025-03-30 06:35:17 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:35:17 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=462): ver=1 fn=426 tn=3 bl=148 pwr=0
2025-03-30 06:35:17 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=462): ver=1 fn=426 tn=4 bl=148 pwr=0
2025-03-30 06:35:17 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=462): ver=1 fn=426 tn=5 bl=148 pwr=0
2025-03-30 06:35:17 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=462): ver=1 fn=426 tn=6 bl=148 pwr=0
2025-03-30 06:35:17 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=462): ver=1 fn=426 tn=7 bl=148 pwr=0
2025-03-30 06:35:17 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=462): ver=1 fn=427 tn=0 bl=148 pwr=0
2025-03-30 06:35:17 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=462): ver=1 fn=427 tn=1 bl=148 pwr=0
2025-03-30 06:35:17 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=462): ver=1 fn=427 tn=2 bl=148 pwr=0
2025-03-30 06:35:17 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=462): ver=1 fn=427 tn=3 bl=148 pwr=0
2025-03-30 06:35:17 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=462): ver=1 fn=427 tn=4 bl=148 pwr=0
2025-03-30 06:35:17 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=462): ver=1 fn=427 tn=5 bl=148 pwr=0
2025-03-30 06:35:17 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=462): ver=1 fn=427 tn=6 bl=148 pwr=0
2025-03-30 06:35:17 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=462): ver=1 fn=427 tn=7 bl=148 pwr=0
2025-03-30 06:35:17 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=462): ver=1 fn=428 tn=0 bl=148 pwr=0
2025-03-30 06:35:17 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=462): ver=1 fn=428 tn=1 bl=148 pwr=0
2025-03-30 06:35:17 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=462): ver=1 fn=428 tn=2 bl=148 pwr=0
2025-03-30 06:35:17 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=462): ver=1 fn=428 tn=3 bl=148 pwr=0
2025-03-30 06:35:17 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=462): ver=1 fn=428 tn=4 bl=148 pwr=0
2025-03-30 06:35:17 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=462): ver=1 fn=428 tn=5 bl=148 pwr=0
2025-03-30 06:35:17 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=462): ver=1 fn=428 tn=6 bl=148 pwr=0
2025-03-30 06:35:17 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=462): ver=1 fn=428 tn=7 bl=148 pwr=0
2025-03-30 06:35:17 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=462): ver=1 fn=429 tn=0 bl=148 pwr=0
2025-03-30 06:35:17 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=462): ver=1 fn=429 tn=1 bl=148 pwr=0
2025-03-30 06:35:17 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=462): ver=1 fn=429 tn=2 bl=148 pwr=0
2025-03-30 06:35:17 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=462): ver=1 fn=429 tn=3 bl=148 pwr=0
2025-03-30 06:35:17 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=462): ver=1 fn=429 tn=4 bl=148 pwr=0
2025-03-30 06:35:17 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=462): ver=1 fn=429 tn=5 bl=148 pwr=0
2025-03-30 06:35:17 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=462): ver=1 fn=429 tn=6 bl=148 pwr=0
2025-03-30 06:35:17 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=462): ver=1 fn=429 tn=7 bl=148 pwr=0
2025-03-30 06:35:17 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=462): ver=1 fn=430 tn=0 bl=148 pwr=0
2025-03-30 06:35:17 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:35:17 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=462): ver=1 fn=430 tn=1 bl=148 pwr=0
2025-03-30 06:35:17 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=462): ver=1 fn=430 tn=2 bl=148 pwr=0
2025-03-30 06:35:17 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=462): ver=1 fn=430 tn=3 bl=148 pwr=0
2025-03-30 06:35:17 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=462): ver=1 fn=430 tn=4 bl=148 pwr=0
2025-03-30 06:35:17 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=462): ver=1 fn=430 tn=5 bl=148 pwr=0
2025-03-30 06:35:17 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=462): ver=1 fn=430 tn=6 bl=148 pwr=0
2025-03-30 06:35:17 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=462): ver=1 fn=430 tn=7 bl=148 pwr=0
2025-03-30 06:35:17 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=462): ver=1 fn=431 tn=0 bl=148 pwr=0
2025-03-30 06:35:17 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=462): ver=1 fn=431 tn=1 bl=148 pwr=0
2025-03-30 06:35:17 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=462): ver=1 fn=431 tn=2 bl=148 pwr=0
2025-03-30 06:35:17 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:35:17 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=462): ver=1 fn=431 tn=3 bl=148 pwr=0
2025-03-30 06:35:17 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=462): ver=1 fn=431 tn=4 bl=148 pwr=0
2025-03-30 06:35:17 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=462): ver=1 fn=431 tn=5 bl=148 pwr=0
2025-03-30 06:35:17 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=462): ver=1 fn=431 tn=6 bl=148 pwr=0
2025-03-30 06:35:17 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=462): ver=1 fn=431 tn=7 bl=148 pwr=0
2025-03-30 06:35:17 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=462): ver=1 fn=432 tn=0 bl=148 pwr=0
2025-03-30 06:35:17 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=462): ver=1 fn=432 tn=1 bl=148 pwr=0
2025-03-30 06:35:17 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=462): ver=1 fn=432 tn=2 bl=148 pwr=0
2025-03-30 06:35:17 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=462): ver=1 fn=432 tn=3 bl=148 pwr=0
2025-03-30 06:35:17 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=462): ver=1 fn=432 tn=4 bl=148 pwr=0
2025-03-30 06:35:17 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=462): ver=1 fn=432 tn=5 bl=148 pwr=0
2025-03-30 06:35:17 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=462): ver=1 fn=432 tn=6 bl=148 pwr=0
2025-03-30 06:35:17 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=462): ver=1 fn=432 tn=7 bl=148 pwr=0
2025-03-30 06:35:17 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=462): ver=1 fn=433 tn=0 bl=148 pwr=0
2025-03-30 06:35:17 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=462): ver=1 fn=433 tn=1 bl=148 pwr=0
2025-03-30 06:35:17 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=462): ver=1 fn=433 tn=2 bl=148 pwr=0
2025-03-30 06:35:17 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=462): ver=1 fn=433 tn=3 bl=148 pwr=0
2025-03-30 06:35:17 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=462): ver=1 fn=433 tn=4 bl=148 pwr=0
2025-03-30 06:35:17 [WARNING] clck_gen.py:108 CLCKGen: time overrun by -6786us; resetting the clock
2025-03-30 06:35:17 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=463): ver=1 fn=433 tn=5 bl=148 pwr=0
2025-03-30 06:35:17 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:35:17 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=463): ver=1 fn=433 tn=6 bl=148 pwr=0
2025-03-30 06:35:17 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=463): ver=1 fn=433 tn=7 bl=148 pwr=0
2025-03-30 06:35:17 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=463): ver=1 fn=434 tn=0 bl=148 pwr=0
2025-03-30 06:35:17 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=463): ver=1 fn=434 tn=1 bl=148 pwr=0
2025-03-30 06:35:17 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=463): ver=1 fn=434 tn=2 bl=148 pwr=0
2025-03-30 06:35:17 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=463): ver=1 fn=434 tn=3 bl=148 pwr=0
2025-03-30 06:35:17 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=463): ver=1 fn=434 tn=4 bl=148 pwr=0
2025-03-30 06:35:17 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=463): ver=1 fn=434 tn=5 bl=148 pwr=0
2025-03-30 06:35:17 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=463): ver=1 fn=434 tn=6 bl=148 pwr=0
2025-03-30 06:35:17 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=463): ver=1 fn=434 tn=7 bl=148 pwr=0
2025-03-30 06:35:17 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=463): ver=1 fn=435 tn=0 bl=148 pwr=0
2025-03-30 06:35:17 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=463): ver=1 fn=435 tn=1 bl=148 pwr=0
2025-03-30 06:35:17 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:35:17 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=463): ver=1 fn=435 tn=2 bl=148 pwr=0
2025-03-30 06:35:17 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:35:17 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=463): ver=1 fn=435 tn=3 bl=148 pwr=0
2025-03-30 06:35:17 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=463): ver=1 fn=435 tn=4 bl=148 pwr=0
2025-03-30 06:35:17 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=463): ver=1 fn=435 tn=5 bl=148 pwr=0
2025-03-30 06:35:17 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=463): ver=1 fn=435 tn=6 bl=148 pwr=0
2025-03-30 06:35:17 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=463): ver=1 fn=435 tn=7 bl=148 pwr=0
2025-03-30 06:35:17 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:35:17 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 06:35:17 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 06:35:17 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 06:35:17 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:35:17 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=436 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:35:17 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=436 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:35:17 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=436 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:35:17 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=436 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:35:17 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=436 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:35:17 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=436 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:35:17 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=437 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:35:17 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=437 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:35:17 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=437 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:35:17 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=437 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:35:17 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=437 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:35:17 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=437 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:35:17 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=437 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:35:17 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=437 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:35:17 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=438 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:35:17 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=438 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:35:17 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=438 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:35:17 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=438 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:35:17 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=438 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:35:17 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=438 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:35:17 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=438 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:35:17 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=438 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:35:17 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=439 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:35:17 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=439 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:35:17 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=439 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:35:17 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=439 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:35:17 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=439 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:35:17 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=439 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:35:17 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=439 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:35:17 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=439 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:35:17 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=440 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:35:17 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=440 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:35:17 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=440 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:35:17 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=440 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:35:17 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=440 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:35:17 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=440 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:35:17 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=440 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:35:17 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=464 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:35:17 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=464 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:35:17 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=464 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:35:17 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=464 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:35:17 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=464 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:35:17 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=464 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:35:17 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=464 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:35:17 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=464 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:35:17 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=465 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:35:17 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=465 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:35:17 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=465 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:35:17 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=465 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:35:17 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=465 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:35:17 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=465 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:35:17 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=465 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:35:17 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=465 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:35:17 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=466 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:35:17 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=466 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:35:17 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=466 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:35:17 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=466 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:35:17 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=466 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:35:17 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=466 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:35:17 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=466 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:35:17 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=466 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:35:17 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=467 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:35:17 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=467 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:35:17 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=467 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:35:17 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=467 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:35:17 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=467 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:35:17 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=467 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:35:17 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=467 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:35:17 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=467 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:35:22 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 06:35:22 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 06:35:22 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:35:22 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:35:22 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:35:22 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:35:22 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:35:22 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 06:35:22 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:35:22 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 06:35:22 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 06:35:22 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 06:35:22 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 06:35:22 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 06:35:22 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:35:22 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:35:22 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 06:35:22 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 06:35:22 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 06:35:22 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 06:35:22 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 06:35:22 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 06:35:22 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:35:22 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:35:22 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 06:35:22 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 06:35:22 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 06:35:22 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 06:35:22 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 06:35:22 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 06:35:22 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:35:22 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:35:22 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 06:35:22 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 06:35:22 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 06:35:22 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 06:35:22 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 06:35:22 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 06:35:22 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 06:35:22 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 06:35:22 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 06:35:22 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 06:35:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 06:35:22 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:35:22 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 06:35:22 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 06:35:22 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:35:22 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:35:22 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 06:35:22 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 06:35:22 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 06:35:22 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 06:35:22 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:35:22 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:35:22 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:35:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 06:35:22 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:35:22 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:35:22 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:35:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:35:22 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:35:22 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:35:22 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:35:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:35:22 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:35:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:35:22 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:35:22 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:35:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:35:22 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:35:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:35:22 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:35:22 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:35:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:35:22 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:35:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:35:22 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:35:22 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:35:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:35:22 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:35:22 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:35:22 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:35:22 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-03-30 06:35:22 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-03-30 06:35:22 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-03-30 06:35:22 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-03-30 06:35:22 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-03-30 06:35:22 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-03-30 06:35:22 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-03-30 06:35:22 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-03-30 06:35:22 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-03-30 06:35:22 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-03-30 06:35:22 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=0 bl=148 pwr=0
2025-03-30 06:35:22 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=1 bl=148 pwr=0
2025-03-30 06:35:22 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=2 bl=148 pwr=0
2025-03-30 06:35:22 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=3 bl=148 pwr=0
2025-03-30 06:35:22 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=4 bl=148 pwr=0
2025-03-30 06:35:22 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=5 bl=148 pwr=0
2025-03-30 06:35:22 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=6 bl=148 pwr=0
2025-03-30 06:35:22 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=7 bl=148 pwr=0
2025-03-30 06:35:22 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 06:35:22 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 06:35:22 [DEBUG] fake_trx.py:317 (BTS@172.18.26.20:5700) Recv FAKE_CI cmd
2025-03-30 06:35:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:35:22 [DEBUG] fake_trx.py:377 (BTS@172.18.26.20:5700) Recv FAKE_TRXC_DELAY cmd
2025-03-30 06:35:22 [INFO] fake_trx.py:380 (BTS@172.18.26.20:5700) Artificial TRXC delay set to 200
2025-03-30 06:35:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD FAKE_TRXC_DELAY
2025-03-30 06:35:23 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=160): ver=1 fn=118 tn=0 bl=148 pwr=0
2025-03-30 06:35:23 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=160): ver=1 fn=118 tn=1 bl=148 pwr=0
2025-03-30 06:35:23 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=160): ver=1 fn=118 tn=2 bl=148 pwr=0
2025-03-30 06:35:23 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=160): ver=1 fn=118 tn=3 bl=148 pwr=0
2025-03-30 06:35:23 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=160): ver=1 fn=118 tn=4 bl=148 pwr=0
2025-03-30 06:35:23 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=160): ver=1 fn=118 tn=5 bl=148 pwr=0
2025-03-30 06:35:23 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=160): ver=1 fn=118 tn=6 bl=148 pwr=0
2025-03-30 06:35:23 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=160): ver=1 fn=118 tn=7 bl=148 pwr=0
2025-03-30 06:35:23 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=160): ver=1 fn=119 tn=0 bl=148 pwr=0
2025-03-30 06:35:23 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=160): ver=1 fn=119 tn=1 bl=148 pwr=0
2025-03-30 06:35:23 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=160): ver=1 fn=119 tn=2 bl=148 pwr=0
2025-03-30 06:35:23 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=160): ver=1 fn=119 tn=3 bl=148 pwr=0
2025-03-30 06:35:23 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=160): ver=1 fn=119 tn=4 bl=148 pwr=0
2025-03-30 06:35:23 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=160): ver=1 fn=119 tn=5 bl=148 pwr=0
2025-03-30 06:35:23 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=160): ver=1 fn=119 tn=6 bl=148 pwr=0
2025-03-30 06:35:23 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=160): ver=1 fn=119 tn=7 bl=148 pwr=0
2025-03-30 06:35:23 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=160): ver=1 fn=120 tn=0 bl=148 pwr=0
2025-03-30 06:35:23 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=160): ver=1 fn=120 tn=1 bl=148 pwr=0
2025-03-30 06:35:23 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=160): ver=1 fn=120 tn=2 bl=148 pwr=0
2025-03-30 06:35:23 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=160): ver=1 fn=120 tn=3 bl=148 pwr=0
2025-03-30 06:35:23 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=160): ver=1 fn=120 tn=4 bl=148 pwr=0
2025-03-30 06:35:23 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=160): ver=1 fn=120 tn=5 bl=148 pwr=0
2025-03-30 06:35:23 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=160): ver=1 fn=120 tn=6 bl=148 pwr=0
2025-03-30 06:35:23 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=160): ver=1 fn=120 tn=7 bl=148 pwr=0
2025-03-30 06:35:23 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=160): ver=1 fn=121 tn=0 bl=148 pwr=0
2025-03-30 06:35:23 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=160): ver=1 fn=121 tn=1 bl=148 pwr=0
2025-03-30 06:35:23 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=160): ver=1 fn=121 tn=2 bl=148 pwr=0
2025-03-30 06:35:23 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=160): ver=1 fn=121 tn=3 bl=148 pwr=0
2025-03-30 06:35:23 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=160): ver=1 fn=121 tn=4 bl=148 pwr=0
2025-03-30 06:35:23 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=160): ver=1 fn=121 tn=5 bl=148 pwr=0
2025-03-30 06:35:23 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=160): ver=1 fn=121 tn=6 bl=148 pwr=0
2025-03-30 06:35:23 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=160): ver=1 fn=121 tn=7 bl=148 pwr=0
2025-03-30 06:35:23 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=160): ver=1 fn=122 tn=0 bl=148 pwr=0
2025-03-30 06:35:23 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=160): ver=1 fn=122 tn=1 bl=148 pwr=0
2025-03-30 06:35:23 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=160): ver=1 fn=122 tn=2 bl=148 pwr=0
2025-03-30 06:35:23 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=160): ver=1 fn=122 tn=3 bl=148 pwr=0
2025-03-30 06:35:23 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=160): ver=1 fn=122 tn=4 bl=148 pwr=0
2025-03-30 06:35:23 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=160): ver=1 fn=122 tn=5 bl=148 pwr=0
2025-03-30 06:35:23 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=160): ver=1 fn=122 tn=6 bl=148 pwr=0
2025-03-30 06:35:23 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=160): ver=1 fn=122 tn=7 bl=148 pwr=0
2025-03-30 06:35:23 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=160): ver=1 fn=123 tn=0 bl=148 pwr=0
2025-03-30 06:35:23 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=160): ver=1 fn=123 tn=1 bl=148 pwr=0
2025-03-30 06:35:23 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=160): ver=1 fn=123 tn=2 bl=148 pwr=0
2025-03-30 06:35:23 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=160): ver=1 fn=123 tn=3 bl=148 pwr=0
2025-03-30 06:35:23 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=160): ver=1 fn=123 tn=4 bl=148 pwr=0
2025-03-30 06:35:23 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=160): ver=1 fn=123 tn=5 bl=148 pwr=0
2025-03-30 06:35:23 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=160): ver=1 fn=123 tn=6 bl=148 pwr=0
2025-03-30 06:35:23 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=160): ver=1 fn=123 tn=7 bl=148 pwr=0
2025-03-30 06:35:23 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=160): ver=1 fn=124 tn=0 bl=148 pwr=0
2025-03-30 06:35:23 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=160): ver=1 fn=124 tn=1 bl=148 pwr=0
2025-03-30 06:35:23 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=160): ver=1 fn=124 tn=2 bl=148 pwr=0
2025-03-30 06:35:23 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=160): ver=1 fn=124 tn=3 bl=148 pwr=0
2025-03-30 06:35:23 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=160): ver=1 fn=124 tn=4 bl=148 pwr=0
2025-03-30 06:35:23 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=160): ver=1 fn=124 tn=5 bl=148 pwr=0
2025-03-30 06:35:23 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=160): ver=1 fn=124 tn=6 bl=148 pwr=0
2025-03-30 06:35:23 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=160): ver=1 fn=124 tn=7 bl=148 pwr=0
2025-03-30 06:35:23 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=160): ver=1 fn=125 tn=0 bl=148 pwr=0
2025-03-30 06:35:23 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=160): ver=1 fn=125 tn=1 bl=148 pwr=0
2025-03-30 06:35:23 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=160): ver=1 fn=125 tn=2 bl=148 pwr=0
2025-03-30 06:35:23 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=160): ver=1 fn=125 tn=3 bl=148 pwr=0
2025-03-30 06:35:23 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=160): ver=1 fn=125 tn=4 bl=148 pwr=0
2025-03-30 06:35:23 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=160): ver=1 fn=125 tn=5 bl=148 pwr=0
2025-03-30 06:35:23 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=160): ver=1 fn=125 tn=6 bl=148 pwr=0
2025-03-30 06:35:23 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=160): ver=1 fn=125 tn=7 bl=148 pwr=0
2025-03-30 06:35:23 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=160): ver=1 fn=126 tn=0 bl=148 pwr=0
2025-03-30 06:35:23 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=160): ver=1 fn=126 tn=1 bl=148 pwr=0
2025-03-30 06:35:23 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=160): ver=1 fn=126 tn=2 bl=148 pwr=0
2025-03-30 06:35:23 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=160): ver=1 fn=126 tn=3 bl=148 pwr=0
2025-03-30 06:35:23 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=160): ver=1 fn=126 tn=4 bl=148 pwr=0
2025-03-30 06:35:23 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=160): ver=1 fn=126 tn=5 bl=148 pwr=0
2025-03-30 06:35:23 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=160): ver=1 fn=126 tn=6 bl=148 pwr=0
2025-03-30 06:35:23 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=160): ver=1 fn=126 tn=7 bl=148 pwr=0
2025-03-30 06:35:23 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=160): ver=1 fn=127 tn=0 bl=148 pwr=0
2025-03-30 06:35:23 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=160): ver=1 fn=127 tn=1 bl=148 pwr=0
2025-03-30 06:35:23 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=160): ver=1 fn=127 tn=2 bl=148 pwr=0
2025-03-30 06:35:23 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=160): ver=1 fn=127 tn=3 bl=148 pwr=0
2025-03-30 06:35:23 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=160): ver=1 fn=127 tn=4 bl=148 pwr=0
2025-03-30 06:35:23 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=160): ver=1 fn=127 tn=5 bl=148 pwr=0
2025-03-30 06:35:23 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=160): ver=1 fn=127 tn=6 bl=148 pwr=0
2025-03-30 06:35:23 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=160): ver=1 fn=127 tn=7 bl=148 pwr=0
2025-03-30 06:35:23 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=160): ver=1 fn=128 tn=0 bl=148 pwr=0
2025-03-30 06:35:23 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=160): ver=1 fn=128 tn=1 bl=148 pwr=0
2025-03-30 06:35:23 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=160): ver=1 fn=128 tn=2 bl=148 pwr=0
2025-03-30 06:35:23 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=160): ver=1 fn=128 tn=3 bl=148 pwr=0
2025-03-30 06:35:23 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=160): ver=1 fn=128 tn=4 bl=148 pwr=0
2025-03-30 06:35:23 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=160): ver=1 fn=128 tn=5 bl=148 pwr=0
2025-03-30 06:35:23 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=160): ver=1 fn=128 tn=6 bl=148 pwr=0
2025-03-30 06:35:23 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=160): ver=1 fn=128 tn=7 bl=148 pwr=0
2025-03-30 06:35:23 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=160): ver=1 fn=129 tn=0 bl=148 pwr=0
2025-03-30 06:35:23 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=160): ver=1 fn=129 tn=1 bl=148 pwr=0
2025-03-30 06:35:23 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=160): ver=1 fn=129 tn=2 bl=148 pwr=0
2025-03-30 06:35:23 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=160): ver=1 fn=129 tn=3 bl=148 pwr=0
2025-03-30 06:35:23 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=160): ver=1 fn=129 tn=4 bl=148 pwr=0
2025-03-30 06:35:23 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=160): ver=1 fn=129 tn=5 bl=148 pwr=0
2025-03-30 06:35:23 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=160): ver=1 fn=129 tn=6 bl=148 pwr=0
2025-03-30 06:35:23 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=160): ver=1 fn=129 tn=7 bl=148 pwr=0
2025-03-30 06:35:23 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=160): ver=1 fn=130 tn=0 bl=148 pwr=0
2025-03-30 06:35:23 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=160): ver=1 fn=130 tn=1 bl=148 pwr=0
2025-03-30 06:35:23 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=160): ver=1 fn=130 tn=2 bl=148 pwr=0
2025-03-30 06:35:23 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=160): ver=1 fn=130 tn=3 bl=148 pwr=0
2025-03-30 06:35:23 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=160): ver=1 fn=130 tn=4 bl=148 pwr=0
2025-03-30 06:35:23 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=160): ver=1 fn=130 tn=5 bl=148 pwr=0
2025-03-30 06:35:23 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=160): ver=1 fn=130 tn=6 bl=148 pwr=0
2025-03-30 06:35:23 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=160): ver=1 fn=130 tn=7 bl=148 pwr=0
2025-03-30 06:35:23 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=160): ver=1 fn=131 tn=0 bl=148 pwr=0
2025-03-30 06:35:23 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=160): ver=1 fn=131 tn=1 bl=148 pwr=0
2025-03-30 06:35:23 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=160): ver=1 fn=131 tn=2 bl=148 pwr=0
2025-03-30 06:35:23 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=160): ver=1 fn=131 tn=3 bl=148 pwr=0
2025-03-30 06:35:23 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=160): ver=1 fn=131 tn=4 bl=148 pwr=0
2025-03-30 06:35:23 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=160): ver=1 fn=131 tn=5 bl=148 pwr=0
2025-03-30 06:35:23 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=160): ver=1 fn=131 tn=6 bl=148 pwr=0
2025-03-30 06:35:23 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=160): ver=1 fn=131 tn=7 bl=148 pwr=0
2025-03-30 06:35:23 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=160): ver=1 fn=132 tn=0 bl=148 pwr=0
2025-03-30 06:35:23 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=160): ver=1 fn=132 tn=1 bl=148 pwr=0
2025-03-30 06:35:23 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=160): ver=1 fn=132 tn=2 bl=148 pwr=0
2025-03-30 06:35:23 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=160): ver=1 fn=132 tn=3 bl=148 pwr=0
2025-03-30 06:35:23 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=160): ver=1 fn=132 tn=4 bl=148 pwr=0
2025-03-30 06:35:23 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=160): ver=1 fn=132 tn=5 bl=148 pwr=0
2025-03-30 06:35:23 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=160): ver=1 fn=132 tn=6 bl=148 pwr=0
2025-03-30 06:35:23 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=160): ver=1 fn=132 tn=7 bl=148 pwr=0
2025-03-30 06:35:23 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=160): ver=1 fn=133 tn=0 bl=148 pwr=0
2025-03-30 06:35:23 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=160): ver=1 fn=133 tn=1 bl=148 pwr=0
2025-03-30 06:35:23 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=160): ver=1 fn=133 tn=2 bl=148 pwr=0
2025-03-30 06:35:23 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=160): ver=1 fn=133 tn=3 bl=148 pwr=0
2025-03-30 06:35:23 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=160): ver=1 fn=133 tn=4 bl=148 pwr=0
2025-03-30 06:35:23 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=160): ver=1 fn=133 tn=5 bl=148 pwr=0
2025-03-30 06:35:23 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=160): ver=1 fn=133 tn=6 bl=148 pwr=0
2025-03-30 06:35:23 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=160): ver=1 fn=133 tn=7 bl=148 pwr=0
2025-03-30 06:35:23 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=160): ver=1 fn=134 tn=0 bl=148 pwr=0
2025-03-30 06:35:23 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=160): ver=1 fn=134 tn=1 bl=148 pwr=0
2025-03-30 06:35:23 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=160): ver=1 fn=134 tn=2 bl=148 pwr=0
2025-03-30 06:35:23 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=160): ver=1 fn=134 tn=3 bl=148 pwr=0
2025-03-30 06:35:23 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=160): ver=1 fn=134 tn=4 bl=148 pwr=0
2025-03-30 06:35:23 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=160): ver=1 fn=134 tn=5 bl=148 pwr=0
2025-03-30 06:35:23 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=160): ver=1 fn=134 tn=6 bl=148 pwr=0
2025-03-30 06:35:23 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=160): ver=1 fn=134 tn=7 bl=148 pwr=0
2025-03-30 06:35:23 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=160): ver=1 fn=135 tn=0 bl=148 pwr=0
2025-03-30 06:35:23 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=160): ver=1 fn=135 tn=1 bl=148 pwr=0
2025-03-30 06:35:23 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=160): ver=1 fn=135 tn=2 bl=148 pwr=0
2025-03-30 06:35:23 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=160): ver=1 fn=135 tn=3 bl=148 pwr=0
2025-03-30 06:35:23 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=160): ver=1 fn=135 tn=4 bl=148 pwr=0
2025-03-30 06:35:23 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=160): ver=1 fn=135 tn=5 bl=148 pwr=0
2025-03-30 06:35:23 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=160): ver=1 fn=135 tn=6 bl=148 pwr=0
2025-03-30 06:35:23 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=160): ver=1 fn=135 tn=7 bl=148 pwr=0
2025-03-30 06:35:23 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=160): ver=1 fn=136 tn=0 bl=148 pwr=0
2025-03-30 06:35:23 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=160): ver=1 fn=136 tn=1 bl=148 pwr=0
2025-03-30 06:35:23 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=160): ver=1 fn=136 tn=2 bl=148 pwr=0
2025-03-30 06:35:23 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=160): ver=1 fn=136 tn=3 bl=148 pwr=0
2025-03-30 06:35:23 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=160): ver=1 fn=136 tn=4 bl=148 pwr=0
2025-03-30 06:35:23 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=160): ver=1 fn=136 tn=5 bl=148 pwr=0
2025-03-30 06:35:23 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=160): ver=1 fn=136 tn=6 bl=148 pwr=0
2025-03-30 06:35:23 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=160): ver=1 fn=136 tn=7 bl=148 pwr=0
2025-03-30 06:35:23 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=160): ver=1 fn=137 tn=0 bl=148 pwr=0
2025-03-30 06:35:23 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=160): ver=1 fn=137 tn=1 bl=148 pwr=0
2025-03-30 06:35:23 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=160): ver=1 fn=137 tn=2 bl=148 pwr=0
2025-03-30 06:35:23 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=160): ver=1 fn=137 tn=3 bl=148 pwr=0
2025-03-30 06:35:23 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=160): ver=1 fn=137 tn=4 bl=148 pwr=0
2025-03-30 06:35:23 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=160): ver=1 fn=137 tn=5 bl=148 pwr=0
2025-03-30 06:35:23 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=160): ver=1 fn=137 tn=6 bl=148 pwr=0
2025-03-30 06:35:23 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=160): ver=1 fn=137 tn=7 bl=148 pwr=0
2025-03-30 06:35:23 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=160): ver=1 fn=138 tn=0 bl=148 pwr=0
2025-03-30 06:35:23 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=160): ver=1 fn=138 tn=1 bl=148 pwr=0
2025-03-30 06:35:23 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=160): ver=1 fn=138 tn=2 bl=148 pwr=0
2025-03-30 06:35:23 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=160): ver=1 fn=138 tn=3 bl=148 pwr=0
2025-03-30 06:35:23 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=160): ver=1 fn=138 tn=4 bl=148 pwr=0
2025-03-30 06:35:23 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=160): ver=1 fn=138 tn=5 bl=148 pwr=0
2025-03-30 06:35:23 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=160): ver=1 fn=138 tn=6 bl=148 pwr=0
2025-03-30 06:35:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:35:23 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-03-30 06:35:23 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=205): ver=1 fn=163 tn=0 bl=148 pwr=0
2025-03-30 06:35:23 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=205): ver=1 fn=163 tn=1 bl=148 pwr=0
2025-03-30 06:35:23 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=205): ver=1 fn=163 tn=2 bl=148 pwr=0
2025-03-30 06:35:23 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=205): ver=1 fn=163 tn=3 bl=148 pwr=0
2025-03-30 06:35:23 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=205): ver=1 fn=163 tn=4 bl=148 pwr=0
2025-03-30 06:35:23 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=205): ver=1 fn=163 tn=5 bl=148 pwr=0
2025-03-30 06:35:23 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=205): ver=1 fn=163 tn=6 bl=148 pwr=0
2025-03-30 06:35:23 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=205): ver=1 fn=163 tn=7 bl=148 pwr=0
2025-03-30 06:35:23 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=205): ver=1 fn=164 tn=0 bl=148 pwr=0
2025-03-30 06:35:23 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=205): ver=1 fn=164 tn=1 bl=148 pwr=0
2025-03-30 06:35:23 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=205): ver=1 fn=164 tn=2 bl=148 pwr=0
2025-03-30 06:35:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:35:23 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=205): ver=1 fn=164 tn=3 bl=148 pwr=0
2025-03-30 06:35:23 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=205): ver=1 fn=164 tn=4 bl=148 pwr=0
2025-03-30 06:35:23 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=205): ver=1 fn=164 tn=5 bl=148 pwr=0
2025-03-30 06:35:23 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=205): ver=1 fn=164 tn=6 bl=148 pwr=0
2025-03-30 06:35:23 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=205): ver=1 fn=164 tn=7 bl=148 pwr=0
2025-03-30 06:35:23 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=205): ver=1 fn=165 tn=0 bl=148 pwr=0
2025-03-30 06:35:23 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=205): ver=1 fn=165 tn=1 bl=148 pwr=0
2025-03-30 06:35:23 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=205): ver=1 fn=165 tn=2 bl=148 pwr=0
2025-03-30 06:35:23 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=205): ver=1 fn=165 tn=3 bl=148 pwr=0
2025-03-30 06:35:23 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=205): ver=1 fn=165 tn=4 bl=148 pwr=0
2025-03-30 06:35:23 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=205): ver=1 fn=165 tn=5 bl=148 pwr=0
2025-03-30 06:35:23 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=205): ver=1 fn=165 tn=6 bl=148 pwr=0
2025-03-30 06:35:23 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=205): ver=1 fn=165 tn=7 bl=148 pwr=0
2025-03-30 06:35:23 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=205): ver=1 fn=166 tn=0 bl=148 pwr=0
2025-03-30 06:35:23 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=205): ver=1 fn=166 tn=1 bl=148 pwr=0
2025-03-30 06:35:23 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=205): ver=1 fn=166 tn=2 bl=148 pwr=0
2025-03-30 06:35:23 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=205): ver=1 fn=166 tn=3 bl=148 pwr=0
2025-03-30 06:35:23 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=205): ver=1 fn=166 tn=4 bl=148 pwr=0
2025-03-30 06:35:23 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=205): ver=1 fn=166 tn=5 bl=148 pwr=0
2025-03-30 06:35:23 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=205): ver=1 fn=166 tn=6 bl=148 pwr=0
2025-03-30 06:35:23 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=205): ver=1 fn=166 tn=7 bl=148 pwr=0
2025-03-30 06:35:23 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=205): ver=1 fn=167 tn=0 bl=148 pwr=0
2025-03-30 06:35:23 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=205): ver=1 fn=167 tn=1 bl=148 pwr=0
2025-03-30 06:35:23 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=205): ver=1 fn=167 tn=2 bl=148 pwr=0
2025-03-30 06:35:23 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=205): ver=1 fn=167 tn=3 bl=148 pwr=0
2025-03-30 06:35:23 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=205): ver=1 fn=167 tn=4 bl=148 pwr=0
2025-03-30 06:35:23 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=205): ver=1 fn=167 tn=5 bl=148 pwr=0
2025-03-30 06:35:23 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=205): ver=1 fn=167 tn=6 bl=148 pwr=0
2025-03-30 06:35:23 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=205): ver=1 fn=167 tn=7 bl=148 pwr=0
2025-03-30 06:35:23 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=205): ver=1 fn=168 tn=0 bl=148 pwr=0
2025-03-30 06:35:23 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=205): ver=1 fn=168 tn=1 bl=148 pwr=0
2025-03-30 06:35:23 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=205): ver=1 fn=168 tn=2 bl=148 pwr=0
2025-03-30 06:35:23 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=205): ver=1 fn=168 tn=3 bl=148 pwr=0
2025-03-30 06:35:23 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=205): ver=1 fn=168 tn=4 bl=148 pwr=0
2025-03-30 06:35:23 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=205): ver=1 fn=168 tn=5 bl=148 pwr=0
2025-03-30 06:35:23 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=205): ver=1 fn=168 tn=6 bl=148 pwr=0
2025-03-30 06:35:23 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=205): ver=1 fn=168 tn=7 bl=148 pwr=0
2025-03-30 06:35:23 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=205): ver=1 fn=169 tn=0 bl=148 pwr=0
2025-03-30 06:35:23 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=205): ver=1 fn=169 tn=1 bl=148 pwr=0
2025-03-30 06:35:23 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=205): ver=1 fn=169 tn=2 bl=148 pwr=0
2025-03-30 06:35:23 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=205): ver=1 fn=169 tn=3 bl=148 pwr=0
2025-03-30 06:35:23 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=205): ver=1 fn=169 tn=4 bl=148 pwr=0
2025-03-30 06:35:23 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=205): ver=1 fn=169 tn=5 bl=148 pwr=0
2025-03-30 06:35:23 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=205): ver=1 fn=169 tn=6 bl=148 pwr=0
2025-03-30 06:35:23 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=205): ver=1 fn=169 tn=7 bl=148 pwr=0
2025-03-30 06:35:23 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=205): ver=1 fn=170 tn=0 bl=148 pwr=0
2025-03-30 06:35:23 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=205): ver=1 fn=170 tn=1 bl=148 pwr=0
2025-03-30 06:35:23 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=205): ver=1 fn=170 tn=2 bl=148 pwr=0
2025-03-30 06:35:23 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=205): ver=1 fn=170 tn=3 bl=148 pwr=0
2025-03-30 06:35:23 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=205): ver=1 fn=170 tn=4 bl=148 pwr=0
2025-03-30 06:35:23 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=205): ver=1 fn=170 tn=5 bl=148 pwr=0
2025-03-30 06:35:23 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=205): ver=1 fn=170 tn=6 bl=148 pwr=0
2025-03-30 06:35:23 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=205): ver=1 fn=170 tn=7 bl=148 pwr=0
2025-03-30 06:35:23 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=205): ver=1 fn=171 tn=0 bl=148 pwr=0
2025-03-30 06:35:23 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=205): ver=1 fn=171 tn=1 bl=148 pwr=0
2025-03-30 06:35:23 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=205): ver=1 fn=171 tn=2 bl=148 pwr=0
2025-03-30 06:35:23 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=205): ver=1 fn=171 tn=3 bl=148 pwr=0
2025-03-30 06:35:23 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=205): ver=1 fn=171 tn=4 bl=148 pwr=0
2025-03-30 06:35:23 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=205): ver=1 fn=171 tn=5 bl=148 pwr=0
2025-03-30 06:35:23 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=205): ver=1 fn=171 tn=6 bl=148 pwr=0
2025-03-30 06:35:23 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=205): ver=1 fn=171 tn=7 bl=148 pwr=0
2025-03-30 06:35:23 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=205): ver=1 fn=172 tn=0 bl=148 pwr=0
2025-03-30 06:35:23 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=205): ver=1 fn=172 tn=1 bl=148 pwr=0
2025-03-30 06:35:23 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=205): ver=1 fn=172 tn=2 bl=148 pwr=0
2025-03-30 06:35:23 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=205): ver=1 fn=172 tn=3 bl=148 pwr=0
2025-03-30 06:35:23 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=205): ver=1 fn=172 tn=4 bl=148 pwr=0
2025-03-30 06:35:23 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=205): ver=1 fn=172 tn=5 bl=148 pwr=0
2025-03-30 06:35:23 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=205): ver=1 fn=172 tn=6 bl=148 pwr=0
2025-03-30 06:35:23 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=205): ver=1 fn=172 tn=7 bl=148 pwr=0
2025-03-30 06:35:23 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=205): ver=1 fn=173 tn=0 bl=148 pwr=0
2025-03-30 06:35:23 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=205): ver=1 fn=173 tn=1 bl=148 pwr=0
2025-03-30 06:35:23 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=205): ver=1 fn=173 tn=2 bl=148 pwr=0
2025-03-30 06:35:23 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=205): ver=1 fn=173 tn=3 bl=148 pwr=0
2025-03-30 06:35:23 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=205): ver=1 fn=173 tn=4 bl=148 pwr=0
2025-03-30 06:35:23 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=205): ver=1 fn=173 tn=5 bl=148 pwr=0
2025-03-30 06:35:23 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=205): ver=1 fn=173 tn=6 bl=148 pwr=0
2025-03-30 06:35:23 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=205): ver=1 fn=173 tn=7 bl=148 pwr=0
2025-03-30 06:35:23 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=205): ver=1 fn=174 tn=0 bl=148 pwr=0
2025-03-30 06:35:23 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=205): ver=1 fn=174 tn=1 bl=148 pwr=0
2025-03-30 06:35:23 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=205): ver=1 fn=174 tn=2 bl=148 pwr=0
2025-03-30 06:35:23 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=205): ver=1 fn=174 tn=3 bl=148 pwr=0
2025-03-30 06:35:23 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=205): ver=1 fn=174 tn=4 bl=148 pwr=0
2025-03-30 06:35:23 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=205): ver=1 fn=174 tn=5 bl=148 pwr=0
2025-03-30 06:35:23 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=205): ver=1 fn=174 tn=6 bl=148 pwr=0
2025-03-30 06:35:23 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=205): ver=1 fn=174 tn=7 bl=148 pwr=0
2025-03-30 06:35:23 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=205): ver=1 fn=175 tn=0 bl=148 pwr=0
2025-03-30 06:35:23 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=205): ver=1 fn=175 tn=1 bl=148 pwr=0
2025-03-30 06:35:23 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=205): ver=1 fn=175 tn=2 bl=148 pwr=0
2025-03-30 06:35:23 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=205): ver=1 fn=175 tn=3 bl=148 pwr=0
2025-03-30 06:35:23 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=205): ver=1 fn=175 tn=4 bl=148 pwr=0
2025-03-30 06:35:23 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=205): ver=1 fn=175 tn=5 bl=148 pwr=0
2025-03-30 06:35:23 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=205): ver=1 fn=175 tn=6 bl=148 pwr=0
2025-03-30 06:35:23 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=205): ver=1 fn=175 tn=7 bl=148 pwr=0
2025-03-30 06:35:23 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=205): ver=1 fn=176 tn=0 bl=148 pwr=0
2025-03-30 06:35:23 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=205): ver=1 fn=176 tn=1 bl=148 pwr=0
2025-03-30 06:35:23 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=205): ver=1 fn=176 tn=2 bl=148 pwr=0
2025-03-30 06:35:23 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=205): ver=1 fn=176 tn=3 bl=148 pwr=0
2025-03-30 06:35:23 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=205): ver=1 fn=176 tn=4 bl=148 pwr=0
2025-03-30 06:35:23 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=205): ver=1 fn=176 tn=5 bl=148 pwr=0
2025-03-30 06:35:23 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=205): ver=1 fn=176 tn=6 bl=148 pwr=0
2025-03-30 06:35:23 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=205): ver=1 fn=176 tn=7 bl=148 pwr=0
2025-03-30 06:35:23 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=205): ver=1 fn=177 tn=0 bl=148 pwr=0
2025-03-30 06:35:23 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=205): ver=1 fn=177 tn=1 bl=148 pwr=0
2025-03-30 06:35:23 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=205): ver=1 fn=177 tn=2 bl=148 pwr=0
2025-03-30 06:35:23 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=205): ver=1 fn=177 tn=3 bl=148 pwr=0
2025-03-30 06:35:23 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=205): ver=1 fn=177 tn=4 bl=148 pwr=0
2025-03-30 06:35:23 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=205): ver=1 fn=177 tn=5 bl=148 pwr=0
2025-03-30 06:35:23 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=205): ver=1 fn=177 tn=6 bl=148 pwr=0
2025-03-30 06:35:23 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=205): ver=1 fn=177 tn=7 bl=148 pwr=0
2025-03-30 06:35:23 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=205): ver=1 fn=178 tn=0 bl=148 pwr=0
2025-03-30 06:35:23 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=205): ver=1 fn=178 tn=1 bl=148 pwr=0
2025-03-30 06:35:23 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=205): ver=1 fn=178 tn=2 bl=148 pwr=0
2025-03-30 06:35:23 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=205): ver=1 fn=178 tn=3 bl=148 pwr=0
2025-03-30 06:35:23 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=205): ver=1 fn=178 tn=4 bl=148 pwr=0
2025-03-30 06:35:23 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=205): ver=1 fn=178 tn=5 bl=148 pwr=0
2025-03-30 06:35:23 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=205): ver=1 fn=178 tn=6 bl=148 pwr=0
2025-03-30 06:35:23 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=205): ver=1 fn=178 tn=7 bl=148 pwr=0
2025-03-30 06:35:23 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=205): ver=1 fn=179 tn=0 bl=148 pwr=0
2025-03-30 06:35:23 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=205): ver=1 fn=179 tn=1 bl=148 pwr=0
2025-03-30 06:35:23 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=205): ver=1 fn=179 tn=2 bl=148 pwr=0
2025-03-30 06:35:23 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=205): ver=1 fn=179 tn=3 bl=148 pwr=0
2025-03-30 06:35:23 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=205): ver=1 fn=179 tn=4 bl=148 pwr=0
2025-03-30 06:35:23 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=205): ver=1 fn=179 tn=5 bl=148 pwr=0
2025-03-30 06:35:23 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=205): ver=1 fn=179 tn=6 bl=148 pwr=0
2025-03-30 06:35:23 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=205): ver=1 fn=179 tn=7 bl=148 pwr=0
2025-03-30 06:35:23 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=205): ver=1 fn=180 tn=0 bl=148 pwr=0
2025-03-30 06:35:23 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=205): ver=1 fn=180 tn=1 bl=148 pwr=0
2025-03-30 06:35:23 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=205): ver=1 fn=180 tn=2 bl=148 pwr=0
2025-03-30 06:35:23 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=205): ver=1 fn=180 tn=3 bl=148 pwr=0
2025-03-30 06:35:23 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=205): ver=1 fn=180 tn=4 bl=148 pwr=0
2025-03-30 06:35:23 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=205): ver=1 fn=180 tn=5 bl=148 pwr=0
2025-03-30 06:35:23 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=205): ver=1 fn=180 tn=6 bl=148 pwr=0
2025-03-30 06:35:23 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=205): ver=1 fn=180 tn=7 bl=148 pwr=0
2025-03-30 06:35:23 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=205): ver=1 fn=181 tn=0 bl=148 pwr=0
2025-03-30 06:35:23 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=205): ver=1 fn=181 tn=1 bl=148 pwr=0
2025-03-30 06:35:23 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=205): ver=1 fn=181 tn=2 bl=148 pwr=0
2025-03-30 06:35:23 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=205): ver=1 fn=181 tn=3 bl=148 pwr=0
2025-03-30 06:35:23 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=205): ver=1 fn=181 tn=4 bl=148 pwr=0
2025-03-30 06:35:23 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=205): ver=1 fn=181 tn=5 bl=148 pwr=0
2025-03-30 06:35:23 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=205): ver=1 fn=181 tn=6 bl=148 pwr=0
2025-03-30 06:35:23 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=205): ver=1 fn=181 tn=7 bl=148 pwr=0
2025-03-30 06:35:23 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=205): ver=1 fn=182 tn=0 bl=148 pwr=0
2025-03-30 06:35:23 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=205): ver=1 fn=182 tn=1 bl=148 pwr=0
2025-03-30 06:35:23 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=205): ver=1 fn=182 tn=2 bl=148 pwr=0
2025-03-30 06:35:23 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=205): ver=1 fn=182 tn=3 bl=148 pwr=0
2025-03-30 06:35:23 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=205): ver=1 fn=182 tn=4 bl=148 pwr=0
2025-03-30 06:35:23 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=205): ver=1 fn=182 tn=5 bl=148 pwr=0
2025-03-30 06:35:23 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=205): ver=1 fn=182 tn=6 bl=148 pwr=0
2025-03-30 06:35:23 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=205): ver=1 fn=182 tn=7 bl=148 pwr=0
2025-03-30 06:35:23 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=205): ver=1 fn=183 tn=0 bl=148 pwr=0
2025-03-30 06:35:23 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=205): ver=1 fn=183 tn=1 bl=148 pwr=0
2025-03-30 06:35:23 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=205): ver=1 fn=183 tn=2 bl=148 pwr=0
2025-03-30 06:35:23 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=205): ver=1 fn=183 tn=3 bl=148 pwr=0
2025-03-30 06:35:23 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=205): ver=1 fn=183 tn=4 bl=148 pwr=0
2025-03-30 06:35:23 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=205): ver=1 fn=183 tn=5 bl=148 pwr=0
2025-03-30 06:35:23 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=205): ver=1 fn=183 tn=6 bl=148 pwr=0
2025-03-30 06:35:23 [WARNING] clck_gen.py:108 CLCKGen: time overrun by -7694us; resetting the clock
2025-03-30 06:35:23 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:35:23 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=247): ver=1 fn=208 tn=0 bl=148 pwr=0
2025-03-30 06:35:23 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:35:23 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:35:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:35:23 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=248): ver=1 fn=208 tn=1 bl=148 pwr=0
2025-03-30 06:35:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:35:23 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=291): ver=1 fn=208 tn=2 bl=148 pwr=0
2025-03-30 06:35:23 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=291): ver=1 fn=208 tn=3 bl=148 pwr=0
2025-03-30 06:35:23 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=291): ver=1 fn=208 tn=4 bl=148 pwr=0
2025-03-30 06:35:23 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=291): ver=1 fn=208 tn=5 bl=148 pwr=0
2025-03-30 06:35:23 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=291): ver=1 fn=208 tn=6 bl=148 pwr=0
2025-03-30 06:35:23 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=291): ver=1 fn=208 tn=7 bl=148 pwr=0
2025-03-30 06:35:23 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=291): ver=1 fn=209 tn=0 bl=148 pwr=0
2025-03-30 06:35:23 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=291): ver=1 fn=209 tn=1 bl=148 pwr=0
2025-03-30 06:35:23 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=291): ver=1 fn=209 tn=2 bl=148 pwr=0
2025-03-30 06:35:23 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=291): ver=1 fn=209 tn=3 bl=148 pwr=0
2025-03-30 06:35:23 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=291): ver=1 fn=209 tn=4 bl=148 pwr=0
2025-03-30 06:35:23 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=291): ver=1 fn=209 tn=5 bl=148 pwr=0
2025-03-30 06:35:23 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=291): ver=1 fn=209 tn=6 bl=148 pwr=0
2025-03-30 06:35:23 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=291): ver=1 fn=209 tn=7 bl=148 pwr=0
2025-03-30 06:35:23 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=291): ver=1 fn=210 tn=0 bl=148 pwr=0
2025-03-30 06:35:23 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=291): ver=1 fn=210 tn=1 bl=148 pwr=0
2025-03-30 06:35:23 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=291): ver=1 fn=210 tn=2 bl=148 pwr=0
2025-03-30 06:35:23 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=291): ver=1 fn=210 tn=3 bl=148 pwr=0
2025-03-30 06:35:23 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=291): ver=1 fn=210 tn=4 bl=148 pwr=0
2025-03-30 06:35:23 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=291): ver=1 fn=210 tn=5 bl=148 pwr=0
2025-03-30 06:35:23 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=291): ver=1 fn=210 tn=6 bl=148 pwr=0
2025-03-30 06:35:23 [DEBUG] clck_gen.py:128 IND CLOCK 306
2025-03-30 06:35:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:35:23 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=334): ver=1 fn=210 tn=7 bl=148 pwr=0
2025-03-30 06:35:23 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=335): ver=1 fn=211 tn=0 bl=148 pwr=0
2025-03-30 06:35:23 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=335): ver=1 fn=211 tn=1 bl=148 pwr=0
2025-03-30 06:35:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:35:24 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=378): ver=1 fn=211 tn=2 bl=148 pwr=0
2025-03-30 06:35:24 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=378): ver=1 fn=211 tn=3 bl=148 pwr=0
2025-03-30 06:35:24 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=378): ver=1 fn=211 tn=4 bl=148 pwr=0
2025-03-30 06:35:24 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=378): ver=1 fn=211 tn=5 bl=148 pwr=0
2025-03-30 06:35:24 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=378): ver=1 fn=211 tn=6 bl=148 pwr=0
2025-03-30 06:35:24 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=378): ver=1 fn=211 tn=7 bl=148 pwr=0
2025-03-30 06:35:24 [DEBUG] clck_gen.py:128 IND CLOCK 408
2025-03-30 06:35:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:35:24 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=421): ver=1 fn=212 tn=0 bl=148 pwr=0
2025-03-30 06:35:24 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=421): ver=1 fn=212 tn=1 bl=148 pwr=0
2025-03-30 06:35:24 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=421): ver=1 fn=212 tn=2 bl=148 pwr=0
2025-03-30 06:35:24 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=421): ver=1 fn=212 tn=3 bl=148 pwr=0
2025-03-30 06:35:24 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=421): ver=1 fn=212 tn=4 bl=148 pwr=0
2025-03-30 06:35:24 [DEBUG] fake_trx.py:377 (BTS@172.18.26.20:5700) Recv FAKE_TRXC_DELAY cmd
2025-03-30 06:35:24 [INFO] fake_trx.py:380 (BTS@172.18.26.20:5700) Artificial TRXC delay set to 0
2025-03-30 06:35:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD FAKE_TRXC_DELAY
2025-03-30 06:35:24 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:35:24 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:35:24 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:35:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:35:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:35:24 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:35:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:35:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:35:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:35:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:35:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:35:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:35:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:35:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:35:24 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=465): ver=1 fn=212 tn=5 bl=148 pwr=0
2025-03-30 06:35:24 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=465): ver=1 fn=212 tn=6 bl=148 pwr=0
2025-03-30 06:35:24 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=465): ver=1 fn=212 tn=7 bl=148 pwr=0
2025-03-30 06:35:24 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=465): ver=1 fn=213 tn=0 bl=148 pwr=0
2025-03-30 06:35:24 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=465): ver=1 fn=213 tn=1 bl=148 pwr=0
2025-03-30 06:35:24 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=465): ver=1 fn=213 tn=2 bl=148 pwr=0
2025-03-30 06:35:24 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=465): ver=1 fn=213 tn=3 bl=148 pwr=0
2025-03-30 06:35:24 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=465): ver=1 fn=213 tn=4 bl=148 pwr=0
2025-03-30 06:35:24 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=465): ver=1 fn=213 tn=5 bl=148 pwr=0
2025-03-30 06:35:24 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=465): ver=1 fn=213 tn=6 bl=148 pwr=0
2025-03-30 06:35:24 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=465): ver=1 fn=213 tn=7 bl=148 pwr=0
2025-03-30 06:35:24 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=465): ver=1 fn=214 tn=0 bl=148 pwr=0
2025-03-30 06:35:24 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=465): ver=1 fn=214 tn=1 bl=148 pwr=0
2025-03-30 06:35:24 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=465): ver=1 fn=214 tn=2 bl=148 pwr=0
2025-03-30 06:35:24 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=465): ver=1 fn=214 tn=3 bl=148 pwr=0
2025-03-30 06:35:24 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=465): ver=1 fn=214 tn=4 bl=148 pwr=0
2025-03-30 06:35:24 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=465): ver=1 fn=214 tn=5 bl=148 pwr=0
2025-03-30 06:35:24 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=465): ver=1 fn=214 tn=6 bl=148 pwr=0
2025-03-30 06:35:24 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=465): ver=1 fn=214 tn=7 bl=148 pwr=0
2025-03-30 06:35:24 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=465): ver=1 fn=215 tn=0 bl=148 pwr=0
2025-03-30 06:35:24 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=465): ver=1 fn=215 tn=1 bl=148 pwr=0
2025-03-30 06:35:24 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=465): ver=1 fn=215 tn=2 bl=148 pwr=0
2025-03-30 06:35:24 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=465): ver=1 fn=215 tn=3 bl=148 pwr=0
2025-03-30 06:35:24 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=465): ver=1 fn=215 tn=4 bl=148 pwr=0
2025-03-30 06:35:24 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=465): ver=1 fn=215 tn=5 bl=148 pwr=0
2025-03-30 06:35:24 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=465): ver=1 fn=215 tn=6 bl=148 pwr=0
2025-03-30 06:35:24 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=465): ver=1 fn=215 tn=7 bl=148 pwr=0
2025-03-30 06:35:24 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=465): ver=1 fn=216 tn=0 bl=148 pwr=0
2025-03-30 06:35:24 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=465): ver=1 fn=216 tn=1 bl=148 pwr=0
2025-03-30 06:35:24 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=465): ver=1 fn=216 tn=2 bl=148 pwr=0
2025-03-30 06:35:24 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=465): ver=1 fn=216 tn=3 bl=148 pwr=0
2025-03-30 06:35:24 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=465): ver=1 fn=216 tn=4 bl=148 pwr=0
2025-03-30 06:35:24 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=465): ver=1 fn=216 tn=5 bl=148 pwr=0
2025-03-30 06:35:24 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=465): ver=1 fn=216 tn=6 bl=148 pwr=0
2025-03-30 06:35:24 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=465): ver=1 fn=216 tn=7 bl=148 pwr=0
2025-03-30 06:35:24 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=465): ver=1 fn=217 tn=0 bl=148 pwr=0
2025-03-30 06:35:24 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=465): ver=1 fn=217 tn=1 bl=148 pwr=0
2025-03-30 06:35:24 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=465): ver=1 fn=217 tn=2 bl=148 pwr=0
2025-03-30 06:35:24 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=465): ver=1 fn=217 tn=3 bl=148 pwr=0
2025-03-30 06:35:24 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=465): ver=1 fn=217 tn=4 bl=148 pwr=0
2025-03-30 06:35:24 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=465): ver=1 fn=217 tn=5 bl=148 pwr=0
2025-03-30 06:35:24 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=465): ver=1 fn=217 tn=6 bl=148 pwr=0
2025-03-30 06:35:24 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=465): ver=1 fn=217 tn=7 bl=148 pwr=0
2025-03-30 06:35:24 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=465): ver=1 fn=218 tn=0 bl=148 pwr=0
2025-03-30 06:35:24 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=465): ver=1 fn=218 tn=1 bl=148 pwr=0
2025-03-30 06:35:24 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=465): ver=1 fn=218 tn=2 bl=148 pwr=0
2025-03-30 06:35:24 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=465): ver=1 fn=218 tn=3 bl=148 pwr=0
2025-03-30 06:35:24 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:35:24 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=465): ver=1 fn=218 tn=4 bl=148 pwr=0
2025-03-30 06:35:24 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=465): ver=1 fn=218 tn=5 bl=148 pwr=0
2025-03-30 06:35:24 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=465): ver=1 fn=218 tn=6 bl=148 pwr=0
2025-03-30 06:35:24 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=465): ver=1 fn=218 tn=7 bl=148 pwr=0
2025-03-30 06:35:24 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=465): ver=1 fn=219 tn=0 bl=148 pwr=0
2025-03-30 06:35:24 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=465): ver=1 fn=219 tn=1 bl=148 pwr=0
2025-03-30 06:35:24 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=465): ver=1 fn=219 tn=2 bl=148 pwr=0
2025-03-30 06:35:24 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=465): ver=1 fn=219 tn=3 bl=148 pwr=0
2025-03-30 06:35:24 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=465): ver=1 fn=219 tn=4 bl=148 pwr=0
2025-03-30 06:35:24 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=465): ver=1 fn=219 tn=5 bl=148 pwr=0
2025-03-30 06:35:24 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=465): ver=1 fn=219 tn=6 bl=148 pwr=0
2025-03-30 06:35:24 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=465): ver=1 fn=219 tn=7 bl=148 pwr=0
2025-03-30 06:35:24 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=465): ver=1 fn=220 tn=0 bl=148 pwr=0
2025-03-30 06:35:24 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=465): ver=1 fn=220 tn=1 bl=148 pwr=0
2025-03-30 06:35:24 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=465): ver=1 fn=220 tn=2 bl=148 pwr=0
2025-03-30 06:35:24 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=465): ver=1 fn=220 tn=3 bl=148 pwr=0
2025-03-30 06:35:24 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:35:24 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=465): ver=1 fn=220 tn=4 bl=148 pwr=0
2025-03-30 06:35:24 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:35:24 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=465): ver=1 fn=220 tn=5 bl=148 pwr=0
2025-03-30 06:35:24 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=465): ver=1 fn=220 tn=6 bl=148 pwr=0
2025-03-30 06:35:24 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=465): ver=1 fn=220 tn=7 bl=148 pwr=0
2025-03-30 06:35:24 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=465): ver=1 fn=221 tn=0 bl=148 pwr=0
2025-03-30 06:35:24 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=465): ver=1 fn=221 tn=1 bl=148 pwr=0
2025-03-30 06:35:24 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=465): ver=1 fn=221 tn=2 bl=148 pwr=0
2025-03-30 06:35:24 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=465): ver=1 fn=221 tn=3 bl=148 pwr=0
2025-03-30 06:35:24 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=465): ver=1 fn=221 tn=4 bl=148 pwr=0
2025-03-30 06:35:24 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=465): ver=1 fn=221 tn=5 bl=148 pwr=0
2025-03-30 06:35:24 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=465): ver=1 fn=221 tn=6 bl=148 pwr=0
2025-03-30 06:35:24 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=465): ver=1 fn=221 tn=7 bl=148 pwr=0
2025-03-30 06:35:24 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=465): ver=1 fn=222 tn=0 bl=148 pwr=0
2025-03-30 06:35:24 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=465): ver=1 fn=222 tn=1 bl=148 pwr=0
2025-03-30 06:35:24 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=465): ver=1 fn=222 tn=2 bl=148 pwr=0
2025-03-30 06:35:24 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=465): ver=1 fn=222 tn=3 bl=148 pwr=0
2025-03-30 06:35:24 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=465): ver=1 fn=222 tn=4 bl=148 pwr=0
2025-03-30 06:35:24 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=465): ver=1 fn=222 tn=5 bl=148 pwr=0
2025-03-30 06:35:24 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=465): ver=1 fn=222 tn=6 bl=148 pwr=0
2025-03-30 06:35:24 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=465): ver=1 fn=222 tn=7 bl=148 pwr=0
2025-03-30 06:35:24 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=465): ver=1 fn=223 tn=0 bl=148 pwr=0
2025-03-30 06:35:24 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=465): ver=1 fn=223 tn=1 bl=148 pwr=0
2025-03-30 06:35:24 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:35:24 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=465): ver=1 fn=223 tn=2 bl=148 pwr=0
2025-03-30 06:35:24 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=465): ver=1 fn=223 tn=3 bl=148 pwr=0
2025-03-30 06:35:24 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=465): ver=1 fn=223 tn=4 bl=148 pwr=0
2025-03-30 06:35:24 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=465): ver=1 fn=223 tn=5 bl=148 pwr=0
2025-03-30 06:35:24 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=465): ver=1 fn=223 tn=6 bl=148 pwr=0
2025-03-30 06:35:24 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=465): ver=1 fn=223 tn=7 bl=148 pwr=0
2025-03-30 06:35:24 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=465): ver=1 fn=224 tn=0 bl=148 pwr=0
2025-03-30 06:35:24 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:35:24 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=465): ver=1 fn=224 tn=1 bl=148 pwr=0
2025-03-30 06:35:24 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=465): ver=1 fn=224 tn=2 bl=148 pwr=0
2025-03-30 06:35:24 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=465): ver=1 fn=224 tn=3 bl=148 pwr=0
2025-03-30 06:35:24 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=465): ver=1 fn=224 tn=4 bl=148 pwr=0
2025-03-30 06:35:24 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=465): ver=1 fn=224 tn=5 bl=148 pwr=0
2025-03-30 06:35:24 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=465): ver=1 fn=224 tn=6 bl=148 pwr=0
2025-03-30 06:35:24 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:35:24 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=465): ver=1 fn=224 tn=7 bl=148 pwr=0
2025-03-30 06:35:24 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=465): ver=1 fn=225 tn=0 bl=148 pwr=0
2025-03-30 06:35:24 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=465): ver=1 fn=225 tn=1 bl=148 pwr=0
2025-03-30 06:35:24 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=465): ver=1 fn=225 tn=2 bl=148 pwr=0
2025-03-30 06:35:24 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=465): ver=1 fn=225 tn=3 bl=148 pwr=0
2025-03-30 06:35:24 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=465): ver=1 fn=225 tn=4 bl=148 pwr=0
2025-03-30 06:35:24 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=465): ver=1 fn=225 tn=5 bl=148 pwr=0
2025-03-30 06:35:24 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=465): ver=1 fn=225 tn=6 bl=148 pwr=0
2025-03-30 06:35:24 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=465): ver=1 fn=225 tn=7 bl=148 pwr=0
2025-03-30 06:35:24 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=465): ver=1 fn=226 tn=0 bl=148 pwr=0
2025-03-30 06:35:24 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=465): ver=1 fn=226 tn=1 bl=148 pwr=0
2025-03-30 06:35:24 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=465): ver=1 fn=226 tn=2 bl=148 pwr=0
2025-03-30 06:35:24 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=465): ver=1 fn=226 tn=3 bl=148 pwr=0
2025-03-30 06:35:24 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=465): ver=1 fn=226 tn=4 bl=148 pwr=0
2025-03-30 06:35:24 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=465): ver=1 fn=226 tn=5 bl=148 pwr=0
2025-03-30 06:35:24 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=465): ver=1 fn=226 tn=6 bl=148 pwr=0
2025-03-30 06:35:24 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=465): ver=1 fn=226 tn=7 bl=148 pwr=0
2025-03-30 06:35:24 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=465): ver=1 fn=227 tn=0 bl=148 pwr=0
2025-03-30 06:35:24 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=465): ver=1 fn=227 tn=1 bl=148 pwr=0
2025-03-30 06:35:24 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=465): ver=1 fn=227 tn=2 bl=148 pwr=0
2025-03-30 06:35:24 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=465): ver=1 fn=227 tn=3 bl=148 pwr=0
2025-03-30 06:35:24 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:35:24 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=465): ver=1 fn=227 tn=4 bl=148 pwr=0
2025-03-30 06:35:24 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=465): ver=1 fn=227 tn=5 bl=148 pwr=0
2025-03-30 06:35:24 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:35:24 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=465): ver=1 fn=227 tn=6 bl=148 pwr=0
2025-03-30 06:35:24 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=465): ver=1 fn=227 tn=7 bl=148 pwr=0
2025-03-30 06:35:24 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=465): ver=1 fn=228 tn=0 bl=148 pwr=0
2025-03-30 06:35:24 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=465): ver=1 fn=228 tn=1 bl=148 pwr=0
2025-03-30 06:35:24 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=465): ver=1 fn=228 tn=2 bl=148 pwr=0
2025-03-30 06:35:24 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=465): ver=1 fn=228 tn=3 bl=148 pwr=0
2025-03-30 06:35:24 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=465): ver=1 fn=228 tn=4 bl=148 pwr=0
2025-03-30 06:35:24 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=465): ver=1 fn=228 tn=5 bl=148 pwr=0
2025-03-30 06:35:24 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=465): ver=1 fn=228 tn=6 bl=148 pwr=0
2025-03-30 06:35:24 [WARNING] clck_gen.py:108 CLCKGen: time overrun by -2734us; resetting the clock
2025-03-30 06:35:24 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 06:35:24 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 06:35:24 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 06:35:24 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=468 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:35:24 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=468 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:35:24 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=468 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:35:24 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=468 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:35:24 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=468 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:35:24 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=469 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:35:24 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=469 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:35:24 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=469 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:35:24 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=469 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:35:24 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=469 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:35:24 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=469 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:35:24 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=469 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:35:24 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=469 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:35:29 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 06:35:29 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 06:35:29 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:35:29 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:35:29 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:35:29 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:35:29 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:35:29 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 06:35:29 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:35:29 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 06:35:29 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 06:35:29 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 06:35:29 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 06:35:29 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 06:35:29 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:35:29 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 06:35:29 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:35:29 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 06:35:29 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 06:35:29 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 06:35:29 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 06:35:29 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 06:35:29 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:35:29 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 06:35:29 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:35:29 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 06:35:29 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 06:35:29 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 06:35:29 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 06:35:29 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 06:35:29 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:35:29 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 06:35:29 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:35:29 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 06:35:29 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 06:35:29 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 06:35:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 06:35:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 06:35:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 06:35:29 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 06:35:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 06:35:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 06:35:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 06:35:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:35:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 06:35:29 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 06:35:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:35:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:35:29 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 06:35:29 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 06:35:29 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 06:35:29 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 06:35:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:35:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:35:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:35:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 06:35:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:35:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:35:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:35:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:35:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:35:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:35:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:35:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:35:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:35:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:35:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:35:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:35:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:35:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:35:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:35:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:35:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:35:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:35:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:35:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:35:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:35:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:35:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:35:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:35:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:35:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:35:29 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-03-30 06:35:30 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-03-30 06:35:30 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-03-30 06:35:30 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-03-30 06:35:30 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-03-30 06:35:30 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-03-30 06:35:30 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-03-30 06:35:30 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-03-30 06:35:30 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-03-30 06:35:30 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-03-30 06:35:30 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=105 tn=0 bl=148 pwr=0
2025-03-30 06:35:30 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=105 tn=1 bl=148 pwr=0
2025-03-30 06:35:30 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=105 tn=2 bl=148 pwr=0
2025-03-30 06:35:30 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=105 tn=3 bl=148 pwr=0
2025-03-30 06:35:30 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=105 tn=4 bl=148 pwr=0
2025-03-30 06:35:30 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=105 tn=5 bl=148 pwr=0
2025-03-30 06:35:30 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=105 tn=6 bl=148 pwr=0
2025-03-30 06:35:30 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=105 tn=7 bl=148 pwr=0
2025-03-30 06:35:30 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=106 tn=0 bl=148 pwr=0
2025-03-30 06:35:30 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=106 tn=1 bl=148 pwr=0
2025-03-30 06:35:30 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=106 tn=2 bl=148 pwr=0
2025-03-30 06:35:30 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=106 tn=3 bl=148 pwr=0
2025-03-30 06:35:30 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=106 tn=4 bl=148 pwr=0
2025-03-30 06:35:30 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=106 tn=5 bl=148 pwr=0
2025-03-30 06:35:30 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=106 tn=6 bl=148 pwr=0
2025-03-30 06:35:30 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=106 tn=7 bl=148 pwr=0
2025-03-30 06:35:30 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=107 tn=0 bl=148 pwr=0
2025-03-30 06:35:30 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=107 tn=1 bl=148 pwr=0
2025-03-30 06:35:30 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=107 tn=2 bl=148 pwr=0
2025-03-30 06:35:30 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=107 tn=3 bl=148 pwr=0
2025-03-30 06:35:30 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=107 tn=4 bl=148 pwr=0
2025-03-30 06:35:30 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=107 tn=5 bl=148 pwr=0
2025-03-30 06:35:30 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=107 tn=6 bl=148 pwr=0
2025-03-30 06:35:30 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=107 tn=7 bl=148 pwr=0
2025-03-30 06:35:30 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 06:35:30 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 06:35:30 [DEBUG] fake_trx.py:317 (BTS@172.18.26.20:5700) Recv FAKE_CI cmd
2025-03-30 06:35:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:35:30 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:35:30 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:35:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:35:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:35:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:35:30 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:35:30 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:35:30 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:35:30 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:35:30 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:35:30 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:35:30 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:35:30 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:35:30 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 06:35:30 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 06:35:30 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 06:35:35 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 06:35:35 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 06:35:35 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:35:35 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:35:35 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:35:35 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:35:35 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:35:35 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 06:35:35 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:35:35 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 06:35:35 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 06:35:35 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 06:35:35 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 06:35:35 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 06:35:35 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:35:35 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:35:35 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 06:35:35 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 06:35:35 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 06:35:35 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 06:35:35 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 06:35:35 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 06:35:35 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:35:35 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:35:35 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 06:35:35 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 06:35:35 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 06:35:35 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 06:35:35 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 06:35:35 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 06:35:35 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:35:35 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:35:35 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 06:35:35 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 06:35:35 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 06:35:35 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 06:35:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 06:35:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 06:35:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 06:35:35 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 06:35:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 06:35:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 06:35:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 06:35:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:35:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 06:35:35 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 06:35:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:35:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:35:35 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 06:35:35 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 06:35:35 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 06:35:35 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 06:35:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:35:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:35:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:35:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 06:35:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:35:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:35:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:35:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:35:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:35:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:35:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:35:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:35:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:35:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:35:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:35:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:35:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:35:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:35:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:35:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:35:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:35:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:35:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:35:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:35:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:35:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:35:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:35:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:35:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:35:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:35:35 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-03-30 06:35:35 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-03-30 06:35:35 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-03-30 06:35:35 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-03-30 06:35:35 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-03-30 06:35:35 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-03-30 06:35:35 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-03-30 06:35:35 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-03-30 06:35:35 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-03-30 06:35:35 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-03-30 06:35:35 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=105 tn=0 bl=148 pwr=0
2025-03-30 06:35:35 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=105 tn=1 bl=148 pwr=0
2025-03-30 06:35:35 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=105 tn=2 bl=148 pwr=0
2025-03-30 06:35:35 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=105 tn=3 bl=148 pwr=0
2025-03-30 06:35:35 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=105 tn=4 bl=148 pwr=0
2025-03-30 06:35:35 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=105 tn=5 bl=148 pwr=0
2025-03-30 06:35:35 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=105 tn=6 bl=148 pwr=0
2025-03-30 06:35:35 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=105 tn=7 bl=148 pwr=0
2025-03-30 06:35:35 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=106 tn=0 bl=148 pwr=0
2025-03-30 06:35:35 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=106 tn=1 bl=148 pwr=0
2025-03-30 06:35:35 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=106 tn=2 bl=148 pwr=0
2025-03-30 06:35:35 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=106 tn=3 bl=148 pwr=0
2025-03-30 06:35:35 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=106 tn=4 bl=148 pwr=0
2025-03-30 06:35:35 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=106 tn=5 bl=148 pwr=0
2025-03-30 06:35:35 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=106 tn=6 bl=148 pwr=0
2025-03-30 06:35:35 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=106 tn=7 bl=148 pwr=0
2025-03-30 06:35:35 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=107 tn=0 bl=148 pwr=0
2025-03-30 06:35:35 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=107 tn=1 bl=148 pwr=0
2025-03-30 06:35:35 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=107 tn=2 bl=148 pwr=0
2025-03-30 06:35:35 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=107 tn=3 bl=148 pwr=0
2025-03-30 06:35:35 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=107 tn=4 bl=148 pwr=0
2025-03-30 06:35:35 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=107 tn=5 bl=148 pwr=0
2025-03-30 06:35:35 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=107 tn=6 bl=148 pwr=0
2025-03-30 06:35:35 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=107 tn=7 bl=148 pwr=0
2025-03-30 06:35:35 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 06:35:35 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 06:35:35 [DEBUG] fake_trx.py:317 (BTS@172.18.26.20:5700) Recv FAKE_CI cmd
2025-03-30 06:35:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:35:35 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:35:35 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:35:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:35:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:35:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:35:35 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:35:35 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:35:35 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:35:35 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:35:35 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:35:35 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:35:35 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:35:35 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:35:35 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 06:35:35 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 06:35:35 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 06:35:35 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=127 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:35:35 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=127 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:35:35 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=127 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:35:35 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=127 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:35:35 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=127 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:35:35 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=127 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:35:35 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=128 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:35:35 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=128 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:35:35 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=128 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:35:35 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=128 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:35:35 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=128 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:35:35 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=128 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:35:35 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=128 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:35:35 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=128 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:35:40 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 06:35:40 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 06:35:40 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:35:40 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:35:40 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:35:40 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:35:40 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:35:40 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 06:35:40 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:35:40 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 06:35:40 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 06:35:40 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 06:35:40 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 06:35:40 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 06:35:40 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:35:40 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 06:35:40 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:35:40 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 06:35:40 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 06:35:40 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 06:35:40 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 06:35:40 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 06:35:40 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:35:40 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 06:35:40 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:35:40 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 06:35:40 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 06:35:40 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 06:35:40 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 06:35:40 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 06:35:40 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:35:40 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 06:35:40 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:35:40 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 06:35:40 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 06:35:40 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 06:35:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 06:35:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 06:35:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 06:35:40 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 06:35:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 06:35:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 06:35:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 06:35:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:35:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 06:35:40 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 06:35:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:35:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:35:40 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 06:35:40 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 06:35:40 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 06:35:40 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 06:35:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:35:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:35:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:35:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 06:35:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:35:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:35:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:35:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:35:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:35:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:35:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:35:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:35:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:35:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:35:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:35:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:35:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:35:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:35:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:35:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:35:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:35:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:35:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:35:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:35:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:35:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:35:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:35:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:35:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:35:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:35:40 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-03-30 06:35:41 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-03-30 06:35:41 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-03-30 06:35:41 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-03-30 06:35:41 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-03-30 06:35:41 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-03-30 06:35:41 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-03-30 06:35:41 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-03-30 06:35:41 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-03-30 06:35:41 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-03-30 06:35:41 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=105 tn=0 bl=148 pwr=0
2025-03-30 06:35:41 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=105 tn=1 bl=148 pwr=0
2025-03-30 06:35:41 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=105 tn=2 bl=148 pwr=0
2025-03-30 06:35:41 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=105 tn=3 bl=148 pwr=0
2025-03-30 06:35:41 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=105 tn=4 bl=148 pwr=0
2025-03-30 06:35:41 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=105 tn=5 bl=148 pwr=0
2025-03-30 06:35:41 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=105 tn=6 bl=148 pwr=0
2025-03-30 06:35:41 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=105 tn=7 bl=148 pwr=0
2025-03-30 06:35:41 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=106 tn=0 bl=148 pwr=0
2025-03-30 06:35:41 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=106 tn=1 bl=148 pwr=0
2025-03-30 06:35:41 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=106 tn=2 bl=148 pwr=0
2025-03-30 06:35:41 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=106 tn=3 bl=148 pwr=0
2025-03-30 06:35:41 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=106 tn=4 bl=148 pwr=0
2025-03-30 06:35:41 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=106 tn=5 bl=148 pwr=0
2025-03-30 06:35:41 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=106 tn=6 bl=148 pwr=0
2025-03-30 06:35:41 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=106 tn=7 bl=148 pwr=0
2025-03-30 06:35:41 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=107 tn=0 bl=148 pwr=0
2025-03-30 06:35:41 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=107 tn=1 bl=148 pwr=0
2025-03-30 06:35:41 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=107 tn=2 bl=148 pwr=0
2025-03-30 06:35:41 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=107 tn=3 bl=148 pwr=0
2025-03-30 06:35:41 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=107 tn=4 bl=148 pwr=0
2025-03-30 06:35:41 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=107 tn=5 bl=148 pwr=0
2025-03-30 06:35:41 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=107 tn=6 bl=148 pwr=0
2025-03-30 06:35:41 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=107 tn=7 bl=148 pwr=0
2025-03-30 06:35:41 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 06:35:41 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 06:35:41 [DEBUG] fake_trx.py:317 (BTS@172.18.26.20:5700) Recv FAKE_CI cmd
2025-03-30 06:35:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:35:41 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:35:41 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:35:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:35:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:35:41 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:35:41 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:35:41 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:35:41 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:35:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:35:41 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:35:41 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:35:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:35:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:35:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:35:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:35:41 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:35:41 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:35:41 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:35:41 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:35:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:35:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:35:41 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:35:41 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:35:41 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:35:41 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:35:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:35:41 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:35:41 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:35:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:35:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:35:41 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-03-30 06:35:41 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:35:41 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:35:41 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:35:41 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:35:42 [DEBUG] clck_gen.py:128 IND CLOCK 306
2025-03-30 06:35:42 [DEBUG] clck_gen.py:128 IND CLOCK 408
2025-03-30 06:35:42 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:35:42 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:35:42 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:35:42 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:35:43 [DEBUG] clck_gen.py:128 IND CLOCK 510
2025-03-30 06:35:43 [DEBUG] clck_gen.py:128 IND CLOCK 612
2025-03-30 06:35:43 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:35:43 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:35:43 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:35:43 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:35:44 [DEBUG] clck_gen.py:128 IND CLOCK 714
2025-03-30 06:35:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:35:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:35:44 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:35:44 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:35:44 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:35:44 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:35:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:35:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:35:44 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:35:44 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:35:44 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:35:44 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:35:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:35:44 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:35:44 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:35:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:35:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:35:44 [DEBUG] clck_gen.py:128 IND CLOCK 816
2025-03-30 06:35:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:35:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:35:44 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:35:44 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:35:44 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:35:44 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:35:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:35:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:35:44 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:35:44 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:35:44 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:35:44 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:35:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:35:44 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:35:44 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:35:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:35:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:35:44 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:35:44 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:35:44 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:35:44 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:35:45 [DEBUG] clck_gen.py:128 IND CLOCK 918
2025-03-30 06:35:45 [DEBUG] clck_gen.py:128 IND CLOCK 1020
2025-03-30 06:35:45 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:35:45 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:35:45 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:35:45 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:35:45 [DEBUG] clck_gen.py:128 IND CLOCK 1122
2025-03-30 06:35:46 [DEBUG] clck_gen.py:128 IND CLOCK 1224
2025-03-30 06:35:46 [DEBUG] clck_gen.py:128 IND CLOCK 1326
2025-03-30 06:35:47 [DEBUG] clck_gen.py:128 IND CLOCK 1428
2025-03-30 06:35:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:35:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:35:47 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:35:47 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:35:47 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:35:47 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:35:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:35:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:35:47 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:35:47 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:35:47 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:35:47 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:35:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:35:47 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:35:47 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:35:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:35:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:35:47 [DEBUG] clck_gen.py:128 IND CLOCK 1530
2025-03-30 06:35:48 [DEBUG] clck_gen.py:128 IND CLOCK 1632
2025-03-30 06:35:48 [DEBUG] clck_gen.py:128 IND CLOCK 1734
2025-03-30 06:35:49 [DEBUG] clck_gen.py:128 IND CLOCK 1836
2025-03-30 06:35:49 [DEBUG] clck_gen.py:128 IND CLOCK 1938
2025-03-30 06:35:50 [DEBUG] clck_gen.py:128 IND CLOCK 2040
2025-03-30 06:35:50 [DEBUG] clck_gen.py:128 IND CLOCK 2142
2025-03-30 06:35:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:35:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:35:50 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:35:50 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:35:50 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:35:50 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:35:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:35:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:35:50 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:35:50 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:35:50 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:35:50 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:35:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:35:50 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:35:50 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:35:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:35:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:35:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:35:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:35:50 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:35:50 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:35:50 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:35:50 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:35:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:35:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:35:50 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:35:50 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:35:50 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:35:50 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:35:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:35:50 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:35:50 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:35:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:35:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:35:51 [DEBUG] clck_gen.py:128 IND CLOCK 2244
2025-03-30 06:35:51 [DEBUG] clck_gen.py:128 IND CLOCK 2346
2025-03-30 06:35:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:35:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:35:51 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:35:51 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:35:51 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:35:51 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:35:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:35:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:35:51 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:35:51 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:35:51 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:35:51 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:35:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:35:51 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:35:51 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:35:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:35:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:35:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:35:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:35:51 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:35:51 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:35:51 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:35:51 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:35:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:35:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:35:51 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:35:51 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:35:51 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:35:51 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:35:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:35:51 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:35:51 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:35:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:35:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:35:52 [DEBUG] clck_gen.py:128 IND CLOCK 2448
2025-03-30 06:35:52 [DEBUG] clck_gen.py:128 IND CLOCK 2550
2025-03-30 06:35:53 [DEBUG] clck_gen.py:128 IND CLOCK 2652
2025-03-30 06:35:53 [DEBUG] clck_gen.py:128 IND CLOCK 2754
2025-03-30 06:35:53 [DEBUG] clck_gen.py:128 IND CLOCK 2856
2025-03-30 06:35:54 [DEBUG] clck_gen.py:128 IND CLOCK 2958
2025-03-30 06:35:54 [DEBUG] clck_gen.py:128 IND CLOCK 3060
2025-03-30 06:35:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:35:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:35:54 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:35:54 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:35:54 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:35:54 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:35:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:35:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:35:54 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:35:54 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:35:54 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:35:54 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:35:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:35:55 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:35:55 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:35:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:35:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:35:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:35:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:35:55 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:35:55 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:35:55 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:35:55 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:35:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:35:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:35:55 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:35:55 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:35:55 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:35:55 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:35:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:35:55 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:35:55 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:35:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:35:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:35:55 [DEBUG] clck_gen.py:128 IND CLOCK 3162
2025-03-30 06:35:55 [DEBUG] clck_gen.py:128 IND CLOCK 3264
2025-03-30 06:35:56 [DEBUG] clck_gen.py:128 IND CLOCK 3366
2025-03-30 06:35:56 [DEBUG] clck_gen.py:128 IND CLOCK 3468
2025-03-30 06:35:57 [DEBUG] clck_gen.py:128 IND CLOCK 3570
2025-03-30 06:35:57 [DEBUG] clck_gen.py:128 IND CLOCK 3672
2025-03-30 06:35:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:35:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:35:58 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:35:58 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:35:58 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:35:58 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:35:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:35:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:35:58 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:35:58 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:35:58 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:35:58 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:35:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:35:58 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:35:58 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:35:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:35:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:35:58 [DEBUG] clck_gen.py:128 IND CLOCK 3774
2025-03-30 06:35:58 [DEBUG] clck_gen.py:128 IND CLOCK 3876
2025-03-30 06:35:59 [DEBUG] clck_gen.py:128 IND CLOCK 3978
2025-03-30 06:35:59 [DEBUG] clck_gen.py:128 IND CLOCK 4080
2025-03-30 06:36:00 [DEBUG] clck_gen.py:128 IND CLOCK 4182
2025-03-30 06:36:00 [DEBUG] clck_gen.py:128 IND CLOCK 4284
2025-03-30 06:36:01 [DEBUG] clck_gen.py:128 IND CLOCK 4386
2025-03-30 06:36:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:36:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:36:01 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:36:01 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:36:01 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:36:01 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:36:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:36:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:36:01 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:36:01 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:36:01 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:36:01 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:36:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:36:01 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:36:01 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:36:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:36:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:36:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:36:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:36:01 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:36:01 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:36:01 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:36:01 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:36:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:36:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:36:01 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:36:01 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:36:01 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:36:01 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:36:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:36:01 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:36:01 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:36:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:36:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:36:01 [DEBUG] clck_gen.py:128 IND CLOCK 4488
2025-03-30 06:36:01 [DEBUG] clck_gen.py:128 IND CLOCK 4590
2025-03-30 06:36:02 [DEBUG] clck_gen.py:128 IND CLOCK 4692
2025-03-30 06:36:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:36:02 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:36:02 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:36:02 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:36:02 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:36:02 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:36:02 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:36:02 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:36:02 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:36:02 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:36:02 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:36:02 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:36:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:36:02 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:36:02 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:36:02 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:36:02 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:36:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:36:02 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:36:02 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:36:02 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:36:02 [DEBUG] clck_gen.py:128 IND CLOCK 4794
2025-03-30 06:36:02 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:36:02 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:36:02 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:36:02 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:36:02 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:36:02 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:36:02 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:36:02 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:36:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:36:02 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:36:02 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:36:02 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:36:02 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:36:03 [DEBUG] clck_gen.py:128 IND CLOCK 4896
2025-03-30 06:36:03 [DEBUG] clck_gen.py:128 IND CLOCK 4998
2025-03-30 06:36:04 [DEBUG] clck_gen.py:128 IND CLOCK 5100
2025-03-30 06:36:04 [DEBUG] clck_gen.py:128 IND CLOCK 5202
2025-03-30 06:36:05 [DEBUG] clck_gen.py:128 IND CLOCK 5304
2025-03-30 06:36:05 [DEBUG] clck_gen.py:128 IND CLOCK 5406
2025-03-30 06:36:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:36:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:36:05 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:36:05 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:36:05 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:36:05 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:36:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:36:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:36:05 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:36:05 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:36:05 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:36:05 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:36:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:36:05 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:36:05 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:36:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:36:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:36:06 [DEBUG] clck_gen.py:128 IND CLOCK 5508
2025-03-30 06:36:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:36:06 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:36:06 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:36:06 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:36:06 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:36:06 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:36:06 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:36:06 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:36:06 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:36:06 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:36:06 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:36:06 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:36:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:36:06 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:36:06 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:36:06 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:36:06 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:36:06 [DEBUG] clck_gen.py:128 IND CLOCK 5610
2025-03-30 06:36:07 [DEBUG] clck_gen.py:128 IND CLOCK 5712
2025-03-30 06:36:07 [DEBUG] clck_gen.py:128 IND CLOCK 5814
2025-03-30 06:36:08 [DEBUG] clck_gen.py:128 IND CLOCK 5916
2025-03-30 06:36:08 [DEBUG] clck_gen.py:128 IND CLOCK 6018
2025-03-30 06:36:09 [DEBUG] clck_gen.py:128 IND CLOCK 6120
2025-03-30 06:36:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:36:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:36:09 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:36:09 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:36:09 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:36:09 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:36:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:36:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:36:09 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:36:09 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:36:09 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:36:09 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:36:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:36:09 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:36:09 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:36:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:36:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:36:09 [DEBUG] clck_gen.py:128 IND CLOCK 6222
2025-03-30 06:36:09 [DEBUG] clck_gen.py:128 IND CLOCK 6324
2025-03-30 06:36:10 [DEBUG] clck_gen.py:128 IND CLOCK 6426
2025-03-30 06:36:10 [DEBUG] clck_gen.py:128 IND CLOCK 6528
2025-03-30 06:36:11 [DEBUG] clck_gen.py:128 IND CLOCK 6630
2025-03-30 06:36:11 [DEBUG] clck_gen.py:128 IND CLOCK 6732
2025-03-30 06:36:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:36:12 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:36:12 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:36:12 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:36:12 [DEBUG] clck_gen.py:128 IND CLOCK 6834
2025-03-30 06:36:12 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:36:12 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:36:12 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:36:12 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:36:12 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:36:12 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:36:12 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:36:12 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:36:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:36:12 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:36:12 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:36:12 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:36:12 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:36:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:36:12 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:36:12 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:36:12 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:36:12 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:36:12 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:36:12 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:36:12 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:36:12 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:36:12 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:36:12 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:36:12 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:36:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:36:12 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:36:12 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:36:12 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:36:12 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:36:12 [DEBUG] clck_gen.py:128 IND CLOCK 6936
2025-03-30 06:36:13 [DEBUG] clck_gen.py:128 IND CLOCK 7038
2025-03-30 06:36:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:36:13 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:36:13 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:36:13 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:36:13 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:36:13 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:36:13 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:36:13 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:36:13 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:36:13 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:36:13 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:36:13 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:36:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:36:13 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:36:13 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:36:13 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:36:13 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:36:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:36:13 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:36:13 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:36:13 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:36:13 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:36:13 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:36:13 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:36:13 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:36:13 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:36:13 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:36:13 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:36:13 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:36:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:36:13 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:36:13 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:36:13 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:36:13 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:36:13 [DEBUG] clck_gen.py:128 IND CLOCK 7140
2025-03-30 06:36:14 [DEBUG] clck_gen.py:128 IND CLOCK 7242
2025-03-30 06:36:14 [DEBUG] clck_gen.py:128 IND CLOCK 7344
2025-03-30 06:36:15 [DEBUG] clck_gen.py:128 IND CLOCK 7446
2025-03-30 06:36:15 [DEBUG] clck_gen.py:128 IND CLOCK 7548
2025-03-30 06:36:16 [DEBUG] clck_gen.py:128 IND CLOCK 7650
2025-03-30 06:36:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:36:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:36:16 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:36:16 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:36:16 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:36:16 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:36:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:36:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:36:16 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:36:16 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:36:16 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:36:16 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:36:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:36:16 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:36:16 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:36:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:36:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:36:16 [DEBUG] clck_gen.py:128 IND CLOCK 7752
2025-03-30 06:36:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:36:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:36:16 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:36:16 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:36:16 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:36:16 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:36:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:36:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:36:16 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:36:16 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:36:16 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:36:16 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:36:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:36:16 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:36:16 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:36:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:36:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:36:17 [DEBUG] clck_gen.py:128 IND CLOCK 7854
2025-03-30 06:36:17 [DEBUG] clck_gen.py:128 IND CLOCK 7956
2025-03-30 06:36:17 [DEBUG] clck_gen.py:128 IND CLOCK 8058
2025-03-30 06:36:18 [DEBUG] clck_gen.py:128 IND CLOCK 8160
2025-03-30 06:36:18 [DEBUG] clck_gen.py:128 IND CLOCK 8262
2025-03-30 06:36:19 [DEBUG] clck_gen.py:128 IND CLOCK 8364
2025-03-30 06:36:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:36:19 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:36:19 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:36:19 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:36:19 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:36:19 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:36:19 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:36:19 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:36:19 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:36:19 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:36:19 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:36:19 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:36:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:36:19 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:36:19 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:36:19 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:36:19 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:36:19 [DEBUG] clck_gen.py:128 IND CLOCK 8466
2025-03-30 06:36:20 [DEBUG] clck_gen.py:128 IND CLOCK 8568
2025-03-30 06:36:20 [DEBUG] clck_gen.py:128 IND CLOCK 8670
2025-03-30 06:36:21 [DEBUG] clck_gen.py:128 IND CLOCK 8772
2025-03-30 06:36:21 [DEBUG] clck_gen.py:128 IND CLOCK 8874
2025-03-30 06:36:22 [DEBUG] clck_gen.py:128 IND CLOCK 8976
2025-03-30 06:36:22 [DEBUG] clck_gen.py:128 IND CLOCK 9078
2025-03-30 06:36:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:36:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:36:22 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:36:22 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:36:22 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:36:22 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:36:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:36:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:36:22 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:36:22 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:36:22 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:36:22 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:36:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:36:22 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:36:22 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:36:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:36:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:36:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:36:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:36:23 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:36:23 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:36:23 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:36:23 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:36:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:36:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:36:23 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:36:23 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:36:23 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:36:23 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:36:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:36:23 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:36:23 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:36:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:36:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:36:23 [DEBUG] clck_gen.py:128 IND CLOCK 9180
2025-03-30 06:36:23 [DEBUG] clck_gen.py:128 IND CLOCK 9282
2025-03-30 06:36:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:36:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:36:23 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:36:23 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:36:23 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:36:23 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:36:23 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:36:23 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:36:23 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:36:23 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:36:23 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 06:36:23 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 06:36:23 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 06:36:23 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:36:23 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:36:23 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=9288 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:36:23 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=9288 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:36:23 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=9288 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:36:23 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=9288 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:36:23 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=9288 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:36:23 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=9288 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:36:23 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=9288 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:36:23 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=9289 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:36:23 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=9289 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:36:23 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=9289 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:36:23 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=9289 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:36:23 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=9289 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:36:23 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=9289 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:36:23 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=9289 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:36:23 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=9289 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:36:28 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 06:36:28 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 06:36:28 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:36:28 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:36:28 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:36:28 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:36:28 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:36:28 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 06:36:28 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:36:28 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 06:36:28 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 06:36:28 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 06:36:28 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 06:36:28 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 06:36:28 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:36:28 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:36:28 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 06:36:28 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 06:36:28 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 06:36:28 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 06:36:28 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 06:36:28 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 06:36:28 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:36:28 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:36:28 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 06:36:28 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 06:36:28 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 06:36:28 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 06:36:28 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 06:36:28 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 06:36:28 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:36:28 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:36:28 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 06:36:28 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 06:36:28 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 06:36:28 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 06:36:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 06:36:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 06:36:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 06:36:28 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 06:36:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 06:36:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 06:36:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 06:36:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 06:36:28 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 06:36:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:36:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:36:28 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 06:36:28 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 06:36:28 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 06:36:28 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 06:36:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:36:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:36:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:36:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 06:36:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:36:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:36:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:36:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:36:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:36:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:36:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:36:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:36:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:36:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:36:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:36:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:36:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:36:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:36:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:36:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:36:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:36:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:36:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:36:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:36:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:36:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:36:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:36:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:36:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:36:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:36:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:36:28 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-03-30 06:36:29 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-03-30 06:36:29 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-03-30 06:36:29 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-03-30 06:36:29 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-03-30 06:36:29 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-03-30 06:36:29 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-03-30 06:36:29 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-03-30 06:36:29 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-03-30 06:36:29 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-03-30 06:36:29 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=105 tn=0 bl=148 pwr=0
2025-03-30 06:36:29 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=105 tn=1 bl=148 pwr=0
2025-03-30 06:36:29 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=105 tn=2 bl=148 pwr=0
2025-03-30 06:36:29 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=105 tn=3 bl=148 pwr=0
2025-03-30 06:36:29 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=105 tn=4 bl=148 pwr=0
2025-03-30 06:36:29 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=105 tn=5 bl=148 pwr=0
2025-03-30 06:36:29 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=105 tn=6 bl=148 pwr=0
2025-03-30 06:36:29 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=105 tn=7 bl=148 pwr=0
2025-03-30 06:36:29 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=106 tn=0 bl=148 pwr=0
2025-03-30 06:36:29 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=106 tn=1 bl=148 pwr=0
2025-03-30 06:36:29 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=106 tn=2 bl=148 pwr=0
2025-03-30 06:36:29 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=106 tn=3 bl=148 pwr=0
2025-03-30 06:36:29 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=106 tn=4 bl=148 pwr=0
2025-03-30 06:36:29 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=106 tn=5 bl=148 pwr=0
2025-03-30 06:36:29 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=106 tn=6 bl=148 pwr=0
2025-03-30 06:36:29 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=106 tn=7 bl=148 pwr=0
2025-03-30 06:36:29 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=107 tn=0 bl=148 pwr=0
2025-03-30 06:36:29 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=107 tn=1 bl=148 pwr=0
2025-03-30 06:36:29 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=107 tn=2 bl=148 pwr=0
2025-03-30 06:36:29 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=107 tn=3 bl=148 pwr=0
2025-03-30 06:36:29 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=107 tn=4 bl=148 pwr=0
2025-03-30 06:36:29 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=107 tn=5 bl=148 pwr=0
2025-03-30 06:36:29 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=107 tn=6 bl=148 pwr=0
2025-03-30 06:36:29 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=107 tn=7 bl=148 pwr=0
2025-03-30 06:36:29 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 06:36:29 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 06:36:29 [DEBUG] fake_trx.py:317 (BTS@172.18.26.20:5700) Recv FAKE_CI cmd
2025-03-30 06:36:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:36:29 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:36:29 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:36:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:36:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:36:29 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:36:29 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:36:29 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:36:29 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:36:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:36:29 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:36:29 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:36:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:36:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:36:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:36:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:36:29 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:36:29 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:36:29 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:36:29 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:36:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:36:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:36:29 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:36:29 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:36:29 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:36:29 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:36:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:36:29 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:36:29 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:36:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:36:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:36:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:36:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:36:29 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:36:29 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:36:29 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:36:29 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:36:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:36:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:36:29 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:36:29 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:36:29 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:36:29 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:36:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:36:29 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:36:29 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:36:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:36:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:36:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:36:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:36:29 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:36:29 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:36:29 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:36:29 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:36:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:36:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:36:29 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:36:29 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:36:29 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:36:29 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:36:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:36:29 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:36:29 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:36:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:36:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:36:29 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-03-30 06:36:29 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:36:29 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:36:29 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:36:29 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:36:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:36:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:36:29 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:36:29 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:36:29 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:36:29 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:36:29 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:36:29 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:36:29 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:36:29 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:36:29 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:36:29 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:36:29 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 06:36:29 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 06:36:29 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 06:36:29 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=231 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:36:29 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=231 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:36:29 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=231 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:36:29 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=231 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:36:29 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=231 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:36:29 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=231 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:36:29 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=231 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:36:29 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=231 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:36:34 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 06:36:34 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 06:36:34 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:36:34 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:36:34 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:36:34 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:36:34 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:36:34 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 06:36:34 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:36:34 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 06:36:34 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 06:36:34 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 06:36:34 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 06:36:34 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 06:36:34 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:36:34 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:36:34 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 06:36:34 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 06:36:34 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 06:36:34 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 06:36:34 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 06:36:34 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 06:36:34 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:36:34 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:36:34 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 06:36:34 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 06:36:34 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 06:36:34 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 06:36:34 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 06:36:34 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 06:36:34 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:36:34 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:36:34 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 06:36:34 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 06:36:34 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 06:36:34 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 06:36:34 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 06:36:34 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 06:36:34 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 06:36:34 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 06:36:34 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 06:36:34 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 06:36:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 06:36:34 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:36:34 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 06:36:34 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 06:36:34 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:36:34 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:36:34 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 06:36:34 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 06:36:34 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 06:36:34 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 06:36:34 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:36:34 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:36:34 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:36:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 06:36:34 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:36:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:36:34 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:36:34 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:36:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:36:34 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:36:34 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:36:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:36:34 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:36:34 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:36:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:36:34 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:36:34 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:36:34 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:36:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:36:34 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:36:34 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:36:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:36:34 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:36:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:36:34 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:36:34 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:36:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:36:34 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:36:34 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:36:34 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:36:34 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-03-30 06:36:35 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-03-30 06:36:35 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-03-30 06:36:35 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-03-30 06:36:35 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-03-30 06:36:35 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-03-30 06:36:35 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-03-30 06:36:35 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-03-30 06:36:35 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-03-30 06:36:35 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-03-30 06:36:35 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=105 tn=0 bl=148 pwr=0
2025-03-30 06:36:35 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=105 tn=1 bl=148 pwr=0
2025-03-30 06:36:35 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=105 tn=2 bl=148 pwr=0
2025-03-30 06:36:35 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=105 tn=3 bl=148 pwr=0
2025-03-30 06:36:35 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=105 tn=4 bl=148 pwr=0
2025-03-30 06:36:35 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=105 tn=5 bl=148 pwr=0
2025-03-30 06:36:35 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=105 tn=6 bl=148 pwr=0
2025-03-30 06:36:35 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=105 tn=7 bl=148 pwr=0
2025-03-30 06:36:35 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=106 tn=0 bl=148 pwr=0
2025-03-30 06:36:35 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=106 tn=1 bl=148 pwr=0
2025-03-30 06:36:35 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=106 tn=2 bl=148 pwr=0
2025-03-30 06:36:35 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=106 tn=3 bl=148 pwr=0
2025-03-30 06:36:35 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=106 tn=4 bl=148 pwr=0
2025-03-30 06:36:35 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=106 tn=5 bl=148 pwr=0
2025-03-30 06:36:35 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=106 tn=6 bl=148 pwr=0
2025-03-30 06:36:35 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=106 tn=7 bl=148 pwr=0
2025-03-30 06:36:35 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=107 tn=0 bl=148 pwr=0
2025-03-30 06:36:35 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=107 tn=1 bl=148 pwr=0
2025-03-30 06:36:35 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=107 tn=2 bl=148 pwr=0
2025-03-30 06:36:35 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=107 tn=3 bl=148 pwr=0
2025-03-30 06:36:35 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=107 tn=4 bl=148 pwr=0
2025-03-30 06:36:35 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=107 tn=5 bl=148 pwr=0
2025-03-30 06:36:35 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=107 tn=6 bl=148 pwr=0
2025-03-30 06:36:35 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=107 tn=7 bl=148 pwr=0
2025-03-30 06:36:35 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 06:36:35 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 06:36:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:36:35 [DEBUG] fake_trx.py:317 (BTS@172.18.26.20:5700) Recv FAKE_CI cmd
2025-03-30 06:36:35 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:36:35 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:36:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:36:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:36:35 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:36:35 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:36:35 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:36:35 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:36:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:36:35 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:36:35 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:36:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:36:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:36:35 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-03-30 06:36:35 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:36:35 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:36:35 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:36:35 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:36:36 [DEBUG] clck_gen.py:128 IND CLOCK 306
2025-03-30 06:36:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:36:36 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:36:36 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:36:36 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:36:36 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:36:36 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:36:36 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:36:36 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:36:36 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:36:36 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:36:36 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:36:36 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:36:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:36:36 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:36:36 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:36:36 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:36:36 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:36:36 [DEBUG] clck_gen.py:128 IND CLOCK 408
2025-03-30 06:36:36 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:36:36 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:36:36 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:36:36 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:36:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:36:36 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:36:36 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:36:36 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:36:36 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:36:36 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:36:36 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:36:36 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:36:36 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:36:36 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:36:36 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:36:36 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:36:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:36:37 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:36:37 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:36:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:36:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:36:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:36:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:36:37 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:36:37 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:36:37 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:36:37 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:36:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:36:37 [DEBUG] clck_gen.py:128 IND CLOCK 510
2025-03-30 06:36:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:36:37 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:36:37 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:36:37 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:36:37 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:36:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:36:37 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:36:37 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:36:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:36:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:36:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:36:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:36:37 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:36:37 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:36:37 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:36:37 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:36:37 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:36:37 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:36:37 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:36:37 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:36:37 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:36:37 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:36:37 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 06:36:37 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 06:36:37 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 06:36:37 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=603 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:36:37 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=603 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:36:37 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=603 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:36:37 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=603 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:36:37 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=603 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:36:37 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=603 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:36:37 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=604 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:36:37 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=604 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:36:37 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=604 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:36:37 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=604 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:36:37 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=604 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:36:37 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=604 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:36:37 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=604 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:36:37 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=604 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:36:42 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 06:36:42 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 06:36:42 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:36:42 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:36:42 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:36:42 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:36:42 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:36:42 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 06:36:42 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:36:42 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 06:36:42 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 06:36:42 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 06:36:42 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 06:36:42 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 06:36:42 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:36:42 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:36:42 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 06:36:42 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 06:36:42 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 06:36:42 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 06:36:42 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 06:36:42 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 06:36:42 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:36:42 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:36:42 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 06:36:42 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 06:36:42 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 06:36:42 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 06:36:42 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 06:36:42 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 06:36:42 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:36:42 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:36:42 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 06:36:42 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 06:36:42 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 06:36:42 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 06:36:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 06:36:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 06:36:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 06:36:42 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 06:36:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 06:36:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 06:36:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 06:36:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:36:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 06:36:42 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 06:36:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:36:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:36:42 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 06:36:42 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 06:36:42 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 06:36:42 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 06:36:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:36:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:36:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:36:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 06:36:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:36:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:36:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:36:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:36:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:36:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:36:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:36:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:36:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:36:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:36:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:36:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:36:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:36:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:36:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:36:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:36:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:36:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:36:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:36:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:36:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:36:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:36:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:36:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:36:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:36:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:36:42 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-03-30 06:36:43 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-03-30 06:36:43 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=107): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-03-30 06:36:43 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=107): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-03-30 06:36:43 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=107): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-03-30 06:36:43 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=107): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-03-30 06:36:43 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=107): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-03-30 06:36:43 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=107): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-03-30 06:36:43 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=107): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-03-30 06:36:43 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=107): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-03-30 06:36:43 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=107): ver=1 fn=105 tn=0 bl=148 pwr=0
2025-03-30 06:36:43 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=107): ver=1 fn=105 tn=1 bl=148 pwr=0
2025-03-30 06:36:43 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=107): ver=1 fn=105 tn=2 bl=148 pwr=0
2025-03-30 06:36:43 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=107): ver=1 fn=105 tn=3 bl=148 pwr=0
2025-03-30 06:36:43 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=107): ver=1 fn=105 tn=4 bl=148 pwr=0
2025-03-30 06:36:43 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=107): ver=1 fn=105 tn=5 bl=148 pwr=0
2025-03-30 06:36:43 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=107): ver=1 fn=105 tn=6 bl=148 pwr=0
2025-03-30 06:36:43 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=107): ver=1 fn=105 tn=7 bl=148 pwr=0
2025-03-30 06:36:43 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=107): ver=1 fn=106 tn=0 bl=148 pwr=0
2025-03-30 06:36:43 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=107): ver=1 fn=106 tn=1 bl=148 pwr=0
2025-03-30 06:36:43 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=107): ver=1 fn=106 tn=2 bl=148 pwr=0
2025-03-30 06:36:43 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=107): ver=1 fn=106 tn=3 bl=148 pwr=0
2025-03-30 06:36:43 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=107): ver=1 fn=106 tn=4 bl=148 pwr=0
2025-03-30 06:36:43 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=107): ver=1 fn=106 tn=5 bl=148 pwr=0
2025-03-30 06:36:43 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=107): ver=1 fn=106 tn=6 bl=148 pwr=0
2025-03-30 06:36:43 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=107): ver=1 fn=106 tn=7 bl=148 pwr=0
2025-03-30 06:36:43 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 06:36:43 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 06:36:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:36:43 [DEBUG] fake_trx.py:317 (BTS@172.18.26.20:5700) Recv FAKE_CI cmd
2025-03-30 06:36:43 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:36:43 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:36:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:36:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:36:43 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:36:43 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:36:43 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:36:43 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:36:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:36:43 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:36:43 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:36:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:36:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:36:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:36:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:36:43 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:36:43 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:36:43 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:36:43 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:36:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:36:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:36:43 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:36:43 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:36:43 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:36:43 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:36:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:36:43 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:36:43 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:36:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:36:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:36:43 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-03-30 06:36:43 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:36:43 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:36:43 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:36:43 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:36:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:36:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:36:43 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:36:43 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:36:43 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:36:43 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:36:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:36:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:36:43 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:36:43 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:36:43 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:36:43 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:36:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:36:43 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:36:43 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:36:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:36:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:36:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:36:43 [DEBUG] clck_gen.py:128 IND CLOCK 306
2025-03-30 06:36:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:36:44 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:36:44 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:36:44 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:36:44 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:36:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:36:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:36:44 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:36:44 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:36:44 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:36:44 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:36:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:36:44 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:36:44 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:36:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:36:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:36:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:36:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:36:44 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:36:44 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:36:44 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:36:44 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:36:44 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:36:44 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:36:44 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:36:44 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:36:44 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:36:44 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:36:44 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 06:36:44 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 06:36:44 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 06:36:44 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=395 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:36:44 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=395 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:36:44 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=395 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:36:44 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=395 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:36:44 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=395 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:36:44 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=395 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:36:44 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=395 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:36:44 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=395 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:36:49 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 06:36:49 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 06:36:49 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:36:49 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:36:49 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:36:49 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:36:49 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:36:49 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 06:36:49 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:36:49 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 06:36:49 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 06:36:49 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 06:36:49 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 06:36:49 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 06:36:49 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:36:49 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:36:49 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 06:36:49 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 06:36:49 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 06:36:49 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 06:36:49 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 06:36:49 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 06:36:49 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:36:49 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:36:49 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 06:36:49 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 06:36:49 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 06:36:49 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 06:36:49 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 06:36:49 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 06:36:49 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:36:49 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:36:49 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 06:36:49 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 06:36:49 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 06:36:49 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 06:36:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 06:36:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 06:36:49 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 06:36:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 06:36:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 06:36:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 06:36:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 06:36:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 06:36:49 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 06:36:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:36:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:36:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:36:49 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 06:36:49 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 06:36:49 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 06:36:49 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 06:36:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:36:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:36:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:36:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 06:36:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:36:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:36:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:36:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:36:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:36:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:36:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:36:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:36:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:36:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:36:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:36:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:36:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:36:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:36:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:36:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:36:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:36:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:36:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:36:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:36:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:36:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:36:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:36:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:36:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:36:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:36:49 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-03-30 06:36:49 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-03-30 06:36:49 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-03-30 06:36:49 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-03-30 06:36:49 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-03-30 06:36:49 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-03-30 06:36:49 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-03-30 06:36:49 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-03-30 06:36:49 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-03-30 06:36:49 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-03-30 06:36:49 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 06:36:49 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 06:36:49 [DEBUG] fake_trx.py:317 (BTS@172.18.26.20:5700) Recv FAKE_CI cmd
2025-03-30 06:36:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:36:49 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:36:49 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:36:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:36:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:36:49 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:36:49 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:36:49 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:36:49 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:36:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:36:50 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:36:50 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:36:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:36:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:36:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:36:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:36:50 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:36:50 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:36:50 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:36:50 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:36:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:36:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:36:50 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:36:50 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:36:50 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:36:50 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:36:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:36:50 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:36:50 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:36:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:36:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:36:50 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-03-30 06:36:50 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:36:50 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:36:50 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:36:50 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:36:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:36:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:36:50 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:36:50 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:36:50 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:36:50 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:36:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:36:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:36:50 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:36:50 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:36:50 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:36:50 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:36:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:36:50 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:36:50 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:36:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:36:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:36:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:36:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:36:50 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:36:50 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:36:50 [DEBUG] clck_gen.py:128 IND CLOCK 306
2025-03-30 06:36:50 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:36:50 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:36:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:36:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:36:50 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:36:50 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:36:50 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:36:50 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:36:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:36:50 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:36:50 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:36:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:36:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:36:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:36:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:36:51 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:36:51 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:36:51 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:36:51 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:36:51 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:36:51 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:36:51 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:36:51 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:36:51 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:36:51 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:36:51 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 06:36:51 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 06:36:51 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 06:36:56 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 06:36:56 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 06:36:56 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:36:56 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:36:56 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:36:56 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:36:56 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:36:56 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 06:36:56 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:36:56 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 06:36:56 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 06:36:56 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 06:36:56 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 06:36:56 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 06:36:56 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:36:56 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:36:56 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 06:36:56 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 06:36:56 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 06:36:56 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 06:36:56 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 06:36:56 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 06:36:56 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:36:56 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:36:56 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 06:36:56 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 06:36:56 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 06:36:56 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 06:36:56 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 06:36:56 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 06:36:56 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:36:56 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:36:56 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 06:36:56 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 06:36:56 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 06:36:56 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 06:36:56 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 06:36:56 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 06:36:56 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 06:36:56 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 06:36:56 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 06:36:56 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 06:36:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 06:36:56 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:36:56 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 06:36:56 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 06:36:56 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:36:56 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:36:56 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 06:36:56 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 06:36:56 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 06:36:56 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 06:36:56 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:36:56 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:36:56 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:36:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 06:36:56 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:36:56 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:36:56 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:36:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:36:56 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:36:56 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:36:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:36:56 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:36:56 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:36:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:36:56 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:36:56 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:36:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:36:56 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:36:56 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:36:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:36:56 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:36:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:36:56 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:36:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:36:56 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:36:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:36:56 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:36:56 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:36:56 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:36:56 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:36:56 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-03-30 06:36:56 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-03-30 06:36:56 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-03-30 06:36:56 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-03-30 06:36:56 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-03-30 06:36:56 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-03-30 06:36:56 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-03-30 06:36:56 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-03-30 06:36:56 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-03-30 06:36:56 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-03-30 06:36:56 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 06:36:56 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 06:36:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:36:56 [DEBUG] fake_trx.py:317 (BTS@172.18.26.20:5700) Recv FAKE_CI cmd
2025-03-30 06:36:56 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:36:56 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:36:56 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:36:56 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:36:56 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:36:56 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:36:56 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:36:56 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:36:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:36:56 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:36:56 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:36:56 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:36:56 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:36:57 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-03-30 06:36:57 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:36:57 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:36:57 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:36:57 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:36:57 [DEBUG] clck_gen.py:128 IND CLOCK 306
2025-03-30 06:36:58 [DEBUG] clck_gen.py:128 IND CLOCK 408
2025-03-30 06:36:58 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:36:58 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:36:58 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:36:58 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:36:58 [DEBUG] clck_gen.py:128 IND CLOCK 510
2025-03-30 06:36:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:36:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:36:58 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:36:58 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:36:58 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:36:58 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:36:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:36:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:36:58 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:36:58 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:36:58 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:36:58 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:36:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:36:58 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:36:58 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:36:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:36:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:36:59 [DEBUG] clck_gen.py:128 IND CLOCK 612
2025-03-30 06:36:59 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:36:59 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:36:59 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:36:59 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:36:59 [DEBUG] clck_gen.py:128 IND CLOCK 714
2025-03-30 06:37:00 [DEBUG] clck_gen.py:128 IND CLOCK 816
2025-03-30 06:37:00 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:37:00 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:37:00 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:37:00 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:37:00 [DEBUG] clck_gen.py:128 IND CLOCK 918
2025-03-30 06:37:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:37:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:37:00 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:37:00 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:37:00 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:37:00 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:37:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:37:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:37:00 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:37:00 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:37:00 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:37:00 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:37:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:37:00 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:37:00 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:37:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:37:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:37:01 [DEBUG] clck_gen.py:128 IND CLOCK 1020
2025-03-30 06:37:01 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:37:01 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:37:01 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:37:01 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:37:01 [DEBUG] clck_gen.py:128 IND CLOCK 1122
2025-03-30 06:37:01 [DEBUG] clck_gen.py:128 IND CLOCK 1224
2025-03-30 06:37:02 [DEBUG] clck_gen.py:128 IND CLOCK 1326
2025-03-30 06:37:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:37:02 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:37:02 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:37:02 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:37:02 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:37:02 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:37:02 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:37:02 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:37:02 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:37:02 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:37:02 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:37:02 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:37:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:37:02 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:37:02 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:37:02 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:37:02 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:37:02 [DEBUG] clck_gen.py:128 IND CLOCK 1428
2025-03-30 06:37:03 [DEBUG] clck_gen.py:128 IND CLOCK 1530
2025-03-30 06:37:03 [DEBUG] clck_gen.py:128 IND CLOCK 1632
2025-03-30 06:37:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:37:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:37:04 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:37:04 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:37:04 [DEBUG] clck_gen.py:128 IND CLOCK 1734
2025-03-30 06:37:04 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:37:04 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:37:04 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:37:04 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:37:04 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:37:04 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:37:04 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 06:37:04 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 06:37:04 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 06:37:04 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:37:04 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:37:04 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=1737 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:37:04 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=1737 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:37:04 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=1737 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:37:04 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=1737 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:37:04 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=1737 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:37:04 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=1737 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:37:04 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=1737 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:37:09 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 06:37:09 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 06:37:09 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:37:09 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:37:09 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:37:09 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:37:09 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:37:09 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 06:37:09 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:37:09 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 06:37:09 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 06:37:09 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 06:37:09 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 06:37:09 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 06:37:09 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:37:09 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:37:09 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 06:37:09 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 06:37:09 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 06:37:09 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 06:37:09 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 06:37:09 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 06:37:09 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:37:09 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:37:09 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 06:37:09 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 06:37:09 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 06:37:09 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 06:37:09 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 06:37:09 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 06:37:09 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:37:09 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 06:37:09 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:37:09 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 06:37:09 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 06:37:09 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 06:37:09 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 06:37:09 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 06:37:09 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 06:37:09 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 06:37:09 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 06:37:09 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 06:37:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 06:37:09 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:37:09 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 06:37:09 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 06:37:09 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:37:09 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:37:09 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 06:37:09 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 06:37:09 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 06:37:09 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 06:37:09 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:37:09 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:37:09 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:37:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 06:37:09 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:37:09 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:37:09 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:37:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:37:09 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:37:09 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:37:09 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:37:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:37:09 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:37:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:37:09 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:37:09 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:37:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:37:09 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:37:09 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:37:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:37:09 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:37:09 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:37:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:37:09 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:37:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:37:09 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:37:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:37:09 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:37:09 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:37:09 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:37:09 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-03-30 06:37:09 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-03-30 06:37:09 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-03-30 06:37:09 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-03-30 06:37:09 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-03-30 06:37:09 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-03-30 06:37:09 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-03-30 06:37:09 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-03-30 06:37:09 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-03-30 06:37:09 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-03-30 06:37:09 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 06:37:09 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 06:37:09 [DEBUG] fake_trx.py:317 (BTS@172.18.26.20:5700) Recv FAKE_CI cmd
2025-03-30 06:37:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:37:09 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:37:09 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:37:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:37:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:37:09 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:37:09 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:37:09 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:37:09 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:37:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:37:09 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:37:09 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:37:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:37:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:37:10 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-03-30 06:37:10 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:37:10 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:37:10 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:37:10 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:37:10 [DEBUG] clck_gen.py:128 IND CLOCK 306
2025-03-30 06:37:11 [DEBUG] clck_gen.py:128 IND CLOCK 408
2025-03-30 06:37:11 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:37:11 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:37:11 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:37:11 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:37:11 [DEBUG] clck_gen.py:128 IND CLOCK 510
2025-03-30 06:37:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:37:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:37:11 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:37:11 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:37:11 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:37:11 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:37:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:37:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:37:11 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:37:11 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:37:11 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:37:11 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:37:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:37:11 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:37:11 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:37:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:37:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:37:12 [DEBUG] clck_gen.py:128 IND CLOCK 612
2025-03-30 06:37:12 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:37:12 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:37:12 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:37:12 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:37:12 [DEBUG] clck_gen.py:128 IND CLOCK 714
2025-03-30 06:37:13 [DEBUG] clck_gen.py:128 IND CLOCK 816
2025-03-30 06:37:13 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:37:13 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:37:13 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:37:13 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:37:13 [DEBUG] clck_gen.py:128 IND CLOCK 918
2025-03-30 06:37:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:37:13 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:37:13 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:37:13 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:37:13 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:37:13 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:37:13 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:37:13 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:37:13 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:37:13 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:37:13 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:37:13 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:37:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:37:13 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:37:13 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:37:13 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:37:13 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:37:14 [DEBUG] clck_gen.py:128 IND CLOCK 1020
2025-03-30 06:37:14 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:37:14 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:37:14 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:37:14 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:37:14 [DEBUG] clck_gen.py:128 IND CLOCK 1122
2025-03-30 06:37:14 [DEBUG] clck_gen.py:128 IND CLOCK 1224
2025-03-30 06:37:15 [DEBUG] clck_gen.py:128 IND CLOCK 1326
2025-03-30 06:37:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:37:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:37:15 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:37:15 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:37:15 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:37:15 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:37:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:37:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:37:15 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:37:15 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:37:15 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:37:15 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:37:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:37:15 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:37:15 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:37:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:37:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:37:15 [DEBUG] clck_gen.py:128 IND CLOCK 1428
2025-03-30 06:37:16 [DEBUG] clck_gen.py:128 IND CLOCK 1530
2025-03-30 06:37:16 [DEBUG] clck_gen.py:128 IND CLOCK 1632
2025-03-30 06:37:17 [DEBUG] clck_gen.py:128 IND CLOCK 1734
2025-03-30 06:37:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:37:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:37:17 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:37:17 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:37:17 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:37:17 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:37:17 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:37:17 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:37:17 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:37:17 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:37:17 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:37:17 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:37:17 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 06:37:17 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 06:37:17 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 06:37:22 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 06:37:22 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 06:37:22 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:37:22 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:37:22 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:37:22 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:37:22 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:37:22 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 06:37:22 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:37:22 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 06:37:22 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 06:37:22 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 06:37:22 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 06:37:22 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 06:37:22 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:37:22 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:37:22 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 06:37:22 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 06:37:22 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 06:37:22 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 06:37:22 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 06:37:22 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 06:37:22 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:37:22 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:37:22 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 06:37:22 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 06:37:22 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 06:37:22 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 06:37:22 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 06:37:22 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 06:37:22 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:37:22 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:37:22 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 06:37:22 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 06:37:22 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 06:37:22 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 06:37:22 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 06:37:22 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 06:37:22 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 06:37:22 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 06:37:22 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 06:37:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 06:37:22 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 06:37:22 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 06:37:22 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 06:37:22 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:37:22 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:37:22 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 06:37:22 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 06:37:22 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 06:37:22 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 06:37:22 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:37:22 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:37:22 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:37:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 06:37:22 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:37:22 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:37:22 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:37:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:37:22 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:37:22 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:37:22 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:37:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:37:22 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:37:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:37:22 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:37:22 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:37:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:37:22 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:37:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:37:22 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:37:22 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:37:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:37:22 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:37:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:37:22 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:37:22 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:37:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:37:22 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:37:22 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:37:22 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:37:22 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:37:22 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-03-30 06:37:22 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-03-30 06:37:22 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-03-30 06:37:22 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-03-30 06:37:22 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-03-30 06:37:22 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-03-30 06:37:22 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-03-30 06:37:22 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-03-30 06:37:22 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-03-30 06:37:22 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-03-30 06:37:22 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=105 tn=0 bl=148 pwr=0
2025-03-30 06:37:22 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=105 tn=1 bl=148 pwr=0
2025-03-30 06:37:22 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=105 tn=2 bl=148 pwr=0
2025-03-30 06:37:22 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=105 tn=3 bl=148 pwr=0
2025-03-30 06:37:22 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=105 tn=4 bl=148 pwr=0
2025-03-30 06:37:22 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=105 tn=5 bl=148 pwr=0
2025-03-30 06:37:22 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=105 tn=6 bl=148 pwr=0
2025-03-30 06:37:22 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=105 tn=7 bl=148 pwr=0
2025-03-30 06:37:22 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=106 tn=0 bl=148 pwr=0
2025-03-30 06:37:22 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=106 tn=1 bl=148 pwr=0
2025-03-30 06:37:22 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=106 tn=2 bl=148 pwr=0
2025-03-30 06:37:22 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=106 tn=3 bl=148 pwr=0
2025-03-30 06:37:22 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=106 tn=4 bl=148 pwr=0
2025-03-30 06:37:22 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=106 tn=5 bl=148 pwr=0
2025-03-30 06:37:22 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=106 tn=6 bl=148 pwr=0
2025-03-30 06:37:22 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=106 tn=7 bl=148 pwr=0
2025-03-30 06:37:22 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=107 tn=0 bl=148 pwr=0
2025-03-30 06:37:22 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=107 tn=1 bl=148 pwr=0
2025-03-30 06:37:22 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=107 tn=2 bl=148 pwr=0
2025-03-30 06:37:22 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=107 tn=3 bl=148 pwr=0
2025-03-30 06:37:22 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=107 tn=4 bl=148 pwr=0
2025-03-30 06:37:22 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=107 tn=5 bl=148 pwr=0
2025-03-30 06:37:22 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=107 tn=6 bl=148 pwr=0
2025-03-30 06:37:22 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=107 tn=7 bl=148 pwr=0
2025-03-30 06:37:22 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 06:37:22 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 06:37:22 [DEBUG] fake_trx.py:317 (BTS@172.18.26.20:5700) Recv FAKE_CI cmd
2025-03-30 06:37:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:37:22 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:37:22 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:37:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:37:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:37:22 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:37:22 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:37:22 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:37:22 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:37:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:37:22 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:37:22 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:37:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:37:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:37:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:37:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:37:23 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:37:23 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:37:23 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:37:23 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:37:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:37:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:37:23 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:37:23 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:37:23 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:37:23 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:37:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:37:23 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:37:23 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:37:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:37:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:37:23 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-03-30 06:37:23 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:37:23 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:37:23 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:37:23 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:37:23 [DEBUG] clck_gen.py:128 IND CLOCK 306
2025-03-30 06:37:24 [DEBUG] clck_gen.py:128 IND CLOCK 408
2025-03-30 06:37:24 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:37:24 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:37:24 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:37:24 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:37:24 [DEBUG] clck_gen.py:128 IND CLOCK 510
2025-03-30 06:37:25 [DEBUG] clck_gen.py:128 IND CLOCK 612
2025-03-30 06:37:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:37:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:37:25 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:37:25 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:37:25 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:37:25 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:37:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:37:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:37:25 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:37:25 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:37:25 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:37:25 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:37:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:37:25 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:37:25 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:37:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:37:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:37:25 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:37:25 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:37:25 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:37:25 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:37:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:37:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:37:25 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:37:25 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:37:25 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:37:25 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:37:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:37:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:37:25 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:37:25 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:37:25 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:37:25 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:37:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:37:25 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:37:25 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:37:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:37:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:37:25 [DEBUG] clck_gen.py:128 IND CLOCK 714
2025-03-30 06:37:26 [DEBUG] clck_gen.py:128 IND CLOCK 816
2025-03-30 06:37:26 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:37:26 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:37:26 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:37:26 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:37:26 [DEBUG] clck_gen.py:128 IND CLOCK 918
2025-03-30 06:37:27 [DEBUG] clck_gen.py:128 IND CLOCK 1020
2025-03-30 06:37:27 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:37:27 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:37:27 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:37:27 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:37:27 [DEBUG] clck_gen.py:128 IND CLOCK 1122
2025-03-30 06:37:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:37:27 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:37:27 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:37:27 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:37:27 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:37:27 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:37:27 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:37:27 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:37:27 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:37:27 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:37:27 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:37:27 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:37:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:37:27 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:37:27 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:37:27 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:37:27 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:37:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:37:28 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:37:28 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:37:28 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:37:28 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:37:28 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:37:28 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:37:28 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:37:28 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:37:28 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:37:28 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:37:28 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:37:28 [DEBUG] clck_gen.py:128 IND CLOCK 1224
2025-03-30 06:37:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:37:28 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:37:28 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:37:28 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:37:28 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:37:28 [DEBUG] clck_gen.py:128 IND CLOCK 1326
2025-03-30 06:37:29 [DEBUG] clck_gen.py:128 IND CLOCK 1428
2025-03-30 06:37:29 [DEBUG] clck_gen.py:128 IND CLOCK 1530
2025-03-30 06:37:29 [DEBUG] clck_gen.py:128 IND CLOCK 1632
2025-03-30 06:37:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:37:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:37:30 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:37:30 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:37:30 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:37:30 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:37:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:37:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:37:30 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:37:30 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:37:30 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:37:30 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:37:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:37:30 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:37:30 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:37:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:37:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:37:30 [DEBUG] clck_gen.py:128 IND CLOCK 1734
2025-03-30 06:37:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:37:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:37:30 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:37:30 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:37:30 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:37:30 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:37:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:37:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:37:30 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:37:30 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:37:30 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:37:30 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:37:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:37:30 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:37:30 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:37:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:37:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:37:30 [DEBUG] clck_gen.py:128 IND CLOCK 1836
2025-03-30 06:37:31 [DEBUG] clck_gen.py:128 IND CLOCK 1938
2025-03-30 06:37:31 [DEBUG] clck_gen.py:128 IND CLOCK 2040
2025-03-30 06:37:32 [DEBUG] clck_gen.py:128 IND CLOCK 2142
2025-03-30 06:37:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:37:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:37:32 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:37:32 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:37:32 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:37:32 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:37:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:37:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:37:32 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:37:32 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:37:32 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:37:32 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:37:32 [DEBUG] clck_gen.py:128 IND CLOCK 2244
2025-03-30 06:37:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:37:32 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:37:32 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:37:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:37:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:37:33 [DEBUG] clck_gen.py:128 IND CLOCK 2346
2025-03-30 06:37:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:37:33 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:37:33 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:37:33 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:37:33 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:37:33 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:37:33 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:37:33 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:37:33 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:37:33 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:37:33 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:37:33 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:37:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:37:33 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:37:33 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:37:33 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:37:33 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:37:33 [DEBUG] clck_gen.py:128 IND CLOCK 2448
2025-03-30 06:37:34 [DEBUG] clck_gen.py:128 IND CLOCK 2550
2025-03-30 06:37:34 [DEBUG] clck_gen.py:128 IND CLOCK 2652
2025-03-30 06:37:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:37:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:37:35 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:37:35 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:37:35 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:37:35 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:37:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:37:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:37:35 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:37:35 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:37:35 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:37:35 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:37:35 [DEBUG] clck_gen.py:128 IND CLOCK 2754
2025-03-30 06:37:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:37:35 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:37:35 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:37:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:37:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:37:35 [DEBUG] clck_gen.py:128 IND CLOCK 2856
2025-03-30 06:37:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:37:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:37:35 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:37:35 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:37:35 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:37:35 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:37:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:37:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:37:35 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:37:35 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:37:35 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:37:35 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:37:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:37:35 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:37:35 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:37:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:37:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:37:36 [DEBUG] clck_gen.py:128 IND CLOCK 2958
2025-03-30 06:37:36 [DEBUG] clck_gen.py:128 IND CLOCK 3060
2025-03-30 06:37:37 [DEBUG] clck_gen.py:128 IND CLOCK 3162
2025-03-30 06:37:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:37:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:37:37 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:37:37 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:37:37 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:37:37 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:37:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:37:37 [DEBUG] clck_gen.py:128 IND CLOCK 3264
2025-03-30 06:37:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:37:37 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:37:37 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:37:37 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:37:37 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:37:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:37:37 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:37:37 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:37:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:37:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:37:37 [DEBUG] clck_gen.py:128 IND CLOCK 3366
2025-03-30 06:37:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:37:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:37:38 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:37:38 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:37:38 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:37:38 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:37:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:37:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:37:38 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:37:38 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:37:38 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:37:38 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:37:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:37:38 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:37:38 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:37:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:37:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:37:38 [DEBUG] clck_gen.py:128 IND CLOCK 3468
2025-03-30 06:37:38 [DEBUG] clck_gen.py:128 IND CLOCK 3570
2025-03-30 06:37:39 [DEBUG] clck_gen.py:128 IND CLOCK 3672
2025-03-30 06:37:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:37:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:37:39 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:37:39 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:37:39 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:37:39 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:37:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:37:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:37:39 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:37:39 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:37:39 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:37:39 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:37:39 [DEBUG] clck_gen.py:128 IND CLOCK 3774
2025-03-30 06:37:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:37:39 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:37:39 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:37:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:37:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:37:40 [DEBUG] clck_gen.py:128 IND CLOCK 3876
2025-03-30 06:37:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:37:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:37:40 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:37:40 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:37:40 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:37:40 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:37:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:37:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:37:40 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:37:40 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:37:40 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:37:40 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:37:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:37:40 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:37:40 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:37:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:37:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:37:40 [DEBUG] clck_gen.py:128 IND CLOCK 3978
2025-03-30 06:37:41 [DEBUG] clck_gen.py:128 IND CLOCK 4080
2025-03-30 06:37:41 [DEBUG] clck_gen.py:128 IND CLOCK 4182
2025-03-30 06:37:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:37:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:37:42 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:37:42 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:37:42 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:37:42 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:37:42 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:37:42 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:37:42 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:37:42 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:37:42 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:37:42 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:37:42 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 06:37:42 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 06:37:42 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 06:37:47 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 06:37:47 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 06:37:47 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:37:47 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:37:47 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:37:47 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:37:47 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:37:47 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 06:37:47 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:37:47 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 06:37:47 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 06:37:47 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 06:37:47 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 06:37:47 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 06:37:47 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:37:47 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:37:47 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 06:37:47 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 06:37:47 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 06:37:47 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 06:37:47 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 06:37:47 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 06:37:47 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:37:47 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:37:47 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 06:37:47 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 06:37:47 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 06:37:47 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 06:37:47 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 06:37:47 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 06:37:47 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:37:47 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:37:47 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 06:37:47 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 06:37:47 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 06:37:47 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 06:37:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 06:37:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 06:37:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 06:37:47 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 06:37:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 06:37:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 06:37:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 06:37:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:37:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 06:37:47 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 06:37:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:37:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:37:47 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 06:37:47 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 06:37:47 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 06:37:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:37:47 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 06:37:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:37:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:37:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 06:37:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:37:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:37:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:37:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:37:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:37:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:37:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:37:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:37:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:37:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:37:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:37:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:37:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:37:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:37:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:37:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:37:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:37:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:37:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:37:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:37:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:37:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:37:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:37:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:37:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:37:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:37:47 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-03-30 06:37:47 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-03-30 06:37:47 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-03-30 06:37:47 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-03-30 06:37:47 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-03-30 06:37:47 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-03-30 06:37:47 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-03-30 06:37:47 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-03-30 06:37:47 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-03-30 06:37:47 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-03-30 06:37:47 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=105 tn=0 bl=148 pwr=0
2025-03-30 06:37:47 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=105 tn=1 bl=148 pwr=0
2025-03-30 06:37:47 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=105 tn=2 bl=148 pwr=0
2025-03-30 06:37:47 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=105 tn=3 bl=148 pwr=0
2025-03-30 06:37:47 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=105 tn=4 bl=148 pwr=0
2025-03-30 06:37:47 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=105 tn=5 bl=148 pwr=0
2025-03-30 06:37:47 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=105 tn=6 bl=148 pwr=0
2025-03-30 06:37:47 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=105 tn=7 bl=148 pwr=0
2025-03-30 06:37:47 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=106 tn=0 bl=148 pwr=0
2025-03-30 06:37:47 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=106 tn=1 bl=148 pwr=0
2025-03-30 06:37:47 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=106 tn=2 bl=148 pwr=0
2025-03-30 06:37:47 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=106 tn=3 bl=148 pwr=0
2025-03-30 06:37:47 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=106 tn=4 bl=148 pwr=0
2025-03-30 06:37:47 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=106 tn=5 bl=148 pwr=0
2025-03-30 06:37:47 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=106 tn=6 bl=148 pwr=0
2025-03-30 06:37:47 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=106 tn=7 bl=148 pwr=0
2025-03-30 06:37:47 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=107 tn=0 bl=148 pwr=0
2025-03-30 06:37:47 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=107 tn=1 bl=148 pwr=0
2025-03-30 06:37:47 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=107 tn=2 bl=148 pwr=0
2025-03-30 06:37:47 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=107 tn=3 bl=148 pwr=0
2025-03-30 06:37:47 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=107 tn=4 bl=148 pwr=0
2025-03-30 06:37:47 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=107 tn=5 bl=148 pwr=0
2025-03-30 06:37:47 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=107 tn=6 bl=148 pwr=0
2025-03-30 06:37:47 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=107 tn=7 bl=148 pwr=0
2025-03-30 06:37:47 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 06:37:47 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 06:37:47 [DEBUG] fake_trx.py:317 (BTS@172.18.26.20:5700) Recv FAKE_CI cmd
2025-03-30 06:37:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:37:47 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:37:47 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:37:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:37:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:37:47 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:37:47 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:37:47 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:37:47 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:37:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:37:47 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:37:47 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:37:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:37:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:37:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:37:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:37:47 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:37:47 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:37:47 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:37:47 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:37:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:37:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:37:47 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:37:47 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:37:47 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:37:47 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:37:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:37:47 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:37:47 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:37:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:37:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:37:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:37:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:37:47 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:37:47 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:37:47 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:37:47 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:37:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:37:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:37:47 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:37:47 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:37:47 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:37:47 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:37:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:37:48 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:37:48 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:37:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:37:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:37:48 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-03-30 06:37:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:37:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:37:48 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:37:48 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:37:48 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:37:48 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:37:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:37:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:37:48 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:37:48 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:37:48 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:37:48 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:37:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:37:48 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:37:48 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:37:48 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:37:48 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:37:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:37:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:37:48 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:37:48 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:37:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:37:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:37:48 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:37:48 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:37:48 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:37:48 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:37:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:37:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:37:48 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:37:48 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:37:48 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:37:48 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:37:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:37:48 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:37:48 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:37:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:37:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:37:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:37:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:37:48 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:37:48 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:37:48 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:37:48 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:37:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:37:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:37:48 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:37:48 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:37:48 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:37:48 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:37:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:37:48 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:37:48 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:37:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:37:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:37:48 [DEBUG] clck_gen.py:128 IND CLOCK 306
2025-03-30 06:37:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:37:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:37:48 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:37:48 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:37:48 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:37:48 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:37:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:37:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:37:48 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:37:48 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:37:48 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:37:48 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:37:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:37:48 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:37:48 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:37:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:37:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:37:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:37:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:37:48 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:37:48 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:37:48 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:37:48 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:37:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:37:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:37:48 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:37:48 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:37:48 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:37:48 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:37:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:37:48 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:37:48 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:37:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:37:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:37:49 [DEBUG] clck_gen.py:128 IND CLOCK 408
2025-03-30 06:37:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:37:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:37:49 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:37:49 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:37:49 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:37:49 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:37:49 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:37:49 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:37:49 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:37:49 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:37:49 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:37:49 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:37:49 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 06:37:49 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 06:37:49 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 06:37:54 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 06:37:54 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 06:37:54 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:37:54 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:37:54 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:37:54 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:37:54 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:37:54 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 06:37:54 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:37:54 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 06:37:54 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 06:37:54 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 06:37:54 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 06:37:54 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 06:37:54 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:37:54 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:37:54 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 06:37:54 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 06:37:54 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 06:37:54 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 06:37:54 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 06:37:54 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 06:37:54 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:37:54 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:37:54 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 06:37:54 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 06:37:54 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 06:37:54 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 06:37:54 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 06:37:54 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 06:37:54 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:37:54 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:37:54 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 06:37:54 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 06:37:54 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 06:37:54 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 06:37:54 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 06:37:54 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 06:37:54 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 06:37:54 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 06:37:54 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 06:37:54 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 06:37:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 06:37:54 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:37:54 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 06:37:54 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:37:54 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 06:37:54 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:37:54 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 06:37:54 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 06:37:54 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 06:37:54 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 06:37:54 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:37:54 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:37:54 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:37:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 06:37:54 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:37:54 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:37:54 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:37:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:37:54 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:37:54 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:37:54 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:37:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:37:54 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:37:54 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:37:54 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:37:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:37:54 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:37:54 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:37:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:37:54 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:37:54 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:37:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:37:54 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:37:54 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:37:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:37:54 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:37:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:37:54 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:37:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:37:54 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:37:54 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-03-30 06:37:54 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-03-30 06:37:54 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-03-30 06:37:54 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-03-30 06:37:54 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-03-30 06:37:54 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-03-30 06:37:54 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-03-30 06:37:54 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-03-30 06:37:54 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-03-30 06:37:54 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-03-30 06:37:54 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=0 bl=148 pwr=0
2025-03-30 06:37:54 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=1 bl=148 pwr=0
2025-03-30 06:37:54 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=2 bl=148 pwr=0
2025-03-30 06:37:54 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=3 bl=148 pwr=0
2025-03-30 06:37:54 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=4 bl=148 pwr=0
2025-03-30 06:37:54 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=5 bl=148 pwr=0
2025-03-30 06:37:54 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=6 bl=148 pwr=0
2025-03-30 06:37:54 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=7 bl=148 pwr=0
2025-03-30 06:37:54 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 06:37:54 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 06:37:54 [DEBUG] fake_trx.py:317 (BTS@172.18.26.20:5700) Recv FAKE_CI cmd
2025-03-30 06:37:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:37:54 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:37:54 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:37:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:37:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:37:54 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:37:54 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:37:54 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:37:54 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:37:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:37:54 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:37:54 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:37:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:37:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:37:55 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-03-30 06:37:55 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:37:55 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:37:55 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:37:55 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:37:55 [DEBUG] clck_gen.py:128 IND CLOCK 306
2025-03-30 06:37:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:37:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:37:55 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:37:55 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:37:55 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:37:55 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:37:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:37:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:37:55 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:37:55 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:37:55 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:37:55 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:37:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:37:55 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:37:55 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:37:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:37:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:37:56 [DEBUG] clck_gen.py:128 IND CLOCK 408
2025-03-30 06:37:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:37:56 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:37:56 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:37:56 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:37:56 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:37:56 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:37:56 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:37:56 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:37:56 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:37:56 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:37:56 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:37:56 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:37:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:37:56 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:37:56 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:37:56 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:37:56 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:37:56 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:37:56 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:37:56 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:37:56 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:37:56 [DEBUG] clck_gen.py:128 IND CLOCK 510
2025-03-30 06:37:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:37:56 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:37:56 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:37:56 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:37:56 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:37:56 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:37:56 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:37:56 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:37:56 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:37:56 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:37:56 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:37:56 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:37:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:37:56 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:37:56 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:37:56 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:37:56 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:37:57 [DEBUG] clck_gen.py:128 IND CLOCK 612
2025-03-30 06:37:57 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:37:57 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:37:57 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:37:57 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:37:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:37:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:37:57 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:37:57 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:37:57 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:37:57 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:37:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:37:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:37:57 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:37:57 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:37:57 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:37:57 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:37:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:37:57 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:37:57 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:37:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:37:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:37:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:37:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:37:57 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:37:57 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:37:57 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:37:57 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:37:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:37:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:37:57 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:37:57 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:37:57 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:37:57 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:37:57 [DEBUG] clck_gen.py:128 IND CLOCK 714
2025-03-30 06:37:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:37:57 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:37:57 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:37:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:37:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:37:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:37:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:37:57 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:37:57 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:37:57 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:37:57 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:37:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:37:57 [DEBUG] clck_gen.py:128 IND CLOCK 816
2025-03-30 06:37:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:37:57 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:37:57 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:37:57 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:37:57 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:37:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:37:57 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:37:57 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:37:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:37:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:37:58 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:37:58 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:37:58 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:37:58 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:37:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:37:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:37:58 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:37:58 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:37:58 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:37:58 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:37:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:37:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:37:58 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:37:58 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:37:58 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:37:58 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:37:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:37:58 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:37:58 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:37:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:37:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:37:58 [DEBUG] clck_gen.py:128 IND CLOCK 918
2025-03-30 06:37:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:37:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:37:58 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:37:58 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:37:58 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:37:58 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:37:58 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:37:58 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:37:58 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:37:58 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:37:58 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:37:58 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:37:58 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 06:37:58 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 06:37:58 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 06:38:03 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 06:38:03 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 06:38:03 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:38:03 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:38:03 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:38:03 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:38:03 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:38:03 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 06:38:03 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:38:03 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 06:38:03 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 06:38:03 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 06:38:03 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 06:38:03 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 06:38:03 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:38:03 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:38:03 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 06:38:03 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 06:38:03 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 06:38:03 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 06:38:03 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 06:38:03 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 06:38:03 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:38:03 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:38:03 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 06:38:03 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 06:38:03 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 06:38:03 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 06:38:03 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 06:38:03 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 06:38:03 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:38:03 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:38:03 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 06:38:03 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 06:38:03 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 06:38:03 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 06:38:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 06:38:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 06:38:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 06:38:03 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 06:38:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 06:38:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 06:38:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 06:38:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:38:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 06:38:03 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 06:38:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:38:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:38:03 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 06:38:03 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 06:38:03 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 06:38:03 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 06:38:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:38:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:38:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:38:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 06:38:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:38:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:38:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:38:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:38:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:38:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:38:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:38:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:38:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:38:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:38:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:38:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:38:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:38:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:38:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:38:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:38:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:38:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:38:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:38:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:38:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:38:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:38:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:38:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:38:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:38:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:38:03 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-03-30 06:38:04 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-03-30 06:38:04 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-03-30 06:38:04 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-03-30 06:38:04 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-03-30 06:38:04 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-03-30 06:38:04 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-03-30 06:38:04 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-03-30 06:38:04 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-03-30 06:38:04 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-03-30 06:38:04 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 06:38:04 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 06:38:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:38:04 [DEBUG] fake_trx.py:317 (BTS@172.18.26.20:5700) Recv FAKE_CI cmd
2025-03-30 06:38:04 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:38:04 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:38:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:38:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:38:04 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:38:04 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:38:04 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:38:04 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:38:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:38:04 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:38:04 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:38:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:38:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:38:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:38:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:38:04 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:38:04 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:38:04 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:38:04 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:38:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:38:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:38:04 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:38:04 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:38:04 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:38:04 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:38:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:38:04 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:38:04 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:38:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:38:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:38:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:38:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:38:04 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:38:04 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:38:04 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:38:04 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:38:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:38:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:38:04 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:38:04 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:38:04 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:38:04 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:38:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:38:04 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:38:04 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:38:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:38:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:38:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:38:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:38:04 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:38:04 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:38:04 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:38:04 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:38:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:38:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:38:04 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:38:04 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:38:04 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:38:04 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:38:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:38:04 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:38:04 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:38:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:38:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:38:04 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-03-30 06:38:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:38:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:38:04 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:38:04 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:38:04 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:38:04 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:38:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:38:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:38:04 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:38:04 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:38:04 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:38:04 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:38:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:38:04 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:38:04 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:38:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:38:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:38:04 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:38:04 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:38:04 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:38:04 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:38:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:38:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:38:05 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:38:05 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:38:05 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:38:05 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:38:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:38:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:38:05 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:38:05 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:38:05 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:38:05 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:38:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:38:05 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:38:05 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:38:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:38:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:38:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:38:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:38:05 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:38:05 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:38:05 [DEBUG] clck_gen.py:128 IND CLOCK 306
2025-03-30 06:38:05 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:38:05 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:38:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:38:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:38:05 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:38:05 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:38:05 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:38:05 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:38:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:38:05 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:38:05 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:38:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:38:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:38:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:38:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:38:05 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:38:05 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:38:05 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:38:05 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:38:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:38:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:38:05 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:38:05 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:38:05 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:38:05 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:38:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:38:05 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:38:05 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:38:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:38:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:38:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:38:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:38:05 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:38:05 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:38:05 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:38:05 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:38:05 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:38:05 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:38:05 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:38:05 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:38:05 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:38:05 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:38:05 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 06:38:05 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 06:38:05 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 06:38:05 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=395 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:38:05 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=395 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:38:05 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=395 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:38:05 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=395 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:38:05 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=395 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:38:05 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=395 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:38:05 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=395 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:38:05 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=395 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:38:10 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 06:38:10 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 06:38:10 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:38:10 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:38:10 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:38:10 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:38:10 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:38:10 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 06:38:10 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:38:10 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 06:38:10 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 06:38:10 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 06:38:10 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 06:38:10 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 06:38:10 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:38:10 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:38:10 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 06:38:10 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 06:38:10 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 06:38:10 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 06:38:10 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 06:38:10 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 06:38:10 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:38:10 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:38:10 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 06:38:10 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 06:38:10 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 06:38:10 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 06:38:10 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 06:38:10 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 06:38:10 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:38:10 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 06:38:10 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:38:10 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 06:38:10 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 06:38:10 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 06:38:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 06:38:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 06:38:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 06:38:10 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 06:38:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 06:38:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 06:38:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 06:38:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:38:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 06:38:10 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 06:38:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:38:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:38:10 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 06:38:10 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 06:38:10 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 06:38:10 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 06:38:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:38:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:38:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:38:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 06:38:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:38:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:38:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:38:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:38:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:38:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:38:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:38:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:38:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:38:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:38:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:38:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:38:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:38:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:38:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:38:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:38:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:38:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:38:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:38:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:38:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:38:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:38:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:38:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:38:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:38:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:38:10 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-03-30 06:38:11 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-03-30 06:38:11 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-03-30 06:38:11 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-03-30 06:38:11 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-03-30 06:38:11 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-03-30 06:38:11 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-03-30 06:38:11 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-03-30 06:38:11 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-03-30 06:38:11 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-03-30 06:38:11 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=0 bl=148 pwr=0
2025-03-30 06:38:11 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=1 bl=148 pwr=0
2025-03-30 06:38:11 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=2 bl=148 pwr=0
2025-03-30 06:38:11 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=3 bl=148 pwr=0
2025-03-30 06:38:11 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=4 bl=148 pwr=0
2025-03-30 06:38:11 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=5 bl=148 pwr=0
2025-03-30 06:38:11 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=6 bl=148 pwr=0
2025-03-30 06:38:11 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=7 bl=148 pwr=0
2025-03-30 06:38:11 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 06:38:11 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 06:38:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:38:11 [DEBUG] fake_trx.py:317 (BTS@172.18.26.20:5700) Recv FAKE_CI cmd
2025-03-30 06:38:11 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:38:11 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:38:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:38:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:38:11 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:38:11 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:38:11 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:38:11 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:38:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:38:11 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:38:11 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:38:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:38:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:38:11 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-03-30 06:38:11 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:38:11 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:38:11 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:38:11 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:38:12 [DEBUG] clck_gen.py:128 IND CLOCK 306
2025-03-30 06:38:12 [DEBUG] clck_gen.py:128 IND CLOCK 408
2025-03-30 06:38:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:38:12 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:38:12 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:38:12 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:38:12 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:38:12 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:38:12 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:38:12 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:38:12 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:38:12 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:38:12 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:38:12 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:38:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:38:12 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:38:12 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:38:12 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:38:12 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:38:12 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:38:12 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:38:12 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:38:12 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:38:13 [DEBUG] clck_gen.py:128 IND CLOCK 510
2025-03-30 06:38:13 [DEBUG] clck_gen.py:128 IND CLOCK 612
2025-03-30 06:38:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:38:13 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:38:13 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:38:13 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:38:13 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:38:13 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:38:13 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:38:13 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:38:13 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:38:13 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:38:13 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:38:13 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:38:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:38:13 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:38:13 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:38:13 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:38:13 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:38:13 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:38:13 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:38:13 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:38:13 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:38:14 [DEBUG] clck_gen.py:128 IND CLOCK 714
2025-03-30 06:38:14 [DEBUG] clck_gen.py:128 IND CLOCK 816
2025-03-30 06:38:14 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:38:14 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:38:14 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:38:14 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:38:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:38:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:38:14 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:38:14 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:38:14 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:38:14 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:38:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:38:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:38:14 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:38:14 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:38:14 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:38:14 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:38:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:38:14 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:38:14 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:38:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:38:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:38:14 [DEBUG] clck_gen.py:128 IND CLOCK 918
2025-03-30 06:38:15 [DEBUG] clck_gen.py:128 IND CLOCK 1020
2025-03-30 06:38:15 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:38:15 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:38:15 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:38:15 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:38:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:38:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:38:15 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:38:15 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:38:15 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:38:15 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:38:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:38:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:38:15 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:38:15 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:38:15 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:38:15 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:38:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:38:15 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:38:15 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:38:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:38:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:38:15 [DEBUG] clck_gen.py:128 IND CLOCK 1122
2025-03-30 06:38:16 [DEBUG] clck_gen.py:128 IND CLOCK 1224
2025-03-30 06:38:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:38:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:38:16 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:38:16 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:38:16 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:38:16 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:38:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:38:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:38:16 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:38:16 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:38:16 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:38:16 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:38:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:38:16 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:38:16 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:38:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:38:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:38:16 [DEBUG] clck_gen.py:128 IND CLOCK 1326
2025-03-30 06:38:17 [DEBUG] clck_gen.py:128 IND CLOCK 1428
2025-03-30 06:38:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:38:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:38:17 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:38:17 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:38:17 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:38:17 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:38:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:38:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:38:17 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:38:17 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:38:17 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:38:17 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:38:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:38:17 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:38:17 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:38:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:38:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:38:17 [DEBUG] clck_gen.py:128 IND CLOCK 1530
2025-03-30 06:38:18 [DEBUG] clck_gen.py:128 IND CLOCK 1632
2025-03-30 06:38:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:38:18 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:38:18 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:38:18 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:38:18 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:38:18 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:38:18 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:38:18 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:38:18 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:38:18 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:38:18 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:38:18 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:38:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:38:18 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:38:18 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:38:18 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:38:18 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:38:18 [DEBUG] clck_gen.py:128 IND CLOCK 1734
2025-03-30 06:38:19 [DEBUG] clck_gen.py:128 IND CLOCK 1836
2025-03-30 06:38:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:38:19 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:38:19 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:38:19 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:38:19 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:38:19 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:38:19 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:38:19 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:38:19 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:38:19 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:38:19 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:38:19 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:38:19 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 06:38:19 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 06:38:19 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 06:38:24 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 06:38:24 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 06:38:24 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:38:24 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:38:24 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:38:24 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:38:24 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:38:24 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 06:38:24 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:38:24 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 06:38:24 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 06:38:24 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 06:38:24 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 06:38:24 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 06:38:24 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:38:24 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 06:38:24 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:38:24 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 06:38:24 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 06:38:24 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 06:38:24 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 06:38:24 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 06:38:24 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:38:24 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 06:38:24 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:38:24 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 06:38:24 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 06:38:24 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 06:38:24 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 06:38:24 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 06:38:24 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:38:24 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 06:38:24 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:38:24 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 06:38:24 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 06:38:24 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 06:38:24 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 06:38:24 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 06:38:24 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 06:38:24 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 06:38:24 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 06:38:24 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 06:38:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 06:38:24 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:38:24 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:38:24 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 06:38:24 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 06:38:24 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:38:24 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:38:24 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:38:24 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 06:38:24 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 06:38:24 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 06:38:24 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 06:38:24 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:38:24 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:38:24 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:38:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 06:38:24 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:38:24 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:38:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:38:24 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:38:24 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:38:24 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:38:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:38:24 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:38:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:38:24 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:38:24 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:38:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:38:24 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:38:24 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:38:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:38:24 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:38:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:38:24 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:38:24 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:38:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:38:24 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:38:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:38:24 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:38:24 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:38:24 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-03-30 06:38:24 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-03-30 06:38:24 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-03-30 06:38:24 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-03-30 06:38:24 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-03-30 06:38:24 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-03-30 06:38:24 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-03-30 06:38:24 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-03-30 06:38:24 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-03-30 06:38:24 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-03-30 06:38:24 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 06:38:24 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 06:38:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:38:24 [DEBUG] fake_trx.py:317 (BTS@172.18.26.20:5700) Recv FAKE_CI cmd
2025-03-30 06:38:24 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:38:24 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:38:24 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:38:24 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:38:24 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:38:24 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:38:24 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:38:24 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:38:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:38:24 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:38:24 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:38:24 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:38:24 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:38:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:38:24 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:38:24 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:38:24 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:38:24 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:38:24 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:38:24 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:38:24 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:38:24 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:38:24 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:38:24 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:38:24 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:38:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:38:24 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:38:24 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:38:24 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:38:24 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:38:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:38:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:38:25 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:38:25 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:38:25 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:38:25 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:38:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:38:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:38:25 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:38:25 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:38:25 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:38:25 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:38:25 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-03-30 06:38:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:38:25 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:38:25 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:38:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:38:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:38:25 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:38:25 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:38:25 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:38:25 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:38:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:38:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:38:25 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:38:25 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:38:25 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:38:25 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:38:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:38:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:38:25 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:38:25 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:38:25 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:38:25 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:38:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:38:25 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:38:25 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:38:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:38:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:38:25 [DEBUG] clck_gen.py:128 IND CLOCK 306
2025-03-30 06:38:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:38:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:38:25 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:38:25 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:38:25 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:38:25 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:38:25 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:38:25 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:38:25 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:38:25 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:38:25 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:38:25 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:38:25 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 06:38:25 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 06:38:25 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 06:38:25 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=348 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:38:25 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=348 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:38:25 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=348 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:38:25 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=348 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:38:25 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=348 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:38:25 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=348 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:38:25 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=348 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:38:25 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=348 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:38:30 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 06:38:30 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 06:38:30 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:38:30 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:38:30 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:38:30 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:38:30 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:38:30 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 06:38:30 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:38:30 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 06:38:30 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 06:38:30 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 06:38:30 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 06:38:30 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 06:38:30 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:38:30 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 06:38:30 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:38:30 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 06:38:30 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 06:38:30 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 06:38:30 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 06:38:30 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 06:38:30 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:38:30 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:38:30 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 06:38:30 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 06:38:30 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 06:38:30 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 06:38:30 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 06:38:30 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 06:38:30 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:38:30 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:38:30 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 06:38:30 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 06:38:30 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 06:38:30 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 06:38:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 06:38:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 06:38:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 06:38:30 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 06:38:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 06:38:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 06:38:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 06:38:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 06:38:30 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 06:38:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:38:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:38:30 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 06:38:30 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 06:38:30 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 06:38:30 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 06:38:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:38:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:38:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:38:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 06:38:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:38:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:38:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:38:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:38:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:38:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:38:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:38:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:38:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:38:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:38:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:38:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:38:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:38:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:38:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:38:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:38:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:38:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:38:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:38:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:38:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:38:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:38:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:38:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:38:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:38:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:38:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:38:30 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-03-30 06:38:31 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-03-30 06:38:31 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-03-30 06:38:31 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-03-30 06:38:31 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-03-30 06:38:31 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-03-30 06:38:31 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-03-30 06:38:31 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-03-30 06:38:31 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-03-30 06:38:31 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-03-30 06:38:31 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 06:38:31 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 06:38:31 [DEBUG] fake_trx.py:317 (BTS@172.18.26.20:5700) Recv FAKE_CI cmd
2025-03-30 06:38:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:38:31 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:38:31 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:38:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:38:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:38:31 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:38:31 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:38:31 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:38:31 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:38:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:38:31 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:38:31 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:38:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:38:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:38:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:38:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:38:31 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:38:31 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:38:31 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:38:31 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:38:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:38:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:38:31 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:38:31 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:38:31 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:38:31 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:38:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:38:31 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:38:31 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:38:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:38:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:38:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:38:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:38:31 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:38:31 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:38:31 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:38:31 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:38:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:38:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:38:31 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:38:31 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:38:31 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:38:31 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:38:31 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-03-30 06:38:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:38:31 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:38:31 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:38:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:38:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:38:31 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:38:31 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:38:31 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:38:31 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:38:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:38:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:38:32 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:38:32 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:38:32 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:38:32 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:38:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:38:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:38:32 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:38:32 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:38:32 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:38:32 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:38:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:38:32 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:38:32 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:38:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:38:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:38:32 [DEBUG] clck_gen.py:128 IND CLOCK 306
2025-03-30 06:38:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:38:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:38:32 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:38:32 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:38:32 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:38:32 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:38:32 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:38:32 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:38:32 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:38:32 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:38:32 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:38:32 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:38:32 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 06:38:32 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 06:38:32 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 06:38:37 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 06:38:37 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 06:38:37 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:38:37 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:38:37 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:38:37 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:38:37 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:38:37 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 06:38:37 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:38:37 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 06:38:37 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 06:38:37 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 06:38:37 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 06:38:37 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 06:38:37 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:38:37 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:38:37 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 06:38:37 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 06:38:37 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 06:38:37 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 06:38:37 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 06:38:37 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 06:38:37 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:38:37 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:38:37 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 06:38:37 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 06:38:37 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 06:38:37 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 06:38:37 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 06:38:37 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 06:38:37 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:38:37 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:38:37 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 06:38:37 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 06:38:37 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 06:38:37 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 06:38:37 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 06:38:37 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 06:38:37 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 06:38:37 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 06:38:37 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 06:38:37 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 06:38:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 06:38:37 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:38:37 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 06:38:37 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 06:38:37 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:38:37 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:38:37 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 06:38:37 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 06:38:37 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 06:38:37 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 06:38:37 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:38:37 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:38:37 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:38:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 06:38:37 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:38:37 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:38:37 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:38:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:38:37 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:38:37 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:38:37 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:38:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:38:37 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:38:37 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:38:37 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:38:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:38:37 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:38:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:38:37 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:38:37 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:38:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:38:37 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:38:37 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:38:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:38:37 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:38:37 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:38:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:38:37 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:38:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:38:37 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:38:37 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-03-30 06:38:37 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-03-30 06:38:37 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-03-30 06:38:37 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-03-30 06:38:37 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-03-30 06:38:37 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-03-30 06:38:37 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-03-30 06:38:37 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-03-30 06:38:37 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-03-30 06:38:37 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-03-30 06:38:37 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 06:38:38 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 06:38:38 [DEBUG] fake_trx.py:317 (BTS@172.18.26.20:5700) Recv FAKE_CI cmd
2025-03-30 06:38:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:38:38 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:38:38 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:38:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:38:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:38:38 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:38:38 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:38:38 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:38:38 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:38:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:38:38 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:38:38 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:38:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:38:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:38:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:38:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:38:38 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:38:38 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:38:38 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:38:38 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:38:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:38:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:38:38 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:38:38 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:38:38 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:38:38 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:38:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:38:38 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:38:38 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:38:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:38:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:38:38 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-03-30 06:38:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:38:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:38:38 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:38:38 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:38:38 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:38:38 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:38:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:38:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:38:38 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:38:38 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:38:38 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:38:38 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:38:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:38:38 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:38:38 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:38:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:38:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:38:38 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:38:38 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:38:38 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:38:38 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:38:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:38:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:38:38 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:38:38 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:38:38 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:38:38 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:38:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:38:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:38:38 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:38:38 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:38:38 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:38:38 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:38:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:38:38 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:38:38 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:38:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:38:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:38:38 [DEBUG] clck_gen.py:128 IND CLOCK 306
2025-03-30 06:38:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:38:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:38:39 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:38:39 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:38:39 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:38:39 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:38:39 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:38:39 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:38:39 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:38:39 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:38:39 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:38:39 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:38:39 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 06:38:39 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 06:38:39 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 06:38:44 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 06:38:44 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 06:38:44 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:38:44 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:38:44 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:38:44 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:38:44 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:38:44 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 06:38:44 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:38:44 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 06:38:44 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 06:38:44 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 06:38:44 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 06:38:44 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 06:38:44 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:38:44 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:38:44 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 06:38:44 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 06:38:44 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 06:38:44 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 06:38:44 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 06:38:44 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 06:38:44 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:38:44 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 06:38:44 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:38:44 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 06:38:44 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 06:38:44 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 06:38:44 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 06:38:44 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 06:38:44 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:38:44 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:38:44 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 06:38:44 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 06:38:44 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 06:38:44 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 06:38:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 06:38:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 06:38:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 06:38:44 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 06:38:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 06:38:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 06:38:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 06:38:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:38:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 06:38:44 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 06:38:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:38:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:38:44 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 06:38:44 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 06:38:44 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 06:38:44 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 06:38:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:38:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:38:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:38:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 06:38:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:38:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:38:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:38:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:38:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:38:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:38:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:38:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:38:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:38:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:38:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:38:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:38:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:38:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:38:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:38:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:38:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:38:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:38:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:38:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:38:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:38:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:38:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:38:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:38:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:38:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:38:44 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-03-30 06:38:44 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-03-30 06:38:44 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-03-30 06:38:44 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-03-30 06:38:44 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-03-30 06:38:44 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-03-30 06:38:44 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-03-30 06:38:44 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-03-30 06:38:44 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-03-30 06:38:44 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-03-30 06:38:44 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=0 bl=148 pwr=0
2025-03-30 06:38:44 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=1 bl=148 pwr=0
2025-03-30 06:38:44 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=2 bl=148 pwr=0
2025-03-30 06:38:44 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=3 bl=148 pwr=0
2025-03-30 06:38:44 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=4 bl=148 pwr=0
2025-03-30 06:38:44 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=5 bl=148 pwr=0
2025-03-30 06:38:44 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=6 bl=148 pwr=0
2025-03-30 06:38:44 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=7 bl=148 pwr=0
2025-03-30 06:38:44 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 06:38:44 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 06:38:44 [DEBUG] fake_trx.py:317 (BTS@172.18.26.20:5700) Recv FAKE_CI cmd
2025-03-30 06:38:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:38:44 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:38:44 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:38:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:38:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:38:44 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:38:44 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:38:44 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:38:44 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:38:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:38:44 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:38:44 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:38:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:38:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:38:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:38:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:38:44 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:38:44 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:38:44 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:38:44 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:38:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:38:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:38:44 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:38:44 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:38:44 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:38:44 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:38:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:38:44 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:38:44 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:38:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:38:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:38:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:38:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:38:45 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:38:45 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:38:45 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:38:45 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:38:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:38:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:38:45 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:38:45 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:38:45 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:38:45 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:38:45 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-03-30 06:38:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:38:45 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:38:45 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:38:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:38:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:38:45 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:38:45 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:38:45 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:38:45 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:38:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:38:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:38:45 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:38:45 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:38:45 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:38:45 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:38:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:38:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:38:45 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:38:45 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:38:45 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:38:45 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:38:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:38:45 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:38:45 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:38:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:38:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:38:45 [DEBUG] clck_gen.py:128 IND CLOCK 306
2025-03-30 06:38:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:38:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:38:45 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:38:45 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:38:45 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:38:45 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:38:45 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:38:45 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:38:45 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:38:45 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:38:45 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:38:45 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:38:45 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 06:38:45 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 06:38:45 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 06:38:45 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=347 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:38:45 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=347 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:38:45 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=347 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:38:45 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=347 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:38:45 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=347 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:38:45 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=347 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:38:45 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=347 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:38:45 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=347 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:38:50 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 06:38:50 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 06:38:50 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:38:50 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:38:50 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:38:50 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:38:50 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:38:50 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 06:38:50 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:38:50 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 06:38:50 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 06:38:50 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 06:38:50 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 06:38:50 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 06:38:50 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:38:50 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 06:38:50 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:38:50 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 06:38:50 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 06:38:50 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 06:38:50 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 06:38:50 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 06:38:50 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:38:50 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:38:50 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 06:38:50 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 06:38:50 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 06:38:50 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 06:38:50 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 06:38:50 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 06:38:50 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:38:50 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 06:38:50 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:38:50 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 06:38:50 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 06:38:50 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 06:38:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 06:38:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 06:38:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 06:38:50 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 06:38:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 06:38:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 06:38:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 06:38:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:38:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 06:38:50 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 06:38:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:38:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:38:50 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 06:38:50 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 06:38:50 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 06:38:50 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 06:38:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:38:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:38:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:38:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 06:38:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:38:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:38:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:38:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:38:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:38:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:38:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:38:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:38:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:38:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:38:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:38:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:38:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:38:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:38:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:38:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:38:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:38:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:38:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:38:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:38:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:38:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:38:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:38:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:38:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:38:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:38:50 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-03-30 06:38:51 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-03-30 06:38:51 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-03-30 06:38:51 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-03-30 06:38:51 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-03-30 06:38:51 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-03-30 06:38:51 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-03-30 06:38:51 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-03-30 06:38:51 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-03-30 06:38:51 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-03-30 06:38:51 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=105 tn=0 bl=148 pwr=0
2025-03-30 06:38:51 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=105 tn=1 bl=148 pwr=0
2025-03-30 06:38:51 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=105 tn=2 bl=148 pwr=0
2025-03-30 06:38:51 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=105 tn=3 bl=148 pwr=0
2025-03-30 06:38:51 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=105 tn=4 bl=148 pwr=0
2025-03-30 06:38:51 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=105 tn=5 bl=148 pwr=0
2025-03-30 06:38:51 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=105 tn=6 bl=148 pwr=0
2025-03-30 06:38:51 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=105 tn=7 bl=148 pwr=0
2025-03-30 06:38:51 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=106 tn=0 bl=148 pwr=0
2025-03-30 06:38:51 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=106 tn=1 bl=148 pwr=0
2025-03-30 06:38:51 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=106 tn=2 bl=148 pwr=0
2025-03-30 06:38:51 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=106 tn=3 bl=148 pwr=0
2025-03-30 06:38:51 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=106 tn=4 bl=148 pwr=0
2025-03-30 06:38:51 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=106 tn=5 bl=148 pwr=0
2025-03-30 06:38:51 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=106 tn=6 bl=148 pwr=0
2025-03-30 06:38:51 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=106 tn=7 bl=148 pwr=0
2025-03-30 06:38:51 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=107 tn=0 bl=148 pwr=0
2025-03-30 06:38:51 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=107 tn=1 bl=148 pwr=0
2025-03-30 06:38:51 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=107 tn=2 bl=148 pwr=0
2025-03-30 06:38:51 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=107 tn=3 bl=148 pwr=0
2025-03-30 06:38:51 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=107 tn=4 bl=148 pwr=0
2025-03-30 06:38:51 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=107 tn=5 bl=148 pwr=0
2025-03-30 06:38:51 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=107 tn=6 bl=148 pwr=0
2025-03-30 06:38:51 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=107 tn=7 bl=148 pwr=0
2025-03-30 06:38:51 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 06:38:51 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 06:38:51 [DEBUG] fake_trx.py:317 (BTS@172.18.26.20:5700) Recv FAKE_CI cmd
2025-03-30 06:38:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:38:51 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:38:51 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:38:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:38:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:38:51 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:38:51 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:38:51 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:38:51 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:38:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:38:51 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:38:51 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:38:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:38:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:38:51 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-03-30 06:38:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:38:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:38:51 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:38:51 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:38:51 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:38:51 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:38:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:38:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:38:51 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:38:51 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:38:51 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:38:51 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:38:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:38:51 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:38:51 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:38:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:38:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:38:51 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:38:51 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:38:51 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:38:51 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:38:52 [DEBUG] clck_gen.py:128 IND CLOCK 306
2025-03-30 06:38:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:38:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:38:52 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:38:52 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:38:52 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:38:52 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:38:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:38:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:38:52 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:38:52 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:38:52 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:38:52 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:38:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:38:52 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:38:52 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:38:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:38:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:38:52 [DEBUG] clck_gen.py:128 IND CLOCK 408
2025-03-30 06:38:52 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:38:52 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:38:52 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:38:52 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:38:53 [DEBUG] clck_gen.py:128 IND CLOCK 510
2025-03-30 06:38:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:38:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:38:53 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:38:53 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:38:53 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:38:53 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:38:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:38:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:38:53 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:38:53 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:38:53 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:38:53 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:38:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:38:53 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:38:53 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:38:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:38:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:38:53 [DEBUG] clck_gen.py:128 IND CLOCK 612
2025-03-30 06:38:53 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:38:53 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:38:53 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:38:53 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:38:54 [DEBUG] clck_gen.py:128 IND CLOCK 714
2025-03-30 06:38:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:38:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:38:54 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:38:54 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:38:54 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:38:54 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:38:54 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:38:54 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:38:54 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:38:54 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:38:54 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:38:54 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:38:54 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 06:38:54 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 06:38:54 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 06:38:59 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 06:38:59 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 06:38:59 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:38:59 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:38:59 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:38:59 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:38:59 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:38:59 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 06:38:59 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:38:59 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 06:38:59 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 06:38:59 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 06:38:59 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 06:38:59 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 06:38:59 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:38:59 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:38:59 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 06:38:59 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 06:38:59 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 06:38:59 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 06:38:59 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 06:38:59 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 06:38:59 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:38:59 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:38:59 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 06:38:59 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 06:38:59 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 06:38:59 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 06:38:59 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 06:38:59 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 06:38:59 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:38:59 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:38:59 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 06:38:59 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 06:38:59 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 06:38:59 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 06:38:59 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 06:38:59 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 06:38:59 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 06:38:59 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 06:38:59 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 06:38:59 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 06:38:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 06:38:59 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:38:59 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 06:38:59 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 06:38:59 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:38:59 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:38:59 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 06:38:59 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 06:38:59 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 06:38:59 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 06:38:59 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:38:59 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:38:59 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:38:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 06:38:59 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:38:59 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:38:59 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:38:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:38:59 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:38:59 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:38:59 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:38:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:38:59 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:38:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:38:59 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:38:59 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:38:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:38:59 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:38:59 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:38:59 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:38:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:38:59 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:38:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:38:59 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:38:59 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:38:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:38:59 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:38:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:38:59 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:38:59 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:38:59 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-03-30 06:38:59 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-03-30 06:38:59 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-03-30 06:38:59 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-03-30 06:38:59 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-03-30 06:38:59 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-03-30 06:38:59 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-03-30 06:38:59 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-03-30 06:38:59 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-03-30 06:38:59 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-03-30 06:38:59 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 06:38:59 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 06:38:59 [DEBUG] fake_trx.py:317 (BTS@172.18.26.20:5700) Recv FAKE_CI cmd
2025-03-30 06:38:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:38:59 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:38:59 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:38:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:38:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:38:59 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:38:59 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:38:59 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:38:59 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:39:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:39:00 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:39:00 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:39:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:39:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:39:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:39:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:39:00 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:39:00 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:39:00 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:39:00 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:39:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:39:00 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-03-30 06:39:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:39:00 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:39:00 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:39:00 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:39:00 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:39:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:39:00 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:39:00 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:39:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:39:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:39:00 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:39:00 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:39:00 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:39:00 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:39:00 [DEBUG] clck_gen.py:128 IND CLOCK 306
2025-03-30 06:39:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:39:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:39:00 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:39:00 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:39:00 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:39:00 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:39:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:39:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:39:00 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:39:00 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:39:00 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:39:00 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:39:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:39:00 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:39:00 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:39:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:39:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:39:01 [DEBUG] clck_gen.py:128 IND CLOCK 408
2025-03-30 06:39:01 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:39:01 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:39:01 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:39:01 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:39:01 [DEBUG] clck_gen.py:128 IND CLOCK 510
2025-03-30 06:39:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:39:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:39:01 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:39:01 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:39:01 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:39:01 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:39:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:39:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:39:01 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:39:01 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:39:01 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:39:01 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:39:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:39:01 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:39:01 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:39:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:39:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:39:02 [DEBUG] clck_gen.py:128 IND CLOCK 612
2025-03-30 06:39:02 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:39:02 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:39:02 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:39:02 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:39:02 [DEBUG] clck_gen.py:128 IND CLOCK 714
2025-03-30 06:39:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:39:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:39:03 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:39:03 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:39:03 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:39:03 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:39:03 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:39:03 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:39:03 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:39:03 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:39:03 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:39:03 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:39:03 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 06:39:03 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 06:39:03 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 06:39:03 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=791 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:39:03 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=791 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:39:03 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=791 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:39:03 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=791 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:39:03 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=791 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:39:08 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 06:39:08 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 06:39:08 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:39:08 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:39:08 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:39:08 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:39:08 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:39:08 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 06:39:08 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:39:08 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 06:39:08 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 06:39:08 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 06:39:08 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 06:39:08 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 06:39:08 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:39:08 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:39:08 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 06:39:08 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 06:39:08 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 06:39:08 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 06:39:08 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 06:39:08 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 06:39:08 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:39:08 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:39:08 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 06:39:08 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 06:39:08 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 06:39:08 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 06:39:08 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 06:39:08 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 06:39:08 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:39:08 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:39:08 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 06:39:08 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 06:39:08 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 06:39:08 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 06:39:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 06:39:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 06:39:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 06:39:08 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 06:39:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 06:39:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 06:39:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 06:39:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 06:39:08 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 06:39:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:39:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:39:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:39:08 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 06:39:08 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 06:39:08 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 06:39:08 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 06:39:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:39:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:39:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:39:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 06:39:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:39:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:39:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:39:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:39:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:39:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:39:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:39:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:39:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:39:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:39:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:39:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:39:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:39:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:39:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:39:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:39:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:39:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:39:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:39:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:39:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:39:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:39:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:39:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:39:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:39:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:39:08 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-03-30 06:39:08 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-03-30 06:39:08 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-03-30 06:39:08 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-03-30 06:39:08 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-03-30 06:39:08 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-03-30 06:39:08 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-03-30 06:39:08 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-03-30 06:39:08 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-03-30 06:39:08 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-03-30 06:39:08 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=0 bl=148 pwr=0
2025-03-30 06:39:08 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=1 bl=148 pwr=0
2025-03-30 06:39:08 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=2 bl=148 pwr=0
2025-03-30 06:39:08 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=3 bl=148 pwr=0
2025-03-30 06:39:08 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=4 bl=148 pwr=0
2025-03-30 06:39:08 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=5 bl=148 pwr=0
2025-03-30 06:39:08 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=6 bl=148 pwr=0
2025-03-30 06:39:08 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=7 bl=148 pwr=0
2025-03-30 06:39:08 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 06:39:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:39:08 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 06:39:08 [DEBUG] fake_trx.py:317 (BTS@172.18.26.20:5700) Recv FAKE_CI cmd
2025-03-30 06:39:08 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:39:08 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:39:08 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:39:08 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:39:08 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:39:08 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:39:08 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:39:08 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:39:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:39:08 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:39:08 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:39:08 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:39:08 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:39:09 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-03-30 06:39:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:39:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:39:09 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:39:09 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:39:09 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:39:09 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:39:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:39:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:39:09 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:39:09 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:39:09 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:39:09 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:39:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:39:09 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:39:09 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:39:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:39:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:39:09 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:39:09 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:39:09 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:39:09 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:39:09 [DEBUG] clck_gen.py:128 IND CLOCK 306
2025-03-30 06:39:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:39:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:39:09 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:39:09 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:39:09 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:39:09 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:39:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:39:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:39:09 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:39:09 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:39:09 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:39:09 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:39:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:39:09 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:39:09 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:39:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:39:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:39:09 [DEBUG] clck_gen.py:128 IND CLOCK 408
2025-03-30 06:39:10 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:39:10 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:39:10 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:39:10 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:39:10 [DEBUG] clck_gen.py:128 IND CLOCK 510
2025-03-30 06:39:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:39:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:39:10 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:39:10 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:39:10 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:39:10 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:39:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:39:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:39:10 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:39:10 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:39:10 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:39:10 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:39:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:39:10 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:39:10 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:39:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:39:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:39:10 [DEBUG] clck_gen.py:128 IND CLOCK 612
2025-03-30 06:39:11 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:39:11 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:39:11 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:39:11 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:39:11 [DEBUG] clck_gen.py:128 IND CLOCK 714
2025-03-30 06:39:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:39:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:39:11 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:39:11 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:39:11 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:39:11 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:39:11 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:39:11 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:39:11 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:39:11 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:39:11 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:39:11 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:39:11 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 06:39:11 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 06:39:11 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 06:39:11 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=791 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:39:11 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=791 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:39:11 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=791 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:39:11 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=791 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:39:11 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=791 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:39:16 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 06:39:16 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 06:39:16 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:39:16 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:39:16 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:39:16 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:39:16 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:39:16 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 06:39:16 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:39:16 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 06:39:16 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 06:39:16 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 06:39:16 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 06:39:16 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 06:39:16 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:39:16 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:39:16 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 06:39:16 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 06:39:16 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 06:39:16 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 06:39:16 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 06:39:16 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 06:39:16 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:39:16 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:39:16 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 06:39:16 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 06:39:16 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 06:39:16 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 06:39:16 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 06:39:16 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 06:39:16 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:39:16 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:39:16 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 06:39:16 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 06:39:16 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 06:39:16 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 06:39:16 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 06:39:16 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 06:39:16 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 06:39:16 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 06:39:16 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 06:39:16 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 06:39:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 06:39:16 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:39:16 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 06:39:16 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 06:39:16 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:39:16 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:39:16 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 06:39:16 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 06:39:16 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 06:39:16 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 06:39:16 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:39:16 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:39:16 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:39:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 06:39:16 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:39:16 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:39:16 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:39:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:39:16 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:39:16 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:39:16 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:39:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:39:16 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:39:16 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:39:16 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:39:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:39:16 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:39:16 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:39:16 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:39:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:39:16 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:39:16 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:39:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:39:16 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:39:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:39:16 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:39:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:39:16 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:39:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:39:16 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:39:16 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-03-30 06:39:17 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-03-30 06:39:17 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-03-30 06:39:17 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-03-30 06:39:17 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-03-30 06:39:17 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-03-30 06:39:17 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-03-30 06:39:17 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-03-30 06:39:17 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-03-30 06:39:17 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-03-30 06:39:17 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=0 bl=148 pwr=0
2025-03-30 06:39:17 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=1 bl=148 pwr=0
2025-03-30 06:39:17 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=2 bl=148 pwr=0
2025-03-30 06:39:17 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=3 bl=148 pwr=0
2025-03-30 06:39:17 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=4 bl=148 pwr=0
2025-03-30 06:39:17 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=5 bl=148 pwr=0
2025-03-30 06:39:17 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=6 bl=148 pwr=0
2025-03-30 06:39:17 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=7 bl=148 pwr=0
2025-03-30 06:39:17 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 06:39:17 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 06:39:17 [DEBUG] fake_trx.py:317 (BTS@172.18.26.20:5700) Recv FAKE_CI cmd
2025-03-30 06:39:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:39:17 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:39:17 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:39:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:39:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:39:17 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:39:17 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:39:17 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:39:17 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:39:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:39:17 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:39:17 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:39:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:39:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:39:17 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-03-30 06:39:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:39:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:39:17 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:39:17 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:39:17 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:39:17 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:39:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:39:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:39:17 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:39:17 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:39:17 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:39:17 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:39:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:39:17 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:39:17 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:39:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:39:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:39:17 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:39:17 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:39:17 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:39:17 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:39:18 [DEBUG] clck_gen.py:128 IND CLOCK 306
2025-03-30 06:39:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:39:18 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:39:18 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:39:18 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:39:18 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:39:18 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:39:18 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:39:18 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:39:18 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:39:18 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:39:18 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:39:18 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:39:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:39:18 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:39:18 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:39:18 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:39:18 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:39:18 [DEBUG] clck_gen.py:128 IND CLOCK 408
2025-03-30 06:39:18 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:39:18 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:39:18 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:39:18 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:39:19 [DEBUG] clck_gen.py:128 IND CLOCK 510
2025-03-30 06:39:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:39:19 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:39:19 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:39:19 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:39:19 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:39:19 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:39:19 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:39:19 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:39:19 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:39:19 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:39:19 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:39:19 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:39:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:39:19 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:39:19 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:39:19 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:39:19 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:39:19 [DEBUG] clck_gen.py:128 IND CLOCK 612
2025-03-30 06:39:19 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:39:19 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:39:19 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:39:19 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:39:20 [DEBUG] clck_gen.py:128 IND CLOCK 714
2025-03-30 06:39:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:39:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:39:20 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:39:20 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:39:20 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:39:20 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:39:20 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:39:20 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:39:20 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:39:20 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:39:20 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:39:20 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:39:20 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 06:39:20 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 06:39:20 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 06:39:25 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 06:39:25 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 06:39:25 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:39:25 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:39:25 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:39:25 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:39:25 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:39:25 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 06:39:25 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:39:25 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 06:39:25 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 06:39:25 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 06:39:25 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 06:39:25 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 06:39:25 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:39:25 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:39:25 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 06:39:25 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 06:39:25 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 06:39:25 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 06:39:25 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 06:39:25 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 06:39:25 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:39:25 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:39:25 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 06:39:25 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 06:39:25 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 06:39:25 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 06:39:25 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 06:39:25 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 06:39:25 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:39:25 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:39:25 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 06:39:25 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 06:39:25 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 06:39:25 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 06:39:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 06:39:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 06:39:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 06:39:25 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 06:39:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 06:39:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 06:39:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 06:39:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 06:39:25 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 06:39:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:39:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:39:25 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 06:39:25 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 06:39:25 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 06:39:25 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 06:39:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:39:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:39:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:39:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 06:39:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:39:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:39:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:39:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:39:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:39:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:39:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:39:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:39:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:39:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:39:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:39:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:39:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:39:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:39:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:39:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:39:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:39:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:39:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:39:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:39:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:39:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:39:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:39:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:39:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:39:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:39:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:39:25 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-03-30 06:39:25 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-03-30 06:39:25 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=107): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-03-30 06:39:25 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=107): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-03-30 06:39:25 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=107): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-03-30 06:39:25 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=107): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-03-30 06:39:25 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=107): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-03-30 06:39:25 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=107): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-03-30 06:39:25 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=107): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-03-30 06:39:25 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=107): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-03-30 06:39:25 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=107): ver=1 fn=105 tn=0 bl=148 pwr=0
2025-03-30 06:39:25 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=107): ver=1 fn=105 tn=1 bl=148 pwr=0
2025-03-30 06:39:25 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=107): ver=1 fn=105 tn=2 bl=148 pwr=0
2025-03-30 06:39:25 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=107): ver=1 fn=105 tn=3 bl=148 pwr=0
2025-03-30 06:39:25 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=107): ver=1 fn=105 tn=4 bl=148 pwr=0
2025-03-30 06:39:25 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=107): ver=1 fn=105 tn=5 bl=148 pwr=0
2025-03-30 06:39:25 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=107): ver=1 fn=105 tn=6 bl=148 pwr=0
2025-03-30 06:39:25 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=107): ver=1 fn=105 tn=7 bl=148 pwr=0
2025-03-30 06:39:25 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=107): ver=1 fn=106 tn=0 bl=148 pwr=0
2025-03-30 06:39:25 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=107): ver=1 fn=106 tn=1 bl=148 pwr=0
2025-03-30 06:39:25 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=107): ver=1 fn=106 tn=2 bl=148 pwr=0
2025-03-30 06:39:25 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=107): ver=1 fn=106 tn=3 bl=148 pwr=0
2025-03-30 06:39:25 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=107): ver=1 fn=106 tn=4 bl=148 pwr=0
2025-03-30 06:39:25 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=107): ver=1 fn=106 tn=5 bl=148 pwr=0
2025-03-30 06:39:25 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=107): ver=1 fn=106 tn=6 bl=148 pwr=0
2025-03-30 06:39:25 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=107): ver=1 fn=106 tn=7 bl=148 pwr=0
2025-03-30 06:39:25 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 06:39:25 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 06:39:25 [DEBUG] fake_trx.py:317 (BTS@172.18.26.20:5700) Recv FAKE_CI cmd
2025-03-30 06:39:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:39:26 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:39:26 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:39:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:39:26 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:39:26 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:39:26 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:39:26 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:39:26 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:39:26 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:39:26 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:39:26 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:39:26 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 06:39:26 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 06:39:26 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 06:39:31 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 06:39:31 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 06:39:31 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:39:31 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:39:31 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:39:31 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:39:31 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:39:31 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 06:39:31 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:39:31 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 06:39:31 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 06:39:31 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 06:39:31 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 06:39:31 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 06:39:31 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:39:31 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:39:31 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 06:39:31 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 06:39:31 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 06:39:31 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 06:39:31 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 06:39:31 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 06:39:31 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:39:31 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:39:31 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 06:39:31 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 06:39:31 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 06:39:31 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 06:39:31 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 06:39:31 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 06:39:31 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:39:31 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:39:31 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 06:39:31 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 06:39:31 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 06:39:31 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 06:39:31 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 06:39:31 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 06:39:31 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 06:39:31 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 06:39:31 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 06:39:31 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 06:39:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 06:39:31 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:39:31 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 06:39:31 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 06:39:31 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:39:31 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:39:31 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 06:39:31 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 06:39:31 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 06:39:31 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 06:39:31 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:39:31 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:39:31 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:39:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 06:39:31 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:39:31 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:39:31 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:39:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:39:31 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:39:31 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:39:31 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:39:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:39:31 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:39:31 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:39:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:39:31 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:39:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:39:31 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:39:31 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:39:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:39:31 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:39:31 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:39:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:39:31 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:39:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:39:31 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:39:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:39:31 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:39:31 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:39:31 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:39:31 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-03-30 06:39:31 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-03-30 06:39:31 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-03-30 06:39:31 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-03-30 06:39:31 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-03-30 06:39:31 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-03-30 06:39:31 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-03-30 06:39:31 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-03-30 06:39:31 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-03-30 06:39:31 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-03-30 06:39:31 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=105 tn=0 bl=148 pwr=0
2025-03-30 06:39:31 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=105 tn=1 bl=148 pwr=0
2025-03-30 06:39:31 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=105 tn=2 bl=148 pwr=0
2025-03-30 06:39:31 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=105 tn=3 bl=148 pwr=0
2025-03-30 06:39:31 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=105 tn=4 bl=148 pwr=0
2025-03-30 06:39:31 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=105 tn=5 bl=148 pwr=0
2025-03-30 06:39:31 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=105 tn=6 bl=148 pwr=0
2025-03-30 06:39:31 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=105 tn=7 bl=148 pwr=0
2025-03-30 06:39:31 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=106 tn=0 bl=148 pwr=0
2025-03-30 06:39:31 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=106 tn=1 bl=148 pwr=0
2025-03-30 06:39:31 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=106 tn=2 bl=148 pwr=0
2025-03-30 06:39:31 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=106 tn=3 bl=148 pwr=0
2025-03-30 06:39:31 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=106 tn=4 bl=148 pwr=0
2025-03-30 06:39:31 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=106 tn=5 bl=148 pwr=0
2025-03-30 06:39:31 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=106 tn=6 bl=148 pwr=0
2025-03-30 06:39:31 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=106 tn=7 bl=148 pwr=0
2025-03-30 06:39:31 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=107 tn=0 bl=148 pwr=0
2025-03-30 06:39:31 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=107 tn=1 bl=148 pwr=0
2025-03-30 06:39:31 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=107 tn=2 bl=148 pwr=0
2025-03-30 06:39:31 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=107 tn=3 bl=148 pwr=0
2025-03-30 06:39:31 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=107 tn=4 bl=148 pwr=0
2025-03-30 06:39:31 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=107 tn=5 bl=148 pwr=0
2025-03-30 06:39:31 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=107 tn=6 bl=148 pwr=0
2025-03-30 06:39:31 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=107 tn=7 bl=148 pwr=0
2025-03-30 06:39:31 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 06:39:31 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 06:39:31 [DEBUG] fake_trx.py:317 (BTS@172.18.26.20:5700) Recv FAKE_CI cmd
2025-03-30 06:39:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:39:31 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:39:31 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:39:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:39:31 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:39:31 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:39:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:39:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:39:31 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:39:31 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:39:31 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:39:31 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:39:31 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:39:31 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:39:31 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:39:31 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:39:31 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 06:39:31 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 06:39:31 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 06:39:31 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=131 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:39:31 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=131 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:39:31 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=131 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:39:31 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=131 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:39:31 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=131 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:39:36 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 06:39:36 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 06:39:36 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:39:36 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:39:36 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:39:36 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:39:36 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:39:36 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 06:39:36 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:39:36 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 06:39:36 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 06:39:36 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 06:39:36 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 06:39:36 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 06:39:36 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:39:36 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 06:39:36 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:39:36 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 06:39:36 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 06:39:36 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 06:39:36 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 06:39:36 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 06:39:36 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:39:36 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 06:39:36 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:39:36 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 06:39:36 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 06:39:36 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 06:39:36 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 06:39:36 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 06:39:36 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:39:36 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 06:39:36 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:39:36 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 06:39:36 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 06:39:36 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 06:39:36 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 06:39:36 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 06:39:36 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 06:39:36 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 06:39:36 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 06:39:36 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 06:39:36 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 06:39:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 06:39:36 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:39:36 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:39:36 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 06:39:36 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:39:36 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:39:36 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:39:36 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 06:39:36 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 06:39:36 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 06:39:36 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 06:39:36 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:39:36 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:39:36 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:39:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 06:39:36 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:39:36 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:39:36 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:39:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:39:36 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:39:36 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:39:36 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:39:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:39:36 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:39:36 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:39:36 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:39:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:39:36 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:39:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:39:36 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:39:36 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:39:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:39:36 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:39:36 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:39:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:39:36 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:39:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:39:36 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:39:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:39:36 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-03-30 06:39:37 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-03-30 06:39:37 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-03-30 06:39:37 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-03-30 06:39:37 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-03-30 06:39:37 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-03-30 06:39:37 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-03-30 06:39:37 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-03-30 06:39:37 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-03-30 06:39:37 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-03-30 06:39:37 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=105 tn=0 bl=148 pwr=0
2025-03-30 06:39:37 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=105 tn=1 bl=148 pwr=0
2025-03-30 06:39:37 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=105 tn=2 bl=148 pwr=0
2025-03-30 06:39:37 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=105 tn=3 bl=148 pwr=0
2025-03-30 06:39:37 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=105 tn=4 bl=148 pwr=0
2025-03-30 06:39:37 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=105 tn=5 bl=148 pwr=0
2025-03-30 06:39:37 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=105 tn=6 bl=148 pwr=0
2025-03-30 06:39:37 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=105 tn=7 bl=148 pwr=0
2025-03-30 06:39:37 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=106 tn=0 bl=148 pwr=0
2025-03-30 06:39:37 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=106 tn=1 bl=148 pwr=0
2025-03-30 06:39:37 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=106 tn=2 bl=148 pwr=0
2025-03-30 06:39:37 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=106 tn=3 bl=148 pwr=0
2025-03-30 06:39:37 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=106 tn=4 bl=148 pwr=0
2025-03-30 06:39:37 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=106 tn=5 bl=148 pwr=0
2025-03-30 06:39:37 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=106 tn=6 bl=148 pwr=0
2025-03-30 06:39:37 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=106 tn=7 bl=148 pwr=0
2025-03-30 06:39:37 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=107 tn=0 bl=148 pwr=0
2025-03-30 06:39:37 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=107 tn=1 bl=148 pwr=0
2025-03-30 06:39:37 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=107 tn=2 bl=148 pwr=0
2025-03-30 06:39:37 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=107 tn=3 bl=148 pwr=0
2025-03-30 06:39:37 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=107 tn=4 bl=148 pwr=0
2025-03-30 06:39:37 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=107 tn=5 bl=148 pwr=0
2025-03-30 06:39:37 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=107 tn=6 bl=148 pwr=0
2025-03-30 06:39:37 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=107 tn=7 bl=148 pwr=0
2025-03-30 06:39:37 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 06:39:37 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 06:39:37 [DEBUG] fake_trx.py:317 (BTS@172.18.26.20:5700) Recv FAKE_CI cmd
2025-03-30 06:39:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:39:37 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:39:37 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:39:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:39:37 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:39:37 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:39:37 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:39:37 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:39:37 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:39:37 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:39:37 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:39:37 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:39:37 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 06:39:37 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 06:39:37 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 06:39:37 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=122 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:39:37 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=122 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:39:37 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=122 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:39:37 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=122 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:39:37 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=122 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:39:37 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=122 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:39:42 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 06:39:42 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 06:39:42 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:39:42 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:39:42 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:39:42 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:39:42 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:39:42 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 06:39:42 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:39:42 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 06:39:42 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 06:39:42 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 06:39:42 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 06:39:42 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 06:39:42 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:39:42 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:39:42 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 06:39:42 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 06:39:42 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 06:39:42 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 06:39:42 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 06:39:42 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 06:39:42 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:39:42 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:39:42 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 06:39:42 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 06:39:42 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 06:39:42 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 06:39:42 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 06:39:42 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 06:39:42 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:39:42 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:39:42 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 06:39:42 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 06:39:42 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 06:39:42 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 06:39:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 06:39:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 06:39:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 06:39:42 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 06:39:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 06:39:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 06:39:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 06:39:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 06:39:42 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 06:39:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:39:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:39:42 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 06:39:42 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 06:39:42 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 06:39:42 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 06:39:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:39:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:39:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:39:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 06:39:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:39:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:39:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:39:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:39:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:39:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:39:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:39:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:39:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:39:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:39:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:39:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:39:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:39:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:39:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:39:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:39:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:39:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:39:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:39:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:39:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:39:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:39:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:39:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:39:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:39:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:39:42 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:39:42 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:39:42 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 06:39:42 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 06:39:42 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 06:39:42 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:39:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:39:47 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 06:39:47 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 06:39:47 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:39:47 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:39:47 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:39:47 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:39:47 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:39:47 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 06:39:47 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:39:47 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 06:39:47 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 06:39:47 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 06:39:47 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 06:39:47 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 06:39:47 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:39:47 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:39:47 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 06:39:47 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 06:39:47 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 06:39:47 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 06:39:47 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 06:39:47 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 06:39:47 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:39:47 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:39:47 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 06:39:47 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 06:39:47 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 06:39:47 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 06:39:47 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 06:39:47 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 06:39:47 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:39:47 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:39:47 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 06:39:47 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 06:39:47 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 06:39:47 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 06:39:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 06:39:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 06:39:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 06:39:47 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 06:39:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 06:39:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 06:39:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 06:39:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:39:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 06:39:47 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 06:39:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:39:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:39:47 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 06:39:47 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 06:39:47 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 06:39:47 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 06:39:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:39:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:39:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:39:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 06:39:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:39:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:39:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:39:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:39:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:39:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:39:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:39:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:39:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:39:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:39:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:39:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:39:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:39:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:39:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:39:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:39:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:39:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:39:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:39:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:39:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:39:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:39:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:39:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:39:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:39:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:39:47 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-03-30 06:39:47 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-03-30 06:39:47 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=107): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-03-30 06:39:47 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=107): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-03-30 06:39:47 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=107): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-03-30 06:39:47 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=107): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-03-30 06:39:47 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=107): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-03-30 06:39:47 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=107): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-03-30 06:39:47 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=107): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-03-30 06:39:47 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=107): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-03-30 06:39:47 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=107): ver=1 fn=105 tn=0 bl=148 pwr=0
2025-03-30 06:39:47 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=107): ver=1 fn=105 tn=1 bl=148 pwr=0
2025-03-30 06:39:47 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=107): ver=1 fn=105 tn=2 bl=148 pwr=0
2025-03-30 06:39:47 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=107): ver=1 fn=105 tn=3 bl=148 pwr=0
2025-03-30 06:39:47 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=107): ver=1 fn=105 tn=4 bl=148 pwr=0
2025-03-30 06:39:47 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=107): ver=1 fn=105 tn=5 bl=148 pwr=0
2025-03-30 06:39:47 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=107): ver=1 fn=105 tn=6 bl=148 pwr=0
2025-03-30 06:39:47 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=107): ver=1 fn=105 tn=7 bl=148 pwr=0
2025-03-30 06:39:47 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=107): ver=1 fn=106 tn=0 bl=148 pwr=0
2025-03-30 06:39:47 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=107): ver=1 fn=106 tn=1 bl=148 pwr=0
2025-03-30 06:39:47 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=107): ver=1 fn=106 tn=2 bl=148 pwr=0
2025-03-30 06:39:47 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=107): ver=1 fn=106 tn=3 bl=148 pwr=0
2025-03-30 06:39:47 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=107): ver=1 fn=106 tn=4 bl=148 pwr=0
2025-03-30 06:39:47 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=107): ver=1 fn=106 tn=5 bl=148 pwr=0
2025-03-30 06:39:47 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=107): ver=1 fn=106 tn=6 bl=148 pwr=0
2025-03-30 06:39:47 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=107): ver=1 fn=106 tn=7 bl=148 pwr=0
2025-03-30 06:39:47 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 06:39:47 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 06:39:47 [DEBUG] fake_trx.py:317 (BTS@172.18.26.20:5700) Recv FAKE_CI cmd
2025-03-30 06:39:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:39:47 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:39:47 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:39:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:39:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:39:47 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:39:47 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:39:47 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:39:47 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:39:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:39:47 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:39:47 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:39:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:39:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:39:48 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-03-30 06:39:48 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:39:48 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:39:48 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:39:48 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:39:48 [DEBUG] clck_gen.py:128 IND CLOCK 306
2025-03-30 06:39:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:39:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:39:48 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:39:48 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:39:48 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:39:48 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:39:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:39:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:39:48 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:39:48 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:39:48 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:39:48 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:39:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:39:48 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:39:48 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:39:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:39:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:39:49 [DEBUG] clck_gen.py:128 IND CLOCK 408
2025-03-30 06:39:49 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:39:49 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:39:49 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:39:49 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:39:49 [DEBUG] clck_gen.py:128 IND CLOCK 510
2025-03-30 06:39:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:39:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:39:49 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:39:49 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:39:49 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:39:49 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:39:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:39:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:39:49 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:39:49 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:39:49 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:39:49 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:39:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:39:49 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:39:49 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:39:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:39:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:39:50 [DEBUG] clck_gen.py:128 IND CLOCK 612
2025-03-30 06:39:50 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:39:50 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:39:50 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:39:50 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:39:50 [DEBUG] clck_gen.py:128 IND CLOCK 714
2025-03-30 06:39:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:39:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:39:50 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:39:50 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:39:50 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:39:50 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:39:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:39:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:39:50 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:39:50 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:39:50 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:39:50 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:39:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:39:50 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:39:50 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:39:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:39:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:39:51 [DEBUG] clck_gen.py:128 IND CLOCK 816
2025-03-30 06:39:51 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:39:51 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:39:51 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:39:51 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:39:51 [DEBUG] clck_gen.py:128 IND CLOCK 918
2025-03-30 06:39:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:39:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:39:51 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:39:51 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:39:51 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:39:51 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:39:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:39:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:39:51 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:39:51 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:39:51 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:39:51 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:39:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:39:51 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:39:51 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:39:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:39:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:39:52 [DEBUG] clck_gen.py:128 IND CLOCK 1020
2025-03-30 06:39:52 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:39:52 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:39:52 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:39:52 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:39:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:39:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:39:52 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:39:52 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:39:52 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:39:52 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:39:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:39:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:39:52 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:39:52 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:39:52 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:39:52 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:39:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:39:52 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:39:52 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:39:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:39:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:39:52 [DEBUG] clck_gen.py:128 IND CLOCK 1122
2025-03-30 06:39:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:39:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:39:52 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:39:52 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:39:52 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:39:52 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:39:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:39:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:39:52 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:39:52 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:39:52 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:39:52 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:39:52 [DEBUG] clck_gen.py:128 IND CLOCK 1224
2025-03-30 06:39:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:39:53 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:39:53 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:39:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:39:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:39:53 [DEBUG] clck_gen.py:128 IND CLOCK 1326
2025-03-30 06:39:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:39:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:39:53 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:39:53 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:39:53 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:39:53 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:39:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:39:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:39:53 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:39:53 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:39:53 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:39:53 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:39:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:39:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:39:53 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:39:53 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:39:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:39:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:39:53 [DEBUG] clck_gen.py:128 IND CLOCK 1428
2025-03-30 06:39:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:39:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:39:54 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:39:54 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:39:54 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:39:54 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:39:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:39:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:39:54 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:39:54 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:39:54 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:39:54 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:39:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:39:54 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:39:54 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:39:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:39:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:39:54 [DEBUG] clck_gen.py:128 IND CLOCK 1530
2025-03-30 06:39:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:39:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:39:54 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:39:54 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:39:54 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:39:54 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:39:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:39:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:39:54 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:39:54 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:39:54 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:39:54 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:39:54 [DEBUG] clck_gen.py:128 IND CLOCK 1632
2025-03-30 06:39:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:39:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:39:54 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:39:54 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:39:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:39:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:39:55 [DEBUG] clck_gen.py:128 IND CLOCK 1734
2025-03-30 06:39:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:39:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:39:55 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:39:55 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:39:55 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:39:55 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:39:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:39:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:39:55 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:39:55 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:39:55 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:39:55 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:39:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:39:55 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:39:55 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:39:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:39:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:39:55 [DEBUG] clck_gen.py:128 IND CLOCK 1836
2025-03-30 06:39:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:39:56 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:39:56 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:39:56 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:39:56 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:39:56 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:39:56 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:39:56 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:39:56 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:39:56 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:39:56 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:39:56 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:39:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:39:56 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:39:56 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:39:56 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:39:56 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:39:56 [DEBUG] clck_gen.py:128 IND CLOCK 1938
2025-03-30 06:39:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:39:56 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:39:56 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:39:56 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:39:56 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:39:56 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:39:56 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:39:56 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:39:56 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:39:56 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:39:56 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:39:56 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:39:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:39:56 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:39:56 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:39:56 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:39:56 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:39:56 [DEBUG] clck_gen.py:128 IND CLOCK 2040
2025-03-30 06:39:57 [DEBUG] clck_gen.py:128 IND CLOCK 2142
2025-03-30 06:39:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:39:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:39:57 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:39:57 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:39:57 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:39:57 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:39:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:39:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:39:57 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:39:57 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:39:57 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:39:57 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:39:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:39:57 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:39:57 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:39:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:39:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:39:57 [DEBUG] clck_gen.py:128 IND CLOCK 2244
2025-03-30 06:39:58 [DEBUG] clck_gen.py:128 IND CLOCK 2346
2025-03-30 06:39:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:39:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:39:58 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:39:58 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:39:58 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:39:58 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:39:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:39:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:39:58 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:39:58 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:39:58 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:39:58 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:39:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:39:58 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:39:58 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:39:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:39:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:39:58 [DEBUG] clck_gen.py:128 IND CLOCK 2448
2025-03-30 06:39:59 [DEBUG] clck_gen.py:128 IND CLOCK 2550
2025-03-30 06:39:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:39:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:39:59 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:39:59 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:39:59 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:39:59 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:39:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:39:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:39:59 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:39:59 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:39:59 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:39:59 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:39:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:39:59 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:39:59 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:39:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:39:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:39:59 [DEBUG] clck_gen.py:128 IND CLOCK 2652
2025-03-30 06:40:00 [DEBUG] clck_gen.py:128 IND CLOCK 2754
2025-03-30 06:40:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:40:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:40:00 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:40:00 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:40:00 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:40:00 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:40:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:40:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:40:00 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:40:00 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:40:00 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:40:00 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:40:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:40:00 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:40:00 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:40:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:40:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:40:00 [DEBUG] clck_gen.py:128 IND CLOCK 2856
2025-03-30 06:40:01 [DEBUG] clck_gen.py:128 IND CLOCK 2958
2025-03-30 06:40:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:40:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:40:01 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:40:01 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:40:01 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:40:01 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:40:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:40:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:40:01 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:40:01 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:40:01 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:40:01 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:40:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:40:01 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:40:01 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:40:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:40:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:40:01 [DEBUG] clck_gen.py:128 IND CLOCK 3060
2025-03-30 06:40:01 [DEBUG] clck_gen.py:128 IND CLOCK 3162
2025-03-30 06:40:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:40:02 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:40:02 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:40:02 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:40:02 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:40:02 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:40:02 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:40:02 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:40:02 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:40:02 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:40:02 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:40:02 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:40:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:40:02 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:40:02 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:40:02 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:40:02 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:40:02 [DEBUG] clck_gen.py:128 IND CLOCK 3264
2025-03-30 06:40:02 [DEBUG] clck_gen.py:128 IND CLOCK 3366
2025-03-30 06:40:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:40:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:40:03 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:40:03 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:40:03 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:40:03 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:40:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:40:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:40:03 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:40:03 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:40:03 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:40:03 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:40:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:40:03 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:40:03 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:40:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:40:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:40:03 [DEBUG] clck_gen.py:128 IND CLOCK 3468
2025-03-30 06:40:03 [DEBUG] clck_gen.py:128 IND CLOCK 3570
2025-03-30 06:40:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:40:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:40:04 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:40:04 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:40:04 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:40:04 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:40:04 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:40:04 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:40:04 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:40:04 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:40:04 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:40:04 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:40:04 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 06:40:04 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 06:40:04 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 06:40:09 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 06:40:09 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 06:40:09 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:40:09 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:40:09 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:40:09 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:40:09 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:40:09 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 06:40:09 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:40:09 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 06:40:09 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 06:40:09 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 06:40:09 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 06:40:09 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 06:40:09 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:40:09 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 06:40:09 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:40:09 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 06:40:09 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 06:40:09 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 06:40:09 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 06:40:09 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 06:40:09 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:40:09 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 06:40:09 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:40:09 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 06:40:09 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 06:40:09 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 06:40:09 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 06:40:09 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 06:40:09 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:40:09 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:40:09 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 06:40:09 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 06:40:09 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 06:40:09 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 06:40:09 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 06:40:09 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 06:40:09 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 06:40:09 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 06:40:09 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 06:40:09 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 06:40:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 06:40:09 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:40:09 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 06:40:09 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 06:40:09 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:40:09 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:40:09 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 06:40:09 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 06:40:09 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 06:40:09 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 06:40:09 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:40:09 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:40:09 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:40:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 06:40:09 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:40:09 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:40:09 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:40:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:40:09 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:40:09 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:40:09 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:40:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:40:09 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:40:09 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:40:09 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:40:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:40:09 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:40:09 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:40:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:40:09 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:40:09 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:40:09 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:40:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:40:09 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:40:09 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:40:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:40:09 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:40:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:40:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:40:09 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:40:09 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-03-30 06:40:09 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-03-30 06:40:09 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-03-30 06:40:09 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-03-30 06:40:09 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-03-30 06:40:09 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-03-30 06:40:09 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-03-30 06:40:09 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-03-30 06:40:09 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-03-30 06:40:09 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-03-30 06:40:09 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=105 tn=0 bl=148 pwr=0
2025-03-30 06:40:09 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=105 tn=1 bl=148 pwr=0
2025-03-30 06:40:09 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=105 tn=2 bl=148 pwr=0
2025-03-30 06:40:09 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=105 tn=3 bl=148 pwr=0
2025-03-30 06:40:09 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=105 tn=4 bl=148 pwr=0
2025-03-30 06:40:09 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=105 tn=5 bl=148 pwr=0
2025-03-30 06:40:09 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=105 tn=6 bl=148 pwr=0
2025-03-30 06:40:09 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=105 tn=7 bl=148 pwr=0
2025-03-30 06:40:09 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=106 tn=0 bl=148 pwr=0
2025-03-30 06:40:09 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=106 tn=1 bl=148 pwr=0
2025-03-30 06:40:09 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=106 tn=2 bl=148 pwr=0
2025-03-30 06:40:09 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=106 tn=3 bl=148 pwr=0
2025-03-30 06:40:09 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=106 tn=4 bl=148 pwr=0
2025-03-30 06:40:09 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=106 tn=5 bl=148 pwr=0
2025-03-30 06:40:09 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=106 tn=6 bl=148 pwr=0
2025-03-30 06:40:09 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=106 tn=7 bl=148 pwr=0
2025-03-30 06:40:09 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=107 tn=0 bl=148 pwr=0
2025-03-30 06:40:09 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=107 tn=1 bl=148 pwr=0
2025-03-30 06:40:09 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=107 tn=2 bl=148 pwr=0
2025-03-30 06:40:09 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=107 tn=3 bl=148 pwr=0
2025-03-30 06:40:09 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=107 tn=4 bl=148 pwr=0
2025-03-30 06:40:09 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=107 tn=5 bl=148 pwr=0
2025-03-30 06:40:09 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=107 tn=6 bl=148 pwr=0
2025-03-30 06:40:09 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=107 tn=7 bl=148 pwr=0
2025-03-30 06:40:09 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 06:40:09 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 06:40:09 [DEBUG] fake_trx.py:317 (BTS@172.18.26.20:5700) Recv FAKE_CI cmd
2025-03-30 06:40:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:40:09 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:40:09 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:40:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:40:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:40:09 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:40:09 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:40:09 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:40:09 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:40:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:40:09 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:40:09 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:40:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:40:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:40:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:40:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:40:10 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:40:10 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:40:10 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:40:10 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:40:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:40:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:40:10 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:40:10 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:40:10 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:40:10 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:40:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:40:10 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:40:10 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:40:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:40:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:40:10 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-03-30 06:40:10 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:40:10 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:40:10 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:40:10 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:40:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:40:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:40:10 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:40:10 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:40:10 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:40:10 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:40:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:40:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:40:10 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:40:10 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:40:10 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:40:10 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:40:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:40:10 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:40:10 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:40:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:40:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:40:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:40:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:40:10 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:40:10 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:40:10 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:40:10 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:40:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:40:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:40:10 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:40:10 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:40:10 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:40:10 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:40:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:40:10 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:40:10 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:40:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:40:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:40:10 [DEBUG] clck_gen.py:128 IND CLOCK 306
2025-03-30 06:40:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:40:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:40:10 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:40:10 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:40:10 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:40:10 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:40:10 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:40:10 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:40:10 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:40:10 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:40:10 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:40:10 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 06:40:10 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 06:40:10 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 06:40:10 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:40:15 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 06:40:15 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 06:40:15 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:40:15 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:40:15 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:40:15 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:40:15 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:40:15 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 06:40:15 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:40:15 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 06:40:15 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 06:40:15 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 06:40:15 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 06:40:15 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 06:40:15 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:40:15 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:40:15 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 06:40:15 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 06:40:15 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 06:40:15 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 06:40:15 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 06:40:15 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 06:40:15 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:40:15 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 06:40:15 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:40:15 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 06:40:15 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 06:40:15 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 06:40:15 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 06:40:15 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 06:40:15 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:40:15 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 06:40:15 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:40:15 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 06:40:15 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 06:40:15 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 06:40:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 06:40:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 06:40:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 06:40:15 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 06:40:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 06:40:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 06:40:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 06:40:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:40:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 06:40:15 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 06:40:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:40:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:40:15 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 06:40:15 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 06:40:15 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 06:40:15 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 06:40:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:40:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:40:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:40:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 06:40:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:40:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:40:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:40:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:40:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:40:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:40:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:40:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:40:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:40:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:40:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:40:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:40:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:40:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:40:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:40:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:40:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:40:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:40:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:40:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:40:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:40:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:40:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:40:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:40:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:40:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:40:15 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-03-30 06:40:16 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-03-30 06:40:16 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-03-30 06:40:16 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-03-30 06:40:16 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-03-30 06:40:16 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-03-30 06:40:16 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-03-30 06:40:16 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-03-30 06:40:16 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-03-30 06:40:16 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-03-30 06:40:16 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=0 bl=148 pwr=0
2025-03-30 06:40:16 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=1 bl=148 pwr=0
2025-03-30 06:40:16 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=2 bl=148 pwr=0
2025-03-30 06:40:16 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=3 bl=148 pwr=0
2025-03-30 06:40:16 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=4 bl=148 pwr=0
2025-03-30 06:40:16 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=5 bl=148 pwr=0
2025-03-30 06:40:16 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=6 bl=148 pwr=0
2025-03-30 06:40:16 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=7 bl=148 pwr=0
2025-03-30 06:40:16 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-03-30 06:40:17 [DEBUG] clck_gen.py:128 IND CLOCK 306
2025-03-30 06:40:17 [DEBUG] clck_gen.py:128 IND CLOCK 408
2025-03-30 06:40:18 [DEBUG] clck_gen.py:128 IND CLOCK 510
2025-03-30 06:40:18 [DEBUG] clck_gen.py:128 IND CLOCK 612
2025-03-30 06:40:19 [DEBUG] clck_gen.py:128 IND CLOCK 714
2025-03-30 06:40:19 [DEBUG] clck_gen.py:128 IND CLOCK 816
2025-03-30 06:40:20 [DEBUG] clck_gen.py:128 IND CLOCK 918
2025-03-30 06:40:20 [DEBUG] clck_gen.py:128 IND CLOCK 1020
2025-03-30 06:40:21 [DEBUG] clck_gen.py:128 IND CLOCK 1122
2025-03-30 06:40:21 [DEBUG] clck_gen.py:128 IND CLOCK 1224
2025-03-30 06:40:22 [DEBUG] clck_gen.py:128 IND CLOCK 1326
2025-03-30 06:40:22 [DEBUG] clck_gen.py:128 IND CLOCK 1428
2025-03-30 06:40:22 [DEBUG] clck_gen.py:128 IND CLOCK 1530
2025-03-30 06:40:23 [DEBUG] clck_gen.py:128 IND CLOCK 1632
2025-03-30 06:40:23 [DEBUG] clck_gen.py:128 IND CLOCK 1734
2025-03-30 06:40:24 [DEBUG] clck_gen.py:128 IND CLOCK 1836
2025-03-30 06:40:24 [DEBUG] clck_gen.py:128 IND CLOCK 1938
2025-03-30 06:40:25 [DEBUG] clck_gen.py:128 IND CLOCK 2040
2025-03-30 06:40:25 [DEBUG] clck_gen.py:128 IND CLOCK 2142
2025-03-30 06:40:26 [DEBUG] clck_gen.py:128 IND CLOCK 2244
2025-03-30 06:40:26 [DEBUG] clck_gen.py:128 IND CLOCK 2346
2025-03-30 06:40:27 [DEBUG] clck_gen.py:128 IND CLOCK 2448
2025-03-30 06:40:27 [DEBUG] clck_gen.py:128 IND CLOCK 2550
2025-03-30 06:40:28 [DEBUG] clck_gen.py:128 IND CLOCK 2652
2025-03-30 06:40:28 [DEBUG] clck_gen.py:128 IND CLOCK 2754
2025-03-30 06:40:29 [DEBUG] clck_gen.py:128 IND CLOCK 2856
2025-03-30 06:40:29 [DEBUG] clck_gen.py:128 IND CLOCK 2958
2025-03-30 06:40:30 [DEBUG] clck_gen.py:128 IND CLOCK 3060
2025-03-30 06:40:30 [DEBUG] clck_gen.py:128 IND CLOCK 3162
2025-03-30 06:40:30 [DEBUG] clck_gen.py:128 IND CLOCK 3264
2025-03-30 06:40:31 [DEBUG] clck_gen.py:128 IND CLOCK 3366
2025-03-30 06:40:31 [DEBUG] clck_gen.py:128 IND CLOCK 3468
2025-03-30 06:40:32 [DEBUG] clck_gen.py:128 IND CLOCK 3570
2025-03-30 06:40:32 [DEBUG] clck_gen.py:128 IND CLOCK 3672
2025-03-30 06:40:33 [DEBUG] clck_gen.py:128 IND CLOCK 3774
2025-03-30 06:40:33 [DEBUG] clck_gen.py:128 IND CLOCK 3876
2025-03-30 06:40:34 [DEBUG] clck_gen.py:128 IND CLOCK 3978
2025-03-30 06:40:34 [DEBUG] clck_gen.py:128 IND CLOCK 4080
2025-03-30 06:40:35 [DEBUG] clck_gen.py:128 IND CLOCK 4182
2025-03-30 06:40:35 [DEBUG] clck_gen.py:128 IND CLOCK 4284
2025-03-30 06:40:36 [DEBUG] clck_gen.py:128 IND CLOCK 4386
2025-03-30 06:40:36 [DEBUG] clck_gen.py:128 IND CLOCK 4488
2025-03-30 06:40:37 [DEBUG] clck_gen.py:128 IND CLOCK 4590
2025-03-30 06:40:37 [DEBUG] clck_gen.py:128 IND CLOCK 4692
2025-03-30 06:40:38 [DEBUG] clck_gen.py:128 IND CLOCK 4794
2025-03-30 06:40:38 [DEBUG] clck_gen.py:128 IND CLOCK 4896
2025-03-30 06:40:38 [DEBUG] clck_gen.py:128 IND CLOCK 4998
2025-03-30 06:40:39 [DEBUG] clck_gen.py:128 IND CLOCK 5100
2025-03-30 06:40:39 [DEBUG] clck_gen.py:128 IND CLOCK 5202
2025-03-30 06:40:39 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:40:39 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:40:39 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:40:39 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:40:39 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 06:40:39 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 06:40:39 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 06:40:44 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 06:40:44 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 06:40:44 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:40:44 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:40:44 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:40:44 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:40:44 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:40:44 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 06:40:44 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:40:44 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 06:40:44 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 06:40:44 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 06:40:44 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 06:40:44 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 06:40:44 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:40:44 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:40:44 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 06:40:44 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 06:40:44 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 06:40:44 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 06:40:44 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 06:40:44 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 06:40:44 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:40:44 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:40:44 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 06:40:44 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 06:40:44 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 06:40:44 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 06:40:44 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 06:40:44 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 06:40:44 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:40:44 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:40:44 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 06:40:44 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 06:40:44 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 06:40:44 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 06:40:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 06:40:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 06:40:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 06:40:44 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 06:40:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 06:40:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 06:40:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 06:40:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 06:40:44 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 06:40:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:40:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:40:44 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 06:40:44 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 06:40:44 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 06:40:44 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 06:40:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:40:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:40:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:40:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 06:40:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:40:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:40:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:40:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:40:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:40:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:40:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:40:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:40:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:40:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:40:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:40:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:40:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:40:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:40:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:40:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:40:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:40:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:40:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:40:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:40:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:40:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:40:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:40:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:40:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:40:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:40:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:40:44 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-03-30 06:40:45 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-03-30 06:40:45 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-03-30 06:40:45 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-03-30 06:40:45 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-03-30 06:40:45 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-03-30 06:40:45 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-03-30 06:40:45 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-03-30 06:40:45 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-03-30 06:40:45 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-03-30 06:40:45 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=0 bl=148 pwr=0
2025-03-30 06:40:45 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=1 bl=148 pwr=0
2025-03-30 06:40:45 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=2 bl=148 pwr=0
2025-03-30 06:40:45 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=3 bl=148 pwr=0
2025-03-30 06:40:45 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=4 bl=148 pwr=0
2025-03-30 06:40:45 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=5 bl=148 pwr=0
2025-03-30 06:40:45 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=6 bl=148 pwr=0
2025-03-30 06:40:45 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=7 bl=148 pwr=0
2025-03-30 06:40:45 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-03-30 06:40:46 [DEBUG] clck_gen.py:128 IND CLOCK 306
2025-03-30 06:40:46 [DEBUG] clck_gen.py:128 IND CLOCK 408
2025-03-30 06:40:47 [DEBUG] clck_gen.py:128 IND CLOCK 510
2025-03-30 06:40:47 [DEBUG] clck_gen.py:128 IND CLOCK 612
2025-03-30 06:40:48 [DEBUG] clck_gen.py:128 IND CLOCK 714
2025-03-30 06:40:48 [DEBUG] clck_gen.py:128 IND CLOCK 816
2025-03-30 06:40:49 [DEBUG] clck_gen.py:128 IND CLOCK 918
2025-03-30 06:40:49 [DEBUG] clck_gen.py:128 IND CLOCK 1020
2025-03-30 06:40:50 [DEBUG] clck_gen.py:128 IND CLOCK 1122
2025-03-30 06:40:50 [DEBUG] clck_gen.py:128 IND CLOCK 1224
2025-03-30 06:40:51 [DEBUG] clck_gen.py:128 IND CLOCK 1326
2025-03-30 06:40:51 [DEBUG] clck_gen.py:128 IND CLOCK 1428
2025-03-30 06:40:52 [DEBUG] clck_gen.py:128 IND CLOCK 1530
2025-03-30 06:40:52 [DEBUG] clck_gen.py:128 IND CLOCK 1632
2025-03-30 06:40:52 [DEBUG] clck_gen.py:128 IND CLOCK 1734
2025-03-30 06:40:53 [DEBUG] clck_gen.py:128 IND CLOCK 1836
2025-03-30 06:40:53 [DEBUG] clck_gen.py:128 IND CLOCK 1938
2025-03-30 06:40:54 [DEBUG] clck_gen.py:128 IND CLOCK 2040
2025-03-30 06:40:54 [DEBUG] clck_gen.py:128 IND CLOCK 2142
2025-03-30 06:40:55 [DEBUG] clck_gen.py:128 IND CLOCK 2244
2025-03-30 06:40:55 [DEBUG] clck_gen.py:128 IND CLOCK 2346
2025-03-30 06:40:56 [DEBUG] clck_gen.py:128 IND CLOCK 2448
2025-03-30 06:40:56 [DEBUG] clck_gen.py:128 IND CLOCK 2550
2025-03-30 06:40:57 [DEBUG] clck_gen.py:128 IND CLOCK 2652
2025-03-30 06:40:57 [DEBUG] clck_gen.py:128 IND CLOCK 2754
2025-03-30 06:40:58 [DEBUG] clck_gen.py:128 IND CLOCK 2856
2025-03-30 06:40:58 [DEBUG] clck_gen.py:128 IND CLOCK 2958
2025-03-30 06:40:59 [DEBUG] clck_gen.py:128 IND CLOCK 3060
2025-03-30 06:40:59 [DEBUG] clck_gen.py:128 IND CLOCK 3162
2025-03-30 06:41:00 [DEBUG] clck_gen.py:128 IND CLOCK 3264
2025-03-30 06:41:00 [DEBUG] clck_gen.py:128 IND CLOCK 3366
2025-03-30 06:41:00 [DEBUG] clck_gen.py:128 IND CLOCK 3468
2025-03-30 06:41:01 [DEBUG] clck_gen.py:128 IND CLOCK 3570
2025-03-30 06:41:01 [DEBUG] clck_gen.py:128 IND CLOCK 3672
2025-03-30 06:41:02 [DEBUG] clck_gen.py:128 IND CLOCK 3774
2025-03-30 06:41:02 [DEBUG] clck_gen.py:128 IND CLOCK 3876
2025-03-30 06:41:03 [DEBUG] clck_gen.py:128 IND CLOCK 3978
2025-03-30 06:41:03 [DEBUG] clck_gen.py:128 IND CLOCK 4080
2025-03-30 06:41:04 [DEBUG] clck_gen.py:128 IND CLOCK 4182
2025-03-30 06:41:04 [DEBUG] clck_gen.py:128 IND CLOCK 4284
2025-03-30 06:41:05 [DEBUG] clck_gen.py:128 IND CLOCK 4386
2025-03-30 06:41:05 [DEBUG] clck_gen.py:128 IND CLOCK 4488
2025-03-30 06:41:06 [DEBUG] clck_gen.py:128 IND CLOCK 4590
2025-03-30 06:41:06 [DEBUG] clck_gen.py:128 IND CLOCK 4692
2025-03-30 06:41:07 [DEBUG] clck_gen.py:128 IND CLOCK 4794
2025-03-30 06:41:07 [DEBUG] clck_gen.py:128 IND CLOCK 4896
2025-03-30 06:41:08 [DEBUG] clck_gen.py:128 IND CLOCK 4998
2025-03-30 06:41:08 [DEBUG] clck_gen.py:128 IND CLOCK 5100
2025-03-30 06:41:08 [DEBUG] clck_gen.py:128 IND CLOCK 5202
2025-03-30 06:41:09 [DEBUG] clck_gen.py:128 IND CLOCK 5304
2025-03-30 06:41:09 [DEBUG] clck_gen.py:128 IND CLOCK 5406
2025-03-30 06:41:10 [DEBUG] clck_gen.py:128 IND CLOCK 5508
2025-03-30 06:41:10 [DEBUG] clck_gen.py:128 IND CLOCK 5610
2025-03-30 06:41:11 [DEBUG] clck_gen.py:128 IND CLOCK 5712
2025-03-30 06:41:11 [DEBUG] clck_gen.py:128 IND CLOCK 5814
2025-03-30 06:41:12 [DEBUG] clck_gen.py:128 IND CLOCK 5916
2025-03-30 06:41:12 [DEBUG] clck_gen.py:128 IND CLOCK 6018
2025-03-30 06:41:13 [DEBUG] clck_gen.py:128 IND CLOCK 6120
2025-03-30 06:41:13 [DEBUG] clck_gen.py:128 IND CLOCK 6222
2025-03-30 06:41:14 [DEBUG] clck_gen.py:128 IND CLOCK 6324
2025-03-30 06:41:14 [DEBUG] clck_gen.py:128 IND CLOCK 6426
2025-03-30 06:41:15 [DEBUG] clck_gen.py:128 IND CLOCK 6528
2025-03-30 06:41:15 [DEBUG] clck_gen.py:128 IND CLOCK 6630
2025-03-30 06:41:16 [DEBUG] clck_gen.py:128 IND CLOCK 6732
2025-03-30 06:41:16 [DEBUG] clck_gen.py:128 IND CLOCK 6834
2025-03-30 06:41:16 [DEBUG] clck_gen.py:128 IND CLOCK 6936
2025-03-30 06:41:17 [DEBUG] clck_gen.py:128 IND CLOCK 7038
2025-03-30 06:41:17 [DEBUG] clck_gen.py:128 IND CLOCK 7140
2025-03-30 06:41:18 [DEBUG] clck_gen.py:128 IND CLOCK 7242
2025-03-30 06:41:18 [DEBUG] clck_gen.py:128 IND CLOCK 7344
2025-03-30 06:41:19 [DEBUG] clck_gen.py:128 IND CLOCK 7446
2025-03-30 06:41:19 [DEBUG] clck_gen.py:128 IND CLOCK 7548
2025-03-30 06:41:20 [DEBUG] clck_gen.py:128 IND CLOCK 7650
2025-03-30 06:41:20 [DEBUG] clck_gen.py:128 IND CLOCK 7752
2025-03-30 06:41:21 [DEBUG] clck_gen.py:128 IND CLOCK 7854
2025-03-30 06:41:21 [DEBUG] clck_gen.py:128 IND CLOCK 7956
2025-03-30 06:41:21 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:41:22 [DEBUG] clck_gen.py:128 IND CLOCK 8058
2025-03-30 06:41:22 [DEBUG] clck_gen.py:128 IND CLOCK 8160
2025-03-30 06:41:23 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:41:23 [DEBUG] clck_gen.py:128 IND CLOCK 8262
2025-03-30 06:41:23 [DEBUG] clck_gen.py:128 IND CLOCK 8364
2025-03-30 06:41:24 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:41:24 [DEBUG] clck_gen.py:128 IND CLOCK 8466
2025-03-30 06:41:24 [DEBUG] clck_gen.py:128 IND CLOCK 8568
2025-03-30 06:41:24 [DEBUG] clck_gen.py:128 IND CLOCK 8670
2025-03-30 06:41:25 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:41:25 [DEBUG] clck_gen.py:128 IND CLOCK 8772
2025-03-30 06:41:25 [DEBUG] clck_gen.py:128 IND CLOCK 8874
2025-03-30 06:41:26 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:41:26 [DEBUG] clck_gen.py:128 IND CLOCK 8976
2025-03-30 06:41:26 [DEBUG] clck_gen.py:128 IND CLOCK 9078
2025-03-30 06:41:27 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:41:27 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:41:27 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:41:27 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:41:27 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:41:27 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 06:41:27 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 06:41:27 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 06:41:32 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 06:41:32 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 06:41:32 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:41:32 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:41:32 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:41:32 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:41:32 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:41:32 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 06:41:32 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:41:32 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 06:41:32 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 06:41:32 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 06:41:32 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 06:41:32 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 06:41:32 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:41:32 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:41:32 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 06:41:32 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 06:41:32 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 06:41:32 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 06:41:32 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 06:41:32 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 06:41:32 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:41:32 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:41:32 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 06:41:32 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 06:41:32 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 06:41:32 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 06:41:32 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 06:41:32 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 06:41:32 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:41:32 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:41:32 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 06:41:32 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 06:41:32 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 06:41:32 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 06:41:32 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 06:41:32 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 06:41:32 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 06:41:32 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 06:41:32 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 06:41:32 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 06:41:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 06:41:32 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:41:32 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 06:41:32 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 06:41:32 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:41:32 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:41:32 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 06:41:32 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 06:41:32 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 06:41:32 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 06:41:32 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:41:32 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:41:32 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:41:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 06:41:32 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:41:32 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:41:32 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:41:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:41:32 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:41:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:41:32 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:41:32 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:41:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:41:32 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:41:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:41:32 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:41:32 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:41:32 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:41:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:41:32 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:41:32 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:41:32 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:41:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:41:32 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:41:32 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:41:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:41:32 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:41:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:41:32 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:41:32 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:41:32 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-03-30 06:41:32 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-03-30 06:41:32 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-03-30 06:41:32 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-03-30 06:41:32 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-03-30 06:41:32 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-03-30 06:41:32 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-03-30 06:41:32 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-03-30 06:41:32 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-03-30 06:41:32 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-03-30 06:41:32 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=105 tn=0 bl=148 pwr=0
2025-03-30 06:41:32 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=105 tn=1 bl=148 pwr=0
2025-03-30 06:41:32 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=105 tn=2 bl=148 pwr=0
2025-03-30 06:41:32 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=105 tn=3 bl=148 pwr=0
2025-03-30 06:41:32 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=105 tn=4 bl=148 pwr=0
2025-03-30 06:41:32 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=105 tn=5 bl=148 pwr=0
2025-03-30 06:41:32 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=105 tn=6 bl=148 pwr=0
2025-03-30 06:41:32 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=105 tn=7 bl=148 pwr=0
2025-03-30 06:41:32 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=106 tn=0 bl=148 pwr=0
2025-03-30 06:41:32 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=106 tn=1 bl=148 pwr=0
2025-03-30 06:41:32 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=106 tn=2 bl=148 pwr=0
2025-03-30 06:41:32 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=106 tn=3 bl=148 pwr=0
2025-03-30 06:41:32 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=106 tn=4 bl=148 pwr=0
2025-03-30 06:41:32 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=106 tn=5 bl=148 pwr=0
2025-03-30 06:41:32 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=106 tn=6 bl=148 pwr=0
2025-03-30 06:41:32 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=106 tn=7 bl=148 pwr=0
2025-03-30 06:41:32 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=107 tn=0 bl=148 pwr=0
2025-03-30 06:41:32 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=107 tn=1 bl=148 pwr=0
2025-03-30 06:41:32 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=107 tn=2 bl=148 pwr=0
2025-03-30 06:41:32 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=107 tn=3 bl=148 pwr=0
2025-03-30 06:41:32 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=107 tn=4 bl=148 pwr=0
2025-03-30 06:41:32 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=107 tn=5 bl=148 pwr=0
2025-03-30 06:41:32 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=107 tn=6 bl=148 pwr=0
2025-03-30 06:41:32 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=107 tn=7 bl=148 pwr=0
2025-03-30 06:41:32 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 06:41:32 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 06:41:32 [DEBUG] fake_trx.py:317 (BTS@172.18.26.20:5700) Recv FAKE_CI cmd
2025-03-30 06:41:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:41:32 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:41:32 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:41:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:41:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:41:32 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:41:32 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:41:32 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:41:32 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:41:32 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 06:41:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:41:32 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:41:32 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:41:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:41:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:41:32 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-03-30 06:41:33 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:41:33 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:41:33 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:41:33 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:41:33 [DEBUG] clck_gen.py:128 IND CLOCK 306
2025-03-30 06:41:33 [DEBUG] clck_gen.py:128 IND CLOCK 408
2025-03-30 06:41:34 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:41:34 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:41:34 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:41:34 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:41:34 [DEBUG] clck_gen.py:128 IND CLOCK 510
2025-03-30 06:41:34 [DEBUG] clck_gen.py:128 IND CLOCK 612
2025-03-30 06:41:35 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:41:35 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:41:35 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:41:35 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:41:35 [DEBUG] clck_gen.py:128 IND CLOCK 714
2025-03-30 06:41:35 [DEBUG] clck_gen.py:128 IND CLOCK 816
2025-03-30 06:41:36 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:41:36 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:41:36 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:41:36 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:41:36 [DEBUG] clck_gen.py:128 IND CLOCK 918
2025-03-30 06:41:36 [DEBUG] clck_gen.py:128 IND CLOCK 1020
2025-03-30 06:41:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:41:36 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:41:36 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:41:36 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:41:36 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:41:36 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:41:36 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:41:36 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:41:36 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:41:36 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:41:36 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:41:36 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:41:36 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 06:41:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:41:36 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:41:36 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:41:36 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:41:36 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:41:37 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:41:37 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:41:37 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:41:37 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:41:37 [DEBUG] clck_gen.py:128 IND CLOCK 1122
2025-03-30 06:41:37 [DEBUG] clck_gen.py:128 IND CLOCK 1224
2025-03-30 06:41:38 [DEBUG] clck_gen.py:128 IND CLOCK 1326
2025-03-30 06:41:38 [DEBUG] clck_gen.py:128 IND CLOCK 1428
2025-03-30 06:41:39 [DEBUG] clck_gen.py:128 IND CLOCK 1530
2025-03-30 06:41:39 [DEBUG] clck_gen.py:128 IND CLOCK 1632
2025-03-30 06:41:40 [DEBUG] clck_gen.py:128 IND CLOCK 1734
2025-03-30 06:41:40 [DEBUG] clck_gen.py:128 IND CLOCK 1836
2025-03-30 06:41:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:41:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:41:40 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:41:40 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:41:40 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:41:40 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:41:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:41:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:41:40 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:41:40 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:41:40 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:41:40 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:41:40 [DEBUG] clck_gen.py:128 IND CLOCK 1938
2025-03-30 06:41:41 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 06:41:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:41:41 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:41:41 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:41:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:41:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:41:41 [DEBUG] clck_gen.py:128 IND CLOCK 2040
2025-03-30 06:41:41 [DEBUG] clck_gen.py:128 IND CLOCK 2142
2025-03-30 06:41:42 [DEBUG] clck_gen.py:128 IND CLOCK 2244
2025-03-30 06:41:42 [DEBUG] clck_gen.py:128 IND CLOCK 2346
2025-03-30 06:41:43 [DEBUG] clck_gen.py:128 IND CLOCK 2448
2025-03-30 06:41:43 [DEBUG] clck_gen.py:128 IND CLOCK 2550
2025-03-30 06:41:44 [DEBUG] clck_gen.py:128 IND CLOCK 2652
2025-03-30 06:41:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:41:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:41:44 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:41:44 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:41:44 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:41:44 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:41:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:41:44 [DEBUG] clck_gen.py:128 IND CLOCK 2754
2025-03-30 06:41:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:41:44 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:41:44 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:41:44 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:41:44 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:41:44 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 06:41:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:41:44 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:41:44 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:41:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:41:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:41:45 [DEBUG] clck_gen.py:128 IND CLOCK 2856
2025-03-30 06:41:45 [DEBUG] clck_gen.py:128 IND CLOCK 2958
2025-03-30 06:41:46 [DEBUG] clck_gen.py:128 IND CLOCK 3060
2025-03-30 06:41:46 [DEBUG] clck_gen.py:128 IND CLOCK 3162
2025-03-30 06:41:47 [DEBUG] clck_gen.py:128 IND CLOCK 3264
2025-03-30 06:41:47 [DEBUG] clck_gen.py:128 IND CLOCK 3366
2025-03-30 06:41:48 [DEBUG] clck_gen.py:128 IND CLOCK 3468
2025-03-30 06:41:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:41:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:41:48 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:41:48 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:41:48 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:41:48 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:41:48 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:41:48 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:41:48 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:41:48 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:41:48 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:41:48 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:41:48 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 06:41:48 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 06:41:48 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 06:41:53 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 06:41:53 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 06:41:53 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:41:53 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:41:53 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:41:53 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:41:53 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:41:53 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 06:41:53 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:41:53 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 06:41:53 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 06:41:53 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 06:41:53 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 06:41:53 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 06:41:53 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:41:53 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 06:41:53 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:41:53 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 06:41:53 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 06:41:53 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 06:41:53 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 06:41:53 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 06:41:53 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:41:53 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 06:41:53 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:41:53 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 06:41:53 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 06:41:53 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 06:41:53 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 06:41:53 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 06:41:53 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:41:53 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:41:53 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 06:41:53 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 06:41:53 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 06:41:53 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 06:41:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 06:41:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 06:41:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 06:41:53 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 06:41:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 06:41:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 06:41:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 06:41:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:41:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 06:41:53 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 06:41:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:41:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:41:53 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 06:41:53 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 06:41:53 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 06:41:53 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 06:41:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:41:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:41:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:41:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 06:41:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:41:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:41:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:41:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:41:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:41:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:41:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:41:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:41:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:41:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:41:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:41:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:41:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:41:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:41:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:41:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:41:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:41:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:41:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:41:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:41:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:41:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:41:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:41:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:41:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:41:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:41:53 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-03-30 06:41:53 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-03-30 06:41:53 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-03-30 06:41:53 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-03-30 06:41:53 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-03-30 06:41:53 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-03-30 06:41:53 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-03-30 06:41:53 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-03-30 06:41:53 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-03-30 06:41:53 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-03-30 06:41:53 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 06:41:53 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 06:41:53 [DEBUG] fake_trx.py:317 (BTS@172.18.26.20:5700) Recv FAKE_CI cmd
2025-03-30 06:41:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:41:53 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:41:53 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:41:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:41:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:41:53 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:41:53 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:41:53 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:41:53 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:41:54 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 06:41:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:41:54 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:41:54 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:41:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:41:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:41:54 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-03-30 06:41:54 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 06:41:54 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:41:54 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:41:54 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:41:54 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:41:54 [DEBUG] clck_gen.py:128 IND CLOCK 306
2025-03-30 06:41:54 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 06:41:55 [DEBUG] clck_gen.py:128 IND CLOCK 408
2025-03-30 06:41:55 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 06:41:55 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:41:55 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:41:55 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:41:55 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:41:55 [DEBUG] clck_gen.py:128 IND CLOCK 510
2025-03-30 06:41:55 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 06:41:56 [DEBUG] clck_gen.py:128 IND CLOCK 612
2025-03-30 06:41:56 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 06:41:56 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:41:56 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:41:56 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:41:56 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:41:56 [DEBUG] clck_gen.py:128 IND CLOCK 714
2025-03-30 06:41:56 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 06:41:57 [DEBUG] clck_gen.py:128 IND CLOCK 816
2025-03-30 06:41:57 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 06:41:57 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:41:57 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:41:57 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:41:57 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:41:57 [DEBUG] clck_gen.py:128 IND CLOCK 918
2025-03-30 06:41:57 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 06:41:58 [DEBUG] clck_gen.py:128 IND CLOCK 1020
2025-03-30 06:41:58 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 06:41:58 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:41:58 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:41:58 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:41:58 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:41:58 [DEBUG] clck_gen.py:128 IND CLOCK 1122
2025-03-30 06:41:58 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 06:41:59 [DEBUG] clck_gen.py:128 IND CLOCK 1224
2025-03-30 06:41:59 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 06:41:59 [DEBUG] clck_gen.py:128 IND CLOCK 1326
2025-03-30 06:41:59 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 06:42:00 [DEBUG] clck_gen.py:128 IND CLOCK 1428
2025-03-30 06:42:00 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 06:42:00 [DEBUG] clck_gen.py:128 IND CLOCK 1530
2025-03-30 06:42:00 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 06:42:01 [DEBUG] clck_gen.py:128 IND CLOCK 1632
2025-03-30 06:42:01 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 06:42:01 [DEBUG] clck_gen.py:128 IND CLOCK 1734
2025-03-30 06:42:01 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 06:42:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:42:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:42:01 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:42:01 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:42:01 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:42:01 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:42:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:42:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:42:01 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:42:01 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:42:01 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:42:01 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:42:01 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 06:42:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:42:01 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:42:01 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:42:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:42:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:42:01 [DEBUG] clck_gen.py:128 IND CLOCK 1836
2025-03-30 06:42:02 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 06:42:02 [DEBUG] clck_gen.py:128 IND CLOCK 1938
2025-03-30 06:42:02 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 06:42:02 [DEBUG] clck_gen.py:128 IND CLOCK 2040
2025-03-30 06:42:03 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 06:42:03 [DEBUG] clck_gen.py:128 IND CLOCK 2142
2025-03-30 06:42:03 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 06:42:03 [DEBUG] clck_gen.py:128 IND CLOCK 2244
2025-03-30 06:42:04 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 06:42:04 [DEBUG] clck_gen.py:128 IND CLOCK 2346
2025-03-30 06:42:04 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 06:42:04 [DEBUG] clck_gen.py:128 IND CLOCK 2448
2025-03-30 06:42:05 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 06:42:05 [DEBUG] clck_gen.py:128 IND CLOCK 2550
2025-03-30 06:42:05 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 06:42:05 [DEBUG] clck_gen.py:128 IND CLOCK 2652
2025-03-30 06:42:06 [DEBUG] clck_gen.py:128 IND CLOCK 2754
2025-03-30 06:42:06 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 06:42:06 [DEBUG] clck_gen.py:128 IND CLOCK 2856
2025-03-30 06:42:06 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 06:42:07 [DEBUG] clck_gen.py:128 IND CLOCK 2958
2025-03-30 06:42:07 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 06:42:07 [DEBUG] clck_gen.py:128 IND CLOCK 3060
2025-03-30 06:42:07 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 06:42:08 [DEBUG] clck_gen.py:128 IND CLOCK 3162
2025-03-30 06:42:08 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 06:42:08 [DEBUG] clck_gen.py:128 IND CLOCK 3264
2025-03-30 06:42:08 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 06:42:09 [DEBUG] clck_gen.py:128 IND CLOCK 3366
2025-03-30 06:42:09 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 06:42:09 [DEBUG] clck_gen.py:128 IND CLOCK 3468
2025-03-30 06:42:09 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 06:42:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:42:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:42:09 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:42:09 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:42:09 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:42:09 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:42:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:42:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:42:09 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:42:09 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:42:09 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:42:09 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:42:09 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 06:42:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:42:09 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:42:09 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:42:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:42:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:42:09 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 06:42:09 [DEBUG] clck_gen.py:128 IND CLOCK 3570
2025-03-30 06:42:10 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 06:42:10 [DEBUG] clck_gen.py:128 IND CLOCK 3672
2025-03-30 06:42:10 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 06:42:10 [DEBUG] clck_gen.py:128 IND CLOCK 3774
2025-03-30 06:42:11 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 06:42:11 [DEBUG] clck_gen.py:128 IND CLOCK 3876
2025-03-30 06:42:11 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 06:42:11 [DEBUG] clck_gen.py:128 IND CLOCK 3978
2025-03-30 06:42:12 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 06:42:12 [DEBUG] clck_gen.py:128 IND CLOCK 4080
2025-03-30 06:42:12 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 06:42:12 [DEBUG] clck_gen.py:128 IND CLOCK 4182
2025-03-30 06:42:13 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 06:42:13 [DEBUG] clck_gen.py:128 IND CLOCK 4284
2025-03-30 06:42:13 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 06:42:13 [DEBUG] clck_gen.py:128 IND CLOCK 4386
2025-03-30 06:42:14 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 06:42:14 [DEBUG] clck_gen.py:128 IND CLOCK 4488
2025-03-30 06:42:14 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 06:42:14 [DEBUG] clck_gen.py:128 IND CLOCK 4590
2025-03-30 06:42:15 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 06:42:15 [DEBUG] clck_gen.py:128 IND CLOCK 4692
2025-03-30 06:42:15 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 06:42:15 [DEBUG] clck_gen.py:128 IND CLOCK 4794
2025-03-30 06:42:16 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 06:42:16 [DEBUG] clck_gen.py:128 IND CLOCK 4896
2025-03-30 06:42:16 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 06:42:16 [DEBUG] clck_gen.py:128 IND CLOCK 4998
2025-03-30 06:42:16 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 06:42:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:42:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:42:16 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:42:16 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:42:16 [WARNING] transceiver.py:287 (MS@172.18.26.22:6700) RX TRXD message (fn=5098 tn=7 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:42:17 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:42:17 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:42:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:42:17 [DEBUG] clck_gen.py:128 IND CLOCK 5100
2025-03-30 06:42:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:42:17 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:42:17 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:42:17 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:42:17 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:42:17 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 06:42:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:42:17 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:42:17 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:42:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:42:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:42:17 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 06:42:17 [DEBUG] clck_gen.py:128 IND CLOCK 5202
2025-03-30 06:42:17 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 06:42:17 [DEBUG] clck_gen.py:128 IND CLOCK 5304
2025-03-30 06:42:18 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 06:42:18 [DEBUG] clck_gen.py:128 IND CLOCK 5406
2025-03-30 06:42:18 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 06:42:18 [DEBUG] clck_gen.py:128 IND CLOCK 5508
2025-03-30 06:42:19 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 06:42:19 [DEBUG] clck_gen.py:128 IND CLOCK 5610
2025-03-30 06:42:19 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 06:42:19 [DEBUG] clck_gen.py:128 IND CLOCK 5712
2025-03-30 06:42:20 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 06:42:20 [DEBUG] clck_gen.py:128 IND CLOCK 5814
2025-03-30 06:42:20 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 06:42:20 [DEBUG] clck_gen.py:128 IND CLOCK 5916
2025-03-30 06:42:21 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 06:42:21 [DEBUG] clck_gen.py:128 IND CLOCK 6018
2025-03-30 06:42:21 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 06:42:21 [DEBUG] clck_gen.py:128 IND CLOCK 6120
2025-03-30 06:42:22 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 06:42:22 [DEBUG] clck_gen.py:128 IND CLOCK 6222
2025-03-30 06:42:22 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 06:42:22 [DEBUG] clck_gen.py:128 IND CLOCK 6324
2025-03-30 06:42:23 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 06:42:23 [DEBUG] clck_gen.py:128 IND CLOCK 6426
2025-03-30 06:42:23 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 06:42:23 [DEBUG] clck_gen.py:128 IND CLOCK 6528
2025-03-30 06:42:24 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 06:42:24 [DEBUG] clck_gen.py:128 IND CLOCK 6630
2025-03-30 06:42:24 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 06:42:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:42:24 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:42:24 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:42:24 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:42:24 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:42:24 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:42:24 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:42:24 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:42:24 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:42:24 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:42:24 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:42:24 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:42:24 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 06:42:24 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 06:42:24 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 06:42:29 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 06:42:29 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 06:42:29 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:42:29 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:42:29 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:42:29 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:42:29 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:42:29 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 06:42:29 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:42:29 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 06:42:29 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 06:42:29 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 06:42:29 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 06:42:29 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 06:42:29 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:42:29 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:42:29 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 06:42:29 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 06:42:29 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 06:42:29 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 06:42:29 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 06:42:29 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 06:42:29 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:42:29 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:42:29 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 06:42:29 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 06:42:29 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 06:42:29 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 06:42:29 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 06:42:29 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 06:42:29 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:42:29 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:42:29 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 06:42:29 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 06:42:29 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 06:42:29 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 06:42:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 06:42:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 06:42:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 06:42:29 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 06:42:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 06:42:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 06:42:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 06:42:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:42:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 06:42:29 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 06:42:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:42:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:42:29 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 06:42:29 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 06:42:29 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 06:42:29 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 06:42:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:42:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:42:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:42:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 06:42:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:42:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:42:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:42:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:42:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:42:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:42:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:42:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:42:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:42:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:42:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:42:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:42:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:42:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:42:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:42:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:42:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:42:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:42:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:42:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:42:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:42:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:42:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:42:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:42:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:42:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:42:29 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-03-30 06:42:30 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-03-30 06:42:30 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-03-30 06:42:30 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-03-30 06:42:30 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-03-30 06:42:30 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-03-30 06:42:30 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-03-30 06:42:30 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-03-30 06:42:30 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-03-30 06:42:30 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-03-30 06:42:30 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=0 bl=148 pwr=0
2025-03-30 06:42:30 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=1 bl=148 pwr=0
2025-03-30 06:42:30 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=2 bl=148 pwr=0
2025-03-30 06:42:30 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=3 bl=148 pwr=0
2025-03-30 06:42:30 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=4 bl=148 pwr=0
2025-03-30 06:42:30 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=5 bl=148 pwr=0
2025-03-30 06:42:30 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=6 bl=148 pwr=0
2025-03-30 06:42:30 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=7 bl=148 pwr=0
2025-03-30 06:42:30 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 06:42:30 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 06:42:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:42:30 [DEBUG] fake_trx.py:317 (BTS@172.18.26.20:5700) Recv FAKE_CI cmd
2025-03-30 06:42:30 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:42:30 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:42:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:42:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:42:30 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:42:30 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:42:30 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:42:30 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:42:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:42:30 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:42:30 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:42:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:42:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:42:30 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-03-30 06:42:30 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:42:30 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:42:30 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:42:30 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:42:30 [DEBUG] clck_gen.py:128 IND CLOCK 306
2025-03-30 06:42:31 [DEBUG] clck_gen.py:128 IND CLOCK 408
2025-03-30 06:42:31 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:42:31 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:42:31 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:42:31 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:42:31 [DEBUG] clck_gen.py:128 IND CLOCK 510
2025-03-30 06:42:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:42:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:42:32 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:42:32 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:42:32 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:42:32 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:42:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:42:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:42:32 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:42:32 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:42:32 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:42:32 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:42:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:42:32 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:42:32 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:42:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:42:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:42:32 [DEBUG] clck_gen.py:128 IND CLOCK 612
2025-03-30 06:42:32 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:42:32 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:42:32 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:42:32 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:42:32 [DEBUG] clck_gen.py:128 IND CLOCK 714
2025-03-30 06:42:33 [DEBUG] clck_gen.py:128 IND CLOCK 816
2025-03-30 06:42:33 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:42:33 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:42:33 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:42:33 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:42:33 [DEBUG] clck_gen.py:128 IND CLOCK 918
2025-03-30 06:42:34 [DEBUG] clck_gen.py:128 IND CLOCK 1020
2025-03-30 06:42:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:42:34 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:42:34 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:42:34 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:42:34 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:42:34 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:42:34 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:42:34 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:42:34 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:42:34 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:42:34 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:42:34 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:42:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:42:34 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:42:34 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:42:34 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:42:34 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:42:34 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:42:34 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:42:34 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:42:34 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:42:34 [DEBUG] clck_gen.py:128 IND CLOCK 1122
2025-03-30 06:42:35 [DEBUG] clck_gen.py:128 IND CLOCK 1224
2025-03-30 06:42:35 [DEBUG] clck_gen.py:128 IND CLOCK 1326
2025-03-30 06:42:36 [DEBUG] clck_gen.py:128 IND CLOCK 1428
2025-03-30 06:42:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:42:36 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:42:36 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:42:36 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:42:36 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:42:36 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:42:36 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:42:36 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:42:36 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:42:36 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:42:36 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 06:42:36 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 06:42:36 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 06:42:36 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=1523 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:42:36 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:42:36 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:42:36 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=1523 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:42:36 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=1523 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:42:36 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=1523 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:42:36 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=1523 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:42:36 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=1523 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:42:36 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=1523 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:42:36 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=1523 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:42:41 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 06:42:41 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 06:42:41 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:42:41 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:42:41 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:42:41 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:42:41 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:42:41 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 06:42:41 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:42:41 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 06:42:41 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 06:42:41 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 06:42:41 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 06:42:41 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 06:42:41 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:42:41 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 06:42:41 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:42:41 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 06:42:41 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 06:42:41 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 06:42:41 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 06:42:41 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 06:42:41 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:42:41 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 06:42:41 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:42:41 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 06:42:41 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 06:42:41 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 06:42:41 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 06:42:41 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 06:42:41 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:42:41 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 06:42:41 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:42:41 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 06:42:41 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 06:42:41 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 06:42:41 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 06:42:41 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 06:42:41 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 06:42:41 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 06:42:41 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 06:42:41 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 06:42:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 06:42:41 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:42:41 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 06:42:41 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 06:42:41 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:42:41 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:42:41 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 06:42:41 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 06:42:41 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 06:42:41 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 06:42:41 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:42:41 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:42:41 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:42:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 06:42:41 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:42:41 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:42:41 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:42:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:42:41 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:42:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:42:41 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:42:41 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:42:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:42:41 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:42:41 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:42:41 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:42:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:42:41 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:42:41 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:42:41 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:42:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:42:41 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:42:41 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:42:41 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:42:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:42:41 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:42:41 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:42:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:42:41 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:42:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:42:41 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-03-30 06:42:42 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-03-30 06:42:42 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-03-30 06:42:42 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-03-30 06:42:42 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-03-30 06:42:42 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-03-30 06:42:42 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-03-30 06:42:42 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-03-30 06:42:42 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-03-30 06:42:42 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-03-30 06:42:42 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=0 bl=148 pwr=0
2025-03-30 06:42:42 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=1 bl=148 pwr=0
2025-03-30 06:42:42 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=2 bl=148 pwr=0
2025-03-30 06:42:42 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=3 bl=148 pwr=0
2025-03-30 06:42:42 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=4 bl=148 pwr=0
2025-03-30 06:42:42 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=5 bl=148 pwr=0
2025-03-30 06:42:42 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=6 bl=148 pwr=0
2025-03-30 06:42:42 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=7 bl=148 pwr=0
2025-03-30 06:42:42 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 06:42:42 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 06:42:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:42:42 [DEBUG] fake_trx.py:317 (BTS@172.18.26.20:5700) Recv FAKE_CI cmd
2025-03-30 06:42:42 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:42:42 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:42:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:42:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:42:42 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:42:42 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:42:42 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:42:42 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:42:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:42:42 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:42:42 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:42:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:42:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:42:42 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-03-30 06:42:42 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:42:42 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:42:42 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:42:42 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:42:42 [DEBUG] clck_gen.py:128 IND CLOCK 306
2025-03-30 06:42:43 [DEBUG] clck_gen.py:128 IND CLOCK 408
2025-03-30 06:42:43 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:42:43 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:42:43 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:42:43 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:42:43 [DEBUG] clck_gen.py:128 IND CLOCK 510
2025-03-30 06:42:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:42:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:42:44 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:42:44 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:42:44 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:42:44 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:42:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:42:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:42:44 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:42:44 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:42:44 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:42:44 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:42:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:42:44 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:42:44 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:42:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:42:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:42:44 [DEBUG] clck_gen.py:128 IND CLOCK 612
2025-03-30 06:42:44 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:42:44 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:42:44 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:42:44 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:42:44 [DEBUG] clck_gen.py:128 IND CLOCK 714
2025-03-30 06:42:45 [DEBUG] clck_gen.py:128 IND CLOCK 816
2025-03-30 06:42:45 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:42:45 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:42:45 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:42:45 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:42:45 [DEBUG] clck_gen.py:128 IND CLOCK 918
2025-03-30 06:42:46 [DEBUG] clck_gen.py:128 IND CLOCK 1020
2025-03-30 06:42:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:42:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:42:46 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:42:46 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:42:46 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:42:46 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:42:46 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:42:46 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:42:46 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:42:46 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:42:46 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:42:46 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:42:46 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 06:42:46 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 06:42:46 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 06:42:51 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 06:42:51 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 06:42:51 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:42:51 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:42:51 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:42:51 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:42:51 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:42:51 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 06:42:51 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:42:51 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 06:42:51 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 06:42:51 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 06:42:51 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 06:42:51 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 06:42:51 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:42:51 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:42:51 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 06:42:51 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 06:42:51 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 06:42:51 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 06:42:51 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 06:42:51 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 06:42:51 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:42:51 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:42:51 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 06:42:51 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 06:42:51 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 06:42:51 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 06:42:51 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 06:42:51 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 06:42:51 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:42:51 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:42:51 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 06:42:51 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 06:42:51 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 06:42:51 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 06:42:51 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 06:42:51 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 06:42:51 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 06:42:51 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 06:42:51 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 06:42:51 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 06:42:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 06:42:51 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:42:51 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 06:42:51 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 06:42:51 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:42:51 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:42:51 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 06:42:51 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 06:42:51 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 06:42:51 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:42:51 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 06:42:51 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:42:51 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:42:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 06:42:51 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:42:51 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:42:51 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:42:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:42:51 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:42:51 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:42:51 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:42:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:42:51 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:42:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:42:51 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:42:51 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:42:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:42:51 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:42:51 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:42:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:42:51 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:42:51 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:42:51 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:42:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:42:51 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:42:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:42:51 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:42:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:42:51 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:42:51 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:42:51 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-03-30 06:42:51 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-03-30 06:42:51 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-03-30 06:42:51 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-03-30 06:42:51 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-03-30 06:42:51 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-03-30 06:42:51 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-03-30 06:42:51 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-03-30 06:42:51 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-03-30 06:42:51 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-03-30 06:42:51 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=0 bl=148 pwr=0
2025-03-30 06:42:51 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=1 bl=148 pwr=0
2025-03-30 06:42:51 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=2 bl=148 pwr=0
2025-03-30 06:42:51 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=3 bl=148 pwr=0
2025-03-30 06:42:51 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=4 bl=148 pwr=0
2025-03-30 06:42:51 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=5 bl=148 pwr=0
2025-03-30 06:42:51 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=6 bl=148 pwr=0
2025-03-30 06:42:51 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=7 bl=148 pwr=0
2025-03-30 06:42:51 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 06:42:51 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 06:42:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:42:51 [DEBUG] fake_trx.py:317 (BTS@172.18.26.20:5700) Recv FAKE_CI cmd
2025-03-30 06:42:52 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:42:52 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:42:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:42:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:42:52 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:42:52 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:42:52 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:42:52 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:42:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:42:52 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:42:52 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:42:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:42:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:42:52 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-03-30 06:42:52 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:42:52 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:42:52 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:42:52 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:42:52 [DEBUG] clck_gen.py:128 IND CLOCK 306
2025-03-30 06:42:53 [DEBUG] clck_gen.py:128 IND CLOCK 408
2025-03-30 06:42:53 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:42:53 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:42:53 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:42:53 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:42:53 [DEBUG] clck_gen.py:128 IND CLOCK 510
2025-03-30 06:42:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:42:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:42:54 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:42:54 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:42:54 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:42:54 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:42:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:42:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:42:54 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:42:54 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:42:54 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:42:54 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:42:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:42:54 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:42:54 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:42:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:42:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:42:54 [DEBUG] clck_gen.py:128 IND CLOCK 612
2025-03-30 06:42:54 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:42:54 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:42:54 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:42:54 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:42:54 [DEBUG] clck_gen.py:128 IND CLOCK 714
2025-03-30 06:42:55 [DEBUG] clck_gen.py:128 IND CLOCK 816
2025-03-30 06:42:55 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:42:55 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:42:55 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:42:55 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:42:55 [DEBUG] clck_gen.py:128 IND CLOCK 918
2025-03-30 06:42:56 [DEBUG] clck_gen.py:128 IND CLOCK 1020
2025-03-30 06:42:56 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:42:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:42:56 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:42:56 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:42:56 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:42:56 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:42:56 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:42:56 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:42:56 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:42:56 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:42:56 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:42:56 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:42:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:42:56 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:42:56 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:42:56 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:42:56 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:42:56 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:42:56 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:42:56 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:42:56 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:42:56 [DEBUG] clck_gen.py:128 IND CLOCK 1122
2025-03-30 06:42:57 [DEBUG] clck_gen.py:128 IND CLOCK 1224
2025-03-30 06:42:57 [DEBUG] clck_gen.py:128 IND CLOCK 1326
2025-03-30 06:42:58 [DEBUG] clck_gen.py:128 IND CLOCK 1428
2025-03-30 06:42:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:42:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:42:58 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:42:58 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:42:58 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:42:58 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:42:58 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:42:58 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:42:58 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:42:58 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:42:58 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:42:58 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:42:58 [DEBUG] clck_gen.py:128 IND CLOCK 1530
2025-03-30 06:42:58 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 06:42:58 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 06:42:58 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 06:42:58 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=1533 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:42:58 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=1533 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:42:58 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=1533 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:42:58 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=1533 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:42:58 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=1533 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:42:58 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=1533 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:42:58 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=1533 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:42:58 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=1533 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:43:03 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 06:43:03 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 06:43:03 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:43:03 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:43:03 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:43:03 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:43:03 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:43:03 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 06:43:03 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:43:03 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 06:43:03 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 06:43:03 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 06:43:03 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 06:43:03 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 06:43:03 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:43:03 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:43:03 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 06:43:03 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 06:43:03 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 06:43:03 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 06:43:03 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 06:43:03 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 06:43:03 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:43:03 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:43:03 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 06:43:03 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 06:43:03 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 06:43:03 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 06:43:03 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 06:43:03 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 06:43:03 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:43:03 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:43:03 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 06:43:03 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 06:43:03 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 06:43:03 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 06:43:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 06:43:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 06:43:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 06:43:03 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 06:43:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 06:43:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 06:43:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 06:43:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:43:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 06:43:03 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 06:43:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:43:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:43:03 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 06:43:03 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 06:43:03 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 06:43:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:43:03 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 06:43:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:43:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:43:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 06:43:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:43:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:43:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:43:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:43:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:43:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:43:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:43:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:43:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:43:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:43:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:43:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:43:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:43:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:43:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:43:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:43:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:43:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:43:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:43:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:43:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:43:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:43:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:43:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:43:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:43:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:43:03 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-03-30 06:43:04 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-03-30 06:43:04 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-03-30 06:43:04 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-03-30 06:43:04 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-03-30 06:43:04 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-03-30 06:43:04 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-03-30 06:43:04 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-03-30 06:43:04 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-03-30 06:43:04 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-03-30 06:43:04 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=0 bl=148 pwr=0
2025-03-30 06:43:04 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=1 bl=148 pwr=0
2025-03-30 06:43:04 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=2 bl=148 pwr=0
2025-03-30 06:43:04 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=3 bl=148 pwr=0
2025-03-30 06:43:04 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=4 bl=148 pwr=0
2025-03-30 06:43:04 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=5 bl=148 pwr=0
2025-03-30 06:43:04 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=6 bl=148 pwr=0
2025-03-30 06:43:04 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=7 bl=148 pwr=0
2025-03-30 06:43:04 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 06:43:04 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 06:43:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:43:04 [DEBUG] fake_trx.py:317 (BTS@172.18.26.20:5700) Recv FAKE_CI cmd
2025-03-30 06:43:04 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:43:04 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:43:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:43:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:43:04 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:43:04 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:43:04 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:43:04 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:43:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:43:04 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:43:04 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:43:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:43:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:43:04 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-03-30 06:43:04 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:43:04 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:43:04 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:43:04 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:43:04 [DEBUG] clck_gen.py:128 IND CLOCK 306
2025-03-30 06:43:05 [DEBUG] clck_gen.py:128 IND CLOCK 408
2025-03-30 06:43:05 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:43:05 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:43:05 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:43:05 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:43:05 [DEBUG] clck_gen.py:128 IND CLOCK 510
2025-03-30 06:43:05 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=519): ver=1 fn=516 tn=0 bl=148 pwr=0
2025-03-30 06:43:05 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=519): ver=1 fn=516 tn=1 bl=148 pwr=0
2025-03-30 06:43:05 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=519): ver=1 fn=516 tn=2 bl=148 pwr=0
2025-03-30 06:43:05 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=519): ver=1 fn=516 tn=3 bl=148 pwr=0
2025-03-30 06:43:05 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=519): ver=1 fn=516 tn=4 bl=148 pwr=0
2025-03-30 06:43:05 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=519): ver=1 fn=516 tn=5 bl=148 pwr=0
2025-03-30 06:43:05 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=519): ver=1 fn=516 tn=6 bl=148 pwr=0
2025-03-30 06:43:05 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=519): ver=1 fn=516 tn=7 bl=148 pwr=0
2025-03-30 06:43:05 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=519): ver=1 fn=517 tn=0 bl=148 pwr=0
2025-03-30 06:43:05 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=519): ver=1 fn=517 tn=1 bl=148 pwr=0
2025-03-30 06:43:05 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=519): ver=1 fn=517 tn=2 bl=148 pwr=0
2025-03-30 06:43:05 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=519): ver=1 fn=517 tn=3 bl=148 pwr=0
2025-03-30 06:43:05 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=519): ver=1 fn=517 tn=4 bl=148 pwr=0
2025-03-30 06:43:05 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=519): ver=1 fn=517 tn=5 bl=148 pwr=0
2025-03-30 06:43:05 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=519): ver=1 fn=517 tn=6 bl=148 pwr=0
2025-03-30 06:43:05 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=519): ver=1 fn=517 tn=7 bl=148 pwr=0
2025-03-30 06:43:05 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=519): ver=1 fn=518 tn=0 bl=148 pwr=0
2025-03-30 06:43:05 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=519): ver=1 fn=518 tn=1 bl=148 pwr=0
2025-03-30 06:43:05 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=519): ver=1 fn=518 tn=2 bl=148 pwr=0
2025-03-30 06:43:05 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=519): ver=1 fn=518 tn=3 bl=148 pwr=0
2025-03-30 06:43:05 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=519): ver=1 fn=518 tn=4 bl=148 pwr=0
2025-03-30 06:43:05 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=519): ver=1 fn=518 tn=5 bl=148 pwr=0
2025-03-30 06:43:05 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=519): ver=1 fn=518 tn=6 bl=148 pwr=0
2025-03-30 06:43:05 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=519): ver=1 fn=518 tn=7 bl=148 pwr=0
2025-03-30 06:43:06 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:43:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:43:06 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:43:06 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:43:06 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:43:06 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:43:06 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:43:06 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:43:06 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:43:06 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:43:06 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:43:06 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:43:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:43:06 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:43:06 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:43:06 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:43:06 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:43:06 [DEBUG] clck_gen.py:128 IND CLOCK 612
2025-03-30 06:43:06 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:43:06 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:43:06 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:43:06 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:43:06 [DEBUG] clck_gen.py:128 IND CLOCK 714
2025-03-30 06:43:07 [DEBUG] clck_gen.py:128 IND CLOCK 816
2025-03-30 06:43:07 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:43:07 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:43:07 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:43:07 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:43:07 [DEBUG] clck_gen.py:128 IND CLOCK 918
2025-03-30 06:43:08 [DEBUG] clck_gen.py:128 IND CLOCK 1020
2025-03-30 06:43:08 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:43:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:43:08 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:43:08 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:43:08 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:43:08 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:43:08 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:43:08 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:43:08 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:43:08 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:43:08 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:43:08 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:43:08 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 06:43:08 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 06:43:08 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 06:43:08 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=1058 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:43:08 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=1058 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:43:08 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=1058 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:43:08 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=1059 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:43:08 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=1059 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:43:08 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=1059 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:43:08 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=1059 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:43:08 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=1059 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:43:08 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=1059 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:43:08 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=1059 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:43:08 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=1059 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:43:13 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 06:43:13 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 06:43:13 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:43:13 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:43:13 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:43:13 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:43:13 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:43:13 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 06:43:13 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:43:13 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 06:43:13 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 06:43:13 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 06:43:13 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 06:43:13 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 06:43:13 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:43:13 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:43:13 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 06:43:13 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 06:43:13 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 06:43:13 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 06:43:13 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 06:43:13 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 06:43:13 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:43:13 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:43:13 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 06:43:13 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 06:43:13 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 06:43:13 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 06:43:13 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 06:43:13 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 06:43:13 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:43:13 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:43:13 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 06:43:13 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 06:43:13 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 06:43:13 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 06:43:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 06:43:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 06:43:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 06:43:13 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 06:43:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 06:43:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 06:43:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 06:43:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:43:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 06:43:13 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 06:43:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:43:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:43:13 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 06:43:13 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 06:43:13 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 06:43:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:43:13 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 06:43:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:43:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:43:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 06:43:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:43:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:43:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:43:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:43:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:43:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:43:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:43:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:43:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:43:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:43:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:43:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:43:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:43:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:43:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:43:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:43:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:43:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:43:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:43:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:43:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:43:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:43:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:43:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:43:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:43:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:43:13 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-03-30 06:43:13 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-03-30 06:43:13 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-03-30 06:43:13 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-03-30 06:43:13 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-03-30 06:43:13 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-03-30 06:43:13 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-03-30 06:43:13 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-03-30 06:43:13 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-03-30 06:43:13 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-03-30 06:43:13 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=0 bl=148 pwr=0
2025-03-30 06:43:13 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=1 bl=148 pwr=0
2025-03-30 06:43:13 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=2 bl=148 pwr=0
2025-03-30 06:43:13 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=3 bl=148 pwr=0
2025-03-30 06:43:13 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=4 bl=148 pwr=0
2025-03-30 06:43:13 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=5 bl=148 pwr=0
2025-03-30 06:43:13 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=6 bl=148 pwr=0
2025-03-30 06:43:13 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=7 bl=148 pwr=0
2025-03-30 06:43:14 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 06:43:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:43:14 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 06:43:14 [DEBUG] fake_trx.py:317 (BTS@172.18.26.20:5700) Recv FAKE_CI cmd
2025-03-30 06:43:14 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:43:14 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:43:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:43:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:43:14 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:43:14 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:43:14 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:43:14 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:43:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:43:14 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:43:14 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:43:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:43:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:43:14 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-03-30 06:43:14 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:43:14 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:43:14 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:43:14 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:43:14 [DEBUG] clck_gen.py:128 IND CLOCK 306
2025-03-30 06:43:15 [DEBUG] clck_gen.py:128 IND CLOCK 408
2025-03-30 06:43:15 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:43:15 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:43:15 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:43:15 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:43:15 [DEBUG] clck_gen.py:128 IND CLOCK 510
2025-03-30 06:43:16 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=588): ver=1 fn=586 tn=0 bl=148 pwr=0
2025-03-30 06:43:16 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=588): ver=1 fn=586 tn=1 bl=148 pwr=0
2025-03-30 06:43:16 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=588): ver=1 fn=586 tn=2 bl=148 pwr=0
2025-03-30 06:43:16 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=588): ver=1 fn=586 tn=3 bl=148 pwr=0
2025-03-30 06:43:16 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=588): ver=1 fn=586 tn=4 bl=148 pwr=0
2025-03-30 06:43:16 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=588): ver=1 fn=586 tn=5 bl=148 pwr=0
2025-03-30 06:43:16 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=588): ver=1 fn=586 tn=6 bl=148 pwr=0
2025-03-30 06:43:16 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=588): ver=1 fn=586 tn=7 bl=148 pwr=0
2025-03-30 06:43:16 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=588): ver=1 fn=587 tn=0 bl=148 pwr=0
2025-03-30 06:43:16 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=589): ver=1 fn=587 tn=1 bl=148 pwr=0
2025-03-30 06:43:16 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=589): ver=1 fn=587 tn=2 bl=148 pwr=0
2025-03-30 06:43:16 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=589): ver=1 fn=587 tn=3 bl=148 pwr=0
2025-03-30 06:43:16 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=589): ver=1 fn=587 tn=4 bl=148 pwr=0
2025-03-30 06:43:16 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=589): ver=1 fn=587 tn=5 bl=148 pwr=0
2025-03-30 06:43:16 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=589): ver=1 fn=587 tn=6 bl=148 pwr=0
2025-03-30 06:43:16 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=589): ver=1 fn=587 tn=7 bl=148 pwr=0
2025-03-30 06:43:16 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=589): ver=1 fn=588 tn=0 bl=148 pwr=0
2025-03-30 06:43:16 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=589): ver=1 fn=588 tn=1 bl=148 pwr=0
2025-03-30 06:43:16 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=589): ver=1 fn=588 tn=2 bl=148 pwr=0
2025-03-30 06:43:16 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=589): ver=1 fn=588 tn=3 bl=148 pwr=0
2025-03-30 06:43:16 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=589): ver=1 fn=588 tn=4 bl=148 pwr=0
2025-03-30 06:43:16 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=589): ver=1 fn=588 tn=5 bl=148 pwr=0
2025-03-30 06:43:16 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=589): ver=1 fn=588 tn=6 bl=148 pwr=0
2025-03-30 06:43:16 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=589): ver=1 fn=588 tn=7 bl=148 pwr=0
2025-03-30 06:43:16 [DEBUG] clck_gen.py:128 IND CLOCK 612
2025-03-30 06:43:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:43:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:43:16 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:43:16 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:43:16 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:43:16 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:43:16 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:43:16 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:43:16 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:43:16 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:43:16 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:43:16 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:43:16 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 06:43:16 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 06:43:16 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 06:43:16 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=622 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:43:16 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=622 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:43:16 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=622 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:43:16 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=622 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:43:16 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=622 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:43:16 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=622 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:43:21 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 06:43:21 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 06:43:21 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:43:21 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:43:21 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:43:21 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:43:21 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:43:21 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 06:43:21 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:43:21 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 06:43:21 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 06:43:21 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 06:43:21 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 06:43:21 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 06:43:21 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:43:21 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:43:21 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 06:43:21 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 06:43:21 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 06:43:21 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 06:43:21 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 06:43:21 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 06:43:21 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:43:21 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:43:21 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 06:43:21 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 06:43:21 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 06:43:21 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 06:43:21 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 06:43:21 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 06:43:21 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:43:21 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:43:21 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 06:43:21 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 06:43:21 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 06:43:21 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 06:43:21 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 06:43:21 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 06:43:21 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 06:43:21 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 06:43:21 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 06:43:21 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 06:43:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 06:43:21 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:43:21 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 06:43:21 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 06:43:21 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:43:21 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:43:21 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 06:43:21 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 06:43:21 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 06:43:21 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:43:21 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 06:43:21 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:43:21 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:43:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 06:43:21 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:43:21 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:43:21 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:43:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:43:21 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:43:21 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:43:21 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:43:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:43:21 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:43:21 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:43:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:43:21 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:43:21 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:43:21 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:43:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:43:21 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:43:21 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:43:21 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:43:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:43:21 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:43:21 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:43:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:43:21 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:43:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:43:21 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:43:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:43:21 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-03-30 06:43:21 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-03-30 06:43:21 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-03-30 06:43:21 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-03-30 06:43:21 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-03-30 06:43:21 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-03-30 06:43:21 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-03-30 06:43:21 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-03-30 06:43:21 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-03-30 06:43:21 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-03-30 06:43:21 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=105 tn=0 bl=148 pwr=0
2025-03-30 06:43:21 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=105 tn=1 bl=148 pwr=0
2025-03-30 06:43:21 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=105 tn=2 bl=148 pwr=0
2025-03-30 06:43:21 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=105 tn=3 bl=148 pwr=0
2025-03-30 06:43:21 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=105 tn=4 bl=148 pwr=0
2025-03-30 06:43:21 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=105 tn=5 bl=148 pwr=0
2025-03-30 06:43:21 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=105 tn=6 bl=148 pwr=0
2025-03-30 06:43:21 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=105 tn=7 bl=148 pwr=0
2025-03-30 06:43:21 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=106 tn=0 bl=148 pwr=0
2025-03-30 06:43:21 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=106 tn=1 bl=148 pwr=0
2025-03-30 06:43:21 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=106 tn=2 bl=148 pwr=0
2025-03-30 06:43:21 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=106 tn=3 bl=148 pwr=0
2025-03-30 06:43:21 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=106 tn=4 bl=148 pwr=0
2025-03-30 06:43:21 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=106 tn=5 bl=148 pwr=0
2025-03-30 06:43:21 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=106 tn=6 bl=148 pwr=0
2025-03-30 06:43:21 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=106 tn=7 bl=148 pwr=0
2025-03-30 06:43:21 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=107 tn=0 bl=148 pwr=0
2025-03-30 06:43:21 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=107 tn=1 bl=148 pwr=0
2025-03-30 06:43:21 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=107 tn=2 bl=148 pwr=0
2025-03-30 06:43:21 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=107 tn=3 bl=148 pwr=0
2025-03-30 06:43:21 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=107 tn=4 bl=148 pwr=0
2025-03-30 06:43:21 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=107 tn=5 bl=148 pwr=0
2025-03-30 06:43:21 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=107 tn=6 bl=148 pwr=0
2025-03-30 06:43:21 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=107 tn=7 bl=148 pwr=0
2025-03-30 06:43:21 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 06:43:21 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 06:43:21 [DEBUG] fake_trx.py:317 (BTS@172.18.26.20:5700) Recv FAKE_CI cmd
2025-03-30 06:43:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:43:21 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:43:21 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:43:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:43:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:43:21 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:43:21 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:43:21 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:43:21 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:43:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:43:21 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:43:21 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:43:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:43:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:43:22 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-03-30 06:43:22 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:43:22 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:43:22 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:43:22 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:43:22 [DEBUG] clck_gen.py:128 IND CLOCK 306
2025-03-30 06:43:23 [DEBUG] clck_gen.py:128 IND CLOCK 408
2025-03-30 06:43:23 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:43:23 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:43:23 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:43:23 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:43:23 [DEBUG] clck_gen.py:128 IND CLOCK 510
2025-03-30 06:43:24 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:43:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:43:24 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:43:24 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:43:24 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:43:24 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:43:24 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:43:24 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:43:24 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:43:24 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:43:24 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 06:43:24 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 06:43:24 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 06:43:24 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:43:24 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:43:24 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=599 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:43:24 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=599 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:43:24 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=599 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:43:24 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=599 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:43:24 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=599 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:43:24 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=599 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:43:24 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=599 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:43:29 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 06:43:29 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 06:43:29 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:43:29 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:43:29 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:43:29 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:43:29 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:43:29 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 06:43:29 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:43:29 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 06:43:29 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 06:43:29 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 06:43:29 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 06:43:29 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 06:43:29 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:43:29 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:43:29 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 06:43:29 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 06:43:29 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 06:43:29 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 06:43:29 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 06:43:29 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 06:43:29 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:43:29 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:43:29 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 06:43:29 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 06:43:29 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 06:43:29 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 06:43:29 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 06:43:29 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 06:43:29 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:43:29 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:43:29 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 06:43:29 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 06:43:29 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 06:43:29 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 06:43:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 06:43:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 06:43:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 06:43:29 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 06:43:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 06:43:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 06:43:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 06:43:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:43:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 06:43:29 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 06:43:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:43:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:43:29 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 06:43:29 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 06:43:29 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 06:43:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:43:29 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 06:43:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:43:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:43:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 06:43:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:43:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:43:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:43:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:43:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:43:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:43:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:43:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:43:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:43:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:43:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:43:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:43:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:43:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:43:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:43:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:43:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:43:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:43:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:43:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:43:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:43:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:43:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:43:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:43:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:43:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:43:29 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-03-30 06:43:29 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-03-30 06:43:29 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-03-30 06:43:29 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-03-30 06:43:29 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-03-30 06:43:29 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-03-30 06:43:29 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-03-30 06:43:29 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-03-30 06:43:29 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-03-30 06:43:29 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-03-30 06:43:29 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=0 bl=148 pwr=0
2025-03-30 06:43:29 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=1 bl=148 pwr=0
2025-03-30 06:43:29 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=2 bl=148 pwr=0
2025-03-30 06:43:29 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=3 bl=148 pwr=0
2025-03-30 06:43:29 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=4 bl=148 pwr=0
2025-03-30 06:43:29 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=5 bl=148 pwr=0
2025-03-30 06:43:29 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=6 bl=148 pwr=0
2025-03-30 06:43:29 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=7 bl=148 pwr=0
2025-03-30 06:43:29 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 06:43:29 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 06:43:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:43:29 [DEBUG] fake_trx.py:317 (BTS@172.18.26.20:5700) Recv FAKE_CI cmd
2025-03-30 06:43:29 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:43:29 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:43:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:43:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:43:29 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:43:29 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:43:29 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:43:29 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:43:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:43:29 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:43:29 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:43:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:43:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:43:30 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-03-30 06:43:30 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:43:30 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:43:30 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:43:30 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:43:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:43:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:43:30 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:43:30 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:43:30 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:43:30 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:43:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:43:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:43:30 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:43:30 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:43:30 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:43:30 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:43:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:43:30 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:43:30 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:43:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:43:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:43:30 [DEBUG] clck_gen.py:128 IND CLOCK 306
2025-03-30 06:43:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:43:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:43:30 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:43:30 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:43:30 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:43:30 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:43:30 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:43:30 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:43:30 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:43:30 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:43:30 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:43:30 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:43:30 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 06:43:30 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 06:43:30 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 06:43:30 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=330 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:43:30 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=330 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:43:30 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=330 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:43:30 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=330 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:43:30 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=330 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:43:35 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 06:43:35 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 06:43:35 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:43:35 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:43:35 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:43:35 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:43:35 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:43:35 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 06:43:35 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:43:35 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 06:43:35 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 06:43:35 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 06:43:35 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 06:43:35 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 06:43:35 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:43:35 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:43:35 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 06:43:35 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 06:43:35 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 06:43:35 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 06:43:35 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 06:43:35 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 06:43:35 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:43:35 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:43:35 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 06:43:35 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 06:43:35 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 06:43:35 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 06:43:35 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 06:43:35 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 06:43:35 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:43:35 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:43:35 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 06:43:35 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 06:43:35 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 06:43:35 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 06:43:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 06:43:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 06:43:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 06:43:35 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 06:43:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 06:43:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 06:43:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 06:43:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:43:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 06:43:35 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 06:43:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:43:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:43:35 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 06:43:35 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 06:43:35 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 06:43:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:43:35 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 06:43:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:43:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:43:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 06:43:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:43:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:43:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:43:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:43:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:43:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:43:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:43:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:43:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:43:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:43:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:43:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:43:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:43:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:43:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:43:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:43:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:43:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:43:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:43:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:43:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:43:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:43:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:43:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:43:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:43:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:43:35 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-03-30 06:43:36 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-03-30 06:43:36 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-03-30 06:43:36 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-03-30 06:43:36 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-03-30 06:43:36 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-03-30 06:43:36 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-03-30 06:43:36 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-03-30 06:43:36 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-03-30 06:43:36 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-03-30 06:43:36 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=0 bl=148 pwr=0
2025-03-30 06:43:36 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=1 bl=148 pwr=0
2025-03-30 06:43:36 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=2 bl=148 pwr=0
2025-03-30 06:43:36 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=3 bl=148 pwr=0
2025-03-30 06:43:36 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=4 bl=148 pwr=0
2025-03-30 06:43:36 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=5 bl=148 pwr=0
2025-03-30 06:43:36 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=6 bl=148 pwr=0
2025-03-30 06:43:36 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=7 bl=148 pwr=0
2025-03-30 06:43:36 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 06:43:36 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 06:43:36 [DEBUG] fake_trx.py:317 (BTS@172.18.26.20:5700) Recv FAKE_CI cmd
2025-03-30 06:43:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:43:36 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:43:36 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:43:36 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:43:36 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:43:36 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:43:36 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:43:36 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:43:36 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:43:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:43:36 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:43:36 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:43:36 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:43:36 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:43:36 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-03-30 06:43:36 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:43:36 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:43:36 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:43:36 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:43:36 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:43:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:43:36 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:43:36 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:43:36 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:43:36 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:43:36 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:43:36 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:43:36 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:43:36 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:43:36 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:43:36 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:43:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:43:36 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:43:36 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:43:36 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:43:36 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:43:37 [DEBUG] clck_gen.py:128 IND CLOCK 306
2025-03-30 06:43:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:43:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:43:37 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:43:37 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:43:37 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:43:37 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:43:37 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:43:37 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:43:37 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:43:37 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:43:37 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:43:37 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 06:43:37 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 06:43:37 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 06:43:37 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:43:42 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 06:43:42 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 06:43:42 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:43:42 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:43:42 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:43:42 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:43:42 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:43:42 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 06:43:42 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:43:42 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 06:43:42 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 06:43:42 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 06:43:42 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 06:43:42 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 06:43:42 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:43:42 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:43:42 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 06:43:42 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 06:43:42 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 06:43:42 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 06:43:42 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 06:43:42 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 06:43:42 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:43:42 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:43:42 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 06:43:42 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 06:43:42 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 06:43:42 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 06:43:42 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 06:43:42 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 06:43:42 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:43:42 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:43:42 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 06:43:42 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 06:43:42 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 06:43:42 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 06:43:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 06:43:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 06:43:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 06:43:42 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 06:43:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 06:43:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 06:43:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 06:43:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:43:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 06:43:42 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 06:43:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:43:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:43:42 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 06:43:42 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 06:43:42 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 06:43:42 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 06:43:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:43:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:43:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:43:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 06:43:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:43:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:43:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:43:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:43:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:43:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:43:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:43:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:43:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:43:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:43:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:43:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:43:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:43:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:43:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:43:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:43:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:43:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:43:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:43:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:43:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:43:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:43:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:43:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:43:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:43:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:43:42 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-03-30 06:43:42 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-03-30 06:43:42 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-03-30 06:43:42 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-03-30 06:43:42 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-03-30 06:43:42 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-03-30 06:43:42 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-03-30 06:43:42 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-03-30 06:43:42 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-03-30 06:43:42 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-03-30 06:43:42 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=0 bl=148 pwr=0
2025-03-30 06:43:42 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=1 bl=148 pwr=0
2025-03-30 06:43:42 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=2 bl=148 pwr=0
2025-03-30 06:43:42 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=3 bl=148 pwr=0
2025-03-30 06:43:42 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=4 bl=148 pwr=0
2025-03-30 06:43:42 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=5 bl=148 pwr=0
2025-03-30 06:43:42 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=6 bl=148 pwr=0
2025-03-30 06:43:42 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=7 bl=148 pwr=0
2025-03-30 06:43:42 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 06:43:42 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 06:43:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:43:42 [DEBUG] fake_trx.py:317 (BTS@172.18.26.20:5700) Recv FAKE_CI cmd
2025-03-30 06:43:42 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:43:42 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:43:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:43:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:43:42 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:43:42 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:43:42 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:43:42 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:43:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:43:42 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:43:42 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:43:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:43:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:43:43 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-03-30 06:43:43 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:43:43 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:43:43 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:43:43 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:43:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:43:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:43:43 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:43:43 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:43:43 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:43:43 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:43:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:43:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:43:43 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:43:43 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:43:43 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:43:43 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:43:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:43:43 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:43:43 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:43:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:43:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:43:43 [DEBUG] clck_gen.py:128 IND CLOCK 306
2025-03-30 06:43:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:43:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:43:43 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:43:43 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:43:43 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:43:43 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:43:43 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:43:43 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:43:43 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:43:43 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:43:43 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:43:43 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:43:43 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 06:43:43 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 06:43:43 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 06:43:43 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=335 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:43:43 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=335 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:43:43 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=335 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:43:43 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=335 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:43:43 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=335 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:43:43 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=335 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:43:43 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=335 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:43:48 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 06:43:48 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 06:43:48 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:43:48 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:43:48 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:43:48 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:43:48 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:43:48 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 06:43:48 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:43:48 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 06:43:48 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 06:43:48 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 06:43:48 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 06:43:48 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 06:43:48 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:43:48 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:43:48 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 06:43:48 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 06:43:48 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 06:43:48 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 06:43:48 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 06:43:48 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 06:43:48 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:43:48 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:43:48 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 06:43:48 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 06:43:48 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 06:43:48 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 06:43:48 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 06:43:48 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 06:43:48 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:43:48 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:43:48 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 06:43:48 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 06:43:48 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 06:43:48 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 06:43:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 06:43:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 06:43:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 06:43:48 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 06:43:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 06:43:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 06:43:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 06:43:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:43:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 06:43:48 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 06:43:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:43:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:43:48 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 06:43:48 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 06:43:48 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 06:43:48 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 06:43:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:43:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:43:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:43:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 06:43:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:43:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:43:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:43:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:43:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:43:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:43:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:43:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:43:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:43:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:43:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:43:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:43:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:43:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:43:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:43:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:43:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:43:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:43:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:43:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:43:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:43:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:43:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:43:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:43:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:43:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:43:48 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-03-30 06:43:49 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-03-30 06:43:49 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-03-30 06:43:49 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-03-30 06:43:49 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-03-30 06:43:49 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-03-30 06:43:49 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-03-30 06:43:49 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-03-30 06:43:49 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-03-30 06:43:49 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-03-30 06:43:49 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=0 bl=148 pwr=0
2025-03-30 06:43:49 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=1 bl=148 pwr=0
2025-03-30 06:43:49 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=2 bl=148 pwr=0
2025-03-30 06:43:49 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=3 bl=148 pwr=0
2025-03-30 06:43:49 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=4 bl=148 pwr=0
2025-03-30 06:43:49 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=5 bl=148 pwr=0
2025-03-30 06:43:49 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=6 bl=148 pwr=0
2025-03-30 06:43:49 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=7 bl=148 pwr=0
2025-03-30 06:43:49 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 06:43:49 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 06:43:49 [DEBUG] fake_trx.py:317 (BTS@172.18.26.20:5700) Recv FAKE_CI cmd
2025-03-30 06:43:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:43:49 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:43:49 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:43:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:43:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:43:49 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:43:49 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:43:49 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:43:49 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:43:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:43:49 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:43:49 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:43:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:43:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:43:49 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-03-30 06:43:49 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:43:49 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:43:49 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:43:49 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:43:50 [DEBUG] clck_gen.py:128 IND CLOCK 306
2025-03-30 06:43:50 [DEBUG] clck_gen.py:128 IND CLOCK 408
2025-03-30 06:43:50 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:43:50 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:43:50 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:43:50 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:43:51 [DEBUG] clck_gen.py:128 IND CLOCK 510
2025-03-30 06:43:51 [DEBUG] clck_gen.py:128 IND CLOCK 612
2025-03-30 06:43:51 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:43:51 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:43:51 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:43:51 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:43:52 [DEBUG] clck_gen.py:128 IND CLOCK 714
2025-03-30 06:43:52 [DEBUG] clck_gen.py:128 IND CLOCK 816
2025-03-30 06:43:52 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:43:52 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:43:52 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:43:52 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:43:53 [DEBUG] clck_gen.py:128 IND CLOCK 918
2025-03-30 06:43:53 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:43:53 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:43:53 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:43:53 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:43:53 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:43:53 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:43:53 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:43:53 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:43:53 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:43:53 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:43:53 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 06:43:53 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 06:43:53 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 06:43:58 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 06:43:58 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 06:43:58 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:43:58 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:43:58 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:43:58 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:43:58 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:43:58 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 06:43:58 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:43:58 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 06:43:58 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 06:43:58 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 06:43:58 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 06:43:58 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 06:43:58 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:43:58 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:43:58 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 06:43:58 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 06:43:58 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 06:43:58 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 06:43:58 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 06:43:58 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 06:43:58 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:43:58 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:43:58 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 06:43:58 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 06:43:58 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 06:43:58 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 06:43:58 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 06:43:58 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 06:43:58 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:43:58 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:43:58 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 06:43:58 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 06:43:58 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 06:43:58 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 06:43:58 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 06:43:58 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 06:43:58 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 06:43:58 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 06:43:58 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 06:43:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 06:43:58 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 06:43:58 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 06:43:58 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 06:43:58 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:43:58 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:43:58 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 06:43:58 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 06:43:58 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 06:43:58 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 06:43:58 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:43:58 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:43:58 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:43:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 06:43:58 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:43:58 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:43:58 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:43:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:43:58 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:43:58 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:43:58 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:43:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:43:58 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:43:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:43:58 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:43:58 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:43:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:43:58 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:43:58 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:43:58 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:43:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:43:58 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:43:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:43:58 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:43:58 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:43:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:43:58 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:43:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:43:58 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:43:58 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:43:58 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:43:58 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-03-30 06:43:58 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-03-30 06:43:59 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-03-30 06:43:59 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-03-30 06:43:59 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-03-30 06:43:59 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-03-30 06:43:59 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-03-30 06:43:59 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-03-30 06:43:59 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-03-30 06:43:59 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-03-30 06:43:59 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=0 bl=148 pwr=0
2025-03-30 06:43:59 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=1 bl=148 pwr=0
2025-03-30 06:43:59 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=2 bl=148 pwr=0
2025-03-30 06:43:59 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=3 bl=148 pwr=0
2025-03-30 06:43:59 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=4 bl=148 pwr=0
2025-03-30 06:43:59 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=5 bl=148 pwr=0
2025-03-30 06:43:59 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=6 bl=148 pwr=0
2025-03-30 06:43:59 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=7 bl=148 pwr=0
2025-03-30 06:43:59 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 06:43:59 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 06:43:59 [DEBUG] fake_trx.py:317 (BTS@172.18.26.20:5700) Recv FAKE_CI cmd
2025-03-30 06:43:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:43:59 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:43:59 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:43:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:43:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:43:59 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:43:59 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:43:59 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:43:59 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:43:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:43:59 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:43:59 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:43:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:43:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:43:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:43:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:43:59 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:43:59 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:43:59 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:43:59 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:43:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:43:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:43:59 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:43:59 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:43:59 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:43:59 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:43:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:43:59 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:43:59 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:43:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:43:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:43:59 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-03-30 06:43:59 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:43:59 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:43:59 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:43:59 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:43:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:43:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:43:59 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:43:59 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:43:59 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:43:59 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:43:59 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:43:59 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:43:59 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:43:59 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:43:59 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:43:59 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 06:43:59 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 06:43:59 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 06:43:59 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:44:04 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 06:44:04 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 06:44:04 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:44:04 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:44:04 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:44:04 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:44:04 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:44:04 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 06:44:04 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:44:04 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 06:44:04 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 06:44:04 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 06:44:04 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 06:44:04 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 06:44:04 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:44:04 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 06:44:04 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:44:04 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 06:44:04 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 06:44:04 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 06:44:04 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 06:44:04 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 06:44:04 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:44:04 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 06:44:04 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:44:04 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 06:44:04 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 06:44:04 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 06:44:04 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 06:44:04 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 06:44:04 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:44:04 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 06:44:04 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:44:04 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 06:44:04 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 06:44:04 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 06:44:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 06:44:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 06:44:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 06:44:04 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 06:44:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 06:44:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 06:44:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 06:44:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:44:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 06:44:04 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 06:44:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:44:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:44:04 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 06:44:04 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 06:44:04 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 06:44:04 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 06:44:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:44:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:44:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:44:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 06:44:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:44:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:44:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:44:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:44:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:44:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:44:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:44:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:44:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:44:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:44:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:44:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:44:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:44:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:44:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:44:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:44:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:44:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:44:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:44:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:44:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:44:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:44:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:44:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:44:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:44:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:44:04 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-03-30 06:44:05 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-03-30 06:44:05 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-03-30 06:44:05 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-03-30 06:44:05 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-03-30 06:44:05 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-03-30 06:44:05 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-03-30 06:44:05 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-03-30 06:44:05 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-03-30 06:44:05 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-03-30 06:44:05 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=105 tn=0 bl=148 pwr=0
2025-03-30 06:44:05 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=105 tn=1 bl=148 pwr=0
2025-03-30 06:44:05 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=105 tn=2 bl=148 pwr=0
2025-03-30 06:44:05 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=105 tn=3 bl=148 pwr=0
2025-03-30 06:44:05 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=105 tn=4 bl=148 pwr=0
2025-03-30 06:44:05 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=105 tn=5 bl=148 pwr=0
2025-03-30 06:44:05 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=105 tn=6 bl=148 pwr=0
2025-03-30 06:44:05 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=105 tn=7 bl=148 pwr=0
2025-03-30 06:44:05 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=106 tn=0 bl=148 pwr=0
2025-03-30 06:44:05 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=106 tn=1 bl=148 pwr=0
2025-03-30 06:44:05 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=106 tn=2 bl=148 pwr=0
2025-03-30 06:44:05 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=106 tn=3 bl=148 pwr=0
2025-03-30 06:44:05 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=106 tn=4 bl=148 pwr=0
2025-03-30 06:44:05 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=106 tn=5 bl=148 pwr=0
2025-03-30 06:44:05 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=106 tn=6 bl=148 pwr=0
2025-03-30 06:44:05 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=106 tn=7 bl=148 pwr=0
2025-03-30 06:44:05 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=107 tn=0 bl=148 pwr=0
2025-03-30 06:44:05 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=107 tn=1 bl=148 pwr=0
2025-03-30 06:44:05 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=107 tn=2 bl=148 pwr=0
2025-03-30 06:44:05 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=107 tn=3 bl=148 pwr=0
2025-03-30 06:44:05 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=107 tn=4 bl=148 pwr=0
2025-03-30 06:44:05 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=107 tn=5 bl=148 pwr=0
2025-03-30 06:44:05 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=107 tn=6 bl=148 pwr=0
2025-03-30 06:44:05 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=107 tn=7 bl=148 pwr=0
2025-03-30 06:44:05 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 06:44:05 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 06:44:05 [DEBUG] fake_trx.py:317 (BTS@172.18.26.20:5700) Recv FAKE_CI cmd
2025-03-30 06:44:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:44:05 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:44:05 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:44:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:44:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:44:05 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:44:05 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:44:05 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:44:05 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:44:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:44:05 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:44:05 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:44:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:44:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:44:05 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-03-30 06:44:05 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:44:05 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:44:05 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:44:05 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:44:06 [DEBUG] clck_gen.py:128 IND CLOCK 306
2025-03-30 06:44:06 [DEBUG] clck_gen.py:128 IND CLOCK 408
2025-03-30 06:44:06 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:44:06 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:44:06 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:44:06 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:44:07 [DEBUG] clck_gen.py:128 IND CLOCK 510
2025-03-30 06:44:07 [DEBUG] clck_gen.py:128 IND CLOCK 612
2025-03-30 06:44:07 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:44:07 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:44:07 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:44:07 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:44:07 [DEBUG] clck_gen.py:128 IND CLOCK 714
2025-03-30 06:44:08 [DEBUG] clck_gen.py:128 IND CLOCK 816
2025-03-30 06:44:08 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:44:08 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:44:08 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:44:08 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:44:08 [DEBUG] clck_gen.py:128 IND CLOCK 918
2025-03-30 06:44:09 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:44:09 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:44:09 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:44:09 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:44:09 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:44:09 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:44:09 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:44:09 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:44:09 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:44:09 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 06:44:09 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 06:44:09 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 06:44:09 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:44:14 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 06:44:14 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 06:44:14 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:44:14 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:44:14 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:44:14 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:44:14 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:44:14 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 06:44:14 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:44:14 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 06:44:14 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 06:44:14 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 06:44:14 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 06:44:14 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 06:44:14 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:44:14 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:44:14 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 06:44:14 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 06:44:14 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 06:44:14 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 06:44:14 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 06:44:14 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 06:44:14 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:44:14 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:44:14 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 06:44:14 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 06:44:14 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 06:44:14 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 06:44:14 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 06:44:14 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 06:44:14 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:44:14 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:44:14 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 06:44:14 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 06:44:14 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 06:44:14 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 06:44:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 06:44:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 06:44:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 06:44:14 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 06:44:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 06:44:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 06:44:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 06:44:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 06:44:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:44:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:44:14 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 06:44:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:44:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:44:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:44:14 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 06:44:14 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 06:44:14 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 06:44:14 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 06:44:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:44:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:44:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:44:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 06:44:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:44:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:44:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:44:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:44:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:44:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:44:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:44:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:44:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:44:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:44:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:44:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:44:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:44:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:44:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:44:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:44:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:44:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:44:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:44:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:44:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:44:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:44:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:44:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:44:14 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-03-30 06:44:14 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-03-30 06:44:14 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-03-30 06:44:14 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-03-30 06:44:14 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-03-30 06:44:14 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-03-30 06:44:14 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-03-30 06:44:14 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-03-30 06:44:14 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-03-30 06:44:14 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-03-30 06:44:14 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=0 bl=148 pwr=0
2025-03-30 06:44:14 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=1 bl=148 pwr=0
2025-03-30 06:44:14 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=2 bl=148 pwr=0
2025-03-30 06:44:14 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=3 bl=148 pwr=0
2025-03-30 06:44:14 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=4 bl=148 pwr=0
2025-03-30 06:44:14 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=5 bl=148 pwr=0
2025-03-30 06:44:14 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=6 bl=148 pwr=0
2025-03-30 06:44:14 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=7 bl=148 pwr=0
2025-03-30 06:44:14 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 06:44:14 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 06:44:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:44:14 [DEBUG] fake_trx.py:317 (BTS@172.18.26.20:5700) Recv FAKE_CI cmd
2025-03-30 06:44:14 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:44:14 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:44:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:44:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:44:14 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:44:14 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:44:14 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:44:14 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:44:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:44:15 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:44:15 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:44:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:44:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:44:15 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-03-30 06:44:15 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:44:15 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:44:15 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:44:15 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:44:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:44:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:44:15 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:44:15 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:44:15 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:44:15 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:44:15 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:44:15 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:44:15 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:44:15 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:44:15 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:44:15 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:44:15 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 06:44:15 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 06:44:15 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 06:44:15 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=304 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:44:15 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=304 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:44:15 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=304 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:44:20 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 06:44:20 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 06:44:20 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:44:20 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:44:20 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:44:20 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:44:20 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:44:20 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 06:44:20 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:44:20 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 06:44:20 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 06:44:20 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 06:44:20 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 06:44:20 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 06:44:20 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:44:20 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:44:20 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 06:44:20 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 06:44:20 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 06:44:20 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 06:44:20 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 06:44:20 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 06:44:20 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:44:20 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:44:20 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 06:44:20 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 06:44:20 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 06:44:20 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 06:44:20 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 06:44:20 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 06:44:20 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:44:20 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:44:20 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 06:44:20 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 06:44:20 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 06:44:20 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 06:44:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 06:44:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 06:44:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 06:44:20 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 06:44:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 06:44:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 06:44:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 06:44:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:44:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 06:44:20 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 06:44:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:44:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:44:20 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 06:44:20 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 06:44:20 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 06:44:20 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 06:44:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:44:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:44:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:44:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 06:44:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:44:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:44:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:44:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:44:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:44:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:44:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:44:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:44:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:44:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:44:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:44:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:44:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:44:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:44:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:44:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:44:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:44:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:44:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:44:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:44:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:44:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:44:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:44:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:44:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:44:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:44:20 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-03-30 06:44:21 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-03-30 06:44:21 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-03-30 06:44:21 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-03-30 06:44:21 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-03-30 06:44:21 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-03-30 06:44:21 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-03-30 06:44:21 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-03-30 06:44:21 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-03-30 06:44:21 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-03-30 06:44:21 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=0 bl=148 pwr=0
2025-03-30 06:44:21 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=1 bl=148 pwr=0
2025-03-30 06:44:21 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=2 bl=148 pwr=0
2025-03-30 06:44:21 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=3 bl=148 pwr=0
2025-03-30 06:44:21 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=4 bl=148 pwr=0
2025-03-30 06:44:21 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=5 bl=148 pwr=0
2025-03-30 06:44:21 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=6 bl=148 pwr=0
2025-03-30 06:44:21 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=7 bl=148 pwr=0
2025-03-30 06:44:21 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 06:44:21 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 06:44:21 [DEBUG] fake_trx.py:317 (BTS@172.18.26.20:5700) Recv FAKE_CI cmd
2025-03-30 06:44:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:44:21 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:44:21 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:44:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:44:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:44:21 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:44:21 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:44:21 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:44:21 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:44:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:44:21 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:44:21 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:44:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:44:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:44:21 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-03-30 06:44:21 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:44:21 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:44:21 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:44:21 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:44:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:44:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:44:22 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:44:22 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:44:22 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:44:22 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:44:22 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:44:22 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:44:22 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:44:22 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:44:22 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:44:22 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:44:22 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 06:44:22 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 06:44:22 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 06:44:27 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 06:44:27 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 06:44:27 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:44:27 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:44:27 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:44:27 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:44:27 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:44:27 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 06:44:27 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:44:27 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 06:44:27 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 06:44:27 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 06:44:27 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 06:44:27 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 06:44:27 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:44:27 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:44:27 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 06:44:27 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 06:44:27 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 06:44:27 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 06:44:27 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 06:44:27 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 06:44:27 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:44:27 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:44:27 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 06:44:27 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 06:44:27 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 06:44:27 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 06:44:27 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 06:44:27 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 06:44:27 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:44:27 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:44:27 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 06:44:27 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 06:44:27 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 06:44:27 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 06:44:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 06:44:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 06:44:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 06:44:27 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 06:44:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 06:44:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 06:44:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 06:44:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:44:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 06:44:27 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 06:44:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:44:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:44:27 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 06:44:27 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 06:44:27 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 06:44:27 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 06:44:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:44:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:44:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:44:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 06:44:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:44:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:44:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:44:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:44:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:44:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:44:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:44:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:44:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:44:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:44:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:44:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:44:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:44:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:44:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:44:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:44:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:44:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:44:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:44:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:44:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:44:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:44:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:44:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:44:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:44:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:44:27 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-03-30 06:44:27 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-03-30 06:44:27 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-03-30 06:44:27 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-03-30 06:44:27 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-03-30 06:44:27 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-03-30 06:44:27 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-03-30 06:44:27 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-03-30 06:44:27 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-03-30 06:44:27 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-03-30 06:44:27 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=0 bl=148 pwr=0
2025-03-30 06:44:27 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=1 bl=148 pwr=0
2025-03-30 06:44:27 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=2 bl=148 pwr=0
2025-03-30 06:44:27 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=3 bl=148 pwr=0
2025-03-30 06:44:27 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=4 bl=148 pwr=0
2025-03-30 06:44:27 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=5 bl=148 pwr=0
2025-03-30 06:44:27 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=6 bl=148 pwr=0
2025-03-30 06:44:27 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=7 bl=148 pwr=0
2025-03-30 06:44:27 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 06:44:27 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 06:44:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:44:27 [DEBUG] fake_trx.py:317 (BTS@172.18.26.20:5700) Recv FAKE_CI cmd
2025-03-30 06:44:27 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:44:27 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:44:27 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:44:27 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:44:27 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:44:27 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:44:27 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:44:27 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:44:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:44:27 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:44:27 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:44:27 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:44:27 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:44:28 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-03-30 06:44:28 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:44:28 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:44:28 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:44:28 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:44:28 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:44:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:44:28 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:44:28 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:44:28 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:44:28 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:44:28 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:44:28 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:44:28 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:44:28 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:44:28 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:44:28 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:44:28 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 06:44:28 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 06:44:28 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 06:44:33 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 06:44:33 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 06:44:33 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:44:33 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:44:33 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:44:33 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:44:33 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:44:33 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 06:44:33 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:44:33 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 06:44:33 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 06:44:33 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 06:44:33 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 06:44:33 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 06:44:33 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:44:33 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:44:33 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 06:44:33 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 06:44:33 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 06:44:33 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 06:44:33 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 06:44:33 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 06:44:33 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:44:33 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:44:33 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 06:44:33 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 06:44:33 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 06:44:33 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 06:44:33 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 06:44:33 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 06:44:33 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:44:33 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:44:33 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 06:44:33 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 06:44:33 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 06:44:33 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 06:44:33 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 06:44:33 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 06:44:33 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 06:44:33 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 06:44:33 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 06:44:33 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 06:44:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 06:44:33 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:44:33 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 06:44:33 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 06:44:33 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:44:33 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:44:33 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 06:44:33 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 06:44:33 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 06:44:33 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 06:44:33 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:44:33 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:44:33 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:44:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 06:44:33 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:44:33 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:44:33 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:44:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:44:33 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:44:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:44:33 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:44:33 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:44:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:44:33 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:44:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:44:33 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:44:33 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:44:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:44:33 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:44:33 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:44:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:44:33 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:44:33 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:44:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:44:33 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:44:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:44:33 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:44:33 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:44:33 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:44:33 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:44:33 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-03-30 06:44:34 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-03-30 06:44:34 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-03-30 06:44:34 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-03-30 06:44:34 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-03-30 06:44:34 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-03-30 06:44:34 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-03-30 06:44:34 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-03-30 06:44:34 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-03-30 06:44:34 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-03-30 06:44:34 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=0 bl=148 pwr=0
2025-03-30 06:44:34 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=1 bl=148 pwr=0
2025-03-30 06:44:34 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=2 bl=148 pwr=0
2025-03-30 06:44:34 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=3 bl=148 pwr=0
2025-03-30 06:44:34 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=4 bl=148 pwr=0
2025-03-30 06:44:34 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=5 bl=148 pwr=0
2025-03-30 06:44:34 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=6 bl=148 pwr=0
2025-03-30 06:44:34 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=7 bl=148 pwr=0
2025-03-30 06:44:34 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 06:44:34 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 06:44:34 [DEBUG] fake_trx.py:317 (BTS@172.18.26.20:5700) Recv FAKE_CI cmd
2025-03-30 06:44:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:44:34 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:44:34 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:44:34 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:44:34 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:44:34 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:44:34 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:44:34 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:44:34 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:44:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:44:34 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:44:34 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:44:34 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:44:34 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:44:34 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-03-30 06:44:34 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:44:34 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:44:34 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:44:34 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:44:35 [DEBUG] clck_gen.py:128 IND CLOCK 306
2025-03-30 06:44:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:44:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:44:35 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:44:35 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:44:35 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:44:35 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:44:35 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:44:35 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:44:35 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:44:35 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:44:35 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:44:35 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:44:35 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 06:44:35 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 06:44:35 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 06:44:35 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=325 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:44:35 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=325 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:44:35 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=325 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:44:35 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=325 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:44:35 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=325 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:44:35 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=325 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:44:35 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=326 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:44:35 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=326 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:44:35 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=326 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:44:35 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=326 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:44:35 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=326 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:44:35 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=326 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:44:35 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=326 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:44:35 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=326 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:44:40 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 06:44:40 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 06:44:40 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:44:40 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:44:40 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:44:40 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:44:40 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:44:40 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 06:44:40 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:44:40 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 06:44:40 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 06:44:40 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 06:44:40 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 06:44:40 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 06:44:40 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:44:40 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:44:40 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 06:44:40 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 06:44:40 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 06:44:40 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 06:44:40 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 06:44:40 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 06:44:40 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:44:40 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:44:40 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 06:44:40 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 06:44:40 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 06:44:40 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 06:44:40 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 06:44:40 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 06:44:40 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:44:40 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:44:40 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 06:44:40 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 06:44:40 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 06:44:40 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 06:44:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 06:44:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 06:44:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 06:44:40 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 06:44:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 06:44:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 06:44:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 06:44:40 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 06:44:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:44:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 06:44:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:44:40 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 06:44:40 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 06:44:40 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 06:44:40 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 06:44:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:44:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:44:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:44:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 06:44:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:44:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:44:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:44:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:44:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:44:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:44:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:44:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:44:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:44:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:44:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:44:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:44:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:44:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:44:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:44:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:44:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:44:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:44:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:44:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:44:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:44:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:44:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:44:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:44:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:44:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:44:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:44:40 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-03-30 06:44:40 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-03-30 06:44:40 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-03-30 06:44:40 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-03-30 06:44:40 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-03-30 06:44:40 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-03-30 06:44:40 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-03-30 06:44:40 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-03-30 06:44:40 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-03-30 06:44:40 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-03-30 06:44:40 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=0 bl=148 pwr=0
2025-03-30 06:44:40 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=1 bl=148 pwr=0
2025-03-30 06:44:40 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=2 bl=148 pwr=0
2025-03-30 06:44:40 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=3 bl=148 pwr=0
2025-03-30 06:44:40 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=4 bl=148 pwr=0
2025-03-30 06:44:40 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=5 bl=148 pwr=0
2025-03-30 06:44:40 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=6 bl=148 pwr=0
2025-03-30 06:44:40 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=7 bl=148 pwr=0
2025-03-30 06:44:40 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 06:44:40 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 06:44:40 [DEBUG] fake_trx.py:317 (BTS@172.18.26.20:5700) Recv FAKE_CI cmd
2025-03-30 06:44:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:44:40 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:44:40 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:44:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:44:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:44:40 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:44:40 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:44:40 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:44:40 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:44:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:44:40 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:44:40 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:44:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:44:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:44:41 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-03-30 06:44:41 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:44:41 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:44:41 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:44:41 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:44:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:44:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:44:41 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:44:41 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:44:41 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:44:41 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:44:41 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:44:41 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:44:41 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:44:41 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:44:41 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:44:41 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:44:41 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 06:44:41 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 06:44:41 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 06:44:46 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 06:44:46 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 06:44:46 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:44:46 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:44:46 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:44:46 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:44:46 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:44:46 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 06:44:46 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:44:46 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 06:44:46 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 06:44:46 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 06:44:46 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 06:44:46 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 06:44:46 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:44:46 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:44:46 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 06:44:46 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 06:44:46 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 06:44:46 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 06:44:46 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 06:44:46 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 06:44:46 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:44:46 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:44:46 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 06:44:46 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 06:44:46 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 06:44:46 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 06:44:46 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 06:44:46 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 06:44:46 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:44:46 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:44:46 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 06:44:46 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 06:44:46 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 06:44:46 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 06:44:46 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 06:44:46 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 06:44:46 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 06:44:46 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 06:44:46 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 06:44:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 06:44:46 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 06:44:46 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:44:46 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 06:44:46 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 06:44:46 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:44:46 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:44:46 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 06:44:46 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 06:44:46 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 06:44:46 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 06:44:46 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:44:46 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:44:46 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:44:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 06:44:46 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:44:46 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:44:46 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:44:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:44:46 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:44:46 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:44:46 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:44:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:44:46 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:44:46 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:44:46 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:44:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:44:46 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:44:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:44:46 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:44:46 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:44:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:44:46 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:44:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:44:46 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:44:46 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:44:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:44:46 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:44:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:44:46 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:44:46 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:44:46 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-03-30 06:44:47 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-03-30 06:44:47 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-03-30 06:44:47 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-03-30 06:44:47 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-03-30 06:44:47 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-03-30 06:44:47 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-03-30 06:44:47 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-03-30 06:44:47 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-03-30 06:44:47 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-03-30 06:44:47 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=0 bl=148 pwr=0
2025-03-30 06:44:47 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=1 bl=148 pwr=0
2025-03-30 06:44:47 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=2 bl=148 pwr=0
2025-03-30 06:44:47 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=3 bl=148 pwr=0
2025-03-30 06:44:47 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=4 bl=148 pwr=0
2025-03-30 06:44:47 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=5 bl=148 pwr=0
2025-03-30 06:44:47 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=6 bl=148 pwr=0
2025-03-30 06:44:47 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=7 bl=148 pwr=0
2025-03-30 06:44:47 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 06:44:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:44:47 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 06:44:47 [DEBUG] fake_trx.py:317 (BTS@172.18.26.20:5700) Recv FAKE_CI cmd
2025-03-30 06:44:47 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:44:47 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:44:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:44:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:44:47 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:44:47 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:44:47 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:44:47 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:44:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:44:47 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:44:47 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:44:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:44:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:44:47 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-03-30 06:44:47 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:44:47 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:44:47 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:44:47 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:44:48 [DEBUG] clck_gen.py:128 IND CLOCK 306
2025-03-30 06:44:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:44:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:44:48 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:44:48 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:44:48 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:44:48 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:44:48 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:44:48 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:44:48 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:44:48 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:44:48 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:44:48 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:44:48 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 06:44:48 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 06:44:48 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 06:44:53 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 06:44:53 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 06:44:53 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:44:53 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:44:53 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:44:53 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:44:53 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:44:53 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 06:44:53 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:44:53 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 06:44:53 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 06:44:53 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 06:44:53 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 06:44:53 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 06:44:53 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:44:53 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:44:53 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 06:44:53 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 06:44:53 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 06:44:53 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 06:44:53 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 06:44:53 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 06:44:53 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:44:53 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:44:53 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 06:44:53 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 06:44:53 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 06:44:53 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 06:44:53 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 06:44:53 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 06:44:53 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:44:53 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:44:53 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 06:44:53 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 06:44:53 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 06:44:53 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 06:44:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 06:44:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 06:44:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 06:44:53 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 06:44:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 06:44:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 06:44:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 06:44:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:44:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 06:44:53 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 06:44:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:44:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:44:53 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 06:44:53 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 06:44:53 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 06:44:53 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 06:44:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:44:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:44:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:44:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 06:44:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:44:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:44:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:44:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:44:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:44:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:44:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:44:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:44:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:44:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:44:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:44:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:44:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:44:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:44:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:44:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:44:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:44:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:44:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:44:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:44:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:44:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:44:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:44:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:44:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:44:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:44:53 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-03-30 06:44:53 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-03-30 06:44:53 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-03-30 06:44:53 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-03-30 06:44:53 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-03-30 06:44:53 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-03-30 06:44:53 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-03-30 06:44:53 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-03-30 06:44:53 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-03-30 06:44:53 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-03-30 06:44:53 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=0 bl=148 pwr=0
2025-03-30 06:44:53 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=1 bl=148 pwr=0
2025-03-30 06:44:53 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=2 bl=148 pwr=0
2025-03-30 06:44:53 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=3 bl=148 pwr=0
2025-03-30 06:44:53 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=4 bl=148 pwr=0
2025-03-30 06:44:53 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=5 bl=148 pwr=0
2025-03-30 06:44:53 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=6 bl=148 pwr=0
2025-03-30 06:44:53 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=7 bl=148 pwr=0
2025-03-30 06:44:53 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 06:44:53 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 06:44:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:44:53 [DEBUG] fake_trx.py:317 (BTS@172.18.26.20:5700) Recv FAKE_CI cmd
2025-03-30 06:44:53 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:44:53 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:44:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:44:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:44:53 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:44:53 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:44:53 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:44:53 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:44:54 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-03-30 06:44:54 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:44:54 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:44:54 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:44:54 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:44:54 [DEBUG] clck_gen.py:128 IND CLOCK 306
2025-03-30 06:44:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:44:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:44:54 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:44:54 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:44:54 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:44:54 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:44:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:44:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:44:54 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:44:54 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:44:54 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:44:54 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:44:55 [DEBUG] clck_gen.py:128 IND CLOCK 408
2025-03-30 06:44:55 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:44:55 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:44:55 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:44:55 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:44:55 [DEBUG] clck_gen.py:128 IND CLOCK 510
2025-03-30 06:44:55 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD NOHANDOVER
2025-03-30 06:44:56 [DEBUG] clck_gen.py:128 IND CLOCK 612
2025-03-30 06:44:56 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD NOHANDOVER
2025-03-30 06:44:56 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:44:56 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:44:56 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:44:56 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:44:56 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:44:56 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:44:56 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:44:56 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:44:56 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:44:56 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:44:56 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 06:44:56 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 06:44:56 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 06:45:01 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 06:45:01 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 06:45:01 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:45:01 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:45:01 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:45:01 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:45:01 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:45:01 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 06:45:01 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:45:01 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 06:45:01 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 06:45:01 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 06:45:01 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 06:45:01 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 06:45:01 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:45:01 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:45:01 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 06:45:01 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 06:45:01 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 06:45:01 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 06:45:01 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 06:45:01 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 06:45:01 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:45:01 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:45:01 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 06:45:01 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 06:45:01 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 06:45:01 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 06:45:01 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 06:45:01 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 06:45:01 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:45:01 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:45:01 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 06:45:01 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 06:45:01 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 06:45:01 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 06:45:01 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 06:45:01 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 06:45:01 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 06:45:01 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 06:45:01 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 06:45:01 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 06:45:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 06:45:01 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:45:01 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 06:45:01 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 06:45:01 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:45:01 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:45:01 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 06:45:01 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 06:45:01 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 06:45:01 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 06:45:01 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:45:01 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:45:01 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:45:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 06:45:01 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:45:01 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:45:01 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:45:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:45:01 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:45:01 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:45:01 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:45:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:45:01 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:45:01 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:45:01 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:45:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:45:01 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:45:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:45:01 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:45:01 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:45:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:45:01 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:45:01 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:45:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:45:01 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:45:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:45:01 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:45:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:45:01 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:45:01 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:45:01 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-03-30 06:45:01 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-03-30 06:45:01 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-03-30 06:45:01 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-03-30 06:45:01 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-03-30 06:45:01 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-03-30 06:45:01 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-03-30 06:45:01 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-03-30 06:45:01 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-03-30 06:45:01 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-03-30 06:45:01 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=0 bl=148 pwr=0
2025-03-30 06:45:01 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=1 bl=148 pwr=0
2025-03-30 06:45:01 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=2 bl=148 pwr=0
2025-03-30 06:45:01 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=3 bl=148 pwr=0
2025-03-30 06:45:01 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=4 bl=148 pwr=0
2025-03-30 06:45:01 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=5 bl=148 pwr=0
2025-03-30 06:45:01 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=6 bl=148 pwr=0
2025-03-30 06:45:01 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=7 bl=148 pwr=0
2025-03-30 06:45:01 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 06:45:01 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 06:45:01 [DEBUG] fake_trx.py:317 (BTS@172.18.26.20:5700) Recv FAKE_CI cmd
2025-03-30 06:45:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:45:01 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:45:01 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:45:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:45:02 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-03-30 06:45:02 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:45:02 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:45:02 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:45:02 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:45:02 [DEBUG] clck_gen.py:128 IND CLOCK 306
2025-03-30 06:45:02 [DEBUG] clck_gen.py:128 IND CLOCK 408
2025-03-30 06:45:03 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:45:03 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:45:03 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:45:03 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:45:03 [DEBUG] clck_gen.py:128 IND CLOCK 510
2025-03-30 06:45:03 [DEBUG] clck_gen.py:128 IND CLOCK 612
2025-03-30 06:45:04 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:45:04 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:45:04 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:45:04 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:45:04 [DEBUG] clck_gen.py:128 IND CLOCK 714
2025-03-30 06:45:04 [DEBUG] clck_gen.py:128 IND CLOCK 816
2025-03-30 06:45:05 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:45:05 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:45:05 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:45:05 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:45:05 [DEBUG] clck_gen.py:128 IND CLOCK 918
2025-03-30 06:45:05 [DEBUG] clck_gen.py:128 IND CLOCK 1020
2025-03-30 06:45:06 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:45:06 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:45:06 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:45:06 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:45:06 [DEBUG] clck_gen.py:128 IND CLOCK 1122
2025-03-30 06:45:06 [DEBUG] clck_gen.py:128 IND CLOCK 1224
2025-03-30 06:45:07 [DEBUG] clck_gen.py:128 IND CLOCK 1326
2025-03-30 06:45:07 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:45:07 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:45:07 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:45:07 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:45:07 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:45:07 [DEBUG] clck_gen.py:128 IND CLOCK 1428
2025-03-30 06:45:07 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD NOHANDOVER
2025-03-30 06:45:07 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:45:07 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:45:07 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:45:07 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:45:08 [DEBUG] clck_gen.py:128 IND CLOCK 1530
2025-03-30 06:45:08 [DEBUG] clck_gen.py:128 IND CLOCK 1632
2025-03-30 06:45:09 [DEBUG] clck_gen.py:128 IND CLOCK 1734
2025-03-30 06:45:09 [DEBUG] clck_gen.py:128 IND CLOCK 1836
2025-03-30 06:45:10 [DEBUG] clck_gen.py:128 IND CLOCK 1938
2025-03-30 06:45:10 [DEBUG] clck_gen.py:128 IND CLOCK 2040
2025-03-30 06:45:10 [DEBUG] clck_gen.py:128 IND CLOCK 2142
2025-03-30 06:45:11 [DEBUG] clck_gen.py:128 IND CLOCK 2244
2025-03-30 06:45:11 [DEBUG] clck_gen.py:128 IND CLOCK 2346
2025-03-30 06:45:12 [DEBUG] clck_gen.py:128 IND CLOCK 2448
2025-03-30 06:45:12 [DEBUG] clck_gen.py:128 IND CLOCK 2550
2025-03-30 06:45:13 [DEBUG] clck_gen.py:128 IND CLOCK 2652
2025-03-30 06:45:13 [DEBUG] clck_gen.py:128 IND CLOCK 2754
2025-03-30 06:45:14 [DEBUG] clck_gen.py:128 IND CLOCK 2856
2025-03-30 06:45:14 [DEBUG] clck_gen.py:128 IND CLOCK 2958
2025-03-30 06:45:15 [DEBUG] clck_gen.py:128 IND CLOCK 3060
2025-03-30 06:45:15 [DEBUG] clck_gen.py:128 IND CLOCK 3162
2025-03-30 06:45:16 [DEBUG] clck_gen.py:128 IND CLOCK 3264
2025-03-30 06:45:16 [DEBUG] clck_gen.py:128 IND CLOCK 3366
2025-03-30 06:45:17 [DEBUG] clck_gen.py:128 IND CLOCK 3468
2025-03-30 06:45:17 [DEBUG] clck_gen.py:128 IND CLOCK 3570
2025-03-30 06:45:18 [DEBUG] clck_gen.py:128 IND CLOCK 3672
2025-03-30 06:45:18 [DEBUG] clck_gen.py:128 IND CLOCK 3774
2025-03-30 06:45:18 [DEBUG] clck_gen.py:128 IND CLOCK 3876
2025-03-30 06:45:19 [DEBUG] clck_gen.py:128 IND CLOCK 3978
2025-03-30 06:45:19 [DEBUG] clck_gen.py:128 IND CLOCK 4080
2025-03-30 06:45:20 [DEBUG] clck_gen.py:128 IND CLOCK 4182
2025-03-30 06:45:20 [DEBUG] clck_gen.py:128 IND CLOCK 4284
2025-03-30 06:45:21 [DEBUG] clck_gen.py:128 IND CLOCK 4386
2025-03-30 06:45:21 [DEBUG] clck_gen.py:128 IND CLOCK 4488
2025-03-30 06:45:22 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD NOHANDOVER
2025-03-30 06:45:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:45:22 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:45:22 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:45:22 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:45:22 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:45:22 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:45:22 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:45:22 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:45:22 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:45:22 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:45:22 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:45:22 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 06:45:22 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 06:45:22 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 06:45:27 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 06:45:27 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 06:45:27 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:45:27 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:45:27 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:45:27 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:45:27 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:45:27 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 06:45:27 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:45:27 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 06:45:27 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 06:45:27 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 06:45:27 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 06:45:27 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 06:45:27 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:45:27 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:45:27 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 06:45:27 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 06:45:27 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 06:45:27 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 06:45:27 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 06:45:27 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 06:45:27 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:45:27 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:45:27 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 06:45:27 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 06:45:27 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 06:45:27 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 06:45:27 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 06:45:27 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 06:45:27 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:45:27 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:45:27 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 06:45:27 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 06:45:27 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 06:45:27 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 06:45:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 06:45:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 06:45:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 06:45:27 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 06:45:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 06:45:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 06:45:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 06:45:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:45:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 06:45:27 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 06:45:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:45:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:45:27 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 06:45:27 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 06:45:27 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 06:45:27 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 06:45:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:45:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:45:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:45:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 06:45:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:45:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:45:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:45:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:45:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:45:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:45:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:45:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:45:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:45:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:45:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:45:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:45:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:45:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:45:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:45:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:45:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:45:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:45:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:45:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:45:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:45:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:45:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:45:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:45:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:45:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:45:27 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-03-30 06:45:27 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-03-30 06:45:27 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-03-30 06:45:27 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-03-30 06:45:27 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-03-30 06:45:27 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-03-30 06:45:27 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-03-30 06:45:27 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-03-30 06:45:27 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-03-30 06:45:27 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-03-30 06:45:27 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=0 bl=148 pwr=0
2025-03-30 06:45:27 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=1 bl=148 pwr=0
2025-03-30 06:45:27 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=2 bl=148 pwr=0
2025-03-30 06:45:27 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=3 bl=148 pwr=0
2025-03-30 06:45:27 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=4 bl=148 pwr=0
2025-03-30 06:45:27 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=5 bl=148 pwr=0
2025-03-30 06:45:27 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=6 bl=148 pwr=0
2025-03-30 06:45:27 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=7 bl=148 pwr=0
2025-03-30 06:45:27 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 06:45:27 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 06:45:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:45:27 [DEBUG] fake_trx.py:317 (BTS@172.18.26.20:5700) Recv FAKE_CI cmd
2025-03-30 06:45:27 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:45:27 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:45:27 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:45:28 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-03-30 06:45:28 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:45:28 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:45:28 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:45:28 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:45:28 [DEBUG] clck_gen.py:128 IND CLOCK 306
2025-03-30 06:45:29 [DEBUG] clck_gen.py:128 IND CLOCK 408
2025-03-30 06:45:29 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:45:29 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:45:29 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:45:29 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:45:29 [DEBUG] clck_gen.py:128 IND CLOCK 510
2025-03-30 06:45:30 [DEBUG] clck_gen.py:128 IND CLOCK 612
2025-03-30 06:45:30 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:45:30 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:45:30 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:45:30 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:45:30 [DEBUG] clck_gen.py:128 IND CLOCK 714
2025-03-30 06:45:30 [DEBUG] clck_gen.py:128 IND CLOCK 816
2025-03-30 06:45:31 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:45:31 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:45:31 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:45:31 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:45:31 [DEBUG] clck_gen.py:128 IND CLOCK 918
2025-03-30 06:45:31 [DEBUG] clck_gen.py:128 IND CLOCK 1020
2025-03-30 06:45:32 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:45:32 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:45:32 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:45:32 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:45:32 [DEBUG] clck_gen.py:128 IND CLOCK 1122
2025-03-30 06:45:32 [DEBUG] clck_gen.py:128 IND CLOCK 1224
2025-03-30 06:45:33 [DEBUG] clck_gen.py:128 IND CLOCK 1326
2025-03-30 06:45:33 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:45:33 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:45:33 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:45:33 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:45:33 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:45:33 [DEBUG] clck_gen.py:128 IND CLOCK 1428
2025-03-30 06:45:33 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD NOHANDOVER
2025-03-30 06:45:33 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:45:33 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:45:33 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:45:33 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:45:34 [DEBUG] clck_gen.py:128 IND CLOCK 1530
2025-03-30 06:45:34 [DEBUG] clck_gen.py:128 IND CLOCK 1632
2025-03-30 06:45:35 [DEBUG] clck_gen.py:128 IND CLOCK 1734
2025-03-30 06:45:35 [DEBUG] clck_gen.py:128 IND CLOCK 1836
2025-03-30 06:45:36 [DEBUG] clck_gen.py:128 IND CLOCK 1938
2025-03-30 06:45:36 [DEBUG] clck_gen.py:128 IND CLOCK 2040
2025-03-30 06:45:37 [DEBUG] clck_gen.py:128 IND CLOCK 2142
2025-03-30 06:45:37 [DEBUG] clck_gen.py:128 IND CLOCK 2244
2025-03-30 06:45:38 [DEBUG] clck_gen.py:128 IND CLOCK 2346
2025-03-30 06:45:38 [DEBUG] clck_gen.py:128 IND CLOCK 2448
2025-03-30 06:45:38 [DEBUG] clck_gen.py:128 IND CLOCK 2550
2025-03-30 06:45:39 [DEBUG] clck_gen.py:128 IND CLOCK 2652
2025-03-30 06:45:39 [DEBUG] clck_gen.py:128 IND CLOCK 2754
2025-03-30 06:45:40 [DEBUG] clck_gen.py:128 IND CLOCK 2856
2025-03-30 06:45:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD NOHANDOVER
2025-03-30 06:45:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:45:40 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:45:40 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:45:40 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:45:40 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:45:40 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:45:40 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:45:40 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:45:40 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:45:40 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:45:40 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:45:40 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 06:45:40 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 06:45:40 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 06:45:45 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 06:45:45 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 06:45:45 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:45:45 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:45:45 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:45:45 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:45:45 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:45:45 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 06:45:45 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:45:45 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 06:45:45 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 06:45:45 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 06:45:45 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 06:45:45 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 06:45:45 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:45:45 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:45:45 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 06:45:45 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 06:45:45 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 06:45:45 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 06:45:45 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 06:45:45 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 06:45:45 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:45:45 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:45:45 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 06:45:45 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 06:45:45 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 06:45:45 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 06:45:45 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 06:45:45 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 06:45:45 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:45:45 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:45:45 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 06:45:45 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 06:45:45 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 06:45:45 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 06:45:45 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 06:45:45 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 06:45:45 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 06:45:45 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 06:45:45 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 06:45:45 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 06:45:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 06:45:45 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:45:45 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 06:45:45 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 06:45:45 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:45:45 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:45:45 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 06:45:45 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 06:45:45 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 06:45:45 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 06:45:45 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:45:45 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:45:45 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:45:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 06:45:45 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:45:45 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:45:45 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:45:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:45:45 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:45:45 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:45:45 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:45:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:45:45 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:45:45 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:45:45 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:45:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:45:45 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:45:45 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:45:45 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:45:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:45:45 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:45:45 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:45:45 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:45:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:45:45 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:45:45 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:45:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:45:45 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:45:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:45:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:45:45 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-03-30 06:45:46 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-03-30 06:45:46 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-03-30 06:45:46 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-03-30 06:45:46 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-03-30 06:45:46 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-03-30 06:45:46 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-03-30 06:45:46 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-03-30 06:45:46 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-03-30 06:45:46 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-03-30 06:45:46 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=0 bl=148 pwr=0
2025-03-30 06:45:46 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=1 bl=148 pwr=0
2025-03-30 06:45:46 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=2 bl=148 pwr=0
2025-03-30 06:45:46 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=3 bl=148 pwr=0
2025-03-30 06:45:46 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=4 bl=148 pwr=0
2025-03-30 06:45:46 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=5 bl=148 pwr=0
2025-03-30 06:45:46 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=6 bl=148 pwr=0
2025-03-30 06:45:46 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=7 bl=148 pwr=0
2025-03-30 06:45:46 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 06:45:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:45:46 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 06:45:46 [DEBUG] fake_trx.py:317 (BTS@172.18.26.20:5700) Recv FAKE_CI cmd
2025-03-30 06:45:46 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:45:46 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:45:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:45:46 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-03-30 06:45:46 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:45:46 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:45:46 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:45:46 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:45:47 [DEBUG] clck_gen.py:128 IND CLOCK 306
2025-03-30 06:45:47 [DEBUG] clck_gen.py:128 IND CLOCK 408
2025-03-30 06:45:47 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:45:47 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:45:47 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:45:47 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:45:47 [DEBUG] clck_gen.py:128 IND CLOCK 510
2025-03-30 06:45:48 [DEBUG] clck_gen.py:128 IND CLOCK 612
2025-03-30 06:45:48 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:45:48 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:45:48 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:45:48 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:45:48 [DEBUG] clck_gen.py:128 IND CLOCK 714
2025-03-30 06:45:49 [DEBUG] clck_gen.py:128 IND CLOCK 816
2025-03-30 06:45:49 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:45:49 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:45:49 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:45:49 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:45:49 [DEBUG] clck_gen.py:128 IND CLOCK 918
2025-03-30 06:45:50 [DEBUG] clck_gen.py:128 IND CLOCK 1020
2025-03-30 06:45:50 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:45:50 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:45:50 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:45:50 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:45:50 [DEBUG] clck_gen.py:128 IND CLOCK 1122
2025-03-30 06:45:51 [DEBUG] clck_gen.py:128 IND CLOCK 1224
2025-03-30 06:45:51 [DEBUG] clck_gen.py:128 IND CLOCK 1326
2025-03-30 06:45:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:45:52 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:45:52 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:45:52 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:45:52 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:45:52 [DEBUG] clck_gen.py:128 IND CLOCK 1428
2025-03-30 06:45:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD NOHANDOVER
2025-03-30 06:45:52 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:45:52 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:45:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:45:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:45:52 [DEBUG] clck_gen.py:128 IND CLOCK 1530
2025-03-30 06:45:52 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=1541): ver=1 fn=1539 tn=0 bl=148 pwr=0
2025-03-30 06:45:52 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=1541): ver=1 fn=1539 tn=1 bl=148 pwr=0
2025-03-30 06:45:52 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=1541): ver=1 fn=1539 tn=2 bl=148 pwr=0
2025-03-30 06:45:52 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=1541): ver=1 fn=1539 tn=3 bl=148 pwr=0
2025-03-30 06:45:52 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=1541): ver=1 fn=1539 tn=4 bl=148 pwr=0
2025-03-30 06:45:52 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=1541): ver=1 fn=1539 tn=5 bl=148 pwr=0
2025-03-30 06:45:52 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=1541): ver=1 fn=1539 tn=6 bl=148 pwr=0
2025-03-30 06:45:52 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=1541): ver=1 fn=1539 tn=7 bl=148 pwr=0
2025-03-30 06:45:52 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=1541): ver=1 fn=1540 tn=0 bl=148 pwr=0
2025-03-30 06:45:52 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=1541): ver=1 fn=1540 tn=1 bl=148 pwr=0
2025-03-30 06:45:52 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=1541): ver=1 fn=1540 tn=2 bl=148 pwr=0
2025-03-30 06:45:52 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=1541): ver=1 fn=1540 tn=3 bl=148 pwr=0
2025-03-30 06:45:52 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=1541): ver=1 fn=1540 tn=4 bl=148 pwr=0
2025-03-30 06:45:52 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=1541): ver=1 fn=1540 tn=5 bl=148 pwr=0
2025-03-30 06:45:52 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=1541): ver=1 fn=1540 tn=6 bl=148 pwr=0
2025-03-30 06:45:52 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=1541): ver=1 fn=1540 tn=7 bl=148 pwr=0
2025-03-30 06:45:52 [WARNING] transceiver.py:330 (TRX1@172.18.26.20:5700/1) Stale TRXD message (fn=1541): ver=1 fn=1539 tn=0 bl=148 pwr=4
2025-03-30 06:45:52 [WARNING] transceiver.py:330 (TRX1@172.18.26.20:5700/1) Stale TRXD message (fn=1541): ver=1 fn=1540 tn=0 bl=148 pwr=4
2025-03-30 06:45:53 [DEBUG] clck_gen.py:128 IND CLOCK 1632
2025-03-30 06:45:53 [DEBUG] clck_gen.py:128 IND CLOCK 1734
2025-03-30 06:45:54 [DEBUG] clck_gen.py:128 IND CLOCK 1836
2025-03-30 06:45:54 [DEBUG] clck_gen.py:128 IND CLOCK 1938
2025-03-30 06:45:55 [DEBUG] clck_gen.py:128 IND CLOCK 2040
2025-03-30 06:45:55 [DEBUG] clck_gen.py:128 IND CLOCK 2142
2025-03-30 06:45:55 [DEBUG] clck_gen.py:128 IND CLOCK 2244
2025-03-30 06:45:56 [DEBUG] clck_gen.py:128 IND CLOCK 2346
2025-03-30 06:45:56 [DEBUG] clck_gen.py:128 IND CLOCK 2448
2025-03-30 06:45:57 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD NOHANDOVER
2025-03-30 06:45:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:45:57 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:45:57 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:45:57 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:45:57 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:45:57 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:45:57 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:45:57 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:45:57 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:45:57 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:45:57 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:45:57 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 06:45:57 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 06:45:57 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 06:46:02 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 06:46:02 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 06:46:02 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:46:02 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:46:02 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:46:02 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:46:02 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:46:02 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 06:46:02 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:46:02 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 06:46:02 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 06:46:02 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 06:46:02 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 06:46:02 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 06:46:02 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:46:02 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:46:02 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 06:46:02 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 06:46:02 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 06:46:02 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 06:46:02 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 06:46:02 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 06:46:02 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:46:02 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:46:02 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 06:46:02 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 06:46:02 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 06:46:02 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 06:46:02 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 06:46:02 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 06:46:02 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:46:02 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:46:02 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 06:46:02 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 06:46:02 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 06:46:02 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 06:46:02 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 06:46:02 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 06:46:02 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 06:46:02 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 06:46:02 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 06:46:02 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 06:46:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 06:46:02 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:46:02 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 06:46:02 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 06:46:02 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:46:02 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:46:02 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 06:46:02 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 06:46:02 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 06:46:02 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 06:46:02 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:46:02 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:46:02 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:46:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 06:46:02 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:46:02 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:46:02 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:46:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:46:02 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:46:02 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:46:02 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:46:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:46:02 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:46:02 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:46:02 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:46:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:46:02 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:46:02 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:46:02 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:46:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:46:02 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:46:02 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:46:02 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:46:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:46:02 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:46:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:46:02 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:46:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:46:02 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:46:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:46:02 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-03-30 06:46:02 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-03-30 06:46:02 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-03-30 06:46:02 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-03-30 06:46:02 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-03-30 06:46:02 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-03-30 06:46:02 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-03-30 06:46:02 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-03-30 06:46:02 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-03-30 06:46:02 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-03-30 06:46:02 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=0 bl=148 pwr=0
2025-03-30 06:46:02 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=1 bl=148 pwr=0
2025-03-30 06:46:02 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=2 bl=148 pwr=0
2025-03-30 06:46:02 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=3 bl=148 pwr=0
2025-03-30 06:46:02 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=4 bl=148 pwr=0
2025-03-30 06:46:02 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=5 bl=148 pwr=0
2025-03-30 06:46:02 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=6 bl=148 pwr=0
2025-03-30 06:46:02 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=7 bl=148 pwr=0
2025-03-30 06:46:02 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 06:46:02 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 06:46:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:46:02 [DEBUG] fake_trx.py:317 (BTS@172.18.26.20:5700) Recv FAKE_CI cmd
2025-03-30 06:46:02 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:46:02 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:46:02 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:46:03 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-03-30 06:46:03 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:46:03 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:46:03 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:46:03 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:46:03 [DEBUG] clck_gen.py:128 IND CLOCK 306
2025-03-30 06:46:04 [DEBUG] clck_gen.py:128 IND CLOCK 408
2025-03-30 06:46:04 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:46:04 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:46:04 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:46:04 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:46:04 [DEBUG] clck_gen.py:128 IND CLOCK 510
2025-03-30 06:46:04 [DEBUG] clck_gen.py:128 IND CLOCK 612
2025-03-30 06:46:05 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:46:05 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:46:05 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:46:05 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:46:05 [DEBUG] clck_gen.py:128 IND CLOCK 714
2025-03-30 06:46:05 [DEBUG] clck_gen.py:128 IND CLOCK 816
2025-03-30 06:46:06 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:46:06 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:46:06 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:46:06 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:46:06 [DEBUG] clck_gen.py:128 IND CLOCK 918
2025-03-30 06:46:06 [DEBUG] clck_gen.py:128 IND CLOCK 1020
2025-03-30 06:46:07 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:46:07 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:46:07 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:46:07 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:46:07 [DEBUG] clck_gen.py:128 IND CLOCK 1122
2025-03-30 06:46:07 [DEBUG] clck_gen.py:128 IND CLOCK 1224
2025-03-30 06:46:08 [DEBUG] clck_gen.py:128 IND CLOCK 1326
2025-03-30 06:46:08 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:46:08 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:46:08 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:46:08 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:46:08 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:46:08 [DEBUG] clck_gen.py:128 IND CLOCK 1428
2025-03-30 06:46:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD NOHANDOVER
2025-03-30 06:46:08 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:46:08 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:46:08 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:46:08 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:46:09 [DEBUG] clck_gen.py:128 IND CLOCK 1530
2025-03-30 06:46:09 [DEBUG] clck_gen.py:128 IND CLOCK 1632
2025-03-30 06:46:10 [DEBUG] clck_gen.py:128 IND CLOCK 1734
2025-03-30 06:46:10 [DEBUG] clck_gen.py:128 IND CLOCK 1836
2025-03-30 06:46:11 [DEBUG] clck_gen.py:128 IND CLOCK 1938
2025-03-30 06:46:11 [DEBUG] clck_gen.py:128 IND CLOCK 2040
2025-03-30 06:46:12 [DEBUG] clck_gen.py:128 IND CLOCK 2142
2025-03-30 06:46:12 [DEBUG] clck_gen.py:128 IND CLOCK 2244
2025-03-30 06:46:12 [DEBUG] clck_gen.py:128 IND CLOCK 2346
2025-03-30 06:46:13 [DEBUG] clck_gen.py:128 IND CLOCK 2448
2025-03-30 06:46:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD NOHANDOVER
2025-03-30 06:46:13 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:46:13 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:46:13 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:46:13 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:46:13 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:46:13 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:46:13 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:46:13 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:46:13 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:46:13 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:46:13 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:46:13 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 06:46:13 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 06:46:13 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 06:46:13 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=2489 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:46:13 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=2489 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:46:13 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=2489 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:46:13 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=2489 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:46:13 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=2489 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:46:13 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=2489 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:46:18 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 06:46:18 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 06:46:18 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:46:18 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:46:18 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:46:18 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:46:18 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:46:18 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 06:46:18 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:46:18 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 06:46:18 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 06:46:18 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 06:46:18 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 06:46:18 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 06:46:18 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:46:18 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:46:18 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 06:46:18 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 06:46:18 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 06:46:18 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 06:46:18 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 06:46:18 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 06:46:18 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:46:18 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:46:18 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 06:46:18 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 06:46:18 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 06:46:18 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 06:46:18 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 06:46:18 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 06:46:18 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:46:18 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:46:18 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 06:46:18 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 06:46:18 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 06:46:18 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 06:46:18 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 06:46:18 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 06:46:18 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 06:46:18 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 06:46:18 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 06:46:18 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 06:46:18 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 06:46:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 06:46:18 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:46:18 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:46:18 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:46:18 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 06:46:18 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:46:18 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:46:18 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 06:46:18 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 06:46:18 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 06:46:18 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 06:46:18 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:46:18 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:46:18 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:46:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 06:46:18 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:46:18 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:46:18 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:46:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:46:18 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:46:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:46:18 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:46:18 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:46:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:46:18 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:46:18 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:46:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:46:18 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:46:18 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:46:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:46:18 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:46:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:46:18 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:46:18 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:46:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:46:18 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:46:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:46:18 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:46:18 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:46:18 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-03-30 06:46:19 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-03-30 06:46:19 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-03-30 06:46:19 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-03-30 06:46:19 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-03-30 06:46:19 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-03-30 06:46:19 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-03-30 06:46:19 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-03-30 06:46:19 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-03-30 06:46:19 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-03-30 06:46:19 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=6 bl=148 pwr=0
2025-03-30 06:46:19 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=7 bl=148 pwr=0
2025-03-30 06:46:19 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 06:46:19 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 06:46:19 [DEBUG] fake_trx.py:317 (BTS@172.18.26.20:5700) Recv FAKE_CI cmd
2025-03-30 06:46:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:46:19 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:46:19 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:46:19 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:46:19 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-03-30 06:46:19 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:46:19 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:46:19 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:46:19 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:46:20 [DEBUG] clck_gen.py:128 IND CLOCK 306
2025-03-30 06:46:20 [DEBUG] clck_gen.py:128 IND CLOCK 408
2025-03-30 06:46:20 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:46:20 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:46:20 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:46:20 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:46:21 [DEBUG] clck_gen.py:128 IND CLOCK 510
2025-03-30 06:46:21 [DEBUG] clck_gen.py:128 IND CLOCK 612
2025-03-30 06:46:21 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:46:21 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:46:21 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:46:21 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:46:21 [DEBUG] clck_gen.py:128 IND CLOCK 714
2025-03-30 06:46:22 [DEBUG] clck_gen.py:128 IND CLOCK 816
2025-03-30 06:46:22 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:46:22 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:46:22 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:46:22 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:46:22 [DEBUG] clck_gen.py:128 IND CLOCK 918
2025-03-30 06:46:23 [DEBUG] clck_gen.py:128 IND CLOCK 1020
2025-03-30 06:46:23 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:46:23 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:46:23 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:46:23 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:46:23 [DEBUG] clck_gen.py:128 IND CLOCK 1122
2025-03-30 06:46:24 [DEBUG] clck_gen.py:128 IND CLOCK 1224
2025-03-30 06:46:24 [DEBUG] clck_gen.py:128 IND CLOCK 1326
2025-03-30 06:46:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:46:25 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:46:25 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:46:25 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:46:25 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:46:25 [DEBUG] clck_gen.py:128 IND CLOCK 1428
2025-03-30 06:46:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD NOHANDOVER
2025-03-30 06:46:25 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:46:25 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:46:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:46:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:46:25 [DEBUG] clck_gen.py:128 IND CLOCK 1530
2025-03-30 06:46:26 [DEBUG] clck_gen.py:128 IND CLOCK 1632
2025-03-30 06:46:26 [DEBUG] clck_gen.py:128 IND CLOCK 1734
2025-03-30 06:46:27 [DEBUG] clck_gen.py:128 IND CLOCK 1836
2025-03-30 06:46:27 [DEBUG] clck_gen.py:128 IND CLOCK 1938
2025-03-30 06:46:28 [DEBUG] clck_gen.py:128 IND CLOCK 2040
2025-03-30 06:46:28 [DEBUG] clck_gen.py:128 IND CLOCK 2142
2025-03-30 06:46:29 [DEBUG] clck_gen.py:128 IND CLOCK 2244
2025-03-30 06:46:29 [DEBUG] clck_gen.py:128 IND CLOCK 2346
2025-03-30 06:46:29 [DEBUG] clck_gen.py:128 IND CLOCK 2448
2025-03-30 06:46:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD NOHANDOVER
2025-03-30 06:46:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:46:30 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:46:30 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:46:30 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:46:30 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:46:30 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:46:30 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:46:30 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:46:30 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:46:30 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:46:30 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:46:30 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 06:46:30 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 06:46:30 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 06:46:35 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 06:46:35 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 06:46:35 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:46:35 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:46:35 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:46:35 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:46:35 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:46:35 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 06:46:35 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:46:35 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 06:46:35 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 06:46:35 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 06:46:35 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 06:46:35 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 06:46:35 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:46:35 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:46:35 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 06:46:35 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 06:46:35 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 06:46:35 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 06:46:35 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 06:46:35 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 06:46:35 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:46:35 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:46:35 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 06:46:35 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 06:46:35 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 06:46:35 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 06:46:35 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 06:46:35 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 06:46:35 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:46:35 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:46:35 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 06:46:35 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 06:46:35 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 06:46:35 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 06:46:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 06:46:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 06:46:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 06:46:35 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 06:46:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 06:46:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 06:46:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 06:46:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:46:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 06:46:35 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 06:46:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:46:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:46:35 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 06:46:35 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 06:46:35 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 06:46:35 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 06:46:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:46:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:46:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:46:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 06:46:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:46:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:46:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:46:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:46:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:46:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:46:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:46:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:46:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:46:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:46:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:46:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:46:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:46:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:46:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:46:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:46:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:46:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:46:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:46:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:46:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:46:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:46:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:46:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:46:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:46:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:46:35 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-03-30 06:46:35 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-03-30 06:46:35 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-03-30 06:46:35 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-03-30 06:46:35 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-03-30 06:46:35 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-03-30 06:46:35 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-03-30 06:46:35 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-03-30 06:46:35 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-03-30 06:46:35 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-03-30 06:46:35 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=0 bl=148 pwr=0
2025-03-30 06:46:35 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=1 bl=148 pwr=0
2025-03-30 06:46:35 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=2 bl=148 pwr=0
2025-03-30 06:46:35 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=3 bl=148 pwr=0
2025-03-30 06:46:35 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=4 bl=148 pwr=0
2025-03-30 06:46:35 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=5 bl=148 pwr=0
2025-03-30 06:46:35 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=6 bl=148 pwr=0
2025-03-30 06:46:35 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=7 bl=148 pwr=0
2025-03-30 06:46:35 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 06:46:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:46:35 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 06:46:35 [DEBUG] fake_trx.py:317 (BTS@172.18.26.20:5700) Recv FAKE_CI cmd
2025-03-30 06:46:36 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-03-30 06:46:36 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:46:36 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:46:36 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:46:36 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:46:36 [DEBUG] clck_gen.py:128 IND CLOCK 306
2025-03-30 06:46:37 [DEBUG] clck_gen.py:128 IND CLOCK 408
2025-03-30 06:46:37 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:46:37 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:46:37 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:46:37 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:46:37 [DEBUG] clck_gen.py:128 IND CLOCK 510
2025-03-30 06:46:37 [DEBUG] clck_gen.py:128 IND CLOCK 612
2025-03-30 06:46:38 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:46:38 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:46:38 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:46:38 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:46:38 [DEBUG] clck_gen.py:128 IND CLOCK 714
2025-03-30 06:46:38 [DEBUG] clck_gen.py:128 IND CLOCK 816
2025-03-30 06:46:39 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:46:39 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:46:39 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:46:39 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:46:39 [DEBUG] clck_gen.py:128 IND CLOCK 918
2025-03-30 06:46:39 [DEBUG] clck_gen.py:128 IND CLOCK 1020
2025-03-30 06:46:40 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:46:40 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:46:40 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:46:40 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:46:40 [DEBUG] clck_gen.py:128 IND CLOCK 1122
2025-03-30 06:46:40 [DEBUG] clck_gen.py:128 IND CLOCK 1224
2025-03-30 06:46:41 [DEBUG] clck_gen.py:128 IND CLOCK 1326
2025-03-30 06:46:41 [DEBUG] clck_gen.py:128 IND CLOCK 1428
2025-03-30 06:46:42 [DEBUG] clck_gen.py:128 IND CLOCK 1530
2025-03-30 06:46:42 [DEBUG] clck_gen.py:128 IND CLOCK 1632
2025-03-30 06:46:43 [DEBUG] clck_gen.py:128 IND CLOCK 1734
2025-03-30 06:46:43 [DEBUG] clck_gen.py:128 IND CLOCK 1836
2025-03-30 06:46:44 [DEBUG] clck_gen.py:128 IND CLOCK 1938
2025-03-30 06:46:44 [DEBUG] clck_gen.py:128 IND CLOCK 2040
2025-03-30 06:46:45 [DEBUG] clck_gen.py:128 IND CLOCK 2142
2025-03-30 06:46:45 [DEBUG] clck_gen.py:128 IND CLOCK 2244
2025-03-30 06:46:45 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:46:45 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:46:45 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:46:45 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:46:45 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:46:45 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:46:45 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:46:45 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 06:46:45 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 06:46:45 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 06:46:45 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:46:50 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 06:46:50 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 06:46:50 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:46:50 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:46:50 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:46:50 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:46:50 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:46:50 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 06:46:50 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:46:50 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 06:46:50 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 06:46:50 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 06:46:50 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 06:46:50 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 06:46:50 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:46:50 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:46:50 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 06:46:50 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 06:46:50 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 06:46:50 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 06:46:50 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 06:46:50 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 06:46:50 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:46:50 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:46:50 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 06:46:50 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 06:46:50 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 06:46:50 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 06:46:50 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 06:46:50 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 06:46:50 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:46:50 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:46:50 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 06:46:50 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 06:46:50 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 06:46:50 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 06:46:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 06:46:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 06:46:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 06:46:50 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 06:46:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 06:46:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 06:46:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 06:46:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:46:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 06:46:50 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 06:46:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:46:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:46:50 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 06:46:50 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 06:46:50 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 06:46:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:46:50 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 06:46:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:46:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:46:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 06:46:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:46:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:46:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:46:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:46:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:46:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:46:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:46:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:46:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:46:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:46:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:46:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:46:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:46:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:46:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:46:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:46:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:46:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:46:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:46:50 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:46:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:46:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:46:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:46:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:46:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:46:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:46:50 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:46:50 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:46:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:46:50 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 06:46:50 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 06:46:50 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 06:46:50 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:46:55 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 06:46:55 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 06:46:55 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:46:55 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:46:55 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:46:55 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:46:55 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:46:55 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 06:46:55 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:46:55 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 06:46:55 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 06:46:55 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 06:46:55 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 06:46:55 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 06:46:55 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:46:55 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:46:55 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 06:46:55 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 06:46:55 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 06:46:55 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 06:46:55 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 06:46:55 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 06:46:55 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:46:55 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:46:55 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 06:46:55 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 06:46:55 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 06:46:55 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 06:46:55 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 06:46:55 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 06:46:55 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:46:55 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:46:55 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 06:46:55 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 06:46:55 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 06:46:55 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 06:46:55 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 06:46:55 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 06:46:55 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 06:46:55 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 06:46:55 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 06:46:55 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 06:46:55 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 06:46:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 06:46:55 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:46:55 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:46:55 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 06:46:55 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:46:55 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:46:55 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:46:55 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 06:46:55 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 06:46:55 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 06:46:55 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:46:55 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 06:46:55 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:46:55 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:46:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 06:46:55 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:46:55 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:46:55 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:46:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:46:55 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:46:55 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:46:55 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:46:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:46:55 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:46:55 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:46:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:46:55 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:46:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:46:55 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:46:55 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:46:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:46:55 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:46:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:46:55 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:46:55 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:46:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:46:55 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:46:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:46:55 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:46:55 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-03-30 06:46:56 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-03-30 06:46:56 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-03-30 06:46:56 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-03-30 06:46:56 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-03-30 06:46:56 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-03-30 06:46:56 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-03-30 06:46:56 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-03-30 06:46:56 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-03-30 06:46:56 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-03-30 06:46:56 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=0 bl=148 pwr=0
2025-03-30 06:46:56 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=1 bl=148 pwr=0
2025-03-30 06:46:56 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=2 bl=148 pwr=0
2025-03-30 06:46:56 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=3 bl=148 pwr=0
2025-03-30 06:46:56 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=4 bl=148 pwr=0
2025-03-30 06:46:56 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=5 bl=148 pwr=0
2025-03-30 06:46:56 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=6 bl=148 pwr=0
2025-03-30 06:46:56 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=7 bl=148 pwr=0
2025-03-30 06:46:56 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 06:46:56 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 06:46:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:46:56 [DEBUG] fake_trx.py:317 (BTS@172.18.26.20:5700) Recv FAKE_CI cmd
2025-03-30 06:46:56 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:46:56 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:46:56 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:46:56 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:46:56 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:46:56 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:46:56 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:46:56 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:46:56 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-03-30 06:46:56 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:46:56 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:46:56 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:46:56 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:46:57 [DEBUG] clck_gen.py:128 IND CLOCK 306
2025-03-30 06:46:57 [DEBUG] clck_gen.py:128 IND CLOCK 408
2025-03-30 06:46:57 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:46:57 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:46:57 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:46:57 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:46:58 [DEBUG] clck_gen.py:128 IND CLOCK 510
2025-03-30 06:46:58 [DEBUG] clck_gen.py:128 IND CLOCK 612
2025-03-30 06:46:58 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:46:58 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:46:58 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:46:58 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:46:59 [DEBUG] clck_gen.py:128 IND CLOCK 714
2025-03-30 06:46:59 [DEBUG] clck_gen.py:128 IND CLOCK 816
2025-03-30 06:46:59 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:46:59 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:46:59 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:46:59 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:47:00 [DEBUG] clck_gen.py:128 IND CLOCK 918
2025-03-30 06:47:00 [DEBUG] clck_gen.py:128 IND CLOCK 1020
2025-03-30 06:47:00 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:47:00 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:47:00 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:47:00 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:47:00 [DEBUG] clck_gen.py:128 IND CLOCK 1122
2025-03-30 06:47:01 [DEBUG] clck_gen.py:128 IND CLOCK 1224
2025-03-30 06:47:01 [DEBUG] clck_gen.py:128 IND CLOCK 1326
2025-03-30 06:47:02 [DEBUG] clck_gen.py:128 IND CLOCK 1428
2025-03-30 06:47:02 [DEBUG] clck_gen.py:128 IND CLOCK 1530
2025-03-30 06:47:03 [DEBUG] clck_gen.py:128 IND CLOCK 1632
2025-03-30 06:47:03 [DEBUG] clck_gen.py:128 IND CLOCK 1734
2025-03-30 06:47:04 [DEBUG] clck_gen.py:128 IND CLOCK 1836
2025-03-30 06:47:04 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:47:04 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:47:04 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:47:04 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:47:04 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:47:04 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:47:04 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:47:04 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:47:04 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:47:04 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 06:47:04 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 06:47:04 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 06:47:04 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:47:09 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 06:47:09 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 06:47:09 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:47:09 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:47:09 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:47:09 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:47:09 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:47:09 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 06:47:09 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:47:09 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 06:47:09 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 06:47:09 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 06:47:09 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 06:47:09 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 06:47:09 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:47:09 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:47:09 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 06:47:09 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 06:47:09 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 06:47:09 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 06:47:09 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 06:47:09 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 06:47:09 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:47:09 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:47:09 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 06:47:09 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 06:47:09 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 06:47:09 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 06:47:09 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 06:47:09 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 06:47:09 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:47:09 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:47:09 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 06:47:09 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 06:47:09 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 06:47:09 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 06:47:09 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 06:47:09 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 06:47:09 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 06:47:09 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 06:47:09 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 06:47:09 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 06:47:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 06:47:09 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:47:09 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 06:47:09 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 06:47:09 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:47:09 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:47:09 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 06:47:09 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 06:47:09 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 06:47:09 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 06:47:09 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:47:09 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:47:09 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:47:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 06:47:09 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:47:09 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:47:09 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:47:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:47:09 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:47:09 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:47:09 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:47:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:47:09 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:47:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:47:09 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:47:09 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:47:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:47:09 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:47:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:47:09 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:47:09 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:47:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:47:09 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:47:09 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:47:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:47:09 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:47:09 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:47:09 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:47:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:47:09 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:47:09 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:47:09 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:47:09 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:47:09 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 06:47:09 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 06:47:09 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 06:47:09 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:47:14 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 06:47:14 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 06:47:14 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:47:14 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:47:14 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:47:14 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:47:14 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:47:14 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 06:47:14 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:47:14 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 06:47:14 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 06:47:14 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 06:47:14 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 06:47:14 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 06:47:14 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:47:14 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:47:14 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 06:47:14 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 06:47:14 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 06:47:14 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 06:47:14 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 06:47:14 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 06:47:14 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:47:14 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:47:14 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 06:47:14 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 06:47:14 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 06:47:14 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 06:47:14 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 06:47:14 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 06:47:14 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:47:14 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:47:14 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 06:47:14 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 06:47:14 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 06:47:14 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 06:47:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 06:47:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 06:47:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 06:47:14 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 06:47:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 06:47:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 06:47:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 06:47:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:47:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 06:47:14 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 06:47:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:47:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:47:14 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 06:47:14 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 06:47:14 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 06:47:14 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 06:47:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:47:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:47:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:47:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 06:47:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:47:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:47:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:47:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:47:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:47:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:47:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:47:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:47:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:47:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:47:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:47:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:47:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:47:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:47:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:47:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:47:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:47:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:47:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:47:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:47:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:47:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:47:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:47:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:47:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:47:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:47:14 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-03-30 06:47:14 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-03-30 06:47:14 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-03-30 06:47:14 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-03-30 06:47:14 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-03-30 06:47:14 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-03-30 06:47:14 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-03-30 06:47:14 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-03-30 06:47:14 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-03-30 06:47:14 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-03-30 06:47:14 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=0 bl=148 pwr=0
2025-03-30 06:47:14 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=1 bl=148 pwr=0
2025-03-30 06:47:14 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=2 bl=148 pwr=0
2025-03-30 06:47:14 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=3 bl=148 pwr=0
2025-03-30 06:47:14 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=4 bl=148 pwr=0
2025-03-30 06:47:14 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=5 bl=148 pwr=0
2025-03-30 06:47:14 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=6 bl=148 pwr=0
2025-03-30 06:47:14 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=7 bl=148 pwr=0
2025-03-30 06:47:14 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 06:47:14 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 06:47:14 [DEBUG] fake_trx.py:317 (BTS@172.18.26.20:5700) Recv FAKE_CI cmd
2025-03-30 06:47:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:47:14 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:47:14 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:47:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:47:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:47:14 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:47:14 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:47:14 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:47:14 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:47:15 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-03-30 06:47:15 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:47:15 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:47:15 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:47:15 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:47:15 [DEBUG] clck_gen.py:128 IND CLOCK 306
2025-03-30 06:47:16 [DEBUG] clck_gen.py:128 IND CLOCK 408
2025-03-30 06:47:16 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:47:16 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:47:16 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:47:16 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:47:16 [DEBUG] clck_gen.py:128 IND CLOCK 510
2025-03-30 06:47:17 [DEBUG] clck_gen.py:128 IND CLOCK 612
2025-03-30 06:47:17 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:47:17 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:47:17 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:47:17 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:47:17 [DEBUG] clck_gen.py:128 IND CLOCK 714
2025-03-30 06:47:18 [DEBUG] clck_gen.py:128 IND CLOCK 816
2025-03-30 06:47:18 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:47:18 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:47:18 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:47:18 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:47:18 [DEBUG] clck_gen.py:128 IND CLOCK 918
2025-03-30 06:47:19 [DEBUG] clck_gen.py:128 IND CLOCK 1020
2025-03-30 06:47:19 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:47:19 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:47:19 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:47:19 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:47:19 [DEBUG] clck_gen.py:128 IND CLOCK 1122
2025-03-30 06:47:20 [DEBUG] clck_gen.py:128 IND CLOCK 1224
2025-03-30 06:47:20 [DEBUG] clck_gen.py:128 IND CLOCK 1326
2025-03-30 06:47:21 [DEBUG] clck_gen.py:128 IND CLOCK 1428
2025-03-30 06:47:21 [DEBUG] clck_gen.py:128 IND CLOCK 1530
2025-03-30 06:47:21 [WARNING] clck_gen.py:108 CLCKGen: time overrun by -16693us; resetting the clock
2025-03-30 06:47:21 [DEBUG] clck_gen.py:128 IND CLOCK 1632
2025-03-30 06:47:22 [DEBUG] clck_gen.py:128 IND CLOCK 1734
2025-03-30 06:47:22 [DEBUG] clck_gen.py:128 IND CLOCK 1836
2025-03-30 06:47:23 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:47:23 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:47:23 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:47:23 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:47:23 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:47:23 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:47:23 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:47:23 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:47:23 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:47:23 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 06:47:23 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 06:47:23 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 06:47:23 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:47:28 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 06:47:28 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 06:47:28 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:47:28 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:47:28 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:47:28 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:47:28 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:47:28 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 06:47:28 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:47:28 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 06:47:28 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 06:47:28 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 06:47:28 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 06:47:28 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 06:47:28 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:47:28 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:47:28 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 06:47:28 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 06:47:28 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 06:47:28 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 06:47:28 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 06:47:28 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 06:47:28 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:47:28 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:47:28 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 06:47:28 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 06:47:28 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 06:47:28 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 06:47:28 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 06:47:28 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 06:47:28 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:47:28 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:47:28 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 06:47:28 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 06:47:28 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 06:47:28 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 06:47:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 06:47:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 06:47:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 06:47:28 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 06:47:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 06:47:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 06:47:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 06:47:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:47:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 06:47:28 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 06:47:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:47:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:47:28 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 06:47:28 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 06:47:28 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 06:47:28 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 06:47:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:47:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:47:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:47:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 06:47:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:47:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:47:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:47:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:47:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:47:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:47:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:47:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:47:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:47:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:47:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:47:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:47:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:47:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:47:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:47:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:47:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:47:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:47:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:47:28 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:47:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:47:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:47:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:47:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:47:28 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:47:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:47:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:47:28 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:47:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:47:28 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 06:47:28 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 06:47:28 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 06:47:28 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:47:33 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 06:47:33 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 06:47:33 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:47:33 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:47:33 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:47:33 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:47:33 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:47:33 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 06:47:33 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:47:33 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 06:47:33 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 06:47:33 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 06:47:33 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 06:47:33 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 06:47:33 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:47:33 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:47:33 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 06:47:33 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 06:47:33 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 06:47:33 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 06:47:33 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 06:47:33 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 06:47:33 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:47:33 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:47:33 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 06:47:33 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 06:47:33 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 06:47:33 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 06:47:33 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 06:47:33 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 06:47:33 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:47:33 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:47:33 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 06:47:33 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 06:47:33 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 06:47:33 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 06:47:33 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 06:47:33 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 06:47:33 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 06:47:33 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 06:47:33 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 06:47:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 06:47:33 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 06:47:33 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 06:47:33 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 06:47:33 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:47:33 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:47:33 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 06:47:33 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 06:47:33 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 06:47:33 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 06:47:33 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:47:33 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:47:33 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:47:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 06:47:33 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:47:33 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:47:33 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:47:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:47:33 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:47:33 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:47:33 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:47:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:47:33 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:47:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:47:33 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:47:33 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:47:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:47:33 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:47:33 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:47:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:47:33 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:47:33 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:47:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:47:33 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:47:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:47:33 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:47:33 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:47:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:47:33 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:47:33 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:47:33 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:47:33 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-03-30 06:47:33 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-03-30 06:47:33 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-03-30 06:47:33 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-03-30 06:47:33 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-03-30 06:47:33 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-03-30 06:47:33 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-03-30 06:47:33 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-03-30 06:47:33 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-03-30 06:47:33 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-03-30 06:47:33 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=0 bl=148 pwr=0
2025-03-30 06:47:33 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=1 bl=148 pwr=0
2025-03-30 06:47:33 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=2 bl=148 pwr=0
2025-03-30 06:47:33 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=3 bl=148 pwr=0
2025-03-30 06:47:33 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=4 bl=148 pwr=0
2025-03-30 06:47:33 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=5 bl=148 pwr=0
2025-03-30 06:47:33 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=6 bl=148 pwr=0
2025-03-30 06:47:33 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=7 bl=148 pwr=0
2025-03-30 06:47:33 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 06:47:33 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 06:47:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:47:33 [DEBUG] fake_trx.py:317 (BTS@172.18.26.20:5700) Recv FAKE_CI cmd
2025-03-30 06:47:33 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:47:33 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:47:33 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:47:33 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:47:33 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:47:33 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:47:33 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:47:33 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:47:34 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-03-30 06:47:34 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:47:34 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:47:34 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:47:34 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:47:34 [DEBUG] clck_gen.py:128 IND CLOCK 306
2025-03-30 06:47:34 [DEBUG] clck_gen.py:128 IND CLOCK 408
2025-03-30 06:47:35 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:47:35 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:47:35 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:47:35 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:47:35 [DEBUG] clck_gen.py:128 IND CLOCK 510
2025-03-30 06:47:35 [DEBUG] clck_gen.py:128 IND CLOCK 612
2025-03-30 06:47:36 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:47:36 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:47:36 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:47:36 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:47:36 [DEBUG] clck_gen.py:128 IND CLOCK 714
2025-03-30 06:47:36 [DEBUG] clck_gen.py:128 IND CLOCK 816
2025-03-30 06:47:37 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:47:37 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:47:37 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:47:37 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:47:37 [DEBUG] clck_gen.py:128 IND CLOCK 918
2025-03-30 06:47:37 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=923): ver=1 fn=921 tn=0 bl=148 pwr=0
2025-03-30 06:47:37 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=923): ver=1 fn=921 tn=1 bl=148 pwr=0
2025-03-30 06:47:37 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=923): ver=1 fn=921 tn=2 bl=148 pwr=0
2025-03-30 06:47:37 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=923): ver=1 fn=921 tn=3 bl=148 pwr=0
2025-03-30 06:47:37 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=923): ver=1 fn=921 tn=4 bl=148 pwr=0
2025-03-30 06:47:37 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=923): ver=1 fn=921 tn=5 bl=148 pwr=0
2025-03-30 06:47:37 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=923): ver=1 fn=921 tn=6 bl=148 pwr=0
2025-03-30 06:47:37 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=923): ver=1 fn=921 tn=7 bl=148 pwr=0
2025-03-30 06:47:37 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=923): ver=1 fn=922 tn=0 bl=148 pwr=0
2025-03-30 06:47:37 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=923): ver=1 fn=922 tn=1 bl=148 pwr=0
2025-03-30 06:47:37 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=923): ver=1 fn=922 tn=2 bl=148 pwr=0
2025-03-30 06:47:37 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=923): ver=1 fn=922 tn=3 bl=148 pwr=0
2025-03-30 06:47:37 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=923): ver=1 fn=922 tn=4 bl=148 pwr=0
2025-03-30 06:47:37 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=923): ver=1 fn=922 tn=5 bl=148 pwr=0
2025-03-30 06:47:37 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=923): ver=1 fn=922 tn=6 bl=148 pwr=0
2025-03-30 06:47:37 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=923): ver=1 fn=922 tn=7 bl=148 pwr=0
2025-03-30 06:47:37 [DEBUG] clck_gen.py:128 IND CLOCK 1020
2025-03-30 06:47:38 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:47:38 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:47:38 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:47:38 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:47:38 [DEBUG] clck_gen.py:128 IND CLOCK 1122
2025-03-30 06:47:38 [DEBUG] clck_gen.py:128 IND CLOCK 1224
2025-03-30 06:47:39 [DEBUG] clck_gen.py:128 IND CLOCK 1326
2025-03-30 06:47:39 [DEBUG] clck_gen.py:128 IND CLOCK 1428
2025-03-30 06:47:40 [DEBUG] clck_gen.py:128 IND CLOCK 1530
2025-03-30 06:47:40 [DEBUG] clck_gen.py:128 IND CLOCK 1632
2025-03-30 06:47:41 [DEBUG] clck_gen.py:128 IND CLOCK 1734
2025-03-30 06:47:41 [DEBUG] clck_gen.py:128 IND CLOCK 1836
2025-03-30 06:47:41 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:47:41 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:47:41 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:47:41 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:47:41 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:47:41 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:47:41 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:47:41 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:47:41 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 06:47:41 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 06:47:41 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:47:41 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:47:41 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 06:47:46 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 06:47:46 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 06:47:46 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:47:46 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:47:46 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:47:46 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:47:46 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:47:46 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 06:47:46 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:47:46 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 06:47:46 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 06:47:46 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 06:47:46 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 06:47:46 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 06:47:46 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:47:46 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:47:46 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 06:47:46 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 06:47:46 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 06:47:46 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 06:47:46 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 06:47:46 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 06:47:46 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:47:46 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:47:46 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 06:47:46 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 06:47:46 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 06:47:46 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 06:47:46 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 06:47:46 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 06:47:46 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:47:46 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:47:46 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 06:47:46 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 06:47:46 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 06:47:46 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 06:47:46 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 06:47:46 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 06:47:46 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 06:47:46 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 06:47:46 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 06:47:46 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 06:47:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 06:47:46 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:47:46 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 06:47:46 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 06:47:46 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:47:46 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:47:46 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 06:47:46 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 06:47:46 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 06:47:46 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 06:47:46 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:47:46 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:47:46 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:47:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 06:47:46 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:47:46 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:47:46 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:47:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:47:46 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:47:46 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:47:46 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:47:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:47:46 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:47:46 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:47:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:47:46 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:47:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:47:46 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:47:46 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:47:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:47:46 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:47:46 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:47:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:47:46 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:47:46 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:47:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:47:46 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:47:46 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:47:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:47:46 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:47:46 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:47:46 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:47:46 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:47:46 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 06:47:46 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 06:47:46 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 06:47:46 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:47:51 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 06:47:51 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 06:47:51 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:47:51 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:47:51 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:47:51 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:47:51 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:47:51 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 06:47:51 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:47:51 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 06:47:51 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 06:47:51 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 06:47:51 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 06:47:51 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 06:47:51 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:47:51 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:47:51 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 06:47:51 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 06:47:51 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 06:47:51 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 06:47:51 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 06:47:51 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 06:47:51 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:47:51 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:47:51 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 06:47:51 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 06:47:51 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 06:47:51 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 06:47:51 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 06:47:51 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 06:47:51 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:47:51 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:47:51 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 06:47:51 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 06:47:51 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 06:47:51 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 06:47:51 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 06:47:51 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 06:47:51 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 06:47:51 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 06:47:51 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 06:47:51 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 06:47:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 06:47:51 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:47:51 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 06:47:51 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 06:47:51 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:47:51 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:47:51 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 06:47:51 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 06:47:51 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 06:47:51 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 06:47:51 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:47:51 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:47:51 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:47:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 06:47:51 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:47:51 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:47:51 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:47:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:47:51 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:47:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:47:51 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:47:51 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:47:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:47:51 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:47:51 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:47:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:47:51 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:47:51 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:47:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:47:51 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:47:51 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:47:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:47:51 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:47:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:47:51 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:47:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:47:51 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:47:51 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:47:51 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:47:51 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:47:51 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-03-30 06:47:52 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-03-30 06:47:52 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-03-30 06:47:52 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-03-30 06:47:52 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-03-30 06:47:52 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-03-30 06:47:52 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-03-30 06:47:52 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-03-30 06:47:52 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-03-30 06:47:52 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-03-30 06:47:52 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 06:47:52 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 06:47:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:47:52 [DEBUG] fake_trx.py:317 (BTS@172.18.26.20:5700) Recv FAKE_CI cmd
2025-03-30 06:47:52 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:47:52 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:47:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:47:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:47:52 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:47:52 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:47:52 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:47:52 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:47:52 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-03-30 06:47:52 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:47:52 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:47:52 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:47:52 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:47:53 [DEBUG] clck_gen.py:128 IND CLOCK 306
2025-03-30 06:47:53 [DEBUG] clck_gen.py:128 IND CLOCK 408
2025-03-30 06:47:53 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:47:53 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:47:53 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:47:53 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:47:54 [DEBUG] clck_gen.py:128 IND CLOCK 510
2025-03-30 06:47:54 [DEBUG] clck_gen.py:128 IND CLOCK 612
2025-03-30 06:47:54 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:47:54 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:47:54 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:47:54 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:47:55 [DEBUG] clck_gen.py:128 IND CLOCK 714
2025-03-30 06:47:55 [DEBUG] clck_gen.py:128 IND CLOCK 816
2025-03-30 06:47:55 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:47:55 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:47:55 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:47:55 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:47:56 [DEBUG] clck_gen.py:128 IND CLOCK 918
2025-03-30 06:47:56 [DEBUG] clck_gen.py:128 IND CLOCK 1020
2025-03-30 06:47:56 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:47:56 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:47:56 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:47:56 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:47:56 [DEBUG] clck_gen.py:128 IND CLOCK 1122
2025-03-30 06:47:57 [DEBUG] clck_gen.py:128 IND CLOCK 1224
2025-03-30 06:47:57 [DEBUG] clck_gen.py:128 IND CLOCK 1326
2025-03-30 06:47:58 [DEBUG] clck_gen.py:128 IND CLOCK 1428
2025-03-30 06:47:58 [DEBUG] clck_gen.py:128 IND CLOCK 1530
2025-03-30 06:47:59 [DEBUG] clck_gen.py:128 IND CLOCK 1632
2025-03-30 06:47:59 [DEBUG] clck_gen.py:128 IND CLOCK 1734
2025-03-30 06:48:00 [DEBUG] clck_gen.py:128 IND CLOCK 1836
2025-03-30 06:48:00 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:48:00 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:48:00 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:48:00 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:48:00 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:48:00 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:48:00 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:48:00 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:48:00 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:48:00 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:48:00 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 06:48:00 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 06:48:00 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 06:48:05 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 06:48:05 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 06:48:05 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:48:05 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:48:05 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:48:05 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:48:05 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:48:05 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 06:48:05 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:48:05 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 06:48:05 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 06:48:05 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 06:48:05 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 06:48:05 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 06:48:05 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:48:05 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:48:05 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 06:48:05 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 06:48:05 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 06:48:05 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 06:48:05 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 06:48:05 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 06:48:05 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:48:05 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:48:05 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 06:48:05 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 06:48:05 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 06:48:05 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 06:48:05 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 06:48:05 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 06:48:05 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:48:05 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:48:05 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 06:48:05 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 06:48:05 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 06:48:05 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 06:48:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 06:48:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 06:48:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 06:48:05 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 06:48:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 06:48:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 06:48:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 06:48:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:48:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 06:48:05 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 06:48:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:48:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:48:05 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 06:48:05 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 06:48:05 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 06:48:05 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 06:48:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:48:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:48:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:48:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 06:48:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:48:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:48:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:48:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:48:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:48:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:48:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:48:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:48:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:48:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:48:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:48:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:48:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:48:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:48:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:48:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:48:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:48:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:48:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:48:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:48:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:48:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:48:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:48:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:48:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:48:05 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:48:05 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:48:05 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 06:48:05 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 06:48:05 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 06:48:05 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:48:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:48:10 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 06:48:10 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 06:48:10 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:48:10 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:48:10 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:48:10 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:48:10 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:48:10 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 06:48:10 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:48:10 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 06:48:10 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 06:48:10 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 06:48:10 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 06:48:10 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 06:48:10 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:48:10 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:48:10 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 06:48:10 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 06:48:10 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 06:48:10 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 06:48:10 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 06:48:10 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 06:48:10 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:48:10 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:48:10 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 06:48:10 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 06:48:10 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 06:48:10 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 06:48:10 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 06:48:10 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 06:48:10 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:48:10 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:48:10 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 06:48:10 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 06:48:10 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 06:48:10 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 06:48:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 06:48:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 06:48:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 06:48:10 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 06:48:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 06:48:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 06:48:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 06:48:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 06:48:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:48:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:48:10 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 06:48:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:48:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:48:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:48:10 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 06:48:10 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 06:48:10 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 06:48:10 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 06:48:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:48:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:48:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:48:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 06:48:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:48:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:48:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:48:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:48:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:48:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:48:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:48:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:48:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:48:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:48:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:48:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:48:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:48:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:48:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:48:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:48:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:48:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:48:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:48:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:48:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:48:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:48:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:48:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:48:10 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-03-30 06:48:10 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-03-30 06:48:10 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-03-30 06:48:10 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-03-30 06:48:10 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-03-30 06:48:10 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-03-30 06:48:10 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-03-30 06:48:10 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-03-30 06:48:10 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-03-30 06:48:10 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-03-30 06:48:10 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=0 bl=148 pwr=0
2025-03-30 06:48:10 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=1 bl=148 pwr=0
2025-03-30 06:48:10 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=2 bl=148 pwr=0
2025-03-30 06:48:10 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=3 bl=148 pwr=0
2025-03-30 06:48:10 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=4 bl=148 pwr=0
2025-03-30 06:48:10 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=5 bl=148 pwr=0
2025-03-30 06:48:10 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=6 bl=148 pwr=0
2025-03-30 06:48:10 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=7 bl=148 pwr=0
2025-03-30 06:48:10 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 06:48:10 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 06:48:10 [DEBUG] fake_trx.py:317 (BTS@172.18.26.20:5700) Recv FAKE_CI cmd
2025-03-30 06:48:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:48:10 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:48:10 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:48:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:48:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:48:10 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:48:10 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:48:10 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:48:10 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:48:11 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-03-30 06:48:11 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:48:11 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:48:11 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:48:11 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:48:11 [DEBUG] clck_gen.py:128 IND CLOCK 306
2025-03-30 06:48:12 [DEBUG] clck_gen.py:128 IND CLOCK 408
2025-03-30 06:48:12 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:48:12 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:48:12 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:48:12 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:48:12 [DEBUG] clck_gen.py:128 IND CLOCK 510
2025-03-30 06:48:13 [DEBUG] clck_gen.py:128 IND CLOCK 612
2025-03-30 06:48:13 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:48:13 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:48:13 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:48:13 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:48:13 [DEBUG] clck_gen.py:128 IND CLOCK 714
2025-03-30 06:48:14 [DEBUG] clck_gen.py:128 IND CLOCK 816
2025-03-30 06:48:14 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:48:14 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:48:14 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:48:14 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:48:14 [DEBUG] clck_gen.py:128 IND CLOCK 918
2025-03-30 06:48:15 [DEBUG] clck_gen.py:128 IND CLOCK 1020
2025-03-30 06:48:15 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:48:15 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:48:15 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:48:15 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:48:15 [DEBUG] clck_gen.py:128 IND CLOCK 1122
2025-03-30 06:48:16 [DEBUG] clck_gen.py:128 IND CLOCK 1224
2025-03-30 06:48:16 [DEBUG] clck_gen.py:128 IND CLOCK 1326
2025-03-30 06:48:17 [DEBUG] clck_gen.py:128 IND CLOCK 1428
2025-03-30 06:48:17 [DEBUG] clck_gen.py:128 IND CLOCK 1530
2025-03-30 06:48:17 [DEBUG] clck_gen.py:128 IND CLOCK 1632
2025-03-30 06:48:18 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=1638): ver=1 fn=1635 tn=0 bl=148 pwr=0
2025-03-30 06:48:18 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=1638): ver=1 fn=1635 tn=1 bl=148 pwr=0
2025-03-30 06:48:18 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=1638): ver=1 fn=1635 tn=2 bl=148 pwr=0
2025-03-30 06:48:18 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=1638): ver=1 fn=1635 tn=3 bl=148 pwr=0
2025-03-30 06:48:18 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=1638): ver=1 fn=1635 tn=4 bl=148 pwr=0
2025-03-30 06:48:18 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=1638): ver=1 fn=1635 tn=5 bl=148 pwr=0
2025-03-30 06:48:18 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=1638): ver=1 fn=1635 tn=6 bl=148 pwr=0
2025-03-30 06:48:18 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=1638): ver=1 fn=1635 tn=7 bl=148 pwr=0
2025-03-30 06:48:18 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=1639): ver=1 fn=1636 tn=0 bl=148 pwr=0
2025-03-30 06:48:18 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=1639): ver=1 fn=1636 tn=1 bl=148 pwr=0
2025-03-30 06:48:18 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=1639): ver=1 fn=1636 tn=2 bl=148 pwr=0
2025-03-30 06:48:18 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=1639): ver=1 fn=1636 tn=3 bl=148 pwr=0
2025-03-30 06:48:18 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=1639): ver=1 fn=1636 tn=4 bl=148 pwr=0
2025-03-30 06:48:18 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=1639): ver=1 fn=1636 tn=5 bl=148 pwr=0
2025-03-30 06:48:18 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=1639): ver=1 fn=1636 tn=6 bl=148 pwr=0
2025-03-30 06:48:18 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=1639): ver=1 fn=1636 tn=7 bl=148 pwr=0
2025-03-30 06:48:18 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=1639): ver=1 fn=1637 tn=0 bl=148 pwr=0
2025-03-30 06:48:18 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=1639): ver=1 fn=1637 tn=1 bl=148 pwr=0
2025-03-30 06:48:18 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=1639): ver=1 fn=1637 tn=2 bl=148 pwr=0
2025-03-30 06:48:18 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=1639): ver=1 fn=1637 tn=3 bl=148 pwr=0
2025-03-30 06:48:18 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=1639): ver=1 fn=1637 tn=4 bl=148 pwr=0
2025-03-30 06:48:18 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=1639): ver=1 fn=1637 tn=5 bl=148 pwr=0
2025-03-30 06:48:18 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=1639): ver=1 fn=1637 tn=6 bl=148 pwr=0
2025-03-30 06:48:18 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=1639): ver=1 fn=1637 tn=7 bl=148 pwr=0
2025-03-30 06:48:18 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=1639): ver=1 fn=1638 tn=0 bl=148 pwr=0
2025-03-30 06:48:18 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=1639): ver=1 fn=1638 tn=1 bl=148 pwr=0
2025-03-30 06:48:18 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=1639): ver=1 fn=1638 tn=2 bl=148 pwr=0
2025-03-30 06:48:18 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=1639): ver=1 fn=1638 tn=3 bl=148 pwr=0
2025-03-30 06:48:18 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=1639): ver=1 fn=1638 tn=4 bl=148 pwr=0
2025-03-30 06:48:18 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=1639): ver=1 fn=1638 tn=5 bl=148 pwr=0
2025-03-30 06:48:18 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=1639): ver=1 fn=1638 tn=6 bl=148 pwr=0
2025-03-30 06:48:18 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=1639): ver=1 fn=1638 tn=7 bl=148 pwr=0
2025-03-30 06:48:18 [DEBUG] clck_gen.py:128 IND CLOCK 1734
2025-03-30 06:48:18 [DEBUG] clck_gen.py:128 IND CLOCK 1836
2025-03-30 06:48:19 [DEBUG] clck_gen.py:128 IND CLOCK 1938
2025-03-30 06:48:19 [DEBUG] clck_gen.py:128 IND CLOCK 2040
2025-03-30 06:48:20 [DEBUG] clck_gen.py:128 IND CLOCK 2142
2025-03-30 06:48:20 [DEBUG] clck_gen.py:128 IND CLOCK 2244
2025-03-30 06:48:21 [DEBUG] clck_gen.py:128 IND CLOCK 2346
2025-03-30 06:48:21 [DEBUG] clck_gen.py:128 IND CLOCK 2448
2025-03-30 06:48:22 [DEBUG] clck_gen.py:128 IND CLOCK 2550
2025-03-30 06:48:22 [DEBUG] clck_gen.py:128 IND CLOCK 2652
2025-03-30 06:48:23 [DEBUG] clck_gen.py:128 IND CLOCK 2754
2025-03-30 06:48:23 [DEBUG] clck_gen.py:128 IND CLOCK 2856
2025-03-30 06:48:24 [DEBUG] clck_gen.py:128 IND CLOCK 2958
2025-03-30 06:48:24 [DEBUG] clck_gen.py:128 IND CLOCK 3060
2025-03-30 06:48:25 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:48:25 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:48:25 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:48:25 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:48:25 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:48:25 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:48:25 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:48:25 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:48:25 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:48:25 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:48:25 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 06:48:25 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 06:48:25 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 06:48:25 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=3161 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:48:25 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=3161 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:48:25 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=3161 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:48:25 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=3161 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:48:25 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=3161 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:48:25 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=3161 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:48:25 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=3161 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:48:25 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=3161 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:48:30 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 06:48:30 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 06:48:30 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:48:30 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:48:30 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:48:30 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:48:30 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:48:30 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 06:48:30 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:48:30 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 06:48:30 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 06:48:30 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 06:48:30 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 06:48:30 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 06:48:30 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:48:30 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:48:30 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 06:48:30 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 06:48:30 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 06:48:30 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 06:48:30 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 06:48:30 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 06:48:30 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:48:30 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:48:30 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 06:48:30 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 06:48:30 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 06:48:30 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 06:48:30 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 06:48:30 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 06:48:30 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:48:30 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:48:30 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 06:48:30 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 06:48:30 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 06:48:30 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 06:48:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 06:48:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 06:48:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 06:48:30 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 06:48:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 06:48:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 06:48:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 06:48:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:48:30 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 06:48:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:48:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 06:48:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:48:30 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 06:48:30 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 06:48:30 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 06:48:30 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 06:48:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:48:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:48:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:48:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 06:48:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:48:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:48:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:48:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:48:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:48:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:48:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:48:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:48:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:48:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:48:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:48:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:48:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:48:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:48:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:48:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:48:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:48:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:48:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:48:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:48:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:48:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:48:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:48:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:48:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:48:30 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:48:30 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:48:30 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:48:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:48:30 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 06:48:30 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 06:48:30 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 06:48:30 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:48:35 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 06:48:35 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 06:48:35 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:48:35 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:48:35 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:48:35 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:48:35 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:48:35 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 06:48:35 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:48:35 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 06:48:35 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 06:48:35 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 06:48:35 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 06:48:35 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 06:48:35 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:48:35 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:48:35 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 06:48:35 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 06:48:35 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 06:48:35 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 06:48:35 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 06:48:35 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 06:48:35 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:48:35 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:48:35 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 06:48:35 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 06:48:35 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 06:48:35 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 06:48:35 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 06:48:35 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 06:48:35 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:48:35 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:48:35 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 06:48:35 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 06:48:35 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 06:48:35 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 06:48:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 06:48:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 06:48:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 06:48:35 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 06:48:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 06:48:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 06:48:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 06:48:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:48:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 06:48:35 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 06:48:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:48:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:48:35 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 06:48:35 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 06:48:35 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 06:48:35 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 06:48:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:48:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:48:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:48:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 06:48:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:48:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:48:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:48:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:48:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:48:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:48:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:48:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:48:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:48:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:48:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:48:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:48:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:48:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:48:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:48:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:48:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:48:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:48:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:48:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:48:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:48:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:48:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:48:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:48:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:48:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:48:35 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-03-30 06:48:35 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-03-30 06:48:35 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-03-30 06:48:35 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-03-30 06:48:35 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-03-30 06:48:35 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-03-30 06:48:35 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-03-30 06:48:35 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-03-30 06:48:35 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-03-30 06:48:35 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-03-30 06:48:35 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=0 bl=148 pwr=0
2025-03-30 06:48:35 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=1 bl=148 pwr=0
2025-03-30 06:48:35 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=2 bl=148 pwr=0
2025-03-30 06:48:35 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=3 bl=148 pwr=0
2025-03-30 06:48:35 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=4 bl=148 pwr=0
2025-03-30 06:48:35 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=5 bl=148 pwr=0
2025-03-30 06:48:35 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=6 bl=148 pwr=0
2025-03-30 06:48:35 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=7 bl=148 pwr=0
2025-03-30 06:48:35 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 06:48:35 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 06:48:35 [DEBUG] fake_trx.py:317 (BTS@172.18.26.20:5700) Recv FAKE_CI cmd
2025-03-30 06:48:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:48:35 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:48:35 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:48:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:48:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:48:35 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:48:35 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:48:35 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:48:35 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:48:36 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-03-30 06:48:36 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:48:36 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:48:36 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:48:36 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:48:36 [DEBUG] clck_gen.py:128 IND CLOCK 306
2025-03-30 06:48:36 [DEBUG] clck_gen.py:128 IND CLOCK 408
2025-03-30 06:48:37 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:48:37 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:48:37 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:48:37 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:48:37 [DEBUG] clck_gen.py:128 IND CLOCK 510
2025-03-30 06:48:37 [DEBUG] clck_gen.py:128 IND CLOCK 612
2025-03-30 06:48:38 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:48:38 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:48:38 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:48:38 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:48:38 [DEBUG] clck_gen.py:128 IND CLOCK 714
2025-03-30 06:48:38 [DEBUG] clck_gen.py:128 IND CLOCK 816
2025-03-30 06:48:39 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:48:39 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:48:39 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:48:39 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:48:39 [DEBUG] clck_gen.py:128 IND CLOCK 918
2025-03-30 06:48:39 [DEBUG] clck_gen.py:128 IND CLOCK 1020
2025-03-30 06:48:40 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:48:40 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:48:40 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:48:40 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:48:40 [DEBUG] clck_gen.py:128 IND CLOCK 1122
2025-03-30 06:48:40 [DEBUG] clck_gen.py:128 IND CLOCK 1224
2025-03-30 06:48:41 [DEBUG] clck_gen.py:128 IND CLOCK 1326
2025-03-30 06:48:41 [DEBUG] clck_gen.py:128 IND CLOCK 1428
2025-03-30 06:48:42 [DEBUG] clck_gen.py:128 IND CLOCK 1530
2025-03-30 06:48:42 [DEBUG] clck_gen.py:128 IND CLOCK 1632
2025-03-30 06:48:43 [DEBUG] clck_gen.py:128 IND CLOCK 1734
2025-03-30 06:48:43 [DEBUG] clck_gen.py:128 IND CLOCK 1836
2025-03-30 06:48:43 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:48:43 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:48:43 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:48:43 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:48:43 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:48:43 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:48:43 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:48:43 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:48:43 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:48:43 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:48:43 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 06:48:43 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 06:48:43 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 06:48:43 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=1862 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:48:43 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=1862 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:48:48 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 06:48:48 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 06:48:48 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:48:48 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:48:48 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:48:48 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:48:48 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:48:48 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 06:48:48 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:48:48 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 06:48:48 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 06:48:48 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 06:48:48 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 06:48:48 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 06:48:48 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:48:48 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 06:48:48 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:48:48 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 06:48:48 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 06:48:48 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 06:48:48 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 06:48:48 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 06:48:48 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:48:48 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 06:48:48 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:48:48 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 06:48:48 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 06:48:48 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 06:48:48 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 06:48:48 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 06:48:48 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:48:48 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 06:48:48 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:48:48 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 06:48:48 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 06:48:48 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 06:48:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 06:48:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 06:48:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 06:48:48 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 06:48:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 06:48:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 06:48:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 06:48:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:48:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 06:48:48 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 06:48:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:48:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:48:48 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 06:48:48 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 06:48:48 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 06:48:48 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 06:48:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:48:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:48:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:48:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 06:48:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:48:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:48:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:48:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:48:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:48:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:48:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:48:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:48:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:48:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:48:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:48:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:48:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:48:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:48:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:48:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:48:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:48:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:48:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:48:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:48:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:48:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:48:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:48:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:48:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:48:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:48:48 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:48:48 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:48:48 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:48:48 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:48:48 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 06:48:48 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 06:48:48 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 06:48:53 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 06:48:53 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 06:48:53 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:48:53 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:48:53 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:48:53 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:48:53 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:48:53 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 06:48:53 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:48:53 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 06:48:53 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 06:48:53 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 06:48:53 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 06:48:53 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 06:48:53 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:48:53 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:48:53 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 06:48:53 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 06:48:53 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 06:48:53 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 06:48:53 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 06:48:53 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 06:48:53 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:48:53 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:48:53 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 06:48:53 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 06:48:53 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 06:48:53 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 06:48:53 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 06:48:53 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 06:48:53 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:48:53 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:48:53 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 06:48:53 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 06:48:53 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 06:48:53 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 06:48:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 06:48:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 06:48:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 06:48:53 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 06:48:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 06:48:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 06:48:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 06:48:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:48:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 06:48:53 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 06:48:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:48:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:48:53 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 06:48:53 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 06:48:53 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 06:48:53 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 06:48:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:48:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:48:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:48:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 06:48:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:48:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:48:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:48:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:48:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:48:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:48:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:48:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:48:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:48:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:48:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:48:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:48:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:48:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:48:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:48:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:48:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:48:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:48:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:48:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:48:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:48:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:48:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:48:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:48:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:48:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:48:53 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-03-30 06:48:54 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-03-30 06:48:54 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-03-30 06:48:54 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-03-30 06:48:54 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-03-30 06:48:54 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-03-30 06:48:54 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-03-30 06:48:54 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-03-30 06:48:54 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-03-30 06:48:54 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-03-30 06:48:54 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=0 bl=148 pwr=0
2025-03-30 06:48:54 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=1 bl=148 pwr=0
2025-03-30 06:48:54 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=2 bl=148 pwr=0
2025-03-30 06:48:54 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=3 bl=148 pwr=0
2025-03-30 06:48:54 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=4 bl=148 pwr=0
2025-03-30 06:48:54 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=5 bl=148 pwr=0
2025-03-30 06:48:54 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=6 bl=148 pwr=0
2025-03-30 06:48:54 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=7 bl=148 pwr=0
2025-03-30 06:48:54 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 06:48:54 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 06:48:54 [DEBUG] fake_trx.py:317 (BTS@172.18.26.20:5700) Recv FAKE_CI cmd
2025-03-30 06:48:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:48:54 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:48:54 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:48:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:48:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:48:54 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:48:54 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:48:54 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:48:54 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:48:54 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-03-30 06:48:54 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:48:54 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:48:54 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:48:54 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:48:55 [DEBUG] clck_gen.py:128 IND CLOCK 306
2025-03-30 06:48:55 [DEBUG] clck_gen.py:128 IND CLOCK 408
2025-03-30 06:48:55 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:48:55 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:48:55 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:48:55 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:48:56 [DEBUG] clck_gen.py:128 IND CLOCK 510
2025-03-30 06:48:56 [DEBUG] clck_gen.py:128 IND CLOCK 612
2025-03-30 06:48:56 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:48:56 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:48:56 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:48:56 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:48:57 [DEBUG] clck_gen.py:128 IND CLOCK 714
2025-03-30 06:48:57 [DEBUG] clck_gen.py:128 IND CLOCK 816
2025-03-30 06:48:57 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:48:57 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:48:57 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:48:57 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:48:58 [DEBUG] clck_gen.py:128 IND CLOCK 918
2025-03-30 06:48:58 [DEBUG] clck_gen.py:128 IND CLOCK 1020
2025-03-30 06:48:58 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:48:58 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:48:58 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:48:58 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:48:58 [DEBUG] clck_gen.py:128 IND CLOCK 1122
2025-03-30 06:48:59 [DEBUG] clck_gen.py:128 IND CLOCK 1224
2025-03-30 06:48:59 [DEBUG] clck_gen.py:128 IND CLOCK 1326
2025-03-30 06:49:00 [DEBUG] clck_gen.py:128 IND CLOCK 1428
2025-03-30 06:49:00 [DEBUG] clck_gen.py:128 IND CLOCK 1530
2025-03-30 06:49:01 [DEBUG] clck_gen.py:128 IND CLOCK 1632
2025-03-30 06:49:01 [DEBUG] clck_gen.py:128 IND CLOCK 1734
2025-03-30 06:49:02 [DEBUG] clck_gen.py:128 IND CLOCK 1836
2025-03-30 06:49:02 [DEBUG] clck_gen.py:128 IND CLOCK 1938
2025-03-30 06:49:03 [DEBUG] clck_gen.py:128 IND CLOCK 2040
2025-03-30 06:49:03 [DEBUG] clck_gen.py:128 IND CLOCK 2142
2025-03-30 06:49:04 [DEBUG] clck_gen.py:128 IND CLOCK 2244
2025-03-30 06:49:04 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:49:04 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:49:04 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:49:04 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:49:04 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:49:04 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:49:04 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:49:04 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:49:04 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:49:04 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:49:04 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 06:49:04 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 06:49:04 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 06:49:04 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=2285 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:49:09 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 06:49:09 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 06:49:09 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:49:09 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:49:09 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:49:09 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:49:09 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:49:09 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 06:49:09 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:49:09 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 06:49:09 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 06:49:09 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 06:49:09 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 06:49:09 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 06:49:09 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:49:09 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:49:09 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 06:49:09 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 06:49:09 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 06:49:09 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 06:49:09 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 06:49:09 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 06:49:09 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:49:09 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:49:09 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 06:49:09 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 06:49:09 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 06:49:09 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 06:49:09 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 06:49:09 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 06:49:09 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:49:09 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 06:49:09 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:49:09 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 06:49:09 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 06:49:09 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 06:49:09 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 06:49:09 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 06:49:09 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 06:49:09 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 06:49:09 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 06:49:09 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 06:49:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 06:49:09 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:49:09 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 06:49:09 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 06:49:09 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:49:09 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:49:09 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 06:49:09 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 06:49:09 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 06:49:09 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 06:49:09 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:49:09 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:49:09 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:49:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 06:49:09 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:49:09 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:49:09 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:49:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:49:09 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:49:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:49:09 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:49:09 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:49:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:49:09 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:49:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:49:09 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:49:09 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:49:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:49:09 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:49:09 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:49:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:49:09 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:49:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:49:09 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:49:09 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:49:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:49:09 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:49:09 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:49:09 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:49:09 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:49:09 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:49:09 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 06:49:09 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 06:49:09 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 06:49:09 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:49:09 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:49:14 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 06:49:14 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 06:49:14 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:49:14 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:49:14 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:49:14 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:49:14 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:49:14 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 06:49:14 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:49:14 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 06:49:14 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 06:49:14 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 06:49:14 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 06:49:14 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 06:49:14 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:49:14 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:49:14 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 06:49:14 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 06:49:14 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 06:49:14 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 06:49:14 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 06:49:14 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 06:49:14 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:49:14 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:49:14 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 06:49:14 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 06:49:14 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 06:49:14 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 06:49:14 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 06:49:14 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 06:49:14 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:49:14 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:49:14 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 06:49:14 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 06:49:14 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 06:49:14 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 06:49:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 06:49:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 06:49:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 06:49:14 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 06:49:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 06:49:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 06:49:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 06:49:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:49:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 06:49:14 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 06:49:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:49:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:49:14 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 06:49:14 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 06:49:14 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 06:49:14 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 06:49:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:49:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:49:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:49:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 06:49:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:49:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:49:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:49:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:49:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:49:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:49:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:49:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:49:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:49:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:49:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:49:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:49:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:49:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:49:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:49:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:49:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:49:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:49:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:49:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:49:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:49:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:49:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:49:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:49:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:49:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:49:14 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-03-30 06:49:14 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-03-30 06:49:14 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-03-30 06:49:14 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-03-30 06:49:14 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-03-30 06:49:14 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-03-30 06:49:14 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-03-30 06:49:14 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-03-30 06:49:14 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-03-30 06:49:14 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-03-30 06:49:14 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=0 bl=148 pwr=0
2025-03-30 06:49:14 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=1 bl=148 pwr=0
2025-03-30 06:49:14 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=2 bl=148 pwr=0
2025-03-30 06:49:14 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=3 bl=148 pwr=0
2025-03-30 06:49:14 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=4 bl=148 pwr=0
2025-03-30 06:49:14 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=5 bl=148 pwr=0
2025-03-30 06:49:14 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=6 bl=148 pwr=0
2025-03-30 06:49:14 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=7 bl=148 pwr=0
2025-03-30 06:49:14 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 06:49:14 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 06:49:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:49:14 [DEBUG] fake_trx.py:317 (BTS@172.18.26.20:5700) Recv FAKE_CI cmd
2025-03-30 06:49:14 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:49:14 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:49:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:49:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:49:14 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:49:14 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:49:14 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:49:14 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:49:15 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-03-30 06:49:15 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:49:15 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:49:15 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:49:15 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:49:15 [DEBUG] clck_gen.py:128 IND CLOCK 306
2025-03-30 06:49:16 [DEBUG] clck_gen.py:128 IND CLOCK 408
2025-03-30 06:49:16 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:49:16 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:49:16 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:49:16 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:49:16 [DEBUG] clck_gen.py:128 IND CLOCK 510
2025-03-30 06:49:17 [DEBUG] clck_gen.py:128 IND CLOCK 612
2025-03-30 06:49:17 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:49:17 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:49:17 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:49:17 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:49:17 [DEBUG] clck_gen.py:128 IND CLOCK 714
2025-03-30 06:49:18 [DEBUG] clck_gen.py:128 IND CLOCK 816
2025-03-30 06:49:18 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:49:18 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:49:18 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:49:18 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:49:18 [DEBUG] clck_gen.py:128 IND CLOCK 918
2025-03-30 06:49:19 [DEBUG] clck_gen.py:128 IND CLOCK 1020
2025-03-30 06:49:19 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:49:19 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:49:19 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:49:19 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:49:19 [DEBUG] clck_gen.py:128 IND CLOCK 1122
2025-03-30 06:49:20 [DEBUG] clck_gen.py:128 IND CLOCK 1224
2025-03-30 06:49:20 [DEBUG] clck_gen.py:128 IND CLOCK 1326
2025-03-30 06:49:20 [DEBUG] clck_gen.py:128 IND CLOCK 1428
2025-03-30 06:49:21 [DEBUG] clck_gen.py:128 IND CLOCK 1530
2025-03-30 06:49:21 [DEBUG] clck_gen.py:128 IND CLOCK 1632
2025-03-30 06:49:22 [DEBUG] clck_gen.py:128 IND CLOCK 1734
2025-03-30 06:49:22 [DEBUG] clck_gen.py:128 IND CLOCK 1836
2025-03-30 06:49:23 [DEBUG] clck_gen.py:128 IND CLOCK 1938
2025-03-30 06:49:23 [DEBUG] clck_gen.py:128 IND CLOCK 2040
2025-03-30 06:49:24 [DEBUG] clck_gen.py:128 IND CLOCK 2142
2025-03-30 06:49:24 [DEBUG] clck_gen.py:128 IND CLOCK 2244
2025-03-30 06:49:25 [DEBUG] clck_gen.py:128 IND CLOCK 2346
2025-03-30 06:49:25 [DEBUG] clck_gen.py:128 IND CLOCK 2448
2025-03-30 06:49:25 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=2499): ver=1 fn=2498 tn=0 bl=148 pwr=0
2025-03-30 06:49:25 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=2499): ver=1 fn=2498 tn=1 bl=148 pwr=0
2025-03-30 06:49:25 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=2499): ver=1 fn=2498 tn=2 bl=148 pwr=0
2025-03-30 06:49:25 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=2499): ver=1 fn=2498 tn=3 bl=148 pwr=0
2025-03-30 06:49:25 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=2499): ver=1 fn=2498 tn=4 bl=148 pwr=0
2025-03-30 06:49:25 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=2499): ver=1 fn=2498 tn=5 bl=148 pwr=0
2025-03-30 06:49:25 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=2499): ver=1 fn=2498 tn=6 bl=148 pwr=0
2025-03-30 06:49:25 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=2499): ver=1 fn=2498 tn=7 bl=148 pwr=0
2025-03-30 06:49:25 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:49:25 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:49:25 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:49:25 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:49:25 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:49:25 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:49:25 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:49:25 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:49:25 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:49:25 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:49:25 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 06:49:25 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 06:49:25 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 06:49:30 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 06:49:30 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 06:49:30 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:49:30 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:49:30 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:49:30 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:49:31 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:49:31 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 06:49:31 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:49:31 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 06:49:31 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 06:49:31 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 06:49:31 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 06:49:31 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 06:49:31 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:49:31 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:49:31 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 06:49:31 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 06:49:31 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 06:49:31 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 06:49:31 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 06:49:31 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 06:49:31 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:49:31 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:49:31 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 06:49:31 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 06:49:31 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 06:49:31 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 06:49:31 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 06:49:31 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 06:49:31 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:49:31 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:49:31 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 06:49:31 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 06:49:31 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 06:49:31 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 06:49:31 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 06:49:31 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 06:49:31 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 06:49:31 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 06:49:31 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 06:49:31 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 06:49:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 06:49:31 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:49:31 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 06:49:31 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 06:49:31 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:49:31 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:49:31 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 06:49:31 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 06:49:31 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 06:49:31 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 06:49:31 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:49:31 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:49:31 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:49:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 06:49:31 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:49:31 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:49:31 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:49:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:49:31 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:49:31 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:49:31 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:49:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:49:31 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:49:31 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:49:31 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:49:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:49:31 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:49:31 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:49:31 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:49:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:49:31 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:49:31 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:49:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:49:31 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:49:31 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:49:31 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:49:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:49:31 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:49:31 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:49:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:49:31 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:49:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:49:31 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:49:31 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:49:31 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 06:49:31 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 06:49:31 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 06:49:36 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 06:49:36 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 06:49:36 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:49:36 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:49:36 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:49:36 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:49:36 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:49:36 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 06:49:36 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:49:36 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 06:49:36 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 06:49:36 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 06:49:36 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 06:49:36 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 06:49:36 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:49:36 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:49:36 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 06:49:36 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 06:49:36 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 06:49:36 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 06:49:36 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 06:49:36 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 06:49:36 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:49:36 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:49:36 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 06:49:36 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 06:49:36 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 06:49:36 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 06:49:36 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 06:49:36 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 06:49:36 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:49:36 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:49:36 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 06:49:36 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 06:49:36 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 06:49:36 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 06:49:36 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 06:49:36 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 06:49:36 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 06:49:36 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 06:49:36 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 06:49:36 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 06:49:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 06:49:36 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:49:36 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 06:49:36 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 06:49:36 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:49:36 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:49:36 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 06:49:36 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 06:49:36 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 06:49:36 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 06:49:36 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:49:36 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:49:36 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:49:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 06:49:36 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:49:36 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:49:36 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:49:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:49:36 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:49:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:49:36 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:49:36 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:49:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:49:36 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:49:36 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:49:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:49:36 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:49:36 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:49:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:49:36 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:49:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:49:36 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:49:36 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:49:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:49:36 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:49:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:49:36 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:49:36 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:49:36 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:49:36 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:49:36 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-03-30 06:49:36 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-03-30 06:49:36 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-03-30 06:49:36 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-03-30 06:49:36 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-03-30 06:49:36 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-03-30 06:49:36 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-03-30 06:49:36 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-03-30 06:49:36 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-03-30 06:49:36 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-03-30 06:49:36 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=0 bl=148 pwr=0
2025-03-30 06:49:36 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=1 bl=148 pwr=0
2025-03-30 06:49:36 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=2 bl=148 pwr=0
2025-03-30 06:49:36 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=3 bl=148 pwr=0
2025-03-30 06:49:36 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=4 bl=148 pwr=0
2025-03-30 06:49:36 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=5 bl=148 pwr=0
2025-03-30 06:49:36 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=6 bl=148 pwr=0
2025-03-30 06:49:36 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=7 bl=148 pwr=0
2025-03-30 06:49:36 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 06:49:36 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 06:49:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:49:36 [DEBUG] fake_trx.py:317 (BTS@172.18.26.20:5700) Recv FAKE_CI cmd
2025-03-30 06:49:36 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:49:36 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:49:36 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:49:36 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:49:36 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:49:36 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:49:36 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:49:36 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:49:37 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-03-30 06:49:37 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:49:37 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:49:37 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:49:37 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:49:37 [DEBUG] clck_gen.py:128 IND CLOCK 306
2025-03-30 06:49:37 [DEBUG] clck_gen.py:128 IND CLOCK 408
2025-03-30 06:49:38 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:49:38 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:49:38 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:49:38 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:49:38 [DEBUG] clck_gen.py:128 IND CLOCK 510
2025-03-30 06:49:38 [DEBUG] clck_gen.py:128 IND CLOCK 612
2025-03-30 06:49:39 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:49:39 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:49:39 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:49:39 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:49:39 [DEBUG] clck_gen.py:128 IND CLOCK 714
2025-03-30 06:49:39 [DEBUG] clck_gen.py:128 IND CLOCK 816
2025-03-30 06:49:40 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:49:40 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:49:40 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:49:40 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:49:40 [DEBUG] clck_gen.py:128 IND CLOCK 918
2025-03-30 06:49:40 [DEBUG] clck_gen.py:128 IND CLOCK 1020
2025-03-30 06:49:41 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:49:41 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:49:41 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:49:41 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:49:41 [DEBUG] clck_gen.py:128 IND CLOCK 1122
2025-03-30 06:49:41 [DEBUG] clck_gen.py:128 IND CLOCK 1224
2025-03-30 06:49:42 [DEBUG] clck_gen.py:128 IND CLOCK 1326
2025-03-30 06:49:42 [DEBUG] clck_gen.py:128 IND CLOCK 1428
2025-03-30 06:49:43 [DEBUG] clck_gen.py:128 IND CLOCK 1530
2025-03-30 06:49:43 [DEBUG] clck_gen.py:128 IND CLOCK 1632
2025-03-30 06:49:44 [DEBUG] clck_gen.py:128 IND CLOCK 1734
2025-03-30 06:49:44 [DEBUG] clck_gen.py:128 IND CLOCK 1836
2025-03-30 06:49:45 [DEBUG] clck_gen.py:128 IND CLOCK 1938
2025-03-30 06:49:45 [DEBUG] clck_gen.py:128 IND CLOCK 2040
2025-03-30 06:49:45 [DEBUG] clck_gen.py:128 IND CLOCK 2142
2025-03-30 06:49:46 [DEBUG] clck_gen.py:128 IND CLOCK 2244
2025-03-30 06:49:46 [DEBUG] clck_gen.py:128 IND CLOCK 2346
2025-03-30 06:49:47 [DEBUG] clck_gen.py:128 IND CLOCK 2448
2025-03-30 06:49:47 [DEBUG] clck_gen.py:128 IND CLOCK 2550
2025-03-30 06:49:48 [DEBUG] clck_gen.py:128 IND CLOCK 2652
2025-03-30 06:49:48 [DEBUG] clck_gen.py:128 IND CLOCK 2754
2025-03-30 06:49:49 [DEBUG] clck_gen.py:128 IND CLOCK 2856
2025-03-30 06:49:49 [DEBUG] clck_gen.py:128 IND CLOCK 2958
2025-03-30 06:49:50 [DEBUG] clck_gen.py:128 IND CLOCK 3060
2025-03-30 06:49:50 [DEBUG] clck_gen.py:128 IND CLOCK 3162
2025-03-30 06:49:51 [DEBUG] clck_gen.py:128 IND CLOCK 3264
2025-03-30 06:49:51 [DEBUG] clck_gen.py:128 IND CLOCK 3366
2025-03-30 06:49:52 [DEBUG] clck_gen.py:128 IND CLOCK 3468
2025-03-30 06:49:52 [DEBUG] clck_gen.py:128 IND CLOCK 3570
2025-03-30 06:49:53 [DEBUG] clck_gen.py:128 IND CLOCK 3672
2025-03-30 06:49:53 [DEBUG] clck_gen.py:128 IND CLOCK 3774
2025-03-30 06:49:53 [DEBUG] clck_gen.py:128 IND CLOCK 3876
2025-03-30 06:49:54 [DEBUG] clck_gen.py:128 IND CLOCK 3978
2025-03-30 06:49:54 [DEBUG] clck_gen.py:128 IND CLOCK 4080
2025-03-30 06:49:55 [DEBUG] clck_gen.py:128 IND CLOCK 4182
2025-03-30 06:49:55 [DEBUG] clck_gen.py:128 IND CLOCK 4284
2025-03-30 06:49:56 [DEBUG] clck_gen.py:128 IND CLOCK 4386
2025-03-30 06:49:56 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:49:56 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:49:56 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:49:56 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:49:56 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:49:56 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:49:56 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:49:56 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:49:56 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:49:56 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:49:56 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 06:49:56 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 06:49:56 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 06:50:01 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 06:50:01 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 06:50:01 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:50:01 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:50:01 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:50:01 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:50:01 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:50:01 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 06:50:01 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:50:01 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 06:50:01 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 06:50:01 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 06:50:01 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 06:50:01 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 06:50:01 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:50:01 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:50:01 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 06:50:01 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 06:50:01 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 06:50:01 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 06:50:01 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 06:50:01 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 06:50:01 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:50:01 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:50:01 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 06:50:01 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 06:50:01 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 06:50:01 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 06:50:01 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 06:50:01 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 06:50:01 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:50:01 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:50:01 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 06:50:01 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 06:50:01 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 06:50:01 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 06:50:01 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 06:50:01 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 06:50:01 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 06:50:01 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 06:50:01 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 06:50:01 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 06:50:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 06:50:01 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:50:01 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 06:50:01 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 06:50:01 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:50:01 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:50:01 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 06:50:01 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 06:50:01 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 06:50:01 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 06:50:01 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:50:01 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:50:01 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:50:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 06:50:01 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:50:01 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:50:01 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:50:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:50:01 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:50:01 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:50:01 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:50:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:50:01 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:50:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:50:01 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:50:01 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:50:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:50:01 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:50:01 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:50:01 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:50:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:50:01 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:50:01 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:50:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:50:01 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:50:01 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:50:01 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:50:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:50:01 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:50:01 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:50:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:50:01 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:50:01 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:50:01 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:50:01 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 06:50:01 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 06:50:01 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 06:50:06 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 06:50:06 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 06:50:06 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:50:06 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:50:06 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:50:06 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:50:06 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:50:06 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 06:50:06 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:50:06 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 06:50:06 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 06:50:06 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 06:50:06 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 06:50:06 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 06:50:06 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:50:06 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:50:06 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 06:50:06 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 06:50:06 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 06:50:06 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 06:50:06 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 06:50:06 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 06:50:06 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:50:06 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:50:06 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 06:50:06 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 06:50:06 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 06:50:06 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 06:50:06 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 06:50:06 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 06:50:06 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:50:06 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:50:06 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 06:50:06 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 06:50:06 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 06:50:06 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 06:50:06 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 06:50:06 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 06:50:06 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 06:50:06 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 06:50:06 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 06:50:06 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 06:50:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 06:50:06 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:50:06 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 06:50:06 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 06:50:06 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:50:06 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:50:06 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 06:50:06 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 06:50:06 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 06:50:06 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 06:50:06 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:50:06 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:50:06 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:50:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 06:50:06 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:50:06 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:50:06 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:50:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:50:06 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:50:06 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:50:06 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:50:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:50:06 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:50:06 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:50:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:50:06 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:50:06 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:50:06 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:50:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:50:06 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:50:06 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:50:06 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:50:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:50:06 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:50:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:50:06 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:50:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:50:06 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:50:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:50:06 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:50:06 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-03-30 06:50:07 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-03-30 06:50:07 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-03-30 06:50:07 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-03-30 06:50:07 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-03-30 06:50:07 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-03-30 06:50:07 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-03-30 06:50:07 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-03-30 06:50:07 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-03-30 06:50:07 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-03-30 06:50:07 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=0 bl=148 pwr=0
2025-03-30 06:50:07 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=1 bl=148 pwr=0
2025-03-30 06:50:07 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=2 bl=148 pwr=0
2025-03-30 06:50:07 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=3 bl=148 pwr=0
2025-03-30 06:50:07 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=4 bl=148 pwr=0
2025-03-30 06:50:07 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=5 bl=148 pwr=0
2025-03-30 06:50:07 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=6 bl=148 pwr=0
2025-03-30 06:50:07 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=7 bl=148 pwr=0
2025-03-30 06:50:07 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 06:50:07 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 06:50:07 [DEBUG] fake_trx.py:317 (BTS@172.18.26.20:5700) Recv FAKE_CI cmd
2025-03-30 06:50:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:50:07 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-03-30 06:50:07 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:50:07 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:50:07 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:50:07 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:50:08 [DEBUG] clck_gen.py:128 IND CLOCK 306
2025-03-30 06:50:08 [DEBUG] clck_gen.py:128 IND CLOCK 408
2025-03-30 06:50:08 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:50:08 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:50:08 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:50:08 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:50:09 [DEBUG] clck_gen.py:128 IND CLOCK 510
2025-03-30 06:50:09 [DEBUG] clck_gen.py:128 IND CLOCK 612
2025-03-30 06:50:09 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:50:09 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:50:09 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:50:09 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:50:10 [DEBUG] clck_gen.py:128 IND CLOCK 714
2025-03-30 06:50:10 [DEBUG] clck_gen.py:128 IND CLOCK 816
2025-03-30 06:50:10 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:50:10 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:50:10 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:50:10 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:50:10 [DEBUG] clck_gen.py:128 IND CLOCK 918
2025-03-30 06:50:11 [DEBUG] clck_gen.py:128 IND CLOCK 1020
2025-03-30 06:50:11 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:50:11 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:50:11 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:50:11 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:50:11 [DEBUG] clck_gen.py:128 IND CLOCK 1122
2025-03-30 06:50:12 [DEBUG] clck_gen.py:128 IND CLOCK 1224
2025-03-30 06:50:12 [DEBUG] clck_gen.py:128 IND CLOCK 1326
2025-03-30 06:50:13 [DEBUG] clck_gen.py:128 IND CLOCK 1428
2025-03-30 06:50:13 [DEBUG] clck_gen.py:128 IND CLOCK 1530
2025-03-30 06:50:14 [DEBUG] clck_gen.py:128 IND CLOCK 1632
2025-03-30 06:50:14 [DEBUG] clck_gen.py:128 IND CLOCK 1734
2025-03-30 06:50:15 [DEBUG] clck_gen.py:128 IND CLOCK 1836
2025-03-30 06:50:15 [DEBUG] clck_gen.py:128 IND CLOCK 1938
2025-03-30 06:50:16 [DEBUG] clck_gen.py:128 IND CLOCK 2040
2025-03-30 06:50:16 [DEBUG] clck_gen.py:128 IND CLOCK 2142
2025-03-30 06:50:17 [DEBUG] clck_gen.py:128 IND CLOCK 2244
2025-03-30 06:50:17 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:50:17 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:50:17 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:50:17 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:50:17 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:50:17 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:50:17 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:50:17 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:50:17 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 06:50:17 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 06:50:17 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 06:50:22 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 06:50:22 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 06:50:22 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:50:22 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:50:22 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:50:22 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:50:22 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:50:22 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 06:50:22 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:50:22 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 06:50:22 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 06:50:22 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 06:50:22 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 06:50:22 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 06:50:22 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:50:22 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:50:22 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 06:50:22 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 06:50:22 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 06:50:22 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 06:50:22 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 06:50:22 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 06:50:22 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:50:22 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:50:22 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 06:50:22 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 06:50:22 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 06:50:22 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 06:50:22 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 06:50:22 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 06:50:22 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:50:22 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:50:22 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 06:50:22 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 06:50:22 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 06:50:22 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 06:50:22 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 06:50:22 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 06:50:22 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 06:50:22 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 06:50:22 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 06:50:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 06:50:22 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 06:50:22 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 06:50:22 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 06:50:22 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:50:22 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:50:22 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:50:22 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 06:50:22 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 06:50:22 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 06:50:22 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 06:50:22 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:50:22 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:50:22 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:50:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 06:50:22 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:50:22 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:50:22 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:50:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:50:22 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:50:22 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:50:22 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:50:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:50:22 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:50:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:50:22 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:50:22 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:50:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:50:22 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:50:22 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:50:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:50:22 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:50:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:50:22 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:50:22 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:50:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:50:22 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:50:22 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:50:22 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:50:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:50:22 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:50:22 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:50:22 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:50:22 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:50:22 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:50:22 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 06:50:22 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 06:50:22 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 06:50:27 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 06:50:27 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 06:50:27 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:50:27 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:50:27 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:50:27 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:50:27 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:50:27 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 06:50:27 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:50:27 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 06:50:27 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 06:50:27 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 06:50:27 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 06:50:27 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 06:50:27 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:50:27 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:50:27 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 06:50:27 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 06:50:27 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 06:50:27 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 06:50:27 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 06:50:27 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 06:50:27 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:50:27 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:50:27 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 06:50:27 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 06:50:27 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 06:50:27 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 06:50:27 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 06:50:27 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 06:50:27 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:50:27 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:50:27 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 06:50:27 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 06:50:27 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 06:50:27 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 06:50:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 06:50:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 06:50:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 06:50:27 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 06:50:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 06:50:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 06:50:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 06:50:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:50:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 06:50:27 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 06:50:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:50:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:50:27 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 06:50:27 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 06:50:27 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 06:50:27 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 06:50:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:50:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:50:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:50:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 06:50:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:50:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:50:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:50:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:50:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:50:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:50:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:50:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:50:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:50:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:50:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:50:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:50:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:50:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:50:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:50:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:50:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:50:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:50:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:50:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:50:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:50:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:50:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:50:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:50:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:50:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:50:27 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-03-30 06:50:27 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-03-30 06:50:27 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-03-30 06:50:27 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-03-30 06:50:27 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-03-30 06:50:27 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-03-30 06:50:27 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-03-30 06:50:27 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-03-30 06:50:27 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-03-30 06:50:27 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-03-30 06:50:27 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=0 bl=148 pwr=0
2025-03-30 06:50:27 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=1 bl=148 pwr=0
2025-03-30 06:50:27 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=2 bl=148 pwr=0
2025-03-30 06:50:27 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=3 bl=148 pwr=0
2025-03-30 06:50:27 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=4 bl=148 pwr=0
2025-03-30 06:50:27 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=5 bl=148 pwr=0
2025-03-30 06:50:27 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=6 bl=148 pwr=0
2025-03-30 06:50:27 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=7 bl=148 pwr=0
2025-03-30 06:50:27 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 06:50:27 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 06:50:27 [DEBUG] fake_trx.py:317 (BTS@172.18.26.20:5700) Recv FAKE_CI cmd
2025-03-30 06:50:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:50:28 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-03-30 06:50:28 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:50:28 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:50:28 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:50:28 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:50:28 [DEBUG] clck_gen.py:128 IND CLOCK 306
2025-03-30 06:50:29 [DEBUG] clck_gen.py:128 IND CLOCK 408
2025-03-30 06:50:29 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:50:29 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:50:29 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:50:29 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:50:29 [DEBUG] clck_gen.py:128 IND CLOCK 510
2025-03-30 06:50:30 [DEBUG] clck_gen.py:128 IND CLOCK 612
2025-03-30 06:50:30 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:50:30 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:50:30 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:50:30 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:50:30 [DEBUG] clck_gen.py:128 IND CLOCK 714
2025-03-30 06:50:31 [DEBUG] clck_gen.py:128 IND CLOCK 816
2025-03-30 06:50:31 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:50:31 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:50:31 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:50:31 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:50:31 [DEBUG] clck_gen.py:128 IND CLOCK 918
2025-03-30 06:50:32 [DEBUG] clck_gen.py:128 IND CLOCK 1020
2025-03-30 06:50:32 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:50:32 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:50:32 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:50:32 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:50:32 [DEBUG] clck_gen.py:128 IND CLOCK 1122
2025-03-30 06:50:33 [DEBUG] clck_gen.py:128 IND CLOCK 1224
2025-03-30 06:50:33 [DEBUG] clck_gen.py:128 IND CLOCK 1326
2025-03-30 06:50:33 [DEBUG] clck_gen.py:128 IND CLOCK 1428
2025-03-30 06:50:34 [DEBUG] clck_gen.py:128 IND CLOCK 1530
2025-03-30 06:50:34 [DEBUG] clck_gen.py:128 IND CLOCK 1632
2025-03-30 06:50:35 [DEBUG] clck_gen.py:128 IND CLOCK 1734
2025-03-30 06:50:35 [DEBUG] clck_gen.py:128 IND CLOCK 1836
2025-03-30 06:50:36 [DEBUG] clck_gen.py:128 IND CLOCK 1938
2025-03-30 06:50:36 [DEBUG] clck_gen.py:128 IND CLOCK 2040
2025-03-30 06:50:37 [DEBUG] clck_gen.py:128 IND CLOCK 2142
2025-03-30 06:50:37 [DEBUG] clck_gen.py:128 IND CLOCK 2244
2025-03-30 06:50:38 [DEBUG] clck_gen.py:128 IND CLOCK 2346
2025-03-30 06:50:38 [DEBUG] clck_gen.py:128 IND CLOCK 2448
2025-03-30 06:50:39 [DEBUG] clck_gen.py:128 IND CLOCK 2550
2025-03-30 06:50:39 [DEBUG] clck_gen.py:128 IND CLOCK 2652
2025-03-30 06:50:39 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:50:39 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:50:39 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:50:39 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:50:39 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:50:39 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:50:39 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:50:39 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 06:50:39 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 06:50:39 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 06:50:39 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:50:44 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 06:50:44 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 06:50:44 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:50:44 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:50:44 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:50:44 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:50:44 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:50:44 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 06:50:44 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:50:44 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 06:50:44 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 06:50:44 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 06:50:44 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 06:50:44 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 06:50:44 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:50:44 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:50:44 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 06:50:44 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 06:50:44 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 06:50:44 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 06:50:44 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 06:50:44 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 06:50:44 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:50:44 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:50:44 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 06:50:44 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 06:50:44 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 06:50:44 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 06:50:44 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 06:50:44 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 06:50:44 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:50:44 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:50:44 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 06:50:44 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 06:50:44 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 06:50:44 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 06:50:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 06:50:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 06:50:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 06:50:44 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 06:50:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 06:50:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 06:50:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 06:50:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:50:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 06:50:44 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 06:50:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:50:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:50:44 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 06:50:44 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 06:50:44 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 06:50:44 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 06:50:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:50:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:50:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:50:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 06:50:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:50:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:50:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:50:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:50:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:50:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:50:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:50:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:50:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:50:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:50:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:50:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:50:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:50:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:50:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:50:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:50:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:50:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:50:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:50:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:50:44 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:50:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:50:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:50:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:50:44 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:50:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:50:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:50:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:50:44 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:50:44 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:50:44 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 06:50:44 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 06:50:44 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 06:50:49 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 06:50:49 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 06:50:49 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:50:49 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:50:49 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:50:49 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:50:49 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:50:49 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 06:50:49 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:50:49 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 06:50:49 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 06:50:49 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 06:50:49 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 06:50:49 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 06:50:49 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:50:49 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:50:49 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 06:50:49 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 06:50:49 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 06:50:49 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 06:50:49 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 06:50:49 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 06:50:49 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:50:49 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:50:49 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 06:50:49 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 06:50:49 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 06:50:49 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 06:50:49 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 06:50:49 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 06:50:49 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:50:49 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:50:49 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 06:50:49 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 06:50:49 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 06:50:49 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 06:50:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 06:50:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 06:50:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 06:50:49 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 06:50:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 06:50:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 06:50:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 06:50:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:50:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 06:50:49 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 06:50:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:50:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:50:49 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 06:50:49 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 06:50:49 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 06:50:49 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 06:50:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:50:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:50:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:50:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 06:50:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:50:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:50:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:50:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:50:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:50:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:50:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:50:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:50:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:50:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:50:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:50:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:50:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:50:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:50:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:50:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:50:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:50:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:50:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:50:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:50:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:50:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:50:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:50:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:50:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:50:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:50:49 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-03-30 06:50:50 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-03-30 06:50:50 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-03-30 06:50:50 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-03-30 06:50:50 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-03-30 06:50:50 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-03-30 06:50:50 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-03-30 06:50:50 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-03-30 06:50:50 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-03-30 06:50:50 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-03-30 06:50:50 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=0 bl=148 pwr=0
2025-03-30 06:50:50 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=1 bl=148 pwr=0
2025-03-30 06:50:50 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=2 bl=148 pwr=0
2025-03-30 06:50:50 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=3 bl=148 pwr=0
2025-03-30 06:50:50 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=4 bl=148 pwr=0
2025-03-30 06:50:50 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=5 bl=148 pwr=0
2025-03-30 06:50:50 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=6 bl=148 pwr=0
2025-03-30 06:50:50 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=7 bl=148 pwr=0
2025-03-30 06:50:50 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 06:50:50 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 06:50:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:50:50 [DEBUG] fake_trx.py:317 (BTS@172.18.26.20:5700) Recv FAKE_CI cmd
2025-03-30 06:50:50 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:50:50 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:50:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:50:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:50:50 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:50:50 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:50:50 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:50:50 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:50:50 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:50:50 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:50:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:50:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:50:50 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-03-30 06:50:50 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:50:50 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:50:50 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:50:50 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:50:51 [DEBUG] clck_gen.py:128 IND CLOCK 306
2025-03-30 06:50:51 [DEBUG] clck_gen.py:128 IND CLOCK 408
2025-03-30 06:50:51 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:50:51 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:50:51 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:50:51 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:50:52 [DEBUG] clck_gen.py:128 IND CLOCK 510
2025-03-30 06:50:52 [DEBUG] clck_gen.py:128 IND CLOCK 612
2025-03-30 06:50:52 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:50:52 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:50:52 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:50:52 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:50:53 [DEBUG] clck_gen.py:128 IND CLOCK 714
2025-03-30 06:50:53 [WARNING] clck_gen.py:108 CLCKGen: time overrun by -9412us; resetting the clock
2025-03-30 06:50:53 [DEBUG] clck_gen.py:128 IND CLOCK 816
2025-03-30 06:50:53 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:50:53 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:50:53 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:50:53 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:50:54 [DEBUG] clck_gen.py:128 IND CLOCK 918
2025-03-30 06:50:54 [DEBUG] clck_gen.py:128 IND CLOCK 1020
2025-03-30 06:50:54 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:50:54 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:50:54 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:50:54 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:50:55 [DEBUG] clck_gen.py:128 IND CLOCK 1122
2025-03-30 06:50:55 [DEBUG] clck_gen.py:128 IND CLOCK 1224
2025-03-30 06:50:56 [DEBUG] clck_gen.py:128 IND CLOCK 1326
2025-03-30 06:50:56 [DEBUG] clck_gen.py:128 IND CLOCK 1428
2025-03-30 06:50:57 [DEBUG] clck_gen.py:128 IND CLOCK 1530
2025-03-30 06:50:57 [DEBUG] clck_gen.py:128 IND CLOCK 1632
2025-03-30 06:50:57 [DEBUG] clck_gen.py:128 IND CLOCK 1734
2025-03-30 06:50:58 [DEBUG] clck_gen.py:128 IND CLOCK 1836
2025-03-30 06:50:58 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:50:58 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:50:58 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:50:58 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:50:58 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:50:58 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:50:58 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:50:58 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:50:58 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:50:58 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:50:58 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 06:50:58 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 06:50:58 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 06:51:03 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 06:51:03 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 06:51:03 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:51:03 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:51:03 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:51:03 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:51:03 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:51:03 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 06:51:03 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:51:03 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 06:51:03 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 06:51:03 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 06:51:03 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 06:51:03 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 06:51:03 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:51:03 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:51:03 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 06:51:03 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 06:51:03 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 06:51:03 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 06:51:03 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 06:51:03 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 06:51:03 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:51:03 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:51:03 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 06:51:03 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 06:51:03 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 06:51:03 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 06:51:03 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 06:51:03 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 06:51:03 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:51:03 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:51:03 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 06:51:03 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 06:51:03 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 06:51:03 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 06:51:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 06:51:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 06:51:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 06:51:03 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 06:51:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 06:51:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 06:51:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 06:51:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:51:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 06:51:03 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 06:51:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:51:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:51:03 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 06:51:03 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 06:51:03 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 06:51:03 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 06:51:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:51:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:51:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:51:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 06:51:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:51:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:51:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:51:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:51:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:51:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:51:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:51:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:51:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:51:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:51:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:51:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:51:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:51:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:51:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:51:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:51:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:51:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:51:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:51:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:51:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:51:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:51:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:51:03 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:51:03 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:51:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:51:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:51:03 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 06:51:03 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 06:51:03 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 06:51:03 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:51:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:51:08 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 06:51:08 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 06:51:08 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:51:08 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:51:08 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:51:08 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:51:08 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:51:08 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 06:51:08 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:51:08 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 06:51:08 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 06:51:08 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 06:51:08 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 06:51:08 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 06:51:08 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:51:08 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:51:08 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 06:51:08 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 06:51:08 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 06:51:08 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 06:51:08 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 06:51:08 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 06:51:08 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:51:08 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:51:08 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 06:51:08 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 06:51:08 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 06:51:08 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 06:51:08 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 06:51:08 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 06:51:08 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:51:08 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:51:08 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 06:51:08 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 06:51:08 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 06:51:08 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 06:51:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 06:51:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 06:51:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 06:51:08 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 06:51:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 06:51:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 06:51:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 06:51:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:51:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 06:51:08 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 06:51:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:51:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:51:08 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 06:51:08 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 06:51:08 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 06:51:08 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 06:51:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:51:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:51:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:51:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 06:51:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:51:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:51:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:51:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:51:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:51:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:51:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:51:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:51:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:51:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:51:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:51:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:51:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:51:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:51:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:51:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:51:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:51:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:51:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:51:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:51:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:51:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:51:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:51:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:51:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:51:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:51:08 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-03-30 06:51:09 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-03-30 06:51:09 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-03-30 06:51:09 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-03-30 06:51:09 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-03-30 06:51:09 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-03-30 06:51:09 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-03-30 06:51:09 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-03-30 06:51:09 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-03-30 06:51:09 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-03-30 06:51:09 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=0 bl=148 pwr=0
2025-03-30 06:51:09 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=1 bl=148 pwr=0
2025-03-30 06:51:09 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=2 bl=148 pwr=0
2025-03-30 06:51:09 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=3 bl=148 pwr=0
2025-03-30 06:51:09 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=4 bl=148 pwr=0
2025-03-30 06:51:09 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=5 bl=148 pwr=0
2025-03-30 06:51:09 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=6 bl=148 pwr=0
2025-03-30 06:51:09 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=7 bl=148 pwr=0
2025-03-30 06:51:09 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 06:51:09 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 06:51:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:51:09 [DEBUG] fake_trx.py:317 (BTS@172.18.26.20:5700) Recv FAKE_CI cmd
2025-03-30 06:51:09 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:51:09 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:51:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:51:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:51:09 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:51:09 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:51:09 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:51:09 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:51:09 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:51:09 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:51:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:51:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:51:09 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-03-30 06:51:09 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:51:09 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:51:09 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:51:09 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:51:10 [DEBUG] clck_gen.py:128 IND CLOCK 306
2025-03-30 06:51:10 [DEBUG] clck_gen.py:128 IND CLOCK 408
2025-03-30 06:51:10 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:51:10 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:51:10 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:51:10 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:51:10 [DEBUG] clck_gen.py:128 IND CLOCK 510
2025-03-30 06:51:11 [DEBUG] clck_gen.py:128 IND CLOCK 612
2025-03-30 06:51:11 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:51:11 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:51:11 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:51:11 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:51:11 [DEBUG] clck_gen.py:128 IND CLOCK 714
2025-03-30 06:51:12 [DEBUG] clck_gen.py:128 IND CLOCK 816
2025-03-30 06:51:12 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:51:12 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:51:12 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:51:12 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:51:12 [DEBUG] clck_gen.py:128 IND CLOCK 918
2025-03-30 06:51:13 [DEBUG] clck_gen.py:128 IND CLOCK 1020
2025-03-30 06:51:13 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:51:13 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:51:13 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:51:13 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:51:13 [DEBUG] clck_gen.py:128 IND CLOCK 1122
2025-03-30 06:51:14 [DEBUG] clck_gen.py:128 IND CLOCK 1224
2025-03-30 06:51:14 [DEBUG] clck_gen.py:128 IND CLOCK 1326
2025-03-30 06:51:15 [DEBUG] clck_gen.py:128 IND CLOCK 1428
2025-03-30 06:51:15 [DEBUG] clck_gen.py:128 IND CLOCK 1530
2025-03-30 06:51:16 [DEBUG] clck_gen.py:128 IND CLOCK 1632
2025-03-30 06:51:16 [DEBUG] clck_gen.py:128 IND CLOCK 1734
2025-03-30 06:51:17 [DEBUG] clck_gen.py:128 IND CLOCK 1836
2025-03-30 06:51:17 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:51:17 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:51:17 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:51:17 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:51:17 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:51:17 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:51:17 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:51:17 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:51:17 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:51:17 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:51:17 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 06:51:17 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 06:51:17 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 06:51:17 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=1861 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:51:17 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=1861 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:51:17 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=1861 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:51:17 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=1861 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:51:17 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=1861 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:51:22 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 06:51:22 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 06:51:22 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:51:22 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:51:22 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:51:22 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:51:22 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:51:22 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 06:51:22 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:51:22 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 06:51:22 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 06:51:22 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 06:51:22 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 06:51:22 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 06:51:22 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:51:22 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:51:22 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 06:51:22 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 06:51:22 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 06:51:22 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 06:51:22 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 06:51:22 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 06:51:22 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:51:22 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:51:22 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 06:51:22 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 06:51:22 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 06:51:22 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 06:51:22 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 06:51:22 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 06:51:22 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:51:22 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:51:22 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 06:51:22 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 06:51:22 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 06:51:22 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 06:51:22 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 06:51:22 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 06:51:22 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 06:51:22 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 06:51:22 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 06:51:22 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 06:51:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 06:51:22 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:51:22 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 06:51:22 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 06:51:22 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:51:22 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:51:22 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 06:51:22 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 06:51:22 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 06:51:22 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 06:51:22 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:51:22 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:51:22 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:51:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 06:51:22 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:51:22 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:51:22 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:51:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:51:22 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:51:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:51:22 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:51:22 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:51:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:51:22 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:51:22 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:51:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:51:22 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:51:22 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:51:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:51:22 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:51:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:51:22 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:51:22 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:51:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:51:22 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:51:22 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:51:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:51:22 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:51:22 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:51:22 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:51:22 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:51:22 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:51:22 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 06:51:22 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 06:51:22 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 06:51:22 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:51:27 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 06:51:27 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 06:51:27 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:51:27 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:51:27 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:51:27 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:51:27 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:51:27 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 06:51:27 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:51:27 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 06:51:27 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 06:51:27 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 06:51:27 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 06:51:27 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 06:51:27 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:51:27 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:51:27 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 06:51:27 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 06:51:27 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 06:51:27 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 06:51:27 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 06:51:27 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 06:51:27 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:51:27 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:51:27 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 06:51:27 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 06:51:27 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 06:51:27 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 06:51:27 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 06:51:27 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 06:51:27 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:51:27 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:51:27 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 06:51:27 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 06:51:27 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 06:51:27 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 06:51:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 06:51:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 06:51:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 06:51:27 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 06:51:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 06:51:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 06:51:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 06:51:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:51:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 06:51:27 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 06:51:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:51:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:51:27 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 06:51:27 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 06:51:27 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 06:51:27 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 06:51:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:51:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:51:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:51:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 06:51:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:51:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:51:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:51:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:51:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:51:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:51:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:51:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:51:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:51:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:51:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:51:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:51:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:51:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:51:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:51:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:51:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:51:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:51:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:51:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:51:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:51:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:51:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:51:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:51:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:51:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:51:27 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-03-30 06:51:27 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-03-30 06:51:27 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-03-30 06:51:27 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-03-30 06:51:27 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-03-30 06:51:27 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-03-30 06:51:27 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-03-30 06:51:27 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-03-30 06:51:27 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-03-30 06:51:27 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-03-30 06:51:27 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=0 bl=148 pwr=0
2025-03-30 06:51:27 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=1 bl=148 pwr=0
2025-03-30 06:51:27 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=2 bl=148 pwr=0
2025-03-30 06:51:27 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=3 bl=148 pwr=0
2025-03-30 06:51:27 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=4 bl=148 pwr=0
2025-03-30 06:51:27 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=5 bl=148 pwr=0
2025-03-30 06:51:27 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=6 bl=148 pwr=0
2025-03-30 06:51:27 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=7 bl=148 pwr=0
2025-03-30 06:51:27 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 06:51:27 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 06:51:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:51:27 [DEBUG] fake_trx.py:317 (BTS@172.18.26.20:5700) Recv FAKE_CI cmd
2025-03-30 06:51:27 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:51:27 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:51:27 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:51:27 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:51:27 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:51:27 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:51:27 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:51:27 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:51:27 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:51:27 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:51:27 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:51:27 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:51:28 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-03-30 06:51:28 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:51:28 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:51:28 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:51:28 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:51:28 [DEBUG] clck_gen.py:128 IND CLOCK 306
2025-03-30 06:51:29 [DEBUG] clck_gen.py:128 IND CLOCK 408
2025-03-30 06:51:29 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:51:29 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:51:29 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:51:29 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:51:29 [DEBUG] clck_gen.py:128 IND CLOCK 510
2025-03-30 06:51:30 [DEBUG] clck_gen.py:128 IND CLOCK 612
2025-03-30 06:51:30 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:51:30 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:51:30 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:51:30 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:51:30 [DEBUG] clck_gen.py:128 IND CLOCK 714
2025-03-30 06:51:31 [DEBUG] clck_gen.py:128 IND CLOCK 816
2025-03-30 06:51:31 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:51:31 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:51:31 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:51:31 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:51:31 [DEBUG] clck_gen.py:128 IND CLOCK 918
2025-03-30 06:51:32 [DEBUG] clck_gen.py:128 IND CLOCK 1020
2025-03-30 06:51:32 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:51:32 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:51:32 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:51:32 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:51:32 [DEBUG] clck_gen.py:128 IND CLOCK 1122
2025-03-30 06:51:32 [DEBUG] clck_gen.py:128 IND CLOCK 1224
2025-03-30 06:51:33 [DEBUG] clck_gen.py:128 IND CLOCK 1326
2025-03-30 06:51:33 [DEBUG] clck_gen.py:128 IND CLOCK 1428
2025-03-30 06:51:34 [DEBUG] clck_gen.py:128 IND CLOCK 1530
2025-03-30 06:51:34 [DEBUG] clck_gen.py:128 IND CLOCK 1632
2025-03-30 06:51:35 [DEBUG] clck_gen.py:128 IND CLOCK 1734
2025-03-30 06:51:35 [DEBUG] clck_gen.py:128 IND CLOCK 1836
2025-03-30 06:51:35 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:51:35 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:51:35 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:51:35 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:51:35 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:51:35 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:51:35 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:51:35 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:51:35 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:51:35 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:51:35 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 06:51:35 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 06:51:35 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 06:51:40 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 06:51:40 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 06:51:40 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:51:40 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:51:40 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:51:40 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:51:40 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:51:40 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 06:51:40 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:51:40 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 06:51:40 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 06:51:40 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 06:51:40 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 06:51:40 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 06:51:40 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:51:40 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 06:51:40 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:51:40 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 06:51:40 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 06:51:40 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 06:51:40 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 06:51:40 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 06:51:40 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:51:40 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:51:40 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 06:51:40 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 06:51:40 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 06:51:40 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 06:51:40 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 06:51:40 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 06:51:40 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:51:40 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:51:40 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 06:51:40 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 06:51:40 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 06:51:40 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 06:51:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 06:51:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 06:51:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 06:51:40 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 06:51:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 06:51:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 06:51:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 06:51:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:51:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 06:51:40 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 06:51:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:51:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:51:40 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 06:51:40 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 06:51:40 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 06:51:40 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 06:51:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:51:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:51:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:51:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 06:51:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:51:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:51:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:51:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:51:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:51:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:51:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:51:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:51:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:51:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:51:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:51:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:51:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:51:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:51:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:51:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:51:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:51:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:51:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:51:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:51:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:51:40 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:51:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:51:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:51:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:51:40 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:51:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:51:40 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:51:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:51:40 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 06:51:40 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 06:51:40 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 06:51:40 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:51:45 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 06:51:45 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 06:51:45 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:51:45 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:51:45 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:51:45 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:51:45 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:51:45 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 06:51:45 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:51:45 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 06:51:45 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 06:51:45 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 06:51:45 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 06:51:45 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 06:51:45 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:51:45 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:51:45 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 06:51:45 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 06:51:45 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 06:51:45 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 06:51:45 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 06:51:45 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 06:51:45 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:51:45 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:51:45 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 06:51:45 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 06:51:45 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 06:51:45 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 06:51:45 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 06:51:45 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 06:51:45 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:51:45 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:51:45 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 06:51:45 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 06:51:45 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 06:51:45 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 06:51:45 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 06:51:45 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 06:51:45 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 06:51:45 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 06:51:45 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 06:51:45 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 06:51:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 06:51:45 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:51:45 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 06:51:45 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 06:51:45 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:51:45 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:51:45 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 06:51:45 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 06:51:45 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 06:51:45 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 06:51:45 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:51:45 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:51:45 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:51:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 06:51:45 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:51:45 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:51:45 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:51:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:51:45 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:51:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:51:45 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:51:45 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:51:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:51:45 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:51:45 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:51:45 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:51:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:51:45 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:51:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:51:45 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:51:45 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:51:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:51:45 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:51:45 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:51:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:51:45 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:51:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:51:45 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:51:45 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:51:45 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:51:45 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-03-30 06:51:46 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-03-30 06:51:46 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-03-30 06:51:46 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-03-30 06:51:46 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-03-30 06:51:46 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-03-30 06:51:46 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-03-30 06:51:46 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-03-30 06:51:46 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-03-30 06:51:46 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-03-30 06:51:46 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=0 bl=148 pwr=0
2025-03-30 06:51:46 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=1 bl=148 pwr=0
2025-03-30 06:51:46 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=2 bl=148 pwr=0
2025-03-30 06:51:46 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=3 bl=148 pwr=0
2025-03-30 06:51:46 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=4 bl=148 pwr=0
2025-03-30 06:51:46 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=5 bl=148 pwr=0
2025-03-30 06:51:46 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=6 bl=148 pwr=0
2025-03-30 06:51:46 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=7 bl=148 pwr=0
2025-03-30 06:51:46 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 06:51:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:51:46 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 06:51:46 [DEBUG] fake_trx.py:317 (BTS@172.18.26.20:5700) Recv FAKE_CI cmd
2025-03-30 06:51:46 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:51:46 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:51:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:51:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:51:46 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:51:46 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:51:46 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:51:46 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:51:46 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:51:46 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:51:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:51:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:51:46 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-03-30 06:51:46 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:51:46 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:51:46 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:51:46 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:51:47 [DEBUG] clck_gen.py:128 IND CLOCK 306
2025-03-30 06:51:47 [DEBUG] clck_gen.py:128 IND CLOCK 408
2025-03-30 06:51:47 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:51:47 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:51:47 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:51:47 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:51:48 [DEBUG] clck_gen.py:128 IND CLOCK 510
2025-03-30 06:51:48 [DEBUG] clck_gen.py:128 IND CLOCK 612
2025-03-30 06:51:48 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:51:48 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:51:48 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:51:48 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:51:49 [DEBUG] clck_gen.py:128 IND CLOCK 714
2025-03-30 06:51:49 [DEBUG] clck_gen.py:128 IND CLOCK 816
2025-03-30 06:51:49 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=821): ver=1 fn=819 tn=0 bl=148 pwr=0
2025-03-30 06:51:49 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=821): ver=1 fn=819 tn=1 bl=148 pwr=0
2025-03-30 06:51:49 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=821): ver=1 fn=819 tn=2 bl=148 pwr=0
2025-03-30 06:51:49 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=821): ver=1 fn=819 tn=3 bl=148 pwr=0
2025-03-30 06:51:49 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=821): ver=1 fn=819 tn=4 bl=148 pwr=0
2025-03-30 06:51:49 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=821): ver=1 fn=819 tn=5 bl=148 pwr=0
2025-03-30 06:51:49 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=821): ver=1 fn=819 tn=6 bl=148 pwr=0
2025-03-30 06:51:49 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=821): ver=1 fn=819 tn=7 bl=148 pwr=0
2025-03-30 06:51:49 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=821): ver=1 fn=820 tn=0 bl=148 pwr=0
2025-03-30 06:51:49 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=821): ver=1 fn=820 tn=1 bl=148 pwr=0
2025-03-30 06:51:49 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=821): ver=1 fn=820 tn=2 bl=148 pwr=0
2025-03-30 06:51:49 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=821): ver=1 fn=820 tn=3 bl=148 pwr=0
2025-03-30 06:51:49 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=821): ver=1 fn=820 tn=4 bl=148 pwr=0
2025-03-30 06:51:49 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=821): ver=1 fn=820 tn=5 bl=148 pwr=0
2025-03-30 06:51:49 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=821): ver=1 fn=820 tn=6 bl=148 pwr=0
2025-03-30 06:51:49 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=821): ver=1 fn=820 tn=7 bl=148 pwr=0
2025-03-30 06:51:49 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:51:49 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:51:49 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:51:49 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:51:50 [DEBUG] clck_gen.py:128 IND CLOCK 918
2025-03-30 06:51:50 [DEBUG] clck_gen.py:128 IND CLOCK 1020
2025-03-30 06:51:50 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:51:50 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:51:50 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:51:50 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:51:51 [DEBUG] clck_gen.py:128 IND CLOCK 1122
2025-03-30 06:51:51 [DEBUG] clck_gen.py:128 IND CLOCK 1224
2025-03-30 06:51:52 [DEBUG] clck_gen.py:128 IND CLOCK 1326
2025-03-30 06:51:52 [DEBUG] clck_gen.py:128 IND CLOCK 1428
2025-03-30 06:51:53 [DEBUG] clck_gen.py:128 IND CLOCK 1530
2025-03-30 06:51:53 [DEBUG] clck_gen.py:128 IND CLOCK 1632
2025-03-30 06:51:53 [DEBUG] clck_gen.py:128 IND CLOCK 1734
2025-03-30 06:51:54 [DEBUG] clck_gen.py:128 IND CLOCK 1836
2025-03-30 06:51:54 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:51:54 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:51:54 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:51:54 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:51:54 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:51:54 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:51:54 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:51:54 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:51:54 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:51:54 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:51:54 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 06:51:54 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 06:51:54 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 06:51:54 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=1861 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:51:54 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=1861 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:51:59 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 06:51:59 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 06:51:59 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:51:59 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:51:59 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:51:59 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:51:59 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:51:59 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 06:51:59 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:51:59 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 06:51:59 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 06:51:59 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 06:51:59 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 06:51:59 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 06:51:59 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:51:59 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:51:59 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 06:51:59 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 06:51:59 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 06:51:59 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 06:51:59 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 06:51:59 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 06:51:59 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:51:59 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:51:59 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 06:51:59 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 06:51:59 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 06:51:59 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 06:51:59 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 06:51:59 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 06:51:59 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:51:59 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:51:59 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 06:51:59 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 06:51:59 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 06:51:59 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 06:51:59 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 06:51:59 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 06:51:59 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 06:51:59 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 06:51:59 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 06:51:59 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 06:51:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 06:51:59 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:51:59 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 06:51:59 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 06:51:59 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:51:59 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:51:59 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 06:51:59 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 06:51:59 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 06:51:59 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 06:51:59 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:51:59 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:51:59 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:51:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 06:51:59 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:51:59 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:51:59 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:51:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:51:59 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:51:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:51:59 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:51:59 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:51:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:51:59 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:51:59 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:51:59 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:51:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:51:59 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:51:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:51:59 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:51:59 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:51:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:51:59 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:51:59 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:51:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:51:59 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:51:59 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:51:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:51:59 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:51:59 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:51:59 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:51:59 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:51:59 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:51:59 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:51:59 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 06:51:59 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 06:51:59 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 06:52:04 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 06:52:04 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 06:52:04 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:52:04 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:52:04 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:52:04 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:52:04 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:52:04 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 06:52:04 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:52:04 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 06:52:04 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 06:52:04 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 06:52:04 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 06:52:04 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 06:52:04 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:52:04 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:52:04 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 06:52:04 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 06:52:04 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 06:52:04 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 06:52:04 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 06:52:04 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 06:52:04 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:52:04 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:52:04 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 06:52:04 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 06:52:04 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 06:52:04 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 06:52:04 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 06:52:04 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 06:52:04 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:52:04 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:52:04 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 06:52:04 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 06:52:04 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 06:52:04 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 06:52:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 06:52:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 06:52:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 06:52:04 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 06:52:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 06:52:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 06:52:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 06:52:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 06:52:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:52:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:52:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:52:04 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 06:52:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:52:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:52:04 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 06:52:04 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 06:52:04 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 06:52:04 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 06:52:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:52:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:52:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:52:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 06:52:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:52:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:52:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:52:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:52:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:52:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:52:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:52:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:52:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:52:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:52:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:52:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:52:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:52:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:52:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:52:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:52:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:52:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:52:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:52:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:52:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:52:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:52:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:52:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:52:04 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-03-30 06:52:05 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-03-30 06:52:05 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-03-30 06:52:05 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-03-30 06:52:05 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-03-30 06:52:05 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-03-30 06:52:05 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-03-30 06:52:05 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-03-30 06:52:05 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-03-30 06:52:05 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-03-30 06:52:05 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=0 bl=148 pwr=0
2025-03-30 06:52:05 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=1 bl=148 pwr=0
2025-03-30 06:52:05 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=2 bl=148 pwr=0
2025-03-30 06:52:05 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=3 bl=148 pwr=0
2025-03-30 06:52:05 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=4 bl=148 pwr=0
2025-03-30 06:52:05 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=5 bl=148 pwr=0
2025-03-30 06:52:05 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=6 bl=148 pwr=0
2025-03-30 06:52:05 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=7 bl=148 pwr=0
2025-03-30 06:52:05 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 06:52:05 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 06:52:05 [DEBUG] fake_trx.py:317 (BTS@172.18.26.20:5700) Recv FAKE_CI cmd
2025-03-30 06:52:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:52:05 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:52:05 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:52:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:52:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:52:05 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:52:05 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:52:05 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:52:05 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:52:05 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:52:05 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:52:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:52:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:52:05 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-03-30 06:52:05 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:52:05 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:52:05 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:52:05 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:52:06 [DEBUG] clck_gen.py:128 IND CLOCK 306
2025-03-30 06:52:06 [DEBUG] clck_gen.py:128 IND CLOCK 408
2025-03-30 06:52:06 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:52:06 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:52:06 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:52:06 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:52:06 [DEBUG] clck_gen.py:128 IND CLOCK 510
2025-03-30 06:52:07 [DEBUG] clck_gen.py:128 IND CLOCK 612
2025-03-30 06:52:07 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:52:07 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:52:07 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:52:07 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:52:07 [DEBUG] clck_gen.py:128 IND CLOCK 714
2025-03-30 06:52:08 [DEBUG] clck_gen.py:128 IND CLOCK 816
2025-03-30 06:52:08 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:52:08 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:52:08 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:52:08 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:52:08 [DEBUG] clck_gen.py:128 IND CLOCK 918
2025-03-30 06:52:09 [DEBUG] clck_gen.py:128 IND CLOCK 1020
2025-03-30 06:52:09 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:52:09 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:52:09 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:52:09 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:52:09 [DEBUG] clck_gen.py:128 IND CLOCK 1122
2025-03-30 06:52:10 [DEBUG] clck_gen.py:128 IND CLOCK 1224
2025-03-30 06:52:10 [DEBUG] clck_gen.py:128 IND CLOCK 1326
2025-03-30 06:52:11 [DEBUG] clck_gen.py:128 IND CLOCK 1428
2025-03-30 06:52:11 [DEBUG] clck_gen.py:128 IND CLOCK 1530
2025-03-30 06:52:12 [DEBUG] clck_gen.py:128 IND CLOCK 1632
2025-03-30 06:52:12 [DEBUG] clck_gen.py:128 IND CLOCK 1734
2025-03-30 06:52:13 [DEBUG] clck_gen.py:128 IND CLOCK 1836
2025-03-30 06:52:13 [DEBUG] clck_gen.py:128 IND CLOCK 1938
2025-03-30 06:52:14 [DEBUG] clck_gen.py:128 IND CLOCK 2040
2025-03-30 06:52:14 [DEBUG] clck_gen.py:128 IND CLOCK 2142
2025-03-30 06:52:14 [DEBUG] clck_gen.py:128 IND CLOCK 2244
2025-03-30 06:52:15 [DEBUG] clck_gen.py:128 IND CLOCK 2346
2025-03-30 06:52:15 [DEBUG] clck_gen.py:128 IND CLOCK 2448
2025-03-30 06:52:16 [DEBUG] clck_gen.py:128 IND CLOCK 2550
2025-03-30 06:52:16 [DEBUG] clck_gen.py:128 IND CLOCK 2652
2025-03-30 06:52:17 [DEBUG] clck_gen.py:128 IND CLOCK 2754
2025-03-30 06:52:17 [DEBUG] clck_gen.py:128 IND CLOCK 2856
2025-03-30 06:52:18 [DEBUG] clck_gen.py:128 IND CLOCK 2958
2025-03-30 06:52:18 [DEBUG] clck_gen.py:128 IND CLOCK 3060
2025-03-30 06:52:19 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:52:19 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:52:19 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:52:19 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:52:19 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:52:19 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:52:19 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 06:52:19 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 06:52:19 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:52:19 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=3160 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:52:19 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:52:19 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=3160 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:52:19 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=3160 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:52:19 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=3160 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:52:19 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=3160 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:52:19 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=3160 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:52:19 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:52:19 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:52:19 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 06:52:24 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 06:52:24 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 06:52:24 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:52:24 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:52:24 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:52:24 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:52:24 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:52:24 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 06:52:24 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:52:24 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 06:52:24 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 06:52:24 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 06:52:24 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 06:52:24 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 06:52:24 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:52:24 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:52:24 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 06:52:24 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 06:52:24 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 06:52:24 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 06:52:24 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 06:52:24 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 06:52:24 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:52:24 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:52:24 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 06:52:24 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 06:52:24 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 06:52:24 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 06:52:24 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 06:52:24 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 06:52:24 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:52:24 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:52:24 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 06:52:24 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 06:52:24 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 06:52:24 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 06:52:24 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 06:52:24 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 06:52:24 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 06:52:24 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 06:52:24 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 06:52:24 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 06:52:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 06:52:24 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:52:24 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 06:52:24 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 06:52:24 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:52:24 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:52:24 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 06:52:24 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 06:52:24 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 06:52:24 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 06:52:24 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:52:24 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:52:24 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:52:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 06:52:24 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:52:24 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:52:24 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:52:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:52:24 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:52:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:52:24 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:52:24 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:52:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:52:24 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:52:24 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:52:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:52:24 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:52:24 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:52:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:52:24 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:52:24 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:52:24 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:52:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:52:24 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:52:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:52:24 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:52:24 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:52:24 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:52:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:52:24 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:52:24 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:52:24 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:52:24 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 06:52:24 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 06:52:24 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 06:52:24 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:52:29 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 06:52:29 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 06:52:29 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:52:29 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:52:29 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:52:29 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:52:29 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:52:29 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 06:52:29 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:52:29 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 06:52:29 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 06:52:29 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 06:52:29 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 06:52:29 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 06:52:29 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:52:29 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:52:29 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 06:52:29 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 06:52:29 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 06:52:29 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 06:52:29 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 06:52:29 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 06:52:29 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:52:29 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:52:29 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 06:52:29 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 06:52:29 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 06:52:29 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 06:52:29 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 06:52:29 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 06:52:29 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:52:29 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:52:29 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 06:52:29 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 06:52:29 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 06:52:29 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 06:52:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 06:52:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 06:52:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 06:52:29 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 06:52:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 06:52:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 06:52:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 06:52:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:52:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 06:52:29 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 06:52:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:52:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:52:29 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 06:52:29 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 06:52:29 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 06:52:29 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 06:52:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:52:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:52:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:52:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 06:52:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:52:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:52:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:52:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:52:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:52:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:52:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:52:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:52:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:52:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:52:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:52:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:52:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:52:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:52:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:52:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:52:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:52:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:52:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:52:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:52:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:52:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:52:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:52:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:52:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:52:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:52:29 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-03-30 06:52:29 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-03-30 06:52:29 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-03-30 06:52:29 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-03-30 06:52:29 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-03-30 06:52:29 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-03-30 06:52:29 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-03-30 06:52:29 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-03-30 06:52:29 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-03-30 06:52:29 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-03-30 06:52:29 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=0 bl=148 pwr=0
2025-03-30 06:52:29 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=1 bl=148 pwr=0
2025-03-30 06:52:29 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=2 bl=148 pwr=0
2025-03-30 06:52:29 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=3 bl=148 pwr=0
2025-03-30 06:52:29 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=4 bl=148 pwr=0
2025-03-30 06:52:29 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=5 bl=148 pwr=0
2025-03-30 06:52:29 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=6 bl=148 pwr=0
2025-03-30 06:52:29 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=7 bl=148 pwr=0
2025-03-30 06:52:29 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 06:52:29 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 06:52:29 [DEBUG] fake_trx.py:317 (BTS@172.18.26.20:5700) Recv FAKE_CI cmd
2025-03-30 06:52:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:52:29 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:52:29 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:52:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:52:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:52:29 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:52:29 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:52:29 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:52:29 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:52:29 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:52:29 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:52:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:52:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:52:30 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-03-30 06:52:30 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:52:30 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:52:30 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:52:30 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:52:30 [DEBUG] clck_gen.py:128 IND CLOCK 306
2025-03-30 06:52:31 [DEBUG] clck_gen.py:128 IND CLOCK 408
2025-03-30 06:52:31 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:52:31 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:52:31 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:52:31 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:52:31 [DEBUG] clck_gen.py:128 IND CLOCK 510
2025-03-30 06:52:32 [DEBUG] clck_gen.py:128 IND CLOCK 612
2025-03-30 06:52:32 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:52:32 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:52:32 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:52:32 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:52:32 [DEBUG] clck_gen.py:128 IND CLOCK 714
2025-03-30 06:52:33 [DEBUG] clck_gen.py:128 IND CLOCK 816
2025-03-30 06:52:33 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:52:33 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:52:33 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:52:33 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:52:33 [DEBUG] clck_gen.py:128 IND CLOCK 918
2025-03-30 06:52:33 [DEBUG] clck_gen.py:128 IND CLOCK 1020
2025-03-30 06:52:34 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:52:34 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:52:34 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:52:34 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:52:34 [DEBUG] clck_gen.py:128 IND CLOCK 1122
2025-03-30 06:52:34 [DEBUG] clck_gen.py:128 IND CLOCK 1224
2025-03-30 06:52:35 [DEBUG] clck_gen.py:128 IND CLOCK 1326
2025-03-30 06:52:35 [DEBUG] clck_gen.py:128 IND CLOCK 1428
2025-03-30 06:52:36 [DEBUG] clck_gen.py:128 IND CLOCK 1530
2025-03-30 06:52:36 [DEBUG] clck_gen.py:128 IND CLOCK 1632
2025-03-30 06:52:37 [DEBUG] clck_gen.py:128 IND CLOCK 1734
2025-03-30 06:52:37 [DEBUG] clck_gen.py:128 IND CLOCK 1836
2025-03-30 06:52:37 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:52:37 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:52:37 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:52:37 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:52:37 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:52:37 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:52:37 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:52:37 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:52:37 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:52:37 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:52:37 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 06:52:37 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 06:52:37 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 06:52:42 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 06:52:42 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 06:52:42 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:52:42 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:52:42 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:52:42 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:52:42 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:52:42 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 06:52:42 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:52:42 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 06:52:42 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 06:52:42 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 06:52:42 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 06:52:42 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 06:52:42 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:52:42 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:52:42 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 06:52:42 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 06:52:42 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 06:52:42 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 06:52:42 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 06:52:42 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 06:52:42 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:52:42 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:52:42 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 06:52:42 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 06:52:42 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 06:52:42 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 06:52:42 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 06:52:42 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 06:52:42 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:52:42 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:52:42 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 06:52:42 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 06:52:42 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 06:52:42 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 06:52:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 06:52:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 06:52:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 06:52:42 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 06:52:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 06:52:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 06:52:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 06:52:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 06:52:42 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 06:52:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:52:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:52:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:52:42 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 06:52:42 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 06:52:42 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 06:52:42 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 06:52:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:52:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:52:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:52:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 06:52:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:52:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:52:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:52:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:52:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:52:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:52:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:52:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:52:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:52:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:52:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:52:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:52:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:52:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:52:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:52:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:52:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:52:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:52:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:52:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:52:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:52:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:52:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:52:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:52:42 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:52:42 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:52:42 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:52:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:52:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:52:42 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:52:42 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 06:52:42 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 06:52:42 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 06:52:47 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 06:52:47 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 06:52:47 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:52:47 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:52:47 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:52:47 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:52:47 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:52:47 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 06:52:47 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:52:47 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 06:52:47 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 06:52:47 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 06:52:47 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 06:52:47 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 06:52:47 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:52:47 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:52:47 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 06:52:47 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 06:52:47 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 06:52:47 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 06:52:47 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 06:52:47 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 06:52:47 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:52:47 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:52:47 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 06:52:47 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 06:52:47 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 06:52:47 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 06:52:47 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 06:52:47 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 06:52:47 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:52:47 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:52:47 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 06:52:47 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 06:52:47 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 06:52:47 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 06:52:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 06:52:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 06:52:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 06:52:47 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 06:52:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 06:52:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 06:52:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 06:52:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:52:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 06:52:47 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 06:52:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:52:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:52:47 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 06:52:47 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 06:52:47 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 06:52:47 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 06:52:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:52:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:52:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:52:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 06:52:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:52:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:52:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:52:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:52:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:52:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:52:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:52:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:52:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:52:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:52:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:52:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:52:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:52:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:52:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:52:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:52:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:52:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:52:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:52:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:52:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:52:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:52:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:52:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:52:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:52:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:52:47 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-03-30 06:52:48 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-03-30 06:52:48 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-03-30 06:52:48 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-03-30 06:52:48 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-03-30 06:52:48 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-03-30 06:52:48 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-03-30 06:52:48 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-03-30 06:52:48 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-03-30 06:52:48 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-03-30 06:52:48 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=0 bl=148 pwr=0
2025-03-30 06:52:48 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=1 bl=148 pwr=0
2025-03-30 06:52:48 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=2 bl=148 pwr=0
2025-03-30 06:52:48 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=3 bl=148 pwr=0
2025-03-30 06:52:48 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=4 bl=148 pwr=0
2025-03-30 06:52:48 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=5 bl=148 pwr=0
2025-03-30 06:52:48 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=6 bl=148 pwr=0
2025-03-30 06:52:48 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=7 bl=148 pwr=0
2025-03-30 06:52:48 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 06:52:48 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 06:52:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:52:48 [DEBUG] fake_trx.py:317 (BTS@172.18.26.20:5700) Recv FAKE_CI cmd
2025-03-30 06:52:48 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:52:48 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:52:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:52:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:52:48 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:52:48 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:52:48 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:52:48 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:52:48 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-03-30 06:52:48 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:52:48 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:52:48 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:52:48 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:52:49 [DEBUG] clck_gen.py:128 IND CLOCK 306
2025-03-30 06:52:49 [DEBUG] clck_gen.py:128 IND CLOCK 408
2025-03-30 06:52:49 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:52:49 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:52:49 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:52:49 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:52:50 [DEBUG] clck_gen.py:128 IND CLOCK 510
2025-03-30 06:52:50 [DEBUG] clck_gen.py:128 IND CLOCK 612
2025-03-30 06:52:50 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:52:50 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:52:50 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:52:50 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:52:51 [DEBUG] clck_gen.py:128 IND CLOCK 714
2025-03-30 06:52:51 [DEBUG] clck_gen.py:128 IND CLOCK 816
2025-03-30 06:52:51 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:52:51 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:52:51 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:52:51 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:52:52 [DEBUG] clck_gen.py:128 IND CLOCK 918
2025-03-30 06:52:52 [DEBUG] clck_gen.py:128 IND CLOCK 1020
2025-03-30 06:52:52 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:52:52 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:52:52 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:52:52 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:52:53 [DEBUG] clck_gen.py:128 IND CLOCK 1122
2025-03-30 06:52:53 [DEBUG] clck_gen.py:128 IND CLOCK 1224
2025-03-30 06:52:54 [DEBUG] clck_gen.py:128 IND CLOCK 1326
2025-03-30 06:52:54 [DEBUG] clck_gen.py:128 IND CLOCK 1428
2025-03-30 06:52:54 [DEBUG] clck_gen.py:128 IND CLOCK 1530
2025-03-30 06:52:55 [DEBUG] clck_gen.py:128 IND CLOCK 1632
2025-03-30 06:52:55 [DEBUG] clck_gen.py:128 IND CLOCK 1734
2025-03-30 06:52:56 [DEBUG] clck_gen.py:128 IND CLOCK 1836
2025-03-30 06:52:56 [DEBUG] clck_gen.py:128 IND CLOCK 1938
2025-03-30 06:52:57 [DEBUG] clck_gen.py:128 IND CLOCK 2040
2025-03-30 06:52:57 [DEBUG] clck_gen.py:128 IND CLOCK 2142
2025-03-30 06:52:58 [DEBUG] clck_gen.py:128 IND CLOCK 2244
2025-03-30 06:52:58 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:52:58 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:52:58 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:52:58 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:52:58 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:52:58 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:52:58 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:52:58 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:52:58 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:52:58 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:52:58 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 06:52:58 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 06:52:58 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 06:53:03 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 06:53:03 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 06:53:03 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:53:03 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:53:03 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:53:03 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:53:03 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:53:03 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 06:53:03 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:53:03 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 06:53:03 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 06:53:03 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 06:53:03 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 06:53:03 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 06:53:03 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:53:03 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:53:03 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 06:53:03 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 06:53:03 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 06:53:03 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 06:53:03 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 06:53:03 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 06:53:03 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:53:03 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:53:03 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 06:53:03 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 06:53:03 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 06:53:03 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 06:53:03 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 06:53:03 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 06:53:03 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:53:03 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:53:03 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 06:53:03 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 06:53:03 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 06:53:03 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 06:53:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 06:53:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 06:53:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 06:53:03 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 06:53:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 06:53:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 06:53:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 06:53:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:53:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 06:53:03 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 06:53:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:53:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:53:03 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 06:53:03 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 06:53:03 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 06:53:03 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 06:53:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:53:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:53:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:53:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 06:53:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:53:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:53:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:53:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:53:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:53:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:53:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:53:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:53:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:53:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:53:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:53:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:53:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:53:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:53:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:53:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:53:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:53:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:53:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:53:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:53:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:53:03 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:53:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:53:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:53:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:53:03 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:53:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:53:03 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:53:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:53:03 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 06:53:03 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 06:53:03 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 06:53:03 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:53:08 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 06:53:08 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 06:53:08 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:53:08 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:53:08 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:53:08 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:53:08 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:53:08 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 06:53:08 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:53:08 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 06:53:08 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 06:53:08 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 06:53:08 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 06:53:08 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 06:53:08 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:53:08 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:53:08 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 06:53:08 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 06:53:08 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 06:53:08 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 06:53:08 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 06:53:08 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 06:53:08 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:53:08 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:53:08 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 06:53:08 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 06:53:08 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 06:53:08 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 06:53:08 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 06:53:08 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 06:53:08 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:53:08 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:53:08 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 06:53:08 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 06:53:08 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 06:53:08 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 06:53:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 06:53:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 06:53:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 06:53:08 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 06:53:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 06:53:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 06:53:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 06:53:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:53:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 06:53:08 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 06:53:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:53:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:53:08 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 06:53:08 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 06:53:08 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 06:53:08 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 06:53:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:53:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:53:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:53:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 06:53:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:53:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:53:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:53:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:53:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:53:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:53:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:53:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:53:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:53:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:53:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:53:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:53:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:53:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:53:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:53:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:53:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:53:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:53:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:53:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:53:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:53:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:53:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:53:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:53:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:53:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:53:08 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-03-30 06:53:09 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-03-30 06:53:09 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-03-30 06:53:09 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-03-30 06:53:09 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-03-30 06:53:09 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-03-30 06:53:09 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-03-30 06:53:09 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-03-30 06:53:09 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-03-30 06:53:09 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-03-30 06:53:09 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=0 bl=148 pwr=0
2025-03-30 06:53:09 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=1 bl=148 pwr=0
2025-03-30 06:53:09 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=2 bl=148 pwr=0
2025-03-30 06:53:09 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=3 bl=148 pwr=0
2025-03-30 06:53:09 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=4 bl=148 pwr=0
2025-03-30 06:53:09 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=5 bl=148 pwr=0
2025-03-30 06:53:09 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=6 bl=148 pwr=0
2025-03-30 06:53:09 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=7 bl=148 pwr=0
2025-03-30 06:53:09 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 06:53:09 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 06:53:09 [DEBUG] fake_trx.py:317 (BTS@172.18.26.20:5700) Recv FAKE_CI cmd
2025-03-30 06:53:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:53:09 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:53:09 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:53:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:53:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:53:09 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:53:09 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:53:09 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:53:09 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:53:09 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:53:09 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:53:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:53:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:53:09 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-03-30 06:53:09 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:53:09 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:53:09 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:53:09 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:53:10 [DEBUG] clck_gen.py:128 IND CLOCK 306
2025-03-30 06:53:10 [DEBUG] clck_gen.py:128 IND CLOCK 408
2025-03-30 06:53:10 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:53:10 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:53:10 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:53:10 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:53:10 [DEBUG] clck_gen.py:128 IND CLOCK 510
2025-03-30 06:53:11 [DEBUG] clck_gen.py:128 IND CLOCK 612
2025-03-30 06:53:11 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:53:11 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:53:11 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:53:11 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:53:11 [DEBUG] clck_gen.py:128 IND CLOCK 714
2025-03-30 06:53:12 [DEBUG] clck_gen.py:128 IND CLOCK 816
2025-03-30 06:53:12 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:53:12 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:53:12 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:53:12 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:53:12 [DEBUG] clck_gen.py:128 IND CLOCK 918
2025-03-30 06:53:13 [DEBUG] clck_gen.py:128 IND CLOCK 1020
2025-03-30 06:53:13 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:53:13 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:53:13 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:53:13 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:53:13 [DEBUG] clck_gen.py:128 IND CLOCK 1122
2025-03-30 06:53:14 [DEBUG] clck_gen.py:128 IND CLOCK 1224
2025-03-30 06:53:14 [DEBUG] clck_gen.py:128 IND CLOCK 1326
2025-03-30 06:53:15 [DEBUG] clck_gen.py:128 IND CLOCK 1428
2025-03-30 06:53:15 [DEBUG] clck_gen.py:128 IND CLOCK 1530
2025-03-30 06:53:16 [DEBUG] clck_gen.py:128 IND CLOCK 1632
2025-03-30 06:53:16 [DEBUG] clck_gen.py:128 IND CLOCK 1734
2025-03-30 06:53:17 [DEBUG] clck_gen.py:128 IND CLOCK 1836
2025-03-30 06:53:17 [DEBUG] clck_gen.py:128 IND CLOCK 1938
2025-03-30 06:53:18 [DEBUG] clck_gen.py:128 IND CLOCK 2040
2025-03-30 06:53:18 [DEBUG] clck_gen.py:128 IND CLOCK 2142
2025-03-30 06:53:18 [DEBUG] clck_gen.py:128 IND CLOCK 2244
2025-03-30 06:53:19 [DEBUG] clck_gen.py:128 IND CLOCK 2346
2025-03-30 06:53:19 [DEBUG] clck_gen.py:128 IND CLOCK 2448
2025-03-30 06:53:20 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:53:20 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:53:20 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:53:20 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:53:20 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:53:20 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:53:20 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:53:20 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:53:20 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:53:20 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:53:20 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 06:53:20 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 06:53:20 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 06:53:25 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 06:53:25 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 06:53:25 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:53:25 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:53:25 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:53:25 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:53:25 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:53:25 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 06:53:25 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:53:25 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 06:53:25 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 06:53:25 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 06:53:25 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 06:53:25 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 06:53:25 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:53:25 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:53:25 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 06:53:25 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 06:53:25 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 06:53:25 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 06:53:25 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 06:53:25 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 06:53:25 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:53:25 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:53:25 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 06:53:25 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 06:53:25 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 06:53:25 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 06:53:25 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 06:53:25 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 06:53:25 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:53:25 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:53:25 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 06:53:25 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 06:53:25 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 06:53:25 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 06:53:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 06:53:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 06:53:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 06:53:25 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 06:53:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 06:53:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 06:53:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 06:53:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:53:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 06:53:25 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 06:53:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:53:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:53:25 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 06:53:25 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 06:53:25 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 06:53:25 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 06:53:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:53:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:53:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:53:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 06:53:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:53:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:53:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:53:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:53:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:53:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:53:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:53:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:53:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:53:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:53:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:53:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:53:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:53:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:53:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:53:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:53:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:53:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:53:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:53:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:53:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:53:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:53:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:53:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:53:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:53:25 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:53:25 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:53:25 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 06:53:25 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 06:53:25 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 06:53:25 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:53:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:53:30 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 06:53:30 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 06:53:30 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:53:30 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:53:30 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:53:30 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:53:30 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:53:30 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 06:53:30 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:53:30 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 06:53:30 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 06:53:30 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 06:53:30 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 06:53:30 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 06:53:30 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:53:30 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:53:30 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 06:53:30 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 06:53:30 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 06:53:30 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 06:53:30 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 06:53:30 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 06:53:30 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:53:30 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:53:30 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 06:53:30 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 06:53:30 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 06:53:30 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 06:53:30 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 06:53:30 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 06:53:30 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:53:30 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:53:30 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 06:53:30 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 06:53:30 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 06:53:30 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 06:53:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 06:53:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 06:53:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 06:53:30 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 06:53:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 06:53:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 06:53:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 06:53:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:53:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 06:53:30 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 06:53:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:53:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:53:30 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 06:53:30 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 06:53:30 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 06:53:30 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 06:53:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:53:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:53:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:53:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 06:53:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:53:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:53:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:53:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:53:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:53:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:53:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:53:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:53:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:53:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:53:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:53:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:53:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:53:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:53:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:53:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:53:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:53:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:53:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:53:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:53:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:53:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:53:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:53:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:53:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:53:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:53:30 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-03-30 06:53:30 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-03-30 06:53:30 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-03-30 06:53:30 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-03-30 06:53:30 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-03-30 06:53:30 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-03-30 06:53:30 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-03-30 06:53:30 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-03-30 06:53:30 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-03-30 06:53:30 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-03-30 06:53:30 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=0 bl=148 pwr=0
2025-03-30 06:53:30 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=1 bl=148 pwr=0
2025-03-30 06:53:30 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=2 bl=148 pwr=0
2025-03-30 06:53:30 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=3 bl=148 pwr=0
2025-03-30 06:53:30 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=4 bl=148 pwr=0
2025-03-30 06:53:30 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=5 bl=148 pwr=0
2025-03-30 06:53:30 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=6 bl=148 pwr=0
2025-03-30 06:53:30 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=7 bl=148 pwr=0
2025-03-30 06:53:30 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 06:53:30 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 06:53:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:53:30 [DEBUG] fake_trx.py:317 (BTS@172.18.26.20:5700) Recv FAKE_CI cmd
2025-03-30 06:53:31 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-03-30 06:53:31 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:53:31 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:53:31 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:53:31 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:53:31 [DEBUG] clck_gen.py:128 IND CLOCK 306
2025-03-30 06:53:32 [DEBUG] clck_gen.py:128 IND CLOCK 408
2025-03-30 06:53:32 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:53:32 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:53:32 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:53:32 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:53:32 [DEBUG] clck_gen.py:128 IND CLOCK 510
2025-03-30 06:53:33 [DEBUG] clck_gen.py:128 IND CLOCK 612
2025-03-30 06:53:33 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:53:33 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:53:33 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:53:33 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:53:33 [DEBUG] clck_gen.py:128 IND CLOCK 714
2025-03-30 06:53:34 [DEBUG] clck_gen.py:128 IND CLOCK 816
2025-03-30 06:53:34 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:53:34 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:53:34 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:53:34 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:53:34 [DEBUG] clck_gen.py:128 IND CLOCK 918
2025-03-30 06:53:34 [DEBUG] clck_gen.py:128 IND CLOCK 1020
2025-03-30 06:53:35 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:53:35 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:53:35 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:53:35 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:53:35 [DEBUG] clck_gen.py:128 IND CLOCK 1122
2025-03-30 06:53:35 [DEBUG] clck_gen.py:128 IND CLOCK 1224
2025-03-30 06:53:36 [DEBUG] clck_gen.py:128 IND CLOCK 1326
2025-03-30 06:53:36 [DEBUG] clck_gen.py:128 IND CLOCK 1428
2025-03-30 06:53:37 [DEBUG] clck_gen.py:128 IND CLOCK 1530
2025-03-30 06:53:37 [DEBUG] clck_gen.py:128 IND CLOCK 1632
2025-03-30 06:53:38 [DEBUG] clck_gen.py:128 IND CLOCK 1734
2025-03-30 06:53:38 [DEBUG] clck_gen.py:128 IND CLOCK 1836
2025-03-30 06:53:39 [DEBUG] clck_gen.py:128 IND CLOCK 1938
2025-03-30 06:53:39 [DEBUG] clck_gen.py:128 IND CLOCK 2040
2025-03-30 06:53:40 [DEBUG] clck_gen.py:128 IND CLOCK 2142
2025-03-30 06:53:40 [DEBUG] clck_gen.py:128 IND CLOCK 2244
2025-03-30 06:53:40 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:53:40 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:53:40 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:53:40 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:53:40 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:53:40 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 06:53:40 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 06:53:40 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 06:53:40 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:53:40 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:53:40 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:53:45 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 06:53:45 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 06:53:45 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:53:45 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:53:45 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:53:45 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:53:45 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:53:45 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 06:53:45 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:53:45 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 06:53:45 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 06:53:45 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 06:53:45 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 06:53:45 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 06:53:45 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:53:45 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:53:45 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 06:53:45 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 06:53:45 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 06:53:45 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 06:53:45 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 06:53:45 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 06:53:45 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:53:45 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:53:45 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 06:53:45 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 06:53:45 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 06:53:45 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 06:53:45 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 06:53:45 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 06:53:45 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:53:45 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:53:45 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 06:53:45 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 06:53:45 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 06:53:45 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 06:53:45 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 06:53:45 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 06:53:45 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 06:53:45 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 06:53:45 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 06:53:45 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 06:53:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 06:53:45 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:53:45 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 06:53:45 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 06:53:45 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:53:45 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:53:45 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 06:53:45 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 06:53:45 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 06:53:45 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 06:53:45 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:53:45 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:53:45 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:53:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 06:53:45 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:53:45 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:53:45 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:53:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:53:45 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:53:45 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:53:45 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:53:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:53:45 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:53:45 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:53:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:53:45 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:53:45 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:53:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:53:45 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:53:45 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:53:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:53:45 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:53:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:53:45 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:53:45 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:53:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:53:45 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:53:45 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:53:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:53:45 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:53:45 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:53:45 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:53:45 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 06:53:45 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 06:53:45 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 06:53:45 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:53:50 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 06:53:50 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 06:53:50 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:53:50 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:53:50 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:53:50 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:53:50 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:53:50 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 06:53:50 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:53:50 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 06:53:50 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 06:53:50 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 06:53:50 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 06:53:50 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 06:53:50 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:53:50 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:53:50 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 06:53:50 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 06:53:50 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 06:53:50 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 06:53:50 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 06:53:50 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 06:53:50 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:53:50 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:53:50 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 06:53:50 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 06:53:50 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 06:53:50 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 06:53:50 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 06:53:50 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 06:53:50 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:53:50 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:53:50 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 06:53:50 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 06:53:50 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 06:53:50 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 06:53:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 06:53:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 06:53:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 06:53:50 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 06:53:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 06:53:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 06:53:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 06:53:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:53:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 06:53:50 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 06:53:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:53:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:53:50 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 06:53:50 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 06:53:50 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 06:53:50 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 06:53:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:53:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:53:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:53:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 06:53:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:53:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:53:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:53:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:53:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:53:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:53:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:53:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:53:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:53:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:53:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:53:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:53:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:53:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:53:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:53:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:53:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:53:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:53:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:53:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:53:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:53:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:53:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:53:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:53:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:53:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:53:50 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-03-30 06:53:51 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-03-30 06:53:51 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-03-30 06:53:51 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-03-30 06:53:51 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-03-30 06:53:51 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-03-30 06:53:51 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-03-30 06:53:51 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-03-30 06:53:51 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-03-30 06:53:51 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-03-30 06:53:51 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=0 bl=148 pwr=0
2025-03-30 06:53:51 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=1 bl=148 pwr=0
2025-03-30 06:53:51 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=2 bl=148 pwr=0
2025-03-30 06:53:51 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=3 bl=148 pwr=0
2025-03-30 06:53:51 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=4 bl=148 pwr=0
2025-03-30 06:53:51 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=5 bl=148 pwr=0
2025-03-30 06:53:51 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=6 bl=148 pwr=0
2025-03-30 06:53:51 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=7 bl=148 pwr=0
2025-03-30 06:53:51 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 06:53:51 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 06:53:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:53:51 [DEBUG] fake_trx.py:317 (BTS@172.18.26.20:5700) Recv FAKE_CI cmd
2025-03-30 06:53:51 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-03-30 06:53:51 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:53:51 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:53:51 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:53:51 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:53:52 [DEBUG] clck_gen.py:128 IND CLOCK 306
2025-03-30 06:53:52 [DEBUG] clck_gen.py:128 IND CLOCK 408
2025-03-30 06:53:52 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:53:52 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:53:52 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:53:52 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:53:53 [DEBUG] clck_gen.py:128 IND CLOCK 510
2025-03-30 06:53:53 [DEBUG] clck_gen.py:128 IND CLOCK 612
2025-03-30 06:53:53 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:53:53 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:53:53 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:53:53 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:53:54 [DEBUG] clck_gen.py:128 IND CLOCK 714
2025-03-30 06:53:54 [DEBUG] clck_gen.py:128 IND CLOCK 816
2025-03-30 06:53:54 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:53:54 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:53:54 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:53:54 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:53:55 [DEBUG] clck_gen.py:128 IND CLOCK 918
2025-03-30 06:53:55 [DEBUG] clck_gen.py:128 IND CLOCK 1020
2025-03-30 06:53:55 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:53:55 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:53:55 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:53:55 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:53:56 [DEBUG] clck_gen.py:128 IND CLOCK 1122
2025-03-30 06:53:56 [DEBUG] clck_gen.py:128 IND CLOCK 1224
2025-03-30 06:53:57 [DEBUG] clck_gen.py:128 IND CLOCK 1326
2025-03-30 06:53:57 [DEBUG] clck_gen.py:128 IND CLOCK 1428
2025-03-30 06:53:57 [DEBUG] clck_gen.py:128 IND CLOCK 1530
2025-03-30 06:53:58 [DEBUG] clck_gen.py:128 IND CLOCK 1632
2025-03-30 06:53:58 [DEBUG] clck_gen.py:128 IND CLOCK 1734
2025-03-30 06:53:59 [DEBUG] clck_gen.py:128 IND CLOCK 1836
2025-03-30 06:53:59 [DEBUG] clck_gen.py:128 IND CLOCK 1938
2025-03-30 06:54:00 [DEBUG] clck_gen.py:128 IND CLOCK 2040
2025-03-30 06:54:00 [DEBUG] clck_gen.py:128 IND CLOCK 2142
2025-03-30 06:54:01 [DEBUG] clck_gen.py:128 IND CLOCK 2244
2025-03-30 06:54:01 [DEBUG] clck_gen.py:128 IND CLOCK 2346
2025-03-30 06:54:02 [DEBUG] clck_gen.py:128 IND CLOCK 2448
2025-03-30 06:54:02 [DEBUG] clck_gen.py:128 IND CLOCK 2550
2025-03-30 06:54:03 [DEBUG] clck_gen.py:128 IND CLOCK 2652
2025-03-30 06:54:03 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:54:03 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:54:03 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:54:03 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:54:03 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:54:03 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 06:54:03 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 06:54:03 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 06:54:03 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=2721 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:54:03 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:54:03 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:54:03 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:54:03 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=2721 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:54:08 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 06:54:08 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 06:54:08 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:54:08 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:54:08 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:54:08 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:54:08 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:54:08 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 06:54:08 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:54:08 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 06:54:08 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 06:54:08 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 06:54:08 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 06:54:08 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 06:54:08 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:54:08 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:54:08 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 06:54:08 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 06:54:08 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 06:54:08 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 06:54:08 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 06:54:08 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 06:54:08 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:54:08 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:54:08 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 06:54:08 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 06:54:08 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 06:54:08 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 06:54:08 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 06:54:08 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 06:54:08 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:54:08 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:54:08 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 06:54:08 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 06:54:08 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 06:54:08 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 06:54:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 06:54:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 06:54:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 06:54:08 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 06:54:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 06:54:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 06:54:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 06:54:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:54:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 06:54:08 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 06:54:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:54:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:54:08 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 06:54:08 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 06:54:08 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 06:54:08 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 06:54:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:54:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:54:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:54:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 06:54:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:54:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:54:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:54:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:54:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:54:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:54:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:54:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:54:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:54:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:54:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:54:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:54:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:54:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:54:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:54:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:54:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:54:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:54:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:54:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:54:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:54:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:54:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:54:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:54:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:54:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:54:08 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-03-30 06:54:08 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-03-30 06:54:08 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-03-30 06:54:08 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-03-30 06:54:08 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-03-30 06:54:08 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-03-30 06:54:08 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-03-30 06:54:08 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-03-30 06:54:08 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-03-30 06:54:08 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-03-30 06:54:08 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=0 bl=148 pwr=0
2025-03-30 06:54:08 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=1 bl=148 pwr=0
2025-03-30 06:54:08 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=2 bl=148 pwr=0
2025-03-30 06:54:08 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=3 bl=148 pwr=0
2025-03-30 06:54:08 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=4 bl=148 pwr=0
2025-03-30 06:54:08 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=5 bl=148 pwr=0
2025-03-30 06:54:08 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=6 bl=148 pwr=0
2025-03-30 06:54:08 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=7 bl=148 pwr=0
2025-03-30 06:54:09 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 06:54:09 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 06:54:09 [DEBUG] fake_trx.py:317 (BTS@172.18.26.20:5700) Recv FAKE_CI cmd
2025-03-30 06:54:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:54:09 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:54:09 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:54:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:54:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:54:09 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:54:09 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:54:09 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:54:09 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:54:09 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-03-30 06:54:09 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:54:09 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:54:09 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:54:09 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:54:09 [DEBUG] clck_gen.py:128 IND CLOCK 306
2025-03-30 06:54:10 [DEBUG] clck_gen.py:128 IND CLOCK 408
2025-03-30 06:54:10 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:54:10 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:54:10 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:54:10 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:54:10 [DEBUG] clck_gen.py:128 IND CLOCK 510
2025-03-30 06:54:11 [DEBUG] clck_gen.py:128 IND CLOCK 612
2025-03-30 06:54:11 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:54:11 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:54:11 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:54:11 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:54:11 [DEBUG] clck_gen.py:128 IND CLOCK 714
2025-03-30 06:54:12 [DEBUG] clck_gen.py:128 IND CLOCK 816
2025-03-30 06:54:12 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:54:12 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:54:12 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:54:12 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:54:12 [DEBUG] clck_gen.py:128 IND CLOCK 918
2025-03-30 06:54:13 [DEBUG] clck_gen.py:128 IND CLOCK 1020
2025-03-30 06:54:13 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:54:13 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:54:13 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:54:13 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:54:13 [DEBUG] clck_gen.py:128 IND CLOCK 1122
2025-03-30 06:54:14 [DEBUG] clck_gen.py:128 IND CLOCK 1224
2025-03-30 06:54:14 [DEBUG] clck_gen.py:128 IND CLOCK 1326
2025-03-30 06:54:15 [DEBUG] clck_gen.py:128 IND CLOCK 1428
2025-03-30 06:54:15 [DEBUG] clck_gen.py:128 IND CLOCK 1530
2025-03-30 06:54:16 [DEBUG] clck_gen.py:128 IND CLOCK 1632
2025-03-30 06:54:16 [DEBUG] clck_gen.py:128 IND CLOCK 1734
2025-03-30 06:54:16 [DEBUG] clck_gen.py:128 IND CLOCK 1836
2025-03-30 06:54:17 [DEBUG] clck_gen.py:128 IND CLOCK 1938
2025-03-30 06:54:17 [DEBUG] clck_gen.py:128 IND CLOCK 2040
2025-03-30 06:54:18 [DEBUG] clck_gen.py:128 IND CLOCK 2142
2025-03-30 06:54:18 [DEBUG] clck_gen.py:128 IND CLOCK 2244
2025-03-30 06:54:19 [DEBUG] clck_gen.py:128 IND CLOCK 2346
2025-03-30 06:54:19 [DEBUG] clck_gen.py:128 IND CLOCK 2448
2025-03-30 06:54:20 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:54:20 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:54:20 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:54:20 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:54:20 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:54:20 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:54:20 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:54:20 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:54:20 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:54:20 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:54:20 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 06:54:20 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 06:54:20 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 06:54:20 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=2511 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:54:20 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=2511 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:54:20 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=2511 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:54:20 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=2511 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:54:20 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=2511 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:54:20 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=2511 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:54:20 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=2512 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:54:20 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=2512 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:54:20 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=2512 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:54:20 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=2512 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:54:20 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=2512 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:54:20 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=2512 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:54:20 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=2512 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:54:20 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=2512 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:54:25 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 06:54:25 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 06:54:25 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:54:25 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:54:25 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:54:25 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:54:25 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:54:25 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 06:54:25 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:54:25 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 06:54:25 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 06:54:25 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 06:54:25 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 06:54:25 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 06:54:25 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:54:25 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:54:25 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 06:54:25 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 06:54:25 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 06:54:25 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 06:54:25 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 06:54:25 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 06:54:25 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:54:25 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:54:25 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 06:54:25 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 06:54:25 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 06:54:25 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 06:54:25 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 06:54:25 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 06:54:25 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:54:25 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:54:25 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 06:54:25 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 06:54:25 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 06:54:25 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 06:54:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 06:54:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 06:54:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 06:54:25 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 06:54:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 06:54:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 06:54:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 06:54:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:54:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 06:54:25 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 06:54:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:54:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:54:25 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 06:54:25 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 06:54:25 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 06:54:25 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 06:54:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:54:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:54:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:54:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 06:54:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:54:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:54:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:54:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:54:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:54:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:54:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:54:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:54:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:54:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:54:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:54:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:54:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:54:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:54:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:54:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:54:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:54:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:54:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:54:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:54:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:54:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:54:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:54:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:54:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:54:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:54:25 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-03-30 06:54:25 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-03-30 06:54:25 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-03-30 06:54:25 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-03-30 06:54:25 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-03-30 06:54:25 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-03-30 06:54:25 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-03-30 06:54:25 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-03-30 06:54:25 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-03-30 06:54:25 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-03-30 06:54:25 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=0 bl=148 pwr=0
2025-03-30 06:54:25 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=1 bl=148 pwr=0
2025-03-30 06:54:25 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=2 bl=148 pwr=0
2025-03-30 06:54:25 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=3 bl=148 pwr=0
2025-03-30 06:54:25 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=4 bl=148 pwr=0
2025-03-30 06:54:25 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=5 bl=148 pwr=0
2025-03-30 06:54:25 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=6 bl=148 pwr=0
2025-03-30 06:54:25 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=7 bl=148 pwr=0
2025-03-30 06:54:25 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 06:54:25 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 06:54:25 [DEBUG] fake_trx.py:317 (BTS@172.18.26.20:5700) Recv FAKE_CI cmd
2025-03-30 06:54:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:54:25 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:54:25 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:54:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:54:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:54:25 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:54:25 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:54:25 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:54:25 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:54:26 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-03-30 06:54:26 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:54:26 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:54:26 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:54:26 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:54:26 [DEBUG] clck_gen.py:128 IND CLOCK 306
2025-03-30 06:54:27 [DEBUG] clck_gen.py:128 IND CLOCK 408
2025-03-30 06:54:27 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:54:27 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:54:27 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:54:27 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:54:27 [DEBUG] clck_gen.py:128 IND CLOCK 510
2025-03-30 06:54:27 [DEBUG] clck_gen.py:128 IND CLOCK 612
2025-03-30 06:54:28 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:54:28 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:54:28 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:54:28 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:54:28 [DEBUG] clck_gen.py:128 IND CLOCK 714
2025-03-30 06:54:28 [DEBUG] clck_gen.py:128 IND CLOCK 816
2025-03-30 06:54:29 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:54:29 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:54:29 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:54:29 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:54:29 [DEBUG] clck_gen.py:128 IND CLOCK 918
2025-03-30 06:54:29 [DEBUG] clck_gen.py:128 IND CLOCK 1020
2025-03-30 06:54:30 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:54:30 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:54:30 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:54:30 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:54:30 [DEBUG] clck_gen.py:128 IND CLOCK 1122
2025-03-30 06:54:30 [DEBUG] clck_gen.py:128 IND CLOCK 1224
2025-03-30 06:54:31 [DEBUG] clck_gen.py:128 IND CLOCK 1326
2025-03-30 06:54:31 [DEBUG] clck_gen.py:128 IND CLOCK 1428
2025-03-30 06:54:32 [DEBUG] clck_gen.py:128 IND CLOCK 1530
2025-03-30 06:54:32 [DEBUG] clck_gen.py:128 IND CLOCK 1632
2025-03-30 06:54:33 [DEBUG] clck_gen.py:128 IND CLOCK 1734
2025-03-30 06:54:33 [DEBUG] clck_gen.py:128 IND CLOCK 1836
2025-03-30 06:54:34 [DEBUG] clck_gen.py:128 IND CLOCK 1938
2025-03-30 06:54:34 [DEBUG] clck_gen.py:128 IND CLOCK 2040
2025-03-30 06:54:35 [DEBUG] clck_gen.py:128 IND CLOCK 2142
2025-03-30 06:54:35 [DEBUG] clck_gen.py:128 IND CLOCK 2244
2025-03-30 06:54:35 [DEBUG] clck_gen.py:128 IND CLOCK 2346
2025-03-30 06:54:36 [DEBUG] clck_gen.py:128 IND CLOCK 2448
2025-03-30 06:54:36 [DEBUG] clck_gen.py:128 IND CLOCK 2550
2025-03-30 06:54:37 [DEBUG] clck_gen.py:128 IND CLOCK 2652
2025-03-30 06:54:37 [DEBUG] clck_gen.py:128 IND CLOCK 2754
2025-03-30 06:54:38 [DEBUG] clck_gen.py:128 IND CLOCK 2856
2025-03-30 06:54:38 [DEBUG] clck_gen.py:128 IND CLOCK 2958
2025-03-30 06:54:39 [DEBUG] clck_gen.py:128 IND CLOCK 3060
2025-03-30 06:54:39 [DEBUG] clck_gen.py:128 IND CLOCK 3162
2025-03-30 06:54:40 [DEBUG] clck_gen.py:128 IND CLOCK 3264
2025-03-30 06:54:40 [DEBUG] clck_gen.py:128 IND CLOCK 3366
2025-03-30 06:54:40 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:54:40 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:54:40 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:54:40 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:54:40 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:54:40 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:54:40 [WARNING] transceiver.py:287 (MS@172.18.26.22:6700) RX TRXD message (fn=3377 tn=1 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:54:40 [WARNING] transceiver.py:287 (MS@172.18.26.22:6700) RX TRXD message (fn=3377 tn=2 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:54:40 [WARNING] transceiver.py:287 (MS@172.18.26.22:6700) RX TRXD message (fn=3377 tn=3 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:54:40 [WARNING] transceiver.py:287 (MS@172.18.26.22:6700) RX TRXD message (fn=3377 tn=4 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:54:40 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:54:40 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:54:40 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 06:54:40 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 06:54:40 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 06:54:40 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:54:40 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:54:45 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 06:54:45 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 06:54:45 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:54:45 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:54:45 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:54:45 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:54:45 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:54:45 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 06:54:45 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:54:45 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 06:54:45 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 06:54:45 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 06:54:45 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 06:54:45 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 06:54:45 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:54:45 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:54:45 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 06:54:45 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 06:54:45 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 06:54:45 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 06:54:45 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 06:54:45 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 06:54:45 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:54:45 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:54:45 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 06:54:45 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 06:54:45 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 06:54:45 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 06:54:45 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 06:54:45 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 06:54:45 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:54:45 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:54:45 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 06:54:45 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 06:54:45 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 06:54:45 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 06:54:45 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 06:54:45 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 06:54:45 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 06:54:45 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 06:54:45 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 06:54:45 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 06:54:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 06:54:45 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:54:45 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 06:54:45 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 06:54:45 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:54:45 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:54:45 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 06:54:45 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 06:54:45 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 06:54:45 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 06:54:45 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:54:45 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:54:45 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:54:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 06:54:45 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:54:45 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:54:45 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:54:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:54:45 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:54:45 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:54:45 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:54:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:54:45 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:54:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:54:45 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:54:45 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:54:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:54:45 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:54:45 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:54:45 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:54:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:54:45 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:54:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:54:45 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:54:45 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:54:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:54:45 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:54:45 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:54:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:54:45 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:54:45 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-03-30 06:54:46 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-03-30 06:54:46 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-03-30 06:54:46 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-03-30 06:54:46 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-03-30 06:54:46 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-03-30 06:54:46 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-03-30 06:54:46 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-03-30 06:54:46 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-03-30 06:54:46 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-03-30 06:54:46 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=0 bl=148 pwr=0
2025-03-30 06:54:46 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=1 bl=148 pwr=0
2025-03-30 06:54:46 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=2 bl=148 pwr=0
2025-03-30 06:54:46 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=3 bl=148 pwr=0
2025-03-30 06:54:46 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=4 bl=148 pwr=0
2025-03-30 06:54:46 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=5 bl=148 pwr=0
2025-03-30 06:54:46 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=6 bl=148 pwr=0
2025-03-30 06:54:46 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=7 bl=148 pwr=0
2025-03-30 06:54:46 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 06:54:46 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 06:54:46 [DEBUG] fake_trx.py:317 (BTS@172.18.26.20:5700) Recv FAKE_CI cmd
2025-03-30 06:54:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:54:46 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:54:46 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:54:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:54:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:54:46 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:54:46 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:54:46 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:54:46 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:54:46 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:54:46 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:54:46 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:54:46 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:54:46 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:54:46 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:54:46 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:54:46 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:54:46 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:54:46 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:54:46 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 06:54:46 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 06:54:46 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 06:54:51 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 06:54:51 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 06:54:51 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:54:51 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:54:51 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:54:51 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:54:51 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:54:51 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 06:54:51 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:54:51 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 06:54:51 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 06:54:51 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 06:54:51 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 06:54:51 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 06:54:51 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:54:51 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:54:51 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 06:54:51 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 06:54:51 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 06:54:51 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 06:54:51 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 06:54:51 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 06:54:51 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:54:51 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:54:51 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 06:54:51 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 06:54:51 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 06:54:51 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 06:54:51 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 06:54:51 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 06:54:51 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:54:51 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:54:51 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 06:54:51 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 06:54:51 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 06:54:51 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 06:54:51 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 06:54:51 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 06:54:51 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 06:54:51 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 06:54:51 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 06:54:51 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 06:54:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 06:54:51 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:54:51 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 06:54:51 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 06:54:51 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:54:51 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:54:51 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 06:54:51 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 06:54:51 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 06:54:51 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 06:54:51 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:54:51 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:54:51 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:54:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 06:54:51 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:54:51 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:54:51 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:54:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:54:51 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:54:51 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:54:51 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:54:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:54:51 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:54:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:54:51 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:54:51 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:54:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:54:51 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:54:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:54:51 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:54:51 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:54:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:54:51 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:54:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:54:51 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:54:51 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:54:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:54:51 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:54:51 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:54:51 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:54:51 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-03-30 06:54:51 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-03-30 06:54:51 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-03-30 06:54:51 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-03-30 06:54:51 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-03-30 06:54:51 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-03-30 06:54:51 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-03-30 06:54:51 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-03-30 06:54:51 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-03-30 06:54:51 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-03-30 06:54:51 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=0 bl=148 pwr=0
2025-03-30 06:54:51 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=1 bl=148 pwr=0
2025-03-30 06:54:51 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=2 bl=148 pwr=0
2025-03-30 06:54:51 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=3 bl=148 pwr=0
2025-03-30 06:54:51 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=4 bl=148 pwr=0
2025-03-30 06:54:51 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=5 bl=148 pwr=0
2025-03-30 06:54:51 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=6 bl=148 pwr=0
2025-03-30 06:54:51 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=7 bl=148 pwr=0
2025-03-30 06:54:51 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 06:54:51 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 06:54:51 [DEBUG] fake_trx.py:317 (BTS@172.18.26.20:5700) Recv FAKE_CI cmd
2025-03-30 06:54:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:54:51 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:54:51 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:54:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:54:51 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:54:51 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:54:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:54:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:54:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:54:51 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:54:51 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:54:51 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:54:51 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:54:51 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:54:51 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:54:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:54:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:54:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:54:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:54:52 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:54:52 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:54:52 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:54:52 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:54:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:54:52 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:54:52 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:54:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:54:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:54:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:54:52 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:54:52 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:54:52 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:54:52 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:54:52 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:54:52 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:54:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:54:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:54:52 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-03-30 06:54:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:54:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:54:52 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:54:52 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:54:52 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:54:52 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:54:52 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:54:52 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:54:52 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:54:52 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:54:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:54:52 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:54:52 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:54:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:54:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:54:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:54:52 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:54:52 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:54:52 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:54:52 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:54:52 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:54:52 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:54:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:54:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:54:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:54:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:54:52 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:54:52 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:54:52 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:54:52 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:54:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:54:52 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:54:52 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:54:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:54:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:54:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:54:52 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:54:52 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:54:52 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:54:52 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:54:52 [DEBUG] clck_gen.py:128 IND CLOCK 306
2025-03-30 06:54:52 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:54:52 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:54:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:54:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:54:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:54:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:54:53 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:54:53 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:54:53 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:54:53 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:54:53 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:54:53 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:54:53 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:54:53 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:54:53 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:54:53 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:54:53 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 06:54:53 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 06:54:53 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 06:54:53 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=383 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:54:53 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=383 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:54:53 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=383 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:54:53 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=383 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:54:53 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=383 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:54:53 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=383 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:54:53 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=383 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:54:53 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=384 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:54:53 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=384 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:54:53 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=384 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:54:53 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=384 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:54:53 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=384 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:54:53 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=384 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:54:53 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=384 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:54:53 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=384 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:54:58 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 06:54:58 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 06:54:58 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:54:58 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:54:58 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:54:58 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:54:58 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:54:58 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 06:54:58 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:54:58 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 06:54:58 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 06:54:58 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 06:54:58 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 06:54:58 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 06:54:58 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:54:58 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:54:58 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 06:54:58 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 06:54:58 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 06:54:58 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 06:54:58 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 06:54:58 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 06:54:58 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:54:58 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:54:58 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 06:54:58 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 06:54:58 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 06:54:58 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 06:54:58 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 06:54:58 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 06:54:58 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:54:58 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:54:58 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 06:54:58 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 06:54:58 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 06:54:58 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 06:54:58 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 06:54:58 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 06:54:58 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 06:54:58 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 06:54:58 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 06:54:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 06:54:58 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 06:54:58 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 06:54:58 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 06:54:58 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:54:58 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:54:58 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 06:54:58 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 06:54:58 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 06:54:58 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 06:54:58 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:54:58 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:54:58 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:54:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 06:54:58 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:54:58 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:54:58 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:54:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:54:58 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:54:58 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:54:58 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:54:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:54:58 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:54:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:54:58 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:54:58 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:54:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:54:58 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:54:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:54:58 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:54:58 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:54:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:54:58 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:54:58 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:54:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:54:58 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:54:58 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:54:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:54:58 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:54:58 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:54:58 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:54:58 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-03-30 06:54:58 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-03-30 06:54:58 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-03-30 06:54:58 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-03-30 06:54:58 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-03-30 06:54:58 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-03-30 06:54:58 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-03-30 06:54:58 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-03-30 06:54:58 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-03-30 06:54:58 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-03-30 06:54:58 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=0 bl=148 pwr=0
2025-03-30 06:54:58 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=1 bl=148 pwr=0
2025-03-30 06:54:58 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=2 bl=148 pwr=0
2025-03-30 06:54:58 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=3 bl=148 pwr=0
2025-03-30 06:54:58 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=4 bl=148 pwr=0
2025-03-30 06:54:58 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=5 bl=148 pwr=0
2025-03-30 06:54:58 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=6 bl=148 pwr=0
2025-03-30 06:54:58 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=7 bl=148 pwr=0
2025-03-30 06:54:58 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 06:54:58 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 06:54:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:54:58 [DEBUG] fake_trx.py:317 (BTS@172.18.26.20:5700) Recv FAKE_CI cmd
2025-03-30 06:54:58 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:54:58 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:54:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:54:58 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:54:58 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:54:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:54:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:54:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:54:58 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:54:58 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:54:58 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:54:58 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:54:58 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:54:58 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:54:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:54:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:54:59 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-03-30 06:54:59 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:54:59 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:54:59 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:54:59 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:54:59 [DEBUG] clck_gen.py:128 IND CLOCK 306
2025-03-30 06:55:00 [DEBUG] clck_gen.py:128 IND CLOCK 408
2025-03-30 06:55:00 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:55:00 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:55:00 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:55:00 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:55:00 [DEBUG] clck_gen.py:128 IND CLOCK 510
2025-03-30 06:55:00 [DEBUG] clck_gen.py:128 IND CLOCK 612
2025-03-30 06:55:01 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:55:01 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:55:01 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:55:01 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:55:01 [DEBUG] clck_gen.py:128 IND CLOCK 714
2025-03-30 06:55:01 [DEBUG] clck_gen.py:128 IND CLOCK 816
2025-03-30 06:55:02 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:55:02 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:55:02 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:55:02 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:55:02 [DEBUG] clck_gen.py:128 IND CLOCK 918
2025-03-30 06:55:02 [DEBUG] clck_gen.py:128 IND CLOCK 1020
2025-03-30 06:55:03 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:55:03 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:55:03 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:55:03 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:55:03 [DEBUG] clck_gen.py:128 IND CLOCK 1122
2025-03-30 06:55:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:55:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:55:03 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:55:03 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:55:03 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:55:03 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:55:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:55:03 [DEBUG] clck_gen.py:128 IND CLOCK 1224
2025-03-30 06:55:03 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:55:03 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:55:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:55:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:55:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:55:03 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:55:03 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:55:03 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:55:03 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:55:03 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:55:03 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:55:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:55:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:55:04 [DEBUG] clck_gen.py:128 IND CLOCK 1326
2025-03-30 06:55:04 [DEBUG] clck_gen.py:128 IND CLOCK 1428
2025-03-30 06:55:05 [DEBUG] clck_gen.py:128 IND CLOCK 1530
2025-03-30 06:55:05 [DEBUG] clck_gen.py:128 IND CLOCK 1632
2025-03-30 06:55:06 [DEBUG] clck_gen.py:128 IND CLOCK 1734
2025-03-30 06:55:06 [DEBUG] clck_gen.py:128 IND CLOCK 1836
2025-03-30 06:55:07 [DEBUG] clck_gen.py:128 IND CLOCK 1938
2025-03-30 06:55:07 [DEBUG] clck_gen.py:128 IND CLOCK 2040
2025-03-30 06:55:08 [DEBUG] clck_gen.py:128 IND CLOCK 2142
2025-03-30 06:55:08 [DEBUG] clck_gen.py:128 IND CLOCK 2244
2025-03-30 06:55:08 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:55:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:55:08 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:55:08 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:55:08 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:55:08 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:55:08 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:55:08 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:55:08 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:55:08 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:55:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:55:08 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:55:08 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:55:08 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:55:08 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:55:08 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:55:08 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:55:08 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:55:08 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:55:08 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:55:08 [DEBUG] clck_gen.py:128 IND CLOCK 2346
2025-03-30 06:55:09 [DEBUG] clck_gen.py:128 IND CLOCK 2448
2025-03-30 06:55:09 [DEBUG] clck_gen.py:128 IND CLOCK 2550
2025-03-30 06:55:10 [DEBUG] clck_gen.py:128 IND CLOCK 2652
2025-03-30 06:55:10 [DEBUG] clck_gen.py:128 IND CLOCK 2754
2025-03-30 06:55:11 [DEBUG] clck_gen.py:128 IND CLOCK 2856
2025-03-30 06:55:11 [DEBUG] clck_gen.py:128 IND CLOCK 2958
2025-03-30 06:55:12 [DEBUG] clck_gen.py:128 IND CLOCK 3060
2025-03-30 06:55:12 [DEBUG] clck_gen.py:128 IND CLOCK 3162
2025-03-30 06:55:13 [DEBUG] clck_gen.py:128 IND CLOCK 3264
2025-03-30 06:55:13 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=3324): ver=1 fn=3323 tn=5 bl=148 pwr=0
2025-03-30 06:55:13 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=3324): ver=1 fn=3323 tn=6 bl=148 pwr=0
2025-03-30 06:55:13 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=3324): ver=1 fn=3323 tn=7 bl=148 pwr=0
2025-03-30 06:55:13 [DEBUG] clck_gen.py:128 IND CLOCK 3366
2025-03-30 06:55:13 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:55:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:55:13 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:55:13 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:55:13 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:55:13 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:55:13 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:55:13 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:55:13 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:55:13 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:55:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:55:13 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:55:13 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:55:13 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:55:13 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:55:13 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:55:14 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:55:14 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:55:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:55:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:55:14 [DEBUG] clck_gen.py:128 IND CLOCK 3468
2025-03-30 06:55:14 [DEBUG] clck_gen.py:128 IND CLOCK 3570
2025-03-30 06:55:15 [DEBUG] clck_gen.py:128 IND CLOCK 3672
2025-03-30 06:55:15 [DEBUG] clck_gen.py:128 IND CLOCK 3774
2025-03-30 06:55:16 [DEBUG] clck_gen.py:128 IND CLOCK 3876
2025-03-30 06:55:16 [DEBUG] clck_gen.py:128 IND CLOCK 3978
2025-03-30 06:55:16 [DEBUG] clck_gen.py:128 IND CLOCK 4080
2025-03-30 06:55:17 [DEBUG] clck_gen.py:128 IND CLOCK 4182
2025-03-30 06:55:17 [DEBUG] clck_gen.py:128 IND CLOCK 4284
2025-03-30 06:55:18 [DEBUG] clck_gen.py:128 IND CLOCK 4386
2025-03-30 06:55:18 [DEBUG] clck_gen.py:128 IND CLOCK 4488
2025-03-30 06:55:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:55:19 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:55:19 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:55:19 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:55:19 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:55:19 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:55:19 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:55:19 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:55:19 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:55:19 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:55:19 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:55:19 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:55:19 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 06:55:19 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 06:55:19 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 06:55:19 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=4530 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:55:19 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=4530 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:55:19 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=4530 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:55:19 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=4530 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:55:19 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=4530 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:55:19 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=4530 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:55:19 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=4530 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:55:19 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=4530 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:55:24 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 06:55:24 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 06:55:24 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:55:24 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:55:24 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:55:24 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:55:24 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:55:24 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 06:55:24 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:55:24 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 06:55:24 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 06:55:24 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 06:55:24 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 06:55:24 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 06:55:24 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:55:24 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:55:24 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 06:55:24 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 06:55:24 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 06:55:24 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 06:55:24 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 06:55:24 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 06:55:24 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:55:24 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:55:24 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 06:55:24 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 06:55:24 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 06:55:24 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 06:55:24 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 06:55:24 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 06:55:24 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:55:24 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:55:24 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 06:55:24 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 06:55:24 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 06:55:24 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 06:55:24 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 06:55:24 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 06:55:24 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 06:55:24 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 06:55:24 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 06:55:24 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 06:55:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 06:55:24 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:55:24 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 06:55:24 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 06:55:24 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:55:24 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:55:24 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 06:55:24 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 06:55:24 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 06:55:24 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 06:55:24 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:55:24 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:55:24 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:55:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 06:55:24 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:55:24 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:55:24 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:55:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:55:24 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:55:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:55:24 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:55:24 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:55:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:55:24 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:55:24 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:55:24 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:55:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:55:24 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:55:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:55:24 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:55:24 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:55:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:55:24 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:55:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:55:24 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:55:24 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:55:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:55:24 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:55:24 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:55:24 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:55:24 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-03-30 06:55:24 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-03-30 06:55:24 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-03-30 06:55:24 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-03-30 06:55:24 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-03-30 06:55:24 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-03-30 06:55:24 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-03-30 06:55:24 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-03-30 06:55:24 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-03-30 06:55:24 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-03-30 06:55:24 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=0 bl=148 pwr=0
2025-03-30 06:55:24 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=1 bl=148 pwr=0
2025-03-30 06:55:24 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=2 bl=148 pwr=0
2025-03-30 06:55:24 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=3 bl=148 pwr=0
2025-03-30 06:55:24 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=4 bl=148 pwr=0
2025-03-30 06:55:24 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=5 bl=148 pwr=0
2025-03-30 06:55:24 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=6 bl=148 pwr=0
2025-03-30 06:55:24 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=7 bl=148 pwr=0
2025-03-30 06:55:24 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 06:55:24 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 06:55:24 [DEBUG] fake_trx.py:317 (BTS@172.18.26.20:5700) Recv FAKE_CI cmd
2025-03-30 06:55:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:55:24 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:55:24 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:55:24 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:55:24 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:55:24 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:55:24 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:55:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:55:24 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:55:24 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:55:24 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:55:24 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:55:24 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:55:24 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:55:24 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:55:24 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:55:24 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:55:25 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-03-30 06:55:25 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:55:25 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:55:25 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:55:25 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:55:25 [DEBUG] clck_gen.py:128 IND CLOCK 306
2025-03-30 06:55:25 [DEBUG] clck_gen.py:128 IND CLOCK 408
2025-03-30 06:55:26 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:55:26 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:55:26 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:55:26 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:55:26 [DEBUG] clck_gen.py:128 IND CLOCK 510
2025-03-30 06:55:26 [DEBUG] clck_gen.py:128 IND CLOCK 612
2025-03-30 06:55:27 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:55:27 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:55:27 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:55:27 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:55:27 [DEBUG] clck_gen.py:128 IND CLOCK 714
2025-03-30 06:55:27 [DEBUG] clck_gen.py:128 IND CLOCK 816
2025-03-30 06:55:28 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:55:28 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:55:28 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:55:28 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:55:28 [DEBUG] clck_gen.py:128 IND CLOCK 918
2025-03-30 06:55:28 [DEBUG] clck_gen.py:128 IND CLOCK 1020
2025-03-30 06:55:29 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:55:29 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:55:29 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:55:29 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:55:29 [DEBUG] clck_gen.py:128 IND CLOCK 1122
2025-03-30 06:55:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:55:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:55:29 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:55:29 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:55:29 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:55:29 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:55:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:55:29 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:55:29 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:55:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:55:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:55:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:55:29 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:55:29 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:55:29 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:55:29 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:55:29 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:55:29 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:55:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:55:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:55:29 [DEBUG] clck_gen.py:128 IND CLOCK 1224
2025-03-30 06:55:30 [DEBUG] clck_gen.py:128 IND CLOCK 1326
2025-03-30 06:55:30 [DEBUG] clck_gen.py:128 IND CLOCK 1428
2025-03-30 06:55:31 [DEBUG] clck_gen.py:128 IND CLOCK 1530
2025-03-30 06:55:31 [DEBUG] clck_gen.py:128 IND CLOCK 1632
2025-03-30 06:55:32 [DEBUG] clck_gen.py:128 IND CLOCK 1734
2025-03-30 06:55:32 [DEBUG] clck_gen.py:128 IND CLOCK 1836
2025-03-30 06:55:33 [DEBUG] clck_gen.py:128 IND CLOCK 1938
2025-03-30 06:55:33 [DEBUG] clck_gen.py:128 IND CLOCK 2040
2025-03-30 06:55:33 [DEBUG] clck_gen.py:128 IND CLOCK 2142
2025-03-30 06:55:34 [DEBUG] clck_gen.py:128 IND CLOCK 2244
2025-03-30 06:55:34 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:55:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:55:34 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:55:34 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:55:34 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:55:34 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:55:34 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:55:34 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:55:34 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:55:34 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:55:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:55:34 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:55:34 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:55:34 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:55:34 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:55:34 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:55:34 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:55:34 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:55:34 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:55:34 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:55:34 [DEBUG] clck_gen.py:128 IND CLOCK 2346
2025-03-30 06:55:35 [DEBUG] clck_gen.py:128 IND CLOCK 2448
2025-03-30 06:55:35 [DEBUG] clck_gen.py:128 IND CLOCK 2550
2025-03-30 06:55:36 [DEBUG] clck_gen.py:128 IND CLOCK 2652
2025-03-30 06:55:36 [DEBUG] clck_gen.py:128 IND CLOCK 2754
2025-03-30 06:55:37 [DEBUG] clck_gen.py:128 IND CLOCK 2856
2025-03-30 06:55:37 [DEBUG] clck_gen.py:128 IND CLOCK 2958
2025-03-30 06:55:38 [DEBUG] clck_gen.py:128 IND CLOCK 3060
2025-03-30 06:55:38 [DEBUG] clck_gen.py:128 IND CLOCK 3162
2025-03-30 06:55:39 [DEBUG] clck_gen.py:128 IND CLOCK 3264
2025-03-30 06:55:39 [DEBUG] clck_gen.py:128 IND CLOCK 3366
2025-03-30 06:55:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:55:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:55:39 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:55:39 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:55:39 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:55:39 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:55:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:55:39 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:55:39 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:55:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:55:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:55:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:55:39 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:55:39 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:55:39 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:55:39 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:55:39 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:55:39 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:55:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:55:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:55:40 [DEBUG] clck_gen.py:128 IND CLOCK 3468
2025-03-30 06:55:40 [DEBUG] clck_gen.py:128 IND CLOCK 3570
2025-03-30 06:55:41 [DEBUG] clck_gen.py:128 IND CLOCK 3672
2025-03-30 06:55:41 [DEBUG] clck_gen.py:128 IND CLOCK 3774
2025-03-30 06:55:41 [DEBUG] clck_gen.py:128 IND CLOCK 3876
2025-03-30 06:55:42 [DEBUG] clck_gen.py:128 IND CLOCK 3978
2025-03-30 06:55:42 [DEBUG] clck_gen.py:128 IND CLOCK 4080
2025-03-30 06:55:43 [DEBUG] clck_gen.py:128 IND CLOCK 4182
2025-03-30 06:55:43 [DEBUG] clck_gen.py:128 IND CLOCK 4284
2025-03-30 06:55:44 [DEBUG] clck_gen.py:128 IND CLOCK 4386
2025-03-30 06:55:44 [DEBUG] clck_gen.py:128 IND CLOCK 4488
2025-03-30 06:55:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:55:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:55:44 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:55:44 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:55:44 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:55:44 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:55:44 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:55:44 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:55:44 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:55:44 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:55:44 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:55:44 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:55:44 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 06:55:44 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 06:55:44 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 06:55:44 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=4498 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:55:44 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=4498 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:55:44 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=4498 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:55:44 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=4498 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:55:44 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=4498 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:55:44 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=4498 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:55:44 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=4499 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:55:44 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=4499 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:55:44 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=4499 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:55:44 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=4499 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:55:44 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=4499 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:55:44 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=4499 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:55:44 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=4499 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:55:44 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=4499 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:55:49 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 06:55:49 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 06:55:49 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:55:49 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:55:49 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:55:49 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:55:49 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:55:49 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 06:55:49 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:55:49 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 06:55:49 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 06:55:49 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 06:55:49 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 06:55:49 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 06:55:49 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:55:49 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:55:49 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 06:55:49 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 06:55:49 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 06:55:49 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 06:55:49 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 06:55:49 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 06:55:49 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:55:49 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:55:49 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 06:55:49 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 06:55:49 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 06:55:49 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 06:55:49 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 06:55:49 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 06:55:49 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:55:49 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:55:49 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 06:55:49 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 06:55:49 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 06:55:49 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 06:55:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 06:55:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 06:55:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 06:55:49 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 06:55:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 06:55:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 06:55:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 06:55:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:55:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 06:55:49 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 06:55:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:55:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:55:49 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 06:55:49 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 06:55:49 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 06:55:49 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 06:55:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:55:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:55:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:55:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 06:55:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:55:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:55:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:55:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:55:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:55:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:55:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:55:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:55:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:55:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:55:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:55:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:55:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:55:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:55:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:55:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:55:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:55:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:55:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:55:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:55:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:55:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:55:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:55:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:55:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:55:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:55:49 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-03-30 06:55:50 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-03-30 06:55:50 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-03-30 06:55:50 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-03-30 06:55:50 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-03-30 06:55:50 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-03-30 06:55:50 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-03-30 06:55:50 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-03-30 06:55:50 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-03-30 06:55:50 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-03-30 06:55:50 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=0 bl=148 pwr=0
2025-03-30 06:55:50 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=1 bl=148 pwr=0
2025-03-30 06:55:50 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=2 bl=148 pwr=0
2025-03-30 06:55:50 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=3 bl=148 pwr=0
2025-03-30 06:55:50 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=4 bl=148 pwr=0
2025-03-30 06:55:50 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=5 bl=148 pwr=0
2025-03-30 06:55:50 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=6 bl=148 pwr=0
2025-03-30 06:55:50 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=7 bl=148 pwr=0
2025-03-30 06:55:50 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 06:55:50 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 06:55:50 [DEBUG] fake_trx.py:317 (BTS@172.18.26.20:5700) Recv FAKE_CI cmd
2025-03-30 06:55:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:55:50 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:55:50 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:55:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:55:50 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:55:50 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:55:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:55:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:55:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:55:50 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:55:50 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:55:50 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:55:50 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:55:50 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:55:50 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:55:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:55:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:55:50 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-03-30 06:55:50 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:55:50 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:55:50 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:55:50 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:55:51 [DEBUG] clck_gen.py:128 IND CLOCK 306
2025-03-30 06:55:51 [DEBUG] clck_gen.py:128 IND CLOCK 408
2025-03-30 06:55:51 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:55:51 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:55:51 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:55:51 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:55:52 [DEBUG] clck_gen.py:128 IND CLOCK 510
2025-03-30 06:55:52 [DEBUG] clck_gen.py:128 IND CLOCK 612
2025-03-30 06:55:52 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:55:52 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:55:52 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:55:52 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:55:53 [DEBUG] clck_gen.py:128 IND CLOCK 714
2025-03-30 06:55:53 [DEBUG] clck_gen.py:128 IND CLOCK 816
2025-03-30 06:55:53 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:55:53 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:55:53 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:55:53 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:55:54 [DEBUG] clck_gen.py:128 IND CLOCK 918
2025-03-30 06:55:54 [DEBUG] clck_gen.py:128 IND CLOCK 1020
2025-03-30 06:55:54 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:55:54 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:55:54 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:55:54 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:55:55 [DEBUG] clck_gen.py:128 IND CLOCK 1122
2025-03-30 06:55:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:55:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:55:55 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:55:55 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:55:55 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:55:55 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:55:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:55:55 [DEBUG] clck_gen.py:128 IND CLOCK 1224
2025-03-30 06:55:55 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:55:55 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:55:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:55:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:55:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:55:55 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:55:55 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:55:55 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:55:55 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:55:55 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:55:55 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:55:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:55:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:55:55 [DEBUG] clck_gen.py:128 IND CLOCK 1326
2025-03-30 06:55:56 [DEBUG] clck_gen.py:128 IND CLOCK 1428
2025-03-30 06:55:56 [DEBUG] clck_gen.py:128 IND CLOCK 1530
2025-03-30 06:55:57 [DEBUG] clck_gen.py:128 IND CLOCK 1632
2025-03-30 06:55:57 [DEBUG] clck_gen.py:128 IND CLOCK 1734
2025-03-30 06:55:58 [DEBUG] clck_gen.py:128 IND CLOCK 1836
2025-03-30 06:55:58 [DEBUG] clck_gen.py:128 IND CLOCK 1938
2025-03-30 06:55:59 [DEBUG] clck_gen.py:128 IND CLOCK 2040
2025-03-30 06:55:59 [DEBUG] clck_gen.py:128 IND CLOCK 2142
2025-03-30 06:56:00 [DEBUG] clck_gen.py:128 IND CLOCK 2244
2025-03-30 06:56:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:56:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:56:00 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:56:00 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:56:00 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:56:00 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:56:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:56:00 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:56:00 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:56:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:56:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:56:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:56:00 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:56:00 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:56:00 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:56:00 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:56:00 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:56:00 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:56:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:56:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:56:00 [DEBUG] clck_gen.py:128 IND CLOCK 2346
2025-03-30 06:56:01 [DEBUG] clck_gen.py:128 IND CLOCK 2448
2025-03-30 06:56:01 [DEBUG] clck_gen.py:128 IND CLOCK 2550
2025-03-30 06:56:02 [DEBUG] clck_gen.py:128 IND CLOCK 2652
2025-03-30 06:56:02 [DEBUG] clck_gen.py:128 IND CLOCK 2754
2025-03-30 06:56:03 [DEBUG] clck_gen.py:128 IND CLOCK 2856
2025-03-30 06:56:03 [DEBUG] clck_gen.py:128 IND CLOCK 2958
2025-03-30 06:56:04 [DEBUG] clck_gen.py:128 IND CLOCK 3060
2025-03-30 06:56:04 [DEBUG] clck_gen.py:128 IND CLOCK 3162
2025-03-30 06:56:04 [DEBUG] clck_gen.py:128 IND CLOCK 3264
2025-03-30 06:56:05 [DEBUG] clck_gen.py:128 IND CLOCK 3366
2025-03-30 06:56:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:56:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:56:05 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:56:05 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:56:05 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:56:05 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:56:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:56:05 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:56:05 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:56:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:56:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:56:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:56:05 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:56:05 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:56:05 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:56:05 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:56:05 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:56:05 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:56:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:56:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:56:05 [DEBUG] clck_gen.py:128 IND CLOCK 3468
2025-03-30 06:56:06 [DEBUG] clck_gen.py:128 IND CLOCK 3570
2025-03-30 06:56:06 [DEBUG] clck_gen.py:128 IND CLOCK 3672
2025-03-30 06:56:07 [DEBUG] clck_gen.py:128 IND CLOCK 3774
2025-03-30 06:56:07 [DEBUG] clck_gen.py:128 IND CLOCK 3876
2025-03-30 06:56:08 [DEBUG] clck_gen.py:128 IND CLOCK 3978
2025-03-30 06:56:08 [DEBUG] clck_gen.py:128 IND CLOCK 4080
2025-03-30 06:56:09 [DEBUG] clck_gen.py:128 IND CLOCK 4182
2025-03-30 06:56:09 [DEBUG] clck_gen.py:128 IND CLOCK 4284
2025-03-30 06:56:10 [DEBUG] clck_gen.py:128 IND CLOCK 4386
2025-03-30 06:56:10 [DEBUG] clck_gen.py:128 IND CLOCK 4488
2025-03-30 06:56:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:56:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:56:10 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:56:10 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:56:10 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:56:10 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:56:10 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:56:10 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:56:10 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:56:10 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:56:10 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:56:10 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:56:10 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 06:56:10 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 06:56:10 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 06:56:10 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=4510 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:56:10 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=4510 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:56:10 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=4510 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:56:10 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=4510 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:56:10 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=4510 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:56:10 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=4510 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:56:10 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=4510 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:56:10 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=4510 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:56:15 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 06:56:15 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 06:56:15 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:56:15 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:56:15 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:56:15 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:56:15 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:56:15 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 06:56:15 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:56:15 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 06:56:15 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 06:56:15 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 06:56:15 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 06:56:15 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 06:56:15 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:56:15 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:56:15 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 06:56:15 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 06:56:15 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 06:56:15 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 06:56:15 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 06:56:15 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 06:56:15 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:56:15 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:56:15 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 06:56:15 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 06:56:15 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 06:56:15 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 06:56:15 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 06:56:15 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 06:56:15 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:56:15 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:56:15 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 06:56:15 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 06:56:15 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 06:56:15 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 06:56:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 06:56:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 06:56:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 06:56:15 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 06:56:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 06:56:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 06:56:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 06:56:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:56:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 06:56:15 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 06:56:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:56:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:56:15 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 06:56:15 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 06:56:15 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 06:56:15 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 06:56:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:56:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:56:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:56:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 06:56:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:56:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:56:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:56:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:56:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:56:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:56:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:56:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:56:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:56:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:56:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:56:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:56:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:56:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:56:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:56:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:56:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:56:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:56:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:56:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:56:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:56:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:56:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:56:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:56:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:56:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:56:15 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-03-30 06:56:16 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-03-30 06:56:16 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-03-30 06:56:16 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-03-30 06:56:16 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-03-30 06:56:16 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-03-30 06:56:16 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-03-30 06:56:16 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-03-30 06:56:16 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-03-30 06:56:16 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-03-30 06:56:16 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=0 bl=148 pwr=0
2025-03-30 06:56:16 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=1 bl=148 pwr=0
2025-03-30 06:56:16 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=2 bl=148 pwr=0
2025-03-30 06:56:16 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=3 bl=148 pwr=0
2025-03-30 06:56:16 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=4 bl=148 pwr=0
2025-03-30 06:56:16 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=5 bl=148 pwr=0
2025-03-30 06:56:16 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=6 bl=148 pwr=0
2025-03-30 06:56:16 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=7 bl=148 pwr=0
2025-03-30 06:56:16 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 06:56:16 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 06:56:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:56:16 [DEBUG] fake_trx.py:317 (BTS@172.18.26.20:5700) Recv FAKE_CI cmd
2025-03-30 06:56:16 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:56:16 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:56:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:56:16 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:56:16 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:56:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:56:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:56:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:56:16 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:56:16 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:56:16 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:56:16 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:56:16 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:56:16 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:56:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:56:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:56:16 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-03-30 06:56:16 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:56:16 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:56:16 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:56:16 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:56:17 [DEBUG] clck_gen.py:128 IND CLOCK 306
2025-03-30 06:56:17 [DEBUG] clck_gen.py:128 IND CLOCK 408
2025-03-30 06:56:17 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:56:17 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:56:17 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:56:17 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:56:18 [DEBUG] clck_gen.py:128 IND CLOCK 510
2025-03-30 06:56:18 [DEBUG] clck_gen.py:128 IND CLOCK 612
2025-03-30 06:56:18 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:56:18 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:56:18 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:56:18 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:56:19 [DEBUG] clck_gen.py:128 IND CLOCK 714
2025-03-30 06:56:19 [DEBUG] clck_gen.py:128 IND CLOCK 816
2025-03-30 06:56:19 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:56:19 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:56:19 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:56:19 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:56:19 [DEBUG] clck_gen.py:128 IND CLOCK 918
2025-03-30 06:56:20 [DEBUG] clck_gen.py:128 IND CLOCK 1020
2025-03-30 06:56:20 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:56:20 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:56:20 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:56:20 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:56:20 [DEBUG] clck_gen.py:128 IND CLOCK 1122
2025-03-30 06:56:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:56:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:56:21 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:56:21 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:56:21 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:56:21 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:56:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:56:21 [DEBUG] clck_gen.py:128 IND CLOCK 1224
2025-03-30 06:56:21 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:56:21 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:56:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:56:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:56:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:56:21 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:56:21 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:56:21 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:56:21 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:56:21 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:56:21 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:56:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:56:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:56:21 [DEBUG] clck_gen.py:128 IND CLOCK 1326
2025-03-30 06:56:22 [DEBUG] clck_gen.py:128 IND CLOCK 1428
2025-03-30 06:56:22 [DEBUG] clck_gen.py:128 IND CLOCK 1530
2025-03-30 06:56:23 [DEBUG] clck_gen.py:128 IND CLOCK 1632
2025-03-30 06:56:23 [DEBUG] clck_gen.py:128 IND CLOCK 1734
2025-03-30 06:56:24 [DEBUG] clck_gen.py:128 IND CLOCK 1836
2025-03-30 06:56:24 [DEBUG] clck_gen.py:128 IND CLOCK 1938
2025-03-30 06:56:25 [DEBUG] clck_gen.py:128 IND CLOCK 2040
2025-03-30 06:56:25 [DEBUG] clck_gen.py:128 IND CLOCK 2142
2025-03-30 06:56:26 [DEBUG] clck_gen.py:128 IND CLOCK 2244
2025-03-30 06:56:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:56:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:56:26 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:56:26 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:56:26 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:56:26 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:56:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:56:26 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:56:26 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:56:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:56:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:56:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:56:26 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:56:26 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:56:26 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:56:26 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:56:26 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:56:26 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:56:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:56:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:56:26 [DEBUG] clck_gen.py:128 IND CLOCK 2346
2025-03-30 06:56:27 [DEBUG] clck_gen.py:128 IND CLOCK 2448
2025-03-30 06:56:27 [DEBUG] clck_gen.py:128 IND CLOCK 2550
2025-03-30 06:56:27 [DEBUG] clck_gen.py:128 IND CLOCK 2652
2025-03-30 06:56:28 [DEBUG] clck_gen.py:128 IND CLOCK 2754
2025-03-30 06:56:28 [DEBUG] clck_gen.py:128 IND CLOCK 2856
2025-03-30 06:56:29 [DEBUG] clck_gen.py:128 IND CLOCK 2958
2025-03-30 06:56:29 [DEBUG] clck_gen.py:128 IND CLOCK 3060
2025-03-30 06:56:30 [DEBUG] clck_gen.py:128 IND CLOCK 3162
2025-03-30 06:56:30 [DEBUG] clck_gen.py:128 IND CLOCK 3264
2025-03-30 06:56:31 [DEBUG] clck_gen.py:128 IND CLOCK 3366
2025-03-30 06:56:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:56:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:56:31 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:56:31 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:56:31 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:56:31 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:56:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:56:31 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:56:31 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:56:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:56:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:56:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:56:31 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:56:31 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:56:31 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:56:31 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:56:31 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:56:31 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:56:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:56:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:56:31 [DEBUG] clck_gen.py:128 IND CLOCK 3468
2025-03-30 06:56:32 [DEBUG] clck_gen.py:128 IND CLOCK 3570
2025-03-30 06:56:32 [DEBUG] clck_gen.py:128 IND CLOCK 3672
2025-03-30 06:56:33 [DEBUG] clck_gen.py:128 IND CLOCK 3774
2025-03-30 06:56:33 [DEBUG] clck_gen.py:128 IND CLOCK 3876
2025-03-30 06:56:34 [DEBUG] clck_gen.py:128 IND CLOCK 3978
2025-03-30 06:56:34 [DEBUG] clck_gen.py:128 IND CLOCK 4080
2025-03-30 06:56:35 [DEBUG] clck_gen.py:128 IND CLOCK 4182
2025-03-30 06:56:35 [DEBUG] clck_gen.py:128 IND CLOCK 4284
2025-03-30 06:56:35 [DEBUG] clck_gen.py:128 IND CLOCK 4386
2025-03-30 06:56:36 [DEBUG] clck_gen.py:128 IND CLOCK 4488
2025-03-30 06:56:36 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:56:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:56:36 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:56:36 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:56:36 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:56:36 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:56:36 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:56:36 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:56:36 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:56:36 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:56:36 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 06:56:36 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 06:56:36 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 06:56:36 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:56:36 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:56:36 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=4508 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:56:36 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=4508 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:56:36 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=4508 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:56:36 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=4508 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:56:36 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=4508 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:56:36 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=4508 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:56:36 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=4508 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:56:41 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 06:56:41 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 06:56:41 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:56:41 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:56:41 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:56:41 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:56:41 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:56:41 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 06:56:41 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:56:41 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 06:56:41 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 06:56:41 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 06:56:41 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 06:56:41 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 06:56:41 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:56:41 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:56:41 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 06:56:41 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 06:56:41 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 06:56:41 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 06:56:41 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 06:56:41 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 06:56:41 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:56:41 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:56:41 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 06:56:41 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 06:56:41 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 06:56:41 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 06:56:41 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 06:56:41 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 06:56:41 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:56:41 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:56:41 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 06:56:41 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 06:56:41 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 06:56:41 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 06:56:41 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 06:56:41 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 06:56:41 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 06:56:41 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 06:56:41 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 06:56:41 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 06:56:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 06:56:41 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:56:41 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 06:56:41 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 06:56:41 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:56:41 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:56:41 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 06:56:41 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 06:56:41 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 06:56:41 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 06:56:41 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:56:41 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:56:41 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:56:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 06:56:41 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:56:41 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:56:41 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:56:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:56:41 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:56:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:56:41 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:56:41 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:56:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:56:41 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:56:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:56:41 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:56:41 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:56:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:56:41 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:56:41 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:56:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:56:41 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:56:41 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:56:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:56:41 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:56:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:56:41 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:56:41 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:56:41 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:56:41 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:56:41 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-03-30 06:56:42 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-03-30 06:56:42 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-03-30 06:56:42 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-03-30 06:56:42 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-03-30 06:56:42 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-03-30 06:56:42 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-03-30 06:56:42 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-03-30 06:56:42 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-03-30 06:56:42 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-03-30 06:56:42 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=0 bl=148 pwr=0
2025-03-30 06:56:42 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=1 bl=148 pwr=0
2025-03-30 06:56:42 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=2 bl=148 pwr=0
2025-03-30 06:56:42 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=3 bl=148 pwr=0
2025-03-30 06:56:42 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=4 bl=148 pwr=0
2025-03-30 06:56:42 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=5 bl=148 pwr=0
2025-03-30 06:56:42 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=6 bl=148 pwr=0
2025-03-30 06:56:42 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=7 bl=148 pwr=0
2025-03-30 06:56:42 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 06:56:42 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 06:56:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:56:42 [DEBUG] fake_trx.py:317 (BTS@172.18.26.20:5700) Recv FAKE_CI cmd
2025-03-30 06:56:42 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:56:42 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:56:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:56:42 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:56:42 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:56:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:56:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:56:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:56:42 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:56:42 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:56:42 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:56:42 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:56:42 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:56:42 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:56:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:56:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:56:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:56:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:56:42 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:56:42 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:56:42 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:56:42 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:56:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:56:42 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:56:42 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:56:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:56:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:56:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:56:42 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:56:42 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:56:42 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:56:42 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:56:42 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-03-30 06:56:42 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:56:42 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:56:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:56:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:56:42 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:56:42 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:56:42 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:56:42 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:56:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:56:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:56:42 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:56:42 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:56:42 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:56:42 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:56:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:56:42 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:56:42 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:56:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:56:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:56:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:56:42 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:56:42 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:56:42 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:56:42 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:56:42 [DEBUG] clck_gen.py:128 IND CLOCK 306
2025-03-30 06:56:42 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:56:42 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:56:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:56:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:56:43 [DEBUG] clck_gen.py:128 IND CLOCK 408
2025-03-30 06:56:43 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:56:43 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:56:43 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:56:43 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:56:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:56:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:56:43 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:56:43 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:56:43 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:56:43 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:56:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:56:43 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:56:43 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:56:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:56:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:56:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:56:43 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:56:43 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:56:43 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:56:43 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:56:43 [DEBUG] clck_gen.py:128 IND CLOCK 510
2025-03-30 06:56:43 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:56:43 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:56:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:56:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:56:44 [DEBUG] clck_gen.py:128 IND CLOCK 612
2025-03-30 06:56:44 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:56:44 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:56:44 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:56:44 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:56:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:56:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:56:44 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:56:44 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:56:44 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:56:44 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:56:44 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:56:44 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:56:44 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:56:44 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:56:44 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:56:44 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 06:56:44 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 06:56:44 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 06:56:44 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:56:49 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 06:56:49 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 06:56:49 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:56:49 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:56:49 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:56:49 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:56:49 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:56:49 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 06:56:49 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:56:49 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 06:56:49 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 06:56:49 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 06:56:49 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 06:56:49 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 06:56:49 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:56:49 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:56:49 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 06:56:49 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 06:56:49 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 06:56:49 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 06:56:49 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 06:56:49 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 06:56:49 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:56:49 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:56:49 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 06:56:49 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 06:56:49 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 06:56:49 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 06:56:49 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 06:56:49 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 06:56:49 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:56:49 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:56:49 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 06:56:49 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 06:56:49 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 06:56:49 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 06:56:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 06:56:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 06:56:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 06:56:49 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 06:56:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 06:56:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 06:56:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 06:56:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:56:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 06:56:49 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 06:56:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:56:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:56:49 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 06:56:49 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 06:56:49 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 06:56:49 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 06:56:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:56:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:56:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:56:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 06:56:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:56:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:56:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:56:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:56:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:56:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:56:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:56:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:56:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:56:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:56:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:56:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:56:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:56:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:56:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:56:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:56:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:56:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:56:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:56:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:56:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:56:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:56:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:56:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:56:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:56:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:56:49 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-03-30 06:56:50 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-03-30 06:56:50 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-03-30 06:56:50 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-03-30 06:56:50 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-03-30 06:56:50 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-03-30 06:56:50 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-03-30 06:56:50 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-03-30 06:56:50 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-03-30 06:56:50 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-03-30 06:56:50 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=0 bl=148 pwr=0
2025-03-30 06:56:50 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=1 bl=148 pwr=0
2025-03-30 06:56:50 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=2 bl=148 pwr=0
2025-03-30 06:56:50 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=3 bl=148 pwr=0
2025-03-30 06:56:50 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=4 bl=148 pwr=0
2025-03-30 06:56:50 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=5 bl=148 pwr=0
2025-03-30 06:56:50 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=6 bl=148 pwr=0
2025-03-30 06:56:50 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=7 bl=148 pwr=0
2025-03-30 06:56:50 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 06:56:50 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 06:56:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:56:50 [DEBUG] fake_trx.py:317 (BTS@172.18.26.20:5700) Recv FAKE_CI cmd
2025-03-30 06:56:50 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:56:50 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:56:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:56:50 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:56:50 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:56:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:56:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:56:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:56:50 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:56:50 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:56:50 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:56:50 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:56:50 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:56:50 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:56:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:56:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:56:50 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-03-30 06:56:50 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:56:50 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:56:50 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:56:50 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:56:51 [DEBUG] clck_gen.py:128 IND CLOCK 306
2025-03-30 06:56:51 [DEBUG] clck_gen.py:128 IND CLOCK 408
2025-03-30 06:56:51 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:56:51 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:56:51 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:56:51 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:56:52 [DEBUG] clck_gen.py:128 IND CLOCK 510
2025-03-30 06:56:52 [DEBUG] clck_gen.py:128 IND CLOCK 612
2025-03-30 06:56:52 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:56:52 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:56:52 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:56:52 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:56:53 [DEBUG] clck_gen.py:128 IND CLOCK 714
2025-03-30 06:56:53 [WARNING] clck_gen.py:108 CLCKGen: time overrun by -12685us; resetting the clock
2025-03-30 06:56:53 [DEBUG] clck_gen.py:128 IND CLOCK 816
2025-03-30 06:56:53 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:56:53 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:56:53 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:56:53 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:56:54 [DEBUG] clck_gen.py:128 IND CLOCK 918
2025-03-30 06:56:54 [DEBUG] clck_gen.py:128 IND CLOCK 1020
2025-03-30 06:56:54 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:56:54 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:56:54 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:56:54 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:56:54 [DEBUG] clck_gen.py:128 IND CLOCK 1122
2025-03-30 06:56:55 [DEBUG] clck_gen.py:128 IND CLOCK 1224
2025-03-30 06:56:55 [DEBUG] clck_gen.py:128 IND CLOCK 1326
2025-03-30 06:56:56 [DEBUG] clck_gen.py:128 IND CLOCK 1428
2025-03-30 06:56:56 [DEBUG] clck_gen.py:128 IND CLOCK 1530
2025-03-30 06:56:57 [DEBUG] clck_gen.py:128 IND CLOCK 1632
2025-03-30 06:56:57 [DEBUG] clck_gen.py:128 IND CLOCK 1734
2025-03-30 06:56:58 [DEBUG] clck_gen.py:128 IND CLOCK 1836
2025-03-30 06:56:58 [DEBUG] clck_gen.py:128 IND CLOCK 1938
2025-03-30 06:56:59 [DEBUG] clck_gen.py:128 IND CLOCK 2040
2025-03-30 06:56:59 [DEBUG] clck_gen.py:128 IND CLOCK 2142
2025-03-30 06:57:00 [DEBUG] clck_gen.py:128 IND CLOCK 2244
2025-03-30 06:57:00 [DEBUG] clck_gen.py:128 IND CLOCK 2346
2025-03-30 06:57:01 [DEBUG] clck_gen.py:128 IND CLOCK 2448
2025-03-30 06:57:01 [DEBUG] clck_gen.py:128 IND CLOCK 2550
2025-03-30 06:57:02 [DEBUG] clck_gen.py:128 IND CLOCK 2652
2025-03-30 06:57:02 [DEBUG] clck_gen.py:128 IND CLOCK 2754
2025-03-30 06:57:02 [DEBUG] clck_gen.py:128 IND CLOCK 2856
2025-03-30 06:57:03 [DEBUG] clck_gen.py:128 IND CLOCK 2958
2025-03-30 06:57:03 [DEBUG] clck_gen.py:128 IND CLOCK 3060
2025-03-30 06:57:04 [DEBUG] clck_gen.py:128 IND CLOCK 3162
2025-03-30 06:57:04 [DEBUG] clck_gen.py:128 IND CLOCK 3264
2025-03-30 06:57:05 [DEBUG] clck_gen.py:128 IND CLOCK 3366
2025-03-30 06:57:05 [DEBUG] clck_gen.py:128 IND CLOCK 3468
2025-03-30 06:57:06 [DEBUG] clck_gen.py:128 IND CLOCK 3570
2025-03-30 06:57:06 [DEBUG] clck_gen.py:128 IND CLOCK 3672
2025-03-30 06:57:07 [DEBUG] clck_gen.py:128 IND CLOCK 3774
2025-03-30 06:57:07 [DEBUG] clck_gen.py:128 IND CLOCK 3876
2025-03-30 06:57:08 [DEBUG] clck_gen.py:128 IND CLOCK 3978
2025-03-30 06:57:08 [DEBUG] clck_gen.py:128 IND CLOCK 4080
2025-03-30 06:57:09 [DEBUG] clck_gen.py:128 IND CLOCK 4182
2025-03-30 06:57:09 [DEBUG] clck_gen.py:128 IND CLOCK 4284
2025-03-30 06:57:10 [DEBUG] clck_gen.py:128 IND CLOCK 4386
2025-03-30 06:57:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:57:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:57:10 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:57:10 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:57:10 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:57:10 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:57:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:57:10 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:57:10 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:57:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:57:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:57:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:57:10 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:57:10 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:57:10 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:57:10 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:57:10 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:57:10 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:57:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:57:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:57:10 [DEBUG] clck_gen.py:128 IND CLOCK 4488
2025-03-30 06:57:10 [DEBUG] clck_gen.py:128 IND CLOCK 4590
2025-03-30 06:57:11 [DEBUG] clck_gen.py:128 IND CLOCK 4692
2025-03-30 06:57:11 [DEBUG] clck_gen.py:128 IND CLOCK 4794
2025-03-30 06:57:12 [DEBUG] clck_gen.py:128 IND CLOCK 4896
2025-03-30 06:57:12 [DEBUG] clck_gen.py:128 IND CLOCK 4998
2025-03-30 06:57:13 [DEBUG] clck_gen.py:128 IND CLOCK 5100
2025-03-30 06:57:13 [DEBUG] clck_gen.py:128 IND CLOCK 5202
2025-03-30 06:57:14 [DEBUG] clck_gen.py:128 IND CLOCK 5304
2025-03-30 06:57:14 [DEBUG] clck_gen.py:128 IND CLOCK 5406
2025-03-30 06:57:15 [DEBUG] clck_gen.py:128 IND CLOCK 5508
2025-03-30 06:57:15 [DEBUG] clck_gen.py:128 IND CLOCK 5610
2025-03-30 06:57:16 [DEBUG] clck_gen.py:128 IND CLOCK 5712
2025-03-30 06:57:16 [DEBUG] clck_gen.py:128 IND CLOCK 5814
2025-03-30 06:57:17 [DEBUG] clck_gen.py:128 IND CLOCK 5916
2025-03-30 06:57:17 [DEBUG] clck_gen.py:128 IND CLOCK 6018
2025-03-30 06:57:18 [DEBUG] clck_gen.py:128 IND CLOCK 6120
2025-03-30 06:57:18 [DEBUG] clck_gen.py:128 IND CLOCK 6222
2025-03-30 06:57:18 [DEBUG] clck_gen.py:128 IND CLOCK 6324
2025-03-30 06:57:19 [DEBUG] clck_gen.py:128 IND CLOCK 6426
2025-03-30 06:57:19 [DEBUG] clck_gen.py:128 IND CLOCK 6528
2025-03-30 06:57:20 [DEBUG] clck_gen.py:128 IND CLOCK 6630
2025-03-30 06:57:20 [DEBUG] clck_gen.py:128 IND CLOCK 6732
2025-03-30 06:57:21 [DEBUG] clck_gen.py:128 IND CLOCK 6834
2025-03-30 06:57:21 [DEBUG] clck_gen.py:128 IND CLOCK 6936
2025-03-30 06:57:22 [DEBUG] clck_gen.py:128 IND CLOCK 7038
2025-03-30 06:57:22 [DEBUG] clck_gen.py:128 IND CLOCK 7140
2025-03-30 06:57:23 [DEBUG] clck_gen.py:128 IND CLOCK 7242
2025-03-30 06:57:23 [DEBUG] clck_gen.py:128 IND CLOCK 7344
2025-03-30 06:57:24 [DEBUG] clck_gen.py:128 IND CLOCK 7446
2025-03-30 06:57:24 [DEBUG] clck_gen.py:128 IND CLOCK 7548
2025-03-30 06:57:25 [DEBUG] clck_gen.py:128 IND CLOCK 7650
2025-03-30 06:57:25 [DEBUG] clck_gen.py:128 IND CLOCK 7752
2025-03-30 06:57:26 [DEBUG] clck_gen.py:128 IND CLOCK 7854
2025-03-30 06:57:26 [DEBUG] clck_gen.py:128 IND CLOCK 7956
2025-03-30 06:57:26 [DEBUG] clck_gen.py:128 IND CLOCK 8058
2025-03-30 06:57:27 [DEBUG] clck_gen.py:128 IND CLOCK 8160
2025-03-30 06:57:27 [DEBUG] clck_gen.py:128 IND CLOCK 8262
2025-03-30 06:57:28 [DEBUG] clck_gen.py:128 IND CLOCK 8364
2025-03-30 06:57:28 [DEBUG] clck_gen.py:128 IND CLOCK 8466
2025-03-30 06:57:29 [DEBUG] clck_gen.py:128 IND CLOCK 8568
2025-03-30 06:57:29 [DEBUG] clck_gen.py:128 IND CLOCK 8670
2025-03-30 06:57:30 [DEBUG] clck_gen.py:128 IND CLOCK 8772
2025-03-30 06:57:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:57:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:57:30 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:57:30 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:57:30 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:57:30 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:57:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:57:30 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:57:30 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:57:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:57:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:57:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:57:30 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:57:30 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:57:30 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:57:30 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:57:30 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:57:30 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:57:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:57:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:57:30 [DEBUG] clck_gen.py:128 IND CLOCK 8874
2025-03-30 06:57:31 [DEBUG] clck_gen.py:128 IND CLOCK 8976
2025-03-30 06:57:31 [DEBUG] clck_gen.py:128 IND CLOCK 9078
2025-03-30 06:57:32 [DEBUG] clck_gen.py:128 IND CLOCK 9180
2025-03-30 06:57:32 [DEBUG] clck_gen.py:128 IND CLOCK 9282
2025-03-30 06:57:33 [DEBUG] clck_gen.py:128 IND CLOCK 9384
2025-03-30 06:57:33 [DEBUG] clck_gen.py:128 IND CLOCK 9486
2025-03-30 06:57:34 [DEBUG] clck_gen.py:128 IND CLOCK 9588
2025-03-30 06:57:34 [DEBUG] clck_gen.py:128 IND CLOCK 9690
2025-03-30 06:57:34 [DEBUG] clck_gen.py:128 IND CLOCK 9792
2025-03-30 06:57:35 [DEBUG] clck_gen.py:128 IND CLOCK 9894
2025-03-30 06:57:35 [DEBUG] clck_gen.py:128 IND CLOCK 9996
2025-03-30 06:57:36 [DEBUG] clck_gen.py:128 IND CLOCK 10098
2025-03-30 06:57:36 [DEBUG] clck_gen.py:128 IND CLOCK 10200
2025-03-30 06:57:37 [DEBUG] clck_gen.py:128 IND CLOCK 10302
2025-03-30 06:57:37 [DEBUG] clck_gen.py:128 IND CLOCK 10404
2025-03-30 06:57:38 [DEBUG] clck_gen.py:128 IND CLOCK 10506
2025-03-30 06:57:38 [DEBUG] clck_gen.py:128 IND CLOCK 10608
2025-03-30 06:57:39 [DEBUG] clck_gen.py:128 IND CLOCK 10710
2025-03-30 06:57:39 [DEBUG] clck_gen.py:128 IND CLOCK 10812
2025-03-30 06:57:40 [DEBUG] clck_gen.py:128 IND CLOCK 10914
2025-03-30 06:57:40 [DEBUG] clck_gen.py:128 IND CLOCK 11016
2025-03-30 06:57:41 [DEBUG] clck_gen.py:128 IND CLOCK 11118
2025-03-30 06:57:41 [DEBUG] clck_gen.py:128 IND CLOCK 11220
2025-03-30 06:57:42 [DEBUG] clck_gen.py:128 IND CLOCK 11322
2025-03-30 06:57:42 [DEBUG] clck_gen.py:128 IND CLOCK 11424
2025-03-30 06:57:42 [DEBUG] clck_gen.py:128 IND CLOCK 11526
2025-03-30 06:57:43 [DEBUG] clck_gen.py:128 IND CLOCK 11628
2025-03-30 06:57:43 [DEBUG] clck_gen.py:128 IND CLOCK 11730
2025-03-30 06:57:44 [DEBUG] clck_gen.py:128 IND CLOCK 11832
2025-03-30 06:57:44 [DEBUG] clck_gen.py:128 IND CLOCK 11934
2025-03-30 06:57:45 [DEBUG] clck_gen.py:128 IND CLOCK 12036
2025-03-30 06:57:45 [DEBUG] clck_gen.py:128 IND CLOCK 12138
2025-03-30 06:57:46 [DEBUG] clck_gen.py:128 IND CLOCK 12240
2025-03-30 06:57:46 [DEBUG] clck_gen.py:128 IND CLOCK 12342
2025-03-30 06:57:47 [DEBUG] clck_gen.py:128 IND CLOCK 12444
2025-03-30 06:57:47 [DEBUG] clck_gen.py:128 IND CLOCK 12546
2025-03-30 06:57:48 [DEBUG] clck_gen.py:128 IND CLOCK 12648
2025-03-30 06:57:48 [DEBUG] clck_gen.py:128 IND CLOCK 12750
2025-03-30 06:57:49 [DEBUG] clck_gen.py:128 IND CLOCK 12852
2025-03-30 06:57:49 [DEBUG] clck_gen.py:128 IND CLOCK 12954
2025-03-30 06:57:50 [DEBUG] clck_gen.py:128 IND CLOCK 13056
2025-03-30 06:57:50 [DEBUG] clck_gen.py:128 IND CLOCK 13158
2025-03-30 06:57:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:57:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:57:50 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:57:50 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:57:50 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:57:50 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:57:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:57:50 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:57:50 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:57:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:57:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:57:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:57:50 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:57:50 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:57:50 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:57:50 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:57:50 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:57:50 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:57:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:57:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:57:50 [DEBUG] clck_gen.py:128 IND CLOCK 13260
2025-03-30 06:57:51 [DEBUG] clck_gen.py:128 IND CLOCK 13362
2025-03-30 06:57:51 [DEBUG] clck_gen.py:128 IND CLOCK 13464
2025-03-30 06:57:52 [DEBUG] clck_gen.py:128 IND CLOCK 13566
2025-03-30 06:57:52 [DEBUG] clck_gen.py:128 IND CLOCK 13668
2025-03-30 06:57:53 [DEBUG] clck_gen.py:128 IND CLOCK 13770
2025-03-30 06:57:53 [DEBUG] clck_gen.py:128 IND CLOCK 13872
2025-03-30 06:57:54 [DEBUG] clck_gen.py:128 IND CLOCK 13974
2025-03-30 06:57:54 [DEBUG] clck_gen.py:128 IND CLOCK 14076
2025-03-30 06:57:55 [DEBUG] clck_gen.py:128 IND CLOCK 14178
2025-03-30 06:57:55 [DEBUG] clck_gen.py:128 IND CLOCK 14280
2025-03-30 06:57:56 [DEBUG] clck_gen.py:128 IND CLOCK 14382
2025-03-30 06:57:56 [DEBUG] clck_gen.py:128 IND CLOCK 14484
2025-03-30 06:57:57 [DEBUG] clck_gen.py:128 IND CLOCK 14586
2025-03-30 06:57:57 [DEBUG] clck_gen.py:128 IND CLOCK 14688
2025-03-30 06:57:58 [DEBUG] clck_gen.py:128 IND CLOCK 14790
2025-03-30 06:57:58 [DEBUG] clck_gen.py:128 IND CLOCK 14892
2025-03-30 06:57:58 [DEBUG] clck_gen.py:128 IND CLOCK 14994
2025-03-30 06:57:59 [DEBUG] clck_gen.py:128 IND CLOCK 15096
2025-03-30 06:57:59 [DEBUG] clck_gen.py:128 IND CLOCK 15198
2025-03-30 06:58:00 [DEBUG] clck_gen.py:128 IND CLOCK 15300
2025-03-30 06:58:00 [DEBUG] clck_gen.py:128 IND CLOCK 15402
2025-03-30 06:58:01 [DEBUG] clck_gen.py:128 IND CLOCK 15504
2025-03-30 06:58:01 [DEBUG] clck_gen.py:128 IND CLOCK 15606
2025-03-30 06:58:02 [DEBUG] clck_gen.py:128 IND CLOCK 15708
2025-03-30 06:58:02 [DEBUG] clck_gen.py:128 IND CLOCK 15810
2025-03-30 06:58:03 [DEBUG] clck_gen.py:128 IND CLOCK 15912
2025-03-30 06:58:03 [DEBUG] clck_gen.py:128 IND CLOCK 16014
2025-03-30 06:58:04 [DEBUG] clck_gen.py:128 IND CLOCK 16116
2025-03-30 06:58:04 [DEBUG] clck_gen.py:128 IND CLOCK 16218
2025-03-30 06:58:05 [DEBUG] clck_gen.py:128 IND CLOCK 16320
2025-03-30 06:58:05 [DEBUG] clck_gen.py:128 IND CLOCK 16422
2025-03-30 06:58:06 [DEBUG] clck_gen.py:128 IND CLOCK 16524
2025-03-30 06:58:06 [DEBUG] clck_gen.py:128 IND CLOCK 16626
2025-03-30 06:58:06 [DEBUG] clck_gen.py:128 IND CLOCK 16728
2025-03-30 06:58:07 [DEBUG] clck_gen.py:128 IND CLOCK 16830
2025-03-30 06:58:07 [DEBUG] clck_gen.py:128 IND CLOCK 16932
2025-03-30 06:58:08 [DEBUG] clck_gen.py:128 IND CLOCK 17034
2025-03-30 06:58:08 [DEBUG] clck_gen.py:128 IND CLOCK 17136
2025-03-30 06:58:09 [DEBUG] clck_gen.py:128 IND CLOCK 17238
2025-03-30 06:58:09 [DEBUG] clck_gen.py:128 IND CLOCK 17340
2025-03-30 06:58:10 [DEBUG] clck_gen.py:128 IND CLOCK 17442
2025-03-30 06:58:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:58:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:58:10 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:58:10 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:58:10 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:58:10 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:58:10 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:58:10 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:58:10 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:58:10 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:58:10 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:58:10 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:58:10 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 06:58:10 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 06:58:10 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 06:58:15 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 06:58:15 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 06:58:15 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:58:15 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:58:15 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:58:15 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:58:15 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:58:15 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 06:58:15 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:58:15 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 06:58:15 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 06:58:15 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 06:58:15 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 06:58:15 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 06:58:15 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:58:15 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 06:58:15 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:58:15 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 06:58:15 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 06:58:15 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 06:58:15 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 06:58:15 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 06:58:15 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:58:15 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 06:58:15 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:58:15 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 06:58:15 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 06:58:15 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 06:58:15 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 06:58:15 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 06:58:15 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:58:15 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 06:58:15 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:58:15 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 06:58:15 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 06:58:15 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 06:58:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 06:58:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 06:58:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 06:58:15 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 06:58:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 06:58:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 06:58:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 06:58:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:58:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 06:58:15 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 06:58:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:58:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:58:15 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 06:58:15 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 06:58:15 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 06:58:15 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 06:58:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:58:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:58:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:58:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 06:58:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:58:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:58:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:58:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:58:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:58:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:58:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:58:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:58:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:58:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:58:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:58:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:58:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:58:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:58:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:58:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:58:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:58:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:58:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:58:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:58:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:58:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:58:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:58:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:58:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:58:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:58:15 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:58:15 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:58:15 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:58:15 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:58:15 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 06:58:15 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 06:58:15 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 06:58:20 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 06:58:20 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 06:58:20 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:58:20 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:58:20 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:58:20 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:58:20 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:58:20 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 06:58:20 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:58:20 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 06:58:20 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 06:58:20 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 06:58:20 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 06:58:20 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 06:58:20 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:58:20 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:58:20 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 06:58:20 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 06:58:20 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 06:58:20 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 06:58:20 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 06:58:20 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 06:58:20 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:58:20 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 06:58:20 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:58:20 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 06:58:20 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 06:58:20 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 06:58:20 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 06:58:20 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 06:58:20 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:58:20 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:58:20 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 06:58:20 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 06:58:20 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 06:58:20 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 06:58:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 06:58:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 06:58:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 06:58:20 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 06:58:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 06:58:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 06:58:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 06:58:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:58:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 06:58:20 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 06:58:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:58:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:58:20 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 06:58:20 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 06:58:20 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 06:58:20 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 06:58:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:58:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:58:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:58:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 06:58:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:58:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:58:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:58:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:58:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:58:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:58:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:58:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:58:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:58:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:58:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:58:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:58:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:58:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:58:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:58:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:58:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:58:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:58:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:58:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:58:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:58:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:58:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:58:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:58:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:58:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:58:20 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-03-30 06:58:21 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-03-30 06:58:21 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-03-30 06:58:21 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-03-30 06:58:21 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-03-30 06:58:21 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-03-30 06:58:21 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-03-30 06:58:21 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-03-30 06:58:21 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-03-30 06:58:21 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-03-30 06:58:21 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=105 tn=0 bl=148 pwr=0
2025-03-30 06:58:21 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=105 tn=1 bl=148 pwr=0
2025-03-30 06:58:21 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=105 tn=2 bl=148 pwr=0
2025-03-30 06:58:21 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=105 tn=3 bl=148 pwr=0
2025-03-30 06:58:21 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=105 tn=4 bl=148 pwr=0
2025-03-30 06:58:21 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=105 tn=5 bl=148 pwr=0
2025-03-30 06:58:21 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=105 tn=6 bl=148 pwr=0
2025-03-30 06:58:21 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=105 tn=7 bl=148 pwr=0
2025-03-30 06:58:21 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=106 tn=0 bl=148 pwr=0
2025-03-30 06:58:21 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=106 tn=1 bl=148 pwr=0
2025-03-30 06:58:21 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=106 tn=2 bl=148 pwr=0
2025-03-30 06:58:21 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=106 tn=3 bl=148 pwr=0
2025-03-30 06:58:21 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=106 tn=4 bl=148 pwr=0
2025-03-30 06:58:21 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=106 tn=5 bl=148 pwr=0
2025-03-30 06:58:21 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=106 tn=6 bl=148 pwr=0
2025-03-30 06:58:21 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=106 tn=7 bl=148 pwr=0
2025-03-30 06:58:21 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=107 tn=0 bl=148 pwr=0
2025-03-30 06:58:21 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=107 tn=1 bl=148 pwr=0
2025-03-30 06:58:21 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=107 tn=2 bl=148 pwr=0
2025-03-30 06:58:21 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=107 tn=3 bl=148 pwr=0
2025-03-30 06:58:21 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=107 tn=4 bl=148 pwr=0
2025-03-30 06:58:21 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=107 tn=5 bl=148 pwr=0
2025-03-30 06:58:21 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=107 tn=6 bl=148 pwr=0
2025-03-30 06:58:21 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=107 tn=7 bl=148 pwr=0
2025-03-30 06:58:21 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 06:58:21 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 06:58:21 [DEBUG] fake_trx.py:317 (BTS@172.18.26.20:5700) Recv FAKE_CI cmd
2025-03-30 06:58:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:58:21 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:58:21 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:58:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:58:21 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:58:21 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:58:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:58:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:58:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:58:21 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:58:21 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:58:21 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:58:21 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:58:21 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:58:21 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:58:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:58:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:58:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:58:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:58:21 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:58:21 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:58:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:58:21 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:58:21 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:58:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:58:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:58:21 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:58:21 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:58:21 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:58:21 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:58:21 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:58:21 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:58:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:58:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:58:21 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-03-30 06:58:21 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:58:21 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:58:21 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:58:21 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:58:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:58:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:58:21 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:58:21 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:58:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:58:21 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:58:21 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:58:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:58:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:58:21 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:58:21 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:58:21 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:58:21 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:58:21 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:58:21 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:58:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:58:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:58:22 [DEBUG] clck_gen.py:128 IND CLOCK 306
2025-03-30 06:58:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:58:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:58:22 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:58:22 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:58:22 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:58:22 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:58:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:58:22 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:58:22 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:58:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:58:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:58:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:58:22 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:58:22 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:58:22 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:58:22 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:58:22 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:58:22 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:58:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:58:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:58:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:58:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:58:22 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:58:22 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:58:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:58:22 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:58:22 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:58:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:58:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:58:22 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:58:22 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:58:22 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:58:22 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:58:22 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:58:22 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:58:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:58:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:58:22 [DEBUG] clck_gen.py:128 IND CLOCK 408
2025-03-30 06:58:22 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:58:22 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:58:22 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:58:22 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:58:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:58:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:58:22 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:58:22 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:58:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:58:22 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:58:22 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:58:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:58:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:58:22 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:58:22 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:58:22 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:58:22 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:58:22 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:58:22 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:58:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:58:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:58:23 [DEBUG] clck_gen.py:128 IND CLOCK 510
2025-03-30 06:58:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:58:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:58:23 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:58:23 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:58:23 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:58:23 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:58:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:58:23 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:58:23 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:58:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:58:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:58:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:58:23 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:58:23 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:58:23 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:58:23 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:58:23 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:58:23 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:58:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:58:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:58:23 [DEBUG] clck_gen.py:128 IND CLOCK 612
2025-03-30 06:58:23 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:58:23 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:58:23 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:58:23 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:58:23 [DEBUG] clck_gen.py:128 IND CLOCK 714
2025-03-30 06:58:24 [DEBUG] clck_gen.py:128 IND CLOCK 816
2025-03-30 06:58:24 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:58:24 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:58:24 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:58:24 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:58:24 [DEBUG] clck_gen.py:128 IND CLOCK 918
2025-03-30 06:58:25 [DEBUG] clck_gen.py:128 IND CLOCK 1020
2025-03-30 06:58:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:58:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:58:25 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:58:25 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:58:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:58:25 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:58:25 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:58:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:58:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:58:25 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:58:25 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:58:25 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:58:25 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:58:25 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:58:25 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:58:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:58:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:58:25 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:58:25 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:58:25 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:58:25 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:58:25 [DEBUG] clck_gen.py:128 IND CLOCK 1122
2025-03-30 06:58:26 [DEBUG] clck_gen.py:128 IND CLOCK 1224
2025-03-30 06:58:26 [DEBUG] clck_gen.py:128 IND CLOCK 1326
2025-03-30 06:58:27 [DEBUG] clck_gen.py:128 IND CLOCK 1428
2025-03-30 06:58:27 [DEBUG] clck_gen.py:128 IND CLOCK 1530
2025-03-30 06:58:28 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:58:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:58:28 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:58:28 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:58:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:58:28 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:58:28 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:58:28 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:58:28 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:58:28 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:58:28 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:58:28 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:58:28 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:58:28 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:58:28 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:58:28 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:58:28 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:58:28 [DEBUG] clck_gen.py:128 IND CLOCK 1632
2025-03-30 06:58:28 [DEBUG] clck_gen.py:128 IND CLOCK 1734
2025-03-30 06:58:29 [DEBUG] clck_gen.py:128 IND CLOCK 1836
2025-03-30 06:58:29 [DEBUG] clck_gen.py:128 IND CLOCK 1938
2025-03-30 06:58:30 [DEBUG] clck_gen.py:128 IND CLOCK 2040
2025-03-30 06:58:30 [DEBUG] clck_gen.py:128 IND CLOCK 2142
2025-03-30 06:58:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:58:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:58:30 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:58:30 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:58:30 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:58:30 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:58:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:58:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:58:30 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:58:30 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:58:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:58:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:58:30 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:58:30 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:58:30 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:58:30 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:58:30 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:58:30 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:58:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:58:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:58:31 [DEBUG] clck_gen.py:128 IND CLOCK 2244
2025-03-30 06:58:31 [DEBUG] clck_gen.py:128 IND CLOCK 2346
2025-03-30 06:58:31 [DEBUG] clck_gen.py:128 IND CLOCK 2448
2025-03-30 06:58:32 [DEBUG] clck_gen.py:128 IND CLOCK 2550
2025-03-30 06:58:32 [DEBUG] clck_gen.py:128 IND CLOCK 2652
2025-03-30 06:58:33 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:58:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:58:33 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:58:33 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:58:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:58:33 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:58:33 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:58:33 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:58:33 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:58:33 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:58:33 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:58:33 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:58:33 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:58:33 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:58:33 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:58:33 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:58:33 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:58:33 [DEBUG] clck_gen.py:128 IND CLOCK 2754
2025-03-30 06:58:33 [DEBUG] clck_gen.py:128 IND CLOCK 2856
2025-03-30 06:58:34 [DEBUG] clck_gen.py:128 IND CLOCK 2958
2025-03-30 06:58:34 [DEBUG] clck_gen.py:128 IND CLOCK 3060
2025-03-30 06:58:35 [DEBUG] clck_gen.py:128 IND CLOCK 3162
2025-03-30 06:58:35 [DEBUG] clck_gen.py:128 IND CLOCK 3264
2025-03-30 06:58:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:58:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:58:35 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:58:35 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:58:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:58:35 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:58:35 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:58:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:58:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:58:35 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:58:35 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:58:35 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:58:35 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:58:35 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:58:35 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:58:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:58:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:58:36 [DEBUG] clck_gen.py:128 IND CLOCK 3366
2025-03-30 06:58:36 [DEBUG] clck_gen.py:128 IND CLOCK 3468
2025-03-30 06:58:37 [DEBUG] clck_gen.py:128 IND CLOCK 3570
2025-03-30 06:58:37 [DEBUG] clck_gen.py:128 IND CLOCK 3672
2025-03-30 06:58:38 [DEBUG] clck_gen.py:128 IND CLOCK 3774
2025-03-30 06:58:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:58:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:58:38 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:58:38 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:58:38 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:58:38 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:58:38 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:58:38 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:58:38 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:58:38 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:58:38 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:58:38 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:58:38 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 06:58:38 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 06:58:38 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 06:58:38 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=3848 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:58:38 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=3848 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:58:38 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=3848 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:58:38 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=3848 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:58:38 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=3848 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:58:38 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=3848 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:58:38 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=3849 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:58:38 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=3849 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:58:38 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=3849 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:58:38 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=3849 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:58:38 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=3849 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:58:38 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=3849 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:58:38 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=3849 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:58:38 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=3849 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:58:38 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=3850 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:58:38 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=3850 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:58:38 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=3850 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:58:38 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=3850 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:58:38 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=3850 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:58:38 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=3850 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:58:38 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=3850 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:58:38 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=3850 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:58:43 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 06:58:43 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 06:58:43 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:58:43 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:58:43 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:58:43 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:58:43 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:58:43 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 06:58:43 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:58:43 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 06:58:43 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 06:58:43 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 06:58:43 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 06:58:43 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 06:58:43 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:58:43 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:58:43 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 06:58:43 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 06:58:43 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 06:58:43 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 06:58:43 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 06:58:43 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 06:58:43 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:58:43 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:58:43 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 06:58:43 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 06:58:43 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 06:58:43 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 06:58:43 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 06:58:43 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 06:58:43 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:58:43 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:58:43 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 06:58:43 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 06:58:43 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 06:58:43 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 06:58:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 06:58:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 06:58:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 06:58:43 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 06:58:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 06:58:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 06:58:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 06:58:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 06:58:43 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 06:58:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:58:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:58:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:58:43 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 06:58:43 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 06:58:43 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 06:58:43 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 06:58:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:58:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:58:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:58:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 06:58:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:58:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:58:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:58:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:58:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:58:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:58:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:58:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:58:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:58:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:58:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:58:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:58:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:58:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:58:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:58:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:58:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:58:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:58:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:58:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:58:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:58:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:58:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:58:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:58:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:58:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:58:43 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-03-30 06:58:43 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-03-30 06:58:43 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=107): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-03-30 06:58:43 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=107): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-03-30 06:58:43 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=107): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-03-30 06:58:43 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=107): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-03-30 06:58:43 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=107): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-03-30 06:58:43 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=107): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-03-30 06:58:43 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=107): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-03-30 06:58:43 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=107): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-03-30 06:58:43 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=107): ver=1 fn=105 tn=0 bl=148 pwr=0
2025-03-30 06:58:43 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=107): ver=1 fn=105 tn=1 bl=148 pwr=0
2025-03-30 06:58:43 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=107): ver=1 fn=105 tn=2 bl=148 pwr=0
2025-03-30 06:58:43 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=107): ver=1 fn=105 tn=3 bl=148 pwr=0
2025-03-30 06:58:43 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=107): ver=1 fn=105 tn=4 bl=148 pwr=0
2025-03-30 06:58:43 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=107): ver=1 fn=105 tn=5 bl=148 pwr=0
2025-03-30 06:58:43 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=107): ver=1 fn=105 tn=6 bl=148 pwr=0
2025-03-30 06:58:43 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=107): ver=1 fn=105 tn=7 bl=148 pwr=0
2025-03-30 06:58:43 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=107): ver=1 fn=106 tn=0 bl=148 pwr=0
2025-03-30 06:58:43 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=107): ver=1 fn=106 tn=1 bl=148 pwr=0
2025-03-30 06:58:43 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=107): ver=1 fn=106 tn=2 bl=148 pwr=0
2025-03-30 06:58:43 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=107): ver=1 fn=106 tn=3 bl=148 pwr=0
2025-03-30 06:58:43 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=107): ver=1 fn=106 tn=4 bl=148 pwr=0
2025-03-30 06:58:43 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=107): ver=1 fn=106 tn=5 bl=148 pwr=0
2025-03-30 06:58:43 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=107): ver=1 fn=106 tn=6 bl=148 pwr=0
2025-03-30 06:58:43 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=107): ver=1 fn=106 tn=7 bl=148 pwr=0
2025-03-30 06:58:44 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 06:58:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:58:44 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 06:58:44 [DEBUG] fake_trx.py:317 (BTS@172.18.26.20:5700) Recv FAKE_CI cmd
2025-03-30 06:58:44 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:58:44 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:58:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:58:44 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:58:44 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:58:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:58:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:58:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:58:44 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:58:44 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:58:44 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:58:44 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:58:44 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:58:44 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:58:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:58:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:58:44 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-03-30 06:58:44 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:58:44 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:58:44 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:58:44 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:58:44 [DEBUG] clck_gen.py:128 IND CLOCK 306
2025-03-30 06:58:45 [DEBUG] clck_gen.py:128 IND CLOCK 408
2025-03-30 06:58:45 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:58:45 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:58:45 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:58:45 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:58:45 [DEBUG] clck_gen.py:128 IND CLOCK 510
2025-03-30 06:58:46 [DEBUG] clck_gen.py:128 IND CLOCK 612
2025-03-30 06:58:46 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:58:46 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:58:46 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:58:46 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:58:46 [DEBUG] clck_gen.py:128 IND CLOCK 714
2025-03-30 06:58:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:58:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:58:47 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:58:47 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:58:47 [DEBUG] clck_gen.py:128 IND CLOCK 816
2025-03-30 06:58:47 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:58:47 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:58:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:58:47 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:58:47 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:58:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:58:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:58:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:58:47 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:58:47 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:58:47 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:58:47 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:58:47 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:58:47 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:58:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:58:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:58:47 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:58:47 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:58:47 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:58:47 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:58:47 [DEBUG] clck_gen.py:128 IND CLOCK 918
2025-03-30 06:58:48 [DEBUG] clck_gen.py:128 IND CLOCK 1020
2025-03-30 06:58:48 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:58:48 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:58:48 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:58:48 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:58:48 [DEBUG] clck_gen.py:128 IND CLOCK 1122
2025-03-30 06:58:49 [DEBUG] clck_gen.py:128 IND CLOCK 1224
2025-03-30 06:58:49 [DEBUG] clck_gen.py:128 IND CLOCK 1326
2025-03-30 06:58:50 [DEBUG] clck_gen.py:128 IND CLOCK 1428
2025-03-30 06:58:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:58:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:58:50 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:58:50 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:58:50 [DEBUG] clck_gen.py:128 IND CLOCK 1530
2025-03-30 06:58:50 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:58:50 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:58:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:58:50 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:58:50 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:58:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:58:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:58:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:58:50 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:58:50 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:58:50 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:58:50 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:58:50 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:58:50 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:58:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:58:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:58:51 [DEBUG] clck_gen.py:128 IND CLOCK 1632
2025-03-30 06:58:51 [DEBUG] clck_gen.py:128 IND CLOCK 1734
2025-03-30 06:58:51 [DEBUG] clck_gen.py:128 IND CLOCK 1836
2025-03-30 06:58:52 [DEBUG] clck_gen.py:128 IND CLOCK 1938
2025-03-30 06:58:52 [DEBUG] clck_gen.py:128 IND CLOCK 2040
2025-03-30 06:58:53 [DEBUG] clck_gen.py:128 IND CLOCK 2142
2025-03-30 06:58:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:58:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:58:53 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:58:53 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:58:53 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:58:53 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:58:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:58:53 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:58:53 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:58:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:58:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:58:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:58:53 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:58:53 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:58:53 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:58:53 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:58:53 [DEBUG] clck_gen.py:128 IND CLOCK 2244
2025-03-30 06:58:53 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:58:53 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:58:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:58:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:58:54 [DEBUG] clck_gen.py:128 IND CLOCK 2346
2025-03-30 06:58:54 [DEBUG] clck_gen.py:128 IND CLOCK 2448
2025-03-30 06:58:55 [DEBUG] clck_gen.py:128 IND CLOCK 2550
2025-03-30 06:58:55 [DEBUG] clck_gen.py:128 IND CLOCK 2652
2025-03-30 06:58:56 [DEBUG] clck_gen.py:128 IND CLOCK 2754
2025-03-30 06:58:56 [DEBUG] clck_gen.py:128 IND CLOCK 2856
2025-03-30 06:58:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:58:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:58:57 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:58:57 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:58:57 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:58:57 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:58:57 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:58:57 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:58:57 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:58:57 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:58:57 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:58:57 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 06:58:57 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 06:58:57 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 06:58:57 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:59:02 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 06:59:02 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 06:59:02 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:59:02 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:59:02 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:59:02 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:59:02 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:59:02 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 06:59:02 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:59:02 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 06:59:02 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 06:59:02 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 06:59:02 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 06:59:02 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 06:59:02 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:59:02 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:59:02 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 06:59:02 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 06:59:02 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 06:59:02 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 06:59:02 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 06:59:02 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 06:59:02 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:59:02 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:59:02 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 06:59:02 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 06:59:02 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 06:59:02 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 06:59:02 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 06:59:02 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 06:59:02 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:59:02 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:59:02 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 06:59:02 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 06:59:02 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 06:59:02 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 06:59:02 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 06:59:02 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 06:59:02 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 06:59:02 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 06:59:02 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 06:59:02 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 06:59:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 06:59:02 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:59:02 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 06:59:02 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 06:59:02 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:59:02 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:59:02 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 06:59:02 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 06:59:02 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 06:59:02 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 06:59:02 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:59:02 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:59:02 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:59:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 06:59:02 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:59:02 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:59:02 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:59:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:59:02 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:59:02 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:59:02 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:59:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:59:02 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:59:02 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:59:02 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:59:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:59:02 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:59:02 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:59:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:59:02 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:59:02 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:59:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:59:02 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:59:02 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:59:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:59:02 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:59:02 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:59:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:59:02 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:59:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:59:02 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-03-30 06:59:02 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-03-30 06:59:02 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-03-30 06:59:02 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-03-30 06:59:02 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-03-30 06:59:02 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-03-30 06:59:02 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-03-30 06:59:02 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-03-30 06:59:02 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-03-30 06:59:02 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-03-30 06:59:02 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 06:59:02 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 06:59:02 [DEBUG] fake_trx.py:317 (BTS@172.18.26.20:5700) Recv FAKE_CI cmd
2025-03-30 06:59:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:59:02 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:59:02 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:59:02 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:59:02 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:59:02 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:59:02 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:59:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:59:02 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:59:02 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:59:02 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:59:02 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:59:02 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:59:02 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:59:02 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:59:02 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:59:02 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:59:02 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:59:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:59:02 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:59:02 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:59:02 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:59:02 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:59:02 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:59:02 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:59:02 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:59:02 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:59:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:59:02 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:59:02 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:59:02 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:59:02 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:59:02 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:59:02 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-03-30 06:59:02 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:59:02 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:59:02 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:59:02 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:59:03 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:59:03 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:59:03 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:59:03 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:59:03 [DEBUG] clck_gen.py:128 IND CLOCK 306
2025-03-30 06:59:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:59:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:59:03 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:59:03 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:59:03 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:59:03 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:59:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:59:03 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:59:03 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:59:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:59:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:59:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:59:03 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:59:03 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:59:03 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:59:03 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:59:03 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:59:03 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:59:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:59:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:59:03 [DEBUG] clck_gen.py:128 IND CLOCK 408
2025-03-30 06:59:04 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:59:04 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:59:04 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:59:04 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:59:04 [DEBUG] clck_gen.py:128 IND CLOCK 510
2025-03-30 06:59:04 [DEBUG] clck_gen.py:128 IND CLOCK 612
2025-03-30 06:59:05 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:59:05 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:59:05 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:59:05 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:59:05 [DEBUG] clck_gen.py:128 IND CLOCK 714
2025-03-30 06:59:05 [DEBUG] clck_gen.py:128 IND CLOCK 816
2025-03-30 06:59:06 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:59:06 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:59:06 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:59:06 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:59:06 [DEBUG] clck_gen.py:128 IND CLOCK 918
2025-03-30 06:59:06 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:59:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:59:06 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:59:06 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:59:06 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:59:06 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:59:06 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:59:06 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:59:06 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:59:06 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:59:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:59:06 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:59:06 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:59:06 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:59:06 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:59:06 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:59:06 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:59:06 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:59:06 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:59:06 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:59:06 [DEBUG] clck_gen.py:128 IND CLOCK 1020
2025-03-30 06:59:07 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:59:07 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:59:07 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:59:07 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:59:07 [DEBUG] clck_gen.py:128 IND CLOCK 1122
2025-03-30 06:59:07 [DEBUG] clck_gen.py:128 IND CLOCK 1224
2025-03-30 06:59:08 [DEBUG] clck_gen.py:128 IND CLOCK 1326
2025-03-30 06:59:08 [DEBUG] clck_gen.py:128 IND CLOCK 1428
2025-03-30 06:59:09 [DEBUG] clck_gen.py:128 IND CLOCK 1530
2025-03-30 06:59:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:59:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:59:09 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:59:09 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:59:09 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:59:09 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:59:09 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:59:09 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:59:09 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:59:09 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:59:09 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:59:09 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:59:09 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 06:59:09 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 06:59:09 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 06:59:09 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=1607 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:59:09 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=1607 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:59:09 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=1607 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:59:09 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=1607 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:59:09 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=1608 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:59:09 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=1608 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:59:09 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=1608 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:59:09 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=1608 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:59:09 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=1608 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:59:09 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=1608 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:59:09 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=1608 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:59:09 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=1608 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:59:14 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 06:59:14 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 06:59:14 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:59:14 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:59:14 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:59:14 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:59:14 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:59:14 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 06:59:14 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:59:14 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 06:59:14 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 06:59:14 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 06:59:14 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 06:59:14 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 06:59:14 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:59:14 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:59:14 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 06:59:14 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 06:59:14 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 06:59:14 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 06:59:14 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 06:59:14 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 06:59:14 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:59:14 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:59:14 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 06:59:14 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 06:59:14 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 06:59:14 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 06:59:14 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 06:59:14 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 06:59:14 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:59:14 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:59:14 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 06:59:14 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 06:59:14 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 06:59:14 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 06:59:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 06:59:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 06:59:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 06:59:14 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 06:59:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 06:59:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 06:59:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 06:59:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:59:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 06:59:14 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 06:59:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:59:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:59:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:59:14 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 06:59:14 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 06:59:14 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 06:59:14 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 06:59:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:59:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:59:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:59:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 06:59:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:59:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:59:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:59:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:59:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:59:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:59:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:59:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:59:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:59:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:59:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:59:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:59:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:59:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:59:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:59:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:59:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:59:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:59:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:59:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:59:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:59:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:59:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:59:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:59:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:59:14 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-03-30 06:59:14 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-03-30 06:59:14 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-03-30 06:59:14 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-03-30 06:59:14 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-03-30 06:59:14 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-03-30 06:59:14 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-03-30 06:59:14 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-03-30 06:59:14 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-03-30 06:59:14 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-03-30 06:59:14 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=0 bl=148 pwr=0
2025-03-30 06:59:14 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=1 bl=148 pwr=0
2025-03-30 06:59:14 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=2 bl=148 pwr=0
2025-03-30 06:59:14 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=3 bl=148 pwr=0
2025-03-30 06:59:14 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=4 bl=148 pwr=0
2025-03-30 06:59:14 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=5 bl=148 pwr=0
2025-03-30 06:59:14 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=6 bl=148 pwr=0
2025-03-30 06:59:14 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=7 bl=148 pwr=0
2025-03-30 06:59:15 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 06:59:15 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 06:59:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:59:15 [DEBUG] fake_trx.py:317 (BTS@172.18.26.20:5700) Recv FAKE_CI cmd
2025-03-30 06:59:15 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:59:15 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:59:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:59:15 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:59:15 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:59:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:59:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:59:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:59:15 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:59:15 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:59:15 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:59:15 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:59:15 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:59:15 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:59:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:59:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:59:15 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-03-30 06:59:15 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:59:15 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:59:15 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:59:15 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:59:15 [DEBUG] clck_gen.py:128 IND CLOCK 306
2025-03-30 06:59:16 [DEBUG] clck_gen.py:128 IND CLOCK 408
2025-03-30 06:59:16 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:59:16 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:59:16 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:59:16 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:59:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:59:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:59:16 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:59:16 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:59:16 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:59:16 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:59:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:59:16 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:59:16 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:59:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:59:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:59:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:59:16 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:59:16 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:59:16 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:59:16 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:59:16 [DEBUG] clck_gen.py:128 IND CLOCK 510
2025-03-30 06:59:16 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:59:16 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:59:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:59:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:59:17 [DEBUG] clck_gen.py:128 IND CLOCK 612
2025-03-30 06:59:17 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:59:17 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:59:17 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:59:17 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:59:17 [DEBUG] clck_gen.py:128 IND CLOCK 714
2025-03-30 06:59:18 [DEBUG] clck_gen.py:128 IND CLOCK 816
2025-03-30 06:59:18 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:59:18 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:59:18 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:59:18 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:59:18 [DEBUG] clck_gen.py:128 IND CLOCK 918
2025-03-30 06:59:19 [DEBUG] clck_gen.py:128 IND CLOCK 1020
2025-03-30 06:59:19 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:59:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:59:19 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:59:19 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:59:19 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:59:19 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:59:19 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:59:19 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:59:19 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:59:19 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:59:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:59:19 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:59:19 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:59:19 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:59:19 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:59:19 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:59:19 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:59:19 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:59:19 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:59:19 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:59:19 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:59:19 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:59:19 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:59:19 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:59:19 [DEBUG] clck_gen.py:128 IND CLOCK 1122
2025-03-30 06:59:20 [DEBUG] clck_gen.py:128 IND CLOCK 1224
2025-03-30 06:59:20 [DEBUG] clck_gen.py:128 IND CLOCK 1326
2025-03-30 06:59:21 [DEBUG] clck_gen.py:128 IND CLOCK 1428
2025-03-30 06:59:21 [DEBUG] clck_gen.py:128 IND CLOCK 1530
2025-03-30 06:59:22 [DEBUG] clck_gen.py:128 IND CLOCK 1632
2025-03-30 06:59:22 [DEBUG] clck_gen.py:128 IND CLOCK 1734
2025-03-30 06:59:22 [DEBUG] clck_gen.py:128 IND CLOCK 1836
2025-03-30 06:59:23 [DEBUG] clck_gen.py:128 IND CLOCK 1938
2025-03-30 06:59:23 [DEBUG] clck_gen.py:128 IND CLOCK 2040
2025-03-30 06:59:24 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:59:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:59:24 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:59:24 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:59:24 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:59:24 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:59:24 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:59:24 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:59:24 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:59:24 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:59:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:59:24 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:59:24 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:59:24 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:59:24 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:59:24 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:59:24 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:59:24 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:59:24 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:59:24 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:59:24 [DEBUG] clck_gen.py:128 IND CLOCK 2142
2025-03-30 06:59:24 [DEBUG] clck_gen.py:128 IND CLOCK 2244
2025-03-30 06:59:25 [DEBUG] clck_gen.py:128 IND CLOCK 2346
2025-03-30 06:59:25 [DEBUG] clck_gen.py:128 IND CLOCK 2448
2025-03-30 06:59:26 [DEBUG] clck_gen.py:128 IND CLOCK 2550
2025-03-30 06:59:26 [DEBUG] clck_gen.py:128 IND CLOCK 2652
2025-03-30 06:59:27 [DEBUG] clck_gen.py:128 IND CLOCK 2754
2025-03-30 06:59:27 [DEBUG] clck_gen.py:128 IND CLOCK 2856
2025-03-30 06:59:28 [DEBUG] clck_gen.py:128 IND CLOCK 2958
2025-03-30 06:59:28 [DEBUG] clck_gen.py:128 IND CLOCK 3060
2025-03-30 06:59:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:59:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:59:29 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:59:29 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:59:29 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:59:29 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:59:29 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:59:29 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:59:29 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:59:29 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:59:29 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:59:29 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:59:29 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 06:59:29 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 06:59:29 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 06:59:29 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=3153 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:59:29 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=3153 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:59:29 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=3153 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:59:29 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=3153 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:59:29 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=3153 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:59:29 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=3153 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:59:29 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=3153 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:59:29 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=3153 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 06:59:34 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 06:59:34 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 06:59:34 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:59:34 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:59:34 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:59:34 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:59:34 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:59:34 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 06:59:34 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:59:34 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 06:59:34 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 06:59:34 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 06:59:34 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 06:59:34 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 06:59:34 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:59:34 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:59:34 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 06:59:34 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 06:59:34 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 06:59:34 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 06:59:34 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 06:59:34 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 06:59:34 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:59:34 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 06:59:34 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:59:34 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 06:59:34 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 06:59:34 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 06:59:34 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 06:59:34 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 06:59:34 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:59:34 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:59:34 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 06:59:34 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 06:59:34 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 06:59:34 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 06:59:34 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 06:59:34 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 06:59:34 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 06:59:34 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 06:59:34 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 06:59:34 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 06:59:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 06:59:34 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:59:34 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 06:59:34 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 06:59:34 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:59:34 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:59:34 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 06:59:34 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 06:59:34 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 06:59:34 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 06:59:34 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:59:34 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:59:34 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:59:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 06:59:34 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:59:34 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:59:34 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:59:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:59:34 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:59:34 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:59:34 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:59:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:59:34 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:59:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:59:34 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:59:34 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:59:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:59:34 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:59:34 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:59:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:59:34 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:59:34 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:59:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:59:34 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:59:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:59:34 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:59:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:59:34 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:59:34 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:59:34 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:59:34 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-03-30 06:59:34 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-03-30 06:59:34 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-03-30 06:59:34 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-03-30 06:59:34 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-03-30 06:59:34 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-03-30 06:59:34 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-03-30 06:59:34 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-03-30 06:59:34 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-03-30 06:59:34 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-03-30 06:59:34 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=105 tn=0 bl=148 pwr=0
2025-03-30 06:59:34 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=105 tn=1 bl=148 pwr=0
2025-03-30 06:59:34 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=105 tn=2 bl=148 pwr=0
2025-03-30 06:59:34 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=105 tn=3 bl=148 pwr=0
2025-03-30 06:59:34 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=105 tn=4 bl=148 pwr=0
2025-03-30 06:59:34 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=105 tn=5 bl=148 pwr=0
2025-03-30 06:59:34 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=105 tn=6 bl=148 pwr=0
2025-03-30 06:59:34 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=105 tn=7 bl=148 pwr=0
2025-03-30 06:59:34 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=106 tn=0 bl=148 pwr=0
2025-03-30 06:59:34 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=106 tn=1 bl=148 pwr=0
2025-03-30 06:59:34 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=106 tn=2 bl=148 pwr=0
2025-03-30 06:59:34 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=106 tn=3 bl=148 pwr=0
2025-03-30 06:59:34 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=106 tn=4 bl=148 pwr=0
2025-03-30 06:59:34 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=106 tn=5 bl=148 pwr=0
2025-03-30 06:59:34 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=106 tn=6 bl=148 pwr=0
2025-03-30 06:59:34 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=106 tn=7 bl=148 pwr=0
2025-03-30 06:59:34 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=107 tn=0 bl=148 pwr=0
2025-03-30 06:59:34 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=107 tn=1 bl=148 pwr=0
2025-03-30 06:59:34 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=107 tn=2 bl=148 pwr=0
2025-03-30 06:59:34 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=107 tn=3 bl=148 pwr=0
2025-03-30 06:59:34 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=107 tn=4 bl=148 pwr=0
2025-03-30 06:59:34 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=107 tn=5 bl=148 pwr=0
2025-03-30 06:59:34 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=107 tn=6 bl=148 pwr=0
2025-03-30 06:59:34 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=107 tn=7 bl=148 pwr=0
2025-03-30 06:59:34 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 06:59:34 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 06:59:34 [DEBUG] fake_trx.py:317 (BTS@172.18.26.20:5700) Recv FAKE_CI cmd
2025-03-30 06:59:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:59:34 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:59:34 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:59:34 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:59:34 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:59:34 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:59:34 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:59:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:59:34 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:59:34 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:59:34 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:59:34 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:59:34 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:59:34 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:59:34 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:59:34 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:59:34 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:59:35 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-03-30 06:59:35 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:59:35 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:59:35 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:59:35 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:59:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:59:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:59:35 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:59:35 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:59:35 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:59:35 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:59:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:59:35 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:59:35 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:59:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:59:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:59:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:59:35 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:59:35 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:59:35 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:59:35 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:59:35 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:59:35 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:59:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:59:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:59:35 [DEBUG] clck_gen.py:128 IND CLOCK 306
2025-03-30 06:59:35 [DEBUG] clck_gen.py:128 IND CLOCK 408
2025-03-30 06:59:36 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:59:36 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:59:36 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:59:36 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:59:36 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:59:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:59:36 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:59:36 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:59:36 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:59:36 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:59:36 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:59:36 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:59:36 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:59:36 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:59:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:59:36 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:59:36 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:59:36 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:59:36 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:59:36 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:59:36 [DEBUG] clck_gen.py:128 IND CLOCK 510
2025-03-30 06:59:36 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:59:36 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:59:36 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:59:36 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:59:36 [DEBUG] clck_gen.py:128 IND CLOCK 612
2025-03-30 06:59:37 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:59:37 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:59:37 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:59:37 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:59:37 [DEBUG] clck_gen.py:128 IND CLOCK 714
2025-03-30 06:59:37 [DEBUG] clck_gen.py:128 IND CLOCK 816
2025-03-30 06:59:38 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:59:38 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:59:38 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:59:38 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:59:38 [DEBUG] clck_gen.py:128 IND CLOCK 918
2025-03-30 06:59:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:59:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:59:38 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:59:38 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:59:38 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:59:38 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:59:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:59:38 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:59:38 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:59:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:59:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:59:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:59:38 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:59:38 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:59:38 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:59:38 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:59:38 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:59:38 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:59:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:59:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:59:38 [DEBUG] clck_gen.py:128 IND CLOCK 1020
2025-03-30 06:59:39 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:59:39 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:59:39 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:59:39 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:59:39 [DEBUG] clck_gen.py:128 IND CLOCK 1122
2025-03-30 06:59:39 [DEBUG] clck_gen.py:128 IND CLOCK 1224
2025-03-30 06:59:40 [DEBUG] clck_gen.py:128 IND CLOCK 1326
2025-03-30 06:59:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:59:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:59:40 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:59:40 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:59:40 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:59:40 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:59:40 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:59:40 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:59:40 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:59:40 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:59:40 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:59:40 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:59:40 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 06:59:40 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 06:59:40 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 06:59:45 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 06:59:45 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 06:59:45 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:59:45 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:59:45 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:59:45 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:59:45 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:59:45 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 06:59:45 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:59:45 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 06:59:45 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 06:59:45 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 06:59:45 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 06:59:45 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 06:59:45 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:59:45 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 06:59:45 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:59:45 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 06:59:45 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 06:59:45 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 06:59:45 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 06:59:45 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 06:59:45 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:59:45 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:59:45 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 06:59:45 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 06:59:45 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 06:59:45 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 06:59:45 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 06:59:45 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 06:59:45 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 06:59:45 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 06:59:45 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:59:45 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 06:59:45 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 06:59:45 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 06:59:45 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 06:59:45 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 06:59:45 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 06:59:45 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 06:59:45 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 06:59:45 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 06:59:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 06:59:45 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:59:45 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 06:59:45 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 06:59:45 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:59:45 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:59:45 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 06:59:45 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 06:59:45 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 06:59:45 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 06:59:45 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:59:45 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:59:45 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:59:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 06:59:45 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:59:45 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:59:45 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:59:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:59:45 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:59:45 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:59:45 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:59:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:59:45 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:59:45 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:59:45 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:59:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:59:45 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:59:45 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:59:45 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:59:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:59:45 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 06:59:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:59:45 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:59:45 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:59:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:59:45 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 06:59:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:59:45 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:59:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 06:59:45 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 06:59:45 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-03-30 06:59:46 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-03-30 06:59:46 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-03-30 06:59:46 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-03-30 06:59:46 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-03-30 06:59:46 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-03-30 06:59:46 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-03-30 06:59:46 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-03-30 06:59:46 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-03-30 06:59:46 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-03-30 06:59:46 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 06:59:46 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 06:59:46 [DEBUG] fake_trx.py:317 (BTS@172.18.26.20:5700) Recv FAKE_CI cmd
2025-03-30 06:59:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:59:46 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:59:46 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:59:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:59:46 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:59:46 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:59:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:59:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:59:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:59:46 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:59:46 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:59:46 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:59:46 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:59:46 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:59:46 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:59:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:59:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:59:46 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-03-30 06:59:46 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:59:46 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:59:46 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:59:46 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:59:46 [DEBUG] clck_gen.py:128 IND CLOCK 306
2025-03-30 06:59:47 [DEBUG] clck_gen.py:128 IND CLOCK 408
2025-03-30 06:59:47 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:59:47 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:59:47 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:59:47 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:59:47 [DEBUG] clck_gen.py:128 IND CLOCK 510
2025-03-30 06:59:48 [DEBUG] clck_gen.py:128 IND CLOCK 612
2025-03-30 06:59:48 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:59:48 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:59:48 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:59:48 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:59:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:59:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:59:48 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:59:48 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:59:48 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:59:48 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:59:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:59:48 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:59:48 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:59:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:59:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:59:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:59:48 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:59:48 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:59:48 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:59:48 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:59:48 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:59:48 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:59:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:59:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:59:48 [DEBUG] clck_gen.py:128 IND CLOCK 714
2025-03-30 06:59:49 [DEBUG] clck_gen.py:128 IND CLOCK 816
2025-03-30 06:59:49 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:59:49 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:59:49 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:59:49 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:59:49 [DEBUG] clck_gen.py:128 IND CLOCK 918
2025-03-30 06:59:50 [DEBUG] clck_gen.py:128 IND CLOCK 1020
2025-03-30 06:59:50 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:59:50 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:59:50 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:59:50 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:59:50 [DEBUG] clck_gen.py:128 IND CLOCK 1122
2025-03-30 06:59:51 [DEBUG] clck_gen.py:128 IND CLOCK 1224
2025-03-30 06:59:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:59:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:59:51 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:59:51 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:59:51 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:59:51 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:59:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:59:51 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:59:51 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:59:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:59:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:59:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:59:51 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:59:51 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:59:51 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:59:51 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:59:51 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:59:51 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:59:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:59:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:59:51 [DEBUG] clck_gen.py:128 IND CLOCK 1326
2025-03-30 06:59:52 [DEBUG] clck_gen.py:128 IND CLOCK 1428
2025-03-30 06:59:52 [DEBUG] clck_gen.py:128 IND CLOCK 1530
2025-03-30 06:59:53 [DEBUG] clck_gen.py:128 IND CLOCK 1632
2025-03-30 06:59:53 [DEBUG] clck_gen.py:128 IND CLOCK 1734
2025-03-30 06:59:54 [DEBUG] clck_gen.py:128 IND CLOCK 1836
2025-03-30 06:59:54 [DEBUG] clck_gen.py:128 IND CLOCK 1938
2025-03-30 06:59:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:59:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:59:54 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:59:54 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:59:54 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:59:54 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:59:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:59:54 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:59:54 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:59:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 06:59:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:59:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:59:54 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:59:54 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:59:54 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 06:59:54 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 06:59:54 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 06:59:54 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 06:59:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:59:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:59:54 [DEBUG] clck_gen.py:128 IND CLOCK 2040
2025-03-30 06:59:55 [DEBUG] clck_gen.py:128 IND CLOCK 2142
2025-03-30 06:59:55 [DEBUG] clck_gen.py:128 IND CLOCK 2244
2025-03-30 06:59:56 [DEBUG] clck_gen.py:128 IND CLOCK 2346
2025-03-30 06:59:56 [DEBUG] clck_gen.py:128 IND CLOCK 2448
2025-03-30 06:59:57 [DEBUG] clck_gen.py:128 IND CLOCK 2550
2025-03-30 06:59:57 [DEBUG] clck_gen.py:128 IND CLOCK 2652
2025-03-30 06:59:58 [DEBUG] clck_gen.py:128 IND CLOCK 2754
2025-03-30 06:59:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 06:59:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 06:59:58 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 06:59:58 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 06:59:58 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 06:59:58 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 06:59:58 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 06:59:58 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 06:59:58 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 06:59:58 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 06:59:58 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 06:59:58 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 06:59:58 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 06:59:58 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 06:59:58 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 07:00:03 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 07:00:03 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 07:00:03 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:00:03 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:00:03 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:00:03 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:00:03 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:00:03 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 07:00:03 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:00:03 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 07:00:03 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 07:00:03 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 07:00:03 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 07:00:03 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 07:00:03 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:00:03 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 07:00:03 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:00:03 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 07:00:03 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 07:00:03 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 07:00:03 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 07:00:03 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 07:00:03 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:00:03 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 07:00:03 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:00:03 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 07:00:03 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 07:00:03 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 07:00:03 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 07:00:03 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 07:00:03 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:00:03 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:00:03 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 07:00:03 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 07:00:03 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 07:00:03 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 07:00:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 07:00:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 07:00:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 07:00:03 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 07:00:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 07:00:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 07:00:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 07:00:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:00:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 07:00:03 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 07:00:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:00:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:00:03 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 07:00:03 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 07:00:03 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 07:00:03 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 07:00:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:00:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:00:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:00:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 07:00:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:00:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:00:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:00:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:00:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:00:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:00:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:00:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:00:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:00:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:00:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:00:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:00:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:00:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:00:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:00:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:00:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:00:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:00:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:00:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:00:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:00:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:00:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:00:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:00:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:00:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:00:03 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-03-30 07:00:03 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-03-30 07:00:03 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-03-30 07:00:03 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-03-30 07:00:03 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-03-30 07:00:03 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-03-30 07:00:03 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-03-30 07:00:03 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-03-30 07:00:03 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-03-30 07:00:03 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-03-30 07:00:03 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 07:00:03 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 07:00:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:00:03 [DEBUG] fake_trx.py:317 (BTS@172.18.26.20:5700) Recv FAKE_CI cmd
2025-03-30 07:00:03 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:00:03 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:00:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:00:03 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:00:03 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:00:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:00:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:00:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:00:03 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:00:03 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:00:03 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 07:00:03 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 07:00:03 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:00:03 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:00:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:00:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:00:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:00:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:00:04 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:00:04 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:00:04 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:00:04 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:00:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:00:04 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:00:04 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:00:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:00:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:00:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:00:04 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:00:04 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:00:04 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 07:00:04 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 07:00:04 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:00:04 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:00:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:00:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:00:04 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-03-30 07:00:04 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:00:04 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:00:04 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:00:04 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:00:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:00:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:00:04 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:00:04 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:00:04 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:00:04 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:00:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:00:04 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:00:04 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:00:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:00:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:00:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:00:04 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:00:04 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:00:04 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 07:00:04 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 07:00:04 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:00:04 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:00:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:00:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:00:04 [DEBUG] clck_gen.py:128 IND CLOCK 306
2025-03-30 07:00:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:00:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:00:05 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:00:05 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:00:05 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:00:05 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:00:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:00:05 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:00:05 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:00:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:00:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:00:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:00:05 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:00:05 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:00:05 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 07:00:05 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 07:00:05 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:00:05 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:00:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:00:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:00:05 [DEBUG] clck_gen.py:128 IND CLOCK 408
2025-03-30 07:00:05 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:00:05 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:00:05 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:00:05 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:00:05 [DEBUG] clck_gen.py:128 IND CLOCK 510
2025-03-30 07:00:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:00:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:00:05 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:00:05 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:00:05 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:00:05 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:00:05 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:00:05 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:00:05 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:00:05 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:00:05 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:00:05 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:00:05 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 07:00:05 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 07:00:05 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 07:00:05 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=533 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:00:05 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=533 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:00:05 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=533 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:00:05 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=533 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:00:05 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=533 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:00:05 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=533 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:00:05 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=533 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:00:05 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=533 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:00:10 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 07:00:10 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 07:00:10 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:00:10 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:00:10 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:00:10 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:00:10 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:00:10 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 07:00:10 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:00:10 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 07:00:10 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 07:00:10 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 07:00:10 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 07:00:10 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 07:00:10 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:00:10 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 07:00:10 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:00:10 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 07:00:10 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 07:00:10 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 07:00:10 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 07:00:10 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 07:00:10 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:00:10 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:00:10 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 07:00:10 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 07:00:10 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 07:00:10 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 07:00:10 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 07:00:10 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 07:00:10 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:00:10 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:00:10 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 07:00:10 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 07:00:10 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 07:00:10 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 07:00:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 07:00:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 07:00:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 07:00:10 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 07:00:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 07:00:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 07:00:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 07:00:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:00:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 07:00:10 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 07:00:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:00:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:00:10 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 07:00:10 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 07:00:10 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 07:00:10 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 07:00:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:00:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:00:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:00:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 07:00:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:00:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:00:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:00:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:00:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:00:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:00:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:00:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:00:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:00:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:00:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:00:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:00:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:00:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:00:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:00:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:00:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:00:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:00:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:00:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:00:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:00:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:00:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:00:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:00:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:00:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:00:10 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-03-30 07:00:11 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-03-30 07:00:11 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-03-30 07:00:11 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-03-30 07:00:11 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-03-30 07:00:11 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-03-30 07:00:11 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-03-30 07:00:11 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-03-30 07:00:11 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-03-30 07:00:11 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-03-30 07:00:11 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=105 tn=0 bl=148 pwr=0
2025-03-30 07:00:11 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=105 tn=1 bl=148 pwr=0
2025-03-30 07:00:11 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=105 tn=2 bl=148 pwr=0
2025-03-30 07:00:11 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=105 tn=3 bl=148 pwr=0
2025-03-30 07:00:11 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=105 tn=4 bl=148 pwr=0
2025-03-30 07:00:11 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=105 tn=5 bl=148 pwr=0
2025-03-30 07:00:11 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=105 tn=6 bl=148 pwr=0
2025-03-30 07:00:11 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=105 tn=7 bl=148 pwr=0
2025-03-30 07:00:11 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=106 tn=0 bl=148 pwr=0
2025-03-30 07:00:11 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=106 tn=1 bl=148 pwr=0
2025-03-30 07:00:11 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=106 tn=2 bl=148 pwr=0
2025-03-30 07:00:11 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=106 tn=3 bl=148 pwr=0
2025-03-30 07:00:11 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=106 tn=4 bl=148 pwr=0
2025-03-30 07:00:11 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=106 tn=5 bl=148 pwr=0
2025-03-30 07:00:11 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=106 tn=6 bl=148 pwr=0
2025-03-30 07:00:11 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=106 tn=7 bl=148 pwr=0
2025-03-30 07:00:11 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=107 tn=0 bl=148 pwr=0
2025-03-30 07:00:11 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=107 tn=1 bl=148 pwr=0
2025-03-30 07:00:11 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=107 tn=2 bl=148 pwr=0
2025-03-30 07:00:11 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=107 tn=3 bl=148 pwr=0
2025-03-30 07:00:11 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=107 tn=4 bl=148 pwr=0
2025-03-30 07:00:11 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=107 tn=5 bl=148 pwr=0
2025-03-30 07:00:11 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=107 tn=6 bl=148 pwr=0
2025-03-30 07:00:11 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=107 tn=7 bl=148 pwr=0
2025-03-30 07:00:11 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 07:00:11 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 07:00:11 [DEBUG] fake_trx.py:317 (BTS@172.18.26.20:5700) Recv FAKE_CI cmd
2025-03-30 07:00:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:00:11 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:00:11 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:00:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:00:11 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:00:11 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:00:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:00:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:00:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:00:11 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:00:11 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:00:11 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 07:00:11 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 07:00:11 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:00:11 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:00:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:00:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:00:11 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-03-30 07:00:11 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:00:11 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:00:11 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:00:11 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:00:12 [DEBUG] clck_gen.py:128 IND CLOCK 306
2025-03-30 07:00:12 [DEBUG] clck_gen.py:128 IND CLOCK 408
2025-03-30 07:00:12 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:00:12 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:00:12 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:00:12 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:00:13 [DEBUG] clck_gen.py:128 IND CLOCK 510
2025-03-30 07:00:13 [DEBUG] clck_gen.py:128 IND CLOCK 612
2025-03-30 07:00:13 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:00:13 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:00:13 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:00:13 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:00:14 [DEBUG] clck_gen.py:128 IND CLOCK 714
2025-03-30 07:00:14 [DEBUG] clck_gen.py:128 IND CLOCK 816
2025-03-30 07:00:14 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:00:14 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:00:14 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:00:14 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:00:15 [DEBUG] clck_gen.py:128 IND CLOCK 918
2025-03-30 07:00:15 [DEBUG] clck_gen.py:128 IND CLOCK 1020
2025-03-30 07:00:15 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:00:15 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:00:15 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:00:15 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:00:16 [DEBUG] clck_gen.py:128 IND CLOCK 1122
2025-03-30 07:00:16 [DEBUG] clck_gen.py:128 IND CLOCK 1224
2025-03-30 07:00:17 [DEBUG] clck_gen.py:128 IND CLOCK 1326
2025-03-30 07:00:17 [DEBUG] clck_gen.py:128 IND CLOCK 1428
2025-03-30 07:00:17 [DEBUG] clck_gen.py:128 IND CLOCK 1530
2025-03-30 07:00:18 [DEBUG] clck_gen.py:128 IND CLOCK 1632
2025-03-30 07:00:18 [DEBUG] clck_gen.py:128 IND CLOCK 1734
2025-03-30 07:00:19 [DEBUG] clck_gen.py:128 IND CLOCK 1836
2025-03-30 07:00:19 [DEBUG] clck_gen.py:128 IND CLOCK 1938
2025-03-30 07:00:20 [DEBUG] clck_gen.py:128 IND CLOCK 2040
2025-03-30 07:00:20 [DEBUG] clck_gen.py:128 IND CLOCK 2142
2025-03-30 07:00:21 [DEBUG] clck_gen.py:128 IND CLOCK 2244
2025-03-30 07:00:21 [DEBUG] clck_gen.py:128 IND CLOCK 2346
2025-03-30 07:00:22 [DEBUG] clck_gen.py:128 IND CLOCK 2448
2025-03-30 07:00:22 [DEBUG] clck_gen.py:128 IND CLOCK 2550
2025-03-30 07:00:23 [DEBUG] clck_gen.py:128 IND CLOCK 2652
2025-03-30 07:00:23 [DEBUG] clck_gen.py:128 IND CLOCK 2754
2025-03-30 07:00:24 [DEBUG] clck_gen.py:128 IND CLOCK 2856
2025-03-30 07:00:24 [DEBUG] clck_gen.py:128 IND CLOCK 2958
2025-03-30 07:00:25 [DEBUG] clck_gen.py:128 IND CLOCK 3060
2025-03-30 07:00:25 [DEBUG] clck_gen.py:128 IND CLOCK 3162
2025-03-30 07:00:25 [DEBUG] clck_gen.py:128 IND CLOCK 3264
2025-03-30 07:00:26 [DEBUG] clck_gen.py:128 IND CLOCK 3366
2025-03-30 07:00:26 [DEBUG] clck_gen.py:128 IND CLOCK 3468
2025-03-30 07:00:27 [DEBUG] clck_gen.py:128 IND CLOCK 3570
2025-03-30 07:00:27 [DEBUG] clck_gen.py:128 IND CLOCK 3672
2025-03-30 07:00:28 [DEBUG] clck_gen.py:128 IND CLOCK 3774
2025-03-30 07:00:28 [DEBUG] clck_gen.py:128 IND CLOCK 3876
2025-03-30 07:00:29 [DEBUG] clck_gen.py:128 IND CLOCK 3978
2025-03-30 07:00:29 [DEBUG] clck_gen.py:128 IND CLOCK 4080
2025-03-30 07:00:30 [DEBUG] clck_gen.py:128 IND CLOCK 4182
2025-03-30 07:00:30 [DEBUG] clck_gen.py:128 IND CLOCK 4284
2025-03-30 07:00:31 [DEBUG] clck_gen.py:128 IND CLOCK 4386
2025-03-30 07:00:31 [DEBUG] clck_gen.py:128 IND CLOCK 4488
2025-03-30 07:00:32 [DEBUG] clck_gen.py:128 IND CLOCK 4590
2025-03-30 07:00:32 [DEBUG] clck_gen.py:128 IND CLOCK 4692
2025-03-30 07:00:33 [DEBUG] clck_gen.py:128 IND CLOCK 4794
2025-03-30 07:00:33 [DEBUG] clck_gen.py:128 IND CLOCK 4896
2025-03-30 07:00:33 [DEBUG] clck_gen.py:128 IND CLOCK 4998
2025-03-30 07:00:34 [DEBUG] clck_gen.py:128 IND CLOCK 5100
2025-03-30 07:00:34 [DEBUG] clck_gen.py:128 IND CLOCK 5202
2025-03-30 07:00:35 [DEBUG] clck_gen.py:128 IND CLOCK 5304
2025-03-30 07:00:35 [DEBUG] clck_gen.py:128 IND CLOCK 5406
2025-03-30 07:00:36 [DEBUG] clck_gen.py:128 IND CLOCK 5508
2025-03-30 07:00:36 [DEBUG] clck_gen.py:128 IND CLOCK 5610
2025-03-30 07:00:37 [DEBUG] clck_gen.py:128 IND CLOCK 5712
2025-03-30 07:00:37 [DEBUG] clck_gen.py:128 IND CLOCK 5814
2025-03-30 07:00:38 [DEBUG] clck_gen.py:128 IND CLOCK 5916
2025-03-30 07:00:38 [DEBUG] clck_gen.py:128 IND CLOCK 6018
2025-03-30 07:00:39 [DEBUG] clck_gen.py:128 IND CLOCK 6120
2025-03-30 07:00:39 [DEBUG] clck_gen.py:128 IND CLOCK 6222
2025-03-30 07:00:40 [DEBUG] clck_gen.py:128 IND CLOCK 6324
2025-03-30 07:00:40 [DEBUG] clck_gen.py:128 IND CLOCK 6426
2025-03-30 07:00:41 [DEBUG] clck_gen.py:128 IND CLOCK 6528
2025-03-30 07:00:41 [DEBUG] clck_gen.py:128 IND CLOCK 6630
2025-03-30 07:00:41 [DEBUG] clck_gen.py:128 IND CLOCK 6732
2025-03-30 07:00:42 [DEBUG] clck_gen.py:128 IND CLOCK 6834
2025-03-30 07:00:42 [DEBUG] clck_gen.py:128 IND CLOCK 6936
2025-03-30 07:00:43 [DEBUG] clck_gen.py:128 IND CLOCK 7038
2025-03-30 07:00:43 [DEBUG] clck_gen.py:128 IND CLOCK 7140
2025-03-30 07:00:44 [DEBUG] clck_gen.py:128 IND CLOCK 7242
2025-03-30 07:00:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:00:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:00:44 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:00:44 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:00:44 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:00:44 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:00:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:00:44 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:00:44 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:00:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:00:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:00:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:00:44 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:00:44 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:00:44 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 07:00:44 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 07:00:44 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:00:44 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:00:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:00:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:00:44 [DEBUG] clck_gen.py:128 IND CLOCK 7344
2025-03-30 07:00:45 [DEBUG] clck_gen.py:128 IND CLOCK 7446
2025-03-30 07:00:45 [DEBUG] clck_gen.py:128 IND CLOCK 7548
2025-03-30 07:00:46 [DEBUG] clck_gen.py:128 IND CLOCK 7650
2025-03-30 07:00:46 [DEBUG] clck_gen.py:128 IND CLOCK 7752
2025-03-30 07:00:47 [DEBUG] clck_gen.py:128 IND CLOCK 7854
2025-03-30 07:00:47 [DEBUG] clck_gen.py:128 IND CLOCK 7956
2025-03-30 07:00:48 [DEBUG] clck_gen.py:128 IND CLOCK 8058
2025-03-30 07:00:48 [DEBUG] clck_gen.py:128 IND CLOCK 8160
2025-03-30 07:00:49 [DEBUG] clck_gen.py:128 IND CLOCK 8262
2025-03-30 07:00:49 [DEBUG] clck_gen.py:128 IND CLOCK 8364
2025-03-30 07:00:49 [DEBUG] clck_gen.py:128 IND CLOCK 8466
2025-03-30 07:00:50 [DEBUG] clck_gen.py:128 IND CLOCK 8568
2025-03-30 07:00:50 [DEBUG] clck_gen.py:128 IND CLOCK 8670
2025-03-30 07:00:51 [DEBUG] clck_gen.py:128 IND CLOCK 8772
2025-03-30 07:00:51 [DEBUG] clck_gen.py:128 IND CLOCK 8874
2025-03-30 07:00:52 [DEBUG] clck_gen.py:128 IND CLOCK 8976
2025-03-30 07:00:52 [DEBUG] clck_gen.py:128 IND CLOCK 9078
2025-03-30 07:00:53 [DEBUG] clck_gen.py:128 IND CLOCK 9180
2025-03-30 07:00:53 [DEBUG] clck_gen.py:128 IND CLOCK 9282
2025-03-30 07:00:54 [DEBUG] clck_gen.py:128 IND CLOCK 9384
2025-03-30 07:00:54 [DEBUG] clck_gen.py:128 IND CLOCK 9486
2025-03-30 07:00:55 [DEBUG] clck_gen.py:128 IND CLOCK 9588
2025-03-30 07:00:55 [DEBUG] clck_gen.py:128 IND CLOCK 9690
2025-03-30 07:00:56 [DEBUG] clck_gen.py:128 IND CLOCK 9792
2025-03-30 07:00:56 [DEBUG] clck_gen.py:128 IND CLOCK 9894
2025-03-30 07:00:57 [DEBUG] clck_gen.py:128 IND CLOCK 9996
2025-03-30 07:00:57 [DEBUG] clck_gen.py:128 IND CLOCK 10098
2025-03-30 07:00:57 [DEBUG] clck_gen.py:128 IND CLOCK 10200
2025-03-30 07:00:58 [DEBUG] clck_gen.py:128 IND CLOCK 10302
2025-03-30 07:00:58 [DEBUG] clck_gen.py:128 IND CLOCK 10404
2025-03-30 07:00:59 [DEBUG] clck_gen.py:128 IND CLOCK 10506
2025-03-30 07:00:59 [DEBUG] clck_gen.py:128 IND CLOCK 10608
2025-03-30 07:01:00 [DEBUG] clck_gen.py:128 IND CLOCK 10710
2025-03-30 07:01:00 [DEBUG] clck_gen.py:128 IND CLOCK 10812
2025-03-30 07:01:01 [DEBUG] clck_gen.py:128 IND CLOCK 10914
2025-03-30 07:01:01 [DEBUG] clck_gen.py:128 IND CLOCK 11016
2025-03-30 07:01:02 [DEBUG] clck_gen.py:128 IND CLOCK 11118
2025-03-30 07:01:02 [DEBUG] clck_gen.py:128 IND CLOCK 11220
2025-03-30 07:01:03 [DEBUG] clck_gen.py:128 IND CLOCK 11322
2025-03-30 07:01:03 [DEBUG] clck_gen.py:128 IND CLOCK 11424
2025-03-30 07:01:04 [DEBUG] clck_gen.py:128 IND CLOCK 11526
2025-03-30 07:01:04 [DEBUG] clck_gen.py:128 IND CLOCK 11628
2025-03-30 07:01:05 [DEBUG] clck_gen.py:128 IND CLOCK 11730
2025-03-30 07:01:05 [DEBUG] clck_gen.py:128 IND CLOCK 11832
2025-03-30 07:01:05 [DEBUG] clck_gen.py:128 IND CLOCK 11934
2025-03-30 07:01:06 [DEBUG] clck_gen.py:128 IND CLOCK 12036
2025-03-30 07:01:06 [DEBUG] clck_gen.py:128 IND CLOCK 12138
2025-03-30 07:01:07 [DEBUG] clck_gen.py:128 IND CLOCK 12240
2025-03-30 07:01:07 [DEBUG] clck_gen.py:128 IND CLOCK 12342
2025-03-30 07:01:08 [DEBUG] clck_gen.py:128 IND CLOCK 12444
2025-03-30 07:01:08 [DEBUG] clck_gen.py:128 IND CLOCK 12546
2025-03-30 07:01:09 [DEBUG] clck_gen.py:128 IND CLOCK 12648
2025-03-30 07:01:09 [DEBUG] clck_gen.py:128 IND CLOCK 12750
2025-03-30 07:01:10 [DEBUG] clck_gen.py:128 IND CLOCK 12852
2025-03-30 07:01:10 [DEBUG] clck_gen.py:128 IND CLOCK 12954
2025-03-30 07:01:11 [DEBUG] clck_gen.py:128 IND CLOCK 13056
2025-03-30 07:01:11 [DEBUG] clck_gen.py:128 IND CLOCK 13158
2025-03-30 07:01:12 [DEBUG] clck_gen.py:128 IND CLOCK 13260
2025-03-30 07:01:12 [DEBUG] clck_gen.py:128 IND CLOCK 13362
2025-03-30 07:01:13 [DEBUG] clck_gen.py:128 IND CLOCK 13464
2025-03-30 07:01:13 [DEBUG] clck_gen.py:128 IND CLOCK 13566
2025-03-30 07:01:13 [DEBUG] clck_gen.py:128 IND CLOCK 13668
2025-03-30 07:01:14 [DEBUG] clck_gen.py:128 IND CLOCK 13770
2025-03-30 07:01:14 [DEBUG] clck_gen.py:128 IND CLOCK 13872
2025-03-30 07:01:15 [DEBUG] clck_gen.py:128 IND CLOCK 13974
2025-03-30 07:01:15 [DEBUG] clck_gen.py:128 IND CLOCK 14076
2025-03-30 07:01:16 [DEBUG] clck_gen.py:128 IND CLOCK 14178
2025-03-30 07:01:16 [DEBUG] clck_gen.py:128 IND CLOCK 14280
2025-03-30 07:01:17 [DEBUG] clck_gen.py:128 IND CLOCK 14382
2025-03-30 07:01:17 [DEBUG] clck_gen.py:128 IND CLOCK 14484
2025-03-30 07:01:18 [DEBUG] clck_gen.py:128 IND CLOCK 14586
2025-03-30 07:01:18 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:01:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:01:18 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:01:18 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:01:18 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:01:18 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:01:18 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:01:18 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:01:18 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:01:18 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:01:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:01:18 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:01:18 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:01:18 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:01:18 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 07:01:18 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 07:01:18 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:01:18 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:01:18 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:01:18 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:01:18 [DEBUG] clck_gen.py:128 IND CLOCK 14688
2025-03-30 07:01:19 [DEBUG] clck_gen.py:128 IND CLOCK 14790
2025-03-30 07:01:19 [DEBUG] clck_gen.py:128 IND CLOCK 14892
2025-03-30 07:01:20 [DEBUG] clck_gen.py:128 IND CLOCK 14994
2025-03-30 07:01:20 [DEBUG] clck_gen.py:128 IND CLOCK 15096
2025-03-30 07:01:21 [DEBUG] clck_gen.py:128 IND CLOCK 15198
2025-03-30 07:01:21 [DEBUG] clck_gen.py:128 IND CLOCK 15300
2025-03-30 07:01:21 [DEBUG] clck_gen.py:128 IND CLOCK 15402
2025-03-30 07:01:22 [DEBUG] clck_gen.py:128 IND CLOCK 15504
2025-03-30 07:01:22 [DEBUG] clck_gen.py:128 IND CLOCK 15606
2025-03-30 07:01:23 [DEBUG] clck_gen.py:128 IND CLOCK 15708
2025-03-30 07:01:23 [DEBUG] clck_gen.py:128 IND CLOCK 15810
2025-03-30 07:01:24 [DEBUG] clck_gen.py:128 IND CLOCK 15912
2025-03-30 07:01:24 [DEBUG] clck_gen.py:128 IND CLOCK 16014
2025-03-30 07:01:25 [DEBUG] clck_gen.py:128 IND CLOCK 16116
2025-03-30 07:01:25 [DEBUG] clck_gen.py:128 IND CLOCK 16218
2025-03-30 07:01:26 [DEBUG] clck_gen.py:128 IND CLOCK 16320
2025-03-30 07:01:26 [DEBUG] clck_gen.py:128 IND CLOCK 16422
2025-03-30 07:01:27 [DEBUG] clck_gen.py:128 IND CLOCK 16524
2025-03-30 07:01:27 [DEBUG] clck_gen.py:128 IND CLOCK 16626
2025-03-30 07:01:28 [DEBUG] clck_gen.py:128 IND CLOCK 16728
2025-03-30 07:01:28 [DEBUG] clck_gen.py:128 IND CLOCK 16830
2025-03-30 07:01:29 [DEBUG] clck_gen.py:128 IND CLOCK 16932
2025-03-30 07:01:29 [DEBUG] clck_gen.py:128 IND CLOCK 17034
2025-03-30 07:01:29 [DEBUG] clck_gen.py:128 IND CLOCK 17136
2025-03-30 07:01:30 [DEBUG] clck_gen.py:128 IND CLOCK 17238
2025-03-30 07:01:30 [DEBUG] clck_gen.py:128 IND CLOCK 17340
2025-03-30 07:01:31 [DEBUG] clck_gen.py:128 IND CLOCK 17442
2025-03-30 07:01:31 [DEBUG] clck_gen.py:128 IND CLOCK 17544
2025-03-30 07:01:32 [DEBUG] clck_gen.py:128 IND CLOCK 17646
2025-03-30 07:01:32 [DEBUG] clck_gen.py:128 IND CLOCK 17748
2025-03-30 07:01:33 [DEBUG] clck_gen.py:128 IND CLOCK 17850
2025-03-30 07:01:33 [DEBUG] clck_gen.py:128 IND CLOCK 17952
2025-03-30 07:01:34 [DEBUG] clck_gen.py:128 IND CLOCK 18054
2025-03-30 07:01:34 [DEBUG] clck_gen.py:128 IND CLOCK 18156
2025-03-30 07:01:35 [DEBUG] clck_gen.py:128 IND CLOCK 18258
2025-03-30 07:01:35 [DEBUG] clck_gen.py:128 IND CLOCK 18360
2025-03-30 07:01:36 [DEBUG] clck_gen.py:128 IND CLOCK 18462
2025-03-30 07:01:36 [DEBUG] clck_gen.py:128 IND CLOCK 18564
2025-03-30 07:01:37 [DEBUG] clck_gen.py:128 IND CLOCK 18666
2025-03-30 07:01:37 [DEBUG] clck_gen.py:128 IND CLOCK 18768
2025-03-30 07:01:37 [DEBUG] clck_gen.py:128 IND CLOCK 18870
2025-03-30 07:01:38 [DEBUG] clck_gen.py:128 IND CLOCK 18972
2025-03-30 07:01:38 [DEBUG] clck_gen.py:128 IND CLOCK 19074
2025-03-30 07:01:39 [DEBUG] clck_gen.py:128 IND CLOCK 19176
2025-03-30 07:01:39 [DEBUG] clck_gen.py:128 IND CLOCK 19278
2025-03-30 07:01:40 [DEBUG] clck_gen.py:128 IND CLOCK 19380
2025-03-30 07:01:40 [DEBUG] clck_gen.py:128 IND CLOCK 19482
2025-03-30 07:01:41 [DEBUG] clck_gen.py:128 IND CLOCK 19584
2025-03-30 07:01:41 [DEBUG] clck_gen.py:128 IND CLOCK 19686
2025-03-30 07:01:42 [DEBUG] clck_gen.py:128 IND CLOCK 19788
2025-03-30 07:01:42 [DEBUG] clck_gen.py:128 IND CLOCK 19890
2025-03-30 07:01:43 [DEBUG] clck_gen.py:128 IND CLOCK 19992
2025-03-30 07:01:43 [DEBUG] clck_gen.py:128 IND CLOCK 20094
2025-03-30 07:01:44 [DEBUG] clck_gen.py:128 IND CLOCK 20196
2025-03-30 07:01:44 [DEBUG] clck_gen.py:128 IND CLOCK 20298
2025-03-30 07:01:45 [DEBUG] clck_gen.py:128 IND CLOCK 20400
2025-03-30 07:01:45 [DEBUG] clck_gen.py:128 IND CLOCK 20502
2025-03-30 07:01:45 [DEBUG] clck_gen.py:128 IND CLOCK 20604
2025-03-30 07:01:46 [DEBUG] clck_gen.py:128 IND CLOCK 20706
2025-03-30 07:01:46 [DEBUG] clck_gen.py:128 IND CLOCK 20808
2025-03-30 07:01:47 [DEBUG] clck_gen.py:128 IND CLOCK 20910
2025-03-30 07:01:47 [DEBUG] clck_gen.py:128 IND CLOCK 21012
2025-03-30 07:01:48 [DEBUG] clck_gen.py:128 IND CLOCK 21114
2025-03-30 07:01:48 [DEBUG] clck_gen.py:128 IND CLOCK 21216
2025-03-30 07:01:49 [DEBUG] clck_gen.py:128 IND CLOCK 21318
2025-03-30 07:01:49 [DEBUG] clck_gen.py:128 IND CLOCK 21420
2025-03-30 07:01:50 [DEBUG] clck_gen.py:128 IND CLOCK 21522
2025-03-30 07:01:50 [DEBUG] clck_gen.py:128 IND CLOCK 21624
2025-03-30 07:01:51 [DEBUG] clck_gen.py:128 IND CLOCK 21726
2025-03-30 07:01:51 [DEBUG] clck_gen.py:128 IND CLOCK 21828
2025-03-30 07:01:52 [DEBUG] clck_gen.py:128 IND CLOCK 21930
2025-03-30 07:01:52 [DEBUG] clck_gen.py:128 IND CLOCK 22032
2025-03-30 07:01:53 [DEBUG] clck_gen.py:128 IND CLOCK 22134
2025-03-30 07:01:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:01:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:01:53 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:01:53 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:01:53 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:01:53 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:01:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:01:53 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:01:53 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:01:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:01:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:01:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:01:53 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:01:53 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:01:53 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 07:01:53 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 07:01:53 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:01:53 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:01:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:01:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:01:53 [DEBUG] clck_gen.py:128 IND CLOCK 22236
2025-03-30 07:01:53 [DEBUG] clck_gen.py:128 IND CLOCK 22338
2025-03-30 07:01:54 [DEBUG] clck_gen.py:128 IND CLOCK 22440
2025-03-30 07:01:54 [DEBUG] clck_gen.py:128 IND CLOCK 22542
2025-03-30 07:01:55 [DEBUG] clck_gen.py:128 IND CLOCK 22644
2025-03-30 07:01:55 [DEBUG] clck_gen.py:128 IND CLOCK 22746
2025-03-30 07:01:56 [DEBUG] clck_gen.py:128 IND CLOCK 22848
2025-03-30 07:01:56 [DEBUG] clck_gen.py:128 IND CLOCK 22950
2025-03-30 07:01:57 [DEBUG] clck_gen.py:128 IND CLOCK 23052
2025-03-30 07:01:57 [DEBUG] clck_gen.py:128 IND CLOCK 23154
2025-03-30 07:01:58 [DEBUG] clck_gen.py:128 IND CLOCK 23256
2025-03-30 07:01:58 [DEBUG] clck_gen.py:128 IND CLOCK 23358
2025-03-30 07:01:59 [DEBUG] clck_gen.py:128 IND CLOCK 23460
2025-03-30 07:01:59 [DEBUG] clck_gen.py:128 IND CLOCK 23562
2025-03-30 07:02:00 [DEBUG] clck_gen.py:128 IND CLOCK 23664
2025-03-30 07:02:00 [DEBUG] clck_gen.py:128 IND CLOCK 23766
2025-03-30 07:02:01 [DEBUG] clck_gen.py:128 IND CLOCK 23868
2025-03-30 07:02:01 [DEBUG] clck_gen.py:128 IND CLOCK 23970
2025-03-30 07:02:01 [DEBUG] clck_gen.py:128 IND CLOCK 24072
2025-03-30 07:02:02 [DEBUG] clck_gen.py:128 IND CLOCK 24174
2025-03-30 07:02:02 [DEBUG] clck_gen.py:128 IND CLOCK 24276
2025-03-30 07:02:03 [DEBUG] clck_gen.py:128 IND CLOCK 24378
2025-03-30 07:02:03 [DEBUG] clck_gen.py:128 IND CLOCK 24480
2025-03-30 07:02:04 [DEBUG] clck_gen.py:128 IND CLOCK 24582
2025-03-30 07:02:04 [DEBUG] clck_gen.py:128 IND CLOCK 24684
2025-03-30 07:02:05 [DEBUG] clck_gen.py:128 IND CLOCK 24786
2025-03-30 07:02:05 [DEBUG] clck_gen.py:128 IND CLOCK 24888
2025-03-30 07:02:06 [DEBUG] clck_gen.py:128 IND CLOCK 24990
2025-03-30 07:02:06 [DEBUG] clck_gen.py:128 IND CLOCK 25092
2025-03-30 07:02:07 [DEBUG] clck_gen.py:128 IND CLOCK 25194
2025-03-30 07:02:07 [DEBUG] clck_gen.py:128 IND CLOCK 25296
2025-03-30 07:02:08 [DEBUG] clck_gen.py:128 IND CLOCK 25398
2025-03-30 07:02:08 [DEBUG] clck_gen.py:128 IND CLOCK 25500
2025-03-30 07:02:09 [DEBUG] clck_gen.py:128 IND CLOCK 25602
2025-03-30 07:02:09 [DEBUG] clck_gen.py:128 IND CLOCK 25704
2025-03-30 07:02:09 [DEBUG] clck_gen.py:128 IND CLOCK 25806
2025-03-30 07:02:10 [DEBUG] clck_gen.py:128 IND CLOCK 25908
2025-03-30 07:02:10 [DEBUG] clck_gen.py:128 IND CLOCK 26010
2025-03-30 07:02:11 [DEBUG] clck_gen.py:128 IND CLOCK 26112
2025-03-30 07:02:11 [DEBUG] clck_gen.py:128 IND CLOCK 26214
2025-03-30 07:02:12 [DEBUG] clck_gen.py:128 IND CLOCK 26316
2025-03-30 07:02:12 [DEBUG] clck_gen.py:128 IND CLOCK 26418
2025-03-30 07:02:13 [DEBUG] clck_gen.py:128 IND CLOCK 26520
2025-03-30 07:02:13 [DEBUG] clck_gen.py:128 IND CLOCK 26622
2025-03-30 07:02:14 [DEBUG] clck_gen.py:128 IND CLOCK 26724
2025-03-30 07:02:14 [DEBUG] clck_gen.py:128 IND CLOCK 26826
2025-03-30 07:02:15 [DEBUG] clck_gen.py:128 IND CLOCK 26928
2025-03-30 07:02:15 [DEBUG] clck_gen.py:128 IND CLOCK 27030
2025-03-30 07:02:16 [DEBUG] clck_gen.py:128 IND CLOCK 27132
2025-03-30 07:02:16 [DEBUG] clck_gen.py:128 IND CLOCK 27234
2025-03-30 07:02:17 [DEBUG] clck_gen.py:128 IND CLOCK 27336
2025-03-30 07:02:17 [DEBUG] clck_gen.py:128 IND CLOCK 27438
2025-03-30 07:02:18 [DEBUG] clck_gen.py:128 IND CLOCK 27540
2025-03-30 07:02:18 [DEBUG] clck_gen.py:128 IND CLOCK 27642
2025-03-30 07:02:18 [DEBUG] clck_gen.py:128 IND CLOCK 27744
2025-03-30 07:02:19 [DEBUG] clck_gen.py:128 IND CLOCK 27846
2025-03-30 07:02:19 [DEBUG] clck_gen.py:128 IND CLOCK 27948
2025-03-30 07:02:20 [DEBUG] clck_gen.py:128 IND CLOCK 28050
2025-03-30 07:02:20 [DEBUG] clck_gen.py:128 IND CLOCK 28152
2025-03-30 07:02:21 [DEBUG] clck_gen.py:128 IND CLOCK 28254
2025-03-30 07:02:21 [DEBUG] clck_gen.py:128 IND CLOCK 28356
2025-03-30 07:02:22 [DEBUG] clck_gen.py:128 IND CLOCK 28458
2025-03-30 07:02:22 [DEBUG] clck_gen.py:128 IND CLOCK 28560
2025-03-30 07:02:23 [DEBUG] clck_gen.py:128 IND CLOCK 28662
2025-03-30 07:02:23 [DEBUG] clck_gen.py:128 IND CLOCK 28764
2025-03-30 07:02:24 [DEBUG] clck_gen.py:128 IND CLOCK 28866
2025-03-30 07:02:24 [DEBUG] clck_gen.py:128 IND CLOCK 28968
2025-03-30 07:02:25 [DEBUG] clck_gen.py:128 IND CLOCK 29070
2025-03-30 07:02:25 [DEBUG] clck_gen.py:128 IND CLOCK 29172
2025-03-30 07:02:26 [DEBUG] clck_gen.py:128 IND CLOCK 29274
2025-03-30 07:02:26 [DEBUG] clck_gen.py:128 IND CLOCK 29376
2025-03-30 07:02:26 [DEBUG] clck_gen.py:128 IND CLOCK 29478
2025-03-30 07:02:27 [DEBUG] clck_gen.py:128 IND CLOCK 29580
2025-03-30 07:02:27 [DEBUG] clck_gen.py:128 IND CLOCK 29682
2025-03-30 07:02:28 [DEBUG] clck_gen.py:128 IND CLOCK 29784
2025-03-30 07:02:28 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:02:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:02:28 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:02:28 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:02:28 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:02:28 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:02:28 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:02:28 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:02:28 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:02:28 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:02:28 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:02:28 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:02:28 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 07:02:28 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 07:02:28 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 07:02:33 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 07:02:33 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 07:02:33 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:02:33 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:02:33 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:02:33 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:02:33 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:02:33 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 07:02:33 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:02:33 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 07:02:33 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 07:02:33 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 07:02:33 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 07:02:33 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 07:02:33 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:02:33 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:02:33 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 07:02:33 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 07:02:33 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 07:02:33 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 07:02:33 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 07:02:33 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 07:02:33 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:02:33 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:02:33 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 07:02:33 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 07:02:33 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 07:02:33 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 07:02:33 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 07:02:33 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 07:02:33 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:02:33 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:02:33 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 07:02:33 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 07:02:33 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 07:02:33 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 07:02:33 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 07:02:33 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 07:02:33 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 07:02:33 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 07:02:33 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 07:02:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 07:02:33 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 07:02:33 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 07:02:33 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 07:02:33 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:02:33 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:02:33 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 07:02:33 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 07:02:33 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 07:02:33 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 07:02:33 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:02:33 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:02:33 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:02:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 07:02:33 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:02:33 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:02:33 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:02:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:02:33 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:02:33 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:02:33 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:02:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:02:33 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:02:33 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:02:33 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:02:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:02:33 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:02:33 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:02:33 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:02:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:02:33 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:02:33 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:02:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:02:33 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:02:33 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:02:33 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:02:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:02:33 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:02:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:02:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:02:33 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:02:33 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:02:33 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:02:33 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:02:33 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:02:33 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 07:02:33 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 07:02:33 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 07:02:38 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 07:02:38 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 07:02:38 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:02:38 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:02:38 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:02:38 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:02:38 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:02:38 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 07:02:38 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:02:38 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 07:02:38 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 07:02:38 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 07:02:38 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 07:02:38 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 07:02:38 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:02:38 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:02:38 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 07:02:38 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 07:02:38 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 07:02:38 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 07:02:38 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 07:02:38 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 07:02:38 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:02:38 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:02:38 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 07:02:38 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 07:02:38 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 07:02:38 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 07:02:38 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 07:02:38 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 07:02:38 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:02:38 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 07:02:38 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:02:38 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 07:02:38 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 07:02:38 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 07:02:38 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 07:02:38 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 07:02:38 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 07:02:38 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 07:02:38 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 07:02:38 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 07:02:38 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 07:02:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 07:02:38 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:02:38 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:02:38 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 07:02:38 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:02:38 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:02:38 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:02:38 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 07:02:38 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 07:02:38 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 07:02:38 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 07:02:38 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:02:38 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:02:38 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:02:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 07:02:38 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:02:38 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:02:38 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:02:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:02:38 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:02:38 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:02:38 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:02:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:02:38 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:02:38 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:02:38 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:02:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:02:38 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:02:38 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:02:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:02:38 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:02:38 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:02:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:02:38 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:02:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:02:38 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:02:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:02:38 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:02:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:02:38 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-03-30 07:02:39 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-03-30 07:02:39 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-03-30 07:02:39 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-03-30 07:02:39 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-03-30 07:02:39 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-03-30 07:02:39 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-03-30 07:02:39 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-03-30 07:02:39 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-03-30 07:02:39 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-03-30 07:02:39 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=105 tn=0 bl=148 pwr=0
2025-03-30 07:02:39 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=105 tn=1 bl=148 pwr=0
2025-03-30 07:02:39 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=105 tn=2 bl=148 pwr=0
2025-03-30 07:02:39 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=105 tn=3 bl=148 pwr=0
2025-03-30 07:02:39 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=105 tn=4 bl=148 pwr=0
2025-03-30 07:02:39 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=105 tn=5 bl=148 pwr=0
2025-03-30 07:02:39 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=105 tn=6 bl=148 pwr=0
2025-03-30 07:02:39 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=105 tn=7 bl=148 pwr=0
2025-03-30 07:02:39 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=106 tn=0 bl=148 pwr=0
2025-03-30 07:02:39 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=106 tn=1 bl=148 pwr=0
2025-03-30 07:02:39 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=106 tn=2 bl=148 pwr=0
2025-03-30 07:02:39 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=106 tn=3 bl=148 pwr=0
2025-03-30 07:02:39 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=106 tn=4 bl=148 pwr=0
2025-03-30 07:02:39 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=106 tn=5 bl=148 pwr=0
2025-03-30 07:02:39 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=106 tn=6 bl=148 pwr=0
2025-03-30 07:02:39 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=106 tn=7 bl=148 pwr=0
2025-03-30 07:02:39 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=107 tn=0 bl=148 pwr=0
2025-03-30 07:02:39 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=107 tn=1 bl=148 pwr=0
2025-03-30 07:02:39 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=107 tn=2 bl=148 pwr=0
2025-03-30 07:02:39 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=107 tn=3 bl=148 pwr=0
2025-03-30 07:02:39 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=107 tn=4 bl=148 pwr=0
2025-03-30 07:02:39 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=107 tn=5 bl=148 pwr=0
2025-03-30 07:02:39 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=107 tn=6 bl=148 pwr=0
2025-03-30 07:02:39 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=107 tn=7 bl=148 pwr=0
2025-03-30 07:02:39 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 07:02:39 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 07:02:39 [DEBUG] fake_trx.py:317 (BTS@172.18.26.20:5700) Recv FAKE_CI cmd
2025-03-30 07:02:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:02:39 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:02:39 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:02:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:02:39 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:02:39 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:02:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:02:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:02:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:02:39 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:02:39 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:02:39 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 07:02:39 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 07:02:39 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:02:39 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:02:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:02:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:02:39 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-03-30 07:02:39 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:02:39 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:02:39 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:02:39 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:02:40 [DEBUG] clck_gen.py:128 IND CLOCK 306
2025-03-30 07:02:40 [DEBUG] clck_gen.py:128 IND CLOCK 408
2025-03-30 07:02:40 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:02:40 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:02:40 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:02:40 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:02:41 [DEBUG] clck_gen.py:128 IND CLOCK 510
2025-03-30 07:02:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:02:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:02:41 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:02:41 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:02:41 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:02:41 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:02:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:02:41 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:02:41 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:02:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:02:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:02:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:02:41 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:02:41 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:02:41 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 07:02:41 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 07:02:41 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:02:41 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:02:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:02:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:02:41 [DEBUG] clck_gen.py:128 IND CLOCK 612
2025-03-30 07:02:41 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:02:41 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:02:41 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:02:41 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:02:42 [DEBUG] clck_gen.py:128 IND CLOCK 714
2025-03-30 07:02:42 [DEBUG] clck_gen.py:128 IND CLOCK 816
2025-03-30 07:02:42 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:02:42 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:02:42 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:02:42 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:02:43 [DEBUG] clck_gen.py:128 IND CLOCK 918
2025-03-30 07:02:43 [DEBUG] clck_gen.py:128 IND CLOCK 1020
2025-03-30 07:02:43 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:02:43 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:02:43 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:02:43 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:02:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:02:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:02:43 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:02:43 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:02:43 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:02:43 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:02:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:02:43 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:02:43 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:02:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:02:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:02:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:02:43 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:02:43 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:02:43 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 07:02:43 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 07:02:43 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:02:43 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:02:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:02:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:02:43 [DEBUG] clck_gen.py:128 IND CLOCK 1122
2025-03-30 07:02:44 [DEBUG] clck_gen.py:128 IND CLOCK 1224
2025-03-30 07:02:44 [DEBUG] clck_gen.py:128 IND CLOCK 1326
2025-03-30 07:02:45 [DEBUG] clck_gen.py:128 IND CLOCK 1428
2025-03-30 07:02:45 [DEBUG] clck_gen.py:128 IND CLOCK 1530
2025-03-30 07:02:46 [DEBUG] clck_gen.py:128 IND CLOCK 1632
2025-03-30 07:02:46 [DEBUG] clck_gen.py:128 IND CLOCK 1734
2025-03-30 07:02:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:02:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:02:47 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:02:47 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:02:47 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:02:47 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:02:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:02:47 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:02:47 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:02:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:02:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:02:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:02:47 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:02:47 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:02:47 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 07:02:47 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 07:02:47 [DEBUG] clck_gen.py:128 IND CLOCK 1836
2025-03-30 07:02:47 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:02:47 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:02:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:02:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:02:47 [DEBUG] clck_gen.py:128 IND CLOCK 1938
2025-03-30 07:02:48 [DEBUG] clck_gen.py:128 IND CLOCK 2040
2025-03-30 07:02:48 [DEBUG] clck_gen.py:128 IND CLOCK 2142
2025-03-30 07:02:49 [DEBUG] clck_gen.py:128 IND CLOCK 2244
2025-03-30 07:02:49 [DEBUG] clck_gen.py:128 IND CLOCK 2346
2025-03-30 07:02:50 [DEBUG] clck_gen.py:128 IND CLOCK 2448
2025-03-30 07:02:50 [DEBUG] clck_gen.py:128 IND CLOCK 2550
2025-03-30 07:02:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:02:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:02:50 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:02:50 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:02:50 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:02:50 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:02:50 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:02:50 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:02:50 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:02:50 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:02:50 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:02:50 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:02:50 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 07:02:50 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 07:02:50 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 07:02:55 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 07:02:55 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 07:02:55 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:02:55 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:02:55 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:02:55 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:02:55 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:02:55 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 07:02:55 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:02:55 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 07:02:55 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 07:02:55 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 07:02:55 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 07:02:55 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 07:02:55 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:02:55 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:02:55 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 07:02:55 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 07:02:55 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 07:02:55 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 07:02:55 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 07:02:55 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 07:02:55 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:02:55 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:02:55 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 07:02:55 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 07:02:55 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 07:02:55 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 07:02:55 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 07:02:55 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 07:02:55 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:02:55 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:02:55 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 07:02:55 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 07:02:55 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 07:02:55 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 07:02:55 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 07:02:55 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 07:02:55 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 07:02:55 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 07:02:55 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 07:02:55 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 07:02:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 07:02:55 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:02:55 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 07:02:55 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 07:02:55 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:02:55 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:02:55 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 07:02:55 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 07:02:55 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 07:02:55 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:02:55 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 07:02:55 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:02:55 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:02:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 07:02:55 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:02:55 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:02:55 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:02:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:02:55 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:02:55 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:02:55 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:02:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:02:55 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:02:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:02:55 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:02:55 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:02:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:02:55 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:02:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:02:55 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:02:55 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:02:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:02:55 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:02:55 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:02:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:02:55 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:02:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:02:55 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:02:55 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:02:55 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:02:55 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-03-30 07:02:56 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-03-30 07:02:56 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-03-30 07:02:56 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-03-30 07:02:56 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-03-30 07:02:56 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-03-30 07:02:56 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-03-30 07:02:56 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-03-30 07:02:56 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-03-30 07:02:56 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-03-30 07:02:56 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 07:02:56 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 07:02:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:02:56 [DEBUG] fake_trx.py:317 (BTS@172.18.26.20:5700) Recv FAKE_CI cmd
2025-03-30 07:02:56 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:02:56 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:02:56 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:02:56 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:02:56 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:02:56 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:02:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:02:56 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:02:56 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:02:56 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:02:56 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 07:02:56 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 07:02:56 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:02:56 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:02:56 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:02:56 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:02:56 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-03-30 07:02:56 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:02:56 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:02:56 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:02:56 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:02:57 [DEBUG] clck_gen.py:128 IND CLOCK 306
2025-03-30 07:02:57 [DEBUG] clck_gen.py:128 IND CLOCK 408
2025-03-30 07:02:57 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:02:57 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:02:57 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:02:57 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:02:58 [DEBUG] clck_gen.py:128 IND CLOCK 510
2025-03-30 07:02:58 [DEBUG] clck_gen.py:128 IND CLOCK 612
2025-03-30 07:02:58 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:02:58 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:02:58 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:02:58 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:02:58 [DEBUG] clck_gen.py:128 IND CLOCK 714
2025-03-30 07:02:59 [DEBUG] clck_gen.py:128 IND CLOCK 816
2025-03-30 07:02:59 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:02:59 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:02:59 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:02:59 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:02:59 [DEBUG] clck_gen.py:128 IND CLOCK 918
2025-03-30 07:03:00 [DEBUG] clck_gen.py:128 IND CLOCK 1020
2025-03-30 07:03:00 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:03:00 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:03:00 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:03:00 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:03:00 [DEBUG] clck_gen.py:128 IND CLOCK 1122
2025-03-30 07:03:01 [DEBUG] clck_gen.py:128 IND CLOCK 1224
2025-03-30 07:03:01 [DEBUG] clck_gen.py:128 IND CLOCK 1326
2025-03-30 07:03:02 [DEBUG] clck_gen.py:128 IND CLOCK 1428
2025-03-30 07:03:02 [DEBUG] clck_gen.py:128 IND CLOCK 1530
2025-03-30 07:03:03 [DEBUG] clck_gen.py:128 IND CLOCK 1632
2025-03-30 07:03:03 [DEBUG] clck_gen.py:128 IND CLOCK 1734
2025-03-30 07:03:04 [DEBUG] clck_gen.py:128 IND CLOCK 1836
2025-03-30 07:03:04 [DEBUG] clck_gen.py:128 IND CLOCK 1938
2025-03-30 07:03:05 [DEBUG] clck_gen.py:128 IND CLOCK 2040
2025-03-30 07:03:05 [DEBUG] clck_gen.py:128 IND CLOCK 2142
2025-03-30 07:03:06 [DEBUG] clck_gen.py:128 IND CLOCK 2244
2025-03-30 07:03:06 [DEBUG] clck_gen.py:128 IND CLOCK 2346
2025-03-30 07:03:06 [DEBUG] clck_gen.py:128 IND CLOCK 2448
2025-03-30 07:03:07 [DEBUG] clck_gen.py:128 IND CLOCK 2550
2025-03-30 07:03:07 [DEBUG] clck_gen.py:128 IND CLOCK 2652
2025-03-30 07:03:08 [DEBUG] clck_gen.py:128 IND CLOCK 2754
2025-03-30 07:03:08 [DEBUG] clck_gen.py:128 IND CLOCK 2856
2025-03-30 07:03:09 [DEBUG] clck_gen.py:128 IND CLOCK 2958
2025-03-30 07:03:09 [DEBUG] clck_gen.py:128 IND CLOCK 3060
2025-03-30 07:03:10 [DEBUG] clck_gen.py:128 IND CLOCK 3162
2025-03-30 07:03:10 [DEBUG] clck_gen.py:128 IND CLOCK 3264
2025-03-30 07:03:11 [DEBUG] clck_gen.py:128 IND CLOCK 3366
2025-03-30 07:03:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:03:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:03:11 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:03:11 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:03:11 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:03:11 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:03:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:03:11 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:03:11 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:03:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:03:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:03:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:03:11 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:03:11 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:03:11 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 07:03:11 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 07:03:11 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:03:11 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:03:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:03:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:03:11 [DEBUG] clck_gen.py:128 IND CLOCK 3468
2025-03-30 07:03:12 [DEBUG] clck_gen.py:128 IND CLOCK 3570
2025-03-30 07:03:12 [DEBUG] clck_gen.py:128 IND CLOCK 3672
2025-03-30 07:03:13 [DEBUG] clck_gen.py:128 IND CLOCK 3774
2025-03-30 07:03:13 [DEBUG] clck_gen.py:128 IND CLOCK 3876
2025-03-30 07:03:14 [DEBUG] clck_gen.py:128 IND CLOCK 3978
2025-03-30 07:03:14 [DEBUG] clck_gen.py:128 IND CLOCK 4080
2025-03-30 07:03:14 [DEBUG] clck_gen.py:128 IND CLOCK 4182
2025-03-30 07:03:15 [DEBUG] clck_gen.py:128 IND CLOCK 4284
2025-03-30 07:03:15 [DEBUG] clck_gen.py:128 IND CLOCK 4386
2025-03-30 07:03:16 [DEBUG] clck_gen.py:128 IND CLOCK 4488
2025-03-30 07:03:16 [DEBUG] clck_gen.py:128 IND CLOCK 4590
2025-03-30 07:03:17 [DEBUG] clck_gen.py:128 IND CLOCK 4692
2025-03-30 07:03:17 [DEBUG] clck_gen.py:128 IND CLOCK 4794
2025-03-30 07:03:18 [DEBUG] clck_gen.py:128 IND CLOCK 4896
2025-03-30 07:03:18 [DEBUG] clck_gen.py:128 IND CLOCK 4998
2025-03-30 07:03:19 [DEBUG] clck_gen.py:128 IND CLOCK 5100
2025-03-30 07:03:19 [DEBUG] clck_gen.py:128 IND CLOCK 5202
2025-03-30 07:03:20 [DEBUG] clck_gen.py:128 IND CLOCK 5304
2025-03-30 07:03:20 [DEBUG] clck_gen.py:128 IND CLOCK 5406
2025-03-30 07:03:21 [DEBUG] clck_gen.py:128 IND CLOCK 5508
2025-03-30 07:03:21 [DEBUG] clck_gen.py:128 IND CLOCK 5610
2025-03-30 07:03:22 [DEBUG] clck_gen.py:128 IND CLOCK 5712
2025-03-30 07:03:22 [DEBUG] clck_gen.py:128 IND CLOCK 5814
2025-03-30 07:03:22 [DEBUG] clck_gen.py:128 IND CLOCK 5916
2025-03-30 07:03:23 [DEBUG] clck_gen.py:128 IND CLOCK 6018
2025-03-30 07:03:23 [DEBUG] clck_gen.py:128 IND CLOCK 6120
2025-03-30 07:03:24 [DEBUG] clck_gen.py:128 IND CLOCK 6222
2025-03-30 07:03:24 [DEBUG] clck_gen.py:128 IND CLOCK 6324
2025-03-30 07:03:25 [DEBUG] clck_gen.py:128 IND CLOCK 6426
2025-03-30 07:03:25 [DEBUG] clck_gen.py:128 IND CLOCK 6528
2025-03-30 07:03:26 [DEBUG] clck_gen.py:128 IND CLOCK 6630
2025-03-30 07:03:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:03:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:03:26 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:03:26 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:03:26 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:03:26 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:03:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:03:26 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:03:26 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:03:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:03:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:03:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:03:26 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:03:26 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:03:26 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 07:03:26 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 07:03:26 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:03:26 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:03:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:03:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:03:26 [DEBUG] clck_gen.py:128 IND CLOCK 6732
2025-03-30 07:03:27 [DEBUG] clck_gen.py:128 IND CLOCK 6834
2025-03-30 07:03:27 [DEBUG] clck_gen.py:128 IND CLOCK 6936
2025-03-30 07:03:28 [DEBUG] clck_gen.py:128 IND CLOCK 7038
2025-03-30 07:03:28 [DEBUG] clck_gen.py:128 IND CLOCK 7140
2025-03-30 07:03:29 [DEBUG] clck_gen.py:128 IND CLOCK 7242
2025-03-30 07:03:29 [DEBUG] clck_gen.py:128 IND CLOCK 7344
2025-03-30 07:03:30 [DEBUG] clck_gen.py:128 IND CLOCK 7446
2025-03-30 07:03:30 [DEBUG] clck_gen.py:128 IND CLOCK 7548
2025-03-30 07:03:31 [DEBUG] clck_gen.py:128 IND CLOCK 7650
2025-03-30 07:03:31 [DEBUG] clck_gen.py:128 IND CLOCK 7752
2025-03-30 07:03:31 [DEBUG] clck_gen.py:128 IND CLOCK 7854
2025-03-30 07:03:32 [DEBUG] clck_gen.py:128 IND CLOCK 7956
2025-03-30 07:03:32 [DEBUG] clck_gen.py:128 IND CLOCK 8058
2025-03-30 07:03:33 [DEBUG] clck_gen.py:128 IND CLOCK 8160
2025-03-30 07:03:33 [DEBUG] clck_gen.py:128 IND CLOCK 8262
2025-03-30 07:03:34 [DEBUG] clck_gen.py:128 IND CLOCK 8364
2025-03-30 07:03:34 [DEBUG] clck_gen.py:128 IND CLOCK 8466
2025-03-30 07:03:35 [DEBUG] clck_gen.py:128 IND CLOCK 8568
2025-03-30 07:03:35 [DEBUG] clck_gen.py:128 IND CLOCK 8670
2025-03-30 07:03:36 [DEBUG] clck_gen.py:128 IND CLOCK 8772
2025-03-30 07:03:36 [DEBUG] clck_gen.py:128 IND CLOCK 8874
2025-03-30 07:03:37 [DEBUG] clck_gen.py:128 IND CLOCK 8976
2025-03-30 07:03:37 [DEBUG] clck_gen.py:128 IND CLOCK 9078
2025-03-30 07:03:38 [DEBUG] clck_gen.py:128 IND CLOCK 9180
2025-03-30 07:03:38 [DEBUG] clck_gen.py:128 IND CLOCK 9282
2025-03-30 07:03:39 [DEBUG] clck_gen.py:128 IND CLOCK 9384
2025-03-30 07:03:39 [DEBUG] clck_gen.py:128 IND CLOCK 9486
2025-03-30 07:03:39 [DEBUG] clck_gen.py:128 IND CLOCK 9588
2025-03-30 07:03:40 [DEBUG] clck_gen.py:128 IND CLOCK 9690
2025-03-30 07:03:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:03:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:03:40 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:03:40 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:03:40 [DEBUG] clck_gen.py:128 IND CLOCK 9792
2025-03-30 07:03:40 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:03:40 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:03:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:03:40 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:03:40 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:03:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:03:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:03:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:03:40 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:03:40 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:03:40 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 07:03:40 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 07:03:40 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:03:40 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:03:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:03:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:03:41 [DEBUG] clck_gen.py:128 IND CLOCK 9894
2025-03-30 07:03:41 [DEBUG] clck_gen.py:128 IND CLOCK 9996
2025-03-30 07:03:42 [DEBUG] clck_gen.py:128 IND CLOCK 10098
2025-03-30 07:03:42 [DEBUG] clck_gen.py:128 IND CLOCK 10200
2025-03-30 07:03:43 [DEBUG] clck_gen.py:128 IND CLOCK 10302
2025-03-30 07:03:43 [DEBUG] clck_gen.py:128 IND CLOCK 10404
2025-03-30 07:03:44 [DEBUG] clck_gen.py:128 IND CLOCK 10506
2025-03-30 07:03:44 [DEBUG] clck_gen.py:128 IND CLOCK 10608
2025-03-30 07:03:45 [DEBUG] clck_gen.py:128 IND CLOCK 10710
2025-03-30 07:03:45 [DEBUG] clck_gen.py:128 IND CLOCK 10812
2025-03-30 07:03:46 [DEBUG] clck_gen.py:128 IND CLOCK 10914
2025-03-30 07:03:46 [DEBUG] clck_gen.py:128 IND CLOCK 11016
2025-03-30 07:03:47 [DEBUG] clck_gen.py:128 IND CLOCK 11118
2025-03-30 07:03:47 [DEBUG] clck_gen.py:128 IND CLOCK 11220
2025-03-30 07:03:47 [DEBUG] clck_gen.py:128 IND CLOCK 11322
2025-03-30 07:03:48 [DEBUG] clck_gen.py:128 IND CLOCK 11424
2025-03-30 07:03:48 [DEBUG] clck_gen.py:128 IND CLOCK 11526
2025-03-30 07:03:49 [DEBUG] clck_gen.py:128 IND CLOCK 11628
2025-03-30 07:03:49 [DEBUG] clck_gen.py:128 IND CLOCK 11730
2025-03-30 07:03:50 [DEBUG] clck_gen.py:128 IND CLOCK 11832
2025-03-30 07:03:50 [DEBUG] clck_gen.py:128 IND CLOCK 11934
2025-03-30 07:03:51 [DEBUG] clck_gen.py:128 IND CLOCK 12036
2025-03-30 07:03:51 [DEBUG] clck_gen.py:128 IND CLOCK 12138
2025-03-30 07:03:52 [DEBUG] clck_gen.py:128 IND CLOCK 12240
2025-03-30 07:03:52 [DEBUG] clck_gen.py:128 IND CLOCK 12342
2025-03-30 07:03:53 [DEBUG] clck_gen.py:128 IND CLOCK 12444
2025-03-30 07:03:53 [DEBUG] clck_gen.py:128 IND CLOCK 12546
2025-03-30 07:03:54 [DEBUG] clck_gen.py:128 IND CLOCK 12648
2025-03-30 07:03:54 [DEBUG] clck_gen.py:128 IND CLOCK 12750
2025-03-30 07:03:55 [DEBUG] clck_gen.py:128 IND CLOCK 12852
2025-03-30 07:03:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:03:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:03:55 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:03:55 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:03:55 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:03:55 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:03:55 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:03:55 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:03:55 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:03:55 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:03:55 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:03:55 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:03:55 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 07:03:55 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 07:03:55 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 07:03:55 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=12946 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:03:55 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=12946 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:03:55 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=12946 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:03:55 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=12946 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:03:55 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=12946 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:03:55 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=12946 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:03:55 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=12947 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:03:55 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=12947 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:03:55 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=12947 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:03:55 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=12947 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:03:55 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=12947 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:03:55 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=12947 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:03:55 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=12947 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:03:55 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=12947 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:04:00 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 07:04:00 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 07:04:00 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:04:00 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:04:00 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:04:00 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:04:00 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:04:00 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 07:04:00 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:04:00 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 07:04:00 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 07:04:00 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 07:04:00 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 07:04:00 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 07:04:00 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:04:00 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:04:00 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 07:04:00 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 07:04:00 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 07:04:00 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 07:04:00 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 07:04:00 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 07:04:00 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:04:00 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 07:04:00 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:04:00 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 07:04:00 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 07:04:00 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 07:04:00 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 07:04:00 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 07:04:00 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:04:00 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 07:04:00 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:04:00 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 07:04:00 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 07:04:00 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 07:04:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 07:04:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 07:04:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 07:04:00 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 07:04:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 07:04:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 07:04:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 07:04:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:04:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 07:04:00 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 07:04:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:04:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:04:00 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 07:04:00 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 07:04:00 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 07:04:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:04:00 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 07:04:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:04:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:04:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 07:04:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:04:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:04:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:04:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:04:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:04:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:04:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:04:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:04:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:04:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:04:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:04:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:04:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:04:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:04:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:04:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:04:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:04:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:04:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:04:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:04:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:04:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:04:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:04:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:04:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:04:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:04:00 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-03-30 07:04:00 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-03-30 07:04:00 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-03-30 07:04:00 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-03-30 07:04:00 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-03-30 07:04:00 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-03-30 07:04:00 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-03-30 07:04:00 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-03-30 07:04:00 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-03-30 07:04:00 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-03-30 07:04:00 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 07:04:00 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 07:04:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:04:00 [DEBUG] fake_trx.py:317 (BTS@172.18.26.20:5700) Recv FAKE_CI cmd
2025-03-30 07:04:00 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:04:00 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:04:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:04:00 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:04:00 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:04:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:04:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:04:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:04:01 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:04:01 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:04:01 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 07:04:01 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 07:04:01 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:04:01 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:04:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:04:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:04:01 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-03-30 07:04:01 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:04:01 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:04:01 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:04:01 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:04:01 [DEBUG] clck_gen.py:128 IND CLOCK 306
2025-03-30 07:04:02 [DEBUG] clck_gen.py:128 IND CLOCK 408
2025-03-30 07:04:02 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:04:02 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:04:02 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:04:02 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:04:02 [DEBUG] clck_gen.py:128 IND CLOCK 510
2025-03-30 07:04:03 [DEBUG] clck_gen.py:128 IND CLOCK 612
2025-03-30 07:04:03 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:04:03 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:04:03 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:04:03 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:04:03 [DEBUG] clck_gen.py:128 IND CLOCK 714
2025-03-30 07:04:04 [DEBUG] clck_gen.py:128 IND CLOCK 816
2025-03-30 07:04:04 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:04:04 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:04:04 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:04:04 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:04:04 [DEBUG] clck_gen.py:128 IND CLOCK 918
2025-03-30 07:04:05 [DEBUG] clck_gen.py:128 IND CLOCK 1020
2025-03-30 07:04:05 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:04:05 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:04:05 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:04:05 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:04:05 [DEBUG] clck_gen.py:128 IND CLOCK 1122
2025-03-30 07:04:06 [DEBUG] clck_gen.py:128 IND CLOCK 1224
2025-03-30 07:04:06 [DEBUG] clck_gen.py:128 IND CLOCK 1326
2025-03-30 07:04:07 [DEBUG] clck_gen.py:128 IND CLOCK 1428
2025-03-30 07:04:07 [DEBUG] clck_gen.py:128 IND CLOCK 1530
2025-03-30 07:04:07 [DEBUG] clck_gen.py:128 IND CLOCK 1632
2025-03-30 07:04:08 [DEBUG] clck_gen.py:128 IND CLOCK 1734
2025-03-30 07:04:08 [DEBUG] clck_gen.py:128 IND CLOCK 1836
2025-03-30 07:04:09 [DEBUG] clck_gen.py:128 IND CLOCK 1938
2025-03-30 07:04:09 [DEBUG] clck_gen.py:128 IND CLOCK 2040
2025-03-30 07:04:10 [DEBUG] clck_gen.py:128 IND CLOCK 2142
2025-03-30 07:04:10 [DEBUG] clck_gen.py:128 IND CLOCK 2244
2025-03-30 07:04:11 [DEBUG] clck_gen.py:128 IND CLOCK 2346
2025-03-30 07:04:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:04:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:04:11 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:04:11 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:04:11 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:04:11 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:04:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:04:11 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:04:11 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:04:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:04:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:04:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:04:11 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:04:11 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:04:11 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 07:04:11 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 07:04:11 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:04:11 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:04:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:04:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:04:11 [DEBUG] clck_gen.py:128 IND CLOCK 2448
2025-03-30 07:04:12 [DEBUG] clck_gen.py:128 IND CLOCK 2550
2025-03-30 07:04:12 [DEBUG] clck_gen.py:128 IND CLOCK 2652
2025-03-30 07:04:13 [DEBUG] clck_gen.py:128 IND CLOCK 2754
2025-03-30 07:04:13 [DEBUG] clck_gen.py:128 IND CLOCK 2856
2025-03-30 07:04:14 [DEBUG] clck_gen.py:128 IND CLOCK 2958
2025-03-30 07:04:14 [DEBUG] clck_gen.py:128 IND CLOCK 3060
2025-03-30 07:04:15 [DEBUG] clck_gen.py:128 IND CLOCK 3162
2025-03-30 07:04:15 [DEBUG] clck_gen.py:128 IND CLOCK 3264
2025-03-30 07:04:15 [DEBUG] clck_gen.py:128 IND CLOCK 3366
2025-03-30 07:04:16 [DEBUG] clck_gen.py:128 IND CLOCK 3468
2025-03-30 07:04:16 [DEBUG] clck_gen.py:128 IND CLOCK 3570
2025-03-30 07:04:17 [DEBUG] clck_gen.py:128 IND CLOCK 3672
2025-03-30 07:04:17 [DEBUG] clck_gen.py:128 IND CLOCK 3774
2025-03-30 07:04:18 [DEBUG] clck_gen.py:128 IND CLOCK 3876
2025-03-30 07:04:18 [DEBUG] clck_gen.py:128 IND CLOCK 3978
2025-03-30 07:04:19 [DEBUG] clck_gen.py:128 IND CLOCK 4080
2025-03-30 07:04:19 [DEBUG] clck_gen.py:128 IND CLOCK 4182
2025-03-30 07:04:20 [DEBUG] clck_gen.py:128 IND CLOCK 4284
2025-03-30 07:04:20 [DEBUG] clck_gen.py:128 IND CLOCK 4386
2025-03-30 07:04:21 [DEBUG] clck_gen.py:128 IND CLOCK 4488
2025-03-30 07:04:21 [DEBUG] clck_gen.py:128 IND CLOCK 4590
2025-03-30 07:04:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:04:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:04:21 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:04:21 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:04:21 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:04:21 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:04:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:04:21 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:04:21 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:04:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:04:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:04:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:04:21 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:04:21 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:04:21 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 07:04:21 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 07:04:21 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:04:21 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:04:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:04:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:04:22 [DEBUG] clck_gen.py:128 IND CLOCK 4692
2025-03-30 07:04:22 [DEBUG] clck_gen.py:128 IND CLOCK 4794
2025-03-30 07:04:23 [DEBUG] clck_gen.py:128 IND CLOCK 4896
2025-03-30 07:04:23 [DEBUG] clck_gen.py:128 IND CLOCK 4998
2025-03-30 07:04:23 [DEBUG] clck_gen.py:128 IND CLOCK 5100
2025-03-30 07:04:24 [DEBUG] clck_gen.py:128 IND CLOCK 5202
2025-03-30 07:04:24 [DEBUG] clck_gen.py:128 IND CLOCK 5304
2025-03-30 07:04:25 [DEBUG] clck_gen.py:128 IND CLOCK 5406
2025-03-30 07:04:25 [DEBUG] clck_gen.py:128 IND CLOCK 5508
2025-03-30 07:04:26 [DEBUG] clck_gen.py:128 IND CLOCK 5610
2025-03-30 07:04:26 [DEBUG] clck_gen.py:128 IND CLOCK 5712
2025-03-30 07:04:27 [DEBUG] clck_gen.py:128 IND CLOCK 5814
2025-03-30 07:04:27 [DEBUG] clck_gen.py:128 IND CLOCK 5916
2025-03-30 07:04:28 [DEBUG] clck_gen.py:128 IND CLOCK 6018
2025-03-30 07:04:28 [DEBUG] clck_gen.py:128 IND CLOCK 6120
2025-03-30 07:04:28 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:04:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:04:28 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:04:28 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:04:28 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:04:28 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:04:28 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:04:28 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:04:28 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:04:28 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:04:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:04:28 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:04:28 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:04:28 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:04:28 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 07:04:28 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 07:04:28 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:04:28 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:04:28 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:04:28 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:04:29 [DEBUG] clck_gen.py:128 IND CLOCK 6222
2025-03-30 07:04:29 [DEBUG] clck_gen.py:128 IND CLOCK 6324
2025-03-30 07:04:30 [DEBUG] clck_gen.py:128 IND CLOCK 6426
2025-03-30 07:04:30 [DEBUG] clck_gen.py:128 IND CLOCK 6528
2025-03-30 07:04:31 [DEBUG] clck_gen.py:128 IND CLOCK 6630
2025-03-30 07:04:31 [DEBUG] clck_gen.py:128 IND CLOCK 6732
2025-03-30 07:04:31 [DEBUG] clck_gen.py:128 IND CLOCK 6834
2025-03-30 07:04:32 [DEBUG] clck_gen.py:128 IND CLOCK 6936
2025-03-30 07:04:32 [DEBUG] clck_gen.py:128 IND CLOCK 7038
2025-03-30 07:04:33 [DEBUG] clck_gen.py:128 IND CLOCK 7140
2025-03-30 07:04:33 [DEBUG] clck_gen.py:128 IND CLOCK 7242
2025-03-30 07:04:34 [DEBUG] clck_gen.py:128 IND CLOCK 7344
2025-03-30 07:04:34 [DEBUG] clck_gen.py:128 IND CLOCK 7446
2025-03-30 07:04:35 [DEBUG] clck_gen.py:128 IND CLOCK 7548
2025-03-30 07:04:35 [DEBUG] clck_gen.py:128 IND CLOCK 7650
2025-03-30 07:04:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:04:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:04:35 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:04:35 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:04:35 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:04:35 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:04:35 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:04:35 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:04:35 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:04:35 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:04:35 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:04:35 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:04:35 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 07:04:35 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 07:04:35 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 07:04:40 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 07:04:40 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 07:04:40 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:04:40 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:04:40 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:04:40 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:04:40 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:04:40 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 07:04:40 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:04:40 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 07:04:40 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 07:04:40 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 07:04:40 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 07:04:40 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 07:04:40 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:04:40 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:04:40 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 07:04:40 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 07:04:40 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 07:04:40 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 07:04:40 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 07:04:40 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 07:04:40 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:04:40 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:04:40 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 07:04:40 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 07:04:40 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 07:04:40 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 07:04:40 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 07:04:40 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 07:04:40 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:04:40 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:04:40 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 07:04:40 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 07:04:40 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 07:04:40 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 07:04:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 07:04:40 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 07:04:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 07:04:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 07:04:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 07:04:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 07:04:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 07:04:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 07:04:40 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 07:04:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:04:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:04:40 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 07:04:40 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 07:04:40 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 07:04:40 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 07:04:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:04:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:04:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:04:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 07:04:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:04:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:04:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:04:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:04:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:04:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:04:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:04:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:04:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:04:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:04:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:04:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:04:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:04:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:04:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:04:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:04:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:04:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:04:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:04:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:04:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:04:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:04:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:04:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:04:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:04:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:04:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:04:40 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-03-30 07:04:41 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-03-30 07:04:41 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-03-30 07:04:41 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-03-30 07:04:41 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-03-30 07:04:41 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-03-30 07:04:41 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-03-30 07:04:41 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-03-30 07:04:41 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-03-30 07:04:41 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-03-30 07:04:41 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=0 bl=148 pwr=0
2025-03-30 07:04:41 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=1 bl=148 pwr=0
2025-03-30 07:04:41 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=2 bl=148 pwr=0
2025-03-30 07:04:41 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=3 bl=148 pwr=0
2025-03-30 07:04:41 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=4 bl=148 pwr=0
2025-03-30 07:04:41 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=5 bl=148 pwr=0
2025-03-30 07:04:41 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=6 bl=148 pwr=0
2025-03-30 07:04:41 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=7 bl=148 pwr=0
2025-03-30 07:04:41 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 07:04:41 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 07:04:41 [DEBUG] fake_trx.py:317 (BTS@172.18.26.20:5700) Recv FAKE_CI cmd
2025-03-30 07:04:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:04:41 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:04:41 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:04:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:04:41 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:04:41 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:04:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:04:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:04:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:04:41 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:04:41 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:04:41 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 07:04:41 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 07:04:41 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:04:41 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:04:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:04:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:04:41 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-03-30 07:04:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:04:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:04:41 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:04:41 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:04:41 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:04:41 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:04:41 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:04:41 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:04:41 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:04:41 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:04:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:04:41 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:04:41 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:04:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:04:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:04:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:04:41 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:04:41 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:04:41 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 07:04:41 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 07:04:41 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:04:41 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:04:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:04:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:04:42 [DEBUG] clck_gen.py:128 IND CLOCK 306
2025-03-30 07:04:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:04:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:04:42 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:04:42 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:04:42 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:04:42 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:04:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:04:42 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:04:42 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:04:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:04:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:04:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:04:42 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:04:42 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:04:42 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 07:04:42 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 07:04:42 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:04:42 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:04:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:04:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:04:42 [DEBUG] clck_gen.py:128 IND CLOCK 408
2025-03-30 07:04:42 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:04:42 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:04:42 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:04:42 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:04:43 [DEBUG] clck_gen.py:128 IND CLOCK 510
2025-03-30 07:04:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:04:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:04:43 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:04:43 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:04:43 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:04:43 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:04:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:04:43 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:04:43 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:04:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:04:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:04:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:04:43 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:04:43 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:04:43 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 07:04:43 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 07:04:43 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:04:43 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:04:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:04:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:04:43 [DEBUG] clck_gen.py:128 IND CLOCK 612
2025-03-30 07:04:43 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:04:43 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:04:43 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:04:43 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:04:44 [DEBUG] clck_gen.py:128 IND CLOCK 714
2025-03-30 07:04:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:04:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:04:44 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:04:44 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:04:44 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:04:44 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:04:44 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:04:44 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:04:44 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:04:44 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:04:44 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:04:44 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:04:44 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 07:04:44 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 07:04:44 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 07:04:49 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 07:04:49 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 07:04:49 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:04:49 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:04:49 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:04:49 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:04:49 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:04:49 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 07:04:49 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:04:49 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 07:04:49 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 07:04:49 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 07:04:49 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 07:04:49 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 07:04:49 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:04:49 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:04:49 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 07:04:49 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 07:04:49 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 07:04:49 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 07:04:49 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 07:04:49 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 07:04:49 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:04:49 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:04:49 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 07:04:49 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 07:04:49 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 07:04:49 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 07:04:49 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 07:04:49 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 07:04:49 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:04:49 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:04:49 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 07:04:49 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 07:04:49 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 07:04:49 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 07:04:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 07:04:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 07:04:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 07:04:49 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 07:04:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 07:04:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 07:04:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 07:04:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:04:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 07:04:49 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 07:04:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:04:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:04:49 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 07:04:49 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 07:04:49 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 07:04:49 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 07:04:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:04:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:04:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:04:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 07:04:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:04:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:04:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:04:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:04:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:04:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:04:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:04:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:04:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:04:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:04:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:04:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:04:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:04:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:04:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:04:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:04:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:04:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:04:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:04:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:04:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:04:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:04:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:04:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:04:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:04:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:04:49 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-03-30 07:04:49 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-03-30 07:04:49 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-03-30 07:04:49 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-03-30 07:04:49 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-03-30 07:04:49 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-03-30 07:04:49 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-03-30 07:04:49 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-03-30 07:04:49 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-03-30 07:04:49 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-03-30 07:04:49 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=0 bl=148 pwr=0
2025-03-30 07:04:49 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=1 bl=148 pwr=0
2025-03-30 07:04:49 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=2 bl=148 pwr=0
2025-03-30 07:04:49 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=3 bl=148 pwr=0
2025-03-30 07:04:49 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=4 bl=148 pwr=0
2025-03-30 07:04:49 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=5 bl=148 pwr=0
2025-03-30 07:04:49 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=6 bl=148 pwr=0
2025-03-30 07:04:49 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=7 bl=148 pwr=0
2025-03-30 07:04:49 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 07:04:49 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 07:04:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:04:49 [DEBUG] fake_trx.py:317 (BTS@172.18.26.20:5700) Recv FAKE_CI cmd
2025-03-30 07:04:49 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:04:49 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:04:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:04:49 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:04:49 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:04:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:04:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:04:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:04:49 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:04:49 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:04:49 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 07:04:49 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 07:04:49 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:04:49 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:04:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:04:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:04:50 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-03-30 07:04:50 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:04:50 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:04:50 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:04:50 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:04:50 [DEBUG] clck_gen.py:128 IND CLOCK 306
2025-03-30 07:04:51 [DEBUG] clck_gen.py:128 IND CLOCK 408
2025-03-30 07:04:51 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:04:51 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:04:51 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:04:51 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:04:51 [DEBUG] clck_gen.py:128 IND CLOCK 510
2025-03-30 07:04:52 [DEBUG] clck_gen.py:128 IND CLOCK 612
2025-03-30 07:04:52 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:04:52 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:04:52 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:04:52 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:04:52 [DEBUG] clck_gen.py:128 IND CLOCK 714
2025-03-30 07:04:53 [DEBUG] clck_gen.py:128 IND CLOCK 816
2025-03-30 07:04:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:04:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:04:53 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:04:53 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:04:53 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:04:53 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:04:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:04:53 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:04:53 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:04:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:04:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:04:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:04:53 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:04:53 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:04:53 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 07:04:53 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 07:04:53 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:04:53 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:04:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:04:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:04:53 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:04:53 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:04:53 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:04:53 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:04:53 [DEBUG] clck_gen.py:128 IND CLOCK 918
2025-03-30 07:04:53 [DEBUG] clck_gen.py:128 IND CLOCK 1020
2025-03-30 07:04:54 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:04:54 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:04:54 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:04:54 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:04:54 [DEBUG] clck_gen.py:128 IND CLOCK 1122
2025-03-30 07:04:54 [DEBUG] clck_gen.py:128 IND CLOCK 1224
2025-03-30 07:04:55 [DEBUG] clck_gen.py:128 IND CLOCK 1326
2025-03-30 07:04:55 [DEBUG] clck_gen.py:128 IND CLOCK 1428
2025-03-30 07:04:56 [DEBUG] clck_gen.py:128 IND CLOCK 1530
2025-03-30 07:04:56 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:04:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:04:56 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:04:56 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:04:56 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:04:56 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:04:56 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:04:56 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:04:56 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:04:56 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:04:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:04:56 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:04:56 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:04:56 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:04:56 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 07:04:56 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 07:04:56 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:04:56 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:04:56 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:04:56 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:04:56 [DEBUG] clck_gen.py:128 IND CLOCK 1632
2025-03-30 07:04:57 [DEBUG] clck_gen.py:128 IND CLOCK 1734
2025-03-30 07:04:57 [DEBUG] clck_gen.py:128 IND CLOCK 1836
2025-03-30 07:04:58 [DEBUG] clck_gen.py:128 IND CLOCK 1938
2025-03-30 07:04:58 [DEBUG] clck_gen.py:128 IND CLOCK 2040
2025-03-30 07:04:59 [DEBUG] clck_gen.py:128 IND CLOCK 2142
2025-03-30 07:04:59 [DEBUG] clck_gen.py:128 IND CLOCK 2244
2025-03-30 07:05:00 [DEBUG] clck_gen.py:128 IND CLOCK 2346
2025-03-30 07:05:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:05:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:05:00 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:05:00 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:05:00 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:05:00 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:05:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:05:00 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:05:00 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:05:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:05:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:05:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:05:00 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:05:00 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:05:00 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 07:05:00 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 07:05:00 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:05:00 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:05:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:05:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:05:00 [DEBUG] clck_gen.py:128 IND CLOCK 2448
2025-03-30 07:05:01 [DEBUG] clck_gen.py:128 IND CLOCK 2550
2025-03-30 07:05:01 [DEBUG] clck_gen.py:128 IND CLOCK 2652
2025-03-30 07:05:01 [DEBUG] clck_gen.py:128 IND CLOCK 2754
2025-03-30 07:05:02 [DEBUG] clck_gen.py:128 IND CLOCK 2856
2025-03-30 07:05:02 [DEBUG] clck_gen.py:128 IND CLOCK 2958
2025-03-30 07:05:03 [DEBUG] clck_gen.py:128 IND CLOCK 3060
2025-03-30 07:05:03 [DEBUG] clck_gen.py:128 IND CLOCK 3162
2025-03-30 07:05:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:05:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:05:03 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:05:03 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:05:03 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:05:03 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:05:03 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:05:03 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:05:03 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:05:03 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:05:03 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:05:03 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:05:03 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 07:05:03 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 07:05:03 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 07:05:03 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=3188 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:05:03 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=3188 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:05:08 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 07:05:08 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 07:05:08 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:05:08 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:05:08 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:05:08 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:05:09 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:05:09 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 07:05:09 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:05:09 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 07:05:09 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 07:05:09 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 07:05:09 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 07:05:09 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 07:05:09 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:05:09 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:05:09 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 07:05:09 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 07:05:09 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 07:05:09 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 07:05:09 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 07:05:09 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 07:05:09 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:05:09 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:05:09 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 07:05:09 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 07:05:09 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 07:05:09 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 07:05:09 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 07:05:09 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 07:05:09 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:05:09 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:05:09 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 07:05:09 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 07:05:09 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 07:05:09 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 07:05:09 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 07:05:09 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 07:05:09 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 07:05:09 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 07:05:09 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 07:05:09 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 07:05:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 07:05:09 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:05:09 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 07:05:09 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 07:05:09 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:05:09 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:05:09 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 07:05:09 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 07:05:09 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 07:05:09 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 07:05:09 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:05:09 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:05:09 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:05:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 07:05:09 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:05:09 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:05:09 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:05:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:05:09 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:05:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:05:09 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:05:09 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:05:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:05:09 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:05:09 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:05:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:05:09 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:05:09 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:05:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:05:09 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:05:09 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:05:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:05:09 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:05:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:05:09 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:05:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:05:09 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:05:09 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:05:09 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:05:09 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:05:09 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-03-30 07:05:09 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-03-30 07:05:09 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-03-30 07:05:09 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-03-30 07:05:09 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-03-30 07:05:09 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-03-30 07:05:09 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-03-30 07:05:09 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-03-30 07:05:09 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-03-30 07:05:09 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-03-30 07:05:09 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=0 bl=148 pwr=0
2025-03-30 07:05:09 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=1 bl=148 pwr=0
2025-03-30 07:05:09 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=2 bl=148 pwr=0
2025-03-30 07:05:09 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=3 bl=148 pwr=0
2025-03-30 07:05:09 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=4 bl=148 pwr=0
2025-03-30 07:05:09 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=5 bl=148 pwr=0
2025-03-30 07:05:09 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=6 bl=148 pwr=0
2025-03-30 07:05:09 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=7 bl=148 pwr=0
2025-03-30 07:05:09 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 07:05:09 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 07:05:09 [DEBUG] fake_trx.py:317 (BTS@172.18.26.20:5700) Recv FAKE_CI cmd
2025-03-30 07:05:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:05:09 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:05:09 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:05:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:05:09 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:05:09 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:05:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:05:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:05:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:05:09 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:05:09 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:05:09 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 07:05:09 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 07:05:09 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:05:09 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:05:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:05:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:05:09 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-03-30 07:05:10 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:05:10 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:05:10 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:05:10 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:05:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:05:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:05:10 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:05:10 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:05:10 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:05:10 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:05:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:05:10 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:05:10 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:05:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:05:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:05:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:05:10 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:05:10 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:05:10 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 07:05:10 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 07:05:10 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:05:10 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:05:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:05:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:05:10 [DEBUG] clck_gen.py:128 IND CLOCK 306
2025-03-30 07:05:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:05:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:05:10 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:05:10 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:05:10 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:05:10 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:05:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:05:10 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:05:10 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:05:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:05:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:05:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:05:10 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:05:10 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:05:10 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 07:05:10 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 07:05:10 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:05:10 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:05:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:05:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:05:10 [DEBUG] clck_gen.py:128 IND CLOCK 408
2025-03-30 07:05:11 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:05:11 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:05:11 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:05:11 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:05:11 [DEBUG] clck_gen.py:128 IND CLOCK 510
2025-03-30 07:05:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:05:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:05:11 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:05:11 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:05:11 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:05:11 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:05:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:05:11 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:05:11 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:05:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:05:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:05:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:05:11 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:05:11 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:05:11 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 07:05:11 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 07:05:11 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:05:11 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:05:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:05:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:05:11 [DEBUG] clck_gen.py:128 IND CLOCK 612
2025-03-30 07:05:12 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:05:12 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:05:12 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:05:12 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:05:12 [DEBUG] clck_gen.py:128 IND CLOCK 714
2025-03-30 07:05:12 [DEBUG] clck_gen.py:128 IND CLOCK 816
2025-03-30 07:05:12 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:05:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:05:12 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:05:12 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:05:12 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:05:12 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:05:12 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:05:12 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:05:12 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:05:12 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:05:12 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:05:12 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:05:12 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 07:05:12 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 07:05:12 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 07:05:12 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=842 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:05:12 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=842 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:05:12 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=842 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:05:12 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=842 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:05:12 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=842 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:05:12 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=842 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:05:17 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 07:05:17 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 07:05:17 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:05:17 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:05:17 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:05:17 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:05:17 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:05:17 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 07:05:17 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:05:17 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 07:05:17 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 07:05:17 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 07:05:17 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 07:05:17 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 07:05:17 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:05:17 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:05:17 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 07:05:17 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 07:05:17 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 07:05:17 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 07:05:17 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 07:05:17 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 07:05:17 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:05:17 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:05:17 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 07:05:17 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 07:05:17 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 07:05:17 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 07:05:17 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 07:05:17 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 07:05:17 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:05:17 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:05:17 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 07:05:17 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 07:05:17 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 07:05:17 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 07:05:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 07:05:17 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 07:05:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 07:05:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 07:05:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 07:05:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 07:05:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 07:05:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 07:05:17 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 07:05:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:05:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:05:17 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 07:05:17 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 07:05:17 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 07:05:17 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 07:05:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:05:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:05:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:05:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 07:05:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:05:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:05:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:05:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:05:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:05:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:05:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:05:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:05:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:05:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:05:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:05:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:05:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:05:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:05:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:05:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:05:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:05:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:05:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:05:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:05:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:05:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:05:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:05:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:05:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:05:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:05:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:05:17 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-03-30 07:05:18 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-03-30 07:05:18 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-03-30 07:05:18 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-03-30 07:05:18 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-03-30 07:05:18 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-03-30 07:05:18 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-03-30 07:05:18 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-03-30 07:05:18 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-03-30 07:05:18 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-03-30 07:05:18 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 07:05:18 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 07:05:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:05:18 [DEBUG] fake_trx.py:317 (BTS@172.18.26.20:5700) Recv FAKE_CI cmd
2025-03-30 07:05:18 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:05:18 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:05:18 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:05:18 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:05:18 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:05:18 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:05:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:05:18 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:05:18 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:05:18 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:05:18 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 07:05:18 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 07:05:18 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:05:18 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:05:18 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:05:18 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:05:18 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-03-30 07:05:18 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:05:18 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:05:18 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:05:18 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:05:19 [DEBUG] clck_gen.py:128 IND CLOCK 306
2025-03-30 07:05:19 [DEBUG] clck_gen.py:128 IND CLOCK 408
2025-03-30 07:05:19 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:05:19 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:05:19 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:05:19 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:05:20 [DEBUG] clck_gen.py:128 IND CLOCK 510
2025-03-30 07:05:20 [DEBUG] clck_gen.py:128 IND CLOCK 612
2025-03-30 07:05:20 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:05:20 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:05:20 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:05:20 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:05:21 [DEBUG] clck_gen.py:128 IND CLOCK 714
2025-03-30 07:05:21 [DEBUG] clck_gen.py:128 IND CLOCK 816
2025-03-30 07:05:21 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:05:21 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:05:21 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:05:21 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:05:22 [DEBUG] clck_gen.py:128 IND CLOCK 918
2025-03-30 07:05:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:05:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:05:22 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:05:22 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:05:22 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:05:22 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:05:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:05:22 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:05:22 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:05:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:05:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:05:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:05:22 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:05:22 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:05:22 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 07:05:22 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 07:05:22 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:05:22 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:05:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:05:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:05:22 [DEBUG] clck_gen.py:128 IND CLOCK 1020
2025-03-30 07:05:22 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:05:22 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:05:22 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:05:22 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:05:23 [DEBUG] clck_gen.py:128 IND CLOCK 1122
2025-03-30 07:05:23 [DEBUG] clck_gen.py:128 IND CLOCK 1224
2025-03-30 07:05:24 [DEBUG] clck_gen.py:128 IND CLOCK 1326
2025-03-30 07:05:24 [DEBUG] clck_gen.py:128 IND CLOCK 1428
2025-03-30 07:05:25 [DEBUG] clck_gen.py:128 IND CLOCK 1530
2025-03-30 07:05:25 [DEBUG] clck_gen.py:128 IND CLOCK 1632
2025-03-30 07:05:25 [DEBUG] clck_gen.py:128 IND CLOCK 1734
2025-03-30 07:05:26 [DEBUG] clck_gen.py:128 IND CLOCK 1836
2025-03-30 07:05:26 [DEBUG] clck_gen.py:128 IND CLOCK 1938
2025-03-30 07:05:27 [DEBUG] clck_gen.py:128 IND CLOCK 2040
2025-03-30 07:05:27 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:05:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:05:27 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:05:27 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:05:27 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:05:27 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:05:27 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:05:27 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:05:27 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:05:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:05:27 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:05:27 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:05:27 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:05:27 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:05:27 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 07:05:27 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 07:05:27 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:05:27 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:05:27 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:05:27 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:05:27 [DEBUG] clck_gen.py:128 IND CLOCK 2142
2025-03-30 07:05:28 [DEBUG] clck_gen.py:128 IND CLOCK 2244
2025-03-30 07:05:28 [DEBUG] clck_gen.py:128 IND CLOCK 2346
2025-03-30 07:05:29 [DEBUG] clck_gen.py:128 IND CLOCK 2448
2025-03-30 07:05:29 [DEBUG] clck_gen.py:128 IND CLOCK 2550
2025-03-30 07:05:30 [DEBUG] clck_gen.py:128 IND CLOCK 2652
2025-03-30 07:05:30 [DEBUG] clck_gen.py:128 IND CLOCK 2754
2025-03-30 07:05:31 [DEBUG] clck_gen.py:128 IND CLOCK 2856
2025-03-30 07:05:31 [DEBUG] clck_gen.py:128 IND CLOCK 2958
2025-03-30 07:05:32 [DEBUG] clck_gen.py:128 IND CLOCK 3060
2025-03-30 07:05:32 [DEBUG] clck_gen.py:128 IND CLOCK 3162
2025-03-30 07:05:33 [DEBUG] clck_gen.py:128 IND CLOCK 3264
2025-03-30 07:05:33 [DEBUG] clck_gen.py:128 IND CLOCK 3366
2025-03-30 07:05:33 [DEBUG] clck_gen.py:128 IND CLOCK 3468
2025-03-30 07:05:34 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:05:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:05:34 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:05:34 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:05:34 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:05:34 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:05:34 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:05:34 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:05:34 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:05:34 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:05:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:05:34 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:05:34 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:05:34 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:05:34 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 07:05:34 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 07:05:34 [DEBUG] clck_gen.py:128 IND CLOCK 3570
2025-03-30 07:05:34 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:05:34 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:05:34 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:05:34 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:05:34 [DEBUG] clck_gen.py:128 IND CLOCK 3672
2025-03-30 07:05:35 [DEBUG] clck_gen.py:128 IND CLOCK 3774
2025-03-30 07:05:35 [DEBUG] clck_gen.py:128 IND CLOCK 3876
2025-03-30 07:05:36 [DEBUG] clck_gen.py:128 IND CLOCK 3978
2025-03-30 07:05:36 [DEBUG] clck_gen.py:128 IND CLOCK 4080
2025-03-30 07:05:37 [DEBUG] clck_gen.py:128 IND CLOCK 4182
2025-03-30 07:05:37 [DEBUG] clck_gen.py:128 IND CLOCK 4284
2025-03-30 07:05:38 [DEBUG] clck_gen.py:128 IND CLOCK 4386
2025-03-30 07:05:38 [DEBUG] clck_gen.py:128 IND CLOCK 4488
2025-03-30 07:05:39 [DEBUG] clck_gen.py:128 IND CLOCK 4590
2025-03-30 07:05:39 [DEBUG] clck_gen.py:128 IND CLOCK 4692
2025-03-30 07:05:40 [DEBUG] clck_gen.py:128 IND CLOCK 4794
2025-03-30 07:05:40 [DEBUG] clck_gen.py:128 IND CLOCK 4896
2025-03-30 07:05:41 [DEBUG] clck_gen.py:128 IND CLOCK 4998
2025-03-30 07:05:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:05:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:05:41 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:05:41 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:05:41 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:05:41 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:05:41 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:05:41 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:05:41 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:05:41 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:05:41 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:05:41 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:05:41 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 07:05:41 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 07:05:41 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 07:05:41 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=5024 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:05:41 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=5024 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:05:46 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 07:05:46 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 07:05:46 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:05:46 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:05:46 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:05:46 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:05:46 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:05:46 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 07:05:46 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:05:46 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 07:05:46 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 07:05:46 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 07:05:46 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 07:05:46 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 07:05:46 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:05:46 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:05:46 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 07:05:46 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 07:05:46 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 07:05:46 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 07:05:46 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 07:05:46 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 07:05:46 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:05:46 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:05:46 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 07:05:46 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 07:05:46 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 07:05:46 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 07:05:46 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 07:05:46 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 07:05:46 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:05:46 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:05:46 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 07:05:46 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 07:05:46 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 07:05:46 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 07:05:46 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 07:05:46 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 07:05:46 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 07:05:46 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 07:05:46 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 07:05:46 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 07:05:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 07:05:46 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:05:46 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 07:05:46 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 07:05:46 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:05:46 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:05:46 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 07:05:46 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 07:05:46 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 07:05:46 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 07:05:46 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:05:46 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:05:46 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:05:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 07:05:46 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:05:46 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:05:46 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:05:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:05:46 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:05:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:05:46 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:05:46 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:05:46 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:05:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:05:46 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:05:46 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:05:46 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:05:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:05:46 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:05:46 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:05:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:05:46 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:05:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:05:46 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:05:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:05:46 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:05:46 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:05:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:05:46 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:05:46 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:05:46 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-03-30 07:05:46 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-03-30 07:05:46 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-03-30 07:05:46 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-03-30 07:05:46 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-03-30 07:05:46 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-03-30 07:05:46 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-03-30 07:05:46 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-03-30 07:05:46 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-03-30 07:05:46 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-03-30 07:05:46 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=0 bl=148 pwr=0
2025-03-30 07:05:46 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=1 bl=148 pwr=0
2025-03-30 07:05:46 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=2 bl=148 pwr=0
2025-03-30 07:05:46 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=3 bl=148 pwr=0
2025-03-30 07:05:46 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=4 bl=148 pwr=0
2025-03-30 07:05:46 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=5 bl=148 pwr=0
2025-03-30 07:05:46 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=6 bl=148 pwr=0
2025-03-30 07:05:46 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=7 bl=148 pwr=0
2025-03-30 07:05:46 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 07:05:46 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 07:05:46 [DEBUG] fake_trx.py:317 (BTS@172.18.26.20:5700) Recv FAKE_CI cmd
2025-03-30 07:05:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:05:46 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:05:46 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:05:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:05:46 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:05:46 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:05:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:05:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:05:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:05:46 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:05:46 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:05:46 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 07:05:46 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 07:05:46 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:05:46 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:05:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:05:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:05:47 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-03-30 07:05:47 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:05:47 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:05:47 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:05:47 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:05:47 [DEBUG] clck_gen.py:128 IND CLOCK 306
2025-03-30 07:05:48 [DEBUG] clck_gen.py:128 IND CLOCK 408
2025-03-30 07:05:48 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:05:48 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:05:48 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:05:48 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:05:48 [DEBUG] clck_gen.py:128 IND CLOCK 510
2025-03-30 07:05:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:05:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:05:48 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:05:48 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:05:48 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:05:48 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:05:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:05:48 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:05:48 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:05:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:05:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:05:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:05:48 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:05:48 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:05:48 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 07:05:48 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 07:05:48 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:05:48 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:05:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:05:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:05:48 [DEBUG] clck_gen.py:128 IND CLOCK 612
2025-03-30 07:05:49 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:05:49 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:05:49 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:05:49 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:05:49 [DEBUG] clck_gen.py:128 IND CLOCK 714
2025-03-30 07:05:49 [DEBUG] clck_gen.py:128 IND CLOCK 816
2025-03-30 07:05:50 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:05:50 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:05:50 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:05:50 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:05:50 [DEBUG] clck_gen.py:128 IND CLOCK 918
2025-03-30 07:05:50 [DEBUG] clck_gen.py:128 IND CLOCK 1020
2025-03-30 07:05:51 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:05:51 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:05:51 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:05:51 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:05:51 [DEBUG] clck_gen.py:128 IND CLOCK 1122
2025-03-30 07:05:51 [DEBUG] clck_gen.py:128 IND CLOCK 1224
2025-03-30 07:05:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:05:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:05:51 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:05:51 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:05:51 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:05:51 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:05:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:05:51 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:05:51 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:05:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:05:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:05:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:05:51 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:05:51 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:05:51 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 07:05:51 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 07:05:51 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:05:51 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:05:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:05:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:05:52 [DEBUG] clck_gen.py:128 IND CLOCK 1326
2025-03-30 07:05:52 [DEBUG] clck_gen.py:128 IND CLOCK 1428
2025-03-30 07:05:53 [DEBUG] clck_gen.py:128 IND CLOCK 1530
2025-03-30 07:05:53 [DEBUG] clck_gen.py:128 IND CLOCK 1632
2025-03-30 07:05:54 [DEBUG] clck_gen.py:128 IND CLOCK 1734
2025-03-30 07:05:54 [DEBUG] clck_gen.py:128 IND CLOCK 1836
2025-03-30 07:05:55 [DEBUG] clck_gen.py:128 IND CLOCK 1938
2025-03-30 07:05:55 [DEBUG] clck_gen.py:128 IND CLOCK 2040
2025-03-30 07:05:56 [DEBUG] clck_gen.py:128 IND CLOCK 2142
2025-03-30 07:05:56 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:05:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:05:56 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:05:56 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:05:56 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:05:56 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:05:56 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:05:56 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:05:56 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:05:56 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:05:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:05:56 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:05:56 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:05:56 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:05:56 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 07:05:56 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 07:05:56 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:05:56 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:05:56 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:05:56 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:05:56 [DEBUG] clck_gen.py:128 IND CLOCK 2244
2025-03-30 07:05:56 [DEBUG] clck_gen.py:128 IND CLOCK 2346
2025-03-30 07:05:57 [DEBUG] clck_gen.py:128 IND CLOCK 2448
2025-03-30 07:05:57 [DEBUG] clck_gen.py:128 IND CLOCK 2550
2025-03-30 07:05:58 [DEBUG] clck_gen.py:128 IND CLOCK 2652
2025-03-30 07:05:58 [DEBUG] clck_gen.py:128 IND CLOCK 2754
2025-03-30 07:05:59 [DEBUG] clck_gen.py:128 IND CLOCK 2856
2025-03-30 07:05:59 [DEBUG] clck_gen.py:128 IND CLOCK 2958
2025-03-30 07:06:00 [DEBUG] clck_gen.py:128 IND CLOCK 3060
2025-03-30 07:06:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:06:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:06:00 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:06:00 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:06:00 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:06:00 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:06:00 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:06:00 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:06:00 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:06:00 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:06:00 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:06:00 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:06:00 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 07:06:00 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 07:06:00 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 07:06:00 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=3138 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:06:00 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=3138 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:06:00 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=3138 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:06:00 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=3138 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:06:00 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=3138 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:06:00 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=3138 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:06:00 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=3138 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:06:00 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=3138 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:06:05 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 07:06:05 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 07:06:05 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:06:05 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:06:05 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:06:05 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:06:05 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:06:05 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 07:06:05 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:06:05 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 07:06:05 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 07:06:05 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 07:06:05 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 07:06:05 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 07:06:05 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:06:05 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:06:05 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 07:06:05 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 07:06:05 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 07:06:05 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 07:06:05 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 07:06:05 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 07:06:05 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:06:05 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:06:05 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 07:06:05 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 07:06:05 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 07:06:05 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 07:06:05 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 07:06:05 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 07:06:05 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:06:05 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:06:05 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 07:06:05 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 07:06:05 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 07:06:05 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 07:06:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 07:06:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 07:06:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 07:06:05 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 07:06:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 07:06:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 07:06:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 07:06:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:06:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 07:06:05 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 07:06:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:06:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:06:05 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 07:06:05 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 07:06:05 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 07:06:05 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 07:06:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:06:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:06:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:06:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 07:06:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:06:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:06:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:06:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:06:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:06:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:06:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:06:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:06:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:06:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:06:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:06:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:06:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:06:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:06:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:06:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:06:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:06:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:06:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:06:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:06:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:06:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:06:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:06:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:06:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:06:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:06:05 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-03-30 07:06:06 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-03-30 07:06:06 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-03-30 07:06:06 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-03-30 07:06:06 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-03-30 07:06:06 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-03-30 07:06:06 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-03-30 07:06:06 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-03-30 07:06:06 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-03-30 07:06:06 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-03-30 07:06:06 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=0 bl=148 pwr=0
2025-03-30 07:06:06 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=1 bl=148 pwr=0
2025-03-30 07:06:06 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=2 bl=148 pwr=0
2025-03-30 07:06:06 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=3 bl=148 pwr=0
2025-03-30 07:06:06 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=4 bl=148 pwr=0
2025-03-30 07:06:06 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=5 bl=148 pwr=0
2025-03-30 07:06:06 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=6 bl=148 pwr=0
2025-03-30 07:06:06 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=7 bl=148 pwr=0
2025-03-30 07:06:06 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 07:06:06 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 07:06:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:06:06 [DEBUG] fake_trx.py:317 (BTS@172.18.26.20:5700) Recv FAKE_CI cmd
2025-03-30 07:06:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:06:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:06:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:06:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:06:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:06:06 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-03-30 07:06:06 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:06:06 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:06:06 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:06:06 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:06:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:06:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:06:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:06:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:06:07 [DEBUG] clck_gen.py:128 IND CLOCK 306
2025-03-30 07:06:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:06:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:06:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:06:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:06:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:06:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:06:07 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:06:07 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:06:07 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:06:07 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:06:07 [DEBUG] clck_gen.py:128 IND CLOCK 408
2025-03-30 07:06:07 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:06:07 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:06:07 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:06:07 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:06:07 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 07:06:07 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 07:06:07 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 07:06:12 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 07:06:12 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 07:06:12 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:06:12 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:06:12 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:06:12 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:06:12 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:06:12 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 07:06:12 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:06:12 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 07:06:12 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 07:06:12 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 07:06:12 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 07:06:12 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 07:06:12 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:06:12 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:06:12 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 07:06:12 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 07:06:12 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 07:06:12 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 07:06:12 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 07:06:12 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 07:06:12 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:06:12 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:06:12 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 07:06:12 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 07:06:12 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 07:06:12 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 07:06:12 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 07:06:12 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 07:06:12 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:06:12 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:06:12 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 07:06:12 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 07:06:12 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 07:06:12 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 07:06:12 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 07:06:12 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 07:06:12 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 07:06:12 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 07:06:12 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 07:06:12 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 07:06:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 07:06:12 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:06:12 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 07:06:12 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 07:06:12 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:06:12 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:06:12 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 07:06:12 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 07:06:12 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 07:06:12 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 07:06:12 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:06:12 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:06:12 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:06:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 07:06:12 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:06:12 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:06:12 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:06:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:06:12 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:06:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:06:12 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:06:12 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:06:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:06:12 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:06:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:06:12 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:06:12 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:06:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:06:12 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:06:12 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:06:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:06:12 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:06:12 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:06:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:06:12 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:06:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:06:12 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:06:12 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:06:12 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:06:12 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:06:12 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-03-30 07:06:13 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-03-30 07:06:13 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-03-30 07:06:13 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-03-30 07:06:13 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-03-30 07:06:13 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-03-30 07:06:13 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-03-30 07:06:13 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-03-30 07:06:13 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-03-30 07:06:13 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-03-30 07:06:13 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=0 bl=148 pwr=0
2025-03-30 07:06:13 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=1 bl=148 pwr=0
2025-03-30 07:06:13 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=2 bl=148 pwr=0
2025-03-30 07:06:13 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=3 bl=148 pwr=0
2025-03-30 07:06:13 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=4 bl=148 pwr=0
2025-03-30 07:06:13 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=5 bl=148 pwr=0
2025-03-30 07:06:13 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=6 bl=148 pwr=0
2025-03-30 07:06:13 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=7 bl=148 pwr=0
2025-03-30 07:06:13 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 07:06:13 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 07:06:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:06:13 [DEBUG] fake_trx.py:317 (BTS@172.18.26.20:5700) Recv FAKE_CI cmd
2025-03-30 07:06:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:06:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:06:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:06:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:06:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:06:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:06:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:06:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:06:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:06:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:06:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:06:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:06:13 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-03-30 07:06:13 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:06:13 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:06:13 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:06:13 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:06:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:06:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:06:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:06:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:06:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:06:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:06:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:06:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:06:13 [DEBUG] clck_gen.py:128 IND CLOCK 306
2025-03-30 07:06:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:06:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:06:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:06:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:06:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:06:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:06:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:06:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:06:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:06:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:06:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:06:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:06:14 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:06:14 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:06:14 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:06:14 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:06:14 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:06:14 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:06:14 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:06:14 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 07:06:14 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 07:06:14 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 07:06:14 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:06:19 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 07:06:19 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 07:06:19 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:06:19 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:06:19 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:06:19 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:06:19 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:06:19 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 07:06:19 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:06:19 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 07:06:19 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 07:06:19 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 07:06:19 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 07:06:19 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 07:06:19 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:06:19 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:06:19 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 07:06:19 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 07:06:19 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 07:06:19 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 07:06:19 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 07:06:19 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 07:06:19 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:06:19 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:06:19 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 07:06:19 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 07:06:19 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 07:06:19 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 07:06:19 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 07:06:19 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 07:06:19 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:06:19 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:06:19 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 07:06:19 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 07:06:19 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 07:06:19 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 07:06:19 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 07:06:19 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 07:06:19 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 07:06:19 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 07:06:19 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 07:06:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 07:06:19 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 07:06:19 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 07:06:19 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 07:06:19 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:06:19 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:06:19 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 07:06:19 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 07:06:19 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 07:06:19 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 07:06:19 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:06:19 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:06:19 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:06:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 07:06:19 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:06:19 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:06:19 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:06:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:06:19 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:06:19 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:06:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:06:19 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:06:19 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:06:19 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:06:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:06:19 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:06:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:06:19 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:06:19 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:06:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:06:19 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:06:19 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:06:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:06:19 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:06:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:06:19 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:06:19 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:06:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:06:19 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:06:19 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:06:19 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:06:19 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-03-30 07:06:19 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-03-30 07:06:19 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-03-30 07:06:19 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-03-30 07:06:19 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-03-30 07:06:19 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-03-30 07:06:19 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-03-30 07:06:19 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-03-30 07:06:19 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-03-30 07:06:19 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-03-30 07:06:20 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 07:06:20 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 07:06:20 [DEBUG] fake_trx.py:317 (BTS@172.18.26.20:5700) Recv FAKE_CI cmd
2025-03-30 07:06:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:06:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:06:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:06:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:06:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:06:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:06:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:06:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:06:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:06:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:06:20 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-03-30 07:06:20 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:06:20 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:06:20 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:06:20 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:06:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:06:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:06:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:06:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:06:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:06:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:06:20 [DEBUG] clck_gen.py:128 IND CLOCK 306
2025-03-30 07:06:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:06:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:06:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:06:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:06:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:06:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:06:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:06:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:06:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:06:21 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:06:21 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:06:21 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:06:21 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:06:21 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:06:21 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:06:21 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:06:21 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 07:06:21 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 07:06:21 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 07:06:21 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:06:26 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 07:06:26 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 07:06:26 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:06:26 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:06:26 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:06:26 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:06:26 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:06:26 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 07:06:26 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:06:26 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 07:06:26 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 07:06:26 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 07:06:26 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 07:06:26 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 07:06:26 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:06:26 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:06:26 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 07:06:26 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 07:06:26 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 07:06:26 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 07:06:26 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 07:06:26 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 07:06:26 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:06:26 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:06:26 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 07:06:26 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 07:06:26 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 07:06:26 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 07:06:26 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 07:06:26 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 07:06:26 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:06:26 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:06:26 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 07:06:26 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 07:06:26 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 07:06:26 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 07:06:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 07:06:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 07:06:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 07:06:26 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 07:06:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 07:06:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 07:06:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 07:06:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:06:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 07:06:26 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 07:06:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:06:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:06:26 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 07:06:26 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 07:06:26 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 07:06:26 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 07:06:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:06:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:06:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:06:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 07:06:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:06:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:06:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:06:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:06:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:06:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:06:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:06:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:06:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:06:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:06:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:06:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:06:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:06:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:06:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:06:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:06:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:06:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:06:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:06:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:06:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:06:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:06:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:06:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:06:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:06:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:06:26 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-03-30 07:06:26 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-03-30 07:06:26 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-03-30 07:06:26 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-03-30 07:06:26 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-03-30 07:06:26 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-03-30 07:06:26 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-03-30 07:06:26 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-03-30 07:06:26 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-03-30 07:06:26 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-03-30 07:06:26 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=0 bl=148 pwr=0
2025-03-30 07:06:26 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=1 bl=148 pwr=0
2025-03-30 07:06:26 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=2 bl=148 pwr=0
2025-03-30 07:06:26 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=3 bl=148 pwr=0
2025-03-30 07:06:26 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=4 bl=148 pwr=0
2025-03-30 07:06:26 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=5 bl=148 pwr=0
2025-03-30 07:06:26 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=6 bl=148 pwr=0
2025-03-30 07:06:26 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=7 bl=148 pwr=0
2025-03-30 07:06:26 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 07:06:26 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 07:06:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:06:26 [DEBUG] fake_trx.py:317 (BTS@172.18.26.20:5700) Recv FAKE_CI cmd
2025-03-30 07:06:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:06:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:06:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:06:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:06:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:06:27 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-03-30 07:06:27 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:06:27 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:06:27 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:06:27 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:06:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:06:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:06:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:06:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:06:27 [DEBUG] clck_gen.py:128 IND CLOCK 306
2025-03-30 07:06:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:06:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:06:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:06:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:06:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:06:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:06:28 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:06:28 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:06:28 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:06:28 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:06:28 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:06:28 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:06:28 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:06:28 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:06:28 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 07:06:28 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 07:06:28 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 07:06:33 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 07:06:33 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 07:06:33 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:06:33 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:06:33 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:06:33 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:06:33 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:06:33 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 07:06:33 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:06:33 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 07:06:33 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 07:06:33 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 07:06:33 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 07:06:33 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 07:06:33 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:06:33 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:06:33 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 07:06:33 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 07:06:33 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 07:06:33 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 07:06:33 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 07:06:33 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 07:06:33 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:06:33 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:06:33 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 07:06:33 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 07:06:33 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 07:06:33 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 07:06:33 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 07:06:33 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 07:06:33 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:06:33 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:06:33 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 07:06:33 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 07:06:33 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 07:06:33 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 07:06:33 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 07:06:33 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 07:06:33 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 07:06:33 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 07:06:33 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 07:06:33 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 07:06:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 07:06:33 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:06:33 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 07:06:33 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 07:06:33 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:06:33 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:06:33 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 07:06:33 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 07:06:33 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 07:06:33 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 07:06:33 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:06:33 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:06:33 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:06:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 07:06:33 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:06:33 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:06:33 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:06:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:06:33 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:06:33 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:06:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:06:33 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:06:33 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:06:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:06:33 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:06:33 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:06:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:06:33 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:06:33 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:06:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:06:33 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:06:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:06:33 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:06:33 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:06:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:06:33 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:06:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:06:33 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:06:33 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:06:33 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:06:33 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-03-30 07:06:33 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-03-30 07:06:33 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-03-30 07:06:33 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-03-30 07:06:33 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-03-30 07:06:33 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-03-30 07:06:33 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-03-30 07:06:33 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-03-30 07:06:33 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-03-30 07:06:33 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-03-30 07:06:33 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=0 bl=148 pwr=0
2025-03-30 07:06:33 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=1 bl=148 pwr=0
2025-03-30 07:06:33 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=2 bl=148 pwr=0
2025-03-30 07:06:33 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=3 bl=148 pwr=0
2025-03-30 07:06:33 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=4 bl=148 pwr=0
2025-03-30 07:06:33 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=5 bl=148 pwr=0
2025-03-30 07:06:33 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=6 bl=148 pwr=0
2025-03-30 07:06:33 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=7 bl=148 pwr=0
2025-03-30 07:06:33 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 07:06:33 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 07:06:33 [DEBUG] fake_trx.py:317 (BTS@172.18.26.20:5700) Recv FAKE_CI cmd
2025-03-30 07:06:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:06:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:06:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:06:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:06:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:06:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:06:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:06:34 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-03-30 07:06:34 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:06:34 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:06:34 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:06:34 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:06:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:06:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:06:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:06:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:06:34 [DEBUG] clck_gen.py:128 IND CLOCK 306
2025-03-30 07:06:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:06:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:06:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:06:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:06:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:06:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:06:35 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:06:35 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:06:35 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:06:35 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:06:35 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:06:35 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:06:35 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:06:35 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:06:35 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 07:06:35 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 07:06:35 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 07:06:40 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 07:06:40 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 07:06:40 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:06:40 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:06:40 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:06:40 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:06:40 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:06:40 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 07:06:40 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:06:40 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 07:06:40 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 07:06:40 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 07:06:40 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 07:06:40 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 07:06:40 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:06:40 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:06:40 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 07:06:40 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 07:06:40 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 07:06:40 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 07:06:40 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 07:06:40 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 07:06:40 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:06:40 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:06:40 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 07:06:40 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 07:06:40 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 07:06:40 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 07:06:40 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 07:06:40 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 07:06:40 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:06:40 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:06:40 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 07:06:40 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 07:06:40 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 07:06:40 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 07:06:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 07:06:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 07:06:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 07:06:40 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 07:06:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 07:06:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 07:06:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 07:06:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:06:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 07:06:40 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 07:06:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:06:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:06:40 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 07:06:40 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 07:06:40 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 07:06:40 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 07:06:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:06:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:06:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:06:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 07:06:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:06:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:06:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:06:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:06:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:06:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:06:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:06:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:06:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:06:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:06:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:06:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:06:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:06:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:06:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:06:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:06:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:06:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:06:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:06:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:06:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:06:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:06:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:06:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:06:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:06:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:06:40 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-03-30 07:06:40 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-03-30 07:06:40 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-03-30 07:06:40 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-03-30 07:06:40 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-03-30 07:06:40 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-03-30 07:06:40 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-03-30 07:06:40 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-03-30 07:06:40 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-03-30 07:06:40 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-03-30 07:06:40 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=0 bl=148 pwr=0
2025-03-30 07:06:40 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=1 bl=148 pwr=0
2025-03-30 07:06:40 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=2 bl=148 pwr=0
2025-03-30 07:06:40 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=3 bl=148 pwr=0
2025-03-30 07:06:40 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=4 bl=148 pwr=0
2025-03-30 07:06:40 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=5 bl=148 pwr=0
2025-03-30 07:06:40 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=6 bl=148 pwr=0
2025-03-30 07:06:40 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=7 bl=148 pwr=0
2025-03-30 07:06:40 [WARNING] clck_gen.py:108 CLCKGen: time overrun by -11701us; resetting the clock
2025-03-30 07:06:40 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 07:06:40 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 07:06:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:06:40 [DEBUG] fake_trx.py:317 (BTS@172.18.26.20:5700) Recv FAKE_CI cmd
2025-03-30 07:06:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:06:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:06:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:06:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:06:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:06:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:06:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:06:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:06:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:06:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:06:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:06:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:06:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:06:41 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-03-30 07:06:41 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:06:41 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:06:41 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:06:41 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:06:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:06:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:06:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:06:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:06:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:06:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:06:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:06:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:06:41 [DEBUG] clck_gen.py:128 IND CLOCK 306
2025-03-30 07:06:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:06:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:06:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:06:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:06:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:06:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:06:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:06:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:06:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:06:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:06:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:06:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:06:42 [DEBUG] clck_gen.py:128 IND CLOCK 408
2025-03-30 07:06:42 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:06:42 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:06:42 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:06:42 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:06:42 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:06:42 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:06:42 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:06:42 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 07:06:42 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 07:06:42 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 07:06:42 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:06:47 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 07:06:47 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 07:06:47 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:06:47 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:06:47 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:06:47 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:06:47 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:06:47 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 07:06:47 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:06:47 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 07:06:47 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 07:06:47 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 07:06:47 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 07:06:47 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 07:06:47 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:06:47 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:06:47 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 07:06:47 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 07:06:47 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 07:06:47 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 07:06:47 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 07:06:47 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 07:06:47 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:06:47 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:06:47 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 07:06:47 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 07:06:47 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 07:06:47 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 07:06:47 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 07:06:47 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 07:06:47 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:06:47 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:06:47 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 07:06:47 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 07:06:47 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 07:06:47 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 07:06:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 07:06:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 07:06:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 07:06:47 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 07:06:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 07:06:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 07:06:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 07:06:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:06:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 07:06:47 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 07:06:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:06:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:06:47 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 07:06:47 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 07:06:47 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 07:06:47 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 07:06:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:06:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:06:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:06:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 07:06:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:06:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:06:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:06:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:06:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:06:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:06:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:06:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:06:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:06:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:06:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:06:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:06:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:06:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:06:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:06:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:06:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:06:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:06:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:06:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:06:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:06:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:06:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:06:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:06:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:06:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:06:47 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-03-30 07:06:47 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-03-30 07:06:47 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-03-30 07:06:47 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-03-30 07:06:47 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-03-30 07:06:47 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-03-30 07:06:47 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-03-30 07:06:47 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-03-30 07:06:47 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-03-30 07:06:47 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-03-30 07:06:47 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=0 bl=148 pwr=0
2025-03-30 07:06:47 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=1 bl=148 pwr=0
2025-03-30 07:06:47 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=2 bl=148 pwr=0
2025-03-30 07:06:47 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=3 bl=148 pwr=0
2025-03-30 07:06:47 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=4 bl=148 pwr=0
2025-03-30 07:06:47 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=5 bl=148 pwr=0
2025-03-30 07:06:47 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=6 bl=148 pwr=0
2025-03-30 07:06:47 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=7 bl=148 pwr=0
2025-03-30 07:06:47 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 07:06:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:06:47 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 07:06:47 [DEBUG] fake_trx.py:317 (BTS@172.18.26.20:5700) Recv FAKE_CI cmd
2025-03-30 07:06:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:06:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:06:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:06:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:06:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:06:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:06:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:06:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:06:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:06:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:06:48 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-03-30 07:06:48 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:06:48 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:06:48 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:06:48 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:06:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:06:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:06:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:06:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:06:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:06:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:06:48 [DEBUG] clck_gen.py:128 IND CLOCK 306
2025-03-30 07:06:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:06:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:06:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:06:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:06:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:06:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:06:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:06:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:06:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:06:49 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:06:49 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:06:49 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:06:49 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:06:49 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:06:49 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:06:49 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:06:49 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:06:49 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 07:06:49 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 07:06:49 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 07:06:49 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=407 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:06:49 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=407 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:06:49 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=407 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:06:49 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=407 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:06:49 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=407 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:06:49 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=407 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:06:49 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=408 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:06:49 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=408 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:06:49 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=408 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:06:49 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=408 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:06:49 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=408 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:06:49 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=408 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:06:49 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=408 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:06:49 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=408 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:06:54 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 07:06:54 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 07:06:54 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:06:54 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:06:54 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:06:54 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:06:54 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:06:54 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 07:06:54 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:06:54 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 07:06:54 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 07:06:54 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 07:06:54 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 07:06:54 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 07:06:54 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:06:54 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:06:54 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 07:06:54 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 07:06:54 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 07:06:54 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 07:06:54 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 07:06:54 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 07:06:54 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:06:54 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:06:54 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 07:06:54 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 07:06:54 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 07:06:54 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 07:06:54 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 07:06:54 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 07:06:54 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:06:54 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:06:54 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 07:06:54 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 07:06:54 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 07:06:54 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 07:06:54 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 07:06:54 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 07:06:54 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 07:06:54 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 07:06:54 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 07:06:54 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 07:06:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 07:06:54 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:06:54 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 07:06:54 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 07:06:54 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:06:54 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:06:54 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 07:06:54 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 07:06:54 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 07:06:54 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 07:06:54 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:06:54 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:06:54 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:06:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 07:06:54 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:06:54 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:06:54 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:06:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:06:54 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:06:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:06:54 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:06:54 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:06:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:06:54 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:06:54 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:06:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:06:54 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:06:54 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:06:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:06:54 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:06:54 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:06:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:06:54 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:06:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:06:54 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:06:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:06:54 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:06:54 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:06:54 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:06:54 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:06:54 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-03-30 07:06:54 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-03-30 07:06:54 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-03-30 07:06:54 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-03-30 07:06:54 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-03-30 07:06:54 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-03-30 07:06:54 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-03-30 07:06:54 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-03-30 07:06:54 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-03-30 07:06:54 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-03-30 07:06:54 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=0 bl=148 pwr=0
2025-03-30 07:06:54 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=1 bl=148 pwr=0
2025-03-30 07:06:54 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=2 bl=148 pwr=0
2025-03-30 07:06:54 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=3 bl=148 pwr=0
2025-03-30 07:06:54 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=4 bl=148 pwr=0
2025-03-30 07:06:54 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=5 bl=148 pwr=0
2025-03-30 07:06:54 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=6 bl=148 pwr=0
2025-03-30 07:06:54 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=7 bl=148 pwr=0
2025-03-30 07:06:54 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 07:06:54 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 07:06:54 [DEBUG] fake_trx.py:317 (BTS@172.18.26.20:5700) Recv FAKE_CI cmd
2025-03-30 07:06:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:06:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:06:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:06:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:06:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:06:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:06:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:06:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:06:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:06:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:06:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:06:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:06:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:06:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:06:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:06:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:06:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:06:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:06:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:06:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:06:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:06:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:06:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:06:54 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:06:54 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:06:54 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:06:54 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:06:54 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:06:54 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:06:54 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:06:54 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:06:54 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 07:06:54 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 07:06:54 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 07:06:54 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=141 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:06:54 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=141 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:06:54 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=141 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:06:54 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=141 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:06:54 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=141 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:06:54 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=141 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:06:59 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 07:06:59 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 07:06:59 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:06:59 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:06:59 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:06:59 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:06:59 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:06:59 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 07:06:59 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:06:59 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 07:06:59 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 07:06:59 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 07:06:59 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 07:06:59 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 07:06:59 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:06:59 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:06:59 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 07:06:59 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 07:06:59 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 07:06:59 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 07:06:59 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 07:06:59 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 07:06:59 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:06:59 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:06:59 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 07:06:59 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 07:06:59 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 07:06:59 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 07:06:59 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 07:06:59 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 07:06:59 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:06:59 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:06:59 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 07:06:59 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 07:06:59 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 07:06:59 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 07:06:59 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 07:06:59 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 07:06:59 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 07:06:59 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 07:06:59 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 07:06:59 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 07:06:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 07:06:59 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:06:59 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 07:06:59 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 07:06:59 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:06:59 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:06:59 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 07:06:59 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 07:06:59 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 07:06:59 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 07:06:59 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:06:59 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:06:59 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:06:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 07:06:59 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:06:59 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:06:59 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:06:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:06:59 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:06:59 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:06:59 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:06:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:06:59 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:06:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:06:59 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:06:59 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:06:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:06:59 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:06:59 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:06:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:06:59 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:06:59 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:06:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:06:59 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:06:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:06:59 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:06:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:06:59 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:06:59 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:06:59 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:06:59 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-03-30 07:07:00 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-03-30 07:07:00 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-03-30 07:07:00 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-03-30 07:07:00 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-03-30 07:07:00 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-03-30 07:07:00 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-03-30 07:07:00 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-03-30 07:07:00 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-03-30 07:07:00 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-03-30 07:07:00 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=0 bl=148 pwr=0
2025-03-30 07:07:00 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=1 bl=148 pwr=0
2025-03-30 07:07:00 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=2 bl=148 pwr=0
2025-03-30 07:07:00 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=3 bl=148 pwr=0
2025-03-30 07:07:00 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=4 bl=148 pwr=0
2025-03-30 07:07:00 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=5 bl=148 pwr=0
2025-03-30 07:07:00 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=6 bl=148 pwr=0
2025-03-30 07:07:00 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=7 bl=148 pwr=0
2025-03-30 07:07:00 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 07:07:00 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 07:07:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:07:00 [DEBUG] fake_trx.py:317 (BTS@172.18.26.20:5700) Recv FAKE_CI cmd
2025-03-30 07:07:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:07:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:07:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:07:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:07:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:07:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:07:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:07:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:07:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:07:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:07:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:07:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:07:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:07:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:07:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:07:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:07:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:07:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:07:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:07:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:07:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:07:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:07:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:07:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:07:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:07:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:07:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:07:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:07:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:07:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:07:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:07:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:07:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:07:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:07:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:07:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:07:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:07:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:07:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:07:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:07:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:07:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:07:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:07:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:07:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:07:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:07:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:07:00 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:07:00 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:07:00 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:07:00 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:07:00 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:07:00 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:07:00 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:07:00 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:07:00 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 07:07:00 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 07:07:00 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 07:07:05 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 07:07:05 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 07:07:05 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:07:05 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:07:05 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:07:05 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:07:05 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:07:05 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 07:07:05 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:07:05 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 07:07:05 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 07:07:05 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 07:07:05 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 07:07:05 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 07:07:05 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:07:05 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:07:05 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 07:07:05 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 07:07:05 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 07:07:05 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 07:07:05 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 07:07:05 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 07:07:05 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:07:05 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 07:07:05 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:07:05 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 07:07:05 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 07:07:05 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 07:07:05 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 07:07:05 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 07:07:05 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:07:05 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 07:07:05 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:07:05 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 07:07:05 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 07:07:05 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 07:07:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 07:07:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 07:07:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 07:07:05 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 07:07:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 07:07:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 07:07:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 07:07:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 07:07:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:07:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:07:05 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 07:07:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:07:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:07:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:07:05 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 07:07:05 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 07:07:05 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 07:07:05 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 07:07:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:07:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:07:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:07:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 07:07:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:07:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:07:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:07:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:07:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:07:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:07:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:07:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:07:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:07:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:07:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:07:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:07:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:07:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:07:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:07:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:07:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:07:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:07:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:07:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:07:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:07:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:07:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:07:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:07:05 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-03-30 07:07:05 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-03-30 07:07:05 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-03-30 07:07:05 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-03-30 07:07:05 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-03-30 07:07:05 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-03-30 07:07:05 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-03-30 07:07:05 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-03-30 07:07:05 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-03-30 07:07:05 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-03-30 07:07:05 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 07:07:05 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 07:07:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:07:05 [DEBUG] fake_trx.py:317 (BTS@172.18.26.20:5700) Recv FAKE_CI cmd
2025-03-30 07:07:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:07:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:07:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:07:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:07:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:07:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:07:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:07:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:07:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:07:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:07:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:07:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:07:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:07:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:07:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:07:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:07:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:07:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:07:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:07:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:07:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:07:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:07:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:07:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:07:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:07:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:07:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:07:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:07:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:07:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:07:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:07:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:07:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:07:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:07:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:07:06 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:07:06 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:07:06 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:07:06 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:07:06 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:07:06 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:07:06 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 07:07:06 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 07:07:06 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 07:07:06 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:07:06 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:07:06 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=140 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:07:06 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=140 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:07:06 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=140 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:07:06 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=140 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:07:06 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=140 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:07:06 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=140 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:07:06 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=140 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:07:11 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 07:07:11 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 07:07:11 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:07:11 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:07:11 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:07:11 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:07:11 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:07:11 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 07:07:11 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:07:11 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 07:07:11 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 07:07:11 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 07:07:11 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 07:07:11 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 07:07:11 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:07:11 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:07:11 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 07:07:11 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 07:07:11 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 07:07:11 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 07:07:11 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 07:07:11 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 07:07:11 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:07:11 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:07:11 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 07:07:11 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 07:07:11 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 07:07:11 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 07:07:11 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 07:07:11 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 07:07:11 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:07:11 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:07:11 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 07:07:11 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 07:07:11 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 07:07:11 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 07:07:11 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 07:07:11 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 07:07:11 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 07:07:11 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 07:07:11 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 07:07:11 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 07:07:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 07:07:11 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:07:11 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 07:07:11 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 07:07:11 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:07:11 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:07:11 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 07:07:11 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 07:07:11 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 07:07:11 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 07:07:11 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:07:11 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:07:11 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:07:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 07:07:11 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:07:11 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:07:11 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:07:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:07:11 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:07:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:07:11 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:07:11 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:07:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:07:11 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:07:11 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:07:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:07:11 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:07:11 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:07:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:07:11 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:07:11 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:07:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:07:11 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:07:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:07:11 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:07:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:07:11 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:07:11 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:07:11 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:07:11 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:07:11 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-03-30 07:07:11 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-03-30 07:07:11 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-03-30 07:07:11 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-03-30 07:07:11 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-03-30 07:07:11 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-03-30 07:07:11 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-03-30 07:07:11 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-03-30 07:07:11 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-03-30 07:07:11 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-03-30 07:07:11 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=0 bl=148 pwr=0
2025-03-30 07:07:11 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=1 bl=148 pwr=0
2025-03-30 07:07:11 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=2 bl=148 pwr=0
2025-03-30 07:07:11 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=3 bl=148 pwr=0
2025-03-30 07:07:11 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=4 bl=148 pwr=0
2025-03-30 07:07:11 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=5 bl=148 pwr=0
2025-03-30 07:07:11 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=6 bl=148 pwr=0
2025-03-30 07:07:11 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=7 bl=148 pwr=0
2025-03-30 07:07:11 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 07:07:11 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 07:07:11 [DEBUG] fake_trx.py:317 (BTS@172.18.26.20:5700) Recv FAKE_CI cmd
2025-03-30 07:07:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:07:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:07:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:07:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:07:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:07:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:07:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:07:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:07:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:07:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:07:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:07:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:07:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:07:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:07:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:07:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:07:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:07:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:07:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:07:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:07:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:07:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:07:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:07:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:07:11 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:07:11 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:07:11 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:07:11 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:07:11 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:07:11 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:07:11 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:07:11 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 07:07:11 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 07:07:11 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 07:07:11 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:07:16 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 07:07:16 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 07:07:16 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:07:16 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:07:16 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:07:16 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:07:16 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:07:16 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 07:07:16 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:07:16 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 07:07:16 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 07:07:16 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 07:07:16 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 07:07:16 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 07:07:16 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:07:16 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:07:16 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 07:07:16 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 07:07:16 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 07:07:16 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 07:07:16 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 07:07:16 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 07:07:16 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:07:16 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:07:16 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 07:07:16 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 07:07:16 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 07:07:16 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 07:07:16 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 07:07:16 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 07:07:16 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:07:16 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:07:16 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 07:07:16 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 07:07:16 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 07:07:16 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 07:07:16 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 07:07:16 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 07:07:16 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 07:07:16 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 07:07:16 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 07:07:16 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 07:07:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 07:07:16 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:07:16 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 07:07:16 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 07:07:16 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:07:16 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:07:16 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 07:07:16 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 07:07:16 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 07:07:16 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 07:07:16 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:07:16 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:07:16 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:07:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 07:07:16 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:07:16 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:07:16 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:07:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:07:16 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:07:16 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:07:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:07:16 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:07:16 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:07:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:07:16 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:07:16 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:07:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:07:16 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:07:16 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:07:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:07:16 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:07:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:07:16 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:07:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:07:16 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:07:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:07:16 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:07:16 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:07:16 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:07:16 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:07:16 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-03-30 07:07:17 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-03-30 07:07:17 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-03-30 07:07:17 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-03-30 07:07:17 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-03-30 07:07:17 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-03-30 07:07:17 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-03-30 07:07:17 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-03-30 07:07:17 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-03-30 07:07:17 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-03-30 07:07:17 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=0 bl=148 pwr=0
2025-03-30 07:07:17 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=1 bl=148 pwr=0
2025-03-30 07:07:17 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=2 bl=148 pwr=0
2025-03-30 07:07:17 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=3 bl=148 pwr=0
2025-03-30 07:07:17 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=4 bl=148 pwr=0
2025-03-30 07:07:17 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=5 bl=148 pwr=0
2025-03-30 07:07:17 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=6 bl=148 pwr=0
2025-03-30 07:07:17 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=7 bl=148 pwr=0
2025-03-30 07:07:17 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 07:07:17 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 07:07:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:07:17 [DEBUG] fake_trx.py:317 (BTS@172.18.26.20:5700) Recv FAKE_CI cmd
2025-03-30 07:07:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:07:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:07:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:07:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:07:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:07:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:07:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:07:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:07:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:07:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:07:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:07:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:07:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:07:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:07:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:07:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:07:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:07:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:07:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:07:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:07:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:07:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:07:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:07:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:07:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:07:17 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:07:17 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:07:17 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:07:17 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:07:17 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:07:17 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:07:17 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:07:17 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:07:17 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 07:07:17 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 07:07:17 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 07:07:22 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 07:07:22 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 07:07:22 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:07:22 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:07:22 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:07:22 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:07:22 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:07:22 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 07:07:22 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:07:22 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 07:07:22 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 07:07:22 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 07:07:22 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 07:07:22 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 07:07:22 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:07:22 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:07:22 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 07:07:22 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 07:07:22 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 07:07:22 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 07:07:22 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 07:07:22 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 07:07:22 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:07:22 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:07:22 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 07:07:22 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 07:07:22 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 07:07:22 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 07:07:22 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 07:07:22 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 07:07:22 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:07:22 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:07:22 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 07:07:22 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 07:07:22 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 07:07:22 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 07:07:22 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 07:07:22 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 07:07:22 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 07:07:22 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 07:07:22 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 07:07:22 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 07:07:22 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 07:07:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 07:07:22 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:07:22 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:07:22 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 07:07:22 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:07:22 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:07:22 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:07:22 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 07:07:22 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 07:07:22 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 07:07:22 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 07:07:22 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:07:22 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:07:22 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:07:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 07:07:22 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:07:22 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:07:22 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:07:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:07:22 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:07:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:07:22 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:07:22 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:07:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:07:22 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:07:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:07:22 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:07:22 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:07:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:07:22 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:07:22 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:07:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:07:22 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:07:22 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:07:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:07:22 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:07:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:07:22 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:07:22 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:07:22 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-03-30 07:07:22 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-03-30 07:07:22 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-03-30 07:07:22 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-03-30 07:07:22 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-03-30 07:07:22 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-03-30 07:07:22 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-03-30 07:07:22 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-03-30 07:07:22 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-03-30 07:07:22 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-03-30 07:07:22 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=0 bl=148 pwr=0
2025-03-30 07:07:22 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=1 bl=148 pwr=0
2025-03-30 07:07:22 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=2 bl=148 pwr=0
2025-03-30 07:07:22 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=3 bl=148 pwr=0
2025-03-30 07:07:22 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=4 bl=148 pwr=0
2025-03-30 07:07:22 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=5 bl=148 pwr=0
2025-03-30 07:07:22 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=6 bl=148 pwr=0
2025-03-30 07:07:22 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=7 bl=148 pwr=0
2025-03-30 07:07:22 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 07:07:22 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 07:07:22 [DEBUG] fake_trx.py:317 (BTS@172.18.26.20:5700) Recv FAKE_CI cmd
2025-03-30 07:07:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:07:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:07:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:07:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:07:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:07:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:07:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:07:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:07:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:07:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:07:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:07:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:07:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:07:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:07:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:07:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:07:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:07:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:07:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:07:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:07:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:07:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:07:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:07:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:07:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:07:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:07:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:07:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:07:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:07:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:07:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:07:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:07:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:07:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:07:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:07:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:07:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:07:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:07:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:07:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:07:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:07:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:07:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:07:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:07:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:07:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:07:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:07:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:07:23 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:07:23 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:07:23 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:07:23 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:07:23 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:07:23 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:07:23 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:07:23 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:07:23 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 07:07:23 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 07:07:23 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 07:07:28 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 07:07:28 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 07:07:28 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:07:28 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:07:28 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:07:28 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:07:28 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:07:28 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 07:07:28 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:07:28 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 07:07:28 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 07:07:28 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 07:07:28 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 07:07:28 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 07:07:28 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:07:28 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:07:28 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 07:07:28 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 07:07:28 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 07:07:28 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 07:07:28 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 07:07:28 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 07:07:28 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:07:28 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:07:28 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 07:07:28 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 07:07:28 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 07:07:28 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 07:07:28 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 07:07:28 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 07:07:28 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:07:28 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:07:28 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 07:07:28 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 07:07:28 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 07:07:28 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 07:07:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 07:07:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 07:07:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 07:07:28 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 07:07:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 07:07:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 07:07:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 07:07:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 07:07:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:07:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:07:28 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 07:07:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:07:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:07:28 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 07:07:28 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 07:07:28 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 07:07:28 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 07:07:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:07:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:07:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:07:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 07:07:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:07:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:07:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:07:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:07:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:07:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:07:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:07:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:07:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:07:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:07:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:07:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:07:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:07:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:07:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:07:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:07:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:07:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:07:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:07:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:07:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:07:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:07:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:07:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:07:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:07:28 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-03-30 07:07:28 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-03-30 07:07:28 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-03-30 07:07:28 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-03-30 07:07:28 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-03-30 07:07:28 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-03-30 07:07:28 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-03-30 07:07:28 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-03-30 07:07:28 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-03-30 07:07:28 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-03-30 07:07:28 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=0 bl=148 pwr=0
2025-03-30 07:07:28 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=1 bl=148 pwr=0
2025-03-30 07:07:28 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=2 bl=148 pwr=0
2025-03-30 07:07:28 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=3 bl=148 pwr=0
2025-03-30 07:07:28 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=4 bl=148 pwr=0
2025-03-30 07:07:28 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=5 bl=148 pwr=0
2025-03-30 07:07:28 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=6 bl=148 pwr=0
2025-03-30 07:07:28 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=7 bl=148 pwr=0
2025-03-30 07:07:28 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 07:07:28 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 07:07:28 [DEBUG] fake_trx.py:317 (BTS@172.18.26.20:5700) Recv FAKE_CI cmd
2025-03-30 07:07:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:07:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:07:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:07:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:07:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:07:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:07:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:07:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:07:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:07:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:07:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:07:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:07:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:07:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:07:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:07:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:07:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:07:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:07:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:07:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:07:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:07:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:07:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:07:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:07:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:07:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:07:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:07:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:07:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:07:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:07:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:07:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:07:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:07:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:07:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:07:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:07:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:07:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:07:28 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:07:28 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:07:28 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:07:28 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:07:28 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:07:28 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:07:28 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:07:28 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:07:28 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 07:07:28 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 07:07:28 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 07:07:28 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=140 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:07:28 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=140 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:07:28 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=140 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:07:28 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=140 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:07:28 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=140 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:07:28 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=140 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:07:28 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=140 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:07:28 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=140 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:07:33 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 07:07:33 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 07:07:33 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:07:33 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:07:33 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:07:33 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:07:33 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:07:33 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 07:07:33 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:07:33 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 07:07:33 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 07:07:33 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 07:07:33 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 07:07:33 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 07:07:33 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:07:33 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:07:33 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 07:07:33 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 07:07:33 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 07:07:33 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 07:07:33 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 07:07:33 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 07:07:33 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:07:33 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:07:33 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 07:07:33 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 07:07:33 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 07:07:33 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 07:07:33 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 07:07:33 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 07:07:33 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:07:33 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:07:33 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 07:07:33 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 07:07:33 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 07:07:33 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 07:07:33 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 07:07:33 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 07:07:33 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 07:07:33 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 07:07:33 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 07:07:33 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 07:07:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 07:07:33 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:07:33 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 07:07:33 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 07:07:33 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:07:33 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:07:33 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 07:07:33 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 07:07:33 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 07:07:33 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 07:07:33 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:07:33 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:07:33 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:07:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 07:07:33 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:07:33 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:07:33 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:07:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:07:33 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:07:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:07:33 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:07:33 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:07:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:07:33 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:07:33 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:07:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:07:33 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:07:33 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:07:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:07:33 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:07:33 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:07:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:07:33 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:07:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:07:33 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:07:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:07:33 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:07:33 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:07:33 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:07:33 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:07:33 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-03-30 07:07:34 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-03-30 07:07:34 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-03-30 07:07:34 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-03-30 07:07:34 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-03-30 07:07:34 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-03-30 07:07:34 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-03-30 07:07:34 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-03-30 07:07:34 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-03-30 07:07:34 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-03-30 07:07:34 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=0 bl=148 pwr=0
2025-03-30 07:07:34 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=1 bl=148 pwr=0
2025-03-30 07:07:34 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=2 bl=148 pwr=0
2025-03-30 07:07:34 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=3 bl=148 pwr=0
2025-03-30 07:07:34 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=4 bl=148 pwr=0
2025-03-30 07:07:34 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=5 bl=148 pwr=0
2025-03-30 07:07:34 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=6 bl=148 pwr=0
2025-03-30 07:07:34 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=7 bl=148 pwr=0
2025-03-30 07:07:34 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 07:07:34 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 07:07:34 [DEBUG] fake_trx.py:317 (BTS@172.18.26.20:5700) Recv FAKE_CI cmd
2025-03-30 07:07:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:07:34 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:07:34 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:07:34 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:07:34 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:07:34 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:07:34 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:07:34 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 07:07:34 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 07:07:34 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-03-30 07:07:34 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:07:34 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:07:34 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:07:34 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:07:35 [DEBUG] clck_gen.py:128 IND CLOCK 306
2025-03-30 07:07:35 [DEBUG] clck_gen.py:128 IND CLOCK 408
2025-03-30 07:07:35 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:07:35 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:07:35 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:07:35 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:07:36 [DEBUG] clck_gen.py:128 IND CLOCK 510
2025-03-30 07:07:36 [DEBUG] clck_gen.py:128 IND CLOCK 612
2025-03-30 07:07:36 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:07:36 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:07:36 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:07:36 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:07:37 [DEBUG] clck_gen.py:128 IND CLOCK 714
2025-03-30 07:07:37 [DEBUG] clck_gen.py:128 IND CLOCK 816
2025-03-30 07:07:37 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:07:37 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:07:37 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:07:37 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:07:37 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:07:37 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:07:37 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:07:37 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:07:37 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:07:37 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:07:37 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 07:07:37 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 07:07:37 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 07:07:37 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=868 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:07:37 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=868 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:07:37 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=868 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:07:37 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=868 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:07:37 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=868 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:07:37 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=868 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:07:42 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 07:07:42 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 07:07:42 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:07:42 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:07:42 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:07:42 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:07:42 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:07:42 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 07:07:42 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:07:42 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 07:07:42 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 07:07:42 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 07:07:42 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 07:07:42 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 07:07:42 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:07:42 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:07:42 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 07:07:42 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 07:07:42 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 07:07:42 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 07:07:42 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 07:07:42 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 07:07:42 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:07:42 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:07:42 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 07:07:42 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 07:07:42 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 07:07:42 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 07:07:42 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 07:07:42 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 07:07:42 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:07:42 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:07:42 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 07:07:42 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 07:07:42 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 07:07:42 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 07:07:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 07:07:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 07:07:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 07:07:42 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 07:07:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 07:07:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 07:07:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 07:07:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:07:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 07:07:42 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 07:07:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:07:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:07:42 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 07:07:42 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 07:07:42 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 07:07:42 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 07:07:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:07:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:07:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:07:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 07:07:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:07:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:07:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:07:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:07:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:07:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:07:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:07:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:07:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:07:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:07:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:07:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:07:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:07:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:07:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:07:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:07:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:07:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:07:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:07:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:07:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:07:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:07:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:07:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:07:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:07:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:07:42 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-03-30 07:07:43 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-03-30 07:07:43 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-03-30 07:07:43 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-03-30 07:07:43 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-03-30 07:07:43 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-03-30 07:07:43 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-03-30 07:07:43 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-03-30 07:07:43 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-03-30 07:07:43 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-03-30 07:07:43 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=0 bl=148 pwr=0
2025-03-30 07:07:43 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=1 bl=148 pwr=0
2025-03-30 07:07:43 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=2 bl=148 pwr=0
2025-03-30 07:07:43 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=3 bl=148 pwr=0
2025-03-30 07:07:43 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=4 bl=148 pwr=0
2025-03-30 07:07:43 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=5 bl=148 pwr=0
2025-03-30 07:07:43 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=6 bl=148 pwr=0
2025-03-30 07:07:43 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=7 bl=148 pwr=0
2025-03-30 07:07:43 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 07:07:43 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 07:07:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:07:43 [DEBUG] fake_trx.py:317 (BTS@172.18.26.20:5700) Recv FAKE_CI cmd
2025-03-30 07:07:43 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:07:43 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:07:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:07:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:07:43 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:07:43 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:07:43 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 07:07:43 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 07:07:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD HANDOVER
2025-03-30 07:07:43 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:07:43 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:07:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:07:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:07:43 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-03-30 07:07:43 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:07:43 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:07:43 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:07:43 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:07:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:07:43 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:07:43 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:07:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:07:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:07:43 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:07:43 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:07:43 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 07:07:43 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 07:07:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:07:43 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:07:43 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:07:43 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:07:43 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:07:43 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:07:43 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:07:43 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:07:43 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:07:43 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:07:43 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:07:43 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 07:07:43 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 07:07:43 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 07:07:48 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 07:07:48 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 07:07:49 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:07:49 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:07:49 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:07:49 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:07:49 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:07:49 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 07:07:49 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:07:49 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 07:07:49 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 07:07:49 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 07:07:49 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 07:07:49 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 07:07:49 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:07:49 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:07:49 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 07:07:49 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 07:07:49 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 07:07:49 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 07:07:49 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 07:07:49 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 07:07:49 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:07:49 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:07:49 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 07:07:49 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 07:07:49 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 07:07:49 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 07:07:49 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 07:07:49 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 07:07:49 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:07:49 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:07:49 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 07:07:49 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 07:07:49 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 07:07:49 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 07:07:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 07:07:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 07:07:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 07:07:49 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 07:07:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 07:07:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 07:07:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 07:07:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:07:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 07:07:49 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 07:07:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:07:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:07:49 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 07:07:49 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 07:07:49 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 07:07:49 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 07:07:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:07:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:07:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:07:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 07:07:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:07:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:07:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:07:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:07:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:07:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:07:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:07:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:07:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:07:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:07:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:07:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:07:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:07:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:07:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:07:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:07:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:07:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:07:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:07:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:07:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:07:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:07:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:07:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:07:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:07:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:07:49 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-03-30 07:07:49 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-03-30 07:07:49 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-03-30 07:07:49 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-03-30 07:07:49 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-03-30 07:07:49 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-03-30 07:07:49 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-03-30 07:07:49 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-03-30 07:07:49 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-03-30 07:07:49 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-03-30 07:07:49 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=0 bl=148 pwr=0
2025-03-30 07:07:49 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=1 bl=148 pwr=0
2025-03-30 07:07:49 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=2 bl=148 pwr=0
2025-03-30 07:07:49 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=3 bl=148 pwr=0
2025-03-30 07:07:49 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=4 bl=148 pwr=0
2025-03-30 07:07:49 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=5 bl=148 pwr=0
2025-03-30 07:07:49 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=6 bl=148 pwr=0
2025-03-30 07:07:49 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=7 bl=148 pwr=0
2025-03-30 07:07:49 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 07:07:49 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 07:07:49 [DEBUG] fake_trx.py:317 (BTS@172.18.26.20:5700) Recv FAKE_CI cmd
2025-03-30 07:07:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:07:49 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:07:49 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:07:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:07:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:07:49 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:07:49 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:07:49 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 07:07:49 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 07:07:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD HANDOVER
2025-03-30 07:07:49 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:07:49 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:07:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:07:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:07:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:07:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:07:49 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:07:49 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:07:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:07:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:07:49 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:07:49 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:07:49 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 07:07:49 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 07:07:49 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-03-30 07:07:50 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:07:50 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:07:50 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:07:50 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:07:50 [DEBUG] clck_gen.py:128 IND CLOCK 306
2025-03-30 07:07:50 [DEBUG] clck_gen.py:128 IND CLOCK 408
2025-03-30 07:07:51 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:07:51 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:07:51 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:07:51 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:07:51 [DEBUG] clck_gen.py:128 IND CLOCK 510
2025-03-30 07:07:51 [DEBUG] clck_gen.py:128 IND CLOCK 612
2025-03-30 07:07:52 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:07:52 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:07:52 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:07:52 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:07:52 [DEBUG] clck_gen.py:128 IND CLOCK 714
2025-03-30 07:07:52 [DEBUG] clck_gen.py:128 IND CLOCK 816
2025-03-30 07:07:53 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:07:53 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:07:53 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:07:53 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:07:53 [DEBUG] clck_gen.py:128 IND CLOCK 918
2025-03-30 07:07:53 [DEBUG] clck_gen.py:128 IND CLOCK 1020
2025-03-30 07:07:54 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:07:54 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:07:54 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:07:54 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:07:54 [DEBUG] clck_gen.py:128 IND CLOCK 1122
2025-03-30 07:07:54 [DEBUG] clck_gen.py:128 IND CLOCK 1224
2025-03-30 07:07:55 [DEBUG] clck_gen.py:128 IND CLOCK 1326
2025-03-30 07:07:55 [DEBUG] clck_gen.py:128 IND CLOCK 1428
2025-03-30 07:07:56 [DEBUG] clck_gen.py:128 IND CLOCK 1530
2025-03-30 07:07:56 [DEBUG] clck_gen.py:128 IND CLOCK 1632
2025-03-30 07:07:57 [DEBUG] clck_gen.py:128 IND CLOCK 1734
2025-03-30 07:07:57 [DEBUG] clck_gen.py:128 IND CLOCK 1836
2025-03-30 07:07:57 [DEBUG] clck_gen.py:128 IND CLOCK 1938
2025-03-30 07:07:58 [DEBUG] clck_gen.py:128 IND CLOCK 2040
2025-03-30 07:07:58 [DEBUG] clck_gen.py:128 IND CLOCK 2142
2025-03-30 07:07:59 [DEBUG] clck_gen.py:128 IND CLOCK 2244
2025-03-30 07:07:59 [DEBUG] clck_gen.py:128 IND CLOCK 2346
2025-03-30 07:08:00 [DEBUG] clck_gen.py:128 IND CLOCK 2448
2025-03-30 07:08:00 [DEBUG] clck_gen.py:128 IND CLOCK 2550
2025-03-30 07:08:01 [DEBUG] clck_gen.py:128 IND CLOCK 2652
2025-03-30 07:08:01 [DEBUG] clck_gen.py:128 IND CLOCK 2754
2025-03-30 07:08:02 [DEBUG] clck_gen.py:128 IND CLOCK 2856
2025-03-30 07:08:02 [DEBUG] clck_gen.py:128 IND CLOCK 2958
2025-03-30 07:08:03 [DEBUG] clck_gen.py:128 IND CLOCK 3060
2025-03-30 07:08:03 [DEBUG] clck_gen.py:128 IND CLOCK 3162
2025-03-30 07:08:04 [DEBUG] clck_gen.py:128 IND CLOCK 3264
2025-03-30 07:08:04 [DEBUG] clck_gen.py:128 IND CLOCK 3366
2025-03-30 07:08:05 [DEBUG] clck_gen.py:128 IND CLOCK 3468
2025-03-30 07:08:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:08:05 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:08:05 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:08:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:08:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:08:05 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:08:05 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:08:05 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 07:08:05 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 07:08:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:08:05 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:08:05 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:08:05 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:08:05 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:08:05 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:08:05 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:08:05 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:08:05 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:08:05 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:08:05 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:08:05 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 07:08:05 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 07:08:05 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 07:08:05 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=3544 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:08:05 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=3544 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:08:05 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=3544 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:08:05 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=3544 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:08:05 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=3544 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:08:05 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=3544 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:08:05 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=3544 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:08:05 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=3545 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:08:05 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=3545 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:08:05 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=3545 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:08:05 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=3545 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:08:05 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=3545 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:08:05 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=3545 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:08:05 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=3545 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:08:05 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=3545 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:08:10 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 07:08:10 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 07:08:10 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:08:10 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:08:10 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:08:10 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:08:10 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:08:10 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 07:08:10 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:08:10 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 07:08:10 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 07:08:10 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 07:08:10 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 07:08:10 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 07:08:10 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:08:10 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:08:10 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 07:08:10 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 07:08:10 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 07:08:10 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 07:08:10 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 07:08:10 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 07:08:10 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:08:10 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:08:10 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 07:08:10 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 07:08:10 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 07:08:10 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 07:08:10 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 07:08:10 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 07:08:10 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:08:10 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:08:10 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 07:08:10 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 07:08:10 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 07:08:10 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 07:08:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 07:08:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 07:08:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 07:08:10 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 07:08:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 07:08:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 07:08:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 07:08:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 07:08:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:08:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:08:10 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 07:08:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:08:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:08:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:08:10 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 07:08:10 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 07:08:10 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 07:08:10 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 07:08:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:08:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:08:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:08:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 07:08:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:08:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:08:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:08:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:08:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:08:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:08:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:08:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:08:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:08:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:08:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:08:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:08:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:08:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:08:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:08:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:08:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:08:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:08:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:08:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:08:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:08:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:08:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:08:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:08:10 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-03-30 07:08:10 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-03-30 07:08:10 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-03-30 07:08:10 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-03-30 07:08:10 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-03-30 07:08:10 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-03-30 07:08:10 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-03-30 07:08:10 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-03-30 07:08:10 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-03-30 07:08:10 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-03-30 07:08:10 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=4 bl=148 pwr=0
2025-03-30 07:08:10 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=5 bl=148 pwr=0
2025-03-30 07:08:10 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=6 bl=148 pwr=0
2025-03-30 07:08:10 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=7 bl=148 pwr=0
2025-03-30 07:08:10 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 07:08:10 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 07:08:10 [DEBUG] fake_trx.py:317 (BTS@172.18.26.20:5700) Recv FAKE_CI cmd
2025-03-30 07:08:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:08:10 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:08:10 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:08:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:08:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:08:10 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:08:10 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:08:10 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 07:08:10 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 07:08:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD HANDOVER
2025-03-30 07:08:11 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:08:11 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:08:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:08:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:08:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:08:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD HANDOVER
2025-03-30 07:08:11 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-03-30 07:08:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:08:11 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:08:11 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:08:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:08:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:08:11 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:08:11 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:08:11 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 07:08:11 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 07:08:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:08:11 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:08:11 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:08:11 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:08:11 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:08:11 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:08:11 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:08:11 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:08:11 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:08:11 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:08:11 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:08:11 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:08:11 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:08:11 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:08:11 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:08:11 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 07:08:11 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 07:08:11 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 07:08:11 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=222 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:08:11 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=222 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:08:11 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=222 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:08:11 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=222 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:08:11 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=222 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:08:11 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=222 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:08:16 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 07:08:16 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 07:08:16 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:08:16 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:08:16 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:08:16 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:08:16 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:08:16 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 07:08:16 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:08:16 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 07:08:16 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 07:08:16 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 07:08:16 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 07:08:16 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 07:08:16 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:08:16 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:08:16 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 07:08:16 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 07:08:16 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 07:08:16 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 07:08:16 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 07:08:16 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 07:08:16 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:08:16 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:08:16 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 07:08:16 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 07:08:16 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 07:08:16 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 07:08:16 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 07:08:16 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 07:08:16 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:08:16 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:08:16 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 07:08:16 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 07:08:16 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 07:08:16 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 07:08:16 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 07:08:16 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 07:08:16 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 07:08:16 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 07:08:16 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 07:08:16 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 07:08:16 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 07:08:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 07:08:16 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:08:16 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:08:16 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 07:08:16 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:08:16 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:08:16 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:08:16 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 07:08:16 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 07:08:16 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 07:08:16 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 07:08:16 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:08:16 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:08:16 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:08:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 07:08:16 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:08:16 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:08:16 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:08:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:08:16 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:08:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:08:16 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:08:16 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:08:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:08:16 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:08:16 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:08:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:08:16 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:08:16 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:08:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:08:16 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:08:16 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:08:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:08:16 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:08:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:08:16 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:08:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:08:16 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:08:16 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:08:16 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-03-30 07:08:16 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-03-30 07:08:16 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-03-30 07:08:16 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-03-30 07:08:16 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-03-30 07:08:16 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-03-30 07:08:16 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-03-30 07:08:16 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-03-30 07:08:16 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-03-30 07:08:16 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-03-30 07:08:16 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=0 bl=148 pwr=0
2025-03-30 07:08:16 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=1 bl=148 pwr=0
2025-03-30 07:08:16 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=2 bl=148 pwr=0
2025-03-30 07:08:16 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=3 bl=148 pwr=0
2025-03-30 07:08:16 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=4 bl=148 pwr=0
2025-03-30 07:08:16 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=5 bl=148 pwr=0
2025-03-30 07:08:16 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=6 bl=148 pwr=0
2025-03-30 07:08:16 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=7 bl=148 pwr=0
2025-03-30 07:08:16 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 07:08:16 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 07:08:16 [DEBUG] fake_trx.py:317 (BTS@172.18.26.20:5700) Recv FAKE_CI cmd
2025-03-30 07:08:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:08:17 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:08:17 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:08:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:08:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:08:17 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:08:17 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:08:17 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 07:08:17 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 07:08:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD HANDOVER
2025-03-30 07:08:17 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:08:17 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:08:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:08:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:08:17 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-03-30 07:08:17 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:08:17 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:08:17 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:08:17 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:08:17 [DEBUG] clck_gen.py:128 IND CLOCK 306
2025-03-30 07:08:18 [DEBUG] clck_gen.py:128 IND CLOCK 408
2025-03-30 07:08:18 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:08:18 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:08:18 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:08:18 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:08:18 [DEBUG] clck_gen.py:128 IND CLOCK 510
2025-03-30 07:08:19 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:08:19 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:08:19 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:08:19 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:08:19 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:08:19 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:08:19 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:08:19 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 07:08:19 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 07:08:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:08:19 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:08:19 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:08:19 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:08:19 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:08:19 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:08:19 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:08:19 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:08:19 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:08:19 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:08:19 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:08:19 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 07:08:19 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 07:08:19 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 07:08:24 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 07:08:24 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 07:08:24 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:08:24 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:08:24 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:08:24 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:08:24 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:08:24 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 07:08:24 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:08:24 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 07:08:24 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 07:08:24 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 07:08:24 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 07:08:24 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 07:08:24 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:08:24 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:08:24 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 07:08:24 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 07:08:24 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 07:08:24 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 07:08:24 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 07:08:24 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 07:08:24 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:08:24 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:08:24 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 07:08:24 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 07:08:24 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 07:08:24 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 07:08:24 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 07:08:24 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 07:08:24 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:08:24 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:08:24 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 07:08:24 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 07:08:24 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 07:08:24 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 07:08:24 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 07:08:24 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 07:08:24 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 07:08:24 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 07:08:24 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 07:08:24 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 07:08:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 07:08:24 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:08:24 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 07:08:24 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 07:08:24 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:08:24 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:08:24 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 07:08:24 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 07:08:24 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 07:08:24 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 07:08:24 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:08:24 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:08:24 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:08:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 07:08:24 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:08:24 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:08:24 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:08:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:08:24 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:08:24 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:08:24 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:08:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:08:24 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:08:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:08:24 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:08:24 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:08:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:08:24 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:08:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:08:24 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:08:24 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:08:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:08:24 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:08:24 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:08:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:08:24 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:08:24 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:08:24 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:08:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:08:24 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:08:24 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:08:24 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:08:24 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:08:24 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 07:08:24 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 07:08:24 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 07:08:24 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:08:30 [INFO] transceiver.py:157 Init transceiver 'BTS@172.18.26.20:5700'
2025-03-30 07:08:30 [DEBUG] data_if.py:31 Init TRXD interface (L:0.0.0.0:5702 <-> R:172.18.26.20:5802)
2025-03-30 07:08:30 [DEBUG] ctrl_if.py:29 Init TRXC interface (L:0.0.0.0:5701 <-> R:172.18.26.20:5801)
2025-03-30 07:08:30 [INFO] transceiver.py:157 Init transceiver 'MS@172.18.26.22:6700'
2025-03-30 07:08:30 [DEBUG] data_if.py:31 Init TRXD interface (L:0.0.0.0:6702 <-> R:172.18.26.22:6802)
2025-03-30 07:08:30 [DEBUG] ctrl_if.py:29 Init TRXC interface (L:0.0.0.0:6701 <-> R:172.18.26.22:6801)
2025-03-30 07:08:30 [INFO] transceiver.py:157 Init transceiver 'TRX1@172.18.26.20:5700/1'
2025-03-30 07:08:30 [DEBUG] data_if.py:31 Init TRXD interface (L:0.0.0.0:5704 <-> R:172.18.26.20:5804)
2025-03-30 07:08:30 [DEBUG] ctrl_if.py:29 Init TRXC interface (L:0.0.0.0:5703 <-> R:172.18.26.20:5803)
2025-03-30 07:08:30 [INFO] transceiver.py:157 Init transceiver 'TRX2@172.18.26.20:5700/2'
2025-03-30 07:08:30 [DEBUG] data_if.py:31 Init TRXD interface (L:0.0.0.0:5706 <-> R:172.18.26.20:5806)
2025-03-30 07:08:30 [DEBUG] ctrl_if.py:29 Init TRXC interface (L:0.0.0.0:5705 <-> R:172.18.26.20:5805)
2025-03-30 07:08:30 [INFO] transceiver.py:157 Init transceiver 'TRX3@172.18.26.20:5700/3'
2025-03-30 07:08:30 [DEBUG] data_if.py:31 Init TRXD interface (L:0.0.0.0:5708 <-> R:172.18.26.20:5808)
2025-03-30 07:08:30 [DEBUG] ctrl_if.py:29 Init TRXC interface (L:0.0.0.0:5707 <-> R:172.18.26.20:5807)
2025-03-30 07:08:30 [INFO] fake_trx.py:426 Init complete
2025-03-30 07:08:30 [INFO] fake_trx.py:457 Setting real time process scheduler to SCHED_RR, priority 30
2025-03-30 07:08:31 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 07:08:31 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 07:08:31 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:08:31 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:08:31 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:08:31 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:08:43 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:08:43 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:08:43 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:08:43 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:08:48 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 07:08:48 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 07:08:48 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:08:48 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:08:48 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:08:48 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:08:48 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:08:48 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:08:48 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:08:48 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:08:53 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 07:08:53 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 07:08:53 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:08:53 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:08:53 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:08:53 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:08:53 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:08:53 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:08:53 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:08:53 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:08:58 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 07:08:58 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 07:08:58 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:08:58 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:08:58 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:08:58 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:08:58 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:08:58 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:08:58 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:08:58 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:09:03 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 07:09:03 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 07:09:03 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:09:03 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:09:03 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:09:03 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:09:03 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:09:03 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:09:03 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:09:03 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:09:08 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 07:09:08 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 07:09:08 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:09:08 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:09:08 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:09:08 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:09:08 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:09:08 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:09:08 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:09:08 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:09:13 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 07:09:13 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 07:09:13 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:09:13 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:09:13 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:09:13 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:09:13 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:09:13 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:09:13 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:09:13 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:09:18 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 07:09:18 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 07:09:18 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:09:18 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:09:18 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:09:18 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:09:18 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:09:18 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:09:18 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:09:18 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:09:23 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 07:09:23 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 07:09:23 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:09:23 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:09:23 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:09:23 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:09:23 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:09:23 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:09:23 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:09:23 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:09:28 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 07:09:28 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 07:09:28 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:09:28 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:09:28 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:09:28 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:09:28 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:09:28 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:09:28 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:09:28 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:09:33 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 07:09:33 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 07:09:33 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:09:33 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:09:33 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:09:33 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:09:33 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 07:09:33 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 07:09:33 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 07:09:33 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 07:09:33 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 07:09:33 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 07:09:33 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:09:33 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 07:09:33 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:09:33 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 07:09:33 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:09:33 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 07:09:33 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:09:33 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 07:09:33 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 0 -> 1
2025-03-30 07:09:33 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 07:09:33 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 0 -> 1
2025-03-30 07:09:33 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 07:09:33 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 0 -> 1
2025-03-30 07:09:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 07:09:33 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 07:09:33 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 07:09:33 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 0 -> 1
2025-03-30 07:09:33 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:09:33 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:09:33 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:09:33 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:09:38 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 07:09:38 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 07:09:38 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:09:38 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:09:38 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:09:38 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:09:38 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:09:38 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:09:38 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:09:38 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:09:43 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 07:09:43 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 07:09:43 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:09:43 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:09:43 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:09:43 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:09:43 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 07:09:43 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:09:43 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 07:09:43 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 07:09:43 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:09:43 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:09:43 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:09:43 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:09:48 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 07:09:48 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 07:09:48 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:09:48 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:09:48 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:09:48 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:09:48 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:09:48 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:09:48 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:09:48 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:09:53 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 07:09:53 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 07:09:53 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:09:53 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:09:54 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:09:54 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:09:54 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:09:54 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:09:54 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:09:54 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:09:59 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 07:09:59 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 07:09:59 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:09:59 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:09:59 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:09:59 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:10:01 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:10:01 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:10:01 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:10:01 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:10:06 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 07:10:06 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 07:10:06 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:10:06 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:10:06 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:10:06 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:10:06 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:10:06 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:10:06 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:10:06 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:10:12 [INFO] transceiver.py:157 Init transceiver 'BTS@172.18.26.20:5700'
2025-03-30 07:10:12 [DEBUG] data_if.py:31 Init TRXD interface (L:0.0.0.0:5702 <-> R:172.18.26.20:5802)
2025-03-30 07:10:12 [DEBUG] ctrl_if.py:29 Init TRXC interface (L:0.0.0.0:5701 <-> R:172.18.26.20:5801)
2025-03-30 07:10:12 [INFO] transceiver.py:157 Init transceiver 'MS@172.18.26.22:6700'
2025-03-30 07:10:12 [DEBUG] data_if.py:31 Init TRXD interface (L:0.0.0.0:6702 <-> R:172.18.26.22:6802)
2025-03-30 07:10:12 [DEBUG] ctrl_if.py:29 Init TRXC interface (L:0.0.0.0:6701 <-> R:172.18.26.22:6801)
2025-03-30 07:10:12 [INFO] transceiver.py:157 Init transceiver 'TRX1@172.18.26.20:5700/1'
2025-03-30 07:10:12 [DEBUG] data_if.py:31 Init TRXD interface (L:0.0.0.0:5704 <-> R:172.18.26.20:5804)
2025-03-30 07:10:12 [DEBUG] ctrl_if.py:29 Init TRXC interface (L:0.0.0.0:5703 <-> R:172.18.26.20:5803)
2025-03-30 07:10:12 [INFO] transceiver.py:157 Init transceiver 'TRX2@172.18.26.20:5700/2'
2025-03-30 07:10:12 [DEBUG] data_if.py:31 Init TRXD interface (L:0.0.0.0:5706 <-> R:172.18.26.20:5806)
2025-03-30 07:10:12 [DEBUG] ctrl_if.py:29 Init TRXC interface (L:0.0.0.0:5705 <-> R:172.18.26.20:5805)
2025-03-30 07:10:12 [INFO] transceiver.py:157 Init transceiver 'TRX3@172.18.26.20:5700/3'
2025-03-30 07:10:12 [DEBUG] data_if.py:31 Init TRXD interface (L:0.0.0.0:5708 <-> R:172.18.26.20:5808)
2025-03-30 07:10:12 [DEBUG] ctrl_if.py:29 Init TRXC interface (L:0.0.0.0:5707 <-> R:172.18.26.20:5807)
2025-03-30 07:10:12 [INFO] fake_trx.py:426 Init complete
2025-03-30 07:10:12 [INFO] fake_trx.py:457 Setting real time process scheduler to SCHED_RR, priority 30
2025-03-30 07:10:13 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 07:10:13 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 07:10:13 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:10:13 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:10:13 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:10:13 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:10:17 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:10:17 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 07:10:17 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:10:17 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 07:10:17 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 0 -> 1
2025-03-30 07:10:17 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 07:10:17 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 07:10:17 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 07:10:17 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:10:17 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 07:10:17 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:10:17 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 07:10:17 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 0 -> 1
2025-03-30 07:10:17 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 07:10:17 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 07:10:17 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 07:10:17 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:10:17 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 07:10:17 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:10:17 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 07:10:17 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 0 -> 1
2025-03-30 07:10:17 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 07:10:17 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 07:10:17 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 07:10:17 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:10:17 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 07:10:17 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:10:17 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 07:10:17 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 0 -> 1
2025-03-30 07:10:17 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 07:10:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 07:10:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 07:10:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 07:10:17 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 07:10:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 07:10:17 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 07:10:17 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 07:10:17 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 07:10:17 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 07:10:17 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 07:10:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 07:10:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 07:10:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:10:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:10:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:10:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:10:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:10:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:10:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:10:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:10:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:10:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:10:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:10:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 07:10:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:10:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:10:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:10:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:10:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:10:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:10:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:10:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:10:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:10:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:10:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 07:10:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:10:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:10:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:10:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:10:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:10:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:10:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:10:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:10:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:10:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:10:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:10:17 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-03-30 07:10:17 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-03-30 07:10:17 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 07:10:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:17 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 07:10:17 [DEBUG] fake_trx.py:317 (BTS@172.18.26.20:5700) Recv FAKE_CI cmd
2025-03-30 07:10:17 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:10:17 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:10:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:10:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:10:17 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:10:17 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:10:17 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 07:10:17 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 07:10:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:17 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:10:17 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:10:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:10:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:10:18 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-03-30 07:10:18 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:10:18 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:10:18 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:10:18 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:10:18 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:10:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:18 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:10:18 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:10:18 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:10:18 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:10:18 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:10:18 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:10:18 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:10:18 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:10:18 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 07:10:18 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 07:10:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:18 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:10:18 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:10:18 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:10:18 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:10:18 [DEBUG] clck_gen.py:128 IND CLOCK 306
2025-03-30 07:10:18 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:10:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:18 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:10:18 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:10:18 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:10:18 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:10:18 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:10:18 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:10:18 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:10:18 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:10:18 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 07:10:18 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 07:10:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:18 [DEBUG] clck_gen.py:128 IND CLOCK 408
2025-03-30 07:10:19 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:10:19 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:10:19 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:10:19 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:10:19 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:10:19 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:10:19 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:10:19 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:10:19 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:10:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:19 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:10:19 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:10:19 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:10:19 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:10:19 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:10:19 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:10:19 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:10:19 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:10:19 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 07:10:19 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 07:10:19 [DEBUG] clck_gen.py:128 IND CLOCK 510
2025-03-30 07:10:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:19 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:10:19 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:10:19 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:10:19 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:10:19 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:10:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:19 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:10:19 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:10:19 [DEBUG] clck_gen.py:128 IND CLOCK 612
2025-03-30 07:10:19 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:10:19 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:10:19 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:10:19 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:10:19 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:10:19 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:10:19 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 07:10:19 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 07:10:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:20 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:10:20 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:10:20 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:10:20 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:10:20 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:10:20 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:10:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:10:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:10:20 [DEBUG] clck_gen.py:128 IND CLOCK 714
2025-03-30 07:10:20 [DEBUG] clck_gen.py:128 IND CLOCK 816
2025-03-30 07:10:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:10:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:20 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:10:20 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:10:20 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:10:20 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:10:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:10:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:10:20 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:10:20 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:10:20 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 07:10:20 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 07:10:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:21 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:10:21 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:10:21 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:10:21 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:10:21 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.26.22:6700) Recv SETFH cmd
2025-03-30 07:10:21 [INFO] transceiver.py:237 (MS@172.18.26.22:6700) Frequency hopping configured: hsn=2, maio=0, ma_len=2
2025-03-30 07:10:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:10:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:10:21 [DEBUG] clck_gen.py:128 IND CLOCK 918
2025-03-30 07:10:21 [DEBUG] clck_gen.py:128 IND CLOCK 1020
2025-03-30 07:10:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:10:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:21 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:10:21 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:10:21 [INFO] transceiver.py:241 (MS@172.18.26.22:6700) Frequency hopping disabled
2025-03-30 07:10:21 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:10:21 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:10:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:10:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:10:21 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:10:21 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:10:21 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 07:10:21 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 07:10:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:22 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.26.22:6700) Recv SETFH cmd
2025-03-30 07:10:22 [INFO] transceiver.py:237 (MS@172.18.26.22:6700) Frequency hopping configured: hsn=3, maio=3, ma_len=4
2025-03-30 07:10:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:10:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:10:22 [DEBUG] clck_gen.py:128 IND CLOCK 1122
2025-03-30 07:10:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:10:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:22 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:10:22 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:10:22 [INFO] transceiver.py:241 (MS@172.18.26.22:6700) Frequency hopping disabled
2025-03-30 07:10:22 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:10:22 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:10:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:10:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:10:22 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:10:22 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:10:22 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 07:10:22 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 07:10:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:10:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:22 [DEBUG] clck_gen.py:128 IND CLOCK 1224
2025-03-30 07:10:22 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:10:22 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:10:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:10:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:10:23 [DEBUG] clck_gen.py:128 IND CLOCK 1326
2025-03-30 07:10:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:10:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:23 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:10:23 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:10:23 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:10:23 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:10:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:10:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:10:23 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:10:23 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:10:23 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 07:10:23 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 07:10:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:23 [DEBUG] clck_gen.py:128 IND CLOCK 1428
2025-03-30 07:10:23 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:10:23 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:10:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:10:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:10:24 [DEBUG] clck_gen.py:128 IND CLOCK 1530
2025-03-30 07:10:24 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:10:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:24 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:10:24 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:10:24 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:10:24 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:10:24 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:10:24 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:10:24 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:10:24 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:10:24 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 07:10:24 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 07:10:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:10:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:24 [DEBUG] clck_gen.py:128 IND CLOCK 1632
2025-03-30 07:10:24 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:10:24 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:10:24 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:10:24 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:10:25 [DEBUG] clck_gen.py:128 IND CLOCK 1734
2025-03-30 07:10:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:10:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:25 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:10:25 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:10:25 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:10:25 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:10:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:10:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:10:25 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:10:25 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:10:25 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 07:10:25 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 07:10:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:25 [DEBUG] clck_gen.py:128 IND CLOCK 1836
2025-03-30 07:10:25 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.26.22:6700) Recv SETFH cmd
2025-03-30 07:10:25 [INFO] transceiver.py:237 (MS@172.18.26.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2025-03-30 07:10:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:10:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:10:26 [DEBUG] clck_gen.py:128 IND CLOCK 1938
2025-03-30 07:10:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:10:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:26 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:10:26 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:10:26 [INFO] transceiver.py:241 (MS@172.18.26.22:6700) Frequency hopping disabled
2025-03-30 07:10:26 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:10:26 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:10:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:10:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:10:26 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:10:26 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:10:26 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 07:10:26 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 07:10:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:26 [DEBUG] clck_gen.py:128 IND CLOCK 2040
2025-03-30 07:10:26 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.26.22:6700) Recv SETFH cmd
2025-03-30 07:10:26 [INFO] transceiver.py:237 (MS@172.18.26.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2025-03-30 07:10:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:10:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:10:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:10:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:26 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:10:26 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:10:26 [INFO] transceiver.py:241 (MS@172.18.26.22:6700) Frequency hopping disabled
2025-03-30 07:10:26 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:10:26 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:10:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:10:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:10:26 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:10:26 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:10:26 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 07:10:26 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 07:10:26 [DEBUG] clck_gen.py:128 IND CLOCK 2142
2025-03-30 07:10:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:27 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.26.22:6700) Recv SETFH cmd
2025-03-30 07:10:27 [INFO] transceiver.py:237 (MS@172.18.26.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2025-03-30 07:10:27 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:10:27 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:10:27 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:10:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:27 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:10:27 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:10:27 [INFO] transceiver.py:241 (MS@172.18.26.22:6700) Frequency hopping disabled
2025-03-30 07:10:27 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:10:27 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:10:27 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:10:27 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:10:27 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:10:27 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:10:27 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 07:10:27 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 07:10:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:27 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.26.22:6700) Recv SETFH cmd
2025-03-30 07:10:27 [INFO] transceiver.py:237 (MS@172.18.26.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2025-03-30 07:10:27 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:10:27 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:10:27 [DEBUG] clck_gen.py:128 IND CLOCK 2244
2025-03-30 07:10:27 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:10:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:27 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:10:27 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:10:27 [INFO] transceiver.py:241 (MS@172.18.26.22:6700) Frequency hopping disabled
2025-03-30 07:10:27 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:10:27 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:10:27 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:10:27 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:10:27 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:10:27 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:10:27 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 07:10:27 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 07:10:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:27 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.26.22:6700) Recv SETFH cmd
2025-03-30 07:10:27 [INFO] transceiver.py:237 (MS@172.18.26.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2025-03-30 07:10:27 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:10:27 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:10:27 [DEBUG] clck_gen.py:128 IND CLOCK 2346
2025-03-30 07:10:28 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:10:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:28 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:10:28 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:10:28 [INFO] transceiver.py:241 (MS@172.18.26.22:6700) Frequency hopping disabled
2025-03-30 07:10:28 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:10:28 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:10:28 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:10:28 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:10:28 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:10:28 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:10:28 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 07:10:28 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 07:10:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:28 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.26.22:6700) Recv SETFH cmd
2025-03-30 07:10:28 [INFO] transceiver.py:237 (MS@172.18.26.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2025-03-30 07:10:28 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:10:28 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:10:28 [DEBUG] clck_gen.py:128 IND CLOCK 2448
2025-03-30 07:10:28 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=2482): ver=1 fn=2481 tn=0 bl=148 pwr=0
2025-03-30 07:10:28 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=2482): ver=1 fn=2481 tn=1 bl=148 pwr=0
2025-03-30 07:10:28 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=2482): ver=1 fn=2481 tn=2 bl=148 pwr=0
2025-03-30 07:10:28 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=2482): ver=1 fn=2481 tn=3 bl=148 pwr=0
2025-03-30 07:10:28 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=2482): ver=1 fn=2481 tn=4 bl=148 pwr=0
2025-03-30 07:10:28 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=2482): ver=1 fn=2481 tn=5 bl=148 pwr=0
2025-03-30 07:10:28 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=2482): ver=1 fn=2481 tn=6 bl=148 pwr=0
2025-03-30 07:10:28 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=2482): ver=1 fn=2481 tn=7 bl=148 pwr=0
2025-03-30 07:10:28 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:10:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:28 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:10:28 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:10:28 [INFO] transceiver.py:241 (MS@172.18.26.22:6700) Frequency hopping disabled
2025-03-30 07:10:28 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:10:28 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:10:28 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:10:28 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:10:28 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:10:28 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:10:28 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 07:10:28 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 07:10:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:28 [DEBUG] clck_gen.py:128 IND CLOCK 2550
2025-03-30 07:10:28 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.26.22:6700) Recv SETFH cmd
2025-03-30 07:10:28 [INFO] transceiver.py:237 (MS@172.18.26.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2025-03-30 07:10:28 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:10:28 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:10:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:10:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:29 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:10:29 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:10:29 [INFO] transceiver.py:241 (MS@172.18.26.22:6700) Frequency hopping disabled
2025-03-30 07:10:29 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:10:29 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:10:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:10:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:10:29 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:10:29 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:10:29 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 07:10:29 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 07:10:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:29 [DEBUG] clck_gen.py:128 IND CLOCK 2652
2025-03-30 07:10:29 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.26.22:6700) Recv SETFH cmd
2025-03-30 07:10:29 [INFO] transceiver.py:237 (MS@172.18.26.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2025-03-30 07:10:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:10:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:10:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:10:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:29 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:10:29 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:10:29 [INFO] transceiver.py:241 (MS@172.18.26.22:6700) Frequency hopping disabled
2025-03-30 07:10:29 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:10:29 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:10:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:10:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:10:29 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:10:29 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:10:29 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 07:10:29 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 07:10:29 [DEBUG] clck_gen.py:128 IND CLOCK 2754
2025-03-30 07:10:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:29 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.26.22:6700) Recv SETFH cmd
2025-03-30 07:10:29 [INFO] transceiver.py:237 (MS@172.18.26.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2025-03-30 07:10:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:10:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:10:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:10:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:30 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:10:30 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:10:30 [INFO] transceiver.py:241 (MS@172.18.26.22:6700) Frequency hopping disabled
2025-03-30 07:10:30 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:10:30 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:10:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:10:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:10:30 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:10:30 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:10:30 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 07:10:30 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 07:10:30 [DEBUG] clck_gen.py:128 IND CLOCK 2856
2025-03-30 07:10:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:30 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.26.22:6700) Recv SETFH cmd
2025-03-30 07:10:30 [INFO] transceiver.py:237 (MS@172.18.26.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2025-03-30 07:10:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:10:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:10:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:10:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:30 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:10:30 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:10:30 [INFO] transceiver.py:241 (MS@172.18.26.22:6700) Frequency hopping disabled
2025-03-30 07:10:30 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:10:30 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:10:30 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:10:30 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:10:30 [DEBUG] clck_gen.py:128 IND CLOCK 2958
2025-03-30 07:10:30 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:10:30 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:10:30 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:10:30 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:10:30 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 07:10:30 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 07:10:30 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 07:10:35 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 07:10:35 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 07:10:35 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:10:35 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:10:35 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:10:35 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:10:35 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:10:35 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 07:10:35 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:10:35 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 07:10:35 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 07:10:35 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 07:10:35 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 07:10:35 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 07:10:35 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:10:35 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:10:35 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 07:10:35 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 07:10:35 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 07:10:35 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 07:10:35 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 07:10:35 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 07:10:35 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:10:35 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:10:35 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 07:10:35 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 07:10:35 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 07:10:35 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 07:10:35 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 07:10:35 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 07:10:35 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:10:35 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:10:35 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 07:10:35 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 07:10:35 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 07:10:35 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 07:10:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 07:10:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 07:10:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 07:10:35 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 07:10:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 07:10:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 07:10:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 07:10:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 07:10:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:10:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:10:35 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 07:10:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:10:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:10:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:10:35 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 07:10:35 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 07:10:35 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 07:10:35 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 07:10:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:10:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:10:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:10:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 07:10:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:10:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:10:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:10:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:10:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:10:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:10:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:10:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:10:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:10:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:10:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:10:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:10:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:10:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:10:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:10:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:10:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:10:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:10:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:10:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:10:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:10:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:10:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:10:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:10:35 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-03-30 07:10:36 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-03-30 07:10:36 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-03-30 07:10:36 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-03-30 07:10:36 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-03-30 07:10:36 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-03-30 07:10:36 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-03-30 07:10:36 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-03-30 07:10:36 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-03-30 07:10:36 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-03-30 07:10:36 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=0 bl=148 pwr=0
2025-03-30 07:10:36 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=1 bl=148 pwr=0
2025-03-30 07:10:36 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=2 bl=148 pwr=0
2025-03-30 07:10:36 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=3 bl=148 pwr=0
2025-03-30 07:10:36 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=4 bl=148 pwr=0
2025-03-30 07:10:36 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=5 bl=148 pwr=0
2025-03-30 07:10:36 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=6 bl=148 pwr=0
2025-03-30 07:10:36 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=7 bl=148 pwr=0
2025-03-30 07:10:36 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 07:10:36 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 07:10:36 [DEBUG] fake_trx.py:317 (BTS@172.18.26.20:5700) Recv FAKE_CI cmd
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:10:36 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:37 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:10:37 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:10:37 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:10:37 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:10:37 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:10:37 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:10:37 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:10:37 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:10:37 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 07:10:37 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 07:10:37 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 07:10:42 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 07:10:42 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 07:10:42 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:10:42 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:10:42 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:10:42 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:10:42 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:10:42 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 07:10:42 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:10:42 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 07:10:42 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 07:10:42 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 07:10:42 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 07:10:42 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 07:10:42 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:10:42 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:10:42 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 07:10:42 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 07:10:42 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 07:10:42 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 07:10:42 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 07:10:42 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 07:10:42 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:10:42 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:10:42 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 07:10:42 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 07:10:42 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 07:10:42 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 07:10:42 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 07:10:42 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 07:10:42 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:10:42 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:10:42 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 07:10:42 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 07:10:42 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 07:10:42 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 07:10:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 07:10:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 07:10:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 07:10:42 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 07:10:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 07:10:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 07:10:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 07:10:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:10:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 07:10:42 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 07:10:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:10:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:10:42 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 07:10:42 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 07:10:42 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 07:10:42 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 07:10:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:10:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:10:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:10:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 07:10:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:10:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:10:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:10:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:10:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:10:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:10:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:10:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:10:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:10:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:10:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:10:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:10:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:10:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:10:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:10:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:10:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:10:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:10:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:10:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:10:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:10:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:10:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:10:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:10:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:10:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:10:42 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-03-30 07:10:42 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-03-30 07:10:42 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-03-30 07:10:42 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-03-30 07:10:42 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-03-30 07:10:42 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-03-30 07:10:42 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-03-30 07:10:42 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-03-30 07:10:42 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-03-30 07:10:42 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-03-30 07:10:42 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=0 bl=148 pwr=0
2025-03-30 07:10:42 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=1 bl=148 pwr=0
2025-03-30 07:10:42 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=2 bl=148 pwr=0
2025-03-30 07:10:42 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=3 bl=148 pwr=0
2025-03-30 07:10:42 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=4 bl=148 pwr=0
2025-03-30 07:10:42 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=5 bl=148 pwr=0
2025-03-30 07:10:42 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=6 bl=148 pwr=0
2025-03-30 07:10:42 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=7 bl=148 pwr=0
2025-03-30 07:10:42 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 07:10:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:42 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 07:10:42 [DEBUG] fake_trx.py:317 (BTS@172.18.26.20:5700) Recv FAKE_CI cmd
2025-03-30 07:10:42 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:10:42 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:10:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:10:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:42 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:10:42 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:10:42 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:10:42 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:10:42 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:10:42 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:10:42 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:10:42 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:10:42 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 07:10:42 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 07:10:42 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 07:10:42 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=128 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:10:42 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=128 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:10:42 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=128 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:10:42 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=128 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:10:42 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=128 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:10:42 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=128 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:10:42 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=129 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:10:42 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=129 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:10:42 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=129 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:10:42 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=129 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:10:42 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=129 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:10:42 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=129 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:10:42 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=129 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:10:42 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=129 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:10:42 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=130 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:10:42 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=130 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:10:42 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=130 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:10:42 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=130 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:10:42 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=130 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:10:42 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=130 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:10:42 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=130 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:10:42 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=130 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:10:47 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 07:10:47 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 07:10:47 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:10:47 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:10:47 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:10:47 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:10:47 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:10:47 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 07:10:47 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:10:47 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 07:10:47 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 07:10:47 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 07:10:47 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 07:10:47 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 07:10:47 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:10:47 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:10:47 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 07:10:47 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 07:10:47 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 07:10:47 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 07:10:47 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 07:10:47 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 07:10:47 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:10:47 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:10:47 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 07:10:47 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 07:10:47 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 07:10:47 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 07:10:47 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 07:10:47 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 07:10:47 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:10:47 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:10:47 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 07:10:47 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 07:10:47 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 07:10:47 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 07:10:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 07:10:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 07:10:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 07:10:47 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 07:10:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 07:10:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 07:10:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 07:10:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 07:10:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:10:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:10:47 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 07:10:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:10:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:10:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:10:47 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 07:10:47 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 07:10:47 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 07:10:47 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 07:10:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:10:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:10:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:10:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 07:10:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:10:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:10:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:10:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:10:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:10:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:10:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:10:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:10:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:10:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:10:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:10:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:10:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:10:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:10:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:10:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:10:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:10:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:10:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:10:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:10:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:10:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:10:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:10:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:10:47 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-03-30 07:10:48 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-03-30 07:10:48 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-03-30 07:10:48 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-03-30 07:10:48 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-03-30 07:10:48 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-03-30 07:10:48 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-03-30 07:10:48 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-03-30 07:10:48 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-03-30 07:10:48 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-03-30 07:10:48 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=105 tn=0 bl=148 pwr=0
2025-03-30 07:10:48 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=105 tn=1 bl=148 pwr=0
2025-03-30 07:10:48 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=105 tn=2 bl=148 pwr=0
2025-03-30 07:10:48 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=105 tn=3 bl=148 pwr=0
2025-03-30 07:10:48 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=105 tn=4 bl=148 pwr=0
2025-03-30 07:10:48 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=105 tn=5 bl=148 pwr=0
2025-03-30 07:10:48 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=105 tn=6 bl=148 pwr=0
2025-03-30 07:10:48 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=105 tn=7 bl=148 pwr=0
2025-03-30 07:10:48 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=106 tn=0 bl=148 pwr=0
2025-03-30 07:10:48 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=106 tn=1 bl=148 pwr=0
2025-03-30 07:10:48 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=106 tn=2 bl=148 pwr=0
2025-03-30 07:10:48 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=106 tn=3 bl=148 pwr=0
2025-03-30 07:10:48 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=106 tn=4 bl=148 pwr=0
2025-03-30 07:10:48 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=106 tn=5 bl=148 pwr=0
2025-03-30 07:10:48 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=106 tn=6 bl=148 pwr=0
2025-03-30 07:10:48 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=106 tn=7 bl=148 pwr=0
2025-03-30 07:10:48 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=107 tn=0 bl=148 pwr=0
2025-03-30 07:10:48 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=107 tn=1 bl=148 pwr=0
2025-03-30 07:10:48 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=107 tn=2 bl=148 pwr=0
2025-03-30 07:10:48 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=107 tn=3 bl=148 pwr=0
2025-03-30 07:10:48 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=107 tn=4 bl=148 pwr=0
2025-03-30 07:10:48 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=107 tn=5 bl=148 pwr=0
2025-03-30 07:10:48 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=107 tn=6 bl=148 pwr=0
2025-03-30 07:10:48 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=107 tn=7 bl=148 pwr=0
2025-03-30 07:10:48 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 07:10:48 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 07:10:48 [DEBUG] fake_trx.py:317 (BTS@172.18.26.20:5700) Recv FAKE_CI cmd
2025-03-30 07:10:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:48 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:10:48 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:10:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:10:48 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:10:48 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:10:48 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:10:48 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:10:48 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:10:48 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:10:48 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:10:48 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:10:48 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 07:10:48 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 07:10:48 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 07:10:48 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=120 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:10:48 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=120 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:10:48 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=120 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:10:48 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=120 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:10:48 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=120 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:10:48 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=120 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:10:53 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 07:10:53 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 07:10:53 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:10:53 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:10:53 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:10:53 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:10:53 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:10:53 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 07:10:53 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:10:53 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 07:10:53 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 07:10:53 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 07:10:53 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 07:10:53 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 07:10:53 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:10:53 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:10:53 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 07:10:53 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 07:10:53 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 07:10:53 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 07:10:53 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 07:10:53 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 07:10:53 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:10:53 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:10:53 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 07:10:53 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 07:10:53 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 07:10:53 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 07:10:53 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 07:10:53 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 07:10:53 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:10:53 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:10:53 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 07:10:53 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 07:10:53 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 07:10:53 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 07:10:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 07:10:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 07:10:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 07:10:53 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 07:10:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 07:10:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 07:10:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 07:10:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 07:10:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:10:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:10:53 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 07:10:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:10:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:10:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:10:53 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 07:10:53 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 07:10:53 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 07:10:53 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 07:10:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:10:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:10:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:10:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 07:10:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:10:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:10:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:10:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:10:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:10:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:10:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:10:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:10:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:10:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:10:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:10:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:10:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:10:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:10:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:10:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:10:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:10:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:10:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:10:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:10:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:10:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:10:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:10:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:10:53 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-03-30 07:10:53 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-03-30 07:10:53 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-03-30 07:10:53 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-03-30 07:10:53 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-03-30 07:10:53 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-03-30 07:10:53 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-03-30 07:10:53 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-03-30 07:10:53 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-03-30 07:10:53 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-03-30 07:10:53 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=0 bl=148 pwr=0
2025-03-30 07:10:53 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=1 bl=148 pwr=0
2025-03-30 07:10:53 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=2 bl=148 pwr=0
2025-03-30 07:10:53 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=3 bl=148 pwr=0
2025-03-30 07:10:53 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=4 bl=148 pwr=0
2025-03-30 07:10:53 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=5 bl=148 pwr=0
2025-03-30 07:10:53 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=6 bl=148 pwr=0
2025-03-30 07:10:53 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=7 bl=148 pwr=0
2025-03-30 07:10:53 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 07:10:53 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 07:10:53 [DEBUG] fake_trx.py:317 (BTS@172.18.26.20:5700) Recv FAKE_CI cmd
2025-03-30 07:10:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:53 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:10:53 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:10:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:10:54 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:10:54 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:10:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:10:54 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:10:54 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:10:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:10:54 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:10:54 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:10:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:10:54 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:10:54 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:10:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:10:54 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:10:54 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:10:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:10:54 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:10:54 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:10:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:10:54 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:10:54 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:10:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:10:54 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:10:54 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:10:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:10:54 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:10:54 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:10:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:10:54 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:10:54 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:10:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:10:54 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:10:54 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:10:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:10:54 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:10:54 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:10:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:10:54 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:10:54 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:10:54 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:10:54 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:10:54 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:10:54 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:10:54 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:10:54 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 07:10:54 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 07:10:54 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 07:10:54 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:10:59 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 07:10:59 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 07:10:59 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:10:59 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:10:59 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:10:59 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:10:59 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:10:59 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 07:10:59 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:10:59 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 07:10:59 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 07:10:59 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 07:10:59 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 07:10:59 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 07:10:59 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:10:59 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:10:59 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 07:10:59 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 07:10:59 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 07:10:59 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 07:10:59 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 07:10:59 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 07:10:59 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:10:59 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:10:59 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 07:10:59 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 07:10:59 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 07:10:59 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 07:10:59 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 07:10:59 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 07:10:59 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:10:59 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:10:59 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 07:10:59 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 07:10:59 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 07:10:59 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 07:10:59 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 07:10:59 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 07:10:59 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 07:10:59 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 07:10:59 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 07:10:59 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 07:10:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 07:10:59 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 07:10:59 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 07:10:59 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:10:59 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:10:59 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 07:10:59 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 07:10:59 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 07:10:59 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 07:10:59 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:10:59 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:10:59 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:10:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 07:10:59 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:10:59 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:10:59 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:10:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:10:59 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:10:59 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:10:59 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:10:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:10:59 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:10:59 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:10:59 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:10:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:10:59 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:10:59 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:10:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:10:59 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:10:59 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:10:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:10:59 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:10:59 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:10:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:10:59 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:10:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:10:59 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:10:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:10:59 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:10:59 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:10:59 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-03-30 07:10:59 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-03-30 07:10:59 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-03-30 07:10:59 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-03-30 07:10:59 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-03-30 07:10:59 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-03-30 07:10:59 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-03-30 07:10:59 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-03-30 07:10:59 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-03-30 07:10:59 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-03-30 07:10:59 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=0 bl=148 pwr=0
2025-03-30 07:10:59 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=1 bl=148 pwr=0
2025-03-30 07:10:59 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=2 bl=148 pwr=0
2025-03-30 07:10:59 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=3 bl=148 pwr=0
2025-03-30 07:10:59 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=4 bl=148 pwr=0
2025-03-30 07:10:59 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=5 bl=148 pwr=0
2025-03-30 07:10:59 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=6 bl=148 pwr=0
2025-03-30 07:10:59 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=7 bl=148 pwr=0
2025-03-30 07:10:59 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 07:10:59 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 07:10:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:59 [DEBUG] fake_trx.py:317 (BTS@172.18.26.20:5700) Recv FAKE_CI cmd
2025-03-30 07:10:59 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:10:59 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:10:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:10:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:10:59 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:10:59 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:10:59 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 07:10:59 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 07:10:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:10:59 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:10:59 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:10:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:10:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:10:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:11:00 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-03-30 07:11:00 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:11:00 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:11:00 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:11:00 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:11:00 [DEBUG] clck_gen.py:128 IND CLOCK 306
2025-03-30 07:11:01 [DEBUG] clck_gen.py:128 IND CLOCK 408
2025-03-30 07:11:01 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:11:01 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:11:01 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:11:01 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:11:01 [DEBUG] clck_gen.py:128 IND CLOCK 510
2025-03-30 07:11:01 [DEBUG] clck_gen.py:128 IND CLOCK 612
2025-03-30 07:11:02 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:11:02 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:11:02 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:11:02 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:11:02 [DEBUG] clck_gen.py:128 IND CLOCK 714
2025-03-30 07:11:02 [DEBUG] clck_gen.py:128 IND CLOCK 816
2025-03-30 07:11:03 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:11:03 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:11:03 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:11:03 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:11:03 [DEBUG] clck_gen.py:128 IND CLOCK 918
2025-03-30 07:11:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:11:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:11:03 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:11:03 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:11:03 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:11:03 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:11:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:11:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:11:03 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:11:03 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:11:03 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 07:11:03 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 07:11:03 [DEBUG] clck_gen.py:128 IND CLOCK 1020
2025-03-30 07:11:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:11:03 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:11:03 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:11:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:11:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:11:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:11:04 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:11:04 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:11:04 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:11:04 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:11:04 [DEBUG] clck_gen.py:128 IND CLOCK 1122
2025-03-30 07:11:04 [DEBUG] clck_gen.py:128 IND CLOCK 1224
2025-03-30 07:11:05 [DEBUG] clck_gen.py:128 IND CLOCK 1326
2025-03-30 07:11:05 [DEBUG] clck_gen.py:128 IND CLOCK 1428
2025-03-30 07:11:06 [DEBUG] clck_gen.py:128 IND CLOCK 1530
2025-03-30 07:11:06 [DEBUG] clck_gen.py:128 IND CLOCK 1632
2025-03-30 07:11:07 [DEBUG] clck_gen.py:128 IND CLOCK 1734
2025-03-30 07:11:07 [DEBUG] clck_gen.py:128 IND CLOCK 1836
2025-03-30 07:11:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:11:08 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:11:08 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:11:08 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:11:08 [DEBUG] clck_gen.py:128 IND CLOCK 1938
2025-03-30 07:11:08 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:11:08 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:11:08 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:11:08 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:11:08 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:11:08 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:11:08 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 07:11:08 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 07:11:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:11:08 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:11:08 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:11:08 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:11:08 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:11:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:11:08 [DEBUG] clck_gen.py:128 IND CLOCK 2040
2025-03-30 07:11:09 [DEBUG] clck_gen.py:128 IND CLOCK 2142
2025-03-30 07:11:09 [DEBUG] clck_gen.py:128 IND CLOCK 2244
2025-03-30 07:11:09 [DEBUG] clck_gen.py:128 IND CLOCK 2346
2025-03-30 07:11:10 [DEBUG] clck_gen.py:128 IND CLOCK 2448
2025-03-30 07:11:10 [DEBUG] clck_gen.py:128 IND CLOCK 2550
2025-03-30 07:11:11 [DEBUG] clck_gen.py:128 IND CLOCK 2652
2025-03-30 07:11:11 [DEBUG] clck_gen.py:128 IND CLOCK 2754
2025-03-30 07:11:12 [DEBUG] clck_gen.py:128 IND CLOCK 2856
2025-03-30 07:11:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:11:12 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:11:12 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:11:12 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:11:12 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:11:12 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:11:12 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:11:12 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:11:12 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:11:12 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:11:12 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 07:11:12 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 07:11:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:11:12 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:11:12 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:11:12 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:11:12 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:11:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:11:12 [DEBUG] clck_gen.py:128 IND CLOCK 2958
2025-03-30 07:11:13 [DEBUG] clck_gen.py:128 IND CLOCK 3060
2025-03-30 07:11:13 [DEBUG] clck_gen.py:128 IND CLOCK 3162
2025-03-30 07:11:14 [DEBUG] clck_gen.py:128 IND CLOCK 3264
2025-03-30 07:11:14 [DEBUG] clck_gen.py:128 IND CLOCK 3366
2025-03-30 07:11:15 [DEBUG] clck_gen.py:128 IND CLOCK 3468
2025-03-30 07:11:15 [DEBUG] clck_gen.py:128 IND CLOCK 3570
2025-03-30 07:11:16 [DEBUG] clck_gen.py:128 IND CLOCK 3672
2025-03-30 07:11:16 [DEBUG] clck_gen.py:128 IND CLOCK 3774
2025-03-30 07:11:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:11:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:11:16 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:11:16 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:11:16 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:11:16 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:11:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:11:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:11:16 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:11:16 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:11:16 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 07:11:16 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 07:11:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:11:16 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:11:16 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:11:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:11:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:11:17 [DEBUG] clck_gen.py:128 IND CLOCK 3876
2025-03-30 07:11:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:11:17 [DEBUG] clck_gen.py:128 IND CLOCK 3978
2025-03-30 07:11:17 [DEBUG] clck_gen.py:128 IND CLOCK 4080
2025-03-30 07:11:18 [DEBUG] clck_gen.py:128 IND CLOCK 4182
2025-03-30 07:11:18 [DEBUG] clck_gen.py:128 IND CLOCK 4284
2025-03-30 07:11:19 [DEBUG] clck_gen.py:128 IND CLOCK 4386
2025-03-30 07:11:19 [DEBUG] clck_gen.py:128 IND CLOCK 4488
2025-03-30 07:11:20 [DEBUG] clck_gen.py:128 IND CLOCK 4590
2025-03-30 07:11:20 [DEBUG] clck_gen.py:128 IND CLOCK 4692
2025-03-30 07:11:21 [DEBUG] clck_gen.py:128 IND CLOCK 4794
2025-03-30 07:11:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:11:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:11:21 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:11:21 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:11:21 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:11:21 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:11:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:11:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:11:21 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:11:21 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:11:21 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 07:11:21 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 07:11:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:11:21 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.26.22:6700) Recv SETFH cmd
2025-03-30 07:11:21 [INFO] transceiver.py:237 (MS@172.18.26.22:6700) Frequency hopping configured: hsn=2, maio=0, ma_len=2
2025-03-30 07:11:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:11:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:11:21 [DEBUG] clck_gen.py:128 IND CLOCK 4896
2025-03-30 07:11:22 [DEBUG] clck_gen.py:128 IND CLOCK 4998
2025-03-30 07:11:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:11:22 [DEBUG] clck_gen.py:128 IND CLOCK 5100
2025-03-30 07:11:23 [DEBUG] clck_gen.py:128 IND CLOCK 5202
2025-03-30 07:11:23 [DEBUG] clck_gen.py:128 IND CLOCK 5304
2025-03-30 07:11:24 [DEBUG] clck_gen.py:128 IND CLOCK 5406
2025-03-30 07:11:24 [DEBUG] clck_gen.py:128 IND CLOCK 5508
2025-03-30 07:11:25 [DEBUG] clck_gen.py:128 IND CLOCK 5610
2025-03-30 07:11:25 [DEBUG] clck_gen.py:128 IND CLOCK 5712
2025-03-30 07:11:26 [DEBUG] clck_gen.py:128 IND CLOCK 5814
2025-03-30 07:11:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:11:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:11:26 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:11:26 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:11:26 [INFO] transceiver.py:241 (MS@172.18.26.22:6700) Frequency hopping disabled
2025-03-30 07:11:26 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:11:26 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:11:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:11:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:11:26 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:11:26 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:11:26 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 07:11:26 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 07:11:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:11:26 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.26.22:6700) Recv SETFH cmd
2025-03-30 07:11:26 [INFO] transceiver.py:237 (MS@172.18.26.22:6700) Frequency hopping configured: hsn=3, maio=3, ma_len=4
2025-03-30 07:11:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:11:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:11:26 [DEBUG] clck_gen.py:128 IND CLOCK 5916
2025-03-30 07:11:26 [DEBUG] clck_gen.py:128 IND CLOCK 6018
2025-03-30 07:11:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:11:27 [DEBUG] clck_gen.py:128 IND CLOCK 6120
2025-03-30 07:11:27 [DEBUG] clck_gen.py:128 IND CLOCK 6222
2025-03-30 07:11:28 [DEBUG] clck_gen.py:128 IND CLOCK 6324
2025-03-30 07:11:28 [DEBUG] clck_gen.py:128 IND CLOCK 6426
2025-03-30 07:11:29 [DEBUG] clck_gen.py:128 IND CLOCK 6528
2025-03-30 07:11:29 [DEBUG] clck_gen.py:128 IND CLOCK 6630
2025-03-30 07:11:30 [DEBUG] clck_gen.py:128 IND CLOCK 6732
2025-03-30 07:11:30 [DEBUG] clck_gen.py:128 IND CLOCK 6834
2025-03-30 07:11:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:11:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:11:31 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:11:31 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:11:31 [INFO] transceiver.py:241 (MS@172.18.26.22:6700) Frequency hopping disabled
2025-03-30 07:11:31 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:11:31 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:11:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:11:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:11:31 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:11:31 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:11:31 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 07:11:31 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 07:11:31 [DEBUG] clck_gen.py:128 IND CLOCK 6936
2025-03-30 07:11:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:11:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:11:31 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:11:31 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:11:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:11:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:11:31 [DEBUG] clck_gen.py:128 IND CLOCK 7038
2025-03-30 07:11:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:11:32 [DEBUG] clck_gen.py:128 IND CLOCK 7140
2025-03-30 07:11:32 [DEBUG] clck_gen.py:128 IND CLOCK 7242
2025-03-30 07:11:33 [DEBUG] clck_gen.py:128 IND CLOCK 7344
2025-03-30 07:11:33 [DEBUG] clck_gen.py:128 IND CLOCK 7446
2025-03-30 07:11:34 [DEBUG] clck_gen.py:128 IND CLOCK 7548
2025-03-30 07:11:34 [DEBUG] clck_gen.py:128 IND CLOCK 7650
2025-03-30 07:11:34 [DEBUG] clck_gen.py:128 IND CLOCK 7752
2025-03-30 07:11:35 [DEBUG] clck_gen.py:128 IND CLOCK 7854
2025-03-30 07:11:35 [DEBUG] clck_gen.py:128 IND CLOCK 7956
2025-03-30 07:11:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:11:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:11:35 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:11:35 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:11:36 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:11:36 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:11:36 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:11:36 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:11:36 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:11:36 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:11:36 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 07:11:36 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 07:11:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:11:36 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:11:36 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:11:36 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:11:36 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:11:36 [DEBUG] clck_gen.py:128 IND CLOCK 8058
2025-03-30 07:11:36 [DEBUG] clck_gen.py:128 IND CLOCK 8160
2025-03-30 07:11:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:11:37 [DEBUG] clck_gen.py:128 IND CLOCK 8262
2025-03-30 07:11:37 [DEBUG] clck_gen.py:128 IND CLOCK 8364
2025-03-30 07:11:38 [DEBUG] clck_gen.py:128 IND CLOCK 8466
2025-03-30 07:11:38 [DEBUG] clck_gen.py:128 IND CLOCK 8568
2025-03-30 07:11:39 [DEBUG] clck_gen.py:128 IND CLOCK 8670
2025-03-30 07:11:39 [DEBUG] clck_gen.py:128 IND CLOCK 8772
2025-03-30 07:11:40 [DEBUG] clck_gen.py:128 IND CLOCK 8874
2025-03-30 07:11:40 [DEBUG] clck_gen.py:128 IND CLOCK 8976
2025-03-30 07:11:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:11:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:11:40 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:11:40 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:11:40 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:11:40 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:11:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:11:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:11:40 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:11:40 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:11:40 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 07:11:40 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 07:11:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:11:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:11:40 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:11:40 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:11:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:11:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:11:41 [DEBUG] clck_gen.py:128 IND CLOCK 9078
2025-03-30 07:11:41 [DEBUG] clck_gen.py:128 IND CLOCK 9180
2025-03-30 07:11:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:11:42 [DEBUG] clck_gen.py:128 IND CLOCK 9282
2025-03-30 07:11:42 [DEBUG] clck_gen.py:128 IND CLOCK 9384
2025-03-30 07:11:42 [DEBUG] clck_gen.py:128 IND CLOCK 9486
2025-03-30 07:11:43 [DEBUG] clck_gen.py:128 IND CLOCK 9588
2025-03-30 07:11:43 [DEBUG] clck_gen.py:128 IND CLOCK 9690
2025-03-30 07:11:44 [DEBUG] clck_gen.py:128 IND CLOCK 9792
2025-03-30 07:11:44 [DEBUG] clck_gen.py:128 IND CLOCK 9894
2025-03-30 07:11:45 [DEBUG] clck_gen.py:128 IND CLOCK 9996
2025-03-30 07:11:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:11:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:11:45 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:11:45 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:11:45 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:11:45 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:11:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:11:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:11:45 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:11:45 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:11:45 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 07:11:45 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 07:11:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:11:45 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.26.22:6700) Recv SETFH cmd
2025-03-30 07:11:45 [INFO] transceiver.py:237 (MS@172.18.26.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2025-03-30 07:11:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:11:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:11:45 [DEBUG] clck_gen.py:128 IND CLOCK 10098
2025-03-30 07:11:46 [DEBUG] clck_gen.py:128 IND CLOCK 10200
2025-03-30 07:11:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:11:46 [DEBUG] clck_gen.py:128 IND CLOCK 10302
2025-03-30 07:11:47 [DEBUG] clck_gen.py:128 IND CLOCK 10404
2025-03-30 07:11:47 [DEBUG] clck_gen.py:128 IND CLOCK 10506
2025-03-30 07:11:48 [DEBUG] clck_gen.py:128 IND CLOCK 10608
2025-03-30 07:11:48 [DEBUG] clck_gen.py:128 IND CLOCK 10710
2025-03-30 07:11:49 [DEBUG] clck_gen.py:128 IND CLOCK 10812
2025-03-30 07:11:49 [DEBUG] clck_gen.py:128 IND CLOCK 10914
2025-03-30 07:11:50 [DEBUG] clck_gen.py:128 IND CLOCK 11016
2025-03-30 07:11:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:11:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:11:50 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:11:50 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:11:50 [INFO] transceiver.py:241 (MS@172.18.26.22:6700) Frequency hopping disabled
2025-03-30 07:11:50 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:11:50 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:11:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:11:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:11:50 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:11:50 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:11:50 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 07:11:50 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 07:11:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:11:50 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.26.22:6700) Recv SETFH cmd
2025-03-30 07:11:50 [INFO] transceiver.py:237 (MS@172.18.26.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2025-03-30 07:11:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:11:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:11:50 [DEBUG] clck_gen.py:128 IND CLOCK 11118
2025-03-30 07:11:50 [DEBUG] clck_gen.py:128 IND CLOCK 11220
2025-03-30 07:11:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:11:51 [DEBUG] clck_gen.py:128 IND CLOCK 11322
2025-03-30 07:11:51 [DEBUG] clck_gen.py:128 IND CLOCK 11424
2025-03-30 07:11:52 [DEBUG] clck_gen.py:128 IND CLOCK 11526
2025-03-30 07:11:52 [DEBUG] clck_gen.py:128 IND CLOCK 11628
2025-03-30 07:11:53 [DEBUG] clck_gen.py:128 IND CLOCK 11730
2025-03-30 07:11:53 [DEBUG] clck_gen.py:128 IND CLOCK 11832
2025-03-30 07:11:54 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=11928): ver=1 fn=11927 tn=0 bl=148 pwr=0
2025-03-30 07:11:54 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=11928): ver=1 fn=11927 tn=1 bl=148 pwr=0
2025-03-30 07:11:54 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=11928): ver=1 fn=11927 tn=2 bl=148 pwr=0
2025-03-30 07:11:54 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=11928): ver=1 fn=11927 tn=3 bl=148 pwr=0
2025-03-30 07:11:54 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=11928): ver=1 fn=11927 tn=4 bl=148 pwr=0
2025-03-30 07:11:54 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=11928): ver=1 fn=11927 tn=5 bl=148 pwr=0
2025-03-30 07:11:54 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=11928): ver=1 fn=11927 tn=6 bl=148 pwr=0
2025-03-30 07:11:54 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=11928): ver=1 fn=11927 tn=7 bl=148 pwr=0
2025-03-30 07:11:54 [DEBUG] clck_gen.py:128 IND CLOCK 11934
2025-03-30 07:11:54 [DEBUG] clck_gen.py:128 IND CLOCK 12036
2025-03-30 07:11:55 [DEBUG] clck_gen.py:128 IND CLOCK 12138
2025-03-30 07:11:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:11:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:11:55 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:11:55 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:11:55 [INFO] transceiver.py:241 (MS@172.18.26.22:6700) Frequency hopping disabled
2025-03-30 07:11:55 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:11:55 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:11:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:11:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:11:55 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:11:55 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:11:55 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 07:11:55 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 07:11:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:11:55 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.26.22:6700) Recv SETFH cmd
2025-03-30 07:11:55 [INFO] transceiver.py:237 (MS@172.18.26.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2025-03-30 07:11:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:11:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:11:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:11:55 [DEBUG] clck_gen.py:128 IND CLOCK 12240
2025-03-30 07:11:56 [DEBUG] clck_gen.py:128 IND CLOCK 12342
2025-03-30 07:11:56 [DEBUG] clck_gen.py:128 IND CLOCK 12444
2025-03-30 07:11:57 [DEBUG] clck_gen.py:128 IND CLOCK 12546
2025-03-30 07:11:57 [DEBUG] clck_gen.py:128 IND CLOCK 12648
2025-03-30 07:11:58 [DEBUG] clck_gen.py:128 IND CLOCK 12750
2025-03-30 07:11:58 [DEBUG] clck_gen.py:128 IND CLOCK 12852
2025-03-30 07:11:58 [DEBUG] clck_gen.py:128 IND CLOCK 12954
2025-03-30 07:11:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:11:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:11:59 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:11:59 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:11:59 [INFO] transceiver.py:241 (MS@172.18.26.22:6700) Frequency hopping disabled
2025-03-30 07:11:59 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:11:59 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:11:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:11:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:11:59 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:11:59 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:11:59 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 07:11:59 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 07:11:59 [DEBUG] clck_gen.py:128 IND CLOCK 13056
2025-03-30 07:11:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:11:59 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.26.22:6700) Recv SETFH cmd
2025-03-30 07:11:59 [INFO] transceiver.py:237 (MS@172.18.26.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2025-03-30 07:11:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:11:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:11:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:11:59 [DEBUG] clck_gen.py:128 IND CLOCK 13158
2025-03-30 07:12:00 [DEBUG] clck_gen.py:128 IND CLOCK 13260
2025-03-30 07:12:00 [DEBUG] clck_gen.py:128 IND CLOCK 13362
2025-03-30 07:12:01 [DEBUG] clck_gen.py:128 IND CLOCK 13464
2025-03-30 07:12:01 [DEBUG] clck_gen.py:128 IND CLOCK 13566
2025-03-30 07:12:02 [DEBUG] clck_gen.py:128 IND CLOCK 13668
2025-03-30 07:12:02 [DEBUG] clck_gen.py:128 IND CLOCK 13770
2025-03-30 07:12:03 [DEBUG] clck_gen.py:128 IND CLOCK 13872
2025-03-30 07:12:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:12:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:12:03 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:12:03 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:12:03 [INFO] transceiver.py:241 (MS@172.18.26.22:6700) Frequency hopping disabled
2025-03-30 07:12:03 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:12:03 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:12:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:12:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:12:03 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:12:03 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:12:03 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 07:12:03 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 07:12:03 [DEBUG] clck_gen.py:128 IND CLOCK 13974
2025-03-30 07:12:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:12:03 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.26.22:6700) Recv SETFH cmd
2025-03-30 07:12:03 [INFO] transceiver.py:237 (MS@172.18.26.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2025-03-30 07:12:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:12:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:12:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:12:04 [DEBUG] clck_gen.py:128 IND CLOCK 14076
2025-03-30 07:12:04 [DEBUG] clck_gen.py:128 IND CLOCK 14178
2025-03-30 07:12:05 [DEBUG] clck_gen.py:128 IND CLOCK 14280
2025-03-30 07:12:05 [DEBUG] clck_gen.py:128 IND CLOCK 14382
2025-03-30 07:12:06 [DEBUG] clck_gen.py:128 IND CLOCK 14484
2025-03-30 07:12:06 [DEBUG] clck_gen.py:128 IND CLOCK 14586
2025-03-30 07:12:06 [DEBUG] clck_gen.py:128 IND CLOCK 14688
2025-03-30 07:12:07 [DEBUG] clck_gen.py:128 IND CLOCK 14790
2025-03-30 07:12:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:12:07 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:12:07 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:12:07 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:12:07 [INFO] transceiver.py:241 (MS@172.18.26.22:6700) Frequency hopping disabled
2025-03-30 07:12:07 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:12:07 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:12:07 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:12:07 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:12:07 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:12:07 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:12:07 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 07:12:07 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 07:12:07 [DEBUG] clck_gen.py:128 IND CLOCK 14892
2025-03-30 07:12:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:12:07 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.26.22:6700) Recv SETFH cmd
2025-03-30 07:12:07 [INFO] transceiver.py:237 (MS@172.18.26.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2025-03-30 07:12:07 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:12:07 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:12:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:12:08 [DEBUG] clck_gen.py:128 IND CLOCK 14994
2025-03-30 07:12:08 [DEBUG] clck_gen.py:128 IND CLOCK 15096
2025-03-30 07:12:09 [DEBUG] clck_gen.py:128 IND CLOCK 15198
2025-03-30 07:12:09 [DEBUG] clck_gen.py:128 IND CLOCK 15300
2025-03-30 07:12:10 [DEBUG] clck_gen.py:128 IND CLOCK 15402
2025-03-30 07:12:10 [DEBUG] clck_gen.py:128 IND CLOCK 15504
2025-03-30 07:12:11 [DEBUG] clck_gen.py:128 IND CLOCK 15606
2025-03-30 07:12:11 [DEBUG] clck_gen.py:128 IND CLOCK 15708
2025-03-30 07:12:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:12:12 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:12:12 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:12:12 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:12:12 [INFO] transceiver.py:241 (MS@172.18.26.22:6700) Frequency hopping disabled
2025-03-30 07:12:12 [DEBUG] clck_gen.py:128 IND CLOCK 15810
2025-03-30 07:12:12 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:12:12 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:12:12 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:12:12 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:12:12 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:12:12 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:12:12 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 07:12:12 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 07:12:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:12:12 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.26.22:6700) Recv SETFH cmd
2025-03-30 07:12:12 [INFO] transceiver.py:237 (MS@172.18.26.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2025-03-30 07:12:12 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:12:12 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:12:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:12:12 [DEBUG] clck_gen.py:128 IND CLOCK 15912
2025-03-30 07:12:13 [DEBUG] clck_gen.py:128 IND CLOCK 16014
2025-03-30 07:12:13 [DEBUG] clck_gen.py:128 IND CLOCK 16116
2025-03-30 07:12:14 [DEBUG] clck_gen.py:128 IND CLOCK 16218
2025-03-30 07:12:14 [DEBUG] clck_gen.py:128 IND CLOCK 16320
2025-03-30 07:12:14 [DEBUG] clck_gen.py:128 IND CLOCK 16422
2025-03-30 07:12:15 [DEBUG] clck_gen.py:128 IND CLOCK 16524
2025-03-30 07:12:15 [DEBUG] clck_gen.py:128 IND CLOCK 16626
2025-03-30 07:12:16 [DEBUG] clck_gen.py:128 IND CLOCK 16728
2025-03-30 07:12:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:12:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:12:16 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:12:16 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:12:16 [INFO] transceiver.py:241 (MS@172.18.26.22:6700) Frequency hopping disabled
2025-03-30 07:12:16 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:12:16 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:12:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:12:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:12:16 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:12:16 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:12:16 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 07:12:16 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 07:12:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:12:16 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.26.22:6700) Recv SETFH cmd
2025-03-30 07:12:16 [INFO] transceiver.py:237 (MS@172.18.26.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2025-03-30 07:12:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:12:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:12:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:12:16 [DEBUG] clck_gen.py:128 IND CLOCK 16830
2025-03-30 07:12:17 [DEBUG] clck_gen.py:128 IND CLOCK 16932
2025-03-30 07:12:17 [DEBUG] clck_gen.py:128 IND CLOCK 17034
2025-03-30 07:12:18 [DEBUG] clck_gen.py:128 IND CLOCK 17136
2025-03-30 07:12:18 [DEBUG] clck_gen.py:128 IND CLOCK 17238
2025-03-30 07:12:19 [DEBUG] clck_gen.py:128 IND CLOCK 17340
2025-03-30 07:12:19 [DEBUG] clck_gen.py:128 IND CLOCK 17442
2025-03-30 07:12:20 [DEBUG] clck_gen.py:128 IND CLOCK 17544
2025-03-30 07:12:20 [DEBUG] clck_gen.py:128 IND CLOCK 17646
2025-03-30 07:12:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:12:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:12:20 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:12:20 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:12:20 [INFO] transceiver.py:241 (MS@172.18.26.22:6700) Frequency hopping disabled
2025-03-30 07:12:20 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:12:20 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:12:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:12:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:12:20 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:12:20 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:12:20 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 07:12:20 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 07:12:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:12:20 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.26.22:6700) Recv SETFH cmd
2025-03-30 07:12:20 [INFO] transceiver.py:237 (MS@172.18.26.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2025-03-30 07:12:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:12:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:12:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:12:21 [DEBUG] clck_gen.py:128 IND CLOCK 17748
2025-03-30 07:12:21 [DEBUG] clck_gen.py:128 IND CLOCK 17850
2025-03-30 07:12:22 [DEBUG] clck_gen.py:128 IND CLOCK 17952
2025-03-30 07:12:22 [DEBUG] clck_gen.py:128 IND CLOCK 18054
2025-03-30 07:12:22 [DEBUG] clck_gen.py:128 IND CLOCK 18156
2025-03-30 07:12:23 [DEBUG] clck_gen.py:128 IND CLOCK 18258
2025-03-30 07:12:23 [DEBUG] clck_gen.py:128 IND CLOCK 18360
2025-03-30 07:12:24 [DEBUG] clck_gen.py:128 IND CLOCK 18462
2025-03-30 07:12:24 [DEBUG] clck_gen.py:128 IND CLOCK 18564
2025-03-30 07:12:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:12:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:12:25 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:12:25 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:12:25 [INFO] transceiver.py:241 (MS@172.18.26.22:6700) Frequency hopping disabled
2025-03-30 07:12:25 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:12:25 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:12:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:12:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:12:25 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:12:25 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:12:25 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 07:12:25 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 07:12:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:12:25 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.26.22:6700) Recv SETFH cmd
2025-03-30 07:12:25 [INFO] transceiver.py:237 (MS@172.18.26.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2025-03-30 07:12:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:12:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:12:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:12:25 [DEBUG] clck_gen.py:128 IND CLOCK 18666
2025-03-30 07:12:25 [DEBUG] clck_gen.py:128 IND CLOCK 18768
2025-03-30 07:12:26 [DEBUG] clck_gen.py:128 IND CLOCK 18870
2025-03-30 07:12:26 [DEBUG] clck_gen.py:128 IND CLOCK 18972
2025-03-30 07:12:27 [DEBUG] clck_gen.py:128 IND CLOCK 19074
2025-03-30 07:12:27 [DEBUG] clck_gen.py:128 IND CLOCK 19176
2025-03-30 07:12:28 [DEBUG] clck_gen.py:128 IND CLOCK 19278
2025-03-30 07:12:28 [DEBUG] clck_gen.py:128 IND CLOCK 19380
2025-03-30 07:12:29 [DEBUG] clck_gen.py:128 IND CLOCK 19482
2025-03-30 07:12:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:12:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:12:29 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:12:29 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:12:29 [INFO] transceiver.py:241 (MS@172.18.26.22:6700) Frequency hopping disabled
2025-03-30 07:12:29 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:12:29 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:12:29 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:12:29 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:12:29 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:12:29 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:12:29 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:12:29 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:12:29 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 07:12:29 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 07:12:29 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 07:12:34 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 07:12:34 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 07:12:34 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:12:34 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:12:34 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:12:34 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:12:34 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:12:34 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 07:12:34 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:12:34 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 07:12:34 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 07:12:34 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 07:12:34 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 07:12:34 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 07:12:34 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:12:34 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 07:12:34 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:12:34 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 07:12:34 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 07:12:34 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 07:12:34 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 07:12:34 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 07:12:34 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:12:34 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 07:12:34 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:12:34 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 07:12:34 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 07:12:34 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 07:12:34 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 07:12:34 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 07:12:34 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:12:34 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 07:12:34 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:12:34 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 07:12:34 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 07:12:34 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 07:12:34 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 07:12:34 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 07:12:34 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 07:12:34 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 07:12:34 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 07:12:34 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 07:12:34 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 07:12:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 07:12:34 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:12:34 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:12:34 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 07:12:34 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:12:34 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:12:34 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:12:34 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 07:12:34 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 07:12:34 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 07:12:34 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 07:12:34 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:12:34 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:12:34 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:12:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 07:12:34 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:12:34 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:12:34 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:12:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:12:34 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:12:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:12:34 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:12:34 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:12:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:12:34 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:12:34 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:12:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:12:34 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:12:34 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:12:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:12:34 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:12:34 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:12:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:12:34 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:12:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:12:34 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:12:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:12:34 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:12:34 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:12:34 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:12:34 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:12:34 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:12:34 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:12:34 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 07:12:34 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 07:12:34 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 07:12:39 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 07:12:39 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 07:12:39 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:12:39 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:12:39 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:12:39 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:12:39 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:12:39 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 07:12:39 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:12:39 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 07:12:39 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 07:12:39 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 07:12:39 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 07:12:39 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 07:12:39 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:12:39 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:12:39 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 07:12:39 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 07:12:39 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 07:12:39 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 07:12:39 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 07:12:39 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 07:12:39 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:12:39 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:12:39 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 07:12:39 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 07:12:39 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 07:12:39 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 07:12:39 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 07:12:39 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 07:12:39 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:12:39 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:12:39 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 07:12:39 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 07:12:39 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 07:12:39 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 07:12:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 07:12:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 07:12:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 07:12:39 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 07:12:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 07:12:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 07:12:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 07:12:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:12:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 07:12:39 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 07:12:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:12:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:12:39 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 07:12:39 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 07:12:39 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 07:12:39 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 07:12:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:12:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:12:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:12:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 07:12:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:12:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:12:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:12:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:12:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:12:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:12:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:12:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:12:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:12:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:12:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:12:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:12:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:12:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:12:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:12:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:12:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:12:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:12:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:12:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:12:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:12:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:12:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:12:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:12:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:12:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:12:39 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-03-30 07:12:39 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-03-30 07:12:39 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-03-30 07:12:39 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-03-30 07:12:39 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-03-30 07:12:39 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-03-30 07:12:39 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-03-30 07:12:39 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-03-30 07:12:39 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-03-30 07:12:39 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-03-30 07:12:39 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=0 bl=148 pwr=0
2025-03-30 07:12:39 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=1 bl=148 pwr=0
2025-03-30 07:12:39 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=2 bl=148 pwr=0
2025-03-30 07:12:39 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=3 bl=148 pwr=0
2025-03-30 07:12:39 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=4 bl=148 pwr=0
2025-03-30 07:12:39 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=5 bl=148 pwr=0
2025-03-30 07:12:39 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=6 bl=148 pwr=0
2025-03-30 07:12:39 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=7 bl=148 pwr=0
2025-03-30 07:12:39 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 07:12:39 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 07:12:39 [DEBUG] fake_trx.py:317 (BTS@172.18.26.20:5700) Recv FAKE_CI cmd
2025-03-30 07:12:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:12:39 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:12:39 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:12:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:12:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:12:39 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:12:39 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:12:39 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 07:12:39 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 07:12:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:12:39 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:12:39 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:12:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:12:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:12:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:12:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:12:40 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:12:40 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:12:40 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:12:40 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:12:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:12:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:12:40 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:12:40 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:12:40 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 07:12:40 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 07:12:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:12:40 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:12:40 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:12:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:12:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:12:40 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-03-30 07:12:40 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:12:40 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:12:40 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:12:40 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:12:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:12:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:12:40 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:12:40 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:12:40 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:12:40 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:12:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:12:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:12:40 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:12:40 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:12:40 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 07:12:40 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 07:12:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:12:40 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:12:40 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:12:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:12:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:12:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:12:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:12:40 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:12:40 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:12:40 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:12:40 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:12:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:12:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:12:40 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:12:40 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:12:40 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 07:12:40 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 07:12:40 [DEBUG] clck_gen.py:128 IND CLOCK 306
2025-03-30 07:12:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:12:40 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:12:40 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:12:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:12:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:12:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:12:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:12:41 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:12:41 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:12:41 [DEBUG] clck_gen.py:128 IND CLOCK 408
2025-03-30 07:12:41 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:12:41 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:12:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:12:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:12:41 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:12:41 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:12:41 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 07:12:41 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 07:12:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:12:41 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:12:41 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:12:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:12:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:12:41 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:12:41 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:12:41 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:12:41 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:12:41 [DEBUG] clck_gen.py:128 IND CLOCK 510
2025-03-30 07:12:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:12:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:12:41 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:12:41 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:12:41 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:12:41 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:12:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:12:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:12:41 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:12:41 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:12:41 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 07:12:41 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 07:12:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:12:41 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.26.22:6700) Recv SETFH cmd
2025-03-30 07:12:41 [INFO] transceiver.py:237 (MS@172.18.26.22:6700) Frequency hopping configured: hsn=2, maio=0, ma_len=2
2025-03-30 07:12:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:12:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:12:42 [DEBUG] clck_gen.py:128 IND CLOCK 612
2025-03-30 07:12:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:12:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:12:42 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:12:42 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:12:42 [INFO] transceiver.py:241 (MS@172.18.26.22:6700) Frequency hopping disabled
2025-03-30 07:12:42 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:12:42 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:12:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:12:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:12:42 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:12:42 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:12:42 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 07:12:42 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 07:12:42 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:12:42 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:12:42 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:12:42 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:12:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:12:42 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.26.22:6700) Recv SETFH cmd
2025-03-30 07:12:42 [INFO] transceiver.py:237 (MS@172.18.26.22:6700) Frequency hopping configured: hsn=3, maio=3, ma_len=4
2025-03-30 07:12:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:12:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:12:42 [DEBUG] clck_gen.py:128 IND CLOCK 714
2025-03-30 07:12:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:12:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:12:42 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:12:42 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:12:42 [INFO] transceiver.py:241 (MS@172.18.26.22:6700) Frequency hopping disabled
2025-03-30 07:12:42 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:12:42 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:12:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:12:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:12:42 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:12:42 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:12:42 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 07:12:42 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 07:12:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:12:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:12:42 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:12:42 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:12:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:12:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:12:43 [DEBUG] clck_gen.py:128 IND CLOCK 816
2025-03-30 07:12:43 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:12:43 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:12:43 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:12:43 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:12:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:12:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:12:43 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:12:43 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:12:43 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:12:43 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:12:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:12:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:12:43 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:12:43 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:12:43 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 07:12:43 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 07:12:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:12:43 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:12:43 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:12:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:12:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:12:43 [DEBUG] clck_gen.py:128 IND CLOCK 918
2025-03-30 07:12:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:12:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:12:43 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:12:43 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:12:43 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:12:43 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:12:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:12:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:12:43 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:12:43 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:12:43 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 07:12:43 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 07:12:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:12:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:12:44 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:12:44 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:12:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:12:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:12:44 [DEBUG] clck_gen.py:128 IND CLOCK 1020
2025-03-30 07:12:44 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:12:44 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:12:44 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:12:44 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:12:44 [DEBUG] clck_gen.py:128 IND CLOCK 1122
2025-03-30 07:12:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:12:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:12:44 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:12:44 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:12:44 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:12:44 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:12:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:12:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:12:44 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:12:44 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:12:44 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 07:12:44 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 07:12:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:12:44 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.26.22:6700) Recv SETFH cmd
2025-03-30 07:12:44 [INFO] transceiver.py:237 (MS@172.18.26.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2025-03-30 07:12:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:12:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:12:45 [DEBUG] clck_gen.py:128 IND CLOCK 1224
2025-03-30 07:12:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:12:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:12:45 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:12:45 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:12:45 [INFO] transceiver.py:241 (MS@172.18.26.22:6700) Frequency hopping disabled
2025-03-30 07:12:45 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:12:45 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:12:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:12:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:12:45 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:12:45 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:12:45 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 07:12:45 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 07:12:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:12:45 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.26.22:6700) Recv SETFH cmd
2025-03-30 07:12:45 [INFO] transceiver.py:237 (MS@172.18.26.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2025-03-30 07:12:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:12:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:12:45 [DEBUG] clck_gen.py:128 IND CLOCK 1326
2025-03-30 07:12:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:12:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:12:45 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:12:45 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:12:45 [INFO] transceiver.py:241 (MS@172.18.26.22:6700) Frequency hopping disabled
2025-03-30 07:12:45 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:12:45 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:12:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:12:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:12:45 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:12:45 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:12:45 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 07:12:45 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 07:12:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:12:45 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.26.22:6700) Recv SETFH cmd
2025-03-30 07:12:45 [INFO] transceiver.py:237 (MS@172.18.26.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2025-03-30 07:12:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:12:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:12:45 [DEBUG] clck_gen.py:128 IND CLOCK 1428
2025-03-30 07:12:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:12:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:12:46 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:12:46 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:12:46 [INFO] transceiver.py:241 (MS@172.18.26.22:6700) Frequency hopping disabled
2025-03-30 07:12:46 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:12:46 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:12:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:12:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:12:46 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:12:46 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:12:46 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 07:12:46 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 07:12:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:12:46 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.26.22:6700) Recv SETFH cmd
2025-03-30 07:12:46 [INFO] transceiver.py:237 (MS@172.18.26.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2025-03-30 07:12:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:12:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:12:46 [DEBUG] clck_gen.py:128 IND CLOCK 1530
2025-03-30 07:12:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:12:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:12:46 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:12:46 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:12:46 [INFO] transceiver.py:241 (MS@172.18.26.22:6700) Frequency hopping disabled
2025-03-30 07:12:46 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:12:46 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:12:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:12:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:12:46 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:12:46 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:12:46 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 07:12:46 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 07:12:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:12:46 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.26.22:6700) Recv SETFH cmd
2025-03-30 07:12:46 [INFO] transceiver.py:237 (MS@172.18.26.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2025-03-30 07:12:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:12:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:12:46 [DEBUG] clck_gen.py:128 IND CLOCK 1632
2025-03-30 07:12:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:12:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:12:47 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:12:47 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:12:47 [INFO] transceiver.py:241 (MS@172.18.26.22:6700) Frequency hopping disabled
2025-03-30 07:12:47 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:12:47 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:12:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:12:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:12:47 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:12:47 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:12:47 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 07:12:47 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 07:12:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:12:47 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.26.22:6700) Recv SETFH cmd
2025-03-30 07:12:47 [INFO] transceiver.py:237 (MS@172.18.26.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2025-03-30 07:12:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:12:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:12:47 [DEBUG] clck_gen.py:128 IND CLOCK 1734
2025-03-30 07:12:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:12:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:12:47 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:12:47 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:12:47 [INFO] transceiver.py:241 (MS@172.18.26.22:6700) Frequency hopping disabled
2025-03-30 07:12:47 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:12:47 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:12:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:12:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:12:47 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:12:47 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:12:47 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 07:12:47 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 07:12:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:12:47 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.26.22:6700) Recv SETFH cmd
2025-03-30 07:12:47 [INFO] transceiver.py:237 (MS@172.18.26.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2025-03-30 07:12:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:12:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:12:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:12:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:12:47 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:12:47 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:12:47 [INFO] transceiver.py:241 (MS@172.18.26.22:6700) Frequency hopping disabled
2025-03-30 07:12:47 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:12:47 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:12:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:12:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:12:47 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:12:47 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:12:47 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 07:12:47 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 07:12:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:12:47 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.26.22:6700) Recv SETFH cmd
2025-03-30 07:12:47 [INFO] transceiver.py:237 (MS@172.18.26.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2025-03-30 07:12:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:12:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:12:47 [DEBUG] clck_gen.py:128 IND CLOCK 1836
2025-03-30 07:12:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:12:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:12:48 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:12:48 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:12:48 [INFO] transceiver.py:241 (MS@172.18.26.22:6700) Frequency hopping disabled
2025-03-30 07:12:48 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:12:48 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:12:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:12:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:12:48 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:12:48 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:12:48 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 07:12:48 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 07:12:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:12:48 [DEBUG] clck_gen.py:128 IND CLOCK 1938
2025-03-30 07:12:48 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.26.22:6700) Recv SETFH cmd
2025-03-30 07:12:48 [INFO] transceiver.py:237 (MS@172.18.26.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2025-03-30 07:12:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:12:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:12:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:12:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:12:48 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:12:48 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:12:48 [INFO] transceiver.py:241 (MS@172.18.26.22:6700) Frequency hopping disabled
2025-03-30 07:12:48 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:12:48 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:12:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:12:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:12:48 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:12:48 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:12:48 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 07:12:48 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 07:12:48 [DEBUG] clck_gen.py:128 IND CLOCK 2040
2025-03-30 07:12:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:12:48 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.26.22:6700) Recv SETFH cmd
2025-03-30 07:12:48 [INFO] transceiver.py:237 (MS@172.18.26.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2025-03-30 07:12:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:12:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:12:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:12:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:12:49 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:12:49 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:12:49 [INFO] transceiver.py:241 (MS@172.18.26.22:6700) Frequency hopping disabled
2025-03-30 07:12:49 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:12:49 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:12:49 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:12:49 [DEBUG] clck_gen.py:128 IND CLOCK 2142
2025-03-30 07:12:49 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:12:49 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:12:49 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:12:49 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:12:49 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 07:12:49 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 07:12:49 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 07:12:49 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:12:54 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 07:12:54 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 07:12:54 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:12:54 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:12:54 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:12:54 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:12:54 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:12:54 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 07:12:54 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:12:54 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 07:12:54 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 07:12:54 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 07:12:54 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 07:12:54 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 07:12:54 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:12:54 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:12:54 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 07:12:54 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 07:12:54 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 07:12:54 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 07:12:54 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 07:12:54 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 07:12:54 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:12:54 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:12:54 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 07:12:54 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 07:12:54 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 07:12:54 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 07:12:54 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 07:12:54 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 07:12:54 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:12:54 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 07:12:54 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:12:54 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 07:12:54 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 07:12:54 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 07:12:54 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 07:12:54 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 07:12:54 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 07:12:54 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 07:12:54 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 07:12:54 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 07:12:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 07:12:54 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:12:54 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 07:12:54 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 07:12:54 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:12:54 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:12:54 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 07:12:54 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 07:12:54 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 07:12:54 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 07:12:54 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:12:54 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:12:54 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:12:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 07:12:54 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:12:54 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:12:54 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:12:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:12:54 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:12:54 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:12:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:12:54 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:12:54 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:12:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:12:54 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:12:54 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:12:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:12:54 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:12:54 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:12:54 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:12:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:12:54 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:12:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:12:54 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:12:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:12:54 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:12:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:12:54 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:12:54 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:12:54 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:12:54 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-03-30 07:12:54 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-03-30 07:12:54 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-03-30 07:12:54 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-03-30 07:12:54 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-03-30 07:12:54 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-03-30 07:12:54 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-03-30 07:12:54 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-03-30 07:12:54 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-03-30 07:12:54 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-03-30 07:12:54 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=0 bl=148 pwr=0
2025-03-30 07:12:54 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=1 bl=148 pwr=0
2025-03-30 07:12:54 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=2 bl=148 pwr=0
2025-03-30 07:12:54 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=3 bl=148 pwr=0
2025-03-30 07:12:54 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=4 bl=148 pwr=0
2025-03-30 07:12:54 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=5 bl=148 pwr=0
2025-03-30 07:12:54 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=6 bl=148 pwr=0
2025-03-30 07:12:54 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=7 bl=148 pwr=0
2025-03-30 07:12:54 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 07:12:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:12:54 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 07:12:54 [DEBUG] fake_trx.py:317 (BTS@172.18.26.20:5700) Recv FAKE_CI cmd
2025-03-30 07:12:54 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:12:54 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:12:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:12:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:12:54 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:12:54 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:12:54 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 07:12:54 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 07:12:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:12:54 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:12:54 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:12:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:12:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:12:55 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-03-30 07:12:55 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:12:55 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:12:55 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:12:55 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:12:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:12:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:12:55 [DEBUG] clck_gen.py:128 IND CLOCK 306
2025-03-30 07:12:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:12:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:12:55 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:12:55 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:12:55 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:12:55 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:12:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:12:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:12:55 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:12:55 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:12:55 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 07:12:55 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 07:12:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:12:56 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:12:56 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:12:56 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:12:56 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:12:56 [DEBUG] clck_gen.py:128 IND CLOCK 408
2025-03-30 07:12:56 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:12:56 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:12:56 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:12:56 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:12:56 [DEBUG] clck_gen.py:128 IND CLOCK 510
2025-03-30 07:12:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:12:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:12:57 [DEBUG] clck_gen.py:128 IND CLOCK 612
2025-03-30 07:12:57 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:12:57 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:12:57 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:12:57 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:12:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:12:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:12:57 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:12:57 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:12:57 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:12:57 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:12:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:12:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:12:57 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:12:57 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:12:57 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 07:12:57 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 07:12:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:12:57 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:12:57 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:12:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:12:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:12:57 [DEBUG] clck_gen.py:128 IND CLOCK 714
2025-03-30 07:12:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:12:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:12:58 [DEBUG] clck_gen.py:128 IND CLOCK 816
2025-03-30 07:12:58 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:12:58 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:12:58 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:12:58 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:12:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:12:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:12:58 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:12:58 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:12:58 [DEBUG] clck_gen.py:128 IND CLOCK 918
2025-03-30 07:12:58 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:12:58 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:12:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:12:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:12:58 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:12:58 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:12:58 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 07:12:58 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 07:12:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:12:58 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:12:58 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:12:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:12:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:12:59 [DEBUG] clck_gen.py:128 IND CLOCK 1020
2025-03-30 07:12:59 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:12:59 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:12:59 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:12:59 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:12:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:12:59 [DEBUG] clck_gen.py:128 IND CLOCK 1122
2025-03-30 07:12:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:12:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:12:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:12:59 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:12:59 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:12:59 [DEBUG] clck_gen.py:128 IND CLOCK 1224
2025-03-30 07:12:59 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:12:59 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:12:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:12:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:12:59 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:12:59 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:12:59 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 07:12:59 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 07:13:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:13:00 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:13:00 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:13:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:13:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:13:00 [DEBUG] clck_gen.py:128 IND CLOCK 1326
2025-03-30 07:13:00 [DEBUG] clck_gen.py:128 IND CLOCK 1428
2025-03-30 07:13:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:13:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:13:01 [DEBUG] clck_gen.py:128 IND CLOCK 1530
2025-03-30 07:13:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:13:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:13:01 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:13:01 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:13:01 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:13:01 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:13:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:13:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:13:01 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:13:01 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:13:01 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 07:13:01 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 07:13:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:13:01 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.26.22:6700) Recv SETFH cmd
2025-03-30 07:13:01 [INFO] transceiver.py:237 (MS@172.18.26.22:6700) Frequency hopping configured: hsn=2, maio=0, ma_len=2
2025-03-30 07:13:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:13:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:13:01 [DEBUG] clck_gen.py:128 IND CLOCK 1632
2025-03-30 07:13:02 [DEBUG] clck_gen.py:128 IND CLOCK 1734
2025-03-30 07:13:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:13:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:13:02 [DEBUG] clck_gen.py:128 IND CLOCK 1836
2025-03-30 07:13:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:13:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:13:03 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:13:03 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:13:03 [INFO] transceiver.py:241 (MS@172.18.26.22:6700) Frequency hopping disabled
2025-03-30 07:13:03 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:13:03 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:13:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:13:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:13:03 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:13:03 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:13:03 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 07:13:03 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 07:13:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:13:03 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.26.22:6700) Recv SETFH cmd
2025-03-30 07:13:03 [INFO] transceiver.py:237 (MS@172.18.26.22:6700) Frequency hopping configured: hsn=3, maio=3, ma_len=4
2025-03-30 07:13:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:13:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:13:03 [DEBUG] clck_gen.py:128 IND CLOCK 1938
2025-03-30 07:13:03 [DEBUG] clck_gen.py:128 IND CLOCK 2040
2025-03-30 07:13:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:13:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:13:04 [DEBUG] clck_gen.py:128 IND CLOCK 2142
2025-03-30 07:13:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:13:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:13:04 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:13:04 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:13:04 [INFO] transceiver.py:241 (MS@172.18.26.22:6700) Frequency hopping disabled
2025-03-30 07:13:04 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:13:04 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:13:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:13:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:13:04 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:13:04 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:13:04 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 07:13:04 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 07:13:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:13:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:13:04 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:13:04 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:13:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:13:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:13:04 [DEBUG] clck_gen.py:128 IND CLOCK 2244
2025-03-30 07:13:05 [DEBUG] clck_gen.py:128 IND CLOCK 2346
2025-03-30 07:13:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:13:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:13:05 [DEBUG] clck_gen.py:128 IND CLOCK 2448
2025-03-30 07:13:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:13:06 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:13:06 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:13:06 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:13:06 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:13:06 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:13:06 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:13:06 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:13:06 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:13:06 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:13:06 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 07:13:06 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 07:13:06 [DEBUG] clck_gen.py:128 IND CLOCK 2550
2025-03-30 07:13:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:13:06 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:13:06 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:13:06 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:13:06 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:13:06 [DEBUG] clck_gen.py:128 IND CLOCK 2652
2025-03-30 07:13:07 [DEBUG] clck_gen.py:128 IND CLOCK 2754
2025-03-30 07:13:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:13:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:13:07 [DEBUG] clck_gen.py:128 IND CLOCK 2856
2025-03-30 07:13:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:13:07 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:13:07 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:13:07 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:13:07 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:13:07 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:13:07 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:13:07 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:13:07 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:13:07 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:13:07 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 07:13:07 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 07:13:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:13:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:13:07 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:13:07 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:13:07 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:13:07 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:13:07 [DEBUG] clck_gen.py:128 IND CLOCK 2958
2025-03-30 07:13:08 [DEBUG] clck_gen.py:128 IND CLOCK 3060
2025-03-30 07:13:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:13:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:13:08 [DEBUG] clck_gen.py:128 IND CLOCK 3162
2025-03-30 07:13:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:13:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:13:09 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:13:09 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:13:09 [DEBUG] clck_gen.py:128 IND CLOCK 3264
2025-03-30 07:13:09 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:13:09 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:13:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:13:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:13:09 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:13:09 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:13:09 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 07:13:09 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 07:13:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:13:09 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.26.22:6700) Recv SETFH cmd
2025-03-30 07:13:09 [INFO] transceiver.py:237 (MS@172.18.26.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2025-03-30 07:13:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:13:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:13:09 [DEBUG] clck_gen.py:128 IND CLOCK 3366
2025-03-30 07:13:10 [DEBUG] clck_gen.py:128 IND CLOCK 3468
2025-03-30 07:13:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:13:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:13:10 [DEBUG] clck_gen.py:128 IND CLOCK 3570
2025-03-30 07:13:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:13:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:13:10 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:13:10 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:13:10 [INFO] transceiver.py:241 (MS@172.18.26.22:6700) Frequency hopping disabled
2025-03-30 07:13:10 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:13:10 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:13:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:13:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:13:10 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:13:10 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:13:10 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 07:13:10 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 07:13:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:13:10 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.26.22:6700) Recv SETFH cmd
2025-03-30 07:13:10 [INFO] transceiver.py:237 (MS@172.18.26.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2025-03-30 07:13:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:13:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:13:11 [DEBUG] clck_gen.py:128 IND CLOCK 3672
2025-03-30 07:13:11 [DEBUG] clck_gen.py:128 IND CLOCK 3774
2025-03-30 07:13:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:13:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:13:12 [DEBUG] clck_gen.py:128 IND CLOCK 3876
2025-03-30 07:13:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:13:12 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:13:12 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:13:12 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:13:12 [INFO] transceiver.py:241 (MS@172.18.26.22:6700) Frequency hopping disabled
2025-03-30 07:13:12 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:13:12 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:13:12 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:13:12 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:13:12 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:13:12 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:13:12 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 07:13:12 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 07:13:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:13:12 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.26.22:6700) Recv SETFH cmd
2025-03-30 07:13:12 [INFO] transceiver.py:237 (MS@172.18.26.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2025-03-30 07:13:12 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:13:12 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:13:12 [DEBUG] clck_gen.py:128 IND CLOCK 3978
2025-03-30 07:13:13 [DEBUG] clck_gen.py:128 IND CLOCK 4080
2025-03-30 07:13:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:13:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:13:13 [DEBUG] clck_gen.py:128 IND CLOCK 4182
2025-03-30 07:13:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:13:13 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:13:13 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:13:13 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:13:13 [INFO] transceiver.py:241 (MS@172.18.26.22:6700) Frequency hopping disabled
2025-03-30 07:13:13 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:13:13 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:13:13 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:13:13 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:13:13 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:13:13 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:13:13 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 07:13:13 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 07:13:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:13:13 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.26.22:6700) Recv SETFH cmd
2025-03-30 07:13:13 [INFO] transceiver.py:237 (MS@172.18.26.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2025-03-30 07:13:13 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:13:13 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:13:14 [DEBUG] clck_gen.py:128 IND CLOCK 4284
2025-03-30 07:13:14 [DEBUG] clck_gen.py:128 IND CLOCK 4386
2025-03-30 07:13:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:13:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:13:15 [DEBUG] clck_gen.py:128 IND CLOCK 4488
2025-03-30 07:13:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:13:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:13:15 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:13:15 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:13:15 [INFO] transceiver.py:241 (MS@172.18.26.22:6700) Frequency hopping disabled
2025-03-30 07:13:15 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:13:15 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:13:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:13:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:13:15 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:13:15 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:13:15 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 07:13:15 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 07:13:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:13:15 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.26.22:6700) Recv SETFH cmd
2025-03-30 07:13:15 [INFO] transceiver.py:237 (MS@172.18.26.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2025-03-30 07:13:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:13:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:13:15 [DEBUG] clck_gen.py:128 IND CLOCK 4590
2025-03-30 07:13:15 [DEBUG] clck_gen.py:128 IND CLOCK 4692
2025-03-30 07:13:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:13:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:13:16 [DEBUG] clck_gen.py:128 IND CLOCK 4794
2025-03-30 07:13:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:13:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:13:16 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:13:16 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:13:16 [INFO] transceiver.py:241 (MS@172.18.26.22:6700) Frequency hopping disabled
2025-03-30 07:13:16 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:13:16 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:13:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:13:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:13:16 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:13:16 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:13:16 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 07:13:16 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 07:13:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:13:16 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.26.22:6700) Recv SETFH cmd
2025-03-30 07:13:16 [INFO] transceiver.py:237 (MS@172.18.26.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2025-03-30 07:13:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:13:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:13:16 [DEBUG] clck_gen.py:128 IND CLOCK 4896
2025-03-30 07:13:17 [DEBUG] clck_gen.py:128 IND CLOCK 4998
2025-03-30 07:13:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:13:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:13:17 [DEBUG] clck_gen.py:128 IND CLOCK 5100
2025-03-30 07:13:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:13:18 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:13:18 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:13:18 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:13:18 [INFO] transceiver.py:241 (MS@172.18.26.22:6700) Frequency hopping disabled
2025-03-30 07:13:18 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:13:18 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:13:18 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:13:18 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:13:18 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:13:18 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:13:18 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 07:13:18 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 07:13:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:13:18 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.26.22:6700) Recv SETFH cmd
2025-03-30 07:13:18 [INFO] transceiver.py:237 (MS@172.18.26.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2025-03-30 07:13:18 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:13:18 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:13:18 [DEBUG] clck_gen.py:128 IND CLOCK 5202
2025-03-30 07:13:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:13:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:13:18 [DEBUG] clck_gen.py:128 IND CLOCK 5304
2025-03-30 07:13:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:13:19 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:13:19 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:13:19 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:13:19 [INFO] transceiver.py:241 (MS@172.18.26.22:6700) Frequency hopping disabled
2025-03-30 07:13:19 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:13:19 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:13:19 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:13:19 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:13:19 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:13:19 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:13:19 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 07:13:19 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 07:13:19 [DEBUG] clck_gen.py:128 IND CLOCK 5406
2025-03-30 07:13:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:13:19 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.26.22:6700) Recv SETFH cmd
2025-03-30 07:13:19 [INFO] transceiver.py:237 (MS@172.18.26.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2025-03-30 07:13:19 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:13:19 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:13:19 [DEBUG] clck_gen.py:128 IND CLOCK 5508
2025-03-30 07:13:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:13:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:13:20 [DEBUG] clck_gen.py:128 IND CLOCK 5610
2025-03-30 07:13:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:13:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:13:20 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:13:20 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:13:20 [INFO] transceiver.py:241 (MS@172.18.26.22:6700) Frequency hopping disabled
2025-03-30 07:13:20 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:13:20 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:13:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:13:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:13:20 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:13:20 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:13:20 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 07:13:20 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 07:13:20 [DEBUG] clck_gen.py:128 IND CLOCK 5712
2025-03-30 07:13:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:13:20 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.26.22:6700) Recv SETFH cmd
2025-03-30 07:13:20 [INFO] transceiver.py:237 (MS@172.18.26.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2025-03-30 07:13:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:13:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:13:21 [DEBUG] clck_gen.py:128 IND CLOCK 5814
2025-03-30 07:13:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:13:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:13:21 [DEBUG] clck_gen.py:128 IND CLOCK 5916
2025-03-30 07:13:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:13:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:13:22 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:13:22 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:13:22 [INFO] transceiver.py:241 (MS@172.18.26.22:6700) Frequency hopping disabled
2025-03-30 07:13:22 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:13:22 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:13:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:13:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:13:22 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:13:22 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:13:22 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 07:13:22 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 07:13:22 [DEBUG] clck_gen.py:128 IND CLOCK 6018
2025-03-30 07:13:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:13:22 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.26.22:6700) Recv SETFH cmd
2025-03-30 07:13:22 [INFO] transceiver.py:237 (MS@172.18.26.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2025-03-30 07:13:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:13:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:13:22 [DEBUG] clck_gen.py:128 IND CLOCK 6120
2025-03-30 07:13:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:13:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:13:23 [DEBUG] clck_gen.py:128 IND CLOCK 6222
2025-03-30 07:13:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:13:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:13:23 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:13:23 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:13:23 [INFO] transceiver.py:241 (MS@172.18.26.22:6700) Frequency hopping disabled
2025-03-30 07:13:23 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:13:23 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:13:23 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:13:23 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:13:23 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:13:23 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:13:23 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:13:23 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 07:13:23 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 07:13:23 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 07:13:23 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:13:28 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 07:13:28 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 07:13:28 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:13:28 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:13:28 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:13:28 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:13:28 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:13:28 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 07:13:28 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:13:28 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 07:13:28 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 07:13:28 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 07:13:28 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 07:13:28 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 07:13:28 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:13:28 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 07:13:28 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:13:28 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 07:13:28 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 07:13:28 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 07:13:28 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 07:13:28 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 07:13:28 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:13:28 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 07:13:28 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:13:28 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 07:13:28 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 07:13:28 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 07:13:28 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 07:13:28 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 07:13:28 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:13:28 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 07:13:28 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:13:28 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 07:13:28 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 07:13:28 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 07:13:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 07:13:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 07:13:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 07:13:28 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 07:13:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 07:13:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 07:13:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 07:13:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:13:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 07:13:28 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 07:13:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:13:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:13:28 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 07:13:28 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 07:13:28 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 07:13:28 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 07:13:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:13:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:13:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:13:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 07:13:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:13:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:13:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:13:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:13:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:13:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:13:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:13:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:13:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:13:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:13:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:13:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:13:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:13:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:13:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:13:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:13:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:13:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:13:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:13:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:13:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:13:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:13:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:13:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:13:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:13:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:13:28 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-03-30 07:13:28 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-03-30 07:13:29 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-03-30 07:13:29 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-03-30 07:13:29 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-03-30 07:13:29 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-03-30 07:13:29 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-03-30 07:13:29 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-03-30 07:13:29 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-03-30 07:13:29 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-03-30 07:13:29 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=0 bl=148 pwr=0
2025-03-30 07:13:29 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=1 bl=148 pwr=0
2025-03-30 07:13:29 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=2 bl=148 pwr=0
2025-03-30 07:13:29 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=3 bl=148 pwr=0
2025-03-30 07:13:29 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=4 bl=148 pwr=0
2025-03-30 07:13:29 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=5 bl=148 pwr=0
2025-03-30 07:13:29 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=6 bl=148 pwr=0
2025-03-30 07:13:29 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=7 bl=148 pwr=0
2025-03-30 07:13:29 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 07:13:29 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 07:13:29 [DEBUG] fake_trx.py:317 (BTS@172.18.26.20:5700) Recv FAKE_CI cmd
2025-03-30 07:13:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:13:29 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:13:29 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:13:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:13:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:13:29 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:13:29 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:13:29 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 07:13:29 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 07:13:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:13:29 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:13:29 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:13:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:13:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:13:29 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-03-30 07:13:29 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:13:29 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:13:29 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:13:29 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:13:29 [DEBUG] clck_gen.py:128 IND CLOCK 306
2025-03-30 07:13:30 [DEBUG] clck_gen.py:128 IND CLOCK 408
2025-03-30 07:13:30 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:13:30 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:13:30 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:13:30 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:13:30 [DEBUG] clck_gen.py:128 IND CLOCK 510
2025-03-30 07:13:31 [DEBUG] clck_gen.py:128 IND CLOCK 612
2025-03-30 07:13:31 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:13:31 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:13:31 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:13:31 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:13:31 [DEBUG] clck_gen.py:128 IND CLOCK 714
2025-03-30 07:13:32 [DEBUG] clck_gen.py:128 IND CLOCK 816
2025-03-30 07:13:32 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:13:32 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:13:32 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:13:32 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:13:32 [DEBUG] clck_gen.py:128 IND CLOCK 918
2025-03-30 07:13:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:13:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:13:32 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:13:32 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:13:32 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:13:32 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:13:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:13:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:13:32 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:13:32 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:13:32 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 07:13:32 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 07:13:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:13:33 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:13:33 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:13:33 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:13:33 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:13:33 [DEBUG] clck_gen.py:128 IND CLOCK 1020
2025-03-30 07:13:33 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:13:33 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:13:33 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:13:33 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:13:33 [DEBUG] clck_gen.py:128 IND CLOCK 1122
2025-03-30 07:13:34 [DEBUG] clck_gen.py:128 IND CLOCK 1224
2025-03-30 07:13:34 [DEBUG] clck_gen.py:128 IND CLOCK 1326
2025-03-30 07:13:35 [DEBUG] clck_gen.py:128 IND CLOCK 1428
2025-03-30 07:13:35 [DEBUG] clck_gen.py:128 IND CLOCK 1530
2025-03-30 07:13:36 [DEBUG] clck_gen.py:128 IND CLOCK 1632
2025-03-30 07:13:36 [DEBUG] clck_gen.py:128 IND CLOCK 1734
2025-03-30 07:13:36 [DEBUG] clck_gen.py:128 IND CLOCK 1836
2025-03-30 07:13:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:13:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:13:37 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:13:37 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:13:37 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:13:37 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:13:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:13:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:13:37 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:13:37 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:13:37 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 07:13:37 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 07:13:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:13:37 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:13:37 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:13:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:13:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:13:37 [DEBUG] clck_gen.py:128 IND CLOCK 1938
2025-03-30 07:13:37 [DEBUG] clck_gen.py:128 IND CLOCK 2040
2025-03-30 07:13:38 [DEBUG] clck_gen.py:128 IND CLOCK 2142
2025-03-30 07:13:38 [DEBUG] clck_gen.py:128 IND CLOCK 2244
2025-03-30 07:13:39 [DEBUG] clck_gen.py:128 IND CLOCK 2346
2025-03-30 07:13:39 [DEBUG] clck_gen.py:128 IND CLOCK 2448
2025-03-30 07:13:40 [DEBUG] clck_gen.py:128 IND CLOCK 2550
2025-03-30 07:13:40 [DEBUG] clck_gen.py:128 IND CLOCK 2652
2025-03-30 07:13:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:13:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:13:41 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:13:41 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:13:41 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:13:41 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:13:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:13:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:13:41 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:13:41 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:13:41 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 07:13:41 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 07:13:41 [DEBUG] clck_gen.py:128 IND CLOCK 2754
2025-03-30 07:13:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:13:41 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:13:41 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:13:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:13:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:13:41 [DEBUG] clck_gen.py:128 IND CLOCK 2856
2025-03-30 07:13:41 [WARNING] clck_gen.py:108 CLCKGen: time overrun by -5007us; resetting the clock
2025-03-30 07:13:42 [DEBUG] clck_gen.py:128 IND CLOCK 2958
2025-03-30 07:13:42 [DEBUG] clck_gen.py:128 IND CLOCK 3060
2025-03-30 07:13:43 [DEBUG] clck_gen.py:128 IND CLOCK 3162
2025-03-30 07:13:43 [DEBUG] clck_gen.py:128 IND CLOCK 3264
2025-03-30 07:13:44 [DEBUG] clck_gen.py:128 IND CLOCK 3366
2025-03-30 07:13:44 [DEBUG] clck_gen.py:128 IND CLOCK 3468
2025-03-30 07:13:45 [DEBUG] clck_gen.py:128 IND CLOCK 3570
2025-03-30 07:13:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:13:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:13:45 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:13:45 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:13:45 [DEBUG] clck_gen.py:128 IND CLOCK 3672
2025-03-30 07:13:45 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:13:45 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:13:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:13:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:13:45 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:13:45 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:13:45 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 07:13:45 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 07:13:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:13:45 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:13:45 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:13:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:13:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:13:45 [DEBUG] clck_gen.py:128 IND CLOCK 3774
2025-03-30 07:13:46 [DEBUG] clck_gen.py:128 IND CLOCK 3876
2025-03-30 07:13:46 [DEBUG] clck_gen.py:128 IND CLOCK 3978
2025-03-30 07:13:47 [DEBUG] clck_gen.py:128 IND CLOCK 4080
2025-03-30 07:13:47 [DEBUG] clck_gen.py:128 IND CLOCK 4182
2025-03-30 07:13:48 [DEBUG] clck_gen.py:128 IND CLOCK 4284
2025-03-30 07:13:48 [DEBUG] clck_gen.py:128 IND CLOCK 4386
2025-03-30 07:13:49 [DEBUG] clck_gen.py:128 IND CLOCK 4488
2025-03-30 07:13:49 [DEBUG] clck_gen.py:128 IND CLOCK 4590
2025-03-30 07:13:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:13:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:13:50 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:13:50 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:13:50 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:13:50 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:13:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:13:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:13:50 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:13:50 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:13:50 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 07:13:50 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 07:13:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:13:50 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.26.22:6700) Recv SETFH cmd
2025-03-30 07:13:50 [INFO] transceiver.py:237 (MS@172.18.26.22:6700) Frequency hopping configured: hsn=2, maio=0, ma_len=2
2025-03-30 07:13:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:13:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:13:50 [DEBUG] clck_gen.py:128 IND CLOCK 4692
2025-03-30 07:13:50 [DEBUG] clck_gen.py:128 IND CLOCK 4794
2025-03-30 07:13:51 [DEBUG] clck_gen.py:128 IND CLOCK 4896
2025-03-30 07:13:51 [DEBUG] clck_gen.py:128 IND CLOCK 4998
2025-03-30 07:13:52 [DEBUG] clck_gen.py:128 IND CLOCK 5100
2025-03-30 07:13:52 [WARNING] clck_gen.py:108 CLCKGen: time overrun by -6896us; resetting the clock
2025-03-30 07:13:52 [DEBUG] clck_gen.py:128 IND CLOCK 5202
2025-03-30 07:13:53 [DEBUG] clck_gen.py:128 IND CLOCK 5304
2025-03-30 07:13:53 [DEBUG] clck_gen.py:128 IND CLOCK 5406
2025-03-30 07:13:53 [DEBUG] clck_gen.py:128 IND CLOCK 5508
2025-03-30 07:13:54 [DEBUG] clck_gen.py:128 IND CLOCK 5610
2025-03-30 07:13:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:13:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:13:54 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:13:54 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:13:54 [INFO] transceiver.py:241 (MS@172.18.26.22:6700) Frequency hopping disabled
2025-03-30 07:13:54 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:13:54 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:13:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:13:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:13:54 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:13:54 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:13:54 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 07:13:54 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 07:13:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:13:54 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.26.22:6700) Recv SETFH cmd
2025-03-30 07:13:54 [INFO] transceiver.py:237 (MS@172.18.26.22:6700) Frequency hopping configured: hsn=3, maio=3, ma_len=4
2025-03-30 07:13:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:13:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:13:54 [DEBUG] clck_gen.py:128 IND CLOCK 5712
2025-03-30 07:13:55 [DEBUG] clck_gen.py:128 IND CLOCK 5814
2025-03-30 07:13:55 [DEBUG] clck_gen.py:128 IND CLOCK 5916
2025-03-30 07:13:56 [DEBUG] clck_gen.py:128 IND CLOCK 6018
2025-03-30 07:13:56 [DEBUG] clck_gen.py:128 IND CLOCK 6120
2025-03-30 07:13:57 [DEBUG] clck_gen.py:128 IND CLOCK 6222
2025-03-30 07:13:57 [DEBUG] clck_gen.py:128 IND CLOCK 6324
2025-03-30 07:13:58 [DEBUG] clck_gen.py:128 IND CLOCK 6426
2025-03-30 07:13:58 [DEBUG] clck_gen.py:128 IND CLOCK 6528
2025-03-30 07:13:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:13:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:13:58 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:13:58 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:13:58 [INFO] transceiver.py:241 (MS@172.18.26.22:6700) Frequency hopping disabled
2025-03-30 07:13:58 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:13:58 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:13:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:13:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:13:58 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:13:58 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:13:58 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 07:13:58 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 07:13:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:13:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:13:58 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:13:58 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:13:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:13:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:13:59 [DEBUG] clck_gen.py:128 IND CLOCK 6630
2025-03-30 07:13:59 [DEBUG] clck_gen.py:128 IND CLOCK 6732
2025-03-30 07:14:00 [DEBUG] clck_gen.py:128 IND CLOCK 6834
2025-03-30 07:14:00 [DEBUG] clck_gen.py:128 IND CLOCK 6936
2025-03-30 07:14:01 [DEBUG] clck_gen.py:128 IND CLOCK 7038
2025-03-30 07:14:01 [DEBUG] clck_gen.py:128 IND CLOCK 7140
2025-03-30 07:14:01 [DEBUG] clck_gen.py:128 IND CLOCK 7242
2025-03-30 07:14:02 [DEBUG] clck_gen.py:128 IND CLOCK 7344
2025-03-30 07:14:02 [DEBUG] clck_gen.py:128 IND CLOCK 7446
2025-03-30 07:14:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:14:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:14:03 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:14:03 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:14:03 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:14:03 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:14:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:14:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:14:03 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:14:03 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:14:03 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 07:14:03 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 07:14:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:14:03 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:14:03 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:14:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:14:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:14:03 [DEBUG] clck_gen.py:128 IND CLOCK 7548
2025-03-30 07:14:03 [DEBUG] clck_gen.py:128 IND CLOCK 7650
2025-03-30 07:14:04 [DEBUG] clck_gen.py:128 IND CLOCK 7752
2025-03-30 07:14:04 [DEBUG] clck_gen.py:128 IND CLOCK 7854
2025-03-30 07:14:05 [DEBUG] clck_gen.py:128 IND CLOCK 7956
2025-03-30 07:14:05 [DEBUG] clck_gen.py:128 IND CLOCK 8058
2025-03-30 07:14:06 [DEBUG] clck_gen.py:128 IND CLOCK 8160
2025-03-30 07:14:06 [DEBUG] clck_gen.py:128 IND CLOCK 8262
2025-03-30 07:14:07 [DEBUG] clck_gen.py:128 IND CLOCK 8364
2025-03-30 07:14:07 [DEBUG] clck_gen.py:128 IND CLOCK 8466
2025-03-30 07:14:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:14:07 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:14:07 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:14:07 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:14:07 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:14:07 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:14:07 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:14:07 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:14:07 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:14:07 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:14:07 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 07:14:07 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 07:14:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:14:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:14:07 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:14:07 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:14:07 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:14:07 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:14:08 [DEBUG] clck_gen.py:128 IND CLOCK 8568
2025-03-30 07:14:08 [DEBUG] clck_gen.py:128 IND CLOCK 8670
2025-03-30 07:14:09 [DEBUG] clck_gen.py:128 IND CLOCK 8772
2025-03-30 07:14:09 [DEBUG] clck_gen.py:128 IND CLOCK 8874
2025-03-30 07:14:09 [DEBUG] clck_gen.py:128 IND CLOCK 8976
2025-03-30 07:14:10 [DEBUG] clck_gen.py:128 IND CLOCK 9078
2025-03-30 07:14:10 [DEBUG] clck_gen.py:128 IND CLOCK 9180
2025-03-30 07:14:11 [DEBUG] clck_gen.py:128 IND CLOCK 9282
2025-03-30 07:14:11 [DEBUG] clck_gen.py:128 IND CLOCK 9384
2025-03-30 07:14:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:14:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:14:11 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:14:11 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:14:11 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:14:11 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:14:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:14:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:14:11 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:14:11 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:14:11 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 07:14:11 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 07:14:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:14:11 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.26.22:6700) Recv SETFH cmd
2025-03-30 07:14:11 [INFO] transceiver.py:237 (MS@172.18.26.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2025-03-30 07:14:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:14:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:14:12 [DEBUG] clck_gen.py:128 IND CLOCK 9486
2025-03-30 07:14:12 [DEBUG] clck_gen.py:128 IND CLOCK 9588
2025-03-30 07:14:13 [DEBUG] clck_gen.py:128 IND CLOCK 9690
2025-03-30 07:14:13 [DEBUG] clck_gen.py:128 IND CLOCK 9792
2025-03-30 07:14:14 [DEBUG] clck_gen.py:128 IND CLOCK 9894
2025-03-30 07:14:14 [DEBUG] clck_gen.py:128 IND CLOCK 9996
2025-03-30 07:14:15 [DEBUG] clck_gen.py:128 IND CLOCK 10098
2025-03-30 07:14:15 [DEBUG] clck_gen.py:128 IND CLOCK 10200
2025-03-30 07:14:16 [DEBUG] clck_gen.py:128 IND CLOCK 10302
2025-03-30 07:14:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:14:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:14:16 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:14:16 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:14:16 [INFO] transceiver.py:241 (MS@172.18.26.22:6700) Frequency hopping disabled
2025-03-30 07:14:16 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:14:16 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:14:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:14:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:14:16 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:14:16 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:14:16 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 07:14:16 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 07:14:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:14:16 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.26.22:6700) Recv SETFH cmd
2025-03-30 07:14:16 [INFO] transceiver.py:237 (MS@172.18.26.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2025-03-30 07:14:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:14:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:14:16 [DEBUG] clck_gen.py:128 IND CLOCK 10404
2025-03-30 07:14:17 [DEBUG] clck_gen.py:128 IND CLOCK 10506
2025-03-30 07:14:17 [DEBUG] clck_gen.py:128 IND CLOCK 10608
2025-03-30 07:14:17 [DEBUG] clck_gen.py:128 IND CLOCK 10710
2025-03-30 07:14:18 [DEBUG] clck_gen.py:128 IND CLOCK 10812
2025-03-30 07:14:18 [DEBUG] clck_gen.py:128 IND CLOCK 10914
2025-03-30 07:14:19 [DEBUG] clck_gen.py:128 IND CLOCK 11016
2025-03-30 07:14:19 [DEBUG] clck_gen.py:128 IND CLOCK 11118
2025-03-30 07:14:20 [DEBUG] clck_gen.py:128 IND CLOCK 11220
2025-03-30 07:14:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:14:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:14:20 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:14:20 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:14:20 [INFO] transceiver.py:241 (MS@172.18.26.22:6700) Frequency hopping disabled
2025-03-30 07:14:20 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:14:20 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:14:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:14:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:14:20 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:14:20 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:14:20 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 07:14:20 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 07:14:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:14:20 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.26.22:6700) Recv SETFH cmd
2025-03-30 07:14:20 [INFO] transceiver.py:237 (MS@172.18.26.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2025-03-30 07:14:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:14:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:14:20 [DEBUG] clck_gen.py:128 IND CLOCK 11322
2025-03-30 07:14:21 [DEBUG] clck_gen.py:128 IND CLOCK 11424
2025-03-30 07:14:21 [DEBUG] clck_gen.py:128 IND CLOCK 11526
2025-03-30 07:14:22 [DEBUG] clck_gen.py:128 IND CLOCK 11628
2025-03-30 07:14:22 [DEBUG] clck_gen.py:128 IND CLOCK 11730
2025-03-30 07:14:23 [DEBUG] clck_gen.py:128 IND CLOCK 11832
2025-03-30 07:14:23 [DEBUG] clck_gen.py:128 IND CLOCK 11934
2025-03-30 07:14:24 [DEBUG] clck_gen.py:128 IND CLOCK 12036
2025-03-30 07:14:24 [DEBUG] clck_gen.py:128 IND CLOCK 12138
2025-03-30 07:14:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:14:24 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:14:24 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:14:24 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:14:24 [INFO] transceiver.py:241 (MS@172.18.26.22:6700) Frequency hopping disabled
2025-03-30 07:14:24 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:14:24 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:14:24 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:14:24 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:14:24 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:14:24 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:14:24 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 07:14:24 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 07:14:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:14:24 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.26.22:6700) Recv SETFH cmd
2025-03-30 07:14:24 [INFO] transceiver.py:237 (MS@172.18.26.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2025-03-30 07:14:24 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:14:24 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:14:25 [DEBUG] clck_gen.py:128 IND CLOCK 12240
2025-03-30 07:14:25 [DEBUG] clck_gen.py:128 IND CLOCK 12342
2025-03-30 07:14:25 [DEBUG] clck_gen.py:128 IND CLOCK 12444
2025-03-30 07:14:26 [DEBUG] clck_gen.py:128 IND CLOCK 12546
2025-03-30 07:14:26 [DEBUG] clck_gen.py:128 IND CLOCK 12648
2025-03-30 07:14:27 [DEBUG] clck_gen.py:128 IND CLOCK 12750
2025-03-30 07:14:27 [DEBUG] clck_gen.py:128 IND CLOCK 12852
2025-03-30 07:14:28 [DEBUG] clck_gen.py:128 IND CLOCK 12954
2025-03-30 07:14:28 [DEBUG] clck_gen.py:128 IND CLOCK 13056
2025-03-30 07:14:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:14:28 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:14:28 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:14:28 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:14:28 [INFO] transceiver.py:241 (MS@172.18.26.22:6700) Frequency hopping disabled
2025-03-30 07:14:28 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:14:28 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:14:28 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:14:28 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:14:28 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:14:28 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:14:28 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 07:14:28 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 07:14:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:14:29 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.26.22:6700) Recv SETFH cmd
2025-03-30 07:14:29 [INFO] transceiver.py:237 (MS@172.18.26.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2025-03-30 07:14:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:14:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:14:29 [DEBUG] clck_gen.py:128 IND CLOCK 13158
2025-03-30 07:14:29 [DEBUG] clck_gen.py:128 IND CLOCK 13260
2025-03-30 07:14:30 [DEBUG] clck_gen.py:128 IND CLOCK 13362
2025-03-30 07:14:30 [DEBUG] clck_gen.py:128 IND CLOCK 13464
2025-03-30 07:14:31 [DEBUG] clck_gen.py:128 IND CLOCK 13566
2025-03-30 07:14:31 [DEBUG] clck_gen.py:128 IND CLOCK 13668
2025-03-30 07:14:32 [DEBUG] clck_gen.py:128 IND CLOCK 13770
2025-03-30 07:14:32 [DEBUG] clck_gen.py:128 IND CLOCK 13872
2025-03-30 07:14:33 [DEBUG] clck_gen.py:128 IND CLOCK 13974
2025-03-30 07:14:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:14:33 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:14:33 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:14:33 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:14:33 [INFO] transceiver.py:241 (MS@172.18.26.22:6700) Frequency hopping disabled
2025-03-30 07:14:33 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:14:33 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:14:33 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:14:33 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:14:33 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:14:33 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:14:33 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 07:14:33 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 07:14:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:14:33 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.26.22:6700) Recv SETFH cmd
2025-03-30 07:14:33 [INFO] transceiver.py:237 (MS@172.18.26.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2025-03-30 07:14:33 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:14:33 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:14:33 [DEBUG] clck_gen.py:128 IND CLOCK 14076
2025-03-30 07:14:33 [DEBUG] clck_gen.py:128 IND CLOCK 14178
2025-03-30 07:14:34 [DEBUG] clck_gen.py:128 IND CLOCK 14280
2025-03-30 07:14:34 [DEBUG] clck_gen.py:128 IND CLOCK 14382
2025-03-30 07:14:35 [DEBUG] clck_gen.py:128 IND CLOCK 14484
2025-03-30 07:14:35 [DEBUG] clck_gen.py:128 IND CLOCK 14586
2025-03-30 07:14:36 [DEBUG] clck_gen.py:128 IND CLOCK 14688
2025-03-30 07:14:36 [DEBUG] clck_gen.py:128 IND CLOCK 14790
2025-03-30 07:14:37 [DEBUG] clck_gen.py:128 IND CLOCK 14892
2025-03-30 07:14:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:14:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:14:37 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:14:37 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:14:37 [INFO] transceiver.py:241 (MS@172.18.26.22:6700) Frequency hopping disabled
2025-03-30 07:14:37 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:14:37 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:14:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:14:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:14:37 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:14:37 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:14:37 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 07:14:37 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 07:14:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:14:37 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.26.22:6700) Recv SETFH cmd
2025-03-30 07:14:37 [INFO] transceiver.py:237 (MS@172.18.26.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2025-03-30 07:14:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:14:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:14:37 [DEBUG] clck_gen.py:128 IND CLOCK 14994
2025-03-30 07:14:38 [DEBUG] clck_gen.py:128 IND CLOCK 15096
2025-03-30 07:14:38 [DEBUG] clck_gen.py:128 IND CLOCK 15198
2025-03-30 07:14:39 [DEBUG] clck_gen.py:128 IND CLOCK 15300
2025-03-30 07:14:39 [DEBUG] clck_gen.py:128 IND CLOCK 15402
2025-03-30 07:14:40 [DEBUG] clck_gen.py:128 IND CLOCK 15504
2025-03-30 07:14:40 [DEBUG] clck_gen.py:128 IND CLOCK 15606
2025-03-30 07:14:41 [DEBUG] clck_gen.py:128 IND CLOCK 15708
2025-03-30 07:14:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:14:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:14:41 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:14:41 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:14:41 [INFO] transceiver.py:241 (MS@172.18.26.22:6700) Frequency hopping disabled
2025-03-30 07:14:41 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:14:41 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:14:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:14:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:14:41 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:14:41 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:14:41 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 07:14:41 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 07:14:41 [DEBUG] clck_gen.py:128 IND CLOCK 15810
2025-03-30 07:14:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:14:41 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.26.22:6700) Recv SETFH cmd
2025-03-30 07:14:41 [INFO] transceiver.py:237 (MS@172.18.26.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2025-03-30 07:14:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:14:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:14:41 [DEBUG] clck_gen.py:128 IND CLOCK 15912
2025-03-30 07:14:42 [DEBUG] clck_gen.py:128 IND CLOCK 16014
2025-03-30 07:14:42 [DEBUG] clck_gen.py:128 IND CLOCK 16116
2025-03-30 07:14:43 [DEBUG] clck_gen.py:128 IND CLOCK 16218
2025-03-30 07:14:43 [DEBUG] clck_gen.py:128 IND CLOCK 16320
2025-03-30 07:14:44 [DEBUG] clck_gen.py:128 IND CLOCK 16422
2025-03-30 07:14:44 [DEBUG] clck_gen.py:128 IND CLOCK 16524
2025-03-30 07:14:45 [DEBUG] clck_gen.py:128 IND CLOCK 16626
2025-03-30 07:14:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:14:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:14:45 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:14:45 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:14:45 [INFO] transceiver.py:241 (MS@172.18.26.22:6700) Frequency hopping disabled
2025-03-30 07:14:45 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:14:45 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:14:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:14:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:14:45 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:14:45 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:14:45 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 07:14:45 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 07:14:45 [DEBUG] clck_gen.py:128 IND CLOCK 16728
2025-03-30 07:14:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:14:45 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.26.22:6700) Recv SETFH cmd
2025-03-30 07:14:45 [INFO] transceiver.py:237 (MS@172.18.26.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2025-03-30 07:14:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:14:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:14:46 [DEBUG] clck_gen.py:128 IND CLOCK 16830
2025-03-30 07:14:46 [DEBUG] clck_gen.py:128 IND CLOCK 16932
2025-03-30 07:14:47 [DEBUG] clck_gen.py:128 IND CLOCK 17034
2025-03-30 07:14:47 [DEBUG] clck_gen.py:128 IND CLOCK 17136
2025-03-30 07:14:48 [DEBUG] clck_gen.py:128 IND CLOCK 17238
2025-03-30 07:14:48 [DEBUG] clck_gen.py:128 IND CLOCK 17340
2025-03-30 07:14:49 [DEBUG] clck_gen.py:128 IND CLOCK 17442
2025-03-30 07:14:49 [DEBUG] clck_gen.py:128 IND CLOCK 17544
2025-03-30 07:14:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:14:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:14:49 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:14:49 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:14:49 [INFO] transceiver.py:241 (MS@172.18.26.22:6700) Frequency hopping disabled
2025-03-30 07:14:49 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:14:49 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:14:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:14:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:14:49 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:14:49 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:14:49 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 07:14:49 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 07:14:49 [DEBUG] clck_gen.py:128 IND CLOCK 17646
2025-03-30 07:14:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:14:49 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.26.22:6700) Recv SETFH cmd
2025-03-30 07:14:49 [INFO] transceiver.py:237 (MS@172.18.26.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2025-03-30 07:14:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:14:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:14:50 [DEBUG] clck_gen.py:128 IND CLOCK 17748
2025-03-30 07:14:50 [DEBUG] clck_gen.py:128 IND CLOCK 17850
2025-03-30 07:14:51 [DEBUG] clck_gen.py:128 IND CLOCK 17952
2025-03-30 07:14:51 [DEBUG] clck_gen.py:128 IND CLOCK 18054
2025-03-30 07:14:51 [WARNING] clck_gen.py:108 CLCKGen: time overrun by -17302us; resetting the clock
2025-03-30 07:14:52 [DEBUG] clck_gen.py:128 IND CLOCK 18156
2025-03-30 07:14:52 [DEBUG] clck_gen.py:128 IND CLOCK 18258
2025-03-30 07:14:53 [DEBUG] clck_gen.py:128 IND CLOCK 18360
2025-03-30 07:14:53 [DEBUG] clck_gen.py:128 IND CLOCK 18462
2025-03-30 07:14:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:14:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:14:54 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:14:54 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:14:54 [INFO] transceiver.py:241 (MS@172.18.26.22:6700) Frequency hopping disabled
2025-03-30 07:14:54 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:14:54 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:14:54 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:14:54 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:14:54 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:14:54 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:14:54 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:14:54 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:14:54 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 07:14:54 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 07:14:54 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 07:14:59 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 07:14:59 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 07:14:59 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:14:59 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:14:59 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:14:59 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:14:59 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:14:59 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 07:14:59 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:14:59 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 07:14:59 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 07:14:59 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 07:14:59 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 07:14:59 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 07:14:59 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:14:59 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:14:59 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 07:14:59 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 07:14:59 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 07:14:59 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 07:14:59 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 07:14:59 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 07:14:59 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:14:59 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:14:59 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 07:14:59 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 07:14:59 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 07:14:59 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 07:14:59 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 07:14:59 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 07:14:59 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:14:59 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:14:59 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 07:14:59 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 07:14:59 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 07:14:59 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 07:14:59 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 07:14:59 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 07:14:59 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 07:14:59 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 07:14:59 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 07:14:59 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 07:14:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 07:14:59 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:14:59 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 07:14:59 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 07:14:59 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:14:59 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:14:59 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 07:14:59 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 07:14:59 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 07:14:59 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 07:14:59 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:14:59 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:14:59 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:14:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 07:14:59 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:14:59 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:14:59 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:14:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:14:59 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:14:59 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:14:59 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:14:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:14:59 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:14:59 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:14:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:14:59 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:14:59 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:14:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:14:59 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:14:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:14:59 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:14:59 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:14:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:14:59 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:14:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:14:59 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:14:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:14:59 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:14:59 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:14:59 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:14:59 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:14:59 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:14:59 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:14:59 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 07:14:59 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 07:14:59 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 07:14:59 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:15:04 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 07:15:04 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 07:15:04 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:15:04 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:15:04 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:15:04 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:15:04 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:15:04 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 07:15:04 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:15:04 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 07:15:04 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 07:15:04 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 07:15:04 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 07:15:04 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 07:15:04 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:15:04 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:15:04 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 07:15:04 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 07:15:04 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 07:15:04 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 07:15:04 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 07:15:04 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 07:15:04 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:15:04 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:15:04 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 07:15:04 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 07:15:04 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 07:15:04 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 07:15:04 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 07:15:04 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 07:15:04 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:15:04 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:15:04 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 07:15:04 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 07:15:04 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 07:15:04 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 07:15:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 07:15:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 07:15:04 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 07:15:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 07:15:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 07:15:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 07:15:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 07:15:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:15:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 07:15:04 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 07:15:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:15:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:15:04 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 07:15:04 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 07:15:04 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 07:15:04 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 07:15:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:15:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:15:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:15:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 07:15:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:15:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:15:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:15:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:15:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:15:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:15:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:15:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:15:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:15:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:15:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:15:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:15:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:15:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:15:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:15:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:15:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:15:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:15:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:15:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:15:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:15:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:15:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:15:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:15:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:15:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:15:04 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-03-30 07:15:04 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-03-30 07:15:04 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-03-30 07:15:04 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-03-30 07:15:04 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-03-30 07:15:04 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-03-30 07:15:04 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-03-30 07:15:04 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-03-30 07:15:04 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-03-30 07:15:04 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-03-30 07:15:04 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=0 bl=148 pwr=0
2025-03-30 07:15:04 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=1 bl=148 pwr=0
2025-03-30 07:15:04 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=2 bl=148 pwr=0
2025-03-30 07:15:04 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=3 bl=148 pwr=0
2025-03-30 07:15:04 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=4 bl=148 pwr=0
2025-03-30 07:15:04 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=5 bl=148 pwr=0
2025-03-30 07:15:04 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=6 bl=148 pwr=0
2025-03-30 07:15:04 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=7 bl=148 pwr=0
2025-03-30 07:15:04 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 07:15:04 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 07:15:04 [DEBUG] fake_trx.py:317 (BTS@172.18.26.20:5700) Recv FAKE_CI cmd
2025-03-30 07:15:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:15:04 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:15:04 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:15:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:15:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:15:04 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:15:04 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:15:04 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 07:15:04 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 07:15:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:15:04 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:15:04 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:15:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:15:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:15:05 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-03-30 07:15:05 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:15:05 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:15:05 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:15:05 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:15:05 [DEBUG] clck_gen.py:128 IND CLOCK 306
2025-03-30 07:15:06 [DEBUG] clck_gen.py:128 IND CLOCK 408
2025-03-30 07:15:06 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:15:06 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:15:06 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:15:06 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:15:06 [DEBUG] clck_gen.py:128 IND CLOCK 510
2025-03-30 07:15:07 [DEBUG] clck_gen.py:128 IND CLOCK 612
2025-03-30 07:15:07 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:15:07 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:15:07 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:15:07 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:15:07 [DEBUG] clck_gen.py:128 IND CLOCK 714
2025-03-30 07:15:08 [DEBUG] clck_gen.py:128 IND CLOCK 816
2025-03-30 07:15:08 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:15:08 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:15:08 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:15:08 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:15:08 [DEBUG] clck_gen.py:128 IND CLOCK 918
2025-03-30 07:15:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:15:08 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:15:08 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:15:08 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:15:08 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:15:08 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:15:08 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:15:08 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:15:08 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:15:08 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:15:08 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 07:15:08 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 07:15:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:15:09 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:15:09 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:15:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:15:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:15:09 [DEBUG] clck_gen.py:128 IND CLOCK 1020
2025-03-30 07:15:09 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:15:09 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:15:09 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:15:09 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:15:09 [DEBUG] clck_gen.py:128 IND CLOCK 1122
2025-03-30 07:15:09 [DEBUG] clck_gen.py:128 IND CLOCK 1224
2025-03-30 07:15:10 [DEBUG] clck_gen.py:128 IND CLOCK 1326
2025-03-30 07:15:10 [DEBUG] clck_gen.py:128 IND CLOCK 1428
2025-03-30 07:15:11 [DEBUG] clck_gen.py:128 IND CLOCK 1530
2025-03-30 07:15:11 [DEBUG] clck_gen.py:128 IND CLOCK 1632
2025-03-30 07:15:12 [DEBUG] clck_gen.py:128 IND CLOCK 1734
2025-03-30 07:15:12 [DEBUG] clck_gen.py:128 IND CLOCK 1836
2025-03-30 07:15:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:15:13 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:15:13 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:15:13 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:15:13 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:15:13 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:15:13 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:15:13 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:15:13 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:15:13 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:15:13 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 07:15:13 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 07:15:13 [DEBUG] clck_gen.py:128 IND CLOCK 1938
2025-03-30 07:15:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:15:13 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:15:13 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:15:13 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:15:13 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:15:13 [DEBUG] clck_gen.py:128 IND CLOCK 2040
2025-03-30 07:15:14 [DEBUG] clck_gen.py:128 IND CLOCK 2142
2025-03-30 07:15:14 [DEBUG] clck_gen.py:128 IND CLOCK 2244
2025-03-30 07:15:15 [DEBUG] clck_gen.py:128 IND CLOCK 2346
2025-03-30 07:15:15 [DEBUG] clck_gen.py:128 IND CLOCK 2448
2025-03-30 07:15:16 [DEBUG] clck_gen.py:128 IND CLOCK 2550
2025-03-30 07:15:16 [DEBUG] clck_gen.py:128 IND CLOCK 2652
2025-03-30 07:15:17 [DEBUG] clck_gen.py:128 IND CLOCK 2754
2025-03-30 07:15:17 [DEBUG] clck_gen.py:128 IND CLOCK 2856
2025-03-30 07:15:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:15:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:15:17 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:15:17 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:15:17 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:15:17 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:15:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:15:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:15:17 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:15:17 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:15:17 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 07:15:17 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 07:15:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:15:17 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:15:17 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:15:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:15:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:15:17 [DEBUG] clck_gen.py:128 IND CLOCK 2958
2025-03-30 07:15:18 [DEBUG] clck_gen.py:128 IND CLOCK 3060
2025-03-30 07:15:18 [DEBUG] clck_gen.py:128 IND CLOCK 3162
2025-03-30 07:15:19 [DEBUG] clck_gen.py:128 IND CLOCK 3264
2025-03-30 07:15:19 [DEBUG] clck_gen.py:128 IND CLOCK 3366
2025-03-30 07:15:20 [DEBUG] clck_gen.py:128 IND CLOCK 3468
2025-03-30 07:15:20 [DEBUG] clck_gen.py:128 IND CLOCK 3570
2025-03-30 07:15:21 [DEBUG] clck_gen.py:128 IND CLOCK 3672
2025-03-30 07:15:21 [DEBUG] clck_gen.py:128 IND CLOCK 3774
2025-03-30 07:15:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:15:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:15:21 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:15:21 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:15:21 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:15:21 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:15:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:15:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:15:21 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:15:21 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:15:21 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 07:15:21 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 07:15:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:15:21 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:15:21 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:15:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:15:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:15:22 [DEBUG] clck_gen.py:128 IND CLOCK 3876
2025-03-30 07:15:22 [DEBUG] clck_gen.py:128 IND CLOCK 3978
2025-03-30 07:15:23 [DEBUG] clck_gen.py:128 IND CLOCK 4080
2025-03-30 07:15:23 [DEBUG] clck_gen.py:128 IND CLOCK 4182
2025-03-30 07:15:24 [DEBUG] clck_gen.py:128 IND CLOCK 4284
2025-03-30 07:15:24 [DEBUG] clck_gen.py:128 IND CLOCK 4386
2025-03-30 07:15:25 [DEBUG] clck_gen.py:128 IND CLOCK 4488
2025-03-30 07:15:25 [DEBUG] clck_gen.py:128 IND CLOCK 4590
2025-03-30 07:15:25 [DEBUG] clck_gen.py:128 IND CLOCK 4692
2025-03-30 07:15:26 [DEBUG] clck_gen.py:128 IND CLOCK 4794
2025-03-30 07:15:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:15:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:15:26 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:15:26 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:15:26 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:15:26 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:15:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:15:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:15:26 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:15:26 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:15:26 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 07:15:26 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 07:15:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:15:26 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.26.22:6700) Recv SETFH cmd
2025-03-30 07:15:26 [INFO] transceiver.py:237 (MS@172.18.26.22:6700) Frequency hopping configured: hsn=2, maio=0, ma_len=2
2025-03-30 07:15:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:15:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:15:26 [DEBUG] clck_gen.py:128 IND CLOCK 4896
2025-03-30 07:15:27 [DEBUG] clck_gen.py:128 IND CLOCK 4998
2025-03-30 07:15:27 [DEBUG] clck_gen.py:128 IND CLOCK 5100
2025-03-30 07:15:28 [DEBUG] clck_gen.py:128 IND CLOCK 5202
2025-03-30 07:15:28 [DEBUG] clck_gen.py:128 IND CLOCK 5304
2025-03-30 07:15:29 [DEBUG] clck_gen.py:128 IND CLOCK 5406
2025-03-30 07:15:29 [DEBUG] clck_gen.py:128 IND CLOCK 5508
2025-03-30 07:15:30 [DEBUG] clck_gen.py:128 IND CLOCK 5610
2025-03-30 07:15:30 [DEBUG] clck_gen.py:128 IND CLOCK 5712
2025-03-30 07:15:31 [DEBUG] clck_gen.py:128 IND CLOCK 5814
2025-03-30 07:15:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:15:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:15:31 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:15:31 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:15:31 [INFO] transceiver.py:241 (MS@172.18.26.22:6700) Frequency hopping disabled
2025-03-30 07:15:31 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:15:31 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:15:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:15:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:15:31 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:15:31 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:15:31 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 07:15:31 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 07:15:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:15:31 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.26.22:6700) Recv SETFH cmd
2025-03-30 07:15:31 [INFO] transceiver.py:237 (MS@172.18.26.22:6700) Frequency hopping configured: hsn=3, maio=3, ma_len=4
2025-03-30 07:15:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:15:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:15:31 [DEBUG] clck_gen.py:128 IND CLOCK 5916
2025-03-30 07:15:32 [DEBUG] clck_gen.py:128 IND CLOCK 6018
2025-03-30 07:15:32 [DEBUG] clck_gen.py:128 IND CLOCK 6120
2025-03-30 07:15:33 [DEBUG] clck_gen.py:128 IND CLOCK 6222
2025-03-30 07:15:33 [DEBUG] clck_gen.py:128 IND CLOCK 6324
2025-03-30 07:15:33 [DEBUG] clck_gen.py:128 IND CLOCK 6426
2025-03-30 07:15:34 [DEBUG] clck_gen.py:128 IND CLOCK 6528
2025-03-30 07:15:34 [WARNING] transceiver.py:330 (MS@172.18.26.22:6700) Stale TRXD message (fn=6604): fn=6603 tn=3 bl=148 pwr=0
2025-03-30 07:15:34 [WARNING] transceiver.py:330 (MS@172.18.26.22:6700) Stale TRXD message (fn=6604): fn=6603 tn=4 pwr=0
2025-03-30 07:15:34 [WARNING] transceiver.py:330 (MS@172.18.26.22:6700) Stale TRXD message (fn=6604): fn=6603 tn=5 pwr=0
2025-03-30 07:15:34 [WARNING] transceiver.py:330 (MS@172.18.26.22:6700) Stale TRXD message (fn=6604): fn=6603 tn=6 pwr=0
2025-03-30 07:15:34 [WARNING] transceiver.py:330 (MS@172.18.26.22:6700) Stale TRXD message (fn=6604): fn=6603 tn=7 pwr=0
2025-03-30 07:15:34 [DEBUG] clck_gen.py:128 IND CLOCK 6630
2025-03-30 07:15:35 [DEBUG] clck_gen.py:128 IND CLOCK 6732
2025-03-30 07:15:35 [DEBUG] clck_gen.py:128 IND CLOCK 6834
2025-03-30 07:15:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:15:36 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:15:36 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:15:36 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:15:36 [INFO] transceiver.py:241 (MS@172.18.26.22:6700) Frequency hopping disabled
2025-03-30 07:15:36 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:15:36 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:15:36 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:15:36 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:15:36 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:15:36 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:15:36 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 07:15:36 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 07:15:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:15:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:15:36 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:15:36 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:15:36 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:15:36 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:15:36 [DEBUG] clck_gen.py:128 IND CLOCK 6936
2025-03-30 07:15:36 [DEBUG] clck_gen.py:128 IND CLOCK 7038
2025-03-30 07:15:37 [DEBUG] clck_gen.py:128 IND CLOCK 7140
2025-03-30 07:15:37 [DEBUG] clck_gen.py:128 IND CLOCK 7242
2025-03-30 07:15:38 [DEBUG] clck_gen.py:128 IND CLOCK 7344
2025-03-30 07:15:38 [DEBUG] clck_gen.py:128 IND CLOCK 7446
2025-03-30 07:15:39 [DEBUG] clck_gen.py:128 IND CLOCK 7548
2025-03-30 07:15:39 [DEBUG] clck_gen.py:128 IND CLOCK 7650
2025-03-30 07:15:40 [DEBUG] clck_gen.py:128 IND CLOCK 7752
2025-03-30 07:15:40 [DEBUG] clck_gen.py:128 IND CLOCK 7854
2025-03-30 07:15:41 [DEBUG] clck_gen.py:128 IND CLOCK 7956
2025-03-30 07:15:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:15:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:15:41 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:15:41 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:15:41 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:15:41 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:15:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:15:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:15:41 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:15:41 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:15:41 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 07:15:41 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 07:15:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:15:41 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:15:41 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:15:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:15:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:15:41 [DEBUG] clck_gen.py:128 IND CLOCK 8058
2025-03-30 07:15:41 [DEBUG] clck_gen.py:128 IND CLOCK 8160
2025-03-30 07:15:42 [DEBUG] clck_gen.py:128 IND CLOCK 8262
2025-03-30 07:15:42 [DEBUG] clck_gen.py:128 IND CLOCK 8364
2025-03-30 07:15:43 [DEBUG] clck_gen.py:128 IND CLOCK 8466
2025-03-30 07:15:43 [DEBUG] clck_gen.py:128 IND CLOCK 8568
2025-03-30 07:15:44 [DEBUG] clck_gen.py:128 IND CLOCK 8670
2025-03-30 07:15:44 [DEBUG] clck_gen.py:128 IND CLOCK 8772
2025-03-30 07:15:45 [DEBUG] clck_gen.py:128 IND CLOCK 8874
2025-03-30 07:15:45 [DEBUG] clck_gen.py:128 IND CLOCK 8976
2025-03-30 07:15:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:15:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:15:45 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:15:45 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:15:45 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:15:45 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:15:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:15:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:15:45 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:15:45 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:15:45 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 07:15:45 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 07:15:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:15:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:15:46 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:15:46 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:15:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:15:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:15:46 [DEBUG] clck_gen.py:128 IND CLOCK 9078
2025-03-30 07:15:46 [DEBUG] clck_gen.py:128 IND CLOCK 9180
2025-03-30 07:15:47 [DEBUG] clck_gen.py:128 IND CLOCK 9282
2025-03-30 07:15:47 [DEBUG] clck_gen.py:128 IND CLOCK 9384
2025-03-30 07:15:48 [DEBUG] clck_gen.py:128 IND CLOCK 9486
2025-03-30 07:15:48 [DEBUG] clck_gen.py:128 IND CLOCK 9588
2025-03-30 07:15:49 [DEBUG] clck_gen.py:128 IND CLOCK 9690
2025-03-30 07:15:49 [DEBUG] clck_gen.py:128 IND CLOCK 9792
2025-03-30 07:15:49 [DEBUG] clck_gen.py:128 IND CLOCK 9894
2025-03-30 07:15:50 [DEBUG] clck_gen.py:128 IND CLOCK 9996
2025-03-30 07:15:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:15:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:15:50 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:15:50 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:15:50 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:15:50 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:15:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:15:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:15:50 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:15:50 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:15:50 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 07:15:50 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 07:15:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:15:50 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.26.22:6700) Recv SETFH cmd
2025-03-30 07:15:50 [INFO] transceiver.py:237 (MS@172.18.26.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2025-03-30 07:15:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:15:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:15:50 [DEBUG] clck_gen.py:128 IND CLOCK 10098
2025-03-30 07:15:51 [DEBUG] clck_gen.py:128 IND CLOCK 10200
2025-03-30 07:15:51 [DEBUG] clck_gen.py:128 IND CLOCK 10302
2025-03-30 07:15:52 [DEBUG] clck_gen.py:128 IND CLOCK 10404
2025-03-30 07:15:52 [DEBUG] clck_gen.py:128 IND CLOCK 10506
2025-03-30 07:15:53 [DEBUG] clck_gen.py:128 IND CLOCK 10608
2025-03-30 07:15:53 [DEBUG] clck_gen.py:128 IND CLOCK 10710
2025-03-30 07:15:54 [DEBUG] clck_gen.py:128 IND CLOCK 10812
2025-03-30 07:15:54 [DEBUG] clck_gen.py:128 IND CLOCK 10914
2025-03-30 07:15:55 [DEBUG] clck_gen.py:128 IND CLOCK 11016
2025-03-30 07:15:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:15:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:15:55 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:15:55 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:15:55 [INFO] transceiver.py:241 (MS@172.18.26.22:6700) Frequency hopping disabled
2025-03-30 07:15:55 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:15:55 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:15:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:15:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:15:55 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:15:55 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:15:55 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 07:15:55 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 07:15:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:15:55 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.26.22:6700) Recv SETFH cmd
2025-03-30 07:15:55 [INFO] transceiver.py:237 (MS@172.18.26.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2025-03-30 07:15:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:15:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:15:55 [DEBUG] clck_gen.py:128 IND CLOCK 11118
2025-03-30 07:15:56 [DEBUG] clck_gen.py:128 IND CLOCK 11220
2025-03-30 07:15:56 [DEBUG] clck_gen.py:128 IND CLOCK 11322
2025-03-30 07:15:57 [DEBUG] clck_gen.py:128 IND CLOCK 11424
2025-03-30 07:15:57 [DEBUG] clck_gen.py:128 IND CLOCK 11526
2025-03-30 07:15:57 [DEBUG] clck_gen.py:128 IND CLOCK 11628
2025-03-30 07:15:58 [DEBUG] clck_gen.py:128 IND CLOCK 11730
2025-03-30 07:15:58 [DEBUG] clck_gen.py:128 IND CLOCK 11832
2025-03-30 07:15:59 [DEBUG] clck_gen.py:128 IND CLOCK 11934
2025-03-30 07:15:59 [DEBUG] clck_gen.py:128 IND CLOCK 12036
2025-03-30 07:16:00 [DEBUG] clck_gen.py:128 IND CLOCK 12138
2025-03-30 07:16:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:16:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:16:00 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:16:00 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:16:00 [INFO] transceiver.py:241 (MS@172.18.26.22:6700) Frequency hopping disabled
2025-03-30 07:16:00 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:16:00 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:16:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:16:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:16:00 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:16:00 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:16:00 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 07:16:00 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 07:16:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:16:00 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.26.22:6700) Recv SETFH cmd
2025-03-30 07:16:00 [INFO] transceiver.py:237 (MS@172.18.26.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2025-03-30 07:16:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:16:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:16:00 [DEBUG] clck_gen.py:128 IND CLOCK 12240
2025-03-30 07:16:01 [DEBUG] clck_gen.py:128 IND CLOCK 12342
2025-03-30 07:16:01 [DEBUG] clck_gen.py:128 IND CLOCK 12444
2025-03-30 07:16:02 [DEBUG] clck_gen.py:128 IND CLOCK 12546
2025-03-30 07:16:02 [DEBUG] clck_gen.py:128 IND CLOCK 12648
2025-03-30 07:16:03 [DEBUG] clck_gen.py:128 IND CLOCK 12750
2025-03-30 07:16:03 [DEBUG] clck_gen.py:128 IND CLOCK 12852
2025-03-30 07:16:04 [DEBUG] clck_gen.py:128 IND CLOCK 12954
2025-03-30 07:16:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:16:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:16:04 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:16:04 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:16:04 [INFO] transceiver.py:241 (MS@172.18.26.22:6700) Frequency hopping disabled
2025-03-30 07:16:04 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:16:04 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:16:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:16:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:16:04 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:16:04 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:16:04 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 07:16:04 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 07:16:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:16:04 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.26.22:6700) Recv SETFH cmd
2025-03-30 07:16:04 [INFO] transceiver.py:237 (MS@172.18.26.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2025-03-30 07:16:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:16:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:16:04 [DEBUG] clck_gen.py:128 IND CLOCK 13056
2025-03-30 07:16:05 [DEBUG] clck_gen.py:128 IND CLOCK 13158
2025-03-30 07:16:05 [DEBUG] clck_gen.py:128 IND CLOCK 13260
2025-03-30 07:16:05 [DEBUG] clck_gen.py:128 IND CLOCK 13362
2025-03-30 07:16:06 [DEBUG] clck_gen.py:128 IND CLOCK 13464
2025-03-30 07:16:06 [DEBUG] clck_gen.py:128 IND CLOCK 13566
2025-03-30 07:16:07 [DEBUG] clck_gen.py:128 IND CLOCK 13668
2025-03-30 07:16:07 [DEBUG] clck_gen.py:128 IND CLOCK 13770
2025-03-30 07:16:08 [DEBUG] clck_gen.py:128 IND CLOCK 13872
2025-03-30 07:16:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:16:08 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:16:08 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:16:08 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:16:08 [INFO] transceiver.py:241 (MS@172.18.26.22:6700) Frequency hopping disabled
2025-03-30 07:16:08 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:16:08 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:16:08 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:16:08 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:16:08 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:16:08 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:16:08 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 07:16:08 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 07:16:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:16:08 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.26.22:6700) Recv SETFH cmd
2025-03-30 07:16:08 [INFO] transceiver.py:237 (MS@172.18.26.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2025-03-30 07:16:08 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:16:08 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:16:08 [DEBUG] clck_gen.py:128 IND CLOCK 13974
2025-03-30 07:16:09 [DEBUG] clck_gen.py:128 IND CLOCK 14076
2025-03-30 07:16:09 [DEBUG] clck_gen.py:128 IND CLOCK 14178
2025-03-30 07:16:10 [DEBUG] clck_gen.py:128 IND CLOCK 14280
2025-03-30 07:16:10 [DEBUG] clck_gen.py:128 IND CLOCK 14382
2025-03-30 07:16:11 [DEBUG] clck_gen.py:128 IND CLOCK 14484
2025-03-30 07:16:11 [DEBUG] clck_gen.py:128 IND CLOCK 14586
2025-03-30 07:16:12 [DEBUG] clck_gen.py:128 IND CLOCK 14688
2025-03-30 07:16:12 [DEBUG] clck_gen.py:128 IND CLOCK 14790
2025-03-30 07:16:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:16:12 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:16:12 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:16:12 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:16:12 [INFO] transceiver.py:241 (MS@172.18.26.22:6700) Frequency hopping disabled
2025-03-30 07:16:12 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:16:12 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:16:12 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:16:12 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:16:12 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:16:12 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:16:12 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 07:16:12 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 07:16:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:16:13 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.26.22:6700) Recv SETFH cmd
2025-03-30 07:16:13 [INFO] transceiver.py:237 (MS@172.18.26.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2025-03-30 07:16:13 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:16:13 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:16:13 [DEBUG] clck_gen.py:128 IND CLOCK 14892
2025-03-30 07:16:13 [DEBUG] clck_gen.py:128 IND CLOCK 14994
2025-03-30 07:16:13 [DEBUG] clck_gen.py:128 IND CLOCK 15096
2025-03-30 07:16:14 [DEBUG] clck_gen.py:128 IND CLOCK 15198
2025-03-30 07:16:14 [DEBUG] clck_gen.py:128 IND CLOCK 15300
2025-03-30 07:16:15 [DEBUG] clck_gen.py:128 IND CLOCK 15402
2025-03-30 07:16:15 [DEBUG] clck_gen.py:128 IND CLOCK 15504
2025-03-30 07:16:16 [DEBUG] clck_gen.py:128 IND CLOCK 15606
2025-03-30 07:16:16 [DEBUG] clck_gen.py:128 IND CLOCK 15708
2025-03-30 07:16:16 [WARNING] clck_gen.py:108 CLCKGen: time overrun by -24192us; resetting the clock
2025-03-30 07:16:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:16:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:16:17 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:16:17 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:16:17 [INFO] transceiver.py:241 (MS@172.18.26.22:6700) Frequency hopping disabled
2025-03-30 07:16:17 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:16:17 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:16:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:16:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:16:17 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:16:17 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:16:17 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 07:16:17 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 07:16:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:16:17 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.26.22:6700) Recv SETFH cmd
2025-03-30 07:16:17 [INFO] transceiver.py:237 (MS@172.18.26.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2025-03-30 07:16:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:16:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:16:17 [DEBUG] clck_gen.py:128 IND CLOCK 15810
2025-03-30 07:16:17 [DEBUG] clck_gen.py:128 IND CLOCK 15912
2025-03-30 07:16:18 [DEBUG] clck_gen.py:128 IND CLOCK 16014
2025-03-30 07:16:18 [DEBUG] clck_gen.py:128 IND CLOCK 16116
2025-03-30 07:16:19 [DEBUG] clck_gen.py:128 IND CLOCK 16218
2025-03-30 07:16:19 [DEBUG] clck_gen.py:128 IND CLOCK 16320
2025-03-30 07:16:20 [DEBUG] clck_gen.py:128 IND CLOCK 16422
2025-03-30 07:16:20 [DEBUG] clck_gen.py:128 IND CLOCK 16524
2025-03-30 07:16:21 [DEBUG] clck_gen.py:128 IND CLOCK 16626
2025-03-30 07:16:21 [DEBUG] clck_gen.py:128 IND CLOCK 16728
2025-03-30 07:16:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:16:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:16:21 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:16:21 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:16:21 [INFO] transceiver.py:241 (MS@172.18.26.22:6700) Frequency hopping disabled
2025-03-30 07:16:21 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:16:21 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:16:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:16:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:16:21 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:16:21 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:16:21 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 07:16:21 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 07:16:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:16:21 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.26.22:6700) Recv SETFH cmd
2025-03-30 07:16:21 [INFO] transceiver.py:237 (MS@172.18.26.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2025-03-30 07:16:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:16:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:16:22 [DEBUG] clck_gen.py:128 IND CLOCK 16830
2025-03-30 07:16:22 [DEBUG] clck_gen.py:128 IND CLOCK 16932
2025-03-30 07:16:22 [DEBUG] clck_gen.py:128 IND CLOCK 17034
2025-03-30 07:16:23 [DEBUG] clck_gen.py:128 IND CLOCK 17136
2025-03-30 07:16:23 [DEBUG] clck_gen.py:128 IND CLOCK 17238
2025-03-30 07:16:24 [DEBUG] clck_gen.py:128 IND CLOCK 17340
2025-03-30 07:16:24 [DEBUG] clck_gen.py:128 IND CLOCK 17442
2025-03-30 07:16:25 [DEBUG] clck_gen.py:128 IND CLOCK 17544
2025-03-30 07:16:25 [DEBUG] clck_gen.py:128 IND CLOCK 17646
2025-03-30 07:16:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:16:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:16:25 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:16:25 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:16:25 [INFO] transceiver.py:241 (MS@172.18.26.22:6700) Frequency hopping disabled
2025-03-30 07:16:25 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:16:25 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:16:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:16:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:16:25 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:16:25 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:16:25 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 07:16:25 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 07:16:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:16:25 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.26.22:6700) Recv SETFH cmd
2025-03-30 07:16:25 [INFO] transceiver.py:237 (MS@172.18.26.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2025-03-30 07:16:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:16:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:16:26 [DEBUG] clck_gen.py:128 IND CLOCK 17748
2025-03-30 07:16:26 [DEBUG] clck_gen.py:128 IND CLOCK 17850
2025-03-30 07:16:27 [DEBUG] clck_gen.py:128 IND CLOCK 17952
2025-03-30 07:16:27 [DEBUG] clck_gen.py:128 IND CLOCK 18054
2025-03-30 07:16:28 [DEBUG] clck_gen.py:128 IND CLOCK 18156
2025-03-30 07:16:28 [DEBUG] clck_gen.py:128 IND CLOCK 18258
2025-03-30 07:16:29 [DEBUG] clck_gen.py:128 IND CLOCK 18360
2025-03-30 07:16:29 [DEBUG] clck_gen.py:128 IND CLOCK 18462
2025-03-30 07:16:30 [DEBUG] clck_gen.py:128 IND CLOCK 18564
2025-03-30 07:16:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:16:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:16:30 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:16:30 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:16:30 [INFO] transceiver.py:241 (MS@172.18.26.22:6700) Frequency hopping disabled
2025-03-30 07:16:30 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:16:30 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:16:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:16:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:16:30 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:16:30 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:16:30 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 07:16:30 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 07:16:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:16:30 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.26.22:6700) Recv SETFH cmd
2025-03-30 07:16:30 [INFO] transceiver.py:237 (MS@172.18.26.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2025-03-30 07:16:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:16:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:16:30 [DEBUG] clck_gen.py:128 IND CLOCK 18666
2025-03-30 07:16:30 [DEBUG] clck_gen.py:128 IND CLOCK 18768
2025-03-30 07:16:31 [DEBUG] clck_gen.py:128 IND CLOCK 18870
2025-03-30 07:16:31 [DEBUG] clck_gen.py:128 IND CLOCK 18972
2025-03-30 07:16:32 [DEBUG] clck_gen.py:128 IND CLOCK 19074
2025-03-30 07:16:32 [DEBUG] clck_gen.py:128 IND CLOCK 19176
2025-03-30 07:16:33 [DEBUG] clck_gen.py:128 IND CLOCK 19278
2025-03-30 07:16:33 [DEBUG] clck_gen.py:128 IND CLOCK 19380
2025-03-30 07:16:34 [DEBUG] clck_gen.py:128 IND CLOCK 19482
2025-03-30 07:16:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:16:34 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:16:34 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:16:34 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:16:34 [INFO] transceiver.py:241 (MS@172.18.26.22:6700) Frequency hopping disabled
2025-03-30 07:16:34 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:16:34 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:16:34 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:16:34 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:16:34 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:16:34 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:16:34 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:16:34 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:16:34 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 07:16:34 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 07:16:34 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 07:16:39 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 07:16:39 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 07:16:39 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:16:39 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:16:39 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:16:39 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:16:39 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:16:39 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 07:16:39 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:16:39 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 07:16:39 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 07:16:39 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 07:16:39 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 07:16:39 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 07:16:39 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:16:39 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:16:39 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 07:16:39 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 07:16:39 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 07:16:39 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 07:16:39 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 07:16:39 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 07:16:39 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:16:39 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:16:39 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 07:16:39 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 07:16:39 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 07:16:39 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 07:16:39 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 07:16:39 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 07:16:39 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:16:39 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:16:39 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 07:16:39 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 07:16:39 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 07:16:39 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 07:16:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 07:16:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 07:16:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 07:16:39 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 07:16:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 07:16:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 07:16:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 07:16:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 07:16:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:16:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:16:39 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 07:16:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:16:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:16:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:16:39 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 07:16:39 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 07:16:39 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 07:16:39 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 07:16:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:16:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:16:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:16:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 07:16:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:16:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:16:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:16:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:16:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:16:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:16:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:16:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:16:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:16:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:16:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:16:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:16:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:16:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:16:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:16:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:16:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:16:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:16:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:16:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:16:39 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:16:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:16:39 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:16:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:16:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:16:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:16:39 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:16:39 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:16:39 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 07:16:39 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 07:16:39 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 07:16:44 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 07:16:44 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 07:16:44 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:16:44 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:16:44 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:16:44 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:16:44 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:16:44 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 07:16:44 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:16:44 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 07:16:44 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 07:16:44 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 07:16:44 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 07:16:44 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 07:16:44 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:16:44 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:16:44 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 07:16:44 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 07:16:44 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 07:16:44 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 07:16:44 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 07:16:44 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 07:16:44 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:16:44 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:16:44 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 07:16:44 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 07:16:44 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 07:16:44 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 07:16:44 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 07:16:44 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 07:16:44 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:16:44 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:16:44 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 07:16:44 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 07:16:44 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 07:16:44 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 07:16:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 07:16:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 07:16:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 07:16:44 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 07:16:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 07:16:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 07:16:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 07:16:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 07:16:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:16:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:16:44 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 07:16:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:16:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:16:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:16:44 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 07:16:44 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 07:16:44 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 07:16:44 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 07:16:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:16:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:16:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:16:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 07:16:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:16:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:16:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:16:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:16:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:16:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:16:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:16:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:16:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:16:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:16:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:16:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:16:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:16:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:16:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:16:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:16:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:16:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:16:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:16:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:16:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:16:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:16:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:16:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:16:44 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-03-30 07:16:44 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-03-30 07:16:45 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-03-30 07:16:45 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-03-30 07:16:45 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-03-30 07:16:45 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-03-30 07:16:45 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-03-30 07:16:45 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-03-30 07:16:45 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-03-30 07:16:45 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-03-30 07:16:45 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 07:16:45 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 07:16:45 [DEBUG] fake_trx.py:317 (BTS@172.18.26.20:5700) Recv FAKE_CI cmd
2025-03-30 07:16:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:16:45 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:16:45 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:16:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:16:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:16:45 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:16:45 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:16:45 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 07:16:45 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 07:16:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:16:45 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:16:45 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:16:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:16:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:16:45 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-03-30 07:16:45 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:16:45 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:16:45 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:16:45 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:16:45 [DEBUG] clck_gen.py:128 IND CLOCK 306
2025-03-30 07:16:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:16:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:16:46 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:16:46 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:16:46 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:16:46 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:16:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:16:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:16:46 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:16:46 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:16:46 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 07:16:46 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 07:16:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:16:46 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:16:46 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:16:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:16:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:16:46 [DEBUG] clck_gen.py:128 IND CLOCK 408
2025-03-30 07:16:46 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:16:46 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:16:46 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:16:46 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:16:46 [DEBUG] clck_gen.py:128 IND CLOCK 510
2025-03-30 07:16:47 [DEBUG] clck_gen.py:128 IND CLOCK 612
2025-03-30 07:16:47 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:16:47 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:16:47 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:16:47 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:16:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:16:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:16:47 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:16:47 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:16:47 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:16:47 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:16:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:16:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:16:47 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:16:47 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:16:47 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 07:16:47 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 07:16:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:16:47 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:16:47 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:16:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:16:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:16:47 [DEBUG] clck_gen.py:128 IND CLOCK 714
2025-03-30 07:16:48 [DEBUG] clck_gen.py:128 IND CLOCK 816
2025-03-30 07:16:48 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:16:48 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:16:48 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:16:48 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:16:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:16:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:16:48 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:16:48 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:16:48 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:16:48 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:16:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:16:48 [DEBUG] clck_gen.py:128 IND CLOCK 918
2025-03-30 07:16:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:16:48 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:16:48 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:16:48 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 07:16:48 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 07:16:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:16:48 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:16:48 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:16:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:16:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:16:49 [DEBUG] clck_gen.py:128 IND CLOCK 1020
2025-03-30 07:16:49 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:16:49 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:16:49 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:16:49 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:16:49 [DEBUG] clck_gen.py:128 IND CLOCK 1122
2025-03-30 07:16:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:16:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:16:50 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:16:50 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:16:50 [DEBUG] clck_gen.py:128 IND CLOCK 1224
2025-03-30 07:16:50 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:16:50 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:16:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:16:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:16:50 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:16:50 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:16:50 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 07:16:50 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 07:16:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:16:50 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:16:50 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:16:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:16:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:16:50 [DEBUG] clck_gen.py:128 IND CLOCK 1326
2025-03-30 07:16:51 [DEBUG] clck_gen.py:128 IND CLOCK 1428
2025-03-30 07:16:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:16:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:16:51 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:16:51 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:16:51 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:16:51 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:16:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:16:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:16:51 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:16:51 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:16:51 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 07:16:51 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 07:16:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:16:51 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.26.22:6700) Recv SETFH cmd
2025-03-30 07:16:51 [INFO] transceiver.py:237 (MS@172.18.26.22:6700) Frequency hopping configured: hsn=2, maio=0, ma_len=2
2025-03-30 07:16:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:16:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:16:51 [DEBUG] clck_gen.py:128 IND CLOCK 1530
2025-03-30 07:16:52 [DEBUG] clck_gen.py:128 IND CLOCK 1632
2025-03-30 07:16:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:16:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:16:52 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:16:52 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:16:52 [INFO] transceiver.py:241 (MS@172.18.26.22:6700) Frequency hopping disabled
2025-03-30 07:16:52 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:16:52 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:16:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:16:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:16:52 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:16:52 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:16:52 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 07:16:52 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 07:16:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:16:52 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.26.22:6700) Recv SETFH cmd
2025-03-30 07:16:52 [INFO] transceiver.py:237 (MS@172.18.26.22:6700) Frequency hopping configured: hsn=3, maio=3, ma_len=4
2025-03-30 07:16:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:16:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:16:52 [DEBUG] clck_gen.py:128 IND CLOCK 1734
2025-03-30 07:16:53 [DEBUG] clck_gen.py:128 IND CLOCK 1836
2025-03-30 07:16:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:16:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:16:53 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:16:53 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:16:53 [INFO] transceiver.py:241 (MS@172.18.26.22:6700) Frequency hopping disabled
2025-03-30 07:16:53 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:16:53 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:16:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:16:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:16:53 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:16:53 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:16:53 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 07:16:53 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 07:16:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:16:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:16:53 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:16:53 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:16:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:16:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:16:53 [DEBUG] clck_gen.py:128 IND CLOCK 1938
2025-03-30 07:16:53 [DEBUG] clck_gen.py:128 IND CLOCK 2040
2025-03-30 07:16:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:16:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:16:54 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:16:54 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:16:54 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:16:54 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:16:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:16:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:16:54 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:16:54 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:16:54 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 07:16:54 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 07:16:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:16:54 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:16:54 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:16:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:16:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:16:54 [DEBUG] clck_gen.py:128 IND CLOCK 2142
2025-03-30 07:16:54 [DEBUG] clck_gen.py:128 IND CLOCK 2244
2025-03-30 07:16:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:16:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:16:55 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:16:55 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:16:55 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:16:55 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:16:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:16:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:16:55 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:16:55 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:16:55 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 07:16:55 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 07:16:55 [DEBUG] clck_gen.py:128 IND CLOCK 2346
2025-03-30 07:16:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:16:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:16:55 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:16:55 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:16:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:16:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:16:55 [DEBUG] clck_gen.py:128 IND CLOCK 2448
2025-03-30 07:16:56 [DEBUG] clck_gen.py:128 IND CLOCK 2550
2025-03-30 07:16:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:16:56 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:16:56 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:16:56 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:16:56 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:16:56 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:16:56 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:16:56 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:16:56 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:16:56 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:16:56 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 07:16:56 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 07:16:56 [DEBUG] clck_gen.py:128 IND CLOCK 2652
2025-03-30 07:16:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:16:56 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.26.22:6700) Recv SETFH cmd
2025-03-30 07:16:56 [INFO] transceiver.py:237 (MS@172.18.26.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2025-03-30 07:16:56 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:16:56 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:16:57 [DEBUG] clck_gen.py:128 IND CLOCK 2754
2025-03-30 07:16:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:16:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:16:57 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:16:57 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:16:57 [INFO] transceiver.py:241 (MS@172.18.26.22:6700) Frequency hopping disabled
2025-03-30 07:16:57 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:16:57 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:16:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:16:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:16:57 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:16:57 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:16:57 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 07:16:57 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 07:16:57 [DEBUG] clck_gen.py:128 IND CLOCK 2856
2025-03-30 07:16:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:16:57 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.26.22:6700) Recv SETFH cmd
2025-03-30 07:16:57 [INFO] transceiver.py:237 (MS@172.18.26.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2025-03-30 07:16:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:16:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:16:58 [DEBUG] clck_gen.py:128 IND CLOCK 2958
2025-03-30 07:16:58 [DEBUG] clck_gen.py:128 IND CLOCK 3060
2025-03-30 07:16:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:16:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:16:58 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:16:58 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:16:58 [INFO] transceiver.py:241 (MS@172.18.26.22:6700) Frequency hopping disabled
2025-03-30 07:16:58 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:16:58 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:16:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:16:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:16:58 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:16:58 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:16:58 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 07:16:58 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 07:16:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:16:58 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.26.22:6700) Recv SETFH cmd
2025-03-30 07:16:58 [INFO] transceiver.py:237 (MS@172.18.26.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2025-03-30 07:16:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:16:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:16:59 [DEBUG] clck_gen.py:128 IND CLOCK 3162
2025-03-30 07:16:59 [DEBUG] clck_gen.py:128 IND CLOCK 3264
2025-03-30 07:16:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:16:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:16:59 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:16:59 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:16:59 [INFO] transceiver.py:241 (MS@172.18.26.22:6700) Frequency hopping disabled
2025-03-30 07:16:59 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:16:59 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:16:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:16:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:16:59 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:16:59 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:16:59 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 07:16:59 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 07:16:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:16:59 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.26.22:6700) Recv SETFH cmd
2025-03-30 07:16:59 [INFO] transceiver.py:237 (MS@172.18.26.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2025-03-30 07:16:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:16:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:17:00 [DEBUG] clck_gen.py:128 IND CLOCK 3366
2025-03-30 07:17:00 [DEBUG] clck_gen.py:128 IND CLOCK 3468
2025-03-30 07:17:01 [DEBUG] clck_gen.py:128 IND CLOCK 3570
2025-03-30 07:17:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:17:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:17:01 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:17:01 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:17:01 [INFO] transceiver.py:241 (MS@172.18.26.22:6700) Frequency hopping disabled
2025-03-30 07:17:01 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:17:01 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:17:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:17:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:17:01 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:17:01 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:17:01 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 07:17:01 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 07:17:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:17:01 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.26.22:6700) Recv SETFH cmd
2025-03-30 07:17:01 [INFO] transceiver.py:237 (MS@172.18.26.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2025-03-30 07:17:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:17:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:17:01 [DEBUG] clck_gen.py:128 IND CLOCK 3672
2025-03-30 07:17:01 [DEBUG] clck_gen.py:128 IND CLOCK 3774
2025-03-30 07:17:02 [DEBUG] clck_gen.py:128 IND CLOCK 3876
2025-03-30 07:17:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:17:02 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:17:02 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:17:02 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:17:02 [INFO] transceiver.py:241 (MS@172.18.26.22:6700) Frequency hopping disabled
2025-03-30 07:17:02 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:17:02 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:17:02 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:17:02 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:17:02 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:17:02 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:17:02 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 07:17:02 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 07:17:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:17:02 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.26.22:6700) Recv SETFH cmd
2025-03-30 07:17:02 [INFO] transceiver.py:237 (MS@172.18.26.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2025-03-30 07:17:02 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:17:02 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:17:02 [DEBUG] clck_gen.py:128 IND CLOCK 3978
2025-03-30 07:17:03 [DEBUG] clck_gen.py:128 IND CLOCK 4080
2025-03-30 07:17:03 [DEBUG] clck_gen.py:128 IND CLOCK 4182
2025-03-30 07:17:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:17:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:17:04 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:17:04 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:17:04 [INFO] transceiver.py:241 (MS@172.18.26.22:6700) Frequency hopping disabled
2025-03-30 07:17:04 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:17:04 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:17:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:17:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:17:04 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:17:04 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:17:04 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 07:17:04 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 07:17:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:17:04 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.26.22:6700) Recv SETFH cmd
2025-03-30 07:17:04 [INFO] transceiver.py:237 (MS@172.18.26.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2025-03-30 07:17:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:17:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:17:04 [DEBUG] clck_gen.py:128 IND CLOCK 4284
2025-03-30 07:17:04 [DEBUG] clck_gen.py:128 IND CLOCK 4386
2025-03-30 07:17:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:17:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:17:05 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:17:05 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:17:05 [INFO] transceiver.py:241 (MS@172.18.26.22:6700) Frequency hopping disabled
2025-03-30 07:17:05 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:17:05 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:17:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:17:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:17:05 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:17:05 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:17:05 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 07:17:05 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 07:17:05 [DEBUG] clck_gen.py:128 IND CLOCK 4488
2025-03-30 07:17:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:17:05 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.26.22:6700) Recv SETFH cmd
2025-03-30 07:17:05 [INFO] transceiver.py:237 (MS@172.18.26.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2025-03-30 07:17:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:17:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:17:05 [DEBUG] clck_gen.py:128 IND CLOCK 4590
2025-03-30 07:17:06 [DEBUG] clck_gen.py:128 IND CLOCK 4692
2025-03-30 07:17:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:17:06 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:17:06 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:17:06 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:17:06 [INFO] transceiver.py:241 (MS@172.18.26.22:6700) Frequency hopping disabled
2025-03-30 07:17:06 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:17:06 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:17:06 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:17:06 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:17:06 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:17:06 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:17:06 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 07:17:06 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 07:17:06 [DEBUG] clck_gen.py:128 IND CLOCK 4794
2025-03-30 07:17:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:17:06 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.26.22:6700) Recv SETFH cmd
2025-03-30 07:17:06 [INFO] transceiver.py:237 (MS@172.18.26.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2025-03-30 07:17:06 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:17:06 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:17:07 [DEBUG] clck_gen.py:128 IND CLOCK 4896
2025-03-30 07:17:07 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=4907): ver=1 fn=4904 tn=0 bl=148 pwr=0
2025-03-30 07:17:07 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=4907): ver=1 fn=4904 tn=1 bl=148 pwr=0
2025-03-30 07:17:07 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=4907): ver=1 fn=4904 tn=2 bl=148 pwr=0
2025-03-30 07:17:07 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=4907): ver=1 fn=4904 tn=3 bl=148 pwr=0
2025-03-30 07:17:07 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=4907): ver=1 fn=4904 tn=4 bl=148 pwr=0
2025-03-30 07:17:07 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=4907): ver=1 fn=4904 tn=5 bl=148 pwr=0
2025-03-30 07:17:07 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=4907): ver=1 fn=4904 tn=6 bl=148 pwr=0
2025-03-30 07:17:07 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=4907): ver=1 fn=4904 tn=7 bl=148 pwr=0
2025-03-30 07:17:07 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=4907): ver=1 fn=4905 tn=0 bl=148 pwr=0
2025-03-30 07:17:07 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=4907): ver=1 fn=4905 tn=1 bl=148 pwr=0
2025-03-30 07:17:07 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=4907): ver=1 fn=4905 tn=2 bl=148 pwr=0
2025-03-30 07:17:07 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=4907): ver=1 fn=4905 tn=3 bl=148 pwr=0
2025-03-30 07:17:07 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=4907): ver=1 fn=4905 tn=4 bl=148 pwr=0
2025-03-30 07:17:07 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=4907): ver=1 fn=4905 tn=5 bl=148 pwr=0
2025-03-30 07:17:07 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=4907): ver=1 fn=4905 tn=6 bl=148 pwr=0
2025-03-30 07:17:07 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=4907): ver=1 fn=4905 tn=7 bl=148 pwr=0
2025-03-30 07:17:07 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=4907): ver=1 fn=4906 tn=0 bl=148 pwr=0
2025-03-30 07:17:07 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=4907): ver=1 fn=4906 tn=1 bl=148 pwr=0
2025-03-30 07:17:07 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=4907): ver=1 fn=4906 tn=2 bl=148 pwr=0
2025-03-30 07:17:07 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=4907): ver=1 fn=4906 tn=3 bl=148 pwr=0
2025-03-30 07:17:07 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=4907): ver=1 fn=4906 tn=4 bl=148 pwr=0
2025-03-30 07:17:07 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=4907): ver=1 fn=4906 tn=5 bl=148 pwr=0
2025-03-30 07:17:07 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=4907): ver=1 fn=4906 tn=6 bl=148 pwr=0
2025-03-30 07:17:07 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=4907): ver=1 fn=4906 tn=7 bl=148 pwr=0
2025-03-30 07:17:07 [DEBUG] clck_gen.py:128 IND CLOCK 4998
2025-03-30 07:17:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:17:08 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:17:08 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:17:08 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:17:08 [INFO] transceiver.py:241 (MS@172.18.26.22:6700) Frequency hopping disabled
2025-03-30 07:17:08 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:17:08 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:17:08 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:17:08 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:17:08 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:17:08 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:17:08 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 07:17:08 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 07:17:08 [DEBUG] clck_gen.py:128 IND CLOCK 5100
2025-03-30 07:17:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:17:08 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.26.22:6700) Recv SETFH cmd
2025-03-30 07:17:08 [INFO] transceiver.py:237 (MS@172.18.26.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2025-03-30 07:17:08 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:17:08 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:17:08 [DEBUG] clck_gen.py:128 IND CLOCK 5202
2025-03-30 07:17:09 [DEBUG] clck_gen.py:128 IND CLOCK 5304
2025-03-30 07:17:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:17:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:17:09 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:17:09 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:17:09 [INFO] transceiver.py:241 (MS@172.18.26.22:6700) Frequency hopping disabled
2025-03-30 07:17:09 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:17:09 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:17:09 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:17:09 [DEBUG] clck_gen.py:128 IND CLOCK 5406
2025-03-30 07:17:09 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:17:09 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:17:09 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:17:09 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:17:09 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:17:09 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 07:17:09 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 07:17:09 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 07:17:09 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=5408 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:17:09 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=5408 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:17:09 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=5408 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:17:09 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=5408 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:17:09 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=5408 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:17:09 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=5408 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:17:09 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=5408 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:17:09 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=5408 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:17:09 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=5409 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:17:09 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=5409 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:17:09 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=5409 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:17:09 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=5409 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:17:09 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=5409 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:17:09 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=5409 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:17:09 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=5409 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:17:09 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=5409 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:17:14 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 07:17:14 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 07:17:14 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:17:14 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:17:14 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:17:14 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:17:14 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:17:14 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 07:17:14 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:17:14 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 07:17:14 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 07:17:14 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 07:17:14 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 07:17:14 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 07:17:14 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:17:14 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:17:14 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 07:17:14 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 07:17:14 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 07:17:14 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 07:17:14 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 07:17:14 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 07:17:14 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:17:14 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:17:14 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 07:17:14 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 07:17:14 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 07:17:14 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 07:17:14 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 07:17:14 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 07:17:14 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:17:14 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:17:14 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 07:17:14 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 07:17:14 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 07:17:14 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 07:17:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 07:17:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 07:17:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 07:17:14 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 07:17:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 07:17:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 07:17:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 07:17:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:17:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 07:17:14 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 07:17:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:17:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:17:14 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 07:17:14 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 07:17:14 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 07:17:14 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 07:17:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:17:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:17:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:17:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 07:17:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:17:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:17:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:17:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:17:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:17:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:17:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:17:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:17:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:17:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:17:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:17:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:17:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:17:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:17:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:17:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:17:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:17:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:17:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:17:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:17:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:17:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:17:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:17:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:17:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:17:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:17:14 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-03-30 07:17:14 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-03-30 07:17:14 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-03-30 07:17:14 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-03-30 07:17:14 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-03-30 07:17:14 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-03-30 07:17:14 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-03-30 07:17:14 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-03-30 07:17:14 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-03-30 07:17:14 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-03-30 07:17:14 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=0 bl=148 pwr=0
2025-03-30 07:17:14 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=1 bl=148 pwr=0
2025-03-30 07:17:14 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=2 bl=148 pwr=0
2025-03-30 07:17:14 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=3 bl=148 pwr=0
2025-03-30 07:17:14 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=4 bl=148 pwr=0
2025-03-30 07:17:14 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=5 bl=148 pwr=0
2025-03-30 07:17:14 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=6 bl=148 pwr=0
2025-03-30 07:17:14 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=7 bl=148 pwr=0
2025-03-30 07:17:15 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 07:17:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:17:15 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 07:17:15 [DEBUG] fake_trx.py:317 (BTS@172.18.26.20:5700) Recv FAKE_CI cmd
2025-03-30 07:17:15 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:17:15 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:17:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:17:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:17:15 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:17:15 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:17:15 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 07:17:15 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 07:17:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD HANDOVER
2025-03-30 07:17:15 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:17:15 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:17:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:17:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:17:15 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-03-30 07:17:15 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:17:15 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:17:15 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:17:15 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:17:15 [DEBUG] clck_gen.py:128 IND CLOCK 306
2025-03-30 07:17:16 [DEBUG] clck_gen.py:128 IND CLOCK 408
2025-03-30 07:17:16 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:17:16 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:17:16 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:17:16 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:17:16 [DEBUG] clck_gen.py:128 IND CLOCK 510
2025-03-30 07:17:17 [DEBUG] clck_gen.py:128 IND CLOCK 612
2025-03-30 07:17:17 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:17:17 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:17:17 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:17:17 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:17:17 [DEBUG] clck_gen.py:128 IND CLOCK 714
2025-03-30 07:17:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:17:18 [DEBUG] clck_gen.py:128 IND CLOCK 816
2025-03-30 07:17:18 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:17:18 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:17:18 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:17:18 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:17:18 [DEBUG] clck_gen.py:128 IND CLOCK 918
2025-03-30 07:17:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:17:18 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:17:18 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:17:18 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:17:18 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:17:18 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:17:18 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:17:18 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:17:18 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 07:17:18 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 07:17:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD HANDOVER
2025-03-30 07:17:18 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:17:18 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:17:18 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:17:18 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:17:19 [DEBUG] clck_gen.py:128 IND CLOCK 1020
2025-03-30 07:17:19 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:17:19 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:17:19 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:17:19 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:17:19 [DEBUG] clck_gen.py:128 IND CLOCK 1122
2025-03-30 07:17:20 [DEBUG] clck_gen.py:128 IND CLOCK 1224
2025-03-30 07:17:20 [DEBUG] clck_gen.py:128 IND CLOCK 1326
2025-03-30 07:17:21 [DEBUG] clck_gen.py:128 IND CLOCK 1428
2025-03-30 07:17:21 [DEBUG] clck_gen.py:128 IND CLOCK 1530
2025-03-30 07:17:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:17:22 [DEBUG] clck_gen.py:128 IND CLOCK 1632
2025-03-30 07:17:22 [DEBUG] clck_gen.py:128 IND CLOCK 1734
2025-03-30 07:17:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:17:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:17:22 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:17:22 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:17:22 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:17:22 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:17:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:17:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:17:22 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:17:22 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:17:22 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 07:17:22 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 07:17:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD HANDOVER
2025-03-30 07:17:22 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.26.22:6700) Recv SETFH cmd
2025-03-30 07:17:22 [INFO] transceiver.py:237 (MS@172.18.26.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2025-03-30 07:17:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:17:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:17:22 [DEBUG] clck_gen.py:128 IND CLOCK 1836
2025-03-30 07:17:23 [DEBUG] clck_gen.py:128 IND CLOCK 1938
2025-03-30 07:17:23 [DEBUG] clck_gen.py:128 IND CLOCK 2040
2025-03-30 07:17:24 [DEBUG] clck_gen.py:128 IND CLOCK 2142
2025-03-30 07:17:24 [DEBUG] clck_gen.py:128 IND CLOCK 2244
2025-03-30 07:17:25 [DEBUG] clck_gen.py:128 IND CLOCK 2346
2025-03-30 07:17:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:17:25 [DEBUG] clck_gen.py:128 IND CLOCK 2448
2025-03-30 07:17:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:17:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:17:26 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:17:26 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:17:26 [INFO] transceiver.py:241 (MS@172.18.26.22:6700) Frequency hopping disabled
2025-03-30 07:17:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:17:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:17:26 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:17:26 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:17:26 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 07:17:26 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 07:17:26 [DEBUG] clck_gen.py:128 IND CLOCK 2550
2025-03-30 07:17:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD HANDOVER
2025-03-30 07:17:26 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.26.22:6700) Recv SETFH cmd
2025-03-30 07:17:26 [INFO] transceiver.py:237 (MS@172.18.26.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2025-03-30 07:17:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:17:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:17:26 [DEBUG] clck_gen.py:128 IND CLOCK 2652
2025-03-30 07:17:27 [DEBUG] clck_gen.py:128 IND CLOCK 2754
2025-03-30 07:17:27 [DEBUG] clck_gen.py:128 IND CLOCK 2856
2025-03-30 07:17:28 [DEBUG] clck_gen.py:128 IND CLOCK 2958
2025-03-30 07:17:28 [DEBUG] clck_gen.py:128 IND CLOCK 3060
2025-03-30 07:17:29 [DEBUG] clck_gen.py:128 IND CLOCK 3162
2025-03-30 07:17:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:17:29 [DEBUG] clck_gen.py:128 IND CLOCK 3264
2025-03-30 07:17:30 [DEBUG] clck_gen.py:128 IND CLOCK 3366
2025-03-30 07:17:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:17:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:17:30 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:17:30 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:17:30 [INFO] transceiver.py:241 (MS@172.18.26.22:6700) Frequency hopping disabled
2025-03-30 07:17:30 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:17:30 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:17:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:17:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:17:30 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:17:30 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:17:30 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 07:17:30 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 07:17:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD HANDOVER
2025-03-30 07:17:30 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:17:30 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:17:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:17:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:17:30 [DEBUG] clck_gen.py:128 IND CLOCK 3468
2025-03-30 07:17:30 [DEBUG] clck_gen.py:128 IND CLOCK 3570
2025-03-30 07:17:31 [DEBUG] clck_gen.py:128 IND CLOCK 3672
2025-03-30 07:17:31 [DEBUG] clck_gen.py:128 IND CLOCK 3774
2025-03-30 07:17:32 [DEBUG] clck_gen.py:128 IND CLOCK 3876
2025-03-30 07:17:32 [DEBUG] clck_gen.py:128 IND CLOCK 3978
2025-03-30 07:17:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:17:33 [DEBUG] clck_gen.py:128 IND CLOCK 4080
2025-03-30 07:17:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:17:33 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:17:33 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:17:33 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:17:33 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:17:33 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:17:33 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:17:33 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:17:33 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 07:17:33 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 07:17:33 [DEBUG] clck_gen.py:128 IND CLOCK 4182
2025-03-30 07:17:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD HANDOVER
2025-03-30 07:17:33 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:17:33 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:17:33 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:17:33 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:17:34 [DEBUG] clck_gen.py:128 IND CLOCK 4284
2025-03-30 07:17:34 [DEBUG] clck_gen.py:128 IND CLOCK 4386
2025-03-30 07:17:35 [DEBUG] clck_gen.py:128 IND CLOCK 4488
2025-03-30 07:17:35 [DEBUG] clck_gen.py:128 IND CLOCK 4590
2025-03-30 07:17:36 [DEBUG] clck_gen.py:128 IND CLOCK 4692
2025-03-30 07:17:36 [DEBUG] clck_gen.py:128 IND CLOCK 4794
2025-03-30 07:17:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:17:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:17:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:17:37 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:17:37 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:17:37 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:17:37 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:17:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:17:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:17:37 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:17:37 [DEBUG] clck_gen.py:128 IND CLOCK 4896
2025-03-30 07:17:37 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:17:37 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 07:17:37 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 07:17:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD HANDOVER
2025-03-30 07:17:37 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.26.22:6700) Recv SETFH cmd
2025-03-30 07:17:37 [INFO] transceiver.py:237 (MS@172.18.26.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2025-03-30 07:17:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:17:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:17:37 [DEBUG] clck_gen.py:128 IND CLOCK 4998
2025-03-30 07:17:38 [DEBUG] clck_gen.py:128 IND CLOCK 5100
2025-03-30 07:17:38 [DEBUG] clck_gen.py:128 IND CLOCK 5202
2025-03-30 07:17:38 [DEBUG] clck_gen.py:128 IND CLOCK 5304
2025-03-30 07:17:39 [DEBUG] clck_gen.py:128 IND CLOCK 5406
2025-03-30 07:17:39 [DEBUG] clck_gen.py:128 IND CLOCK 5508
2025-03-30 07:17:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:17:40 [DEBUG] clck_gen.py:128 IND CLOCK 5610
2025-03-30 07:17:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:17:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:17:40 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:17:40 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:17:40 [INFO] transceiver.py:241 (MS@172.18.26.22:6700) Frequency hopping disabled
2025-03-30 07:17:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:17:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:17:40 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:17:40 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:17:40 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 07:17:40 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 07:17:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD HANDOVER
2025-03-30 07:17:40 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.26.22:6700) Recv SETFH cmd
2025-03-30 07:17:40 [INFO] transceiver.py:237 (MS@172.18.26.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2025-03-30 07:17:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:17:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:17:40 [DEBUG] clck_gen.py:128 IND CLOCK 5712
2025-03-30 07:17:41 [DEBUG] clck_gen.py:128 IND CLOCK 5814
2025-03-30 07:17:41 [DEBUG] clck_gen.py:128 IND CLOCK 5916
2025-03-30 07:17:42 [DEBUG] clck_gen.py:128 IND CLOCK 6018
2025-03-30 07:17:42 [DEBUG] clck_gen.py:128 IND CLOCK 6120
2025-03-30 07:17:43 [DEBUG] clck_gen.py:128 IND CLOCK 6222
2025-03-30 07:17:43 [DEBUG] clck_gen.py:128 IND CLOCK 6324
2025-03-30 07:17:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:17:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:17:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:17:44 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:17:44 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:17:44 [INFO] transceiver.py:241 (MS@172.18.26.22:6700) Frequency hopping disabled
2025-03-30 07:17:44 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:17:44 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:17:44 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:17:44 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:17:44 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:17:44 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:17:44 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:17:44 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:17:44 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 07:17:44 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 07:17:44 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 07:17:49 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 07:17:49 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 07:17:49 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:17:49 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:17:49 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:17:49 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:17:49 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:17:49 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 07:17:49 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:17:49 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 07:17:49 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 07:17:49 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 07:17:49 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 07:17:49 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 07:17:49 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:17:49 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:17:49 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 07:17:49 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 07:17:49 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 07:17:49 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 07:17:49 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 07:17:49 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 07:17:49 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:17:49 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:17:49 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 07:17:49 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 07:17:49 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 07:17:49 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 07:17:49 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 07:17:49 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 07:17:49 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:17:49 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:17:49 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 07:17:49 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 07:17:49 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 07:17:49 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 07:17:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 07:17:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 07:17:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 07:17:49 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 07:17:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 07:17:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 07:17:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 07:17:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:17:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 07:17:49 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 07:17:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:17:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:17:49 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 07:17:49 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 07:17:49 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 07:17:49 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 07:17:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:17:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:17:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:17:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 07:17:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:17:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:17:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:17:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:17:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:17:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:17:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:17:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:17:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:17:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:17:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:17:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:17:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:17:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:17:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:17:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:17:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:17:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:17:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:17:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:17:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:17:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:17:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:17:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:17:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:17:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:17:49 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-03-30 07:17:49 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-03-30 07:17:49 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-03-30 07:17:49 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-03-30 07:17:49 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-03-30 07:17:49 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-03-30 07:17:49 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-03-30 07:17:49 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-03-30 07:17:49 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-03-30 07:17:49 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-03-30 07:17:49 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=0 bl=148 pwr=0
2025-03-30 07:17:49 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=1 bl=148 pwr=0
2025-03-30 07:17:49 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=2 bl=148 pwr=0
2025-03-30 07:17:49 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=3 bl=148 pwr=0
2025-03-30 07:17:49 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=4 bl=148 pwr=0
2025-03-30 07:17:49 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=5 bl=148 pwr=0
2025-03-30 07:17:49 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=6 bl=148 pwr=0
2025-03-30 07:17:49 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=7 bl=148 pwr=0
2025-03-30 07:17:49 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 07:17:49 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 07:17:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:17:49 [DEBUG] fake_trx.py:317 (BTS@172.18.26.20:5700) Recv FAKE_CI cmd
2025-03-30 07:17:49 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:17:49 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:17:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:17:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:17:49 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:17:49 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:17:49 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 07:17:49 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 07:17:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD HANDOVER
2025-03-30 07:17:49 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:17:49 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:17:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:17:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:17:50 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-03-30 07:17:50 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:17:50 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:17:50 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:17:50 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:17:50 [DEBUG] clck_gen.py:128 IND CLOCK 306
2025-03-30 07:17:50 [DEBUG] clck_gen.py:128 IND CLOCK 408
2025-03-30 07:17:51 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:17:51 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:17:51 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:17:51 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:17:51 [DEBUG] clck_gen.py:128 IND CLOCK 510
2025-03-30 07:17:51 [DEBUG] clck_gen.py:128 IND CLOCK 612
2025-03-30 07:17:52 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:17:52 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:17:52 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:17:52 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:17:52 [DEBUG] clck_gen.py:128 IND CLOCK 714
2025-03-30 07:17:52 [WARNING] clck_gen.py:108 CLCKGen: time overrun by -13484us; resetting the clock
2025-03-30 07:17:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:17:52 [DEBUG] clck_gen.py:128 IND CLOCK 816
2025-03-30 07:17:53 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:17:53 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:17:53 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:17:53 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:17:53 [DEBUG] clck_gen.py:128 IND CLOCK 918
2025-03-30 07:17:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:17:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:17:53 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:17:53 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:17:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:17:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:17:53 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:17:53 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:17:53 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 07:17:53 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 07:17:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD HANDOVER
2025-03-30 07:17:53 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:17:53 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:17:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:17:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:17:53 [DEBUG] clck_gen.py:128 IND CLOCK 1020
2025-03-30 07:17:54 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:17:54 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:17:54 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:17:54 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:17:54 [DEBUG] clck_gen.py:128 IND CLOCK 1122
2025-03-30 07:17:54 [DEBUG] clck_gen.py:128 IND CLOCK 1224
2025-03-30 07:17:55 [DEBUG] clck_gen.py:128 IND CLOCK 1326
2025-03-30 07:17:55 [DEBUG] clck_gen.py:128 IND CLOCK 1428
2025-03-30 07:17:56 [DEBUG] clck_gen.py:128 IND CLOCK 1530
2025-03-30 07:17:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:17:56 [DEBUG] clck_gen.py:128 IND CLOCK 1632
2025-03-30 07:17:57 [DEBUG] clck_gen.py:128 IND CLOCK 1734
2025-03-30 07:17:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:17:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:17:57 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:17:57 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:17:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:17:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:17:57 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:17:57 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:17:57 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 07:17:57 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 07:17:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD HANDOVER
2025-03-30 07:17:57 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:17:57 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:17:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:17:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:17:57 [DEBUG] clck_gen.py:128 IND CLOCK 1836
2025-03-30 07:17:58 [DEBUG] clck_gen.py:128 IND CLOCK 1938
2025-03-30 07:17:58 [DEBUG] clck_gen.py:128 IND CLOCK 2040
2025-03-30 07:17:59 [DEBUG] clck_gen.py:128 IND CLOCK 2142
2025-03-30 07:17:59 [DEBUG] clck_gen.py:128 IND CLOCK 2244
2025-03-30 07:17:59 [DEBUG] clck_gen.py:128 IND CLOCK 2346
2025-03-30 07:18:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:18:00 [DEBUG] clck_gen.py:128 IND CLOCK 2448
2025-03-30 07:18:00 [DEBUG] clck_gen.py:128 IND CLOCK 2550
2025-03-30 07:18:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:18:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:18:01 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:18:01 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:18:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:18:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:18:01 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:18:01 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:18:01 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 07:18:01 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 07:18:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD HANDOVER
2025-03-30 07:18:01 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:18:01 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:18:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:18:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:18:01 [DEBUG] clck_gen.py:128 IND CLOCK 2652
2025-03-30 07:18:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:18:01 [DEBUG] clck_gen.py:128 IND CLOCK 2754
2025-03-30 07:18:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:18:02 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:18:02 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:18:02 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:18:02 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:18:02 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:18:02 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:18:02 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:18:02 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:18:02 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:18:02 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 07:18:02 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 07:18:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD HANDOVER
2025-03-30 07:18:02 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.26.22:6700) Recv SETFH cmd
2025-03-30 07:18:02 [INFO] transceiver.py:237 (MS@172.18.26.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2025-03-30 07:18:02 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:18:02 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:18:02 [DEBUG] clck_gen.py:128 IND CLOCK 2856
2025-03-30 07:18:02 [DEBUG] clck_gen.py:128 IND CLOCK 2958
2025-03-30 07:18:03 [DEBUG] clck_gen.py:128 IND CLOCK 3060
2025-03-30 07:18:03 [DEBUG] clck_gen.py:128 IND CLOCK 3162
2025-03-30 07:18:04 [DEBUG] clck_gen.py:128 IND CLOCK 3264
2025-03-30 07:18:04 [DEBUG] clck_gen.py:128 IND CLOCK 3366
2025-03-30 07:18:05 [DEBUG] clck_gen.py:128 IND CLOCK 3468
2025-03-30 07:18:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:18:05 [DEBUG] clck_gen.py:128 IND CLOCK 3570
2025-03-30 07:18:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:18:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:18:05 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:18:05 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:18:05 [INFO] transceiver.py:241 (MS@172.18.26.22:6700) Frequency hopping disabled
2025-03-30 07:18:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:18:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:18:05 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:18:05 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:18:05 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 07:18:05 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 07:18:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD HANDOVER
2025-03-30 07:18:05 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.26.22:6700) Recv SETFH cmd
2025-03-30 07:18:05 [INFO] transceiver.py:237 (MS@172.18.26.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2025-03-30 07:18:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:18:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:18:06 [DEBUG] clck_gen.py:128 IND CLOCK 3672
2025-03-30 07:18:06 [DEBUG] clck_gen.py:128 IND CLOCK 3774
2025-03-30 07:18:07 [DEBUG] clck_gen.py:128 IND CLOCK 3876
2025-03-30 07:18:07 [DEBUG] clck_gen.py:128 IND CLOCK 3978
2025-03-30 07:18:07 [DEBUG] clck_gen.py:128 IND CLOCK 4080
2025-03-30 07:18:08 [DEBUG] clck_gen.py:128 IND CLOCK 4182
2025-03-30 07:18:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:18:08 [DEBUG] clck_gen.py:128 IND CLOCK 4284
2025-03-30 07:18:09 [DEBUG] clck_gen.py:128 IND CLOCK 4386
2025-03-30 07:18:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:18:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:18:09 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:18:09 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:18:09 [INFO] transceiver.py:241 (MS@172.18.26.22:6700) Frequency hopping disabled
2025-03-30 07:18:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:18:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:18:09 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:18:09 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:18:09 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 07:18:09 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 07:18:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD HANDOVER
2025-03-30 07:18:09 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.26.22:6700) Recv SETFH cmd
2025-03-30 07:18:09 [INFO] transceiver.py:237 (MS@172.18.26.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2025-03-30 07:18:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:18:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:18:09 [DEBUG] clck_gen.py:128 IND CLOCK 4488
2025-03-30 07:18:10 [DEBUG] clck_gen.py:128 IND CLOCK 4590
2025-03-30 07:18:10 [DEBUG] clck_gen.py:128 IND CLOCK 4692
2025-03-30 07:18:11 [DEBUG] clck_gen.py:128 IND CLOCK 4794
2025-03-30 07:18:11 [DEBUG] clck_gen.py:128 IND CLOCK 4896
2025-03-30 07:18:12 [DEBUG] clck_gen.py:128 IND CLOCK 4998
2025-03-30 07:18:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:18:12 [DEBUG] clck_gen.py:128 IND CLOCK 5100
2025-03-30 07:18:13 [DEBUG] clck_gen.py:128 IND CLOCK 5202
2025-03-30 07:18:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:18:13 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:18:13 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:18:13 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:18:13 [INFO] transceiver.py:241 (MS@172.18.26.22:6700) Frequency hopping disabled
2025-03-30 07:18:13 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:18:13 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:18:13 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:18:13 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:18:13 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 07:18:13 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 07:18:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD HANDOVER
2025-03-30 07:18:13 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.26.22:6700) Recv SETFH cmd
2025-03-30 07:18:13 [INFO] transceiver.py:237 (MS@172.18.26.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2025-03-30 07:18:13 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:18:13 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:18:13 [DEBUG] clck_gen.py:128 IND CLOCK 5304
2025-03-30 07:18:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:18:14 [DEBUG] clck_gen.py:128 IND CLOCK 5406
2025-03-30 07:18:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:18:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:18:14 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:18:14 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:18:14 [INFO] transceiver.py:241 (MS@172.18.26.22:6700) Frequency hopping disabled
2025-03-30 07:18:14 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:18:14 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:18:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:18:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:18:14 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:18:14 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:18:14 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 07:18:14 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 07:18:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD HANDOVER
2025-03-30 07:18:14 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:18:14 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:18:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:18:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:18:14 [DEBUG] clck_gen.py:128 IND CLOCK 5508
2025-03-30 07:18:15 [DEBUG] clck_gen.py:128 IND CLOCK 5610
2025-03-30 07:18:15 [DEBUG] clck_gen.py:128 IND CLOCK 5712
2025-03-30 07:18:15 [DEBUG] clck_gen.py:128 IND CLOCK 5814
2025-03-30 07:18:16 [DEBUG] clck_gen.py:128 IND CLOCK 5916
2025-03-30 07:18:16 [DEBUG] clck_gen.py:128 IND CLOCK 6018
2025-03-30 07:18:17 [DEBUG] clck_gen.py:128 IND CLOCK 6120
2025-03-30 07:18:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:18:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:18:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:18:17 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:18:17 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:18:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:18:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:18:17 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:18:17 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:18:17 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 07:18:17 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 07:18:17 [DEBUG] clck_gen.py:128 IND CLOCK 6222
2025-03-30 07:18:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD HANDOVER
2025-03-30 07:18:17 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:18:17 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:18:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:18:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:18:18 [DEBUG] clck_gen.py:128 IND CLOCK 6324
2025-03-30 07:18:18 [DEBUG] clck_gen.py:128 IND CLOCK 6426
2025-03-30 07:18:19 [DEBUG] clck_gen.py:128 IND CLOCK 6528
2025-03-30 07:18:19 [DEBUG] clck_gen.py:128 IND CLOCK 6630
2025-03-30 07:18:20 [DEBUG] clck_gen.py:128 IND CLOCK 6732
2025-03-30 07:18:20 [DEBUG] clck_gen.py:128 IND CLOCK 6834
2025-03-30 07:18:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:18:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:18:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:18:21 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:18:21 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:18:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:18:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:18:21 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:18:21 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:18:21 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 07:18:21 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 07:18:21 [DEBUG] clck_gen.py:128 IND CLOCK 6936
2025-03-30 07:18:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD HANDOVER
2025-03-30 07:18:21 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:18:21 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:18:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:18:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:18:21 [DEBUG] clck_gen.py:128 IND CLOCK 7038
2025-03-30 07:18:22 [DEBUG] clck_gen.py:128 IND CLOCK 7140
2025-03-30 07:18:22 [DEBUG] clck_gen.py:128 IND CLOCK 7242
2025-03-30 07:18:23 [DEBUG] clck_gen.py:128 IND CLOCK 7344
2025-03-30 07:18:23 [DEBUG] clck_gen.py:128 IND CLOCK 7446
2025-03-30 07:18:23 [DEBUG] clck_gen.py:128 IND CLOCK 7548
2025-03-30 07:18:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:18:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:18:24 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:18:24 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:18:24 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:18:24 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:18:24 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:18:24 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:18:24 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:18:24 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 07:18:24 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 07:18:24 [DEBUG] clck_gen.py:128 IND CLOCK 7650
2025-03-30 07:18:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD HANDOVER
2025-03-30 07:18:24 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:18:24 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:18:24 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:18:24 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:18:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:18:24 [DEBUG] clck_gen.py:128 IND CLOCK 7752
2025-03-30 07:18:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:18:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:18:25 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:18:25 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:18:25 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:18:25 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:18:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:18:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:18:25 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:18:25 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:18:25 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 07:18:25 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 07:18:25 [DEBUG] clck_gen.py:128 IND CLOCK 7854
2025-03-30 07:18:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD HANDOVER
2025-03-30 07:18:25 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.26.22:6700) Recv SETFH cmd
2025-03-30 07:18:25 [INFO] transceiver.py:237 (MS@172.18.26.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2025-03-30 07:18:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:18:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:18:25 [DEBUG] clck_gen.py:128 IND CLOCK 7956
2025-03-30 07:18:26 [DEBUG] clck_gen.py:128 IND CLOCK 8058
2025-03-30 07:18:26 [DEBUG] clck_gen.py:128 IND CLOCK 8160
2025-03-30 07:18:27 [DEBUG] clck_gen.py:128 IND CLOCK 8262
2025-03-30 07:18:27 [DEBUG] clck_gen.py:128 IND CLOCK 8364
2025-03-30 07:18:28 [DEBUG] clck_gen.py:128 IND CLOCK 8466
2025-03-30 07:18:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:18:28 [DEBUG] clck_gen.py:128 IND CLOCK 8568
2025-03-30 07:18:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:18:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:18:29 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:18:29 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:18:29 [INFO] transceiver.py:241 (MS@172.18.26.22:6700) Frequency hopping disabled
2025-03-30 07:18:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:18:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:18:29 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:18:29 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:18:29 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 07:18:29 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 07:18:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD HANDOVER
2025-03-30 07:18:29 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.26.22:6700) Recv SETFH cmd
2025-03-30 07:18:29 [INFO] transceiver.py:237 (MS@172.18.26.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2025-03-30 07:18:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:18:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:18:29 [DEBUG] clck_gen.py:128 IND CLOCK 8670
2025-03-30 07:18:29 [DEBUG] clck_gen.py:128 IND CLOCK 8772
2025-03-30 07:18:29 [WARNING] clck_gen.py:108 CLCKGen: time overrun by -8850us; resetting the clock
2025-03-30 07:18:29 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=8774): ver=1 fn=8772 tn=0 bl=148 pwr=0
2025-03-30 07:18:29 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=8774): ver=1 fn=8772 tn=1 bl=148 pwr=0
2025-03-30 07:18:29 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=8774): ver=1 fn=8772 tn=2 bl=148 pwr=0
2025-03-30 07:18:29 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=8774): ver=1 fn=8772 tn=3 bl=148 pwr=0
2025-03-30 07:18:29 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=8774): ver=1 fn=8772 tn=4 bl=148 pwr=0
2025-03-30 07:18:29 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=8774): ver=1 fn=8772 tn=5 bl=148 pwr=0
2025-03-30 07:18:29 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=8774): ver=1 fn=8772 tn=6 bl=148 pwr=0
2025-03-30 07:18:29 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=8774): ver=1 fn=8772 tn=7 bl=148 pwr=0
2025-03-30 07:18:29 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=8774): ver=1 fn=8773 tn=0 bl=148 pwr=0
2025-03-30 07:18:29 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=8774): ver=1 fn=8773 tn=1 bl=148 pwr=0
2025-03-30 07:18:29 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=8774): ver=1 fn=8773 tn=2 bl=148 pwr=0
2025-03-30 07:18:29 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=8774): ver=1 fn=8773 tn=3 bl=148 pwr=0
2025-03-30 07:18:29 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=8774): ver=1 fn=8773 tn=4 bl=148 pwr=0
2025-03-30 07:18:29 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=8774): ver=1 fn=8773 tn=5 bl=148 pwr=0
2025-03-30 07:18:29 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=8774): ver=1 fn=8773 tn=6 bl=148 pwr=0
2025-03-30 07:18:29 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=8774): ver=1 fn=8773 tn=7 bl=148 pwr=0
2025-03-30 07:18:30 [DEBUG] clck_gen.py:128 IND CLOCK 8874
2025-03-30 07:18:30 [DEBUG] clck_gen.py:128 IND CLOCK 8976
2025-03-30 07:18:31 [DEBUG] clck_gen.py:128 IND CLOCK 9078
2025-03-30 07:18:31 [DEBUG] clck_gen.py:128 IND CLOCK 9180
2025-03-30 07:18:31 [DEBUG] clck_gen.py:128 IND CLOCK 9282
2025-03-30 07:18:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:18:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:18:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:18:32 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:18:32 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:18:32 [INFO] transceiver.py:241 (MS@172.18.26.22:6700) Frequency hopping disabled
2025-03-30 07:18:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:18:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:18:32 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:18:32 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:18:32 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 07:18:32 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 07:18:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD HANDOVER
2025-03-30 07:18:32 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.26.22:6700) Recv SETFH cmd
2025-03-30 07:18:32 [INFO] transceiver.py:237 (MS@172.18.26.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2025-03-30 07:18:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:18:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:18:32 [DEBUG] clck_gen.py:128 IND CLOCK 9384
2025-03-30 07:18:32 [DEBUG] clck_gen.py:128 IND CLOCK 9486
2025-03-30 07:18:33 [DEBUG] clck_gen.py:128 IND CLOCK 9588
2025-03-30 07:18:33 [DEBUG] clck_gen.py:128 IND CLOCK 9690
2025-03-30 07:18:34 [DEBUG] clck_gen.py:128 IND CLOCK 9792
2025-03-30 07:18:34 [DEBUG] clck_gen.py:128 IND CLOCK 9894
2025-03-30 07:18:35 [DEBUG] clck_gen.py:128 IND CLOCK 9996
2025-03-30 07:18:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:18:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:18:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:18:35 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:18:35 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:18:35 [INFO] transceiver.py:241 (MS@172.18.26.22:6700) Frequency hopping disabled
2025-03-30 07:18:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:18:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:18:35 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:18:35 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:18:35 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 07:18:35 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 07:18:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD HANDOVER
2025-03-30 07:18:35 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.26.22:6700) Recv SETFH cmd
2025-03-30 07:18:35 [INFO] transceiver.py:237 (MS@172.18.26.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2025-03-30 07:18:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:18:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:18:35 [DEBUG] clck_gen.py:128 IND CLOCK 10098
2025-03-30 07:18:36 [DEBUG] clck_gen.py:128 IND CLOCK 10200
2025-03-30 07:18:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:18:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:18:36 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:18:36 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:18:36 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:18:36 [INFO] transceiver.py:241 (MS@172.18.26.22:6700) Frequency hopping disabled
2025-03-30 07:18:36 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:18:36 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:18:36 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:18:36 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:18:36 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:18:36 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:18:36 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:18:36 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:18:36 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 07:18:36 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 07:18:36 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 07:18:41 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 07:18:41 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 07:18:41 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:18:41 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:18:41 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:18:41 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:18:41 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:18:41 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 07:18:41 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:18:41 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 07:18:41 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 07:18:41 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 07:18:41 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 07:18:41 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 07:18:41 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:18:41 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:18:41 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 07:18:41 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 07:18:41 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 07:18:41 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 07:18:41 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 07:18:41 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 07:18:41 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:18:41 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:18:41 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 07:18:41 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 07:18:41 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 07:18:41 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 07:18:41 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 07:18:41 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 07:18:41 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:18:41 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:18:41 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 07:18:41 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 07:18:41 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 07:18:41 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 07:18:41 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 07:18:41 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 07:18:41 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 07:18:41 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 07:18:41 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 07:18:41 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 07:18:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 07:18:41 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:18:41 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:18:41 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 07:18:41 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 07:18:41 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:18:41 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:18:41 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 07:18:41 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 07:18:41 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 07:18:41 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 07:18:41 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:18:41 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:18:41 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:18:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 07:18:41 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:18:41 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:18:41 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:18:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:18:41 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:18:41 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:18:41 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:18:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:18:41 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:18:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:18:41 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:18:41 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:18:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:18:41 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:18:41 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:18:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:18:41 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:18:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:18:41 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:18:41 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:18:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:18:41 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:18:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:18:41 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:18:41 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:18:41 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-03-30 07:18:42 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-03-30 07:18:42 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-03-30 07:18:42 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-03-30 07:18:42 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-03-30 07:18:42 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-03-30 07:18:42 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-03-30 07:18:42 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-03-30 07:18:42 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-03-30 07:18:42 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-03-30 07:18:42 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=0 bl=148 pwr=0
2025-03-30 07:18:42 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=1 bl=148 pwr=0
2025-03-30 07:18:42 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=2 bl=148 pwr=0
2025-03-30 07:18:42 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=3 bl=148 pwr=0
2025-03-30 07:18:42 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=4 bl=148 pwr=0
2025-03-30 07:18:42 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=5 bl=148 pwr=0
2025-03-30 07:18:42 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=6 bl=148 pwr=0
2025-03-30 07:18:42 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=7 bl=148 pwr=0
2025-03-30 07:18:42 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 07:18:42 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 07:18:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:18:42 [DEBUG] fake_trx.py:317 (BTS@172.18.26.20:5700) Recv FAKE_CI cmd
2025-03-30 07:18:42 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:18:42 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:18:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:18:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:18:42 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:18:42 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:18:42 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 07:18:42 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 07:18:42 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-03-30 07:18:42 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:18:42 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:18:42 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:18:42 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:18:43 [DEBUG] clck_gen.py:128 IND CLOCK 306
2025-03-30 07:18:43 [DEBUG] clck_gen.py:128 IND CLOCK 408
2025-03-30 07:18:43 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:18:43 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:18:43 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:18:43 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:18:44 [DEBUG] clck_gen.py:128 IND CLOCK 510
2025-03-30 07:18:44 [DEBUG] clck_gen.py:128 IND CLOCK 612
2025-03-30 07:18:44 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:18:44 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:18:44 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:18:44 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:18:44 [DEBUG] clck_gen.py:128 IND CLOCK 714
2025-03-30 07:18:45 [DEBUG] clck_gen.py:128 IND CLOCK 816
2025-03-30 07:18:45 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:18:45 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:18:45 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:18:45 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:18:45 [DEBUG] clck_gen.py:128 IND CLOCK 918
2025-03-30 07:18:46 [DEBUG] clck_gen.py:128 IND CLOCK 1020
2025-03-30 07:18:46 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:18:46 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:18:46 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:18:46 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:18:46 [DEBUG] clck_gen.py:128 IND CLOCK 1122
2025-03-30 07:18:47 [DEBUG] clck_gen.py:128 IND CLOCK 1224
2025-03-30 07:18:47 [DEBUG] clck_gen.py:128 IND CLOCK 1326
2025-03-30 07:18:48 [DEBUG] clck_gen.py:128 IND CLOCK 1428
2025-03-30 07:18:48 [DEBUG] clck_gen.py:128 IND CLOCK 1530
2025-03-30 07:18:49 [DEBUG] clck_gen.py:128 IND CLOCK 1632
2025-03-30 07:18:49 [DEBUG] clck_gen.py:128 IND CLOCK 1734
2025-03-30 07:18:50 [DEBUG] clck_gen.py:128 IND CLOCK 1836
2025-03-30 07:18:50 [DEBUG] clck_gen.py:128 IND CLOCK 1938
2025-03-30 07:18:51 [DEBUG] clck_gen.py:128 IND CLOCK 2040
2025-03-30 07:18:51 [DEBUG] clck_gen.py:128 IND CLOCK 2142
2025-03-30 07:18:52 [DEBUG] clck_gen.py:128 IND CLOCK 2244
2025-03-30 07:18:52 [DEBUG] clck_gen.py:128 IND CLOCK 2346
2025-03-30 07:18:52 [DEBUG] clck_gen.py:128 IND CLOCK 2448
2025-03-30 07:18:53 [DEBUG] clck_gen.py:128 IND CLOCK 2550
2025-03-30 07:18:53 [DEBUG] clck_gen.py:128 IND CLOCK 2652
2025-03-30 07:18:54 [DEBUG] clck_gen.py:128 IND CLOCK 2754
2025-03-30 07:18:54 [DEBUG] clck_gen.py:128 IND CLOCK 2856
2025-03-30 07:18:55 [DEBUG] clck_gen.py:128 IND CLOCK 2958
2025-03-30 07:18:55 [DEBUG] clck_gen.py:128 IND CLOCK 3060
2025-03-30 07:18:56 [DEBUG] clck_gen.py:128 IND CLOCK 3162
2025-03-30 07:18:56 [DEBUG] clck_gen.py:128 IND CLOCK 3264
2025-03-30 07:18:57 [DEBUG] clck_gen.py:128 IND CLOCK 3366
2025-03-30 07:18:57 [DEBUG] clck_gen.py:128 IND CLOCK 3468
2025-03-30 07:18:58 [DEBUG] clck_gen.py:128 IND CLOCK 3570
2025-03-30 07:18:58 [DEBUG] clck_gen.py:128 IND CLOCK 3672
2025-03-30 07:18:59 [DEBUG] clck_gen.py:128 IND CLOCK 3774
2025-03-30 07:18:59 [DEBUG] clck_gen.py:128 IND CLOCK 3876
2025-03-30 07:18:59 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=3963): ver=1 fn=3962 tn=0 bl=148 pwr=0
2025-03-30 07:18:59 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=3963): ver=1 fn=3962 tn=1 bl=148 pwr=0
2025-03-30 07:18:59 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=3963): ver=1 fn=3962 tn=2 bl=148 pwr=0
2025-03-30 07:18:59 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=3963): ver=1 fn=3962 tn=3 bl=148 pwr=0
2025-03-30 07:18:59 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=3963): ver=1 fn=3962 tn=4 bl=148 pwr=0
2025-03-30 07:18:59 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=3963): ver=1 fn=3962 tn=5 bl=148 pwr=0
2025-03-30 07:18:59 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=3963): ver=1 fn=3962 tn=6 bl=148 pwr=0
2025-03-30 07:18:59 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=3963): ver=1 fn=3962 tn=7 bl=148 pwr=0
2025-03-30 07:19:00 [DEBUG] clck_gen.py:128 IND CLOCK 3978
2025-03-30 07:19:00 [DEBUG] clck_gen.py:128 IND CLOCK 4080
2025-03-30 07:19:00 [DEBUG] clck_gen.py:128 IND CLOCK 4182
2025-03-30 07:19:01 [DEBUG] clck_gen.py:128 IND CLOCK 4284
2025-03-30 07:19:01 [DEBUG] clck_gen.py:128 IND CLOCK 4386
2025-03-30 07:19:02 [DEBUG] clck_gen.py:128 IND CLOCK 4488
2025-03-30 07:19:02 [DEBUG] clck_gen.py:128 IND CLOCK 4590
2025-03-30 07:19:03 [DEBUG] clck_gen.py:128 IND CLOCK 4692
2025-03-30 07:19:03 [DEBUG] clck_gen.py:128 IND CLOCK 4794
2025-03-30 07:19:04 [DEBUG] clck_gen.py:128 IND CLOCK 4896
2025-03-30 07:19:04 [DEBUG] clck_gen.py:128 IND CLOCK 4998
2025-03-30 07:19:05 [DEBUG] clck_gen.py:128 IND CLOCK 5100
2025-03-30 07:19:05 [DEBUG] clck_gen.py:128 IND CLOCK 5202
2025-03-30 07:19:05 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:19:05 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:19:05 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:19:05 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:19:05 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:19:05 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:19:05 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:19:05 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:19:05 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:19:05 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:19:05 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 07:19:05 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 07:19:05 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 07:19:05 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=5238 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:19:05 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=5238 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:19:05 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=5238 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:19:05 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=5238 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:19:05 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=5238 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:19:05 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=5238 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:19:05 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=5239 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:19:05 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=5239 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:19:05 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=5239 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:19:05 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=5239 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:19:05 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=5239 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:19:05 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=5239 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:19:05 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=5239 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:19:05 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=5239 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:19:05 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=5240 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:19:05 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=5240 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:19:05 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=5240 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:19:05 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=5240 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:19:05 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=5240 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:19:05 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=5240 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:19:05 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=5240 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:19:05 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=5240 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:19:10 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 07:19:10 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 07:19:10 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:19:10 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:19:10 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:19:10 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:19:10 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:19:10 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 07:19:10 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:19:10 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 07:19:10 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 07:19:10 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 07:19:10 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 07:19:10 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 07:19:10 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:19:10 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 07:19:10 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:19:10 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 07:19:10 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 07:19:10 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 07:19:10 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 07:19:10 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 07:19:10 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:19:10 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:19:10 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 07:19:10 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 07:19:10 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 07:19:10 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 07:19:10 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 07:19:10 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 07:19:10 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:19:10 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:19:10 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 07:19:10 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 07:19:10 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 07:19:10 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 07:19:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 07:19:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 07:19:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 07:19:10 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 07:19:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 07:19:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 07:19:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 07:19:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:19:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 07:19:10 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 07:19:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:19:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:19:10 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 07:19:10 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 07:19:10 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 07:19:10 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 07:19:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:19:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:19:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:19:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 07:19:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:19:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:19:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:19:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:19:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:19:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:19:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:19:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:19:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:19:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:19:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:19:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:19:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:19:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:19:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:19:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:19:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:19:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:19:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:19:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:19:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:19:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:19:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:19:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:19:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:19:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:19:10 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-03-30 07:19:11 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-03-30 07:19:11 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-03-30 07:19:11 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-03-30 07:19:11 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-03-30 07:19:11 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-03-30 07:19:11 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-03-30 07:19:11 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-03-30 07:19:11 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-03-30 07:19:11 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-03-30 07:19:11 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=0 bl=148 pwr=0
2025-03-30 07:19:11 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=1 bl=148 pwr=0
2025-03-30 07:19:11 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=2 bl=148 pwr=0
2025-03-30 07:19:11 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=3 bl=148 pwr=0
2025-03-30 07:19:11 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=4 bl=148 pwr=0
2025-03-30 07:19:11 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=5 bl=148 pwr=0
2025-03-30 07:19:11 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=6 bl=148 pwr=0
2025-03-30 07:19:11 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=7 bl=148 pwr=0
2025-03-30 07:19:11 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 07:19:11 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 07:19:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:19:11 [DEBUG] fake_trx.py:317 (BTS@172.18.26.20:5700) Recv FAKE_CI cmd
2025-03-30 07:19:11 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:19:11 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:19:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:19:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:19:11 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:19:11 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:19:11 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 07:19:11 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 07:19:11 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-03-30 07:19:11 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:19:11 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:19:11 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:19:11 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:19:12 [DEBUG] clck_gen.py:128 IND CLOCK 306
2025-03-30 07:19:12 [DEBUG] clck_gen.py:128 IND CLOCK 408
2025-03-30 07:19:12 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:19:12 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:19:12 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:19:12 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:19:13 [DEBUG] clck_gen.py:128 IND CLOCK 510
2025-03-30 07:19:13 [DEBUG] clck_gen.py:128 IND CLOCK 612
2025-03-30 07:19:13 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:19:13 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:19:13 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:19:13 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:19:14 [DEBUG] clck_gen.py:128 IND CLOCK 714
2025-03-30 07:19:14 [DEBUG] clck_gen.py:128 IND CLOCK 816
2025-03-30 07:19:14 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:19:14 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:19:14 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:19:14 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:19:15 [DEBUG] clck_gen.py:128 IND CLOCK 918
2025-03-30 07:19:15 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=997): ver=1 fn=996 tn=0 bl=148 pwr=0
2025-03-30 07:19:15 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=997): ver=1 fn=996 tn=1 bl=148 pwr=0
2025-03-30 07:19:15 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=997): ver=1 fn=996 tn=2 bl=148 pwr=0
2025-03-30 07:19:15 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=997): ver=1 fn=996 tn=3 bl=148 pwr=0
2025-03-30 07:19:15 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=997): ver=1 fn=996 tn=4 bl=148 pwr=0
2025-03-30 07:19:15 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=997): ver=1 fn=996 tn=5 bl=148 pwr=0
2025-03-30 07:19:15 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=997): ver=1 fn=996 tn=6 bl=148 pwr=0
2025-03-30 07:19:15 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=997): ver=1 fn=996 tn=7 bl=148 pwr=0
2025-03-30 07:19:15 [DEBUG] clck_gen.py:128 IND CLOCK 1020
2025-03-30 07:19:15 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:19:15 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:19:15 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:19:15 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:19:16 [DEBUG] clck_gen.py:128 IND CLOCK 1122
2025-03-30 07:19:16 [DEBUG] clck_gen.py:128 IND CLOCK 1224
2025-03-30 07:19:16 [DEBUG] clck_gen.py:128 IND CLOCK 1326
2025-03-30 07:19:17 [DEBUG] clck_gen.py:128 IND CLOCK 1428
2025-03-30 07:19:17 [DEBUG] clck_gen.py:128 IND CLOCK 1530
2025-03-30 07:19:18 [DEBUG] clck_gen.py:128 IND CLOCK 1632
2025-03-30 07:19:18 [DEBUG] clck_gen.py:128 IND CLOCK 1734
2025-03-30 07:19:19 [DEBUG] clck_gen.py:128 IND CLOCK 1836
2025-03-30 07:19:19 [DEBUG] clck_gen.py:128 IND CLOCK 1938
2025-03-30 07:19:20 [DEBUG] clck_gen.py:128 IND CLOCK 2040
2025-03-30 07:19:20 [DEBUG] clck_gen.py:128 IND CLOCK 2142
2025-03-30 07:19:21 [DEBUG] clck_gen.py:128 IND CLOCK 2244
2025-03-30 07:19:21 [DEBUG] clck_gen.py:128 IND CLOCK 2346
2025-03-30 07:19:22 [DEBUG] clck_gen.py:128 IND CLOCK 2448
2025-03-30 07:19:22 [DEBUG] clck_gen.py:128 IND CLOCK 2550
2025-03-30 07:19:23 [DEBUG] clck_gen.py:128 IND CLOCK 2652
2025-03-30 07:19:23 [DEBUG] clck_gen.py:128 IND CLOCK 2754
2025-03-30 07:19:24 [DEBUG] clck_gen.py:128 IND CLOCK 2856
2025-03-30 07:19:24 [DEBUG] clck_gen.py:128 IND CLOCK 2958
2025-03-30 07:19:24 [DEBUG] clck_gen.py:128 IND CLOCK 3060
2025-03-30 07:19:25 [DEBUG] clck_gen.py:128 IND CLOCK 3162
2025-03-30 07:19:25 [WARNING] clck_gen.py:108 CLCKGen: time overrun by -6406us; resetting the clock
2025-03-30 07:19:25 [DEBUG] clck_gen.py:128 IND CLOCK 3264
2025-03-30 07:19:26 [DEBUG] clck_gen.py:128 IND CLOCK 3366
2025-03-30 07:19:26 [DEBUG] clck_gen.py:128 IND CLOCK 3468
2025-03-30 07:19:27 [DEBUG] clck_gen.py:128 IND CLOCK 3570
2025-03-30 07:19:27 [DEBUG] clck_gen.py:128 IND CLOCK 3672
2025-03-30 07:19:28 [DEBUG] clck_gen.py:128 IND CLOCK 3774
2025-03-30 07:19:28 [DEBUG] clck_gen.py:128 IND CLOCK 3876
2025-03-30 07:19:29 [DEBUG] clck_gen.py:128 IND CLOCK 3978
2025-03-30 07:19:29 [DEBUG] clck_gen.py:128 IND CLOCK 4080
2025-03-30 07:19:30 [DEBUG] clck_gen.py:128 IND CLOCK 4182
2025-03-30 07:19:30 [WARNING] transceiver.py:330 (MS@172.18.26.22:6700) Stale TRXD message (fn=4248): fn=4247 tn=0 bl=148 pwr=0
2025-03-30 07:19:30 [WARNING] transceiver.py:330 (MS@172.18.26.22:6700) Stale TRXD message (fn=4248): fn=4247 tn=1 pwr=0
2025-03-30 07:19:30 [WARNING] transceiver.py:330 (MS@172.18.26.22:6700) Stale TRXD message (fn=4248): fn=4247 tn=2 pwr=0
2025-03-30 07:19:30 [WARNING] transceiver.py:330 (MS@172.18.26.22:6700) Stale TRXD message (fn=4248): fn=4247 tn=3 pwr=0
2025-03-30 07:19:30 [WARNING] transceiver.py:330 (MS@172.18.26.22:6700) Stale TRXD message (fn=4248): fn=4247 tn=4 pwr=0
2025-03-30 07:19:30 [WARNING] transceiver.py:330 (MS@172.18.26.22:6700) Stale TRXD message (fn=4248): fn=4247 tn=5 pwr=0
2025-03-30 07:19:30 [WARNING] transceiver.py:330 (MS@172.18.26.22:6700) Stale TRXD message (fn=4248): fn=4247 tn=6 pwr=0
2025-03-30 07:19:30 [WARNING] transceiver.py:330 (MS@172.18.26.22:6700) Stale TRXD message (fn=4248): fn=4247 tn=7 pwr=0
2025-03-30 07:19:30 [DEBUG] clck_gen.py:128 IND CLOCK 4284
2025-03-30 07:19:31 [DEBUG] clck_gen.py:128 IND CLOCK 4386
2025-03-30 07:19:31 [DEBUG] clck_gen.py:128 IND CLOCK 4488
2025-03-30 07:19:32 [DEBUG] clck_gen.py:128 IND CLOCK 4590
2025-03-30 07:19:32 [DEBUG] clck_gen.py:128 IND CLOCK 4692
2025-03-30 07:19:32 [DEBUG] clck_gen.py:128 IND CLOCK 4794
2025-03-30 07:19:33 [DEBUG] clck_gen.py:128 IND CLOCK 4896
2025-03-30 07:19:33 [DEBUG] clck_gen.py:128 IND CLOCK 4998
2025-03-30 07:19:34 [DEBUG] clck_gen.py:128 IND CLOCK 5100
2025-03-30 07:19:34 [DEBUG] clck_gen.py:128 IND CLOCK 5202
2025-03-30 07:19:35 [DEBUG] clck_gen.py:128 IND CLOCK 5304
2025-03-30 07:19:35 [DEBUG] clck_gen.py:128 IND CLOCK 5406
2025-03-30 07:19:36 [DEBUG] clck_gen.py:128 IND CLOCK 5508
2025-03-30 07:19:36 [DEBUG] clck_gen.py:128 IND CLOCK 5610
2025-03-30 07:19:37 [DEBUG] clck_gen.py:128 IND CLOCK 5712
2025-03-30 07:19:37 [DEBUG] clck_gen.py:128 IND CLOCK 5814
2025-03-30 07:19:38 [DEBUG] clck_gen.py:128 IND CLOCK 5916
2025-03-30 07:19:38 [DEBUG] clck_gen.py:128 IND CLOCK 6018
2025-03-30 07:19:39 [DEBUG] clck_gen.py:128 IND CLOCK 6120
2025-03-30 07:19:39 [DEBUG] clck_gen.py:128 IND CLOCK 6222
2025-03-30 07:19:40 [DEBUG] clck_gen.py:128 IND CLOCK 6324
2025-03-30 07:19:40 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:19:40 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:19:40 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:19:40 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:19:40 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:19:40 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:19:40 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:19:40 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:19:40 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:19:40 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:19:40 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 07:19:40 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 07:19:40 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 07:19:45 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 07:19:45 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 07:19:45 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:19:45 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:19:45 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:19:45 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:19:45 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:19:45 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 07:19:45 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:19:45 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 07:19:45 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 07:19:45 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 07:19:45 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 07:19:45 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 07:19:45 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:19:45 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:19:45 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 07:19:45 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 07:19:45 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 07:19:45 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 07:19:45 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 07:19:45 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 07:19:45 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:19:45 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:19:45 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 07:19:45 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 07:19:45 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 07:19:45 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 07:19:45 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 07:19:45 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 07:19:45 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:19:45 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:19:45 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 07:19:45 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 07:19:45 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 07:19:45 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 07:19:45 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 07:19:45 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 07:19:45 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 07:19:45 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 07:19:45 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 07:19:45 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 07:19:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 07:19:45 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:19:45 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 07:19:45 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 07:19:45 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:19:45 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:19:45 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 07:19:45 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 07:19:45 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 07:19:45 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 07:19:45 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:19:45 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:19:45 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:19:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 07:19:45 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:19:45 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:19:45 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:19:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:19:45 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:19:45 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:19:45 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:19:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:19:45 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:19:45 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:19:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:19:45 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:19:45 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:19:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:19:45 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:19:45 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:19:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:19:45 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:19:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:19:45 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:19:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:19:45 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:19:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:19:45 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:19:45 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:19:45 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:19:45 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-03-30 07:19:45 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-03-30 07:19:45 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-03-30 07:19:45 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-03-30 07:19:45 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-03-30 07:19:45 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-03-30 07:19:45 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-03-30 07:19:45 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-03-30 07:19:45 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-03-30 07:19:45 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-03-30 07:19:45 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=0 bl=148 pwr=0
2025-03-30 07:19:45 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=1 bl=148 pwr=0
2025-03-30 07:19:45 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=2 bl=148 pwr=0
2025-03-30 07:19:45 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=3 bl=148 pwr=0
2025-03-30 07:19:45 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=4 bl=148 pwr=0
2025-03-30 07:19:45 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=5 bl=148 pwr=0
2025-03-30 07:19:45 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=6 bl=148 pwr=0
2025-03-30 07:19:45 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=7 bl=148 pwr=0
2025-03-30 07:19:45 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 07:19:45 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 07:19:45 [DEBUG] fake_trx.py:317 (BTS@172.18.26.20:5700) Recv FAKE_CI cmd
2025-03-30 07:19:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:19:45 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:19:45 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:19:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:19:46 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-03-30 07:19:46 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:19:46 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:19:46 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:19:46 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:19:46 [DEBUG] clck_gen.py:128 IND CLOCK 306
2025-03-30 07:19:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:19:46 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:19:46 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:19:46 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 07:19:46 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 07:19:47 [DEBUG] clck_gen.py:128 IND CLOCK 408
2025-03-30 07:19:47 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:19:47 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:19:47 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:19:47 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:19:47 [DEBUG] clck_gen.py:128 IND CLOCK 510
2025-03-30 07:19:48 [DEBUG] clck_gen.py:128 IND CLOCK 612
2025-03-30 07:19:48 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:19:48 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:19:48 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:19:48 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:19:48 [DEBUG] clck_gen.py:128 IND CLOCK 714
2025-03-30 07:19:48 [DEBUG] clck_gen.py:128 IND CLOCK 816
2025-03-30 07:19:49 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:19:49 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:19:49 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:19:49 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:19:49 [DEBUG] clck_gen.py:128 IND CLOCK 918
2025-03-30 07:19:49 [DEBUG] clck_gen.py:128 IND CLOCK 1020
2025-03-30 07:19:50 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:19:50 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:19:50 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:19:50 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:19:50 [DEBUG] clck_gen.py:128 IND CLOCK 1122
2025-03-30 07:19:50 [DEBUG] clck_gen.py:128 IND CLOCK 1224
2025-03-30 07:19:51 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=1260): ver=1 fn=1257 tn=0 bl=148 pwr=0
2025-03-30 07:19:51 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=1260): ver=1 fn=1257 tn=1 bl=148 pwr=0
2025-03-30 07:19:51 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=1260): ver=1 fn=1257 tn=2 bl=148 pwr=0
2025-03-30 07:19:51 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=1260): ver=1 fn=1257 tn=3 bl=148 pwr=0
2025-03-30 07:19:51 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=1260): ver=1 fn=1257 tn=4 bl=148 pwr=0
2025-03-30 07:19:51 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=1260): ver=1 fn=1257 tn=5 bl=148 pwr=0
2025-03-30 07:19:51 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=1260): ver=1 fn=1257 tn=6 bl=148 pwr=0
2025-03-30 07:19:51 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=1260): ver=1 fn=1257 tn=7 bl=148 pwr=0
2025-03-30 07:19:51 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=1260): ver=1 fn=1258 tn=0 bl=148 pwr=0
2025-03-30 07:19:51 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=1260): ver=1 fn=1258 tn=1 bl=148 pwr=0
2025-03-30 07:19:51 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=1260): ver=1 fn=1258 tn=2 bl=148 pwr=0
2025-03-30 07:19:51 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=1260): ver=1 fn=1258 tn=3 bl=148 pwr=0
2025-03-30 07:19:51 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=1260): ver=1 fn=1258 tn=4 bl=148 pwr=0
2025-03-30 07:19:51 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=1260): ver=1 fn=1258 tn=5 bl=148 pwr=0
2025-03-30 07:19:51 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=1260): ver=1 fn=1258 tn=6 bl=148 pwr=0
2025-03-30 07:19:51 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=1260): ver=1 fn=1258 tn=7 bl=148 pwr=0
2025-03-30 07:19:51 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=1260): ver=1 fn=1259 tn=0 bl=148 pwr=0
2025-03-30 07:19:51 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=1260): ver=1 fn=1259 tn=1 bl=148 pwr=0
2025-03-30 07:19:51 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=1260): ver=1 fn=1259 tn=2 bl=148 pwr=0
2025-03-30 07:19:51 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=1260): ver=1 fn=1259 tn=3 bl=148 pwr=0
2025-03-30 07:19:51 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=1260): ver=1 fn=1259 tn=4 bl=148 pwr=0
2025-03-30 07:19:51 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=1260): ver=1 fn=1259 tn=5 bl=148 pwr=0
2025-03-30 07:19:51 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=1260): ver=1 fn=1259 tn=6 bl=148 pwr=0
2025-03-30 07:19:51 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=1260): ver=1 fn=1259 tn=7 bl=148 pwr=0
2025-03-30 07:19:51 [DEBUG] clck_gen.py:128 IND CLOCK 1326
2025-03-30 07:19:51 [DEBUG] clck_gen.py:128 IND CLOCK 1428
2025-03-30 07:19:52 [DEBUG] clck_gen.py:128 IND CLOCK 1530
2025-03-30 07:19:52 [DEBUG] clck_gen.py:128 IND CLOCK 1632
2025-03-30 07:19:53 [DEBUG] clck_gen.py:128 IND CLOCK 1734
2025-03-30 07:19:53 [DEBUG] clck_gen.py:128 IND CLOCK 1836
2025-03-30 07:19:54 [DEBUG] clck_gen.py:128 IND CLOCK 1938
2025-03-30 07:19:54 [DEBUG] clck_gen.py:128 IND CLOCK 2040
2025-03-30 07:19:55 [DEBUG] clck_gen.py:128 IND CLOCK 2142
2025-03-30 07:19:55 [DEBUG] clck_gen.py:128 IND CLOCK 2244
2025-03-30 07:19:56 [DEBUG] clck_gen.py:128 IND CLOCK 2346
2025-03-30 07:19:56 [WARNING] clck_gen.py:108 CLCKGen: time overrun by -22963us; resetting the clock
2025-03-30 07:19:56 [DEBUG] clck_gen.py:128 IND CLOCK 2448
2025-03-30 07:19:57 [DEBUG] clck_gen.py:128 IND CLOCK 2550
2025-03-30 07:19:57 [DEBUG] clck_gen.py:128 IND CLOCK 2652
2025-03-30 07:19:57 [DEBUG] clck_gen.py:128 IND CLOCK 2754
2025-03-30 07:19:58 [DEBUG] clck_gen.py:128 IND CLOCK 2856
2025-03-30 07:19:58 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:19:58 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:19:58 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:19:58 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:19:58 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:19:58 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:19:58 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:19:58 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:19:58 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:19:58 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:19:58 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 07:19:58 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 07:19:58 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 07:20:03 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 07:20:03 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 07:20:03 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:20:03 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:20:03 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:20:03 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:20:03 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:20:03 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 07:20:03 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:20:03 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 07:20:03 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 07:20:03 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 07:20:03 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 07:20:03 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 07:20:03 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:20:03 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:20:03 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 07:20:03 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 07:20:03 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 07:20:03 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 07:20:03 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 07:20:03 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 07:20:03 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:20:03 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:20:03 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 07:20:03 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 07:20:03 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 07:20:03 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 07:20:03 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 07:20:03 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 07:20:03 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:20:03 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:20:03 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 07:20:03 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 07:20:03 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 07:20:03 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 07:20:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 07:20:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 07:20:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 07:20:03 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 07:20:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 07:20:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 07:20:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 07:20:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:20:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 07:20:03 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 07:20:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:20:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:20:03 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 07:20:03 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 07:20:03 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 07:20:03 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 07:20:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:20:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:20:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:20:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 07:20:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:20:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:20:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:20:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:20:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:20:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:20:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:20:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:20:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:20:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:20:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:20:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:20:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:20:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:20:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:20:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:20:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:20:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:20:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:20:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:20:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:20:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:20:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:20:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:20:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:20:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:20:03 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-03-30 07:20:04 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-03-30 07:20:04 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-03-30 07:20:04 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-03-30 07:20:04 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-03-30 07:20:04 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-03-30 07:20:04 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-03-30 07:20:04 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-03-30 07:20:04 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-03-30 07:20:04 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-03-30 07:20:04 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=0 bl=148 pwr=0
2025-03-30 07:20:04 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=1 bl=148 pwr=0
2025-03-30 07:20:04 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=2 bl=148 pwr=0
2025-03-30 07:20:04 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=3 bl=148 pwr=0
2025-03-30 07:20:04 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=4 bl=148 pwr=0
2025-03-30 07:20:04 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=5 bl=148 pwr=0
2025-03-30 07:20:04 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=6 bl=148 pwr=0
2025-03-30 07:20:04 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=7 bl=148 pwr=0
2025-03-30 07:20:04 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 07:20:04 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 07:20:04 [DEBUG] fake_trx.py:317 (BTS@172.18.26.20:5700) Recv FAKE_CI cmd
2025-03-30 07:20:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:20:04 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:20:04 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:20:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:20:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:20:04 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:20:04 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:20:04 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 07:20:04 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 07:20:04 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-03-30 07:20:04 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:20:04 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:20:04 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:20:04 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:20:05 [DEBUG] clck_gen.py:128 IND CLOCK 306
2025-03-30 07:20:05 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 07:20:05 [DEBUG] clck_gen.py:128 IND CLOCK 408
2025-03-30 07:20:05 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:20:05 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:20:05 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:20:05 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:20:05 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 07:20:05 [DEBUG] clck_gen.py:128 IND CLOCK 510
2025-03-30 07:20:06 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 07:20:06 [DEBUG] clck_gen.py:128 IND CLOCK 612
2025-03-30 07:20:06 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:20:06 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:20:06 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:20:06 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:20:06 [DEBUG] clck_gen.py:128 IND CLOCK 714
2025-03-30 07:20:07 [DEBUG] clck_gen.py:128 IND CLOCK 816
2025-03-30 07:20:07 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:20:07 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:20:07 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:20:07 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:20:07 [DEBUG] clck_gen.py:128 IND CLOCK 918
2025-03-30 07:20:08 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 07:20:08 [DEBUG] clck_gen.py:128 IND CLOCK 1020
2025-03-30 07:20:08 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:20:08 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:20:08 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:20:08 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:20:08 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 07:20:08 [DEBUG] clck_gen.py:128 IND CLOCK 1122
2025-03-30 07:20:09 [DEBUG] clck_gen.py:128 IND CLOCK 1224
2025-03-30 07:20:09 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 07:20:09 [DEBUG] clck_gen.py:128 IND CLOCK 1326
2025-03-30 07:20:09 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 07:20:10 [DEBUG] clck_gen.py:128 IND CLOCK 1428
2025-03-30 07:20:10 [DEBUG] clck_gen.py:128 IND CLOCK 1530
2025-03-30 07:20:11 [DEBUG] clck_gen.py:128 IND CLOCK 1632
2025-03-30 07:20:11 [DEBUG] clck_gen.py:128 IND CLOCK 1734
2025-03-30 07:20:11 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 07:20:12 [DEBUG] clck_gen.py:128 IND CLOCK 1836
2025-03-30 07:20:12 [DEBUG] clck_gen.py:128 IND CLOCK 1938
2025-03-30 07:20:13 [DEBUG] clck_gen.py:128 IND CLOCK 2040
2025-03-30 07:20:13 [DEBUG] clck_gen.py:128 IND CLOCK 2142
2025-03-30 07:20:13 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:20:13 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:20:13 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:20:13 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:20:13 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:20:13 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:20:13 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:20:13 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:20:13 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:20:13 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:20:13 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 07:20:13 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 07:20:13 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 07:20:13 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=2219 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:20:13 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=2219 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:20:13 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=2219 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:20:13 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=2219 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:20:13 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=2219 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:20:13 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=2219 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:20:13 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=2219 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:20:13 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=2219 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:20:18 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 07:20:18 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 07:20:18 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:20:18 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:20:18 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:20:18 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:20:18 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:20:18 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 07:20:18 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:20:18 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 07:20:18 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 07:20:18 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 07:20:18 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 07:20:18 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 07:20:18 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:20:18 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:20:18 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 07:20:18 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 07:20:18 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 07:20:18 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 07:20:18 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 07:20:18 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 07:20:18 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:20:18 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:20:18 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 07:20:18 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 07:20:18 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 07:20:18 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 07:20:18 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 07:20:18 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 07:20:18 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:20:18 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:20:18 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 07:20:18 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 07:20:18 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 07:20:18 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 07:20:18 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 07:20:18 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 07:20:18 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 07:20:18 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 07:20:18 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 07:20:18 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 07:20:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 07:20:18 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:20:18 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 07:20:18 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 07:20:18 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:20:18 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:20:18 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 07:20:18 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 07:20:18 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 07:20:18 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 07:20:18 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:20:18 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:20:18 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:20:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 07:20:18 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:20:18 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:20:18 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:20:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:20:18 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:20:18 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:20:18 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:20:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:20:18 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:20:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:20:18 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:20:18 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:20:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:20:18 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:20:18 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:20:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:20:18 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:20:18 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:20:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:20:18 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:20:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:20:18 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:20:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:20:18 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:20:18 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:20:18 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:20:18 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-03-30 07:20:19 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-03-30 07:20:19 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-03-30 07:20:19 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-03-30 07:20:19 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-03-30 07:20:19 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-03-30 07:20:19 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-03-30 07:20:19 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-03-30 07:20:19 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-03-30 07:20:19 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-03-30 07:20:19 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=0 bl=148 pwr=0
2025-03-30 07:20:19 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=1 bl=148 pwr=0
2025-03-30 07:20:19 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=2 bl=148 pwr=0
2025-03-30 07:20:19 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=3 bl=148 pwr=0
2025-03-30 07:20:19 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=4 bl=148 pwr=0
2025-03-30 07:20:19 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=5 bl=148 pwr=0
2025-03-30 07:20:19 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=6 bl=148 pwr=0
2025-03-30 07:20:19 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=7 bl=148 pwr=0
2025-03-30 07:20:19 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 07:20:19 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 07:20:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:20:19 [DEBUG] fake_trx.py:317 (BTS@172.18.26.20:5700) Recv FAKE_CI cmd
2025-03-30 07:20:19 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:20:19 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:20:19 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:20:19 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:20:19 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:20:19 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:20:19 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 07:20:19 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 07:20:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD HANDOVER
2025-03-30 07:20:19 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:20:19 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:20:19 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:20:19 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:20:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:20:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:20:19 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:20:19 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:20:19 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:20:19 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:20:19 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:20:19 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:20:19 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:20:19 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:20:19 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:20:19 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 07:20:19 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 07:20:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD HANDOVER
2025-03-30 07:20:19 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:20:19 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:20:19 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:20:19 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:20:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:20:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:20:19 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:20:19 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:20:19 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:20:19 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:20:19 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:20:19 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:20:19 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:20:19 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:20:19 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:20:19 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 07:20:19 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 07:20:19 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-03-30 07:20:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD HANDOVER
2025-03-30 07:20:19 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:20:19 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:20:19 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:20:19 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:20:19 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:20:19 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:20:19 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:20:19 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:20:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:20:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:20:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:20:20 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:20:20 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:20:20 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:20:20 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:20:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:20:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:20:20 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:20:20 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:20:20 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 07:20:20 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 07:20:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD HANDOVER
2025-03-30 07:20:20 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:20:20 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:20:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:20:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:20:20 [DEBUG] clck_gen.py:128 IND CLOCK 306
2025-03-30 07:20:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:20:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:20:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:20:20 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:20:20 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:20:20 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:20:20 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:20:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:20:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:20:20 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:20:20 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:20:20 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 07:20:20 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 07:20:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD HANDOVER
2025-03-30 07:20:20 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:20:20 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:20:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:20:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:20:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:20:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:20:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:20:20 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:20:20 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:20:20 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:20:20 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:20:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:20:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:20:20 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:20:20 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:20:20 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 07:20:20 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 07:20:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD HANDOVER
2025-03-30 07:20:20 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.26.22:6700) Recv SETFH cmd
2025-03-30 07:20:20 [INFO] transceiver.py:237 (MS@172.18.26.22:6700) Frequency hopping configured: hsn=2, maio=0, ma_len=2
2025-03-30 07:20:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:20:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:20:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:20:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:20:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:20:20 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:20:20 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:20:20 [INFO] transceiver.py:241 (MS@172.18.26.22:6700) Frequency hopping disabled
2025-03-30 07:20:20 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:20:20 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:20:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:20:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:20:20 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:20:20 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:20:20 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 07:20:20 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 07:20:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD HANDOVER
2025-03-30 07:20:20 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.26.22:6700) Recv SETFH cmd
2025-03-30 07:20:20 [INFO] transceiver.py:237 (MS@172.18.26.22:6700) Frequency hopping configured: hsn=3, maio=3, ma_len=4
2025-03-30 07:20:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:20:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:20:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:20:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:20:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:20:20 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:20:20 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:20:20 [INFO] transceiver.py:241 (MS@172.18.26.22:6700) Frequency hopping disabled
2025-03-30 07:20:20 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:20:20 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:20:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:20:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:20:20 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:20:20 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:20:20 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 07:20:20 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 07:20:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:20:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD HANDOVER
2025-03-30 07:20:20 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:20:20 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:20:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:20:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:20:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:20:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:20:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:20:20 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:20:20 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:20:20 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:20:20 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:20:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:20:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:20:20 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:20:20 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:20:20 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 07:20:20 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 07:20:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD HANDOVER
2025-03-30 07:20:20 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:20:20 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:20:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:20:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:20:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:20:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:20:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:20:20 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:20:20 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:20:20 [DEBUG] clck_gen.py:128 IND CLOCK 408
2025-03-30 07:20:20 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:20:20 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:20:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:20:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:20:20 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:20:20 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:20:20 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 07:20:20 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 07:20:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:20:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD HANDOVER
2025-03-30 07:20:20 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:20:20 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:20:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:20:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:20:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:20:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:20:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:20:20 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:20:20 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:20:20 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:20:20 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:20:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:20:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:20:20 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:20:20 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:20:20 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 07:20:20 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 07:20:20 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:20:20 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:20:20 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:20:20 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:20:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD HANDOVER
2025-03-30 07:20:20 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.26.22:6700) Recv SETFH cmd
2025-03-30 07:20:20 [INFO] transceiver.py:237 (MS@172.18.26.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2025-03-30 07:20:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:20:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:20:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:20:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:20:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:20:20 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:20:20 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:20:20 [INFO] transceiver.py:241 (MS@172.18.26.22:6700) Frequency hopping disabled
2025-03-30 07:20:20 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:20:20 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:20:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:20:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:20:20 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:20:20 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:20:20 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 07:20:20 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 07:20:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD HANDOVER
2025-03-30 07:20:21 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.26.22:6700) Recv SETFH cmd
2025-03-30 07:20:21 [INFO] transceiver.py:237 (MS@172.18.26.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2025-03-30 07:20:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:20:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:20:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:20:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:20:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:20:21 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:20:21 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:20:21 [INFO] transceiver.py:241 (MS@172.18.26.22:6700) Frequency hopping disabled
2025-03-30 07:20:21 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:20:21 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:20:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:20:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:20:21 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:20:21 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:20:21 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 07:20:21 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 07:20:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD HANDOVER
2025-03-30 07:20:21 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.26.22:6700) Recv SETFH cmd
2025-03-30 07:20:21 [INFO] transceiver.py:237 (MS@172.18.26.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2025-03-30 07:20:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:20:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:20:21 [DEBUG] clck_gen.py:128 IND CLOCK 510
2025-03-30 07:20:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:20:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:20:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:20:21 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:20:21 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:20:21 [INFO] transceiver.py:241 (MS@172.18.26.22:6700) Frequency hopping disabled
2025-03-30 07:20:21 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:20:21 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:20:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:20:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:20:21 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:20:21 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:20:21 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 07:20:21 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 07:20:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD HANDOVER
2025-03-30 07:20:21 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.26.22:6700) Recv SETFH cmd
2025-03-30 07:20:21 [INFO] transceiver.py:237 (MS@172.18.26.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2025-03-30 07:20:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:20:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:20:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:20:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:20:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:20:21 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:20:21 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:20:21 [INFO] transceiver.py:241 (MS@172.18.26.22:6700) Frequency hopping disabled
2025-03-30 07:20:21 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:20:21 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:20:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:20:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:20:21 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:20:21 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:20:21 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 07:20:21 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 07:20:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD HANDOVER
2025-03-30 07:20:21 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.26.22:6700) Recv SETFH cmd
2025-03-30 07:20:21 [INFO] transceiver.py:237 (MS@172.18.26.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2025-03-30 07:20:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:20:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:20:21 [DEBUG] clck_gen.py:128 IND CLOCK 612
2025-03-30 07:20:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:20:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:20:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:20:21 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:20:21 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:20:21 [INFO] transceiver.py:241 (MS@172.18.26.22:6700) Frequency hopping disabled
2025-03-30 07:20:21 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:20:21 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:20:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:20:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:20:21 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:20:21 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:20:21 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 07:20:21 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 07:20:21 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:20:21 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:20:21 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:20:21 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:20:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD HANDOVER
2025-03-30 07:20:21 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.26.22:6700) Recv SETFH cmd
2025-03-30 07:20:21 [INFO] transceiver.py:237 (MS@172.18.26.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2025-03-30 07:20:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:20:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:20:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:20:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:20:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:20:22 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:20:22 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:20:22 [INFO] transceiver.py:241 (MS@172.18.26.22:6700) Frequency hopping disabled
2025-03-30 07:20:22 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:20:22 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:20:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:20:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:20:22 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:20:22 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:20:22 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 07:20:22 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 07:20:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD HANDOVER
2025-03-30 07:20:22 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.26.22:6700) Recv SETFH cmd
2025-03-30 07:20:22 [INFO] transceiver.py:237 (MS@172.18.26.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2025-03-30 07:20:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:20:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:20:22 [DEBUG] clck_gen.py:128 IND CLOCK 714
2025-03-30 07:20:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:20:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:20:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:20:22 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:20:22 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:20:22 [INFO] transceiver.py:241 (MS@172.18.26.22:6700) Frequency hopping disabled
2025-03-30 07:20:22 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:20:22 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:20:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:20:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:20:22 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:20:22 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:20:22 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 07:20:22 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 07:20:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD HANDOVER
2025-03-30 07:20:22 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.26.22:6700) Recv SETFH cmd
2025-03-30 07:20:22 [INFO] transceiver.py:237 (MS@172.18.26.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2025-03-30 07:20:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:20:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:20:22 [DEBUG] clck_gen.py:128 IND CLOCK 816
2025-03-30 07:20:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:20:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:20:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:20:22 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:20:22 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:20:22 [INFO] transceiver.py:241 (MS@172.18.26.22:6700) Frequency hopping disabled
2025-03-30 07:20:22 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:20:22 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:20:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:20:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:20:22 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:20:22 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:20:22 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 07:20:22 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 07:20:22 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:20:22 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:20:22 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:20:22 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:20:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD HANDOVER
2025-03-30 07:20:22 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.26.22:6700) Recv SETFH cmd
2025-03-30 07:20:22 [INFO] transceiver.py:237 (MS@172.18.26.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2025-03-30 07:20:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:20:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:20:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:20:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:20:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:20:23 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:20:23 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:20:23 [INFO] transceiver.py:241 (MS@172.18.26.22:6700) Frequency hopping disabled
2025-03-30 07:20:23 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:20:23 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:20:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:20:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:20:23 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:20:23 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:20:23 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 07:20:23 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 07:20:23 [DEBUG] clck_gen.py:128 IND CLOCK 918
2025-03-30 07:20:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD HANDOVER
2025-03-30 07:20:23 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.26.22:6700) Recv SETFH cmd
2025-03-30 07:20:23 [INFO] transceiver.py:237 (MS@172.18.26.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2025-03-30 07:20:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:20:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:20:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:20:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:20:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:20:23 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:20:23 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:20:23 [INFO] transceiver.py:241 (MS@172.18.26.22:6700) Frequency hopping disabled
2025-03-30 07:20:23 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:20:23 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:20:23 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:20:23 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:20:23 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:20:23 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:20:23 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:20:23 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:20:23 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 07:20:23 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 07:20:23 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 07:20:23 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=969 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:20:23 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=969 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:20:23 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=969 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:20:23 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=969 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:20:23 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=969 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:20:23 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=969 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:20:28 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 07:20:28 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 07:20:28 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:20:28 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:20:28 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:20:28 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:20:28 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:20:28 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 07:20:28 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:20:28 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 07:20:28 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 07:20:28 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 07:20:28 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 07:20:28 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 07:20:28 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:20:28 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:20:28 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 07:20:28 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 07:20:28 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 07:20:28 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 07:20:28 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 07:20:28 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 07:20:28 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:20:28 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:20:28 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 07:20:28 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 07:20:28 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 07:20:28 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 07:20:28 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 07:20:28 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 07:20:28 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:20:28 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:20:28 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 07:20:28 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 07:20:28 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 07:20:28 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 07:20:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 07:20:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 07:20:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 07:20:28 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 07:20:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 07:20:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 07:20:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 07:20:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:20:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 07:20:28 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 07:20:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:20:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:20:28 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 07:20:28 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 07:20:28 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 07:20:28 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 07:20:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:20:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:20:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:20:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 07:20:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:20:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:20:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:20:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:20:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:20:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:20:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:20:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:20:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:20:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:20:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:20:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:20:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:20:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:20:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:20:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:20:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:20:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:20:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:20:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:20:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:20:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:20:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:20:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:20:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:20:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:20:28 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-03-30 07:20:28 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-03-30 07:20:28 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-03-30 07:20:28 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-03-30 07:20:28 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-03-30 07:20:28 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-03-30 07:20:28 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-03-30 07:20:28 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-03-30 07:20:28 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-03-30 07:20:28 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-03-30 07:20:28 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=0 bl=148 pwr=0
2025-03-30 07:20:28 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=1 bl=148 pwr=0
2025-03-30 07:20:28 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=2 bl=148 pwr=0
2025-03-30 07:20:28 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=3 bl=148 pwr=0
2025-03-30 07:20:28 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=4 bl=148 pwr=0
2025-03-30 07:20:28 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=5 bl=148 pwr=0
2025-03-30 07:20:28 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=6 bl=148 pwr=0
2025-03-30 07:20:28 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=7 bl=148 pwr=0
2025-03-30 07:20:28 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 07:20:28 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 07:20:28 [DEBUG] fake_trx.py:317 (BTS@172.18.26.20:5700) Recv FAKE_CI cmd
2025-03-30 07:20:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:20:28 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:20:28 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:20:28 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:20:28 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:20:28 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:20:28 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:20:28 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 07:20:28 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 07:20:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD HANDOVER
2025-03-30 07:20:28 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:20:28 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:20:28 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:20:28 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:20:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:20:29 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-03-30 07:20:29 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:20:29 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:20:29 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:20:29 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:20:29 [DEBUG] clck_gen.py:128 IND CLOCK 306
2025-03-30 07:20:30 [DEBUG] clck_gen.py:128 IND CLOCK 408
2025-03-30 07:20:30 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:20:30 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:20:30 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:20:30 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:20:30 [DEBUG] clck_gen.py:128 IND CLOCK 510
2025-03-30 07:20:31 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:20:31 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:20:31 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:20:31 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:20:31 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:20:31 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:20:31 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 07:20:31 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 07:20:31 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:20:31 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:20:31 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:20:31 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:20:31 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 07:20:36 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 07:20:36 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 07:20:36 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:20:36 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:20:36 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:20:36 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:20:36 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:20:36 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 07:20:36 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:20:36 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 07:20:36 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 07:20:36 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 07:20:36 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 07:20:36 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 07:20:36 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:20:36 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:20:36 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 07:20:36 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 07:20:36 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 07:20:36 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 07:20:36 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 07:20:36 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 07:20:36 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:20:36 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:20:36 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 07:20:36 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 07:20:36 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 07:20:36 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 07:20:36 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 07:20:36 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 07:20:36 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:20:36 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:20:36 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 07:20:36 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 07:20:36 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 07:20:36 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 07:20:36 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 07:20:36 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 07:20:36 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 07:20:36 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 07:20:36 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 07:20:36 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 07:20:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 07:20:36 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:20:36 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 07:20:36 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 07:20:36 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:20:36 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:20:36 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 07:20:36 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 07:20:36 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 07:20:36 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 07:20:36 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:20:36 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:20:36 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:20:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 07:20:36 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:20:36 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:20:36 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:20:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:20:36 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:20:36 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:20:36 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:20:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:20:36 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:20:36 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:20:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:20:36 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:20:36 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:20:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:20:36 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:20:36 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:20:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:20:36 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:20:36 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:20:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:20:36 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:20:36 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:20:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:20:36 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:20:36 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:20:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:20:36 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:20:36 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:20:36 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:20:36 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:20:36 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 07:20:36 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 07:20:36 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 07:20:41 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 07:20:41 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 07:20:41 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:20:41 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:20:41 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:20:41 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:20:41 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:20:41 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 07:20:41 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:20:41 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 07:20:41 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 07:20:41 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 07:20:41 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 07:20:41 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 07:20:41 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:20:41 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:20:41 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 07:20:41 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 07:20:41 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 07:20:41 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 07:20:41 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 07:20:41 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 07:20:41 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:20:41 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:20:41 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 07:20:41 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 07:20:41 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 07:20:41 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 07:20:41 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 07:20:41 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 07:20:41 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:20:41 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:20:41 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 07:20:41 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 07:20:41 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 07:20:41 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 07:20:41 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 07:20:41 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 07:20:41 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 07:20:41 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 07:20:41 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 07:20:41 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 07:20:41 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 07:20:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 07:20:41 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:20:41 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:20:41 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 07:20:41 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:20:41 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:20:41 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:20:41 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 07:20:41 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 07:20:41 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 07:20:41 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 07:20:41 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:20:41 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:20:41 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:20:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 07:20:41 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:20:41 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:20:41 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:20:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:20:41 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:20:41 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:20:41 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:20:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:20:41 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:20:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:20:41 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:20:41 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:20:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:20:41 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:20:41 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:20:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:20:41 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:20:41 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:20:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:20:41 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:20:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:20:41 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:20:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:20:41 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:20:41 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-03-30 07:20:41 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-03-30 07:20:41 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-03-30 07:20:41 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-03-30 07:20:41 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-03-30 07:20:41 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-03-30 07:20:41 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-03-30 07:20:41 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-03-30 07:20:41 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-03-30 07:20:41 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-03-30 07:20:41 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=0 bl=148 pwr=0
2025-03-30 07:20:41 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=1 bl=148 pwr=0
2025-03-30 07:20:41 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=2 bl=148 pwr=0
2025-03-30 07:20:41 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=3 bl=148 pwr=0
2025-03-30 07:20:41 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=4 bl=148 pwr=0
2025-03-30 07:20:41 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=5 bl=148 pwr=0
2025-03-30 07:20:41 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=6 bl=148 pwr=0
2025-03-30 07:20:41 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=7 bl=148 pwr=0
2025-03-30 07:20:41 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 07:20:41 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 07:20:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:20:41 [DEBUG] fake_trx.py:317 (BTS@172.18.26.20:5700) Recv FAKE_CI cmd
2025-03-30 07:20:42 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-03-30 07:20:42 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:20:42 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:20:42 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:20:42 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:20:42 [DEBUG] clck_gen.py:128 IND CLOCK 306
2025-03-30 07:20:43 [DEBUG] clck_gen.py:128 IND CLOCK 408
2025-03-30 07:20:43 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:20:43 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:20:43 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:20:43 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:20:43 [DEBUG] clck_gen.py:128 IND CLOCK 510
2025-03-30 07:20:43 [DEBUG] clck_gen.py:128 IND CLOCK 612
2025-03-30 07:20:44 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:20:44 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:20:44 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:20:44 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:20:44 [DEBUG] clck_gen.py:128 IND CLOCK 714
2025-03-30 07:20:44 [DEBUG] clck_gen.py:128 IND CLOCK 816
2025-03-30 07:20:45 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:20:45 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:20:45 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:20:45 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:20:45 [DEBUG] clck_gen.py:128 IND CLOCK 918
2025-03-30 07:20:45 [DEBUG] clck_gen.py:128 IND CLOCK 1020
2025-03-30 07:20:46 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:20:46 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:20:46 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:20:46 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:20:46 [DEBUG] clck_gen.py:128 IND CLOCK 1122
2025-03-30 07:20:46 [DEBUG] clck_gen.py:128 IND CLOCK 1224
2025-03-30 07:20:47 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:20:47 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:20:47 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:20:47 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:20:47 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:20:47 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 07:20:47 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 07:20:47 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 07:20:47 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=1306 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:20:47 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:20:47 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:20:47 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:20:52 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 07:20:52 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 07:20:52 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:20:52 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:20:52 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:20:52 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:20:52 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:20:52 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 07:20:52 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:20:52 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 07:20:52 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 07:20:52 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 07:20:52 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 07:20:52 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 07:20:52 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:20:52 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:20:52 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 07:20:52 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 07:20:52 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 07:20:52 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 07:20:52 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 07:20:52 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 07:20:52 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:20:52 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:20:52 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 07:20:52 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 07:20:52 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 07:20:52 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 07:20:52 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 07:20:52 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 07:20:52 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:20:52 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:20:52 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 07:20:52 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 07:20:52 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 07:20:52 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 07:20:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 07:20:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 07:20:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 07:20:52 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 07:20:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 07:20:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 07:20:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 07:20:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 07:20:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:20:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:20:52 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 07:20:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:20:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:20:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:20:52 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 07:20:52 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 07:20:52 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 07:20:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:20:52 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 07:20:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:20:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:20:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 07:20:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:20:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:20:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:20:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:20:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:20:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:20:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:20:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:20:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:20:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:20:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:20:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:20:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:20:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:20:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:20:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:20:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:20:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:20:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:20:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:20:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:20:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:20:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:20:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:20:52 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-03-30 07:20:52 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-03-30 07:20:52 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-03-30 07:20:52 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-03-30 07:20:52 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-03-30 07:20:52 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-03-30 07:20:52 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-03-30 07:20:52 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-03-30 07:20:52 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-03-30 07:20:52 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-03-30 07:20:52 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=0 bl=148 pwr=0
2025-03-30 07:20:52 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=1 bl=148 pwr=0
2025-03-30 07:20:52 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=2 bl=148 pwr=0
2025-03-30 07:20:52 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=3 bl=148 pwr=0
2025-03-30 07:20:52 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=4 bl=148 pwr=0
2025-03-30 07:20:52 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=5 bl=148 pwr=0
2025-03-30 07:20:52 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=6 bl=148 pwr=0
2025-03-30 07:20:52 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=7 bl=148 pwr=0
2025-03-30 07:20:52 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 07:20:52 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 07:20:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:20:52 [DEBUG] fake_trx.py:317 (BTS@172.18.26.20:5700) Recv FAKE_CI cmd
2025-03-30 07:20:53 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-03-30 07:20:53 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:20:53 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:20:53 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:20:53 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:20:53 [DEBUG] clck_gen.py:128 IND CLOCK 306
2025-03-30 07:20:54 [DEBUG] clck_gen.py:128 IND CLOCK 408
2025-03-30 07:20:54 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:20:54 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:20:54 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:20:54 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:20:54 [DEBUG] clck_gen.py:128 IND CLOCK 510
2025-03-30 07:20:55 [DEBUG] clck_gen.py:128 IND CLOCK 612
2025-03-30 07:20:55 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:20:55 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:20:55 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:20:55 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:20:55 [DEBUG] clck_gen.py:128 IND CLOCK 714
2025-03-30 07:20:55 [DEBUG] clck_gen.py:128 IND CLOCK 816
2025-03-30 07:20:56 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:20:56 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:20:56 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:20:56 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:20:56 [DEBUG] clck_gen.py:128 IND CLOCK 918
2025-03-30 07:20:56 [DEBUG] clck_gen.py:128 IND CLOCK 1020
2025-03-30 07:20:57 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:20:57 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:20:57 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:20:57 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:20:57 [DEBUG] clck_gen.py:128 IND CLOCK 1122
2025-03-30 07:20:57 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:20:57 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:20:57 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:20:57 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:20:57 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:20:57 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:20:57 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:20:57 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 07:20:57 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 07:20:57 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 07:20:57 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:20:57 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=1204 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:20:57 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=1204 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:20:57 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=1204 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:20:57 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=1204 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:20:57 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=1204 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:20:57 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=1204 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:20:57 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=1204 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:20:57 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=1204 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:21:02 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 07:21:02 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 07:21:02 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:21:02 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:21:02 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:21:02 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:21:02 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:21:02 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 07:21:02 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:21:02 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 07:21:02 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 07:21:02 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 07:21:02 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 07:21:02 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 07:21:02 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:21:02 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:21:02 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 07:21:02 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 07:21:02 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 07:21:02 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 07:21:02 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 07:21:02 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 07:21:02 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:21:02 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:21:02 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 07:21:02 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 07:21:02 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 07:21:02 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 07:21:02 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 07:21:02 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 07:21:02 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:21:02 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:21:02 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 07:21:02 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 07:21:02 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 07:21:02 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 07:21:02 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 07:21:02 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 07:21:02 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 07:21:02 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 07:21:02 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 07:21:02 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 07:21:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 07:21:02 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:21:02 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 07:21:02 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 07:21:02 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:21:02 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:21:02 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 07:21:02 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 07:21:02 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 07:21:02 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 07:21:02 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:21:02 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:21:02 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:21:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 07:21:02 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:21:02 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:21:02 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:21:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:21:02 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:21:02 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:21:02 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:21:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:21:02 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:21:02 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:21:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:21:02 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:21:02 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:21:02 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:21:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:21:02 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:21:02 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:21:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:21:02 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:21:02 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:21:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:21:02 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:21:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:21:02 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:21:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:21:02 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:21:02 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:21:02 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:21:02 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 07:21:02 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 07:21:02 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 07:21:02 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:21:07 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 07:21:07 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 07:21:07 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:21:07 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:21:07 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:21:07 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:21:07 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:21:07 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 07:21:07 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:21:07 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 07:21:07 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 07:21:07 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 07:21:07 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 07:21:07 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 07:21:07 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:21:07 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:21:07 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 07:21:07 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 07:21:07 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 07:21:07 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 07:21:07 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 07:21:07 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 07:21:07 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:21:07 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:21:07 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 07:21:07 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 07:21:07 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 07:21:07 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 07:21:07 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 07:21:07 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 07:21:07 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:21:07 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:21:07 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 07:21:07 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 07:21:07 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 07:21:07 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 07:21:07 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 07:21:07 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 07:21:07 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 07:21:07 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 07:21:07 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 07:21:07 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 07:21:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 07:21:07 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:21:07 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 07:21:07 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 07:21:07 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:21:07 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:21:07 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 07:21:07 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 07:21:07 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 07:21:07 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:21:07 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 07:21:07 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:21:07 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:21:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 07:21:07 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:21:07 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:21:07 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:21:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:21:07 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:21:07 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:21:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:21:07 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:21:07 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:21:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:21:07 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:21:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:21:07 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:21:07 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:21:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:21:07 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:21:07 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:21:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:21:07 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:21:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:21:07 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:21:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:21:07 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:21:07 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:21:07 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:21:07 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:21:07 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-03-30 07:21:08 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-03-30 07:21:08 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-03-30 07:21:08 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-03-30 07:21:08 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-03-30 07:21:08 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-03-30 07:21:08 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-03-30 07:21:08 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-03-30 07:21:08 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-03-30 07:21:08 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-03-30 07:21:08 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=0 bl=148 pwr=0
2025-03-30 07:21:08 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=1 bl=148 pwr=0
2025-03-30 07:21:08 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=2 bl=148 pwr=0
2025-03-30 07:21:08 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=3 bl=148 pwr=0
2025-03-30 07:21:08 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=4 bl=148 pwr=0
2025-03-30 07:21:08 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=5 bl=148 pwr=0
2025-03-30 07:21:08 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=6 bl=148 pwr=0
2025-03-30 07:21:08 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=7 bl=148 pwr=0
2025-03-30 07:21:08 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 07:21:08 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 07:21:08 [DEBUG] fake_trx.py:317 (BTS@172.18.26.20:5700) Recv FAKE_CI cmd
2025-03-30 07:21:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:21:08 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:21:08 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:21:08 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:21:08 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-03-30 07:21:08 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:21:08 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:21:08 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:21:08 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:21:09 [DEBUG] clck_gen.py:128 IND CLOCK 306
2025-03-30 07:21:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:21:09 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:21:09 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:21:09 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 07:21:09 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 07:21:09 [DEBUG] clck_gen.py:128 IND CLOCK 408
2025-03-30 07:21:09 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:21:09 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:21:09 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:21:09 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:21:10 [DEBUG] clck_gen.py:128 IND CLOCK 510
2025-03-30 07:21:10 [DEBUG] clck_gen.py:128 IND CLOCK 612
2025-03-30 07:21:10 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:21:10 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:21:10 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:21:10 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:21:11 [DEBUG] clck_gen.py:128 IND CLOCK 714
2025-03-30 07:21:11 [DEBUG] clck_gen.py:128 IND CLOCK 816
2025-03-30 07:21:11 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:21:11 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:21:11 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:21:11 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:21:12 [DEBUG] clck_gen.py:128 IND CLOCK 918
2025-03-30 07:21:12 [DEBUG] clck_gen.py:128 IND CLOCK 1020
2025-03-30 07:21:12 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:21:12 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:21:12 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:21:12 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:21:12 [DEBUG] clck_gen.py:128 IND CLOCK 1122
2025-03-30 07:21:13 [DEBUG] clck_gen.py:128 IND CLOCK 1224
2025-03-30 07:21:13 [DEBUG] clck_gen.py:128 IND CLOCK 1326
2025-03-30 07:21:14 [DEBUG] clck_gen.py:128 IND CLOCK 1428
2025-03-30 07:21:14 [DEBUG] clck_gen.py:128 IND CLOCK 1530
2025-03-30 07:21:15 [DEBUG] clck_gen.py:128 IND CLOCK 1632
2025-03-30 07:21:15 [DEBUG] clck_gen.py:128 IND CLOCK 1734
2025-03-30 07:21:16 [DEBUG] clck_gen.py:128 IND CLOCK 1836
2025-03-30 07:21:16 [DEBUG] clck_gen.py:128 IND CLOCK 1938
2025-03-30 07:21:17 [DEBUG] clck_gen.py:128 IND CLOCK 2040
2025-03-30 07:21:17 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=2111): ver=1 fn=2109 tn=0 bl=148 pwr=0
2025-03-30 07:21:17 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=2111): ver=1 fn=2109 tn=1 bl=148 pwr=0
2025-03-30 07:21:17 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=2111): ver=1 fn=2109 tn=2 bl=148 pwr=0
2025-03-30 07:21:17 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=2111): ver=1 fn=2109 tn=3 bl=148 pwr=0
2025-03-30 07:21:17 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=2111): ver=1 fn=2109 tn=4 bl=148 pwr=0
2025-03-30 07:21:17 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=2111): ver=1 fn=2109 tn=5 bl=148 pwr=0
2025-03-30 07:21:17 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=2111): ver=1 fn=2109 tn=6 bl=148 pwr=0
2025-03-30 07:21:17 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=2111): ver=1 fn=2109 tn=7 bl=148 pwr=0
2025-03-30 07:21:17 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=2111): ver=1 fn=2110 tn=0 bl=148 pwr=0
2025-03-30 07:21:17 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=2111): ver=1 fn=2110 tn=1 bl=148 pwr=0
2025-03-30 07:21:17 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=2111): ver=1 fn=2110 tn=2 bl=148 pwr=0
2025-03-30 07:21:17 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=2111): ver=1 fn=2110 tn=3 bl=148 pwr=0
2025-03-30 07:21:17 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=2111): ver=1 fn=2110 tn=4 bl=148 pwr=0
2025-03-30 07:21:17 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=2111): ver=1 fn=2110 tn=5 bl=148 pwr=0
2025-03-30 07:21:17 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=2111): ver=1 fn=2110 tn=6 bl=148 pwr=0
2025-03-30 07:21:17 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=2111): ver=1 fn=2110 tn=7 bl=148 pwr=0
2025-03-30 07:21:17 [DEBUG] clck_gen.py:128 IND CLOCK 2142
2025-03-30 07:21:18 [DEBUG] clck_gen.py:128 IND CLOCK 2244
2025-03-30 07:21:18 [DEBUG] clck_gen.py:128 IND CLOCK 2346
2025-03-30 07:21:19 [DEBUG] clck_gen.py:128 IND CLOCK 2448
2025-03-30 07:21:19 [DEBUG] clck_gen.py:128 IND CLOCK 2550
2025-03-30 07:21:20 [DEBUG] clck_gen.py:128 IND CLOCK 2652
2025-03-30 07:21:20 [DEBUG] clck_gen.py:128 IND CLOCK 2754
2025-03-30 07:21:20 [DEBUG] clck_gen.py:128 IND CLOCK 2856
2025-03-30 07:21:21 [DEBUG] clck_gen.py:128 IND CLOCK 2958
2025-03-30 07:21:21 [DEBUG] clck_gen.py:128 IND CLOCK 3060
2025-03-30 07:21:22 [DEBUG] clck_gen.py:128 IND CLOCK 3162
2025-03-30 07:21:22 [DEBUG] clck_gen.py:128 IND CLOCK 3264
2025-03-30 07:21:23 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:21:23 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:21:23 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:21:23 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:21:23 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:21:23 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:21:23 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:21:23 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:21:23 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:21:23 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:21:23 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 07:21:23 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 07:21:23 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 07:21:28 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 07:21:28 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 07:21:28 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:21:28 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:21:28 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:21:28 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:21:28 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:21:28 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 07:21:28 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:21:28 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 07:21:28 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 07:21:28 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 07:21:28 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 07:21:28 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 07:21:28 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:21:28 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:21:28 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 07:21:28 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 07:21:28 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 07:21:28 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 07:21:28 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 07:21:28 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 07:21:28 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:21:28 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:21:28 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 07:21:28 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 07:21:28 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 07:21:28 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 07:21:28 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 07:21:28 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 07:21:28 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:21:28 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:21:28 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 07:21:28 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 07:21:28 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 07:21:28 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 07:21:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 07:21:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 07:21:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 07:21:28 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 07:21:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 07:21:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 07:21:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 07:21:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:21:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:21:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 07:21:28 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 07:21:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:21:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:21:28 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 07:21:28 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 07:21:28 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 07:21:28 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 07:21:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:21:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:21:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:21:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 07:21:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:21:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:21:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:21:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:21:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:21:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:21:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:21:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:21:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:21:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:21:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:21:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:21:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:21:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:21:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:21:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:21:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:21:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:21:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:21:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:21:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:21:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:21:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:21:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:21:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:21:28 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-03-30 07:21:28 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-03-30 07:21:28 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-03-30 07:21:28 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-03-30 07:21:28 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-03-30 07:21:28 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-03-30 07:21:28 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-03-30 07:21:28 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-03-30 07:21:28 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-03-30 07:21:28 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-03-30 07:21:28 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=0 bl=148 pwr=0
2025-03-30 07:21:28 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=1 bl=148 pwr=0
2025-03-30 07:21:28 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=2 bl=148 pwr=0
2025-03-30 07:21:28 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=3 bl=148 pwr=0
2025-03-30 07:21:28 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=4 bl=148 pwr=0
2025-03-30 07:21:28 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=5 bl=148 pwr=0
2025-03-30 07:21:28 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=6 bl=148 pwr=0
2025-03-30 07:21:28 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=7 bl=148 pwr=0
2025-03-30 07:21:28 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 07:21:28 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 07:21:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:21:28 [DEBUG] fake_trx.py:317 (BTS@172.18.26.20:5700) Recv FAKE_CI cmd
2025-03-30 07:21:28 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:21:28 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:21:28 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:21:28 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:21:28 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:21:28 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:21:28 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 07:21:28 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 07:21:28 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 07:21:28 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 07:21:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:21:28 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:21:28 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:21:28 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:21:28 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:21:29 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-03-30 07:21:29 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:21:29 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:21:29 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:21:29 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:21:29 [DEBUG] clck_gen.py:128 IND CLOCK 306
2025-03-30 07:21:29 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:21:29 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:21:29 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:21:29 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:21:29 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:21:29 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:21:29 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:21:29 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:21:29 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 07:21:29 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 07:21:29 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 07:21:29 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:21:29 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:21:34 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 07:21:34 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 07:21:34 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:21:34 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:21:34 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:21:34 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:21:34 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:21:34 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 07:21:34 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:21:34 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 07:21:34 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 07:21:34 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 07:21:34 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 07:21:34 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 07:21:34 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:21:34 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:21:34 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 07:21:34 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 07:21:34 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 07:21:34 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 07:21:34 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 07:21:34 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 07:21:34 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:21:34 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:21:34 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 07:21:34 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 07:21:34 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 07:21:34 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 07:21:34 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 07:21:34 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 07:21:34 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:21:34 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:21:34 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 07:21:34 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 07:21:34 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 07:21:34 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 07:21:34 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 07:21:34 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 07:21:34 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 07:21:34 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 07:21:34 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 07:21:34 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 07:21:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 07:21:34 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:21:34 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 07:21:34 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 07:21:34 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:21:34 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:21:34 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 07:21:34 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 07:21:34 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 07:21:34 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 07:21:34 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:21:34 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:21:34 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:21:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 07:21:34 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:21:34 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:21:34 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:21:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:21:34 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:21:34 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:21:34 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:21:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:21:34 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:21:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:21:34 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:21:34 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:21:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:21:34 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:21:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:21:34 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:21:34 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:21:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:21:34 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:21:34 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:21:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:21:34 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:21:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:21:34 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:21:34 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:21:34 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:21:34 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-03-30 07:21:35 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-03-30 07:21:35 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-03-30 07:21:35 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-03-30 07:21:35 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-03-30 07:21:35 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-03-30 07:21:35 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-03-30 07:21:35 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-03-30 07:21:35 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-03-30 07:21:35 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-03-30 07:21:35 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=0 bl=148 pwr=0
2025-03-30 07:21:35 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=1 bl=148 pwr=0
2025-03-30 07:21:35 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=2 bl=148 pwr=0
2025-03-30 07:21:35 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=3 bl=148 pwr=0
2025-03-30 07:21:35 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=4 bl=148 pwr=0
2025-03-30 07:21:35 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=5 bl=148 pwr=0
2025-03-30 07:21:35 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=6 bl=148 pwr=0
2025-03-30 07:21:35 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=7 bl=148 pwr=0
2025-03-30 07:21:35 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 07:21:35 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 07:21:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:21:35 [DEBUG] fake_trx.py:317 (BTS@172.18.26.20:5700) Recv FAKE_CI cmd
2025-03-30 07:21:35 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:21:35 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:21:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:21:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:21:35 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:21:35 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:21:35 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 07:21:35 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 07:21:35 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 07:21:35 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 07:21:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:21:35 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:21:35 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:21:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:21:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:21:35 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-03-30 07:21:35 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:21:35 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:21:35 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:21:35 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:21:36 [DEBUG] clck_gen.py:128 IND CLOCK 306
2025-03-30 07:21:36 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:21:36 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:21:36 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:21:36 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:21:36 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:21:36 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:21:36 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:21:36 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:21:36 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:21:36 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:21:36 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 07:21:36 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 07:21:36 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 07:21:41 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 07:21:41 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 07:21:41 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:21:41 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:21:41 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:21:41 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:21:41 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:21:41 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 07:21:41 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:21:41 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 07:21:41 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 07:21:41 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 07:21:41 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 07:21:41 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 07:21:41 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:21:41 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:21:41 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 07:21:41 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 07:21:41 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 07:21:41 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 07:21:41 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 07:21:41 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 07:21:41 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:21:41 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:21:41 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 07:21:41 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 07:21:41 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 07:21:41 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 07:21:41 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 07:21:41 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 07:21:41 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:21:41 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:21:41 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 07:21:41 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 07:21:41 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 07:21:41 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 07:21:41 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 07:21:41 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 07:21:41 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 07:21:41 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 07:21:41 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 07:21:41 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 07:21:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 07:21:41 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:21:41 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 07:21:41 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 07:21:41 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:21:41 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:21:41 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 07:21:41 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 07:21:41 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 07:21:41 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 07:21:41 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:21:41 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:21:41 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:21:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 07:21:41 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:21:41 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:21:41 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:21:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:21:41 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:21:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:21:41 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:21:41 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:21:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:21:41 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:21:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:21:41 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:21:41 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:21:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:21:41 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:21:41 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:21:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:21:41 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:21:41 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:21:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:21:41 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:21:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:21:41 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:21:41 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:21:41 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:21:41 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:21:41 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-03-30 07:21:41 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-03-30 07:21:41 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-03-30 07:21:41 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-03-30 07:21:41 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-03-30 07:21:41 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-03-30 07:21:41 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-03-30 07:21:41 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-03-30 07:21:41 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-03-30 07:21:41 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-03-30 07:21:41 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=0 bl=148 pwr=0
2025-03-30 07:21:41 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=1 bl=148 pwr=0
2025-03-30 07:21:41 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=2 bl=148 pwr=0
2025-03-30 07:21:41 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=3 bl=148 pwr=0
2025-03-30 07:21:41 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=4 bl=148 pwr=0
2025-03-30 07:21:41 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=5 bl=148 pwr=0
2025-03-30 07:21:41 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=6 bl=148 pwr=0
2025-03-30 07:21:41 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=7 bl=148 pwr=0
2025-03-30 07:21:41 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 07:21:41 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 07:21:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:21:41 [DEBUG] fake_trx.py:317 (BTS@172.18.26.20:5700) Recv FAKE_CI cmd
2025-03-30 07:21:41 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:21:41 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:21:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:21:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:21:41 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:21:41 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:21:41 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 07:21:41 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 07:21:41 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 07:21:41 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 07:21:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:21:41 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.26.22:6700) Recv SETFH cmd
2025-03-30 07:21:41 [INFO] transceiver.py:237 (MS@172.18.26.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2025-03-30 07:21:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:21:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:21:42 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-03-30 07:21:42 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:21:42 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:21:42 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:21:42 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:21:42 [DEBUG] clck_gen.py:128 IND CLOCK 306
2025-03-30 07:21:42 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:21:42 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:21:42 [INFO] transceiver.py:241 (MS@172.18.26.22:6700) Frequency hopping disabled
2025-03-30 07:21:42 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:21:42 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:21:42 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:21:42 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:21:42 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:21:42 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:21:42 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:21:42 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:21:42 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 07:21:42 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 07:21:42 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 07:21:47 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 07:21:47 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 07:21:47 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:21:47 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:21:47 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:21:47 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:21:47 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:21:47 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 07:21:47 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:21:47 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 07:21:47 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 07:21:47 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 07:21:47 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 07:21:47 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 07:21:47 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:21:47 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:21:47 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 07:21:47 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 07:21:47 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 07:21:47 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 07:21:47 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 07:21:47 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 07:21:47 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:21:47 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:21:47 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 07:21:47 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 07:21:47 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 07:21:47 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 07:21:47 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 07:21:47 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 07:21:47 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:21:47 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:21:47 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 07:21:47 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 07:21:47 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 07:21:47 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 07:21:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 07:21:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 07:21:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 07:21:47 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 07:21:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 07:21:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 07:21:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 07:21:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:21:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 07:21:47 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 07:21:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:21:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:21:47 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 07:21:47 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 07:21:47 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 07:21:47 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 07:21:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:21:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:21:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:21:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 07:21:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:21:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:21:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:21:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:21:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:21:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:21:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:21:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:21:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:21:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:21:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:21:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:21:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:21:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:21:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:21:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:21:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:21:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:21:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:21:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:21:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:21:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:21:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:21:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:21:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:21:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:21:47 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-03-30 07:21:48 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-03-30 07:21:48 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-03-30 07:21:48 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-03-30 07:21:48 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-03-30 07:21:48 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-03-30 07:21:48 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-03-30 07:21:48 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-03-30 07:21:48 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-03-30 07:21:48 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-03-30 07:21:48 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=0 bl=148 pwr=0
2025-03-30 07:21:48 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=1 bl=148 pwr=0
2025-03-30 07:21:48 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=2 bl=148 pwr=0
2025-03-30 07:21:48 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=3 bl=148 pwr=0
2025-03-30 07:21:48 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=4 bl=148 pwr=0
2025-03-30 07:21:48 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=5 bl=148 pwr=0
2025-03-30 07:21:48 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=6 bl=148 pwr=0
2025-03-30 07:21:48 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=7 bl=148 pwr=0
2025-03-30 07:21:48 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 07:21:48 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 07:21:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:21:48 [DEBUG] fake_trx.py:317 (BTS@172.18.26.20:5700) Recv FAKE_CI cmd
2025-03-30 07:21:48 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:21:48 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:21:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:21:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:21:48 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:21:48 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:21:48 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 07:21:48 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 07:21:48 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 07:21:48 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 07:21:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:21:48 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.26.22:6700) Recv SETFH cmd
2025-03-30 07:21:48 [INFO] transceiver.py:237 (MS@172.18.26.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2025-03-30 07:21:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:21:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:21:48 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-03-30 07:21:48 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:21:48 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:21:48 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:21:48 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:21:49 [DEBUG] clck_gen.py:128 IND CLOCK 306
2025-03-30 07:21:49 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:21:49 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:21:49 [INFO] transceiver.py:241 (MS@172.18.26.22:6700) Frequency hopping disabled
2025-03-30 07:21:49 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:21:49 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:21:49 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:21:49 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:21:49 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:21:49 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:21:49 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:21:49 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:21:49 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 07:21:49 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 07:21:49 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 07:21:54 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 07:21:54 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 07:21:54 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:21:54 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:21:54 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:21:54 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:21:54 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:21:54 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 07:21:54 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:21:54 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 07:21:54 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 07:21:54 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 07:21:54 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 07:21:54 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 07:21:54 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:21:54 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:21:54 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 07:21:54 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 07:21:54 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 07:21:54 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 07:21:54 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 07:21:54 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 07:21:54 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:21:54 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:21:54 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 07:21:54 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 07:21:54 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 07:21:54 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 07:21:54 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 07:21:54 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 07:21:54 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:21:54 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:21:54 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 07:21:54 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 07:21:54 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 07:21:54 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 07:21:54 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 07:21:54 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 07:21:54 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 07:21:54 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 07:21:54 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 07:21:54 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 07:21:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 07:21:54 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:21:54 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 07:21:54 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 07:21:54 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:21:54 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:21:54 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 07:21:54 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 07:21:54 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 07:21:54 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 07:21:54 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:21:54 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:21:54 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:21:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 07:21:54 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:21:54 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:21:54 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:21:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:21:54 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:21:54 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:21:54 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:21:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:21:54 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:21:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:21:54 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:21:54 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:21:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:21:54 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:21:54 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:21:54 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:21:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:21:54 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:21:54 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:21:54 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:21:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:21:54 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:21:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:21:54 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:21:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:21:54 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:21:54 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-03-30 07:21:54 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-03-30 07:21:54 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-03-30 07:21:54 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-03-30 07:21:54 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-03-30 07:21:54 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-03-30 07:21:54 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-03-30 07:21:54 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-03-30 07:21:54 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-03-30 07:21:54 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-03-30 07:21:54 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=0 bl=148 pwr=0
2025-03-30 07:21:54 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=1 bl=148 pwr=0
2025-03-30 07:21:54 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=2 bl=148 pwr=0
2025-03-30 07:21:54 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=3 bl=148 pwr=0
2025-03-30 07:21:54 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=4 bl=148 pwr=0
2025-03-30 07:21:54 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=5 bl=148 pwr=0
2025-03-30 07:21:54 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=6 bl=148 pwr=0
2025-03-30 07:21:54 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=7 bl=148 pwr=0
2025-03-30 07:21:55 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 07:21:55 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 07:21:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:21:55 [DEBUG] fake_trx.py:317 (BTS@172.18.26.20:5700) Recv FAKE_CI cmd
2025-03-30 07:21:55 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:21:55 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:21:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:21:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:21:55 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:21:55 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:21:55 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 07:21:55 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 07:21:55 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 07:21:55 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 07:21:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:21:55 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.26.22:6700) Recv SETFH cmd
2025-03-30 07:21:55 [INFO] transceiver.py:237 (MS@172.18.26.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2025-03-30 07:21:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:21:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:21:55 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-03-30 07:21:55 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:21:55 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:21:55 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:21:55 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:21:55 [DEBUG] clck_gen.py:128 IND CLOCK 306
2025-03-30 07:21:56 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:21:56 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:21:56 [INFO] transceiver.py:241 (MS@172.18.26.22:6700) Frequency hopping disabled
2025-03-30 07:21:56 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:21:56 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:21:56 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:21:56 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:21:56 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:21:56 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:21:56 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:21:56 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:21:56 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 07:21:56 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 07:21:56 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 07:22:01 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 07:22:01 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 07:22:01 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:22:01 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:22:01 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:22:01 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:22:01 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:22:01 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 07:22:01 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:22:01 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 07:22:01 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 07:22:01 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 07:22:01 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 07:22:01 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 07:22:01 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:22:01 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:22:01 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 07:22:01 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 07:22:01 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 07:22:01 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 07:22:01 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 07:22:01 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 07:22:01 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:22:01 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:22:01 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 07:22:01 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 07:22:01 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 07:22:01 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 07:22:01 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 07:22:01 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 07:22:01 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:22:01 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:22:01 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 07:22:01 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 07:22:01 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 07:22:01 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 07:22:01 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 07:22:01 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 07:22:01 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 07:22:01 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 07:22:01 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 07:22:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 07:22:01 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 07:22:01 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 07:22:01 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 07:22:01 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:22:01 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:22:01 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:22:01 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 07:22:01 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 07:22:01 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 07:22:01 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 07:22:01 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:22:01 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:22:01 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:22:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 07:22:01 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:22:01 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:22:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:22:01 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:22:01 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:22:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:22:01 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:22:01 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:22:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:22:01 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:22:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:22:01 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:22:01 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:22:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:22:01 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:22:01 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:22:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:22:01 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:22:01 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:22:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:22:01 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:22:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:22:01 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:22:01 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:22:01 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:22:01 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:22:01 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-03-30 07:22:01 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-03-30 07:22:01 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-03-30 07:22:01 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-03-30 07:22:01 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-03-30 07:22:01 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-03-30 07:22:01 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-03-30 07:22:01 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-03-30 07:22:01 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-03-30 07:22:01 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-03-30 07:22:01 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=0 bl=148 pwr=0
2025-03-30 07:22:01 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=1 bl=148 pwr=0
2025-03-30 07:22:01 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=2 bl=148 pwr=0
2025-03-30 07:22:01 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=3 bl=148 pwr=0
2025-03-30 07:22:01 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=4 bl=148 pwr=0
2025-03-30 07:22:01 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=5 bl=148 pwr=0
2025-03-30 07:22:01 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=6 bl=148 pwr=0
2025-03-30 07:22:01 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=7 bl=148 pwr=0
2025-03-30 07:22:01 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 07:22:01 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 07:22:01 [DEBUG] fake_trx.py:317 (BTS@172.18.26.20:5700) Recv FAKE_CI cmd
2025-03-30 07:22:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:22:01 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:22:01 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:22:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:22:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:22:01 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:22:01 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:22:01 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 07:22:01 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 07:22:01 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 07:22:01 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 07:22:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:22:01 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:22:01 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:22:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:22:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:22:02 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-03-30 07:22:02 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:22:02 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:22:02 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:22:02 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:22:02 [DEBUG] clck_gen.py:128 IND CLOCK 306
2025-03-30 07:22:03 [DEBUG] clck_gen.py:128 IND CLOCK 408
2025-03-30 07:22:03 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:22:03 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:22:03 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:22:03 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:22:03 [DEBUG] clck_gen.py:128 IND CLOCK 510
2025-03-30 07:22:03 [DEBUG] clck_gen.py:128 IND CLOCK 612
2025-03-30 07:22:04 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:22:04 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:22:04 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:22:04 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:22:04 [DEBUG] clck_gen.py:128 IND CLOCK 714
2025-03-30 07:22:04 [DEBUG] clck_gen.py:128 IND CLOCK 816
2025-03-30 07:22:05 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:22:05 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:22:05 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:22:05 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:22:05 [DEBUG] clck_gen.py:128 IND CLOCK 918
2025-03-30 07:22:05 [DEBUG] clck_gen.py:128 IND CLOCK 1020
2025-03-30 07:22:06 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:22:06 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:22:06 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:22:06 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:22:06 [DEBUG] clck_gen.py:128 IND CLOCK 1122
2025-03-30 07:22:06 [DEBUG] clck_gen.py:128 IND CLOCK 1224
2025-03-30 07:22:07 [DEBUG] clck_gen.py:128 IND CLOCK 1326
2025-03-30 07:22:07 [DEBUG] clck_gen.py:128 IND CLOCK 1428
2025-03-30 07:22:08 [DEBUG] clck_gen.py:128 IND CLOCK 1530
2025-03-30 07:22:08 [DEBUG] clck_gen.py:128 IND CLOCK 1632
2025-03-30 07:22:09 [DEBUG] clck_gen.py:128 IND CLOCK 1734
2025-03-30 07:22:09 [DEBUG] clck_gen.py:128 IND CLOCK 1836
2025-03-30 07:22:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:22:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:22:09 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:22:09 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:22:09 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:22:09 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:22:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:22:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:22:09 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:22:09 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:22:09 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 07:22:09 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 07:22:09 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 07:22:09 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 07:22:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:22:09 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.26.22:6700) Recv SETFH cmd
2025-03-30 07:22:09 [INFO] transceiver.py:237 (MS@172.18.26.22:6700) Frequency hopping configured: hsn=2, maio=0, ma_len=2
2025-03-30 07:22:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:22:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:22:10 [DEBUG] clck_gen.py:128 IND CLOCK 1938
2025-03-30 07:22:10 [DEBUG] clck_gen.py:128 IND CLOCK 2040
2025-03-30 07:22:10 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:22:10 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:22:10 [INFO] transceiver.py:241 (MS@172.18.26.22:6700) Frequency hopping disabled
2025-03-30 07:22:10 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:22:10 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:22:10 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:22:10 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:22:10 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:22:10 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:22:10 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:22:10 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 07:22:10 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 07:22:10 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 07:22:10 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:22:15 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 07:22:15 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 07:22:15 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:22:15 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:22:15 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:22:15 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:22:15 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:22:15 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 07:22:15 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:22:15 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 07:22:15 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 07:22:15 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 07:22:15 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 07:22:15 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 07:22:15 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:22:15 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:22:15 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 07:22:15 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 07:22:15 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 07:22:15 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 07:22:15 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 07:22:15 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 07:22:15 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:22:15 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:22:15 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 07:22:15 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 07:22:15 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 07:22:15 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 07:22:15 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 07:22:15 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 07:22:15 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:22:15 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 07:22:15 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:22:15 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 07:22:15 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 07:22:15 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 07:22:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 07:22:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 07:22:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 07:22:15 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 07:22:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 07:22:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 07:22:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 07:22:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 07:22:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:22:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:22:15 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 07:22:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:22:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:22:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:22:15 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 07:22:15 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 07:22:15 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 07:22:15 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 07:22:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:22:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:22:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:22:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 07:22:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:22:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:22:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:22:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:22:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:22:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:22:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:22:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:22:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:22:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:22:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:22:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:22:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:22:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:22:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:22:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:22:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:22:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:22:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:22:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:22:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:22:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:22:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:22:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:22:15 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-03-30 07:22:16 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-03-30 07:22:16 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-03-30 07:22:16 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-03-30 07:22:16 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-03-30 07:22:16 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-03-30 07:22:16 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-03-30 07:22:16 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-03-30 07:22:16 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-03-30 07:22:16 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-03-30 07:22:16 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=0 bl=148 pwr=0
2025-03-30 07:22:16 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=1 bl=148 pwr=0
2025-03-30 07:22:16 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=2 bl=148 pwr=0
2025-03-30 07:22:16 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=3 bl=148 pwr=0
2025-03-30 07:22:16 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=4 bl=148 pwr=0
2025-03-30 07:22:16 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=5 bl=148 pwr=0
2025-03-30 07:22:16 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=6 bl=148 pwr=0
2025-03-30 07:22:16 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=7 bl=148 pwr=0
2025-03-30 07:22:16 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 07:22:16 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 07:22:16 [DEBUG] fake_trx.py:317 (BTS@172.18.26.20:5700) Recv FAKE_CI cmd
2025-03-30 07:22:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:22:16 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:22:16 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:22:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:22:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:22:16 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:22:16 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:22:16 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 07:22:16 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 07:22:16 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 07:22:16 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 07:22:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:22:16 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.26.22:6700) Recv SETFH cmd
2025-03-30 07:22:16 [INFO] transceiver.py:237 (MS@172.18.26.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2025-03-30 07:22:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:22:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:22:16 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-03-30 07:22:16 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:22:16 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:22:16 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:22:16 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:22:17 [DEBUG] clck_gen.py:128 IND CLOCK 306
2025-03-30 07:22:17 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:22:17 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:22:17 [INFO] transceiver.py:241 (MS@172.18.26.22:6700) Frequency hopping disabled
2025-03-30 07:22:17 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:22:17 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:22:17 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:22:17 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:22:17 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:22:17 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:22:17 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:22:17 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:22:17 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 07:22:17 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 07:22:17 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 07:22:22 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 07:22:22 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 07:22:22 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:22:22 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:22:22 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:22:22 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:22:22 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:22:22 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 07:22:22 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:22:22 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 07:22:22 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 07:22:22 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 07:22:22 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 07:22:22 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 07:22:22 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:22:22 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 07:22:22 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:22:22 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 07:22:22 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 07:22:22 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 07:22:22 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 07:22:22 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 07:22:22 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:22:22 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:22:22 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 07:22:22 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 07:22:22 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 07:22:22 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 07:22:22 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 07:22:22 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 07:22:22 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:22:22 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:22:22 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 07:22:22 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 07:22:22 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 07:22:22 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 07:22:22 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 07:22:22 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 07:22:22 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 07:22:22 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 07:22:22 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 07:22:22 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 07:22:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 07:22:22 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:22:22 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 07:22:22 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 07:22:22 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:22:22 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:22:22 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:22:22 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 07:22:22 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 07:22:22 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 07:22:22 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 07:22:22 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:22:22 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:22:22 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:22:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 07:22:22 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:22:22 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:22:22 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:22:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:22:22 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:22:22 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:22:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:22:22 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:22:22 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:22:22 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:22:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:22:22 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:22:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:22:22 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:22:22 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:22:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:22:22 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:22:22 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:22:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:22:22 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:22:22 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:22:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:22:22 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:22:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:22:22 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:22:22 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-03-30 07:22:23 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-03-30 07:22:23 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-03-30 07:22:23 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-03-30 07:22:23 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-03-30 07:22:23 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-03-30 07:22:23 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-03-30 07:22:23 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-03-30 07:22:23 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-03-30 07:22:23 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-03-30 07:22:23 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=0 bl=148 pwr=0
2025-03-30 07:22:23 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=1 bl=148 pwr=0
2025-03-30 07:22:23 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=2 bl=148 pwr=0
2025-03-30 07:22:23 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=3 bl=148 pwr=0
2025-03-30 07:22:23 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=4 bl=148 pwr=0
2025-03-30 07:22:23 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=5 bl=148 pwr=0
2025-03-30 07:22:23 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=6 bl=148 pwr=0
2025-03-30 07:22:23 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=7 bl=148 pwr=0
2025-03-30 07:22:23 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 07:22:23 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 07:22:23 [DEBUG] fake_trx.py:317 (BTS@172.18.26.20:5700) Recv FAKE_CI cmd
2025-03-30 07:22:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:22:23 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:22:23 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:22:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:22:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:22:23 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:22:23 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:22:23 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 07:22:23 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 07:22:23 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 07:22:23 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 07:22:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:22:23 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:22:23 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:22:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:22:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:22:23 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-03-30 07:22:23 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:22:23 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:22:23 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:22:23 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:22:23 [DEBUG] clck_gen.py:128 IND CLOCK 306
2025-03-30 07:22:24 [DEBUG] clck_gen.py:128 IND CLOCK 408
2025-03-30 07:22:24 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:22:24 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:22:24 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:22:24 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:22:24 [DEBUG] clck_gen.py:128 IND CLOCK 510
2025-03-30 07:22:25 [DEBUG] clck_gen.py:128 IND CLOCK 612
2025-03-30 07:22:25 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:22:25 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:22:25 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:22:25 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:22:25 [DEBUG] clck_gen.py:128 IND CLOCK 714
2025-03-30 07:22:26 [DEBUG] clck_gen.py:128 IND CLOCK 816
2025-03-30 07:22:26 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:22:26 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:22:26 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:22:26 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:22:26 [DEBUG] clck_gen.py:128 IND CLOCK 918
2025-03-30 07:22:27 [DEBUG] clck_gen.py:128 IND CLOCK 1020
2025-03-30 07:22:27 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:22:27 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:22:27 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:22:27 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:22:27 [DEBUG] clck_gen.py:128 IND CLOCK 1122
2025-03-30 07:22:28 [DEBUG] clck_gen.py:128 IND CLOCK 1224
2025-03-30 07:22:28 [DEBUG] clck_gen.py:128 IND CLOCK 1326
2025-03-30 07:22:29 [DEBUG] clck_gen.py:128 IND CLOCK 1428
2025-03-30 07:22:29 [DEBUG] clck_gen.py:128 IND CLOCK 1530
2025-03-30 07:22:30 [DEBUG] clck_gen.py:128 IND CLOCK 1632
2025-03-30 07:22:30 [DEBUG] clck_gen.py:128 IND CLOCK 1734
2025-03-30 07:22:31 [DEBUG] clck_gen.py:128 IND CLOCK 1836
2025-03-30 07:22:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:22:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:22:31 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:22:31 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:22:31 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:22:31 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:22:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:22:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:22:31 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:22:31 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:22:31 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 07:22:31 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 07:22:31 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 07:22:31 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 07:22:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:22:31 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:22:31 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:22:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:22:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:22:31 [DEBUG] clck_gen.py:128 IND CLOCK 1938
2025-03-30 07:22:31 [DEBUG] clck_gen.py:128 IND CLOCK 2040
2025-03-30 07:22:32 [DEBUG] clck_gen.py:128 IND CLOCK 2142
2025-03-30 07:22:32 [DEBUG] clck_gen.py:128 IND CLOCK 2244
2025-03-30 07:22:33 [DEBUG] clck_gen.py:128 IND CLOCK 2346
2025-03-30 07:22:33 [DEBUG] clck_gen.py:128 IND CLOCK 2448
2025-03-30 07:22:34 [DEBUG] clck_gen.py:128 IND CLOCK 2550
2025-03-30 07:22:34 [DEBUG] clck_gen.py:128 IND CLOCK 2652
2025-03-30 07:22:35 [DEBUG] clck_gen.py:128 IND CLOCK 2754
2025-03-30 07:22:35 [DEBUG] clck_gen.py:128 IND CLOCK 2856
2025-03-30 07:22:36 [DEBUG] clck_gen.py:128 IND CLOCK 2958
2025-03-30 07:22:36 [DEBUG] clck_gen.py:128 IND CLOCK 3060
2025-03-30 07:22:37 [DEBUG] clck_gen.py:128 IND CLOCK 3162
2025-03-30 07:22:37 [DEBUG] clck_gen.py:128 IND CLOCK 3264
2025-03-30 07:22:38 [DEBUG] clck_gen.py:128 IND CLOCK 3366
2025-03-30 07:22:38 [DEBUG] clck_gen.py:128 IND CLOCK 3468
2025-03-30 07:22:39 [DEBUG] clck_gen.py:128 IND CLOCK 3570
2025-03-30 07:22:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:22:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:22:39 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:22:39 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:22:39 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:22:39 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:22:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:22:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:22:39 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:22:39 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:22:39 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 07:22:39 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 07:22:39 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 07:22:39 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 07:22:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:22:39 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:22:39 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:22:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:22:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:22:39 [DEBUG] clck_gen.py:128 IND CLOCK 3672
2025-03-30 07:22:39 [DEBUG] clck_gen.py:128 IND CLOCK 3774
2025-03-30 07:22:40 [DEBUG] clck_gen.py:128 IND CLOCK 3876
2025-03-30 07:22:40 [DEBUG] clck_gen.py:128 IND CLOCK 3978
2025-03-30 07:22:41 [DEBUG] clck_gen.py:128 IND CLOCK 4080
2025-03-30 07:22:41 [DEBUG] clck_gen.py:128 IND CLOCK 4182
2025-03-30 07:22:42 [DEBUG] clck_gen.py:128 IND CLOCK 4284
2025-03-30 07:22:42 [DEBUG] clck_gen.py:128 IND CLOCK 4386
2025-03-30 07:22:43 [DEBUG] clck_gen.py:128 IND CLOCK 4488
2025-03-30 07:22:43 [DEBUG] clck_gen.py:128 IND CLOCK 4590
2025-03-30 07:22:44 [DEBUG] clck_gen.py:128 IND CLOCK 4692
2025-03-30 07:22:44 [DEBUG] clck_gen.py:128 IND CLOCK 4794
2025-03-30 07:22:45 [DEBUG] clck_gen.py:128 IND CLOCK 4896
2025-03-30 07:22:45 [DEBUG] clck_gen.py:128 IND CLOCK 4998
2025-03-30 07:22:46 [DEBUG] clck_gen.py:128 IND CLOCK 5100
2025-03-30 07:22:46 [DEBUG] clck_gen.py:128 IND CLOCK 5202
2025-03-30 07:22:47 [DEBUG] clck_gen.py:128 IND CLOCK 5304
2025-03-30 07:22:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:22:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:22:47 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:22:47 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:22:47 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:22:47 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:22:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:22:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:22:47 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:22:47 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:22:47 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 07:22:47 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 07:22:47 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 07:22:47 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 07:22:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:22:47 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:22:47 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:22:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:22:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:22:47 [DEBUG] clck_gen.py:128 IND CLOCK 5406
2025-03-30 07:22:47 [DEBUG] clck_gen.py:128 IND CLOCK 5508
2025-03-30 07:22:48 [DEBUG] clck_gen.py:128 IND CLOCK 5610
2025-03-30 07:22:48 [DEBUG] clck_gen.py:128 IND CLOCK 5712
2025-03-30 07:22:49 [DEBUG] clck_gen.py:128 IND CLOCK 5814
2025-03-30 07:22:49 [DEBUG] clck_gen.py:128 IND CLOCK 5916
2025-03-30 07:22:50 [DEBUG] clck_gen.py:128 IND CLOCK 6018
2025-03-30 07:22:50 [DEBUG] clck_gen.py:128 IND CLOCK 6120
2025-03-30 07:22:51 [DEBUG] clck_gen.py:128 IND CLOCK 6222
2025-03-30 07:22:51 [DEBUG] clck_gen.py:128 IND CLOCK 6324
2025-03-30 07:22:52 [DEBUG] clck_gen.py:128 IND CLOCK 6426
2025-03-30 07:22:52 [DEBUG] clck_gen.py:128 IND CLOCK 6528
2025-03-30 07:22:53 [DEBUG] clck_gen.py:128 IND CLOCK 6630
2025-03-30 07:22:53 [DEBUG] clck_gen.py:128 IND CLOCK 6732
2025-03-30 07:22:54 [DEBUG] clck_gen.py:128 IND CLOCK 6834
2025-03-30 07:22:54 [DEBUG] clck_gen.py:128 IND CLOCK 6936
2025-03-30 07:22:55 [DEBUG] clck_gen.py:128 IND CLOCK 7038
2025-03-30 07:22:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:22:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:22:55 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:22:55 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:22:55 [WARNING] transceiver.py:287 (MS@172.18.26.22:6700) RX TRXD message (fn=7105 tn=5 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:22:55 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:22:55 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:22:55 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:22:55 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:22:55 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:22:55 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:22:55 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:22:55 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:22:55 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 07:22:55 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 07:22:55 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 07:23:00 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 07:23:00 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 07:23:00 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:23:00 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:23:00 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:23:00 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:23:00 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:23:00 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 07:23:00 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:23:00 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 07:23:00 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 07:23:00 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 07:23:00 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 07:23:00 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 07:23:00 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:23:00 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:23:00 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 07:23:00 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 07:23:00 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 07:23:00 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 07:23:00 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 07:23:00 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 07:23:00 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:23:00 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:23:00 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 07:23:00 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 07:23:00 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 07:23:00 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 07:23:00 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 07:23:00 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 07:23:00 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:23:00 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 07:23:00 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:23:00 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 07:23:00 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 07:23:00 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 07:23:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 07:23:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 07:23:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 07:23:00 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 07:23:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 07:23:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 07:23:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 07:23:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 07:23:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:23:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:23:00 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 07:23:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:23:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:23:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:23:00 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 07:23:00 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 07:23:00 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 07:23:00 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 07:23:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:23:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:23:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:23:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 07:23:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:23:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:23:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:23:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:23:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:23:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:23:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:23:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:23:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:23:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:23:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:23:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:23:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:23:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:23:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:23:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:23:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:23:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:23:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:23:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:23:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:23:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:23:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:23:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:23:00 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-03-30 07:23:00 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-03-30 07:23:00 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-03-30 07:23:00 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-03-30 07:23:00 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-03-30 07:23:00 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-03-30 07:23:00 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-03-30 07:23:00 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-03-30 07:23:00 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-03-30 07:23:00 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-03-30 07:23:00 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=0 bl=148 pwr=0
2025-03-30 07:23:00 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=1 bl=148 pwr=0
2025-03-30 07:23:00 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=2 bl=148 pwr=0
2025-03-30 07:23:00 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=3 bl=148 pwr=0
2025-03-30 07:23:00 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=4 bl=148 pwr=0
2025-03-30 07:23:00 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=5 bl=148 pwr=0
2025-03-30 07:23:00 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=6 bl=148 pwr=0
2025-03-30 07:23:00 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=7 bl=148 pwr=0
2025-03-30 07:23:00 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 07:23:00 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 07:23:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:23:00 [DEBUG] fake_trx.py:317 (BTS@172.18.26.20:5700) Recv FAKE_CI cmd
2025-03-30 07:23:00 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:23:00 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:23:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:23:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:23:00 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:23:00 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:23:00 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 07:23:00 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 07:23:00 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 07:23:00 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 07:23:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:23:00 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.26.22:6700) Recv SETFH cmd
2025-03-30 07:23:00 [INFO] transceiver.py:237 (MS@172.18.26.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2025-03-30 07:23:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:23:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:23:01 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-03-30 07:23:01 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:23:01 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:23:01 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:23:01 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:23:01 [DEBUG] clck_gen.py:128 IND CLOCK 306
2025-03-30 07:23:02 [DEBUG] clck_gen.py:128 IND CLOCK 408
2025-03-30 07:23:02 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:23:02 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:23:02 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:23:02 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:23:02 [DEBUG] clck_gen.py:128 IND CLOCK 510
2025-03-30 07:23:02 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:23:02 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:23:02 [INFO] transceiver.py:241 (MS@172.18.26.22:6700) Frequency hopping disabled
2025-03-30 07:23:02 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:23:02 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:23:02 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:23:02 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:23:02 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:23:02 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:23:02 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:23:02 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:23:02 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 07:23:02 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 07:23:02 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 07:23:02 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=563 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:23:02 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=563 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:23:02 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=563 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:23:02 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=563 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:23:02 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=563 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:23:02 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=563 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:23:07 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 07:23:07 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 07:23:07 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:23:08 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:23:08 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:23:08 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:23:08 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:23:08 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 07:23:08 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:23:08 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 07:23:08 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 07:23:08 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 07:23:08 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 07:23:08 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 07:23:08 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:23:08 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:23:08 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 07:23:08 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 07:23:08 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 07:23:08 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 07:23:08 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 07:23:08 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 07:23:08 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:23:08 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:23:08 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 07:23:08 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 07:23:08 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 07:23:08 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 07:23:08 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 07:23:08 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 07:23:08 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:23:08 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:23:08 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 07:23:08 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 07:23:08 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 07:23:08 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 07:23:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 07:23:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 07:23:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 07:23:08 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 07:23:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 07:23:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 07:23:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 07:23:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:23:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 07:23:08 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 07:23:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:23:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:23:08 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 07:23:08 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 07:23:08 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 07:23:08 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 07:23:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:23:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:23:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:23:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 07:23:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:23:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:23:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:23:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:23:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:23:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:23:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:23:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:23:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:23:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:23:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:23:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:23:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:23:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:23:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:23:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:23:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:23:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:23:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:23:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:23:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:23:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:23:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:23:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:23:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:23:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:23:08 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-03-30 07:23:08 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-03-30 07:23:08 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=107): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-03-30 07:23:08 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=107): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-03-30 07:23:08 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=107): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-03-30 07:23:08 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=107): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-03-30 07:23:08 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=107): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-03-30 07:23:08 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=107): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-03-30 07:23:08 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=107): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-03-30 07:23:08 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=107): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-03-30 07:23:08 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=107): ver=1 fn=105 tn=0 bl=148 pwr=0
2025-03-30 07:23:08 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=107): ver=1 fn=105 tn=1 bl=148 pwr=0
2025-03-30 07:23:08 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=107): ver=1 fn=105 tn=2 bl=148 pwr=0
2025-03-30 07:23:08 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=107): ver=1 fn=105 tn=3 bl=148 pwr=0
2025-03-30 07:23:08 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=107): ver=1 fn=105 tn=4 bl=148 pwr=0
2025-03-30 07:23:08 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=107): ver=1 fn=105 tn=5 bl=148 pwr=0
2025-03-30 07:23:08 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=107): ver=1 fn=105 tn=6 bl=148 pwr=0
2025-03-30 07:23:08 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=107): ver=1 fn=105 tn=7 bl=148 pwr=0
2025-03-30 07:23:08 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=107): ver=1 fn=106 tn=0 bl=148 pwr=0
2025-03-30 07:23:08 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=107): ver=1 fn=106 tn=1 bl=148 pwr=0
2025-03-30 07:23:08 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=107): ver=1 fn=106 tn=2 bl=148 pwr=0
2025-03-30 07:23:08 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=107): ver=1 fn=106 tn=3 bl=148 pwr=0
2025-03-30 07:23:08 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=107): ver=1 fn=106 tn=4 bl=148 pwr=0
2025-03-30 07:23:08 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=107): ver=1 fn=106 tn=5 bl=148 pwr=0
2025-03-30 07:23:08 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=107): ver=1 fn=106 tn=6 bl=148 pwr=0
2025-03-30 07:23:08 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=107): ver=1 fn=106 tn=7 bl=148 pwr=0
2025-03-30 07:23:08 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 07:23:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:23:08 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 07:23:08 [DEBUG] fake_trx.py:317 (BTS@172.18.26.20:5700) Recv FAKE_CI cmd
2025-03-30 07:23:08 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:23:08 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:23:08 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:23:08 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:23:08 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:23:08 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:23:08 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 07:23:08 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 07:23:08 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 07:23:08 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 07:23:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:23:08 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.26.22:6700) Recv SETFH cmd
2025-03-30 07:23:08 [INFO] transceiver.py:237 (MS@172.18.26.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2025-03-30 07:23:08 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:23:08 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:23:08 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-03-30 07:23:09 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:23:09 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:23:09 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:23:09 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:23:09 [DEBUG] clck_gen.py:128 IND CLOCK 306
2025-03-30 07:23:09 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:23:09 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:23:09 [INFO] transceiver.py:241 (MS@172.18.26.22:6700) Frequency hopping disabled
2025-03-30 07:23:09 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:23:09 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:23:09 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:23:09 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:23:09 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:23:09 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:23:09 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:23:09 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 07:23:09 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 07:23:09 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 07:23:09 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:23:09 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=355 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:23:09 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=355 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:23:09 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=355 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:23:09 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=355 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:23:09 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=355 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:23:09 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=355 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:23:09 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=355 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:23:14 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 07:23:14 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 07:23:14 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:23:14 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:23:14 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:23:14 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:23:14 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:23:14 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 07:23:14 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:23:14 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 07:23:14 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 07:23:14 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 07:23:14 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 07:23:14 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 07:23:14 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:23:14 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:23:14 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 07:23:14 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 07:23:14 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 07:23:14 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 07:23:14 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 07:23:14 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 07:23:14 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:23:14 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:23:14 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 07:23:14 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 07:23:14 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 07:23:14 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 07:23:14 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 07:23:14 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 07:23:14 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:23:14 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:23:14 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 07:23:14 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 07:23:14 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 07:23:14 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 07:23:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 07:23:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 07:23:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 07:23:14 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 07:23:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 07:23:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 07:23:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 07:23:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:23:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 07:23:14 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 07:23:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:23:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:23:14 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 07:23:14 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 07:23:14 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 07:23:14 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 07:23:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:23:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:23:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:23:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 07:23:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:23:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:23:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:23:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:23:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:23:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:23:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:23:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:23:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:23:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:23:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:23:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:23:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:23:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:23:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:23:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:23:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:23:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:23:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:23:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:23:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:23:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:23:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:23:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:23:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:23:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:23:14 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-03-30 07:23:15 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-03-30 07:23:15 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-03-30 07:23:15 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-03-30 07:23:15 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-03-30 07:23:15 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-03-30 07:23:15 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-03-30 07:23:15 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-03-30 07:23:15 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-03-30 07:23:15 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-03-30 07:23:15 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=0 bl=148 pwr=0
2025-03-30 07:23:15 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=1 bl=148 pwr=0
2025-03-30 07:23:15 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=2 bl=148 pwr=0
2025-03-30 07:23:15 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=3 bl=148 pwr=0
2025-03-30 07:23:15 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=4 bl=148 pwr=0
2025-03-30 07:23:15 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=5 bl=148 pwr=0
2025-03-30 07:23:15 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=6 bl=148 pwr=0
2025-03-30 07:23:15 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=7 bl=148 pwr=0
2025-03-30 07:23:15 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 07:23:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:23:15 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 07:23:15 [DEBUG] fake_trx.py:317 (BTS@172.18.26.20:5700) Recv FAKE_CI cmd
2025-03-30 07:23:15 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:23:15 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:23:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:23:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:23:15 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:23:15 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:23:15 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 07:23:15 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 07:23:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:23:15 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:23:15 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:23:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:23:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:23:15 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-03-30 07:23:15 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:23:15 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:23:15 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:23:15 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:23:16 [DEBUG] clck_gen.py:128 IND CLOCK 306
2025-03-30 07:23:16 [DEBUG] clck_gen.py:128 IND CLOCK 408
2025-03-30 07:23:16 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:23:16 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:23:16 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:23:16 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:23:17 [DEBUG] clck_gen.py:128 IND CLOCK 510
2025-03-30 07:23:17 [DEBUG] clck_gen.py:128 IND CLOCK 612
2025-03-30 07:23:17 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:23:17 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:23:17 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:23:17 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:23:18 [DEBUG] clck_gen.py:128 IND CLOCK 714
2025-03-30 07:23:18 [DEBUG] clck_gen.py:128 IND CLOCK 816
2025-03-30 07:23:18 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:23:18 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:23:18 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:23:18 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:23:18 [DEBUG] clck_gen.py:128 IND CLOCK 918
2025-03-30 07:23:19 [DEBUG] clck_gen.py:128 IND CLOCK 1020
2025-03-30 07:23:19 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=1082): ver=1 fn=1080 tn=0 bl=148 pwr=0
2025-03-30 07:23:19 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=1082): ver=1 fn=1080 tn=1 bl=148 pwr=0
2025-03-30 07:23:19 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=1082): ver=1 fn=1080 tn=2 bl=148 pwr=0
2025-03-30 07:23:19 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=1082): ver=1 fn=1080 tn=3 bl=148 pwr=0
2025-03-30 07:23:19 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=1082): ver=1 fn=1080 tn=4 bl=148 pwr=0
2025-03-30 07:23:19 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=1082): ver=1 fn=1080 tn=5 bl=148 pwr=0
2025-03-30 07:23:19 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=1082): ver=1 fn=1080 tn=6 bl=148 pwr=0
2025-03-30 07:23:19 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=1082): ver=1 fn=1080 tn=7 bl=148 pwr=0
2025-03-30 07:23:19 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=1082): ver=1 fn=1081 tn=0 bl=148 pwr=0
2025-03-30 07:23:19 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=1082): ver=1 fn=1081 tn=1 bl=148 pwr=0
2025-03-30 07:23:19 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=1082): ver=1 fn=1081 tn=2 bl=148 pwr=0
2025-03-30 07:23:19 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=1082): ver=1 fn=1081 tn=3 bl=148 pwr=0
2025-03-30 07:23:19 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=1082): ver=1 fn=1081 tn=4 bl=148 pwr=0
2025-03-30 07:23:19 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=1082): ver=1 fn=1081 tn=5 bl=148 pwr=0
2025-03-30 07:23:19 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=1082): ver=1 fn=1081 tn=6 bl=148 pwr=0
2025-03-30 07:23:19 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=1082): ver=1 fn=1081 tn=7 bl=148 pwr=0
2025-03-30 07:23:19 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:23:19 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:23:19 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:23:19 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:23:19 [DEBUG] clck_gen.py:128 IND CLOCK 1122
2025-03-30 07:23:20 [DEBUG] clck_gen.py:128 IND CLOCK 1224
2025-03-30 07:23:20 [DEBUG] clck_gen.py:128 IND CLOCK 1326
2025-03-30 07:23:21 [DEBUG] clck_gen.py:128 IND CLOCK 1428
2025-03-30 07:23:21 [DEBUG] clck_gen.py:128 IND CLOCK 1530
2025-03-30 07:23:22 [DEBUG] clck_gen.py:128 IND CLOCK 1632
2025-03-30 07:23:22 [DEBUG] clck_gen.py:128 IND CLOCK 1734
2025-03-30 07:23:23 [DEBUG] clck_gen.py:128 IND CLOCK 1836
2025-03-30 07:23:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:23:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:23:23 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:23:23 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:23:23 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:23:23 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:23:23 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:23:23 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:23:23 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:23:23 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:23:23 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 07:23:23 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 07:23:23 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 07:23:23 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:23:23 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:23:28 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 07:23:28 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 07:23:28 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:23:28 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:23:28 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:23:28 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:23:28 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:23:28 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 07:23:28 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:23:28 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 07:23:28 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 07:23:28 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 07:23:28 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 07:23:28 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 07:23:28 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:23:28 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:23:28 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 07:23:28 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 07:23:28 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 07:23:28 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 07:23:28 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 07:23:28 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 07:23:28 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:23:28 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:23:28 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 07:23:28 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 07:23:28 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 07:23:28 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 07:23:28 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 07:23:28 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 07:23:28 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:23:28 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:23:28 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 07:23:28 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 07:23:28 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 07:23:28 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 07:23:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 07:23:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 07:23:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 07:23:28 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 07:23:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 07:23:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 07:23:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 07:23:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:23:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 07:23:28 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 07:23:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:23:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:23:28 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 07:23:28 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 07:23:28 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 07:23:28 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 07:23:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:23:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:23:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:23:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 07:23:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:23:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:23:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:23:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:23:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:23:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:23:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:23:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:23:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:23:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:23:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:23:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:23:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:23:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:23:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:23:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:23:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:23:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:23:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:23:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:23:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:23:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:23:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:23:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:23:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:23:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:23:28 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-03-30 07:23:28 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-03-30 07:23:28 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-03-30 07:23:28 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-03-30 07:23:28 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-03-30 07:23:28 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-03-30 07:23:28 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-03-30 07:23:28 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-03-30 07:23:28 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-03-30 07:23:28 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-03-30 07:23:28 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=0 bl=148 pwr=0
2025-03-30 07:23:28 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=1 bl=148 pwr=0
2025-03-30 07:23:28 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=2 bl=148 pwr=0
2025-03-30 07:23:28 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=3 bl=148 pwr=0
2025-03-30 07:23:28 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=4 bl=148 pwr=0
2025-03-30 07:23:28 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=5 bl=148 pwr=0
2025-03-30 07:23:28 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=6 bl=148 pwr=0
2025-03-30 07:23:28 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=7 bl=148 pwr=0
2025-03-30 07:23:28 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 07:23:28 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 07:23:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:23:28 [DEBUG] fake_trx.py:317 (BTS@172.18.26.20:5700) Recv FAKE_CI cmd
2025-03-30 07:23:28 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:23:28 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:23:28 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:23:28 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:23:28 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:23:28 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:23:28 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 07:23:28 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 07:23:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:23:28 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.26.22:6700) Recv SETFH cmd
2025-03-30 07:23:28 [INFO] transceiver.py:237 (MS@172.18.26.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2025-03-30 07:23:28 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:23:28 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:23:29 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-03-30 07:23:29 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:23:29 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:23:29 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:23:29 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:23:29 [DEBUG] clck_gen.py:128 IND CLOCK 306
2025-03-30 07:23:30 [DEBUG] clck_gen.py:128 IND CLOCK 408
2025-03-30 07:23:30 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:23:30 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:23:30 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:23:30 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:23:30 [DEBUG] clck_gen.py:128 IND CLOCK 510
2025-03-30 07:23:31 [DEBUG] clck_gen.py:128 IND CLOCK 612
2025-03-30 07:23:31 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:23:31 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:23:31 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:23:31 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:23:31 [DEBUG] clck_gen.py:128 IND CLOCK 714
2025-03-30 07:23:32 [DEBUG] clck_gen.py:128 IND CLOCK 816
2025-03-30 07:23:32 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:23:32 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:23:32 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:23:32 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:23:32 [DEBUG] clck_gen.py:128 IND CLOCK 918
2025-03-30 07:23:33 [DEBUG] clck_gen.py:128 IND CLOCK 1020
2025-03-30 07:23:33 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:23:33 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:23:33 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:23:33 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:23:33 [DEBUG] clck_gen.py:128 IND CLOCK 1122
2025-03-30 07:23:34 [DEBUG] clck_gen.py:128 IND CLOCK 1224
2025-03-30 07:23:34 [DEBUG] clck_gen.py:128 IND CLOCK 1326
2025-03-30 07:23:34 [DEBUG] clck_gen.py:128 IND CLOCK 1428
2025-03-30 07:23:34 [WARNING] clck_gen.py:108 CLCKGen: time overrun by -680us; resetting the clock
2025-03-30 07:23:35 [DEBUG] clck_gen.py:128 IND CLOCK 1530
2025-03-30 07:23:35 [DEBUG] clck_gen.py:128 IND CLOCK 1632
2025-03-30 07:23:36 [DEBUG] clck_gen.py:128 IND CLOCK 1734
2025-03-30 07:23:36 [DEBUG] clck_gen.py:128 IND CLOCK 1836
2025-03-30 07:23:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:23:36 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:23:36 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:23:36 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:23:36 [INFO] transceiver.py:241 (MS@172.18.26.22:6700) Frequency hopping disabled
2025-03-30 07:23:36 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:23:36 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:23:36 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:23:36 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:23:36 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:23:36 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:23:36 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:23:36 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:23:36 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 07:23:36 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 07:23:36 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 07:23:41 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 07:23:41 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 07:23:41 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:23:41 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:23:41 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:23:41 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:23:42 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:23:42 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 07:23:42 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:23:42 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 07:23:42 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 07:23:42 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 07:23:42 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 07:23:42 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 07:23:42 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:23:42 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:23:42 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 07:23:42 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 07:23:42 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 07:23:42 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 07:23:42 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 07:23:42 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 07:23:42 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:23:42 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:23:42 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 07:23:42 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 07:23:42 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 07:23:42 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 07:23:42 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 07:23:42 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 07:23:42 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:23:42 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:23:42 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 07:23:42 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 07:23:42 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 07:23:42 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 07:23:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 07:23:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 07:23:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 07:23:42 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 07:23:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 07:23:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 07:23:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 07:23:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:23:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 07:23:42 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 07:23:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:23:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:23:42 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 07:23:42 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 07:23:42 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 07:23:42 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 07:23:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:23:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:23:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:23:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 07:23:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:23:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:23:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:23:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:23:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:23:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:23:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:23:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:23:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:23:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:23:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:23:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:23:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:23:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:23:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:23:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:23:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:23:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:23:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:23:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:23:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:23:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:23:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:23:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:23:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:23:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:23:42 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-03-30 07:23:42 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-03-30 07:23:42 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-03-30 07:23:42 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-03-30 07:23:42 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-03-30 07:23:42 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-03-30 07:23:42 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-03-30 07:23:42 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-03-30 07:23:42 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-03-30 07:23:42 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-03-30 07:23:42 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 07:23:42 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 07:23:42 [DEBUG] fake_trx.py:317 (BTS@172.18.26.20:5700) Recv FAKE_CI cmd
2025-03-30 07:23:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:23:42 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:23:42 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:23:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:23:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:23:42 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:23:42 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:23:42 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 07:23:42 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 07:23:42 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-03-30 07:23:43 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:23:43 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:23:43 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:23:43 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:23:43 [DEBUG] clck_gen.py:128 IND CLOCK 306
2025-03-30 07:23:43 [DEBUG] clck_gen.py:128 IND CLOCK 408
2025-03-30 07:23:44 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:23:44 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:23:44 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:23:44 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:23:44 [DEBUG] clck_gen.py:128 IND CLOCK 510
2025-03-30 07:23:44 [DEBUG] clck_gen.py:128 IND CLOCK 612
2025-03-30 07:23:45 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:23:45 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:23:45 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:23:45 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:23:45 [DEBUG] clck_gen.py:128 IND CLOCK 714
2025-03-30 07:23:45 [DEBUG] clck_gen.py:128 IND CLOCK 816
2025-03-30 07:23:46 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:23:46 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:23:46 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:23:46 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:23:46 [DEBUG] clck_gen.py:128 IND CLOCK 918
2025-03-30 07:23:46 [DEBUG] clck_gen.py:128 IND CLOCK 1020
2025-03-30 07:23:47 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:23:47 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:23:47 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:23:47 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:23:47 [DEBUG] clck_gen.py:128 IND CLOCK 1122
2025-03-30 07:23:47 [DEBUG] clck_gen.py:128 IND CLOCK 1224
2025-03-30 07:23:48 [DEBUG] clck_gen.py:128 IND CLOCK 1326
2025-03-30 07:23:48 [DEBUG] clck_gen.py:128 IND CLOCK 1428
2025-03-30 07:23:49 [DEBUG] clck_gen.py:128 IND CLOCK 1530
2025-03-30 07:23:49 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:23:49 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:23:49 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:23:49 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:23:49 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:23:49 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:23:49 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:23:49 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:23:49 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:23:49 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:23:49 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 07:23:49 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 07:23:49 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 07:23:54 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 07:23:54 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 07:23:54 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:23:54 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:23:54 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:23:54 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:23:54 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:23:54 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 07:23:54 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:23:54 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 07:23:54 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 07:23:54 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 07:23:54 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 07:23:54 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 07:23:54 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:23:54 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:23:54 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 07:23:54 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 07:23:54 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 07:23:54 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 07:23:54 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 07:23:54 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 07:23:54 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:23:54 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:23:54 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 07:23:54 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 07:23:54 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 07:23:54 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 07:23:54 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 07:23:54 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 07:23:54 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:23:54 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:23:54 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 07:23:54 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 07:23:54 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 07:23:54 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 07:23:54 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 07:23:54 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 07:23:54 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 07:23:54 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 07:23:54 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 07:23:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 07:23:54 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 07:23:54 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 07:23:54 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:23:54 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 07:23:54 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:23:54 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:23:54 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:23:54 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 07:23:54 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 07:23:54 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 07:23:54 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 07:23:54 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:23:54 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:23:54 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:23:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 07:23:54 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:23:54 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:23:54 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:23:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:23:54 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:23:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:23:54 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:23:54 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:23:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:23:54 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:23:54 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:23:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:23:54 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:23:54 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:23:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:23:54 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:23:54 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:23:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:23:54 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:23:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:23:54 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:23:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:23:54 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:23:54 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:23:54 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:23:54 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-03-30 07:23:54 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-03-30 07:23:54 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-03-30 07:23:54 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-03-30 07:23:54 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-03-30 07:23:54 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-03-30 07:23:54 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-03-30 07:23:54 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-03-30 07:23:54 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-03-30 07:23:54 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-03-30 07:23:54 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=105 tn=0 bl=148 pwr=0
2025-03-30 07:23:54 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=105 tn=1 bl=148 pwr=0
2025-03-30 07:23:54 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=105 tn=2 bl=148 pwr=0
2025-03-30 07:23:54 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=105 tn=3 bl=148 pwr=0
2025-03-30 07:23:54 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=105 tn=4 bl=148 pwr=0
2025-03-30 07:23:54 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=105 tn=5 bl=148 pwr=0
2025-03-30 07:23:54 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=105 tn=6 bl=148 pwr=0
2025-03-30 07:23:54 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=105 tn=7 bl=148 pwr=0
2025-03-30 07:23:54 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=106 tn=0 bl=148 pwr=0
2025-03-30 07:23:54 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=106 tn=1 bl=148 pwr=0
2025-03-30 07:23:54 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=106 tn=2 bl=148 pwr=0
2025-03-30 07:23:54 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=106 tn=3 bl=148 pwr=0
2025-03-30 07:23:54 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=106 tn=4 bl=148 pwr=0
2025-03-30 07:23:54 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=106 tn=5 bl=148 pwr=0
2025-03-30 07:23:54 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=106 tn=6 bl=148 pwr=0
2025-03-30 07:23:54 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=106 tn=7 bl=148 pwr=0
2025-03-30 07:23:54 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=107 tn=0 bl=148 pwr=0
2025-03-30 07:23:54 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=107 tn=1 bl=148 pwr=0
2025-03-30 07:23:54 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=107 tn=2 bl=148 pwr=0
2025-03-30 07:23:54 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=107 tn=3 bl=148 pwr=0
2025-03-30 07:23:54 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=107 tn=4 bl=148 pwr=0
2025-03-30 07:23:54 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=107 tn=5 bl=148 pwr=0
2025-03-30 07:23:54 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=107 tn=6 bl=148 pwr=0
2025-03-30 07:23:54 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=107 tn=7 bl=148 pwr=0
2025-03-30 07:23:54 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 07:23:54 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 07:23:54 [DEBUG] fake_trx.py:317 (BTS@172.18.26.20:5700) Recv FAKE_CI cmd
2025-03-30 07:23:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:23:54 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:23:54 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:23:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:23:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:23:54 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:23:54 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:23:54 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 07:23:54 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 07:23:55 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-03-30 07:23:55 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:23:55 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:23:55 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:23:55 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:23:55 [DEBUG] clck_gen.py:128 IND CLOCK 306
2025-03-30 07:23:56 [DEBUG] clck_gen.py:128 IND CLOCK 408
2025-03-30 07:23:56 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:23:56 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:23:56 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:23:56 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:23:56 [DEBUG] clck_gen.py:128 IND CLOCK 510
2025-03-30 07:23:57 [DEBUG] clck_gen.py:128 IND CLOCK 612
2025-03-30 07:23:57 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:23:57 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:23:57 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:23:57 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:23:57 [DEBUG] clck_gen.py:128 IND CLOCK 714
2025-03-30 07:23:58 [DEBUG] clck_gen.py:128 IND CLOCK 816
2025-03-30 07:23:58 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:23:58 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:23:58 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:23:58 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:23:58 [DEBUG] clck_gen.py:128 IND CLOCK 918
2025-03-30 07:23:58 [DEBUG] clck_gen.py:128 IND CLOCK 1020
2025-03-30 07:23:59 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:23:59 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:23:59 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:23:59 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:23:59 [DEBUG] clck_gen.py:128 IND CLOCK 1122
2025-03-30 07:23:59 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:23:59 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:23:59 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:23:59 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:23:59 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:23:59 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:23:59 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:23:59 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:23:59 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 07:23:59 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 07:23:59 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=1134 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:23:59 [DEBUG] clck_gen.py:128 IND CLOCK 1224
2025-03-30 07:24:00 [DEBUG] clck_gen.py:128 IND CLOCK 1326
2025-03-30 07:24:00 [DEBUG] clck_gen.py:128 IND CLOCK 1428
2025-03-30 07:24:01 [DEBUG] clck_gen.py:128 IND CLOCK 1530
2025-03-30 07:24:01 [DEBUG] clck_gen.py:128 IND CLOCK 1632
2025-03-30 07:24:02 [DEBUG] clck_gen.py:128 IND CLOCK 1734
2025-03-30 07:24:02 [DEBUG] clck_gen.py:128 IND CLOCK 1836
2025-03-30 07:24:03 [DEBUG] clck_gen.py:128 IND CLOCK 1938
2025-03-30 07:24:03 [DEBUG] clck_gen.py:128 IND CLOCK 2040
2025-03-30 07:24:04 [DEBUG] clck_gen.py:128 IND CLOCK 2142
2025-03-30 07:24:04 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 07:24:04 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 07:24:04 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:24:04 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:24:04 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 07:24:04 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:24:04 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:24:04 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:24:04 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:24:04 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:24:04 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 07:24:04 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:24:04 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 07:24:04 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 07:24:04 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 07:24:04 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 07:24:04 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 07:24:04 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:24:04 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:24:04 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 07:24:04 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 07:24:04 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 07:24:04 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 07:24:04 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 07:24:04 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 07:24:04 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:24:04 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:24:04 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 07:24:04 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 07:24:04 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 07:24:04 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 07:24:04 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 07:24:04 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 07:24:04 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:24:04 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:24:04 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 07:24:04 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 07:24:04 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 07:24:04 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 07:24:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 07:24:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 07:24:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 07:24:04 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 07:24:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 07:24:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 07:24:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 07:24:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 07:24:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:24:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:24:04 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 07:24:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:24:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:24:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:24:04 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 07:24:04 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 07:24:04 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 07:24:04 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 07:24:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:24:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:24:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:24:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 07:24:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:24:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:24:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:24:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:24:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:24:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:24:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:24:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:24:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:24:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:24:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:24:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:24:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:24:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:24:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:24:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:24:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:24:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:24:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:24:04 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:24:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:24:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:24:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:24:04 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:24:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:24:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:24:04 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:24:04 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:24:04 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 07:24:04 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 07:24:04 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 07:24:09 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 07:24:09 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 07:24:09 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:24:09 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:24:09 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:24:09 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:24:09 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:24:09 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 07:24:09 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:24:09 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 07:24:09 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 07:24:09 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 07:24:09 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 07:24:09 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 07:24:09 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:24:09 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:24:09 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 07:24:09 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 07:24:09 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 07:24:09 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 07:24:09 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 07:24:09 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 07:24:09 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:24:09 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:24:09 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 07:24:09 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 07:24:09 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 07:24:09 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 07:24:09 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 07:24:09 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 07:24:09 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:24:09 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:24:09 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 07:24:09 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 07:24:09 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 07:24:09 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 07:24:09 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 07:24:09 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 07:24:09 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 07:24:09 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 07:24:09 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 07:24:09 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 07:24:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 07:24:09 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:24:09 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 07:24:09 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 07:24:09 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:24:09 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:24:09 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 07:24:09 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 07:24:09 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 07:24:09 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 07:24:09 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:24:09 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:24:09 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:24:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 07:24:09 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:24:09 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:24:09 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:24:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:24:09 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:24:09 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:24:09 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:24:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:24:09 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:24:09 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:24:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:24:09 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:24:09 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:24:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:24:09 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:24:09 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:24:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:24:09 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:24:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:24:09 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:24:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:24:09 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:24:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:24:09 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:24:09 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:24:09 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:24:09 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-03-30 07:24:10 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-03-30 07:24:10 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-03-30 07:24:10 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-03-30 07:24:10 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-03-30 07:24:10 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-03-30 07:24:10 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-03-30 07:24:10 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-03-30 07:24:10 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-03-30 07:24:10 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-03-30 07:24:10 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=0 bl=148 pwr=0
2025-03-30 07:24:10 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=1 bl=148 pwr=0
2025-03-30 07:24:10 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=2 bl=148 pwr=0
2025-03-30 07:24:10 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=3 bl=148 pwr=0
2025-03-30 07:24:10 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=4 bl=148 pwr=0
2025-03-30 07:24:10 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=5 bl=148 pwr=0
2025-03-30 07:24:10 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=6 bl=148 pwr=0
2025-03-30 07:24:10 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=7 bl=148 pwr=0
2025-03-30 07:24:10 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 07:24:10 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 07:24:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:24:10 [DEBUG] fake_trx.py:317 (BTS@172.18.26.20:5700) Recv FAKE_CI cmd
2025-03-30 07:24:10 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:24:10 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:24:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:24:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:24:10 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:24:10 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:24:10 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 07:24:10 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 07:24:10 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-03-30 07:24:10 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:24:10 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:24:10 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:24:10 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:24:10 [DEBUG] clck_gen.py:128 IND CLOCK 306
2025-03-30 07:24:11 [DEBUG] clck_gen.py:128 IND CLOCK 408
2025-03-30 07:24:11 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:24:11 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:24:11 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:24:11 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:24:11 [DEBUG] clck_gen.py:128 IND CLOCK 510
2025-03-30 07:24:12 [DEBUG] clck_gen.py:128 IND CLOCK 612
2025-03-30 07:24:12 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:24:12 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:24:12 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:24:12 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:24:12 [DEBUG] clck_gen.py:128 IND CLOCK 714
2025-03-30 07:24:13 [DEBUG] clck_gen.py:128 IND CLOCK 816
2025-03-30 07:24:13 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:24:13 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:24:13 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:24:13 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:24:13 [DEBUG] clck_gen.py:128 IND CLOCK 918
2025-03-30 07:24:14 [DEBUG] clck_gen.py:128 IND CLOCK 1020
2025-03-30 07:24:14 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:24:14 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:24:14 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:24:14 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:24:14 [DEBUG] clck_gen.py:128 IND CLOCK 1122
2025-03-30 07:24:15 [DEBUG] clck_gen.py:128 IND CLOCK 1224
2025-03-30 07:24:15 [DEBUG] clck_gen.py:128 IND CLOCK 1326
2025-03-30 07:24:15 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:24:16 [DEBUG] clck_gen.py:128 IND CLOCK 1428
2025-03-30 07:24:16 [DEBUG] clck_gen.py:128 IND CLOCK 1530
2025-03-30 07:24:16 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:24:17 [DEBUG] clck_gen.py:128 IND CLOCK 1632
2025-03-30 07:24:17 [DEBUG] clck_gen.py:128 IND CLOCK 1734
2025-03-30 07:24:17 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:24:18 [DEBUG] clck_gen.py:128 IND CLOCK 1836
2025-03-30 07:24:18 [DEBUG] clck_gen.py:128 IND CLOCK 1938
2025-03-30 07:24:18 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:24:18 [DEBUG] clck_gen.py:128 IND CLOCK 2040
2025-03-30 07:24:19 [DEBUG] clck_gen.py:128 IND CLOCK 2142
2025-03-30 07:24:19 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:24:19 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:24:19 [DEBUG] clck_gen.py:128 IND CLOCK 2244
2025-03-30 07:24:20 [DEBUG] clck_gen.py:128 IND CLOCK 2346
2025-03-30 07:24:20 [DEBUG] clck_gen.py:128 IND CLOCK 2448
2025-03-30 07:24:21 [DEBUG] clck_gen.py:128 IND CLOCK 2550
2025-03-30 07:24:21 [DEBUG] clck_gen.py:128 IND CLOCK 2652
2025-03-30 07:24:22 [DEBUG] clck_gen.py:128 IND CLOCK 2754
2025-03-30 07:24:22 [DEBUG] clck_gen.py:128 IND CLOCK 2856
2025-03-30 07:24:23 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:24:23 [DEBUG] clck_gen.py:128 IND CLOCK 2958
2025-03-30 07:24:23 [DEBUG] clck_gen.py:128 IND CLOCK 3060
2025-03-30 07:24:24 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:24:24 [DEBUG] clck_gen.py:128 IND CLOCK 3162
2025-03-30 07:24:24 [DEBUG] clck_gen.py:128 IND CLOCK 3264
2025-03-30 07:24:25 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:24:25 [DEBUG] clck_gen.py:128 IND CLOCK 3366
2025-03-30 07:24:25 [DEBUG] clck_gen.py:128 IND CLOCK 3468
2025-03-30 07:24:26 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:24:26 [DEBUG] clck_gen.py:128 IND CLOCK 3570
2025-03-30 07:24:26 [DEBUG] clck_gen.py:128 IND CLOCK 3672
2025-03-30 07:24:26 [DEBUG] clck_gen.py:128 IND CLOCK 3774
2025-03-30 07:24:27 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:24:27 [DEBUG] clck_gen.py:128 IND CLOCK 3876
2025-03-30 07:24:27 [DEBUG] clck_gen.py:128 IND CLOCK 3978
2025-03-30 07:24:28 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:24:28 [DEBUG] clck_gen.py:128 IND CLOCK 4080
2025-03-30 07:24:28 [DEBUG] clck_gen.py:128 IND CLOCK 4182
2025-03-30 07:24:29 [DEBUG] clck_gen.py:128 IND CLOCK 4284
2025-03-30 07:24:29 [DEBUG] clck_gen.py:128 IND CLOCK 4386
2025-03-30 07:24:30 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:24:30 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:24:30 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:24:30 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:24:30 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:24:30 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:24:30 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:24:30 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:24:30 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:24:30 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:24:30 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 07:24:30 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 07:24:30 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 07:24:30 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=4458 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:24:30 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=4458 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:24:30 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=4458 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:24:30 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=4458 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:24:30 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=4458 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:24:30 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=4458 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:24:30 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=4458 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:24:30 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=4458 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:24:35 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 07:24:35 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 07:24:35 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:24:35 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:24:35 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:24:35 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:24:35 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:24:35 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 07:24:35 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:24:35 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 07:24:35 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 07:24:35 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 07:24:35 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 07:24:35 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 07:24:35 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:24:35 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:24:35 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 07:24:35 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 07:24:35 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 07:24:35 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 07:24:35 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 07:24:35 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 07:24:35 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:24:35 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:24:35 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 07:24:35 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 07:24:35 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 07:24:35 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 07:24:35 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 07:24:35 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 07:24:35 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:24:35 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:24:35 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 07:24:35 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 07:24:35 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 07:24:35 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 07:24:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 07:24:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 07:24:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 07:24:35 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 07:24:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 07:24:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 07:24:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 07:24:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:24:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 07:24:35 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 07:24:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:24:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:24:35 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 07:24:35 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 07:24:35 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 07:24:35 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 07:24:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:24:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:24:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:24:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 07:24:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:24:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:24:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:24:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:24:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:24:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:24:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:24:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:24:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:24:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:24:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:24:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:24:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:24:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:24:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:24:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:24:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:24:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:24:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:24:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:24:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:24:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:24:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:24:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:24:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:24:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:24:35 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-03-30 07:24:35 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-03-30 07:24:35 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-03-30 07:24:35 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-03-30 07:24:35 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-03-30 07:24:35 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-03-30 07:24:35 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-03-30 07:24:35 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-03-30 07:24:35 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-03-30 07:24:35 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-03-30 07:24:35 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=0 bl=148 pwr=0
2025-03-30 07:24:35 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=1 bl=148 pwr=0
2025-03-30 07:24:35 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=2 bl=148 pwr=0
2025-03-30 07:24:35 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=3 bl=148 pwr=0
2025-03-30 07:24:35 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=4 bl=148 pwr=0
2025-03-30 07:24:35 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=5 bl=148 pwr=0
2025-03-30 07:24:35 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=6 bl=148 pwr=0
2025-03-30 07:24:35 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=7 bl=148 pwr=0
2025-03-30 07:24:35 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 07:24:35 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 07:24:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:24:35 [DEBUG] fake_trx.py:317 (BTS@172.18.26.20:5700) Recv FAKE_CI cmd
2025-03-30 07:24:35 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:24:35 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:24:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:24:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:24:35 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:24:35 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:24:35 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 07:24:35 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 07:24:35 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 07:24:35 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 07:24:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD NOHANDOVER
2025-03-30 07:24:35 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:24:35 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:24:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:24:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:24:35 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=132 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-03-30 07:24:35 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=135 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-03-30 07:24:35 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=138 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-03-30 07:24:35 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=141 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-03-30 07:24:35 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=144 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-03-30 07:24:35 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=147 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-03-30 07:24:35 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=150 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-03-30 07:24:35 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=153 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-03-30 07:24:35 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=156 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-03-30 07:24:35 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=159 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-03-30 07:24:35 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=162 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-03-30 07:24:35 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=165 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-03-30 07:24:35 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=171 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-03-30 07:24:35 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=174 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-03-30 07:24:35 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=177 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-03-30 07:24:36 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=180 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-03-30 07:24:36 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=183 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-03-30 07:24:36 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=186 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-03-30 07:24:36 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=189 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-03-30 07:24:36 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=192 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-03-30 07:24:36 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=195 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-03-30 07:24:36 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=198 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-03-30 07:24:36 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=201 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-03-30 07:24:36 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-03-30 07:24:36 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=204 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-03-30 07:24:36 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=210 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-03-30 07:24:36 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=213 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-03-30 07:24:36 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=216 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-03-30 07:24:36 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:24:36 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:24:36 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:24:36 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:24:36 [DEBUG] clck_gen.py:128 IND CLOCK 306
2025-03-30 07:24:37 [DEBUG] clck_gen.py:128 IND CLOCK 408
2025-03-30 07:24:37 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:24:37 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:24:37 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:24:37 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:24:37 [DEBUG] clck_gen.py:128 IND CLOCK 510
2025-03-30 07:24:37 [DEBUG] clck_gen.py:128 IND CLOCK 612
2025-03-30 07:24:38 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:24:38 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:24:38 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:24:38 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:24:38 [DEBUG] clck_gen.py:128 IND CLOCK 714
2025-03-30 07:24:38 [DEBUG] clck_gen.py:128 IND CLOCK 816
2025-03-30 07:24:39 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:24:39 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:24:39 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:24:39 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:24:39 [DEBUG] clck_gen.py:128 IND CLOCK 918
2025-03-30 07:24:39 [DEBUG] clck_gen.py:128 IND CLOCK 1020
2025-03-30 07:24:40 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:24:40 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:24:40 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:24:40 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:24:40 [DEBUG] clck_gen.py:128 IND CLOCK 1122
2025-03-30 07:24:40 [DEBUG] clck_gen.py:128 IND CLOCK 1224
2025-03-30 07:24:41 [DEBUG] clck_gen.py:128 IND CLOCK 1326
2025-03-30 07:24:41 [DEBUG] clck_gen.py:128 IND CLOCK 1428
2025-03-30 07:24:42 [DEBUG] clck_gen.py:128 IND CLOCK 1530
2025-03-30 07:24:42 [DEBUG] clck_gen.py:128 IND CLOCK 1632
2025-03-30 07:24:43 [DEBUG] clck_gen.py:128 IND CLOCK 1734
2025-03-30 07:24:43 [DEBUG] clck_gen.py:128 IND CLOCK 1836
2025-03-30 07:24:43 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:24:43 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:24:43 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:24:43 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:24:43 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:24:43 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:24:43 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:24:43 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:24:43 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:24:43 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 07:24:43 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 07:24:43 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 07:24:43 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:24:48 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 07:24:48 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 07:24:48 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:24:48 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:24:48 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:24:48 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:24:48 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:24:48 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 07:24:48 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:24:48 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 07:24:48 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 07:24:48 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 07:24:48 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 07:24:48 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 07:24:48 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:24:48 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:24:48 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 07:24:48 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 07:24:48 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 07:24:48 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 07:24:48 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 07:24:48 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 07:24:48 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:24:48 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:24:48 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 07:24:48 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 07:24:48 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 07:24:48 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 07:24:48 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 07:24:48 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 07:24:48 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:24:48 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:24:48 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 07:24:48 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 07:24:48 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 07:24:48 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 07:24:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 07:24:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 07:24:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 07:24:48 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 07:24:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 07:24:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 07:24:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 07:24:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 07:24:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:24:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:24:48 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 07:24:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:24:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:24:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:24:48 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 07:24:48 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 07:24:48 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 07:24:48 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 07:24:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:24:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:24:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:24:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 07:24:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:24:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:24:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:24:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:24:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:24:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:24:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:24:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:24:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:24:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:24:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:24:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:24:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:24:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:24:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:24:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:24:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:24:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:24:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:24:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:24:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:24:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:24:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:24:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:24:48 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-03-30 07:24:49 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-03-30 07:24:49 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-03-30 07:24:49 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-03-30 07:24:49 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-03-30 07:24:49 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-03-30 07:24:49 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-03-30 07:24:49 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-03-30 07:24:49 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-03-30 07:24:49 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-03-30 07:24:49 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 07:24:49 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 07:24:49 [DEBUG] fake_trx.py:317 (BTS@172.18.26.20:5700) Recv FAKE_CI cmd
2025-03-30 07:24:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:24:49 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:24:49 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:24:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:24:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:24:49 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:24:49 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:24:49 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 07:24:49 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 07:24:49 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 07:24:49 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 07:24:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD NOHANDOVER
2025-03-30 07:24:49 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:24:49 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:24:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:24:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:24:49 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=132 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-03-30 07:24:49 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=135 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-03-30 07:24:49 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=138 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-03-30 07:24:49 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=141 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-03-30 07:24:49 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=144 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-03-30 07:24:49 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=147 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-03-30 07:24:49 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=150 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-03-30 07:24:49 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=153 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-03-30 07:24:49 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=156 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-03-30 07:24:49 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=159 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-03-30 07:24:49 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=162 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-03-30 07:24:49 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=165 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-03-30 07:24:49 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=171 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-03-30 07:24:49 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=174 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-03-30 07:24:49 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=177 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-03-30 07:24:49 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=180 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-03-30 07:24:49 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=183 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-03-30 07:24:49 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=186 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-03-30 07:24:49 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=189 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-03-30 07:24:49 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=192 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-03-30 07:24:49 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=195 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-03-30 07:24:49 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=198 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-03-30 07:24:49 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=201 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-03-30 07:24:49 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-03-30 07:24:49 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=204 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-03-30 07:24:49 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=210 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-03-30 07:24:49 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=213 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-03-30 07:24:49 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=216 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-03-30 07:24:49 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:24:49 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:24:49 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:24:49 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:24:50 [DEBUG] clck_gen.py:128 IND CLOCK 306
2025-03-30 07:24:50 [DEBUG] clck_gen.py:128 IND CLOCK 408
2025-03-30 07:24:50 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:24:50 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:24:50 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:24:50 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:24:50 [WARNING] transceiver.py:330 (MS@172.18.26.22:6700) Stale TRXD message (fn=455): fn=452 tn=0 bl=148 pwr=0
2025-03-30 07:24:51 [DEBUG] clck_gen.py:128 IND CLOCK 510
2025-03-30 07:24:51 [DEBUG] clck_gen.py:128 IND CLOCK 612
2025-03-30 07:24:51 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:24:51 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:24:51 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:24:51 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:24:52 [DEBUG] clck_gen.py:128 IND CLOCK 714
2025-03-30 07:24:52 [DEBUG] clck_gen.py:128 IND CLOCK 816
2025-03-30 07:24:52 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:24:52 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:24:52 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:24:52 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:24:53 [DEBUG] clck_gen.py:128 IND CLOCK 918
2025-03-30 07:24:53 [DEBUG] clck_gen.py:128 IND CLOCK 1020
2025-03-30 07:24:53 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:24:53 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:24:53 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:24:53 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:24:53 [DEBUG] clck_gen.py:128 IND CLOCK 1122
2025-03-30 07:24:54 [DEBUG] clck_gen.py:128 IND CLOCK 1224
2025-03-30 07:24:54 [DEBUG] clck_gen.py:128 IND CLOCK 1326
2025-03-30 07:24:55 [DEBUG] clck_gen.py:128 IND CLOCK 1428
2025-03-30 07:24:55 [DEBUG] clck_gen.py:128 IND CLOCK 1530
2025-03-30 07:24:56 [DEBUG] clck_gen.py:128 IND CLOCK 1632
2025-03-30 07:24:56 [DEBUG] clck_gen.py:128 IND CLOCK 1734
2025-03-30 07:24:57 [DEBUG] clck_gen.py:128 IND CLOCK 1836
2025-03-30 07:24:57 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:24:57 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:24:57 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:24:57 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:24:57 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:24:57 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:24:57 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:24:57 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:24:57 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:24:57 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:24:57 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 07:24:57 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 07:24:57 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 07:25:02 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 07:25:02 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 07:25:02 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:25:02 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:25:02 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:25:02 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:25:02 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:25:02 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 07:25:02 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:25:02 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 07:25:02 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 07:25:02 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 07:25:02 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 07:25:02 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 07:25:02 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:25:02 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:25:02 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 07:25:02 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 07:25:02 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 07:25:02 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 07:25:02 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 07:25:02 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 07:25:02 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:25:02 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:25:02 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 07:25:02 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 07:25:02 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 07:25:02 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 07:25:02 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 07:25:02 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 07:25:02 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:25:02 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:25:02 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 07:25:02 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 07:25:02 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 07:25:02 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 07:25:02 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 07:25:02 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 07:25:02 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 07:25:02 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 07:25:02 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 07:25:02 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 07:25:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 07:25:02 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:25:02 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 07:25:02 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 07:25:02 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:25:02 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:25:02 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 07:25:02 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 07:25:02 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 07:25:02 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 07:25:02 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:25:02 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:25:02 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:25:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 07:25:02 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:25:02 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:25:02 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:25:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:25:02 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:25:02 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:25:02 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:25:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:25:02 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:25:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:25:02 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:25:02 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:25:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:25:02 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:25:02 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:25:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:25:02 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:25:02 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:25:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:25:02 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:25:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:25:02 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:25:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:25:02 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:25:02 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:25:02 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:25:02 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-03-30 07:25:02 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-03-30 07:25:02 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-03-30 07:25:02 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-03-30 07:25:02 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-03-30 07:25:02 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-03-30 07:25:02 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-03-30 07:25:02 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-03-30 07:25:02 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-03-30 07:25:02 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-03-30 07:25:02 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=0 bl=148 pwr=0
2025-03-30 07:25:02 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=1 bl=148 pwr=0
2025-03-30 07:25:02 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=2 bl=148 pwr=0
2025-03-30 07:25:02 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=3 bl=148 pwr=0
2025-03-30 07:25:02 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=4 bl=148 pwr=0
2025-03-30 07:25:02 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=5 bl=148 pwr=0
2025-03-30 07:25:02 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=6 bl=148 pwr=0
2025-03-30 07:25:02 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=7 bl=148 pwr=0
2025-03-30 07:25:02 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 07:25:02 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 07:25:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:25:02 [DEBUG] fake_trx.py:317 (BTS@172.18.26.20:5700) Recv FAKE_CI cmd
2025-03-30 07:25:02 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:25:02 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:25:02 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:25:02 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:25:02 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:25:02 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:25:02 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 07:25:02 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 07:25:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:25:03 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:25:03 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:25:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:25:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:25:03 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-03-30 07:25:03 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:25:03 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:25:03 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:25:03 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:25:03 [DEBUG] clck_gen.py:128 IND CLOCK 306
2025-03-30 07:25:04 [DEBUG] clck_gen.py:128 IND CLOCK 408
2025-03-30 07:25:04 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:25:04 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:25:04 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:25:04 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:25:04 [DEBUG] clck_gen.py:128 IND CLOCK 510
2025-03-30 07:25:05 [DEBUG] clck_gen.py:128 IND CLOCK 612
2025-03-30 07:25:05 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:25:05 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:25:05 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:25:05 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:25:05 [DEBUG] clck_gen.py:128 IND CLOCK 714
2025-03-30 07:25:06 [DEBUG] clck_gen.py:128 IND CLOCK 816
2025-03-30 07:25:06 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:25:06 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:25:06 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:25:06 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:25:06 [DEBUG] clck_gen.py:128 IND CLOCK 918
2025-03-30 07:25:07 [DEBUG] clck_gen.py:128 IND CLOCK 1020
2025-03-30 07:25:07 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:25:07 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:25:07 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:25:07 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:25:07 [DEBUG] clck_gen.py:128 IND CLOCK 1122
2025-03-30 07:25:08 [DEBUG] clck_gen.py:128 IND CLOCK 1224
2025-03-30 07:25:08 [DEBUG] clck_gen.py:128 IND CLOCK 1326
2025-03-30 07:25:09 [DEBUG] clck_gen.py:128 IND CLOCK 1428
2025-03-30 07:25:09 [DEBUG] clck_gen.py:128 IND CLOCK 1530
2025-03-30 07:25:09 [DEBUG] clck_gen.py:128 IND CLOCK 1632
2025-03-30 07:25:10 [DEBUG] clck_gen.py:128 IND CLOCK 1734
2025-03-30 07:25:10 [DEBUG] clck_gen.py:128 IND CLOCK 1836
2025-03-30 07:25:11 [DEBUG] clck_gen.py:128 IND CLOCK 1938
2025-03-30 07:25:11 [DEBUG] clck_gen.py:128 IND CLOCK 2040
2025-03-30 07:25:12 [DEBUG] clck_gen.py:128 IND CLOCK 2142
2025-03-30 07:25:12 [DEBUG] clck_gen.py:128 IND CLOCK 2244
2025-03-30 07:25:13 [DEBUG] clck_gen.py:128 IND CLOCK 2346
2025-03-30 07:25:13 [DEBUG] clck_gen.py:128 IND CLOCK 2448
2025-03-30 07:25:14 [DEBUG] clck_gen.py:128 IND CLOCK 2550
2025-03-30 07:25:14 [DEBUG] clck_gen.py:128 IND CLOCK 2652
2025-03-30 07:25:15 [DEBUG] clck_gen.py:128 IND CLOCK 2754
2025-03-30 07:25:15 [DEBUG] clck_gen.py:128 IND CLOCK 2856
2025-03-30 07:25:16 [DEBUG] clck_gen.py:128 IND CLOCK 2958
2025-03-30 07:25:16 [DEBUG] clck_gen.py:128 IND CLOCK 3060
2025-03-30 07:25:17 [DEBUG] clck_gen.py:128 IND CLOCK 3162
2025-03-30 07:25:17 [DEBUG] clck_gen.py:128 IND CLOCK 3264
2025-03-30 07:25:17 [DEBUG] clck_gen.py:128 IND CLOCK 3366
2025-03-30 07:25:18 [DEBUG] clck_gen.py:128 IND CLOCK 3468
2025-03-30 07:25:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:25:18 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:25:18 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:25:18 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:25:18 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:25:18 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:25:18 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:25:18 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:25:18 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:25:18 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:25:18 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 07:25:18 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 07:25:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:25:18 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.26.22:6700) Recv SETFH cmd
2025-03-30 07:25:18 [INFO] transceiver.py:237 (MS@172.18.26.22:6700) Frequency hopping configured: hsn=2, maio=0, ma_len=2
2025-03-30 07:25:18 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:25:18 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:25:18 [DEBUG] clck_gen.py:128 IND CLOCK 3570
2025-03-30 07:25:19 [DEBUG] clck_gen.py:128 IND CLOCK 3672
2025-03-30 07:25:19 [DEBUG] clck_gen.py:128 IND CLOCK 3774
2025-03-30 07:25:20 [DEBUG] clck_gen.py:128 IND CLOCK 3876
2025-03-30 07:25:20 [DEBUG] clck_gen.py:128 IND CLOCK 3978
2025-03-30 07:25:21 [DEBUG] clck_gen.py:128 IND CLOCK 4080
2025-03-30 07:25:21 [DEBUG] clck_gen.py:128 IND CLOCK 4182
2025-03-30 07:25:22 [DEBUG] clck_gen.py:128 IND CLOCK 4284
2025-03-30 07:25:22 [DEBUG] clck_gen.py:128 IND CLOCK 4386
2025-03-30 07:25:23 [DEBUG] clck_gen.py:128 IND CLOCK 4488
2025-03-30 07:25:23 [DEBUG] clck_gen.py:128 IND CLOCK 4590
2025-03-30 07:25:24 [DEBUG] clck_gen.py:128 IND CLOCK 4692
2025-03-30 07:25:24 [DEBUG] clck_gen.py:128 IND CLOCK 4794
2025-03-30 07:25:25 [DEBUG] clck_gen.py:128 IND CLOCK 4896
2025-03-30 07:25:25 [DEBUG] clck_gen.py:128 IND CLOCK 4998
2025-03-30 07:25:25 [DEBUG] clck_gen.py:128 IND CLOCK 5100
2025-03-30 07:25:25 [WARNING] clck_gen.py:108 CLCKGen: time overrun by -12374us; resetting the clock
2025-03-30 07:25:26 [DEBUG] clck_gen.py:128 IND CLOCK 5202
2025-03-30 07:25:26 [DEBUG] clck_gen.py:128 IND CLOCK 5304
2025-03-30 07:25:27 [DEBUG] clck_gen.py:128 IND CLOCK 5406
2025-03-30 07:25:27 [DEBUG] clck_gen.py:128 IND CLOCK 5508
2025-03-30 07:25:28 [DEBUG] clck_gen.py:128 IND CLOCK 5610
2025-03-30 07:25:28 [DEBUG] clck_gen.py:128 IND CLOCK 5712
2025-03-30 07:25:29 [DEBUG] clck_gen.py:128 IND CLOCK 5814
2025-03-30 07:25:29 [DEBUG] clck_gen.py:128 IND CLOCK 5916
2025-03-30 07:25:30 [DEBUG] clck_gen.py:128 IND CLOCK 6018
2025-03-30 07:25:30 [DEBUG] clck_gen.py:128 IND CLOCK 6120
2025-03-30 07:25:31 [DEBUG] clck_gen.py:128 IND CLOCK 6222
2025-03-30 07:25:31 [DEBUG] clck_gen.py:128 IND CLOCK 6324
2025-03-30 07:25:32 [DEBUG] clck_gen.py:128 IND CLOCK 6426
2025-03-30 07:25:32 [DEBUG] clck_gen.py:128 IND CLOCK 6528
2025-03-30 07:25:33 [DEBUG] clck_gen.py:128 IND CLOCK 6630
2025-03-30 07:25:33 [DEBUG] clck_gen.py:128 IND CLOCK 6732
2025-03-30 07:25:33 [DEBUG] clck_gen.py:128 IND CLOCK 6834
2025-03-30 07:25:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:25:34 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:25:34 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:25:34 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:25:34 [INFO] transceiver.py:241 (MS@172.18.26.22:6700) Frequency hopping disabled
2025-03-30 07:25:34 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:25:34 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:25:34 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:25:34 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:25:34 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:25:34 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:25:34 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 07:25:34 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 07:25:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:25:34 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.26.22:6700) Recv SETFH cmd
2025-03-30 07:25:34 [INFO] transceiver.py:237 (MS@172.18.26.22:6700) Frequency hopping configured: hsn=3, maio=3, ma_len=4
2025-03-30 07:25:34 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:25:34 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:25:34 [DEBUG] clck_gen.py:128 IND CLOCK 6936
2025-03-30 07:25:34 [DEBUG] clck_gen.py:128 IND CLOCK 7038
2025-03-30 07:25:35 [DEBUG] clck_gen.py:128 IND CLOCK 7140
2025-03-30 07:25:35 [DEBUG] clck_gen.py:128 IND CLOCK 7242
2025-03-30 07:25:36 [DEBUG] clck_gen.py:128 IND CLOCK 7344
2025-03-30 07:25:36 [DEBUG] clck_gen.py:128 IND CLOCK 7446
2025-03-30 07:25:37 [DEBUG] clck_gen.py:128 IND CLOCK 7548
2025-03-30 07:25:37 [DEBUG] clck_gen.py:128 IND CLOCK 7650
2025-03-30 07:25:38 [DEBUG] clck_gen.py:128 IND CLOCK 7752
2025-03-30 07:25:38 [DEBUG] clck_gen.py:128 IND CLOCK 7854
2025-03-30 07:25:39 [DEBUG] clck_gen.py:128 IND CLOCK 7956
2025-03-30 07:25:39 [DEBUG] clck_gen.py:128 IND CLOCK 8058
2025-03-30 07:25:40 [DEBUG] clck_gen.py:128 IND CLOCK 8160
2025-03-30 07:25:40 [DEBUG] clck_gen.py:128 IND CLOCK 8262
2025-03-30 07:25:41 [DEBUG] clck_gen.py:128 IND CLOCK 8364
2025-03-30 07:25:41 [DEBUG] clck_gen.py:128 IND CLOCK 8466
2025-03-30 07:25:41 [DEBUG] clck_gen.py:128 IND CLOCK 8568
2025-03-30 07:25:42 [DEBUG] clck_gen.py:128 IND CLOCK 8670
2025-03-30 07:25:42 [DEBUG] clck_gen.py:128 IND CLOCK 8772
2025-03-30 07:25:43 [DEBUG] clck_gen.py:128 IND CLOCK 8874
2025-03-30 07:25:43 [DEBUG] clck_gen.py:128 IND CLOCK 8976
2025-03-30 07:25:44 [DEBUG] clck_gen.py:128 IND CLOCK 9078
2025-03-30 07:25:44 [DEBUG] clck_gen.py:128 IND CLOCK 9180
2025-03-30 07:25:45 [DEBUG] clck_gen.py:128 IND CLOCK 9282
2025-03-30 07:25:45 [DEBUG] clck_gen.py:128 IND CLOCK 9384
2025-03-30 07:25:46 [DEBUG] clck_gen.py:128 IND CLOCK 9486
2025-03-30 07:25:46 [DEBUG] clck_gen.py:128 IND CLOCK 9588
2025-03-30 07:25:47 [DEBUG] clck_gen.py:128 IND CLOCK 9690
2025-03-30 07:25:47 [DEBUG] clck_gen.py:128 IND CLOCK 9792
2025-03-30 07:25:48 [DEBUG] clck_gen.py:128 IND CLOCK 9894
2025-03-30 07:25:48 [DEBUG] clck_gen.py:128 IND CLOCK 9996
2025-03-30 07:25:49 [DEBUG] clck_gen.py:128 IND CLOCK 10098
2025-03-30 07:25:49 [DEBUG] clck_gen.py:128 IND CLOCK 10200
2025-03-30 07:25:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:25:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:25:49 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:25:49 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:25:49 [INFO] transceiver.py:241 (MS@172.18.26.22:6700) Frequency hopping disabled
2025-03-30 07:25:49 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:25:49 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:25:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:25:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:25:49 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:25:49 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:25:49 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 07:25:49 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 07:25:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:25:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:25:49 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:25:49 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:25:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:25:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:25:49 [DEBUG] clck_gen.py:128 IND CLOCK 10302
2025-03-30 07:25:50 [DEBUG] clck_gen.py:128 IND CLOCK 10404
2025-03-30 07:25:50 [DEBUG] clck_gen.py:128 IND CLOCK 10506
2025-03-30 07:25:51 [DEBUG] clck_gen.py:128 IND CLOCK 10608
2025-03-30 07:25:51 [DEBUG] clck_gen.py:128 IND CLOCK 10710
2025-03-30 07:25:52 [DEBUG] clck_gen.py:128 IND CLOCK 10812
2025-03-30 07:25:52 [DEBUG] clck_gen.py:128 IND CLOCK 10914
2025-03-30 07:25:53 [DEBUG] clck_gen.py:128 IND CLOCK 11016
2025-03-30 07:25:53 [DEBUG] clck_gen.py:128 IND CLOCK 11118
2025-03-30 07:25:54 [DEBUG] clck_gen.py:128 IND CLOCK 11220
2025-03-30 07:25:54 [DEBUG] clck_gen.py:128 IND CLOCK 11322
2025-03-30 07:25:55 [DEBUG] clck_gen.py:128 IND CLOCK 11424
2025-03-30 07:25:55 [DEBUG] clck_gen.py:128 IND CLOCK 11526
2025-03-30 07:25:56 [DEBUG] clck_gen.py:128 IND CLOCK 11628
2025-03-30 07:25:56 [DEBUG] clck_gen.py:128 IND CLOCK 11730
2025-03-30 07:25:57 [DEBUG] clck_gen.py:128 IND CLOCK 11832
2025-03-30 07:25:57 [DEBUG] clck_gen.py:128 IND CLOCK 11934
2025-03-30 07:25:58 [DEBUG] clck_gen.py:128 IND CLOCK 12036
2025-03-30 07:25:58 [DEBUG] clck_gen.py:128 IND CLOCK 12138
2025-03-30 07:25:58 [DEBUG] clck_gen.py:128 IND CLOCK 12240
2025-03-30 07:25:59 [DEBUG] clck_gen.py:128 IND CLOCK 12342
2025-03-30 07:25:59 [DEBUG] clck_gen.py:128 IND CLOCK 12444
2025-03-30 07:26:00 [DEBUG] clck_gen.py:128 IND CLOCK 12546
2025-03-30 07:26:00 [DEBUG] clck_gen.py:128 IND CLOCK 12648
2025-03-30 07:26:01 [DEBUG] clck_gen.py:128 IND CLOCK 12750
2025-03-30 07:26:01 [DEBUG] clck_gen.py:128 IND CLOCK 12852
2025-03-30 07:26:02 [DEBUG] clck_gen.py:128 IND CLOCK 12954
2025-03-30 07:26:02 [DEBUG] clck_gen.py:128 IND CLOCK 13056
2025-03-30 07:26:03 [DEBUG] clck_gen.py:128 IND CLOCK 13158
2025-03-30 07:26:03 [DEBUG] clck_gen.py:128 IND CLOCK 13260
2025-03-30 07:26:04 [DEBUG] clck_gen.py:128 IND CLOCK 13362
2025-03-30 07:26:04 [DEBUG] clck_gen.py:128 IND CLOCK 13464
2025-03-30 07:26:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:26:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:26:05 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:26:05 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:26:05 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:26:05 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:26:05 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:26:05 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:26:05 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:26:05 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:26:05 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 07:26:05 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 07:26:05 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 07:26:05 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:26:05 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:26:05 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=13563 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:26:05 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=13563 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:26:05 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=13563 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:26:05 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=13563 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:26:05 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=13563 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:26:05 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=13563 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:26:05 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=13563 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:26:05 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=13564 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:26:05 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=13564 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:26:05 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=13564 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:26:05 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=13564 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:26:05 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=13564 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:26:05 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=13564 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:26:05 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=13564 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:26:05 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=13564 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:26:10 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 07:26:10 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 07:26:10 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:26:10 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:26:10 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:26:10 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:26:10 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:26:10 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 07:26:10 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:26:10 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 07:26:10 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 07:26:10 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 07:26:10 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 07:26:10 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 07:26:10 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:26:10 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:26:10 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 07:26:10 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 07:26:10 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 07:26:10 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 07:26:10 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 07:26:10 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 07:26:10 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:26:10 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:26:10 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 07:26:10 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 07:26:10 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 07:26:10 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 07:26:10 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 07:26:10 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 07:26:10 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:26:10 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:26:10 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 07:26:10 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 07:26:10 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 07:26:10 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 07:26:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 07:26:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 07:26:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 07:26:10 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 07:26:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 07:26:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 07:26:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 07:26:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:26:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 07:26:10 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 07:26:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:26:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:26:10 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 07:26:10 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 07:26:10 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 07:26:10 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 07:26:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:26:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:26:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:26:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 07:26:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:26:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:26:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:26:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:26:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:26:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:26:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:26:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:26:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:26:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:26:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:26:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:26:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:26:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:26:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:26:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:26:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:26:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:26:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:26:10 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:26:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:26:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:26:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:26:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:26:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:26:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:26:10 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:26:10 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:26:10 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 07:26:10 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 07:26:10 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 07:26:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:26:15 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 07:26:15 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 07:26:15 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:26:15 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:26:15 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:26:15 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:26:15 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:26:15 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 07:26:15 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:26:15 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 07:26:15 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 07:26:15 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 07:26:15 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 07:26:15 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 07:26:15 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:26:15 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:26:15 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 07:26:15 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 07:26:15 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 07:26:15 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 07:26:15 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 07:26:15 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 07:26:15 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:26:15 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:26:15 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 07:26:15 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 07:26:15 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 07:26:15 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 07:26:15 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 07:26:15 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 07:26:15 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:26:15 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:26:15 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 07:26:15 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 07:26:15 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 07:26:15 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 07:26:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 07:26:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 07:26:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 07:26:15 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 07:26:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 07:26:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 07:26:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 07:26:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:26:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 07:26:15 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 07:26:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:26:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:26:15 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 07:26:15 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 07:26:15 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 07:26:15 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 07:26:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:26:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:26:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:26:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 07:26:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:26:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:26:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:26:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:26:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:26:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:26:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:26:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:26:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:26:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:26:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:26:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:26:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:26:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:26:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:26:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:26:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:26:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:26:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:26:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:26:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:26:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:26:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:26:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:26:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:26:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:26:15 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-03-30 07:26:15 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-03-30 07:26:15 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-03-30 07:26:15 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-03-30 07:26:15 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-03-30 07:26:15 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-03-30 07:26:15 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-03-30 07:26:15 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-03-30 07:26:15 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-03-30 07:26:15 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-03-30 07:26:15 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=0 bl=148 pwr=0
2025-03-30 07:26:15 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=1 bl=148 pwr=0
2025-03-30 07:26:15 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=2 bl=148 pwr=0
2025-03-30 07:26:15 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=3 bl=148 pwr=0
2025-03-30 07:26:15 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=4 bl=148 pwr=0
2025-03-30 07:26:15 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=5 bl=148 pwr=0
2025-03-30 07:26:15 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=6 bl=148 pwr=0
2025-03-30 07:26:15 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=7 bl=148 pwr=0
2025-03-30 07:26:15 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 07:26:15 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 07:26:15 [DEBUG] fake_trx.py:317 (BTS@172.18.26.20:5700) Recv FAKE_CI cmd
2025-03-30 07:26:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:26:15 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:26:15 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:26:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:26:15 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 07:26:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:26:15 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:26:15 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:26:15 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 07:26:15 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 07:26:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:26:15 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:26:15 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:26:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:26:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:26:16 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-03-30 07:26:16 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:26:16 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:26:16 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:26:16 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:26:16 [DEBUG] clck_gen.py:128 IND CLOCK 306
2025-03-30 07:26:17 [DEBUG] clck_gen.py:128 IND CLOCK 408
2025-03-30 07:26:17 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:26:17 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:26:17 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:26:17 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:26:17 [DEBUG] clck_gen.py:128 IND CLOCK 510
2025-03-30 07:26:17 [DEBUG] clck_gen.py:128 IND CLOCK 612
2025-03-30 07:26:18 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:26:18 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:26:18 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:26:18 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:26:18 [DEBUG] clck_gen.py:128 IND CLOCK 714
2025-03-30 07:26:18 [DEBUG] clck_gen.py:128 IND CLOCK 816
2025-03-30 07:26:19 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:26:19 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:26:19 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:26:19 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:26:19 [DEBUG] clck_gen.py:128 IND CLOCK 918
2025-03-30 07:26:19 [DEBUG] clck_gen.py:128 IND CLOCK 1020
2025-03-30 07:26:20 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:26:20 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:26:20 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:26:20 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:26:20 [DEBUG] clck_gen.py:128 IND CLOCK 1122
2025-03-30 07:26:20 [DEBUG] clck_gen.py:128 IND CLOCK 1224
2025-03-30 07:26:21 [DEBUG] clck_gen.py:128 IND CLOCK 1326
2025-03-30 07:26:21 [DEBUG] clck_gen.py:128 IND CLOCK 1428
2025-03-30 07:26:22 [DEBUG] clck_gen.py:128 IND CLOCK 1530
2025-03-30 07:26:22 [DEBUG] clck_gen.py:128 IND CLOCK 1632
2025-03-30 07:26:23 [DEBUG] clck_gen.py:128 IND CLOCK 1734
2025-03-30 07:26:23 [DEBUG] clck_gen.py:128 IND CLOCK 1836
2025-03-30 07:26:24 [DEBUG] clck_gen.py:128 IND CLOCK 1938
2025-03-30 07:26:24 [DEBUG] clck_gen.py:128 IND CLOCK 2040
2025-03-30 07:26:25 [DEBUG] clck_gen.py:128 IND CLOCK 2142
2025-03-30 07:26:25 [DEBUG] clck_gen.py:128 IND CLOCK 2244
2025-03-30 07:26:25 [DEBUG] clck_gen.py:128 IND CLOCK 2346
2025-03-30 07:26:26 [DEBUG] clck_gen.py:128 IND CLOCK 2448
2025-03-30 07:26:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:26:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:26:26 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:26:26 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:26:26 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:26:26 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:26:26 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:26:26 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:26:26 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:26:26 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:26:26 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:26:26 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:26:26 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 07:26:26 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 07:26:26 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 07:26:26 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=2486 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:26:26 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=2486 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:26:26 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=2486 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:26:26 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=2486 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:26:26 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=2486 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:26:26 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=2486 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:26:26 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=2486 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:26:26 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=2486 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:26:31 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 07:26:31 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 07:26:31 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:26:31 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:26:31 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:26:31 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:26:31 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:26:31 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 07:26:31 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:26:31 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 07:26:31 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 07:26:31 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 07:26:31 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 07:26:31 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 07:26:31 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:26:31 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:26:31 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 07:26:31 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 07:26:31 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 07:26:31 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 07:26:31 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 07:26:31 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 07:26:31 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:26:31 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:26:31 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 07:26:31 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 07:26:31 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 07:26:31 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 07:26:31 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 07:26:31 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 07:26:31 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:26:31 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 07:26:31 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:26:31 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 07:26:31 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 07:26:31 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 07:26:31 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 07:26:31 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 07:26:31 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 07:26:31 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 07:26:31 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 07:26:31 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 07:26:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 07:26:31 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:26:31 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 07:26:31 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 07:26:31 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:26:31 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:26:31 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 07:26:31 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 07:26:31 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 07:26:31 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 07:26:31 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:26:31 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:26:31 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:26:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 07:26:31 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:26:31 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:26:31 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:26:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:26:31 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:26:31 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:26:31 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:26:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:26:31 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:26:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:26:31 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:26:31 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:26:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:26:31 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:26:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:26:31 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:26:31 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:26:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:26:31 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:26:31 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:26:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:26:31 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:26:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:26:31 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:26:31 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:26:31 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:26:31 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-03-30 07:26:32 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-03-30 07:26:32 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-03-30 07:26:32 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-03-30 07:26:32 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-03-30 07:26:32 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-03-30 07:26:32 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-03-30 07:26:32 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-03-30 07:26:32 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-03-30 07:26:32 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-03-30 07:26:32 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=0 bl=148 pwr=0
2025-03-30 07:26:32 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=1 bl=148 pwr=0
2025-03-30 07:26:32 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=2 bl=148 pwr=0
2025-03-30 07:26:32 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=3 bl=148 pwr=0
2025-03-30 07:26:32 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=4 bl=148 pwr=0
2025-03-30 07:26:32 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=5 bl=148 pwr=0
2025-03-30 07:26:32 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=6 bl=148 pwr=0
2025-03-30 07:26:32 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=7 bl=148 pwr=0
2025-03-30 07:26:32 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 07:26:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:26:32 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 07:26:32 [DEBUG] fake_trx.py:317 (BTS@172.18.26.20:5700) Recv FAKE_CI cmd
2025-03-30 07:26:32 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:26:32 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:26:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:26:32 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 07:26:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:26:32 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:26:32 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:26:32 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 07:26:32 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 07:26:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:26:32 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:26:32 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:26:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:26:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:26:32 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-03-30 07:26:32 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:26:32 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:26:32 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:26:32 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:26:33 [DEBUG] clck_gen.py:128 IND CLOCK 306
2025-03-30 07:26:33 [DEBUG] clck_gen.py:128 IND CLOCK 408
2025-03-30 07:26:33 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:26:33 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:26:33 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:26:33 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:26:33 [DEBUG] clck_gen.py:128 IND CLOCK 510
2025-03-30 07:26:34 [DEBUG] clck_gen.py:128 IND CLOCK 612
2025-03-30 07:26:34 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:26:34 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:26:34 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:26:34 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:26:34 [DEBUG] clck_gen.py:128 IND CLOCK 714
2025-03-30 07:26:35 [DEBUG] clck_gen.py:128 IND CLOCK 816
2025-03-30 07:26:35 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:26:35 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:26:35 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:26:35 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:26:35 [DEBUG] clck_gen.py:128 IND CLOCK 918
2025-03-30 07:26:36 [DEBUG] clck_gen.py:128 IND CLOCK 1020
2025-03-30 07:26:36 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:26:36 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:26:36 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:26:36 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:26:36 [DEBUG] clck_gen.py:128 IND CLOCK 1122
2025-03-30 07:26:37 [DEBUG] clck_gen.py:128 IND CLOCK 1224
2025-03-30 07:26:37 [DEBUG] clck_gen.py:128 IND CLOCK 1326
2025-03-30 07:26:38 [DEBUG] clck_gen.py:128 IND CLOCK 1428
2025-03-30 07:26:38 [DEBUG] clck_gen.py:128 IND CLOCK 1530
2025-03-30 07:26:39 [DEBUG] clck_gen.py:128 IND CLOCK 1632
2025-03-30 07:26:39 [DEBUG] clck_gen.py:128 IND CLOCK 1734
2025-03-30 07:26:40 [DEBUG] clck_gen.py:128 IND CLOCK 1836
2025-03-30 07:26:40 [DEBUG] clck_gen.py:128 IND CLOCK 1938
2025-03-30 07:26:41 [DEBUG] clck_gen.py:128 IND CLOCK 2040
2025-03-30 07:26:41 [DEBUG] clck_gen.py:128 IND CLOCK 2142
2025-03-30 07:26:41 [DEBUG] clck_gen.py:128 IND CLOCK 2244
2025-03-30 07:26:42 [DEBUG] clck_gen.py:128 IND CLOCK 2346
2025-03-30 07:26:42 [DEBUG] clck_gen.py:128 IND CLOCK 2448
2025-03-30 07:26:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:26:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:26:43 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:26:43 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:26:43 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:26:43 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:26:43 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:26:43 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:26:43 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:26:43 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:26:43 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:26:43 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:26:43 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 07:26:43 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 07:26:43 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 07:26:48 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 07:26:48 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 07:26:48 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:26:48 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:26:48 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:26:48 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:26:48 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:26:48 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 07:26:48 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:26:48 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 07:26:48 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 07:26:48 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 07:26:48 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 07:26:48 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 07:26:48 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:26:48 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:26:48 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 07:26:48 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 07:26:48 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 07:26:48 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 07:26:48 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 07:26:48 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 07:26:48 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:26:48 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:26:48 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 07:26:48 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 07:26:48 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 07:26:48 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 07:26:48 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 07:26:48 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 07:26:48 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:26:48 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:26:48 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 07:26:48 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 07:26:48 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 07:26:48 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 07:26:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 07:26:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 07:26:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 07:26:48 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 07:26:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 07:26:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 07:26:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 07:26:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:26:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 07:26:48 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 07:26:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:26:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:26:48 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 07:26:48 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 07:26:48 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 07:26:48 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 07:26:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:26:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:26:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:26:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 07:26:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:26:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:26:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:26:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:26:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:26:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:26:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:26:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:26:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:26:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:26:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:26:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:26:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:26:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:26:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:26:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:26:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:26:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:26:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:26:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:26:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:26:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:26:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:26:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:26:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:26:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:26:48 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-03-30 07:26:48 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-03-30 07:26:48 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-03-30 07:26:48 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-03-30 07:26:48 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-03-30 07:26:48 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-03-30 07:26:48 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-03-30 07:26:48 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-03-30 07:26:48 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-03-30 07:26:48 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-03-30 07:26:48 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=0 bl=148 pwr=0
2025-03-30 07:26:48 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=1 bl=148 pwr=0
2025-03-30 07:26:48 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=2 bl=148 pwr=0
2025-03-30 07:26:48 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=3 bl=148 pwr=0
2025-03-30 07:26:48 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=4 bl=148 pwr=0
2025-03-30 07:26:48 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=5 bl=148 pwr=0
2025-03-30 07:26:48 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=6 bl=148 pwr=0
2025-03-30 07:26:48 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=7 bl=148 pwr=0
2025-03-30 07:26:48 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 07:26:48 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 07:26:48 [DEBUG] fake_trx.py:317 (BTS@172.18.26.20:5700) Recv FAKE_CI cmd
2025-03-30 07:26:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:26:48 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:26:48 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:26:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:26:48 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 07:26:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:26:48 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:26:48 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:26:48 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 07:26:48 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 07:26:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:26:48 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:26:48 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:26:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:26:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:26:49 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-03-30 07:26:49 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:26:49 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:26:49 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:26:49 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:26:49 [DEBUG] clck_gen.py:128 IND CLOCK 306
2025-03-30 07:26:49 [DEBUG] fake_trx.py:264 (MS@172.18.26.22:6700) Recv SETTA cmd
2025-03-30 07:26:49 [DEBUG] clck_gen.py:128 IND CLOCK 408
2025-03-30 07:26:50 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:26:50 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:26:50 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:26:50 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:26:50 [DEBUG] clck_gen.py:128 IND CLOCK 510
2025-03-30 07:26:50 [DEBUG] clck_gen.py:128 IND CLOCK 612
2025-03-30 07:26:51 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:26:51 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:26:51 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:26:51 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:26:51 [DEBUG] clck_gen.py:128 IND CLOCK 714
2025-03-30 07:26:51 [DEBUG] clck_gen.py:128 IND CLOCK 816
2025-03-30 07:26:52 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:26:52 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:26:52 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:26:52 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:26:52 [DEBUG] clck_gen.py:128 IND CLOCK 918
2025-03-30 07:26:52 [DEBUG] clck_gen.py:128 IND CLOCK 1020
2025-03-30 07:26:52 [WARNING] clck_gen.py:108 CLCKGen: time overrun by -4827us; resetting the clock
2025-03-30 07:26:53 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:26:53 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:26:53 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:26:53 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:26:53 [DEBUG] clck_gen.py:128 IND CLOCK 1122
2025-03-30 07:26:53 [DEBUG] clck_gen.py:128 IND CLOCK 1224
2025-03-30 07:26:54 [DEBUG] clck_gen.py:128 IND CLOCK 1326
2025-03-30 07:26:54 [DEBUG] clck_gen.py:128 IND CLOCK 1428
2025-03-30 07:26:55 [DEBUG] clck_gen.py:128 IND CLOCK 1530
2025-03-30 07:26:55 [DEBUG] clck_gen.py:128 IND CLOCK 1632
2025-03-30 07:26:56 [DEBUG] clck_gen.py:128 IND CLOCK 1734
2025-03-30 07:26:56 [DEBUG] clck_gen.py:128 IND CLOCK 1836
2025-03-30 07:26:57 [DEBUG] clck_gen.py:128 IND CLOCK 1938
2025-03-30 07:26:57 [DEBUG] clck_gen.py:128 IND CLOCK 2040
2025-03-30 07:26:57 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=2104): ver=1 fn=2102 tn=0 bl=148 pwr=0
2025-03-30 07:26:57 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=2104): ver=1 fn=2102 tn=1 bl=148 pwr=0
2025-03-30 07:26:57 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=2104): ver=1 fn=2102 tn=2 bl=148 pwr=0
2025-03-30 07:26:57 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=2104): ver=1 fn=2102 tn=3 bl=148 pwr=0
2025-03-30 07:26:57 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=2104): ver=1 fn=2102 tn=4 bl=148 pwr=0
2025-03-30 07:26:57 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=2104): ver=1 fn=2102 tn=5 bl=148 pwr=0
2025-03-30 07:26:57 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=2104): ver=1 fn=2102 tn=6 bl=148 pwr=0
2025-03-30 07:26:57 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=2104): ver=1 fn=2102 tn=7 bl=148 pwr=0
2025-03-30 07:26:57 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=2104): ver=1 fn=2103 tn=0 bl=148 pwr=0
2025-03-30 07:26:57 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=2104): ver=1 fn=2103 tn=1 bl=148 pwr=0
2025-03-30 07:26:57 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=2104): ver=1 fn=2103 tn=2 bl=148 pwr=0
2025-03-30 07:26:57 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=2104): ver=1 fn=2103 tn=3 bl=148 pwr=0
2025-03-30 07:26:57 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=2104): ver=1 fn=2103 tn=4 bl=148 pwr=0
2025-03-30 07:26:57 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=2104): ver=1 fn=2103 tn=5 bl=148 pwr=0
2025-03-30 07:26:57 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=2104): ver=1 fn=2103 tn=6 bl=148 pwr=0
2025-03-30 07:26:57 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=2104): ver=1 fn=2103 tn=7 bl=148 pwr=0
2025-03-30 07:26:57 [DEBUG] clck_gen.py:128 IND CLOCK 2142
2025-03-30 07:26:58 [DEBUG] clck_gen.py:128 IND CLOCK 2244
2025-03-30 07:26:58 [DEBUG] clck_gen.py:128 IND CLOCK 2346
2025-03-30 07:26:59 [DEBUG] clck_gen.py:128 IND CLOCK 2448
2025-03-30 07:26:59 [DEBUG] clck_gen.py:128 IND CLOCK 2550
2025-03-30 07:27:00 [DEBUG] clck_gen.py:128 IND CLOCK 2652
2025-03-30 07:27:00 [DEBUG] clck_gen.py:128 IND CLOCK 2754
2025-03-30 07:27:01 [DEBUG] clck_gen.py:128 IND CLOCK 2856
2025-03-30 07:27:01 [DEBUG] clck_gen.py:128 IND CLOCK 2958
2025-03-30 07:27:02 [DEBUG] clck_gen.py:128 IND CLOCK 3060
2025-03-30 07:27:02 [DEBUG] clck_gen.py:128 IND CLOCK 3162
2025-03-30 07:27:03 [DEBUG] clck_gen.py:128 IND CLOCK 3264
2025-03-30 07:27:03 [DEBUG] clck_gen.py:128 IND CLOCK 3366
2025-03-30 07:27:04 [DEBUG] clck_gen.py:128 IND CLOCK 3468
2025-03-30 07:27:04 [DEBUG] clck_gen.py:128 IND CLOCK 3570
2025-03-30 07:27:05 [DEBUG] clck_gen.py:128 IND CLOCK 3672
2025-03-30 07:27:05 [DEBUG] clck_gen.py:128 IND CLOCK 3774
2025-03-30 07:27:05 [DEBUG] clck_gen.py:128 IND CLOCK 3876
2025-03-30 07:27:06 [DEBUG] clck_gen.py:128 IND CLOCK 3978
2025-03-30 07:27:06 [DEBUG] clck_gen.py:128 IND CLOCK 4080
2025-03-30 07:27:07 [DEBUG] clck_gen.py:128 IND CLOCK 4182
2025-03-30 07:27:07 [DEBUG] clck_gen.py:128 IND CLOCK 4284
2025-03-30 07:27:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:27:08 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:27:08 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:27:08 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:27:08 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:27:08 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:27:08 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:27:08 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:27:08 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:27:08 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:27:08 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:27:08 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:27:08 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 07:27:08 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 07:27:08 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 07:27:13 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 07:27:13 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 07:27:13 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:27:13 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:27:13 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:27:13 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:27:13 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:27:13 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 07:27:13 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:27:13 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 07:27:13 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 07:27:13 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 07:27:13 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 07:27:13 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 07:27:13 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:27:13 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:27:13 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 07:27:13 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 07:27:13 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 07:27:13 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 07:27:13 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 07:27:13 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 07:27:13 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:27:13 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:27:13 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 07:27:13 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 07:27:13 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 07:27:13 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 07:27:13 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 07:27:13 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 07:27:13 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:27:13 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:27:13 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 07:27:13 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 07:27:13 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 07:27:13 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 07:27:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 07:27:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 07:27:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 07:27:13 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 07:27:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 07:27:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 07:27:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 07:27:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:27:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 07:27:13 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 07:27:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:27:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:27:13 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 07:27:13 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 07:27:13 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 07:27:13 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 07:27:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:27:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:27:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:27:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 07:27:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:27:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:27:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:27:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:27:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:27:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:27:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:27:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:27:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:27:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:27:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:27:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:27:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:27:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:27:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:27:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:27:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:27:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:27:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:27:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:27:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:27:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:27:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:27:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:27:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:27:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:27:13 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-03-30 07:27:13 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-03-30 07:27:13 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-03-30 07:27:13 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-03-30 07:27:13 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-03-30 07:27:13 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-03-30 07:27:13 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-03-30 07:27:13 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-03-30 07:27:13 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-03-30 07:27:13 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-03-30 07:27:13 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=0 bl=148 pwr=0
2025-03-30 07:27:13 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=1 bl=148 pwr=0
2025-03-30 07:27:13 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=2 bl=148 pwr=0
2025-03-30 07:27:13 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=3 bl=148 pwr=0
2025-03-30 07:27:13 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=4 bl=148 pwr=0
2025-03-30 07:27:13 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=5 bl=148 pwr=0
2025-03-30 07:27:13 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=6 bl=148 pwr=0
2025-03-30 07:27:13 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=7 bl=148 pwr=0
2025-03-30 07:27:13 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 07:27:13 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 07:27:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:27:13 [DEBUG] fake_trx.py:317 (BTS@172.18.26.20:5700) Recv FAKE_CI cmd
2025-03-30 07:27:13 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:27:13 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:27:13 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:27:13 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 07:27:13 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:27:13 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:27:13 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:27:13 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 07:27:13 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 07:27:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:27:13 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:27:13 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:27:13 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:27:13 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:27:14 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-03-30 07:27:14 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:27:14 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:27:14 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:27:14 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:27:14 [DEBUG] clck_gen.py:128 IND CLOCK 306
2025-03-30 07:27:15 [DEBUG] clck_gen.py:128 IND CLOCK 408
2025-03-30 07:27:15 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:27:15 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:27:15 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:27:15 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:27:15 [DEBUG] clck_gen.py:128 IND CLOCK 510
2025-03-30 07:27:16 [DEBUG] clck_gen.py:128 IND CLOCK 612
2025-03-30 07:27:16 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:27:16 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:27:16 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:27:16 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:27:16 [DEBUG] clck_gen.py:128 IND CLOCK 714
2025-03-30 07:27:17 [DEBUG] clck_gen.py:128 IND CLOCK 816
2025-03-30 07:27:17 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:27:17 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:27:17 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:27:17 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:27:17 [DEBUG] clck_gen.py:128 IND CLOCK 918
2025-03-30 07:27:18 [DEBUG] clck_gen.py:128 IND CLOCK 1020
2025-03-30 07:27:18 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:27:18 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:27:18 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:27:18 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:27:18 [DEBUG] clck_gen.py:128 IND CLOCK 1122
2025-03-30 07:27:18 [DEBUG] clck_gen.py:128 IND CLOCK 1224
2025-03-30 07:27:19 [DEBUG] clck_gen.py:128 IND CLOCK 1326
2025-03-30 07:27:19 [DEBUG] clck_gen.py:128 IND CLOCK 1428
2025-03-30 07:27:20 [DEBUG] clck_gen.py:128 IND CLOCK 1530
2025-03-30 07:27:20 [DEBUG] clck_gen.py:128 IND CLOCK 1632
2025-03-30 07:27:21 [DEBUG] clck_gen.py:128 IND CLOCK 1734
2025-03-30 07:27:21 [DEBUG] clck_gen.py:128 IND CLOCK 1836
2025-03-30 07:27:22 [DEBUG] clck_gen.py:128 IND CLOCK 1938
2025-03-30 07:27:22 [DEBUG] clck_gen.py:128 IND CLOCK 2040
2025-03-30 07:27:23 [DEBUG] clck_gen.py:128 IND CLOCK 2142
2025-03-30 07:27:23 [DEBUG] clck_gen.py:128 IND CLOCK 2244
2025-03-30 07:27:24 [DEBUG] clck_gen.py:128 IND CLOCK 2346
2025-03-30 07:27:24 [DEBUG] clck_gen.py:128 IND CLOCK 2448
2025-03-30 07:27:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:27:24 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:27:24 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:27:24 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:27:24 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:27:24 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:27:24 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:27:24 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:27:24 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:27:24 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:27:24 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 07:27:24 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 07:27:24 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 07:27:24 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:27:24 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:27:29 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 07:27:29 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 07:27:29 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:27:29 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:27:29 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:27:29 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:27:29 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:27:29 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 07:27:29 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:27:29 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 07:27:29 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 07:27:29 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 07:27:29 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 07:27:29 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 07:27:29 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:27:29 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:27:29 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 07:27:29 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 07:27:29 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 07:27:29 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 07:27:29 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 07:27:29 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 07:27:29 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:27:29 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:27:29 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 07:27:29 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 07:27:29 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 07:27:29 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 07:27:29 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 07:27:29 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 07:27:29 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:27:29 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:27:29 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 07:27:29 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 07:27:29 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 07:27:29 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 07:27:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 07:27:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 07:27:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 07:27:29 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 07:27:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 07:27:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 07:27:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 07:27:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:27:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 07:27:29 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 07:27:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:27:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:27:29 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 07:27:29 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 07:27:29 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 07:27:29 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 07:27:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:27:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:27:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:27:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 07:27:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:27:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:27:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:27:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:27:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:27:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:27:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:27:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:27:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:27:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:27:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:27:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:27:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:27:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:27:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:27:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:27:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:27:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:27:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:27:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:27:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:27:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:27:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:27:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:27:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:27:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:27:29 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-03-30 07:27:30 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-03-30 07:27:30 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=107): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-03-30 07:27:30 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=107): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-03-30 07:27:30 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=107): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-03-30 07:27:30 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=107): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-03-30 07:27:30 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=107): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-03-30 07:27:30 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=107): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-03-30 07:27:30 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=107): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-03-30 07:27:30 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=107): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-03-30 07:27:30 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=107): ver=1 fn=105 tn=0 bl=148 pwr=0
2025-03-30 07:27:30 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=107): ver=1 fn=105 tn=1 bl=148 pwr=0
2025-03-30 07:27:30 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=107): ver=1 fn=105 tn=2 bl=148 pwr=0
2025-03-30 07:27:30 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=107): ver=1 fn=105 tn=3 bl=148 pwr=0
2025-03-30 07:27:30 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=107): ver=1 fn=105 tn=4 bl=148 pwr=0
2025-03-30 07:27:30 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=107): ver=1 fn=105 tn=5 bl=148 pwr=0
2025-03-30 07:27:30 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=107): ver=1 fn=105 tn=6 bl=148 pwr=0
2025-03-30 07:27:30 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=107): ver=1 fn=105 tn=7 bl=148 pwr=0
2025-03-30 07:27:30 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=107): ver=1 fn=106 tn=0 bl=148 pwr=0
2025-03-30 07:27:30 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=107): ver=1 fn=106 tn=1 bl=148 pwr=0
2025-03-30 07:27:30 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=107): ver=1 fn=106 tn=2 bl=148 pwr=0
2025-03-30 07:27:30 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=107): ver=1 fn=106 tn=3 bl=148 pwr=0
2025-03-30 07:27:30 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=107): ver=1 fn=106 tn=4 bl=148 pwr=0
2025-03-30 07:27:30 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=107): ver=1 fn=106 tn=5 bl=148 pwr=0
2025-03-30 07:27:30 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=107): ver=1 fn=106 tn=6 bl=148 pwr=0
2025-03-30 07:27:30 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=107): ver=1 fn=106 tn=7 bl=148 pwr=0
2025-03-30 07:27:30 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 07:27:30 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 07:27:30 [DEBUG] fake_trx.py:317 (BTS@172.18.26.20:5700) Recv FAKE_CI cmd
2025-03-30 07:27:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:27:30 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:27:30 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:27:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:27:30 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 07:27:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:27:30 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:27:30 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:27:30 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 07:27:30 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 07:27:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:27:30 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:27:30 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:27:30 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 07:27:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:27:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:27:30 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-03-30 07:27:30 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:27:30 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:27:30 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:27:30 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:27:31 [DEBUG] clck_gen.py:128 IND CLOCK 306
2025-03-30 07:27:31 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 07:27:31 [DEBUG] clck_gen.py:128 IND CLOCK 408
2025-03-30 07:27:31 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:27:31 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:27:31 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:27:31 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:27:32 [DEBUG] clck_gen.py:128 IND CLOCK 510
2025-03-30 07:27:32 [DEBUG] clck_gen.py:128 IND CLOCK 612
2025-03-30 07:27:32 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:27:32 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:27:32 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:27:32 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:27:33 [DEBUG] clck_gen.py:128 IND CLOCK 714
2025-03-30 07:27:33 [DEBUG] clck_gen.py:128 IND CLOCK 816
2025-03-30 07:27:33 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:27:33 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:27:33 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:27:33 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:27:34 [DEBUG] clck_gen.py:128 IND CLOCK 918
2025-03-30 07:27:34 [DEBUG] clck_gen.py:128 IND CLOCK 1020
2025-03-30 07:27:34 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:27:34 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:27:34 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:27:34 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:27:35 [DEBUG] clck_gen.py:128 IND CLOCK 1122
2025-03-30 07:27:35 [DEBUG] clck_gen.py:128 IND CLOCK 1224
2025-03-30 07:27:35 [DEBUG] clck_gen.py:128 IND CLOCK 1326
2025-03-30 07:27:36 [DEBUG] clck_gen.py:128 IND CLOCK 1428
2025-03-30 07:27:36 [DEBUG] clck_gen.py:128 IND CLOCK 1530
2025-03-30 07:27:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:27:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:27:37 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:27:37 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:27:37 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:27:37 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:27:37 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:27:37 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:27:37 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:27:37 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:27:37 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:27:37 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:27:37 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 07:27:37 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 07:27:37 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 07:27:37 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=1567 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:27:37 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=1567 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:27:37 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=1567 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:27:37 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=1567 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:27:37 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=1567 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:27:37 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=1567 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:27:42 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 07:27:42 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 07:27:42 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:27:42 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:27:42 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:27:42 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:27:42 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:27:42 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 07:27:42 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:27:42 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 07:27:42 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 07:27:42 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 07:27:42 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 07:27:42 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 07:27:42 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:27:42 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:27:42 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 07:27:42 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 07:27:42 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 07:27:42 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 07:27:42 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 07:27:42 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 07:27:42 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:27:42 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:27:42 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 07:27:42 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 07:27:42 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 07:27:42 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 07:27:42 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 07:27:42 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 07:27:42 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:27:42 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:27:42 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 07:27:42 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 07:27:42 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 07:27:42 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 07:27:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 07:27:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 07:27:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 07:27:42 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 07:27:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 07:27:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 07:27:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 07:27:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:27:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 07:27:42 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 07:27:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:27:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:27:42 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 07:27:42 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 07:27:42 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 07:27:42 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 07:27:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:27:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:27:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:27:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 07:27:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:27:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:27:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:27:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:27:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:27:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:27:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:27:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:27:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:27:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:27:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:27:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:27:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:27:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:27:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:27:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:27:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:27:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:27:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:27:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:27:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:27:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:27:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:27:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:27:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:27:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:27:42 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-03-30 07:27:42 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-03-30 07:27:42 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-03-30 07:27:42 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-03-30 07:27:42 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-03-30 07:27:42 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-03-30 07:27:42 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-03-30 07:27:42 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-03-30 07:27:42 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-03-30 07:27:42 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-03-30 07:27:42 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=0 bl=148 pwr=0
2025-03-30 07:27:42 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=1 bl=148 pwr=0
2025-03-30 07:27:42 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=2 bl=148 pwr=0
2025-03-30 07:27:42 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=3 bl=148 pwr=0
2025-03-30 07:27:42 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=4 bl=148 pwr=0
2025-03-30 07:27:42 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=5 bl=148 pwr=0
2025-03-30 07:27:42 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=6 bl=148 pwr=0
2025-03-30 07:27:42 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=7 bl=148 pwr=0
2025-03-30 07:27:42 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 07:27:42 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 07:27:42 [DEBUG] fake_trx.py:317 (BTS@172.18.26.20:5700) Recv FAKE_CI cmd
2025-03-30 07:27:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:27:42 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:27:42 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:27:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:27:42 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 07:27:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:27:42 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:27:42 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:27:42 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 07:27:42 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 07:27:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:27:42 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:27:42 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:27:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:27:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:27:43 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-03-30 07:27:43 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:27:43 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:27:43 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:27:43 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:27:43 [DEBUG] clck_gen.py:128 IND CLOCK 306
2025-03-30 07:27:43 [DEBUG] clck_gen.py:128 IND CLOCK 408
2025-03-30 07:27:44 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:27:44 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:27:44 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:27:44 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:27:44 [DEBUG] clck_gen.py:128 IND CLOCK 510
2025-03-30 07:27:44 [DEBUG] clck_gen.py:128 IND CLOCK 612
2025-03-30 07:27:45 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:27:45 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:27:45 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:27:45 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:27:45 [DEBUG] clck_gen.py:128 IND CLOCK 714
2025-03-30 07:27:45 [DEBUG] clck_gen.py:128 IND CLOCK 816
2025-03-30 07:27:46 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:27:46 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:27:46 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:27:46 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:27:46 [DEBUG] clck_gen.py:128 IND CLOCK 918
2025-03-30 07:27:46 [DEBUG] clck_gen.py:128 IND CLOCK 1020
2025-03-30 07:27:47 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:27:47 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:27:47 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:27:47 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:27:47 [DEBUG] clck_gen.py:128 IND CLOCK 1122
2025-03-30 07:27:47 [DEBUG] clck_gen.py:128 IND CLOCK 1224
2025-03-30 07:27:48 [DEBUG] clck_gen.py:128 IND CLOCK 1326
2025-03-30 07:27:48 [DEBUG] clck_gen.py:128 IND CLOCK 1428
2025-03-30 07:27:49 [DEBUG] clck_gen.py:128 IND CLOCK 1530
2025-03-30 07:27:49 [DEBUG] clck_gen.py:128 IND CLOCK 1632
2025-03-30 07:27:50 [DEBUG] clck_gen.py:128 IND CLOCK 1734
2025-03-30 07:27:50 [DEBUG] clck_gen.py:128 IND CLOCK 1836
2025-03-30 07:27:51 [DEBUG] clck_gen.py:128 IND CLOCK 1938
2025-03-30 07:27:51 [DEBUG] clck_gen.py:128 IND CLOCK 2040
2025-03-30 07:27:51 [DEBUG] clck_gen.py:128 IND CLOCK 2142
2025-03-30 07:27:52 [DEBUG] clck_gen.py:128 IND CLOCK 2244
2025-03-30 07:27:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:27:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:27:52 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:27:52 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:27:52 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:27:52 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:27:52 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:27:52 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:27:52 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:27:52 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:27:52 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:27:52 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:27:52 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 07:27:52 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 07:27:52 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 07:27:57 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 07:27:57 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 07:27:57 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:27:57 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:27:57 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:27:57 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:27:57 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:27:57 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 07:27:57 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:27:57 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 07:27:57 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 07:27:57 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 07:27:57 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 07:27:57 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 07:27:57 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:27:57 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:27:57 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 07:27:57 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 07:27:57 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 07:27:57 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 07:27:57 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 07:27:57 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 07:27:57 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:27:57 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:27:57 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 07:27:57 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 07:27:57 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 07:27:57 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 07:27:57 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 07:27:57 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 07:27:57 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:27:57 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:27:57 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 07:27:57 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 07:27:57 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 07:27:57 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 07:27:57 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 07:27:57 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 07:27:57 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 07:27:57 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 07:27:57 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 07:27:57 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 07:27:57 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 07:27:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 07:27:57 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:27:57 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:27:57 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 07:27:57 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:27:57 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:27:57 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:27:57 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 07:27:57 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 07:27:57 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 07:27:57 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 07:27:57 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:27:57 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:27:57 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:27:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 07:27:57 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:27:57 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:27:57 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:27:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:27:57 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:27:57 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:27:57 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:27:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:27:57 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:27:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:27:57 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:27:57 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:27:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:27:57 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:27:57 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:27:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:27:57 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:27:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:27:57 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:27:57 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:27:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:27:57 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:27:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:27:57 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:27:57 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-03-30 07:27:58 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-03-30 07:27:58 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-03-30 07:27:58 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-03-30 07:27:58 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-03-30 07:27:58 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-03-30 07:27:58 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-03-30 07:27:58 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-03-30 07:27:58 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-03-30 07:27:58 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-03-30 07:27:58 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=0 bl=148 pwr=0
2025-03-30 07:27:58 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=1 bl=148 pwr=0
2025-03-30 07:27:58 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=2 bl=148 pwr=0
2025-03-30 07:27:58 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=3 bl=148 pwr=0
2025-03-30 07:27:58 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=4 bl=148 pwr=0
2025-03-30 07:27:58 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=5 bl=148 pwr=0
2025-03-30 07:27:58 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=6 bl=148 pwr=0
2025-03-30 07:27:58 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=7 bl=148 pwr=0
2025-03-30 07:27:58 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 07:27:58 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 07:27:58 [DEBUG] fake_trx.py:317 (BTS@172.18.26.20:5700) Recv FAKE_CI cmd
2025-03-30 07:27:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:27:58 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:27:58 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:27:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:27:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:27:58 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:27:58 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:27:58 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 07:27:58 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 07:27:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:27:58 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:27:58 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:27:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:27:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:27:58 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-03-30 07:27:58 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:27:58 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:27:58 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:27:58 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:27:59 [DEBUG] clck_gen.py:128 IND CLOCK 306
2025-03-30 07:27:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:27:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:27:59 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:27:59 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:27:59 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:27:59 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:27:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:27:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:27:59 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:27:59 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:27:59 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 07:27:59 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 07:27:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:27:59 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.26.22:6700) Recv SETFH cmd
2025-03-30 07:27:59 [INFO] transceiver.py:237 (MS@172.18.26.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2025-03-30 07:27:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:27:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:27:59 [DEBUG] clck_gen.py:128 IND CLOCK 408
2025-03-30 07:27:59 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:27:59 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:27:59 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:27:59 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:27:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:27:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:27:59 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:27:59 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:27:59 [INFO] transceiver.py:241 (MS@172.18.26.22:6700) Frequency hopping disabled
2025-03-30 07:27:59 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:27:59 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:27:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:27:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:27:59 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:27:59 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:27:59 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 07:27:59 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 07:27:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:27:59 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:27:59 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:27:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:27:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:28:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:28:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:28:00 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:28:00 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:28:00 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:28:00 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:28:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:28:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:28:00 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:28:00 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:28:00 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 07:28:00 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 07:28:00 [DEBUG] clck_gen.py:128 IND CLOCK 510
2025-03-30 07:28:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:28:00 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.26.22:6700) Recv SETFH cmd
2025-03-30 07:28:00 [INFO] transceiver.py:237 (MS@172.18.26.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2025-03-30 07:28:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:28:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:28:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:28:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:28:00 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:28:00 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:28:00 [INFO] transceiver.py:241 (MS@172.18.26.22:6700) Frequency hopping disabled
2025-03-30 07:28:00 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:28:00 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:28:00 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:28:00 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:28:00 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:28:00 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:28:00 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:28:00 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:28:00 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 07:28:00 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 07:28:00 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 07:28:05 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 07:28:05 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 07:28:05 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:28:05 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:28:05 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:28:05 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:28:05 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:28:05 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 07:28:05 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:28:05 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 07:28:05 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 07:28:05 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 07:28:05 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 07:28:05 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 07:28:05 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:28:05 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:28:05 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 07:28:05 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 07:28:05 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 07:28:05 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 07:28:05 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 07:28:05 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 07:28:05 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:28:05 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:28:05 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 07:28:05 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 07:28:05 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 07:28:05 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 07:28:05 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 07:28:05 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 07:28:05 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:28:05 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:28:05 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 07:28:05 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 07:28:05 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 07:28:05 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 07:28:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 07:28:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 07:28:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 07:28:05 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 07:28:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 07:28:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 07:28:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 07:28:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:28:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 07:28:05 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 07:28:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:28:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:28:05 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 07:28:05 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 07:28:05 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 07:28:05 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 07:28:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:28:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:28:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:28:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 07:28:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:28:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:28:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:28:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:28:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:28:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:28:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:28:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:28:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:28:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:28:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:28:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:28:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:28:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:28:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:28:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:28:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:28:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:28:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:28:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:28:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:28:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:28:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:28:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:28:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:28:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:28:05 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-03-30 07:28:06 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-03-30 07:28:06 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-03-30 07:28:06 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-03-30 07:28:06 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-03-30 07:28:06 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-03-30 07:28:06 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-03-30 07:28:06 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-03-30 07:28:06 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-03-30 07:28:06 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-03-30 07:28:06 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=0 bl=148 pwr=0
2025-03-30 07:28:06 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=1 bl=148 pwr=0
2025-03-30 07:28:06 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=2 bl=148 pwr=0
2025-03-30 07:28:06 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=3 bl=148 pwr=0
2025-03-30 07:28:06 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=4 bl=148 pwr=0
2025-03-30 07:28:06 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=5 bl=148 pwr=0
2025-03-30 07:28:06 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=6 bl=148 pwr=0
2025-03-30 07:28:06 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=7 bl=148 pwr=0
2025-03-30 07:28:06 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 07:28:06 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 07:28:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:28:06 [DEBUG] fake_trx.py:317 (BTS@172.18.26.20:5700) Recv FAKE_CI cmd
2025-03-30 07:28:06 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:28:06 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:28:06 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:28:06 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:28:06 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:28:06 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:28:06 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 07:28:06 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 07:28:06 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 07:28:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:28:06 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:28:06 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:28:06 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:28:06 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:28:06 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-03-30 07:28:06 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:28:06 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:28:06 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:28:06 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:28:06 [DEBUG] clck_gen.py:128 IND CLOCK 306
2025-03-30 07:28:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:28:06 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:28:06 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:28:06 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:28:06 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:28:06 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:28:06 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:28:06 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:28:06 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:28:06 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:28:06 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:28:06 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:28:06 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 07:28:06 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 07:28:06 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 07:28:11 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 07:28:11 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 07:28:11 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:28:11 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:28:11 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:28:11 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:28:11 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:28:11 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 07:28:11 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:28:11 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 07:28:11 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 07:28:11 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 07:28:12 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 07:28:12 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 07:28:12 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:28:12 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:28:12 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 07:28:12 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 07:28:12 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 07:28:12 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 07:28:12 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 07:28:12 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 07:28:12 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:28:12 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:28:12 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 07:28:12 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 07:28:12 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 07:28:12 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 07:28:12 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 07:28:12 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 07:28:12 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:28:12 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:28:12 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 07:28:12 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 07:28:12 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 07:28:12 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 07:28:12 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 07:28:12 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 07:28:12 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 07:28:12 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 07:28:12 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 07:28:12 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 07:28:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 07:28:12 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:28:12 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 07:28:12 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 07:28:12 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:28:12 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:28:12 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 07:28:12 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 07:28:12 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 07:28:12 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 07:28:12 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:28:12 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:28:12 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:28:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 07:28:12 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:28:12 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:28:12 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:28:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:28:12 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:28:12 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:28:12 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:28:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:28:12 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:28:12 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:28:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:28:12 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:28:12 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:28:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:28:12 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:28:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:28:12 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:28:12 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:28:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:28:12 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:28:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:28:12 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:28:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:28:12 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:28:12 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:28:12 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:28:12 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-03-30 07:28:12 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-03-30 07:28:12 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-03-30 07:28:12 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-03-30 07:28:12 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-03-30 07:28:12 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-03-30 07:28:12 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-03-30 07:28:12 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-03-30 07:28:12 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-03-30 07:28:12 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-03-30 07:28:12 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=0 bl=148 pwr=0
2025-03-30 07:28:12 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=1 bl=148 pwr=0
2025-03-30 07:28:12 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=2 bl=148 pwr=0
2025-03-30 07:28:12 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=3 bl=148 pwr=0
2025-03-30 07:28:12 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=4 bl=148 pwr=0
2025-03-30 07:28:12 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=5 bl=148 pwr=0
2025-03-30 07:28:12 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=6 bl=148 pwr=0
2025-03-30 07:28:12 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=7 bl=148 pwr=0
2025-03-30 07:28:12 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 07:28:12 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 07:28:12 [DEBUG] fake_trx.py:317 (BTS@172.18.26.20:5700) Recv FAKE_CI cmd
2025-03-30 07:28:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:28:12 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:28:12 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:28:12 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:28:12 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:28:12 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:28:12 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:28:12 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 07:28:12 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 07:28:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:28:12 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:28:12 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:28:12 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:28:12 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:28:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:28:12 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-03-30 07:28:13 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:28:13 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:28:13 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:28:13 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:28:13 [DEBUG] clck_gen.py:128 IND CLOCK 306
2025-03-30 07:28:13 [DEBUG] clck_gen.py:128 IND CLOCK 408
2025-03-30 07:28:14 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:28:14 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:28:14 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:28:14 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:28:14 [DEBUG] clck_gen.py:128 IND CLOCK 510
2025-03-30 07:28:14 [DEBUG] clck_gen.py:128 IND CLOCK 612
2025-03-30 07:28:15 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:28:15 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:28:15 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:28:15 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:28:15 [DEBUG] clck_gen.py:128 IND CLOCK 714
2025-03-30 07:28:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:28:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:28:15 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:28:15 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:28:15 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:28:15 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:28:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:28:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:28:15 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:28:15 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:28:15 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 07:28:15 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 07:28:15 [DEBUG] clck_gen.py:128 IND CLOCK 816
2025-03-30 07:28:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:28:15 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.26.22:6700) Recv SETFH cmd
2025-03-30 07:28:15 [INFO] transceiver.py:237 (MS@172.18.26.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2025-03-30 07:28:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:28:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:28:16 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:28:16 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:28:16 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:28:16 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:28:16 [DEBUG] clck_gen.py:128 IND CLOCK 918
2025-03-30 07:28:16 [DEBUG] clck_gen.py:128 IND CLOCK 1020
2025-03-30 07:28:17 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:28:17 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:28:17 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:28:17 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:28:17 [DEBUG] clck_gen.py:128 IND CLOCK 1122
2025-03-30 07:28:17 [DEBUG] clck_gen.py:128 IND CLOCK 1224
2025-03-30 07:28:18 [DEBUG] clck_gen.py:128 IND CLOCK 1326
2025-03-30 07:28:18 [DEBUG] clck_gen.py:128 IND CLOCK 1428
2025-03-30 07:28:18 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:28:18 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:28:18 [INFO] transceiver.py:241 (MS@172.18.26.22:6700) Frequency hopping disabled
2025-03-30 07:28:18 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:28:18 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:28:18 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:28:18 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:28:18 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:28:18 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:28:18 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:28:18 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:28:18 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 07:28:18 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 07:28:18 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 07:28:23 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 07:28:23 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 07:28:23 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:28:23 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:28:23 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:28:23 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:28:23 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:28:23 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 07:28:23 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:28:23 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 07:28:23 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 07:28:23 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 07:28:23 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 07:28:23 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 07:28:23 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:28:23 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:28:23 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 07:28:23 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 07:28:23 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 07:28:23 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 07:28:23 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 07:28:23 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 07:28:23 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:28:23 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:28:23 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 07:28:23 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 07:28:23 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 07:28:23 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 07:28:23 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 07:28:23 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 07:28:23 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:28:23 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:28:23 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 07:28:23 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 07:28:23 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 07:28:23 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 07:28:23 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 07:28:23 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 07:28:23 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 07:28:23 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 07:28:23 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 07:28:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 07:28:23 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 07:28:23 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 07:28:23 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 07:28:23 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:28:23 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:28:23 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 07:28:23 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 07:28:23 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 07:28:23 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 07:28:23 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:28:23 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:28:23 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:28:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 07:28:23 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:28:23 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:28:23 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:28:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:28:23 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:28:23 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:28:23 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:28:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:28:23 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:28:23 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:28:23 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:28:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:28:23 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:28:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:28:23 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:28:23 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:28:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:28:23 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:28:23 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:28:23 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:28:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:28:23 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:28:23 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:28:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:28:23 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:28:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:28:23 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:28:23 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-03-30 07:28:24 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-03-30 07:28:24 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-03-30 07:28:24 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-03-30 07:28:24 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-03-30 07:28:24 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-03-30 07:28:24 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-03-30 07:28:24 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-03-30 07:28:24 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-03-30 07:28:24 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-03-30 07:28:24 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=0 bl=148 pwr=0
2025-03-30 07:28:24 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=1 bl=148 pwr=0
2025-03-30 07:28:24 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=2 bl=148 pwr=0
2025-03-30 07:28:24 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=3 bl=148 pwr=0
2025-03-30 07:28:24 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=4 bl=148 pwr=0
2025-03-30 07:28:24 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=5 bl=148 pwr=0
2025-03-30 07:28:24 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=6 bl=148 pwr=0
2025-03-30 07:28:24 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=7 bl=148 pwr=0
2025-03-30 07:28:24 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 07:28:24 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 07:28:24 [DEBUG] fake_trx.py:317 (BTS@172.18.26.20:5700) Recv FAKE_CI cmd
2025-03-30 07:28:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:28:24 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:28:24 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:28:24 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:28:24 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:28:24 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:28:24 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:28:24 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 07:28:24 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 07:28:24 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-03-30 07:28:24 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:28:24 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:28:24 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:28:24 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:28:25 [DEBUG] clck_gen.py:128 IND CLOCK 306
2025-03-30 07:28:25 [DEBUG] clck_gen.py:128 IND CLOCK 408
2025-03-30 07:28:25 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:28:25 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:28:25 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:28:25 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:28:26 [DEBUG] clck_gen.py:128 IND CLOCK 510
2025-03-30 07:28:26 [DEBUG] clck_gen.py:128 IND CLOCK 612
2025-03-30 07:28:26 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:28:26 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:28:26 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:28:26 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:28:27 [DEBUG] clck_gen.py:128 IND CLOCK 714
2025-03-30 07:28:27 [DEBUG] clck_gen.py:128 IND CLOCK 816
2025-03-30 07:28:27 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:28:27 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:28:27 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:28:27 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:28:28 [DEBUG] clck_gen.py:128 IND CLOCK 918
2025-03-30 07:28:28 [DEBUG] clck_gen.py:128 IND CLOCK 1020
2025-03-30 07:28:28 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:28:28 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:28:28 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:28:28 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:28:29 [DEBUG] clck_gen.py:128 IND CLOCK 1122
2025-03-30 07:28:29 [DEBUG] clck_gen.py:128 IND CLOCK 1224
2025-03-30 07:28:30 [DEBUG] clck_gen.py:128 IND CLOCK 1326
2025-03-30 07:28:30 [DEBUG] clck_gen.py:128 IND CLOCK 1428
2025-03-30 07:28:31 [DEBUG] clck_gen.py:128 IND CLOCK 1530
2025-03-30 07:28:31 [DEBUG] clck_gen.py:128 IND CLOCK 1632
2025-03-30 07:28:31 [DEBUG] clck_gen.py:128 IND CLOCK 1734
2025-03-30 07:28:32 [DEBUG] clck_gen.py:128 IND CLOCK 1836
2025-03-30 07:28:32 [DEBUG] clck_gen.py:128 IND CLOCK 1938
2025-03-30 07:28:33 [DEBUG] clck_gen.py:128 IND CLOCK 2040
2025-03-30 07:28:33 [DEBUG] clck_gen.py:128 IND CLOCK 2142
2025-03-30 07:28:34 [DEBUG] clck_gen.py:128 IND CLOCK 2244
2025-03-30 07:28:34 [DEBUG] clck_gen.py:128 IND CLOCK 2346
2025-03-30 07:28:35 [DEBUG] clck_gen.py:128 IND CLOCK 2448
2025-03-30 07:28:35 [DEBUG] clck_gen.py:128 IND CLOCK 2550
2025-03-30 07:28:36 [DEBUG] clck_gen.py:128 IND CLOCK 2652
2025-03-30 07:28:36 [DEBUG] clck_gen.py:128 IND CLOCK 2754
2025-03-30 07:28:37 [DEBUG] clck_gen.py:128 IND CLOCK 2856
2025-03-30 07:28:37 [DEBUG] clck_gen.py:128 IND CLOCK 2958
2025-03-30 07:28:38 [DEBUG] clck_gen.py:128 IND CLOCK 3060
2025-03-30 07:28:38 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:28:38 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:28:38 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:28:38 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:28:38 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:28:38 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:28:38 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:28:38 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:28:38 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:28:38 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 07:28:38 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 07:28:38 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 07:28:38 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:28:38 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=3123 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:28:38 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=3123 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:28:38 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=3123 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:28:38 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=3123 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:28:38 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=3123 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:28:38 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=3123 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:28:38 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=3123 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:28:38 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=3123 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:28:43 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 07:28:43 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 07:28:43 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:28:43 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:28:43 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:28:43 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:28:43 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:28:43 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 07:28:43 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:28:43 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 07:28:43 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 07:28:43 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 07:28:43 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 07:28:43 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 07:28:43 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:28:43 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:28:43 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 07:28:43 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 07:28:43 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 07:28:43 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 07:28:43 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 07:28:43 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 07:28:43 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:28:43 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:28:43 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 07:28:43 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 07:28:43 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 07:28:43 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 07:28:43 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 07:28:43 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 07:28:43 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:28:43 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:28:43 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 07:28:43 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 07:28:43 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 07:28:43 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 07:28:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 07:28:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 07:28:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 07:28:43 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 07:28:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 07:28:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 07:28:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 07:28:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 07:28:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:28:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:28:43 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 07:28:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:28:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:28:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:28:43 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 07:28:43 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 07:28:43 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 07:28:43 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 07:28:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:28:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:28:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:28:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 07:28:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:28:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:28:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:28:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:28:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:28:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:28:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:28:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:28:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:28:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:28:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:28:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:28:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:28:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:28:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:28:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:28:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:28:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:28:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:28:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:28:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:28:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:28:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:28:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:28:43 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-03-30 07:28:43 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-03-30 07:28:43 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-03-30 07:28:43 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-03-30 07:28:43 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-03-30 07:28:43 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-03-30 07:28:43 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-03-30 07:28:43 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-03-30 07:28:43 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-03-30 07:28:43 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-03-30 07:28:43 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=0 bl=148 pwr=0
2025-03-30 07:28:43 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=1 bl=148 pwr=0
2025-03-30 07:28:43 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=2 bl=148 pwr=0
2025-03-30 07:28:43 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=3 bl=148 pwr=0
2025-03-30 07:28:43 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=4 bl=148 pwr=0
2025-03-30 07:28:43 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=5 bl=148 pwr=0
2025-03-30 07:28:43 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=6 bl=148 pwr=0
2025-03-30 07:28:43 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=7 bl=148 pwr=0
2025-03-30 07:28:43 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 07:28:43 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 07:28:43 [DEBUG] fake_trx.py:317 (BTS@172.18.26.20:5700) Recv FAKE_CI cmd
2025-03-30 07:28:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:28:43 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:28:43 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:28:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:28:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:28:43 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:28:43 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:28:43 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 07:28:43 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 07:28:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:28:43 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.26.22:6700) Recv SETFH cmd
2025-03-30 07:28:43 [INFO] transceiver.py:237 (MS@172.18.26.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2025-03-30 07:28:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:28:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:28:44 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-03-30 07:28:44 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:28:44 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:28:44 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:28:44 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:28:44 [DEBUG] clck_gen.py:128 IND CLOCK 306
2025-03-30 07:28:45 [DEBUG] clck_gen.py:128 IND CLOCK 408
2025-03-30 07:28:45 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:28:45 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:28:45 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:28:45 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:28:45 [DEBUG] clck_gen.py:128 IND CLOCK 510
2025-03-30 07:28:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:28:45 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:28:45 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:28:45 [INFO] transceiver.py:241 (MS@172.18.26.22:6700) Frequency hopping disabled
2025-03-30 07:28:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:28:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:28:45 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:28:45 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:28:45 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 07:28:45 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 07:28:46 [DEBUG] clck_gen.py:128 IND CLOCK 612
2025-03-30 07:28:46 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:28:46 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:28:46 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:28:46 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:28:46 [DEBUG] clck_gen.py:128 IND CLOCK 714
2025-03-30 07:28:47 [DEBUG] clck_gen.py:128 IND CLOCK 816
2025-03-30 07:28:47 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:28:47 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:28:47 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:28:47 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:28:47 [DEBUG] clck_gen.py:128 IND CLOCK 918
2025-03-30 07:28:48 [DEBUG] clck_gen.py:128 IND CLOCK 1020
2025-03-30 07:28:48 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:28:48 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:28:48 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:28:48 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:28:48 [DEBUG] clck_gen.py:128 IND CLOCK 1122
2025-03-30 07:28:49 [DEBUG] clck_gen.py:128 IND CLOCK 1224
2025-03-30 07:28:49 [DEBUG] clck_gen.py:128 IND CLOCK 1326
2025-03-30 07:28:49 [DEBUG] clck_gen.py:128 IND CLOCK 1428
2025-03-30 07:28:50 [DEBUG] clck_gen.py:128 IND CLOCK 1530
2025-03-30 07:28:50 [DEBUG] clck_gen.py:128 IND CLOCK 1632
2025-03-30 07:28:51 [DEBUG] clck_gen.py:128 IND CLOCK 1734
2025-03-30 07:28:51 [DEBUG] clck_gen.py:128 IND CLOCK 1836
2025-03-30 07:28:52 [DEBUG] clck_gen.py:128 IND CLOCK 1938
2025-03-30 07:28:52 [DEBUG] clck_gen.py:128 IND CLOCK 2040
2025-03-30 07:28:53 [DEBUG] clck_gen.py:128 IND CLOCK 2142
2025-03-30 07:28:53 [DEBUG] clck_gen.py:128 IND CLOCK 2244
2025-03-30 07:28:54 [DEBUG] clck_gen.py:128 IND CLOCK 2346
2025-03-30 07:28:54 [DEBUG] clck_gen.py:128 IND CLOCK 2448
2025-03-30 07:28:55 [DEBUG] clck_gen.py:128 IND CLOCK 2550
2025-03-30 07:28:55 [DEBUG] clck_gen.py:128 IND CLOCK 2652
2025-03-30 07:28:56 [DEBUG] clck_gen.py:128 IND CLOCK 2754
2025-03-30 07:28:56 [DEBUG] clck_gen.py:128 IND CLOCK 2856
2025-03-30 07:28:57 [DEBUG] clck_gen.py:128 IND CLOCK 2958
2025-03-30 07:28:57 [DEBUG] clck_gen.py:128 IND CLOCK 3060
2025-03-30 07:28:57 [WARNING] clck_gen.py:108 CLCKGen: time overrun by -17107us; resetting the clock
2025-03-30 07:28:58 [DEBUG] clck_gen.py:128 IND CLOCK 3162
2025-03-30 07:28:58 [DEBUG] clck_gen.py:128 IND CLOCK 3264
2025-03-30 07:28:58 [DEBUG] clck_gen.py:128 IND CLOCK 3366
2025-03-30 07:28:59 [DEBUG] clck_gen.py:128 IND CLOCK 3468
2025-03-30 07:28:59 [DEBUG] clck_gen.py:128 IND CLOCK 3570
2025-03-30 07:29:00 [DEBUG] clck_gen.py:128 IND CLOCK 3672
2025-03-30 07:29:00 [DEBUG] clck_gen.py:128 IND CLOCK 3774
2025-03-30 07:29:01 [DEBUG] clck_gen.py:128 IND CLOCK 3876
2025-03-30 07:29:01 [DEBUG] clck_gen.py:128 IND CLOCK 3978
2025-03-30 07:29:02 [DEBUG] clck_gen.py:128 IND CLOCK 4080
2025-03-30 07:29:02 [DEBUG] clck_gen.py:128 IND CLOCK 4182
2025-03-30 07:29:03 [DEBUG] clck_gen.py:128 IND CLOCK 4284
2025-03-30 07:29:03 [DEBUG] clck_gen.py:128 IND CLOCK 4386
2025-03-30 07:29:04 [DEBUG] clck_gen.py:128 IND CLOCK 4488
2025-03-30 07:29:04 [DEBUG] clck_gen.py:128 IND CLOCK 4590
2025-03-30 07:29:05 [DEBUG] clck_gen.py:128 IND CLOCK 4692
2025-03-30 07:29:05 [DEBUG] clck_gen.py:128 IND CLOCK 4794
2025-03-30 07:29:06 [DEBUG] clck_gen.py:128 IND CLOCK 4896
2025-03-30 07:29:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:29:06 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:29:06 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:29:06 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:29:06 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:29:06 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:29:06 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:29:06 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:29:06 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:29:06 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:29:06 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:29:06 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 07:29:06 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 07:29:06 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 07:29:06 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=4962 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:29:06 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=4962 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:29:06 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=4962 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:29:06 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=4962 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:29:06 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=4962 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:29:06 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=4962 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:29:06 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=4962 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:29:11 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 07:29:11 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 07:29:11 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:29:11 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:29:11 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:29:11 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:29:11 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:29:11 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 07:29:11 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:29:11 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 07:29:11 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 07:29:11 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 07:29:11 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 07:29:11 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 07:29:11 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:29:11 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 07:29:11 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:29:11 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 07:29:11 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 07:29:11 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 07:29:11 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 07:29:11 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 07:29:11 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:29:11 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:29:11 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 07:29:11 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 07:29:11 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 07:29:11 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 07:29:11 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 07:29:11 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 07:29:11 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:29:11 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 07:29:11 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:29:11 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 07:29:11 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 07:29:11 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 07:29:11 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 07:29:11 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 07:29:11 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 07:29:11 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 07:29:11 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 07:29:11 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 07:29:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 07:29:11 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:29:11 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 07:29:11 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 07:29:11 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:29:11 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:29:11 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 07:29:11 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 07:29:11 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 07:29:11 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 07:29:11 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:29:11 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:29:11 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:29:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 07:29:11 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:29:11 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:29:11 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:29:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:29:11 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:29:11 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:29:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:29:11 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:29:11 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:29:11 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:29:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:29:11 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:29:11 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:29:11 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:29:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:29:11 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:29:11 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:29:11 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:29:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:29:11 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:29:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:29:11 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:29:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:29:11 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:29:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:29:11 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:29:11 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-03-30 07:29:11 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-03-30 07:29:11 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-03-30 07:29:11 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-03-30 07:29:11 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-03-30 07:29:11 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-03-30 07:29:11 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-03-30 07:29:11 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-03-30 07:29:11 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-03-30 07:29:11 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-03-30 07:29:11 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 07:29:11 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 07:29:11 [DEBUG] fake_trx.py:317 (BTS@172.18.26.20:5700) Recv FAKE_CI cmd
2025-03-30 07:29:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:29:11 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:29:11 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:29:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:29:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:29:11 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:29:11 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:29:11 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 07:29:11 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 07:29:12 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-03-30 07:29:12 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:29:12 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:29:12 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:29:12 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:29:12 [DEBUG] clck_gen.py:128 IND CLOCK 306
2025-03-30 07:29:13 [DEBUG] clck_gen.py:128 IND CLOCK 408
2025-03-30 07:29:13 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:29:13 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:29:13 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:29:13 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:29:13 [DEBUG] clck_gen.py:128 IND CLOCK 510
2025-03-30 07:29:14 [DEBUG] clck_gen.py:128 IND CLOCK 612
2025-03-30 07:29:14 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:29:14 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:29:14 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:29:14 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:29:14 [DEBUG] clck_gen.py:128 IND CLOCK 714
2025-03-30 07:29:15 [DEBUG] clck_gen.py:128 IND CLOCK 816
2025-03-30 07:29:15 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:29:15 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:29:15 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:29:15 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:29:15 [DEBUG] clck_gen.py:128 IND CLOCK 918
2025-03-30 07:29:16 [DEBUG] clck_gen.py:128 IND CLOCK 1020
2025-03-30 07:29:16 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:29:16 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:29:16 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:29:16 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:29:16 [DEBUG] clck_gen.py:128 IND CLOCK 1122
2025-03-30 07:29:16 [DEBUG] clck_gen.py:128 IND CLOCK 1224
2025-03-30 07:29:17 [DEBUG] clck_gen.py:128 IND CLOCK 1326
2025-03-30 07:29:17 [DEBUG] clck_gen.py:128 IND CLOCK 1428
2025-03-30 07:29:18 [DEBUG] clck_gen.py:128 IND CLOCK 1530
2025-03-30 07:29:18 [DEBUG] clck_gen.py:128 IND CLOCK 1632
2025-03-30 07:29:19 [DEBUG] clck_gen.py:128 IND CLOCK 1734
2025-03-30 07:29:19 [DEBUG] clck_gen.py:128 IND CLOCK 1836
2025-03-30 07:29:20 [DEBUG] clck_gen.py:128 IND CLOCK 1938
2025-03-30 07:29:20 [DEBUG] clck_gen.py:128 IND CLOCK 2040
2025-03-30 07:29:21 [DEBUG] clck_gen.py:128 IND CLOCK 2142
2025-03-30 07:29:21 [DEBUG] clck_gen.py:128 IND CLOCK 2244
2025-03-30 07:29:22 [DEBUG] clck_gen.py:128 IND CLOCK 2346
2025-03-30 07:29:22 [DEBUG] clck_gen.py:128 IND CLOCK 2448
2025-03-30 07:29:23 [DEBUG] clck_gen.py:128 IND CLOCK 2550
2025-03-30 07:29:23 [DEBUG] clck_gen.py:128 IND CLOCK 2652
2025-03-30 07:29:24 [DEBUG] clck_gen.py:128 IND CLOCK 2754
2025-03-30 07:29:24 [DEBUG] clck_gen.py:128 IND CLOCK 2856
2025-03-30 07:29:24 [DEBUG] clck_gen.py:128 IND CLOCK 2958
2025-03-30 07:29:25 [DEBUG] clck_gen.py:128 IND CLOCK 3060
2025-03-30 07:29:25 [DEBUG] clck_gen.py:128 IND CLOCK 3162
2025-03-30 07:29:26 [DEBUG] clck_gen.py:128 IND CLOCK 3264
2025-03-30 07:29:26 [DEBUG] clck_gen.py:128 IND CLOCK 3366
2025-03-30 07:29:27 [DEBUG] clck_gen.py:128 IND CLOCK 3468
2025-03-30 07:29:27 [DEBUG] clck_gen.py:128 IND CLOCK 3570
2025-03-30 07:29:28 [DEBUG] clck_gen.py:128 IND CLOCK 3672
2025-03-30 07:29:28 [DEBUG] clck_gen.py:128 IND CLOCK 3774
2025-03-30 07:29:29 [DEBUG] clck_gen.py:128 IND CLOCK 3876
2025-03-30 07:29:29 [DEBUG] clck_gen.py:128 IND CLOCK 3978
2025-03-30 07:29:30 [DEBUG] clck_gen.py:128 IND CLOCK 4080
2025-03-30 07:29:30 [DEBUG] clck_gen.py:128 IND CLOCK 4182
2025-03-30 07:29:31 [DEBUG] clck_gen.py:128 IND CLOCK 4284
2025-03-30 07:29:31 [DEBUG] clck_gen.py:128 IND CLOCK 4386
2025-03-30 07:29:32 [DEBUG] clck_gen.py:128 IND CLOCK 4488
2025-03-30 07:29:32 [DEBUG] clck_gen.py:128 IND CLOCK 4590
2025-03-30 07:29:32 [DEBUG] clck_gen.py:128 IND CLOCK 4692
2025-03-30 07:29:33 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:29:33 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:29:33 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:29:33 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:29:33 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:29:33 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:29:33 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:29:33 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:29:33 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:29:33 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:29:33 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 07:29:33 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 07:29:33 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 07:29:38 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 07:29:38 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 07:29:38 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:29:38 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:29:38 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:29:38 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:29:38 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:29:38 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 07:29:38 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:29:38 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 07:29:38 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 07:29:38 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 07:29:38 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 07:29:38 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 07:29:38 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:29:38 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:29:38 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 07:29:38 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 07:29:38 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 07:29:38 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 07:29:38 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 07:29:38 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 07:29:38 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:29:38 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:29:38 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 07:29:38 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 07:29:38 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 07:29:38 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 07:29:38 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 07:29:38 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 07:29:38 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:29:38 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:29:38 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 07:29:38 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 07:29:38 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 07:29:38 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 07:29:38 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 07:29:38 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 07:29:38 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 07:29:38 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 07:29:38 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 07:29:38 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 07:29:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 07:29:38 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:29:38 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 07:29:38 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 07:29:38 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:29:38 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:29:38 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 07:29:38 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 07:29:38 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 07:29:38 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 07:29:38 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:29:38 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:29:38 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:29:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 07:29:38 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:29:38 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:29:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:29:38 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:29:38 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:29:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:29:38 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:29:38 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:29:38 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:29:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:29:38 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:29:38 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:29:38 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:29:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:29:38 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:29:38 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:29:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:29:38 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:29:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:29:38 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:29:38 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:29:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:29:38 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:29:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:29:38 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:29:38 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:29:38 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-03-30 07:29:38 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-03-30 07:29:38 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-03-30 07:29:38 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-03-30 07:29:38 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-03-30 07:29:38 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-03-30 07:29:38 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-03-30 07:29:38 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-03-30 07:29:38 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-03-30 07:29:38 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-03-30 07:29:38 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 07:29:38 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 07:29:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:29:38 [DEBUG] fake_trx.py:317 (BTS@172.18.26.20:5700) Recv FAKE_CI cmd
2025-03-30 07:29:38 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:29:38 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:29:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:29:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:29:38 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:29:38 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:29:38 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 07:29:38 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 07:29:39 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-03-30 07:29:39 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:29:39 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:29:39 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:29:39 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:29:39 [DEBUG] clck_gen.py:128 IND CLOCK 306
2025-03-30 07:29:40 [DEBUG] clck_gen.py:128 IND CLOCK 408
2025-03-30 07:29:40 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:29:40 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:29:40 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:29:40 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:29:40 [DEBUG] clck_gen.py:128 IND CLOCK 510
2025-03-30 07:29:41 [DEBUG] clck_gen.py:128 IND CLOCK 612
2025-03-30 07:29:41 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:29:41 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:29:41 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:29:41 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:29:41 [DEBUG] clck_gen.py:128 IND CLOCK 714
2025-03-30 07:29:42 [DEBUG] clck_gen.py:128 IND CLOCK 816
2025-03-30 07:29:42 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:29:42 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:29:42 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:29:42 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:29:42 [DEBUG] clck_gen.py:128 IND CLOCK 918
2025-03-30 07:29:43 [DEBUG] clck_gen.py:128 IND CLOCK 1020
2025-03-30 07:29:43 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:29:43 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:29:43 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:29:43 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:29:43 [DEBUG] clck_gen.py:128 IND CLOCK 1122
2025-03-30 07:29:44 [DEBUG] clck_gen.py:128 IND CLOCK 1224
2025-03-30 07:29:44 [DEBUG] clck_gen.py:128 IND CLOCK 1326
2025-03-30 07:29:44 [DEBUG] clck_gen.py:128 IND CLOCK 1428
2025-03-30 07:29:45 [DEBUG] clck_gen.py:128 IND CLOCK 1530
2025-03-30 07:29:45 [DEBUG] clck_gen.py:128 IND CLOCK 1632
2025-03-30 07:29:46 [DEBUG] clck_gen.py:128 IND CLOCK 1734
2025-03-30 07:29:46 [DEBUG] clck_gen.py:128 IND CLOCK 1836
2025-03-30 07:29:47 [DEBUG] clck_gen.py:128 IND CLOCK 1938
2025-03-30 07:29:47 [DEBUG] clck_gen.py:128 IND CLOCK 2040
2025-03-30 07:29:48 [DEBUG] clck_gen.py:128 IND CLOCK 2142
2025-03-30 07:29:48 [DEBUG] clck_gen.py:128 IND CLOCK 2244
2025-03-30 07:29:49 [DEBUG] clck_gen.py:128 IND CLOCK 2346
2025-03-30 07:29:49 [DEBUG] clck_gen.py:128 IND CLOCK 2448
2025-03-30 07:29:50 [DEBUG] clck_gen.py:128 IND CLOCK 2550
2025-03-30 07:29:50 [DEBUG] clck_gen.py:128 IND CLOCK 2652
2025-03-30 07:29:51 [DEBUG] clck_gen.py:128 IND CLOCK 2754
2025-03-30 07:29:51 [DEBUG] clck_gen.py:128 IND CLOCK 2856
2025-03-30 07:29:52 [DEBUG] clck_gen.py:128 IND CLOCK 2958
2025-03-30 07:29:52 [DEBUG] clck_gen.py:128 IND CLOCK 3060
2025-03-30 07:29:52 [DEBUG] clck_gen.py:128 IND CLOCK 3162
2025-03-30 07:29:53 [DEBUG] clck_gen.py:128 IND CLOCK 3264
2025-03-30 07:29:53 [DEBUG] clck_gen.py:128 IND CLOCK 3366
2025-03-30 07:29:54 [DEBUG] clck_gen.py:128 IND CLOCK 3468
2025-03-30 07:29:54 [DEBUG] clck_gen.py:128 IND CLOCK 3570
2025-03-30 07:29:55 [DEBUG] clck_gen.py:128 IND CLOCK 3672
2025-03-30 07:29:55 [DEBUG] clck_gen.py:128 IND CLOCK 3774
2025-03-30 07:29:56 [DEBUG] clck_gen.py:128 IND CLOCK 3876
2025-03-30 07:29:56 [DEBUG] clck_gen.py:128 IND CLOCK 3978
2025-03-30 07:29:57 [DEBUG] clck_gen.py:128 IND CLOCK 4080
2025-03-30 07:29:57 [DEBUG] clck_gen.py:128 IND CLOCK 4182
2025-03-30 07:29:58 [DEBUG] clck_gen.py:128 IND CLOCK 4284
2025-03-30 07:29:58 [DEBUG] clck_gen.py:128 IND CLOCK 4386
2025-03-30 07:29:59 [DEBUG] clck_gen.py:128 IND CLOCK 4488
2025-03-30 07:29:59 [DEBUG] clck_gen.py:128 IND CLOCK 4590
2025-03-30 07:30:00 [DEBUG] clck_gen.py:128 IND CLOCK 4692
2025-03-30 07:30:00 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:30:00 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:30:00 [WARNING] transceiver.py:287 (MS@172.18.26.22:6700) RX TRXD message (fn=4771 tn=4 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:30:00 [WARNING] transceiver.py:287 (MS@172.18.26.22:6700) RX TRXD message (fn=4771 tn=5 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:30:00 [WARNING] transceiver.py:287 (MS@172.18.26.22:6700) RX TRXD message (fn=4771 tn=6 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:30:00 [WARNING] transceiver.py:287 (MS@172.18.26.22:6700) RX TRXD message (fn=4771 tn=7 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:30:00 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:30:00 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:30:00 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:30:00 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:30:00 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:30:00 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:30:00 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:30:00 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:30:00 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 07:30:00 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 07:30:00 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 07:30:05 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 07:30:05 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 07:30:05 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:30:05 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:30:05 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:30:05 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:30:05 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:30:05 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 07:30:05 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:30:05 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 07:30:05 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 07:30:05 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 07:30:05 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 07:30:05 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 07:30:05 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:30:05 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 07:30:05 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 07:30:05 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 07:30:05 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:30:05 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 07:30:05 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 07:30:05 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 07:30:05 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:30:05 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 07:30:05 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:30:05 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 07:30:05 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 07:30:05 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 07:30:05 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 07:30:05 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 07:30:05 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:30:05 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 07:30:05 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:30:05 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 07:30:05 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 07:30:05 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 07:30:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 07:30:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 07:30:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 07:30:05 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 07:30:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 07:30:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 07:30:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 07:30:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:30:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 07:30:05 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 07:30:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:30:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:30:05 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 07:30:05 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 07:30:05 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 07:30:05 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 07:30:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:30:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:30:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:30:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 07:30:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:30:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:30:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:30:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:30:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:30:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:30:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:30:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:30:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:30:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:30:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:30:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:30:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:30:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:30:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:30:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:30:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:30:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:30:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:30:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:30:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:30:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:30:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:30:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:30:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:30:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:30:05 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-03-30 07:30:05 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-03-30 07:30:05 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-03-30 07:30:05 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-03-30 07:30:05 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-03-30 07:30:05 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-03-30 07:30:05 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-03-30 07:30:05 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-03-30 07:30:05 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-03-30 07:30:05 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-03-30 07:30:05 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=0 bl=148 pwr=0
2025-03-30 07:30:05 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=1 bl=148 pwr=0
2025-03-30 07:30:05 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=2 bl=148 pwr=0
2025-03-30 07:30:05 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=3 bl=148 pwr=0
2025-03-30 07:30:05 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=4 bl=148 pwr=0
2025-03-30 07:30:05 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=5 bl=148 pwr=0
2025-03-30 07:30:05 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=6 bl=148 pwr=0
2025-03-30 07:30:05 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=7 bl=148 pwr=0
2025-03-30 07:30:05 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 07:30:05 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 07:30:05 [DEBUG] fake_trx.py:317 (BTS@172.18.26.20:5700) Recv FAKE_CI cmd
2025-03-30 07:30:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:30:05 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:30:05 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:30:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:30:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:30:05 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:30:05 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:30:05 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 07:30:05 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 07:30:06 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-03-30 07:30:06 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:30:06 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:30:06 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:30:06 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:30:06 [DEBUG] clck_gen.py:128 IND CLOCK 306
2025-03-30 07:30:07 [DEBUG] clck_gen.py:128 IND CLOCK 408
2025-03-30 07:30:07 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:30:07 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:30:07 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:30:07 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:30:07 [DEBUG] clck_gen.py:128 IND CLOCK 510
2025-03-30 07:30:08 [DEBUG] clck_gen.py:128 IND CLOCK 612
2025-03-30 07:30:08 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:30:08 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:30:08 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:30:08 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:30:08 [DEBUG] clck_gen.py:128 IND CLOCK 714
2025-03-30 07:30:09 [DEBUG] clck_gen.py:128 IND CLOCK 816
2025-03-30 07:30:09 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:30:09 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:30:09 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:30:09 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:30:09 [DEBUG] clck_gen.py:128 IND CLOCK 918
2025-03-30 07:30:10 [DEBUG] clck_gen.py:128 IND CLOCK 1020
2025-03-30 07:30:10 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:30:10 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:30:10 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:30:10 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:30:10 [DEBUG] clck_gen.py:128 IND CLOCK 1122
2025-03-30 07:30:11 [DEBUG] clck_gen.py:128 IND CLOCK 1224
2025-03-30 07:30:11 [DEBUG] clck_gen.py:128 IND CLOCK 1326
2025-03-30 07:30:12 [DEBUG] clck_gen.py:128 IND CLOCK 1428
2025-03-30 07:30:12 [DEBUG] clck_gen.py:128 IND CLOCK 1530
2025-03-30 07:30:12 [DEBUG] clck_gen.py:128 IND CLOCK 1632
2025-03-30 07:30:13 [DEBUG] clck_gen.py:128 IND CLOCK 1734
2025-03-30 07:30:13 [DEBUG] clck_gen.py:128 IND CLOCK 1836
2025-03-30 07:30:14 [DEBUG] clck_gen.py:128 IND CLOCK 1938
2025-03-30 07:30:14 [DEBUG] clck_gen.py:128 IND CLOCK 2040
2025-03-30 07:30:15 [DEBUG] clck_gen.py:128 IND CLOCK 2142
2025-03-30 07:30:15 [DEBUG] clck_gen.py:128 IND CLOCK 2244
2025-03-30 07:30:16 [DEBUG] clck_gen.py:128 IND CLOCK 2346
2025-03-30 07:30:16 [DEBUG] clck_gen.py:128 IND CLOCK 2448
2025-03-30 07:30:17 [DEBUG] clck_gen.py:128 IND CLOCK 2550
2025-03-30 07:30:17 [DEBUG] clck_gen.py:128 IND CLOCK 2652
2025-03-30 07:30:18 [DEBUG] clck_gen.py:128 IND CLOCK 2754
2025-03-30 07:30:18 [DEBUG] clck_gen.py:128 IND CLOCK 2856
2025-03-30 07:30:19 [DEBUG] clck_gen.py:128 IND CLOCK 2958
2025-03-30 07:30:19 [DEBUG] clck_gen.py:128 IND CLOCK 3060
2025-03-30 07:30:20 [DEBUG] clck_gen.py:128 IND CLOCK 3162
2025-03-30 07:30:20 [DEBUG] clck_gen.py:128 IND CLOCK 3264
2025-03-30 07:30:20 [DEBUG] clck_gen.py:128 IND CLOCK 3366
2025-03-30 07:30:21 [DEBUG] clck_gen.py:128 IND CLOCK 3468
2025-03-30 07:30:21 [DEBUG] clck_gen.py:128 IND CLOCK 3570
2025-03-30 07:30:22 [DEBUG] clck_gen.py:128 IND CLOCK 3672
2025-03-30 07:30:22 [DEBUG] clck_gen.py:128 IND CLOCK 3774
2025-03-30 07:30:23 [DEBUG] clck_gen.py:128 IND CLOCK 3876
2025-03-30 07:30:23 [DEBUG] clck_gen.py:128 IND CLOCK 3978
2025-03-30 07:30:24 [DEBUG] clck_gen.py:128 IND CLOCK 4080
2025-03-30 07:30:24 [DEBUG] clck_gen.py:128 IND CLOCK 4182
2025-03-30 07:30:25 [DEBUG] clck_gen.py:128 IND CLOCK 4284
2025-03-30 07:30:25 [DEBUG] clck_gen.py:128 IND CLOCK 4386
2025-03-30 07:30:26 [DEBUG] clck_gen.py:128 IND CLOCK 4488
2025-03-30 07:30:26 [DEBUG] clck_gen.py:128 IND CLOCK 4590
2025-03-30 07:30:27 [DEBUG] clck_gen.py:128 IND CLOCK 4692
2025-03-30 07:30:27 [DEBUG] clck_gen.py:128 IND CLOCK 4794
2025-03-30 07:30:28 [DEBUG] clck_gen.py:128 IND CLOCK 4896
2025-03-30 07:30:28 [DEBUG] clck_gen.py:128 IND CLOCK 4998
2025-03-30 07:30:28 [DEBUG] clck_gen.py:128 IND CLOCK 5100
2025-03-30 07:30:29 [DEBUG] clck_gen.py:128 IND CLOCK 5202
2025-03-30 07:30:29 [DEBUG] clck_gen.py:128 IND CLOCK 5304
2025-03-30 07:30:30 [DEBUG] clck_gen.py:128 IND CLOCK 5406
2025-03-30 07:30:30 [DEBUG] clck_gen.py:128 IND CLOCK 5508
2025-03-30 07:30:31 [DEBUG] clck_gen.py:128 IND CLOCK 5610
2025-03-30 07:30:31 [DEBUG] clck_gen.py:128 IND CLOCK 5712
2025-03-30 07:30:32 [DEBUG] clck_gen.py:128 IND CLOCK 5814
2025-03-30 07:30:32 [DEBUG] clck_gen.py:128 IND CLOCK 5916
2025-03-30 07:30:33 [DEBUG] clck_gen.py:128 IND CLOCK 6018
2025-03-30 07:30:33 [DEBUG] clck_gen.py:128 IND CLOCK 6120
2025-03-30 07:30:34 [DEBUG] clck_gen.py:128 IND CLOCK 6222
2025-03-30 07:30:34 [DEBUG] clck_gen.py:128 IND CLOCK 6324
2025-03-30 07:30:35 [DEBUG] clck_gen.py:128 IND CLOCK 6426
2025-03-30 07:30:35 [DEBUG] clck_gen.py:128 IND CLOCK 6528
2025-03-30 07:30:36 [DEBUG] clck_gen.py:128 IND CLOCK 6630
2025-03-30 07:30:36 [DEBUG] clck_gen.py:128 IND CLOCK 6732
2025-03-30 07:30:36 [DEBUG] clck_gen.py:128 IND CLOCK 6834
2025-03-30 07:30:37 [DEBUG] clck_gen.py:128 IND CLOCK 6936
2025-03-30 07:30:37 [DEBUG] clck_gen.py:128 IND CLOCK 7038
2025-03-30 07:30:38 [DEBUG] clck_gen.py:128 IND CLOCK 7140
2025-03-30 07:30:38 [DEBUG] clck_gen.py:128 IND CLOCK 7242
2025-03-30 07:30:39 [DEBUG] clck_gen.py:128 IND CLOCK 7344
2025-03-30 07:30:39 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:30:39 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:30:39 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:30:39 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:30:39 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:30:39 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:30:39 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:30:39 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:30:39 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:30:39 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 07:30:39 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 07:30:39 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 07:30:39 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:30:44 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 07:30:44 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 07:30:44 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:30:44 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:30:44 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:30:44 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:30:44 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:30:44 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 07:30:44 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:30:44 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 07:30:44 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 07:30:44 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 07:30:44 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 07:30:44 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 07:30:44 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:30:44 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:30:44 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 07:30:44 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 07:30:44 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 07:30:44 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 07:30:44 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 07:30:44 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 07:30:44 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:30:44 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:30:44 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 07:30:44 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 07:30:44 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 07:30:44 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 07:30:44 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 07:30:44 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 07:30:44 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:30:44 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:30:44 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 07:30:44 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 07:30:44 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 07:30:44 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 07:30:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 07:30:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 07:30:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 07:30:44 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 07:30:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 07:30:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 07:30:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 07:30:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:30:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 07:30:44 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 07:30:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:30:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:30:44 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 07:30:44 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 07:30:44 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 07:30:44 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 07:30:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:30:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:30:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:30:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 07:30:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:30:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:30:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:30:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:30:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:30:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:30:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:30:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:30:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:30:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:30:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:30:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:30:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:30:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:30:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:30:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:30:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:30:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:30:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:30:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:30:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:30:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:30:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:30:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:30:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:30:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:30:44 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-03-30 07:30:44 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-03-30 07:30:44 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-03-30 07:30:44 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-03-30 07:30:44 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-03-30 07:30:44 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-03-30 07:30:44 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-03-30 07:30:44 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-03-30 07:30:44 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-03-30 07:30:44 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-03-30 07:30:44 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=0 bl=148 pwr=0
2025-03-30 07:30:44 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=1 bl=148 pwr=0
2025-03-30 07:30:44 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=2 bl=148 pwr=0
2025-03-30 07:30:44 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=3 bl=148 pwr=0
2025-03-30 07:30:44 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=4 bl=148 pwr=0
2025-03-30 07:30:44 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=5 bl=148 pwr=0
2025-03-30 07:30:44 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=6 bl=148 pwr=0
2025-03-30 07:30:44 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=7 bl=148 pwr=0
2025-03-30 07:30:45 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 07:30:45 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 07:30:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:30:45 [DEBUG] fake_trx.py:317 (BTS@172.18.26.20:5700) Recv FAKE_CI cmd
2025-03-30 07:30:45 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:30:45 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:30:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:30:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:30:45 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:30:45 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:30:45 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 07:30:45 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 07:30:45 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-03-30 07:30:45 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:30:45 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:30:45 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:30:45 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:30:45 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=218): ver=1 fn=217 tn=0 bl=148 pwr=0
2025-03-30 07:30:45 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=218): ver=1 fn=217 tn=1 bl=148 pwr=0
2025-03-30 07:30:45 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=218): ver=1 fn=217 tn=2 bl=148 pwr=0
2025-03-30 07:30:45 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=218): ver=1 fn=217 tn=3 bl=148 pwr=0
2025-03-30 07:30:45 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=218): ver=1 fn=217 tn=4 bl=148 pwr=0
2025-03-30 07:30:45 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=218): ver=1 fn=217 tn=5 bl=148 pwr=0
2025-03-30 07:30:45 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=218): ver=1 fn=217 tn=6 bl=148 pwr=0
2025-03-30 07:30:45 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=218): ver=1 fn=217 tn=7 bl=148 pwr=0
2025-03-30 07:30:45 [DEBUG] clck_gen.py:128 IND CLOCK 306
2025-03-30 07:30:46 [DEBUG] clck_gen.py:128 IND CLOCK 408
2025-03-30 07:30:46 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:30:46 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:30:46 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:30:46 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:30:46 [DEBUG] clck_gen.py:128 IND CLOCK 510
2025-03-30 07:30:47 [DEBUG] clck_gen.py:128 IND CLOCK 612
2025-03-30 07:30:47 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:30:47 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:30:47 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:30:47 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:30:47 [DEBUG] clck_gen.py:128 IND CLOCK 714
2025-03-30 07:30:48 [DEBUG] clck_gen.py:128 IND CLOCK 816
2025-03-30 07:30:48 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:30:48 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:30:48 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:30:48 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:30:48 [DEBUG] clck_gen.py:128 IND CLOCK 918
2025-03-30 07:30:49 [DEBUG] clck_gen.py:128 IND CLOCK 1020
2025-03-30 07:30:49 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:30:49 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:30:49 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:30:49 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:30:49 [DEBUG] clck_gen.py:128 IND CLOCK 1122
2025-03-30 07:30:50 [DEBUG] clck_gen.py:128 IND CLOCK 1224
2025-03-30 07:30:50 [DEBUG] clck_gen.py:128 IND CLOCK 1326
2025-03-30 07:30:51 [DEBUG] clck_gen.py:128 IND CLOCK 1428
2025-03-30 07:30:51 [DEBUG] clck_gen.py:128 IND CLOCK 1530
2025-03-30 07:30:52 [DEBUG] clck_gen.py:128 IND CLOCK 1632
2025-03-30 07:30:52 [DEBUG] clck_gen.py:128 IND CLOCK 1734
2025-03-30 07:30:52 [DEBUG] clck_gen.py:128 IND CLOCK 1836
2025-03-30 07:30:53 [DEBUG] clck_gen.py:128 IND CLOCK 1938
2025-03-30 07:30:53 [DEBUG] clck_gen.py:128 IND CLOCK 2040
2025-03-30 07:30:54 [DEBUG] clck_gen.py:128 IND CLOCK 2142
2025-03-30 07:30:54 [DEBUG] clck_gen.py:128 IND CLOCK 2244
2025-03-30 07:30:55 [DEBUG] clck_gen.py:128 IND CLOCK 2346
2025-03-30 07:30:55 [DEBUG] clck_gen.py:128 IND CLOCK 2448
2025-03-30 07:30:56 [DEBUG] clck_gen.py:128 IND CLOCK 2550
2025-03-30 07:30:56 [DEBUG] clck_gen.py:128 IND CLOCK 2652
2025-03-30 07:30:57 [DEBUG] clck_gen.py:128 IND CLOCK 2754
2025-03-30 07:30:57 [DEBUG] clck_gen.py:128 IND CLOCK 2856
2025-03-30 07:30:58 [DEBUG] clck_gen.py:128 IND CLOCK 2958
2025-03-30 07:30:58 [DEBUG] clck_gen.py:128 IND CLOCK 3060
2025-03-30 07:30:59 [DEBUG] clck_gen.py:128 IND CLOCK 3162
2025-03-30 07:30:59 [DEBUG] clck_gen.py:128 IND CLOCK 3264
2025-03-30 07:31:00 [DEBUG] clck_gen.py:128 IND CLOCK 3366
2025-03-30 07:31:00 [DEBUG] clck_gen.py:128 IND CLOCK 3468
2025-03-30 07:31:00 [DEBUG] clck_gen.py:128 IND CLOCK 3570
2025-03-30 07:31:01 [DEBUG] clck_gen.py:128 IND CLOCK 3672
2025-03-30 07:31:01 [DEBUG] clck_gen.py:128 IND CLOCK 3774
2025-03-30 07:31:02 [DEBUG] clck_gen.py:128 IND CLOCK 3876
2025-03-30 07:31:02 [DEBUG] clck_gen.py:128 IND CLOCK 3978
2025-03-30 07:31:03 [DEBUG] clck_gen.py:128 IND CLOCK 4080
2025-03-30 07:31:03 [DEBUG] clck_gen.py:128 IND CLOCK 4182
2025-03-30 07:31:04 [DEBUG] clck_gen.py:128 IND CLOCK 4284
2025-03-30 07:31:04 [DEBUG] clck_gen.py:128 IND CLOCK 4386
2025-03-30 07:31:05 [DEBUG] clck_gen.py:128 IND CLOCK 4488
2025-03-30 07:31:05 [DEBUG] clck_gen.py:128 IND CLOCK 4590
2025-03-30 07:31:06 [DEBUG] clck_gen.py:128 IND CLOCK 4692
2025-03-30 07:31:06 [DEBUG] clck_gen.py:128 IND CLOCK 4794
2025-03-30 07:31:07 [DEBUG] clck_gen.py:128 IND CLOCK 4896
2025-03-30 07:31:07 [DEBUG] clck_gen.py:128 IND CLOCK 4998
2025-03-30 07:31:08 [DEBUG] clck_gen.py:128 IND CLOCK 5100
2025-03-30 07:31:08 [DEBUG] clck_gen.py:128 IND CLOCK 5202
2025-03-30 07:31:08 [DEBUG] clck_gen.py:128 IND CLOCK 5304
2025-03-30 07:31:09 [DEBUG] clck_gen.py:128 IND CLOCK 5406
2025-03-30 07:31:09 [DEBUG] clck_gen.py:128 IND CLOCK 5508
2025-03-30 07:31:10 [DEBUG] clck_gen.py:128 IND CLOCK 5610
2025-03-30 07:31:10 [DEBUG] clck_gen.py:128 IND CLOCK 5712
2025-03-30 07:31:11 [DEBUG] clck_gen.py:128 IND CLOCK 5814
2025-03-30 07:31:11 [DEBUG] clck_gen.py:128 IND CLOCK 5916
2025-03-30 07:31:12 [DEBUG] clck_gen.py:128 IND CLOCK 6018
2025-03-30 07:31:12 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:31:12 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:31:12 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:31:12 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:31:12 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:31:12 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:31:12 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:31:12 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:31:12 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:31:12 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:31:12 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 07:31:12 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 07:31:12 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 07:31:17 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 07:31:17 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 07:31:17 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:31:17 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:31:17 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:31:17 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:31:17 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:31:17 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 07:31:17 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:31:17 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 07:31:17 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 07:31:17 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 07:31:17 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 07:31:17 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 07:31:17 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:31:17 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:31:17 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 07:31:17 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 07:31:17 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 07:31:17 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 07:31:17 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 07:31:17 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 07:31:17 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:31:17 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:31:17 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 07:31:17 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 07:31:17 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 07:31:17 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 07:31:17 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 07:31:17 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 07:31:17 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:31:17 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:31:17 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 07:31:17 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 07:31:17 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 07:31:17 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 07:31:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 07:31:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 07:31:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 07:31:17 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 07:31:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 07:31:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 07:31:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 07:31:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:31:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 07:31:17 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 07:31:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:31:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:31:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:31:17 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 07:31:17 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 07:31:17 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 07:31:17 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 07:31:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:31:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:31:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:31:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 07:31:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:31:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:31:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:31:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:31:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:31:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:31:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:31:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:31:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:31:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:31:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:31:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:31:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:31:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:31:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:31:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:31:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:31:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:31:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:31:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:31:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:31:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:31:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:31:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:31:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:31:17 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-03-30 07:31:18 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-03-30 07:31:18 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-03-30 07:31:18 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-03-30 07:31:18 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-03-30 07:31:18 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-03-30 07:31:18 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-03-30 07:31:18 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-03-30 07:31:18 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-03-30 07:31:18 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-03-30 07:31:18 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=0 bl=148 pwr=0
2025-03-30 07:31:18 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=1 bl=148 pwr=0
2025-03-30 07:31:18 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=2 bl=148 pwr=0
2025-03-30 07:31:18 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=3 bl=148 pwr=0
2025-03-30 07:31:18 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=4 bl=148 pwr=0
2025-03-30 07:31:18 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=5 bl=148 pwr=0
2025-03-30 07:31:18 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=6 bl=148 pwr=0
2025-03-30 07:31:18 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=7 bl=148 pwr=0
2025-03-30 07:31:18 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 07:31:18 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 07:31:18 [DEBUG] fake_trx.py:317 (BTS@172.18.26.20:5700) Recv FAKE_CI cmd
2025-03-30 07:31:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:31:18 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:31:18 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:31:18 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:31:18 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:31:18 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:31:18 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:31:18 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:31:18 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:31:18 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 07:31:18 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 07:31:18 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 07:31:18 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=120 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:31:18 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=120 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:31:18 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=120 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:31:18 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=120 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:31:18 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=120 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:31:18 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=120 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:31:18 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=120 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:31:18 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=120 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:31:23 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 07:31:23 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 07:31:23 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:31:23 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:31:23 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:31:23 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:31:23 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:31:23 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 07:31:23 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:31:23 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 07:31:23 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 07:31:23 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 07:31:23 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 07:31:23 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 07:31:23 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:31:23 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:31:23 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 07:31:23 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 07:31:23 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 07:31:23 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 07:31:23 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 07:31:23 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 07:31:23 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:31:23 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:31:23 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 07:31:23 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 07:31:23 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 07:31:23 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 07:31:23 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 07:31:23 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 07:31:23 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:31:23 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:31:23 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 07:31:23 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 07:31:23 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 07:31:23 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 07:31:23 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 07:31:23 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 07:31:23 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 07:31:23 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 07:31:23 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 07:31:23 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 07:31:23 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 07:31:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 07:31:23 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:31:23 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:31:23 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 07:31:23 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:31:23 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:31:23 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:31:23 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 07:31:23 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 07:31:23 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 07:31:23 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 07:31:23 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:31:23 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:31:23 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:31:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 07:31:23 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:31:23 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:31:23 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:31:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:31:23 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:31:23 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:31:23 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:31:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:31:23 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:31:23 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:31:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:31:23 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:31:23 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:31:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:31:23 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:31:23 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:31:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:31:23 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:31:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:31:23 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:31:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:31:23 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:31:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:31:23 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:31:23 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-03-30 07:31:23 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-03-30 07:31:23 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-03-30 07:31:23 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-03-30 07:31:23 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-03-30 07:31:23 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-03-30 07:31:23 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-03-30 07:31:23 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-03-30 07:31:23 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-03-30 07:31:23 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-03-30 07:31:23 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=0 bl=148 pwr=0
2025-03-30 07:31:23 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=1 bl=148 pwr=0
2025-03-30 07:31:23 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=2 bl=148 pwr=0
2025-03-30 07:31:23 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=3 bl=148 pwr=0
2025-03-30 07:31:23 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=4 bl=148 pwr=0
2025-03-30 07:31:23 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=5 bl=148 pwr=0
2025-03-30 07:31:23 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=6 bl=148 pwr=0
2025-03-30 07:31:23 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=7 bl=148 pwr=0
2025-03-30 07:31:23 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 07:31:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:31:23 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 07:31:23 [DEBUG] fake_trx.py:317 (BTS@172.18.26.20:5700) Recv FAKE_CI cmd
2025-03-30 07:31:23 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:31:23 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:31:23 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:31:23 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:31:23 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:31:23 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:31:23 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:31:23 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:31:23 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 07:31:23 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 07:31:23 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 07:31:28 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 07:31:28 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 07:31:28 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:31:28 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:31:28 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:31:28 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:31:28 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:31:28 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 07:31:28 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:31:28 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 07:31:28 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 07:31:28 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 07:31:28 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 07:31:28 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 07:31:28 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:31:28 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:31:28 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 07:31:28 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 07:31:28 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 07:31:28 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 07:31:28 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 07:31:28 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 07:31:28 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:31:28 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:31:28 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 07:31:28 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 07:31:28 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 07:31:28 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 07:31:28 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 07:31:28 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 07:31:28 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:31:28 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:31:28 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 07:31:28 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 07:31:28 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 07:31:28 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 07:31:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 07:31:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 07:31:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 07:31:28 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 07:31:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 07:31:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 07:31:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 07:31:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:31:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 07:31:28 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 07:31:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:31:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:31:28 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 07:31:28 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 07:31:28 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 07:31:28 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 07:31:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:31:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:31:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:31:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 07:31:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:31:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:31:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:31:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:31:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:31:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:31:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:31:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:31:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:31:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:31:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:31:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:31:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:31:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:31:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:31:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:31:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:31:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:31:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:31:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:31:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:31:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:31:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:31:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:31:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:31:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:31:28 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-03-30 07:31:29 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-03-30 07:31:29 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-03-30 07:31:29 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-03-30 07:31:29 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-03-30 07:31:29 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-03-30 07:31:29 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-03-30 07:31:29 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-03-30 07:31:29 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-03-30 07:31:29 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-03-30 07:31:29 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=0 bl=148 pwr=0
2025-03-30 07:31:29 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=1 bl=148 pwr=0
2025-03-30 07:31:29 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=2 bl=148 pwr=0
2025-03-30 07:31:29 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=3 bl=148 pwr=0
2025-03-30 07:31:29 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=4 bl=148 pwr=0
2025-03-30 07:31:29 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=5 bl=148 pwr=0
2025-03-30 07:31:29 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=6 bl=148 pwr=0
2025-03-30 07:31:29 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=7 bl=148 pwr=0
2025-03-30 07:31:29 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 07:31:29 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 07:31:29 [DEBUG] fake_trx.py:317 (BTS@172.18.26.20:5700) Recv FAKE_CI cmd
2025-03-30 07:31:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:31:29 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:31:29 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:31:29 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:31:29 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:31:29 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:31:29 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:31:29 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:31:29 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:31:29 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 07:31:29 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 07:31:29 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 07:31:34 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 07:31:34 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 07:31:34 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:31:34 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:31:34 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:31:34 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:31:34 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:31:34 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 07:31:34 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:31:34 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 07:31:34 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 07:31:34 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 07:31:34 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 07:31:34 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 07:31:34 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:31:34 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:31:34 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 07:31:34 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 07:31:34 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 07:31:34 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 07:31:34 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 07:31:34 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 07:31:34 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:31:34 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:31:34 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 07:31:34 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 07:31:34 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 07:31:34 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 07:31:34 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 07:31:34 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 07:31:34 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:31:34 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:31:34 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 07:31:34 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 07:31:34 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 07:31:34 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 07:31:34 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 07:31:34 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 07:31:34 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 07:31:34 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 07:31:34 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 07:31:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 07:31:34 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 07:31:34 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 07:31:34 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 07:31:34 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:31:34 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:31:34 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 07:31:34 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 07:31:34 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 07:31:34 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 07:31:34 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:31:34 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:31:34 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:31:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 07:31:34 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:31:34 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:31:34 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:31:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:31:34 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:31:34 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:31:34 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:31:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:31:34 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:31:34 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:31:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:31:34 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:31:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:31:34 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:31:34 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:31:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:31:34 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:31:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:31:34 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:31:34 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:31:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:31:34 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:31:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:31:34 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:31:34 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:31:34 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:31:34 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:31:34 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-03-30 07:31:34 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-03-30 07:31:34 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-03-30 07:31:34 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-03-30 07:31:34 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-03-30 07:31:34 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-03-30 07:31:34 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-03-30 07:31:34 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-03-30 07:31:34 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-03-30 07:31:34 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-03-30 07:31:34 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=0 bl=148 pwr=0
2025-03-30 07:31:34 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=1 bl=148 pwr=0
2025-03-30 07:31:34 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=2 bl=148 pwr=0
2025-03-30 07:31:34 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=3 bl=148 pwr=0
2025-03-30 07:31:34 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=4 bl=148 pwr=0
2025-03-30 07:31:34 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=5 bl=148 pwr=0
2025-03-30 07:31:34 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=6 bl=148 pwr=0
2025-03-30 07:31:34 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=7 bl=148 pwr=0
2025-03-30 07:31:34 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 07:31:34 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 07:31:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:31:34 [DEBUG] fake_trx.py:317 (BTS@172.18.26.20:5700) Recv FAKE_CI cmd
2025-03-30 07:31:34 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:31:34 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:31:34 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:31:34 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:31:34 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:31:34 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:31:34 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 07:31:34 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 07:31:35 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-03-30 07:31:35 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:31:35 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:31:35 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:31:35 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:31:35 [DEBUG] clck_gen.py:128 IND CLOCK 306
2025-03-30 07:31:36 [DEBUG] clck_gen.py:128 IND CLOCK 408
2025-03-30 07:31:36 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:31:36 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:31:36 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:31:36 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:31:36 [DEBUG] clck_gen.py:128 IND CLOCK 510
2025-03-30 07:31:37 [DEBUG] clck_gen.py:128 IND CLOCK 612
2025-03-30 07:31:37 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:31:37 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:31:37 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:31:37 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:31:37 [DEBUG] clck_gen.py:128 IND CLOCK 714
2025-03-30 07:31:38 [DEBUG] clck_gen.py:128 IND CLOCK 816
2025-03-30 07:31:38 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:31:38 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:31:38 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:31:38 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:31:38 [DEBUG] clck_gen.py:128 IND CLOCK 918
2025-03-30 07:31:39 [DEBUG] clck_gen.py:128 IND CLOCK 1020
2025-03-30 07:31:39 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:31:39 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:31:39 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:31:39 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:31:39 [DEBUG] clck_gen.py:128 IND CLOCK 1122
2025-03-30 07:31:40 [DEBUG] clck_gen.py:128 IND CLOCK 1224
2025-03-30 07:31:40 [DEBUG] clck_gen.py:128 IND CLOCK 1326
2025-03-30 07:31:41 [DEBUG] clck_gen.py:128 IND CLOCK 1428
2025-03-30 07:31:41 [DEBUG] clck_gen.py:128 IND CLOCK 1530
2025-03-30 07:31:41 [DEBUG] clck_gen.py:128 IND CLOCK 1632
2025-03-30 07:31:42 [DEBUG] clck_gen.py:128 IND CLOCK 1734
2025-03-30 07:31:42 [DEBUG] clck_gen.py:128 IND CLOCK 1836
2025-03-30 07:31:43 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:31:43 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:31:43 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:31:43 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:31:43 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:31:43 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:31:43 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:31:43 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:31:43 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:31:43 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:31:43 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 07:31:43 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 07:31:43 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 07:31:43 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=1861 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:31:43 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=1861 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:31:43 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=1861 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:31:43 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=1861 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:31:43 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=1861 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:31:43 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=1861 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:31:43 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=1861 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:31:43 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=1861 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:31:48 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 07:31:48 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 07:31:48 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:31:48 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:31:48 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:31:48 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:31:48 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:31:48 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 07:31:48 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:31:48 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 07:31:48 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 07:31:48 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 07:31:48 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 07:31:48 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 07:31:48 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:31:48 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:31:48 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 07:31:48 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 07:31:48 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 07:31:48 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 07:31:48 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 07:31:48 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 07:31:48 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:31:48 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:31:48 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 07:31:48 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 07:31:48 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 07:31:48 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 07:31:48 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 07:31:48 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 07:31:48 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:31:48 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:31:48 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 07:31:48 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 07:31:48 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 07:31:48 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 07:31:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 07:31:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 07:31:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 07:31:48 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 07:31:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 07:31:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 07:31:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 07:31:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 07:31:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:31:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:31:48 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 07:31:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:31:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:31:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:31:48 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 07:31:48 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 07:31:48 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 07:31:48 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 07:31:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:31:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:31:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:31:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 07:31:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:31:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:31:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:31:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:31:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:31:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:31:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:31:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:31:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:31:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:31:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:31:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:31:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:31:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:31:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:31:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:31:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:31:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:31:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:31:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:31:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:31:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:31:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:31:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:31:48 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-03-30 07:31:48 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-03-30 07:31:48 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=107): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-03-30 07:31:48 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=107): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-03-30 07:31:48 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=107): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-03-30 07:31:48 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=107): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-03-30 07:31:48 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=107): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-03-30 07:31:48 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=107): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-03-30 07:31:48 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=107): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-03-30 07:31:48 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=107): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-03-30 07:31:48 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=107): ver=1 fn=105 tn=0 bl=148 pwr=0
2025-03-30 07:31:48 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=107): ver=1 fn=105 tn=1 bl=148 pwr=0
2025-03-30 07:31:48 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=107): ver=1 fn=105 tn=2 bl=148 pwr=0
2025-03-30 07:31:48 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=107): ver=1 fn=105 tn=3 bl=148 pwr=0
2025-03-30 07:31:48 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=107): ver=1 fn=105 tn=4 bl=148 pwr=0
2025-03-30 07:31:48 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=107): ver=1 fn=105 tn=5 bl=148 pwr=0
2025-03-30 07:31:48 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=107): ver=1 fn=105 tn=6 bl=148 pwr=0
2025-03-30 07:31:48 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=107): ver=1 fn=105 tn=7 bl=148 pwr=0
2025-03-30 07:31:48 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=107): ver=1 fn=106 tn=0 bl=148 pwr=0
2025-03-30 07:31:48 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=107): ver=1 fn=106 tn=1 bl=148 pwr=0
2025-03-30 07:31:48 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=107): ver=1 fn=106 tn=2 bl=148 pwr=0
2025-03-30 07:31:48 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=107): ver=1 fn=106 tn=3 bl=148 pwr=0
2025-03-30 07:31:48 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=107): ver=1 fn=106 tn=4 bl=148 pwr=0
2025-03-30 07:31:48 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=107): ver=1 fn=106 tn=5 bl=148 pwr=0
2025-03-30 07:31:48 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=107): ver=1 fn=106 tn=6 bl=148 pwr=0
2025-03-30 07:31:48 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=107): ver=1 fn=106 tn=7 bl=148 pwr=0
2025-03-30 07:31:48 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 07:31:48 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 07:31:48 [DEBUG] fake_trx.py:317 (BTS@172.18.26.20:5700) Recv FAKE_CI cmd
2025-03-30 07:31:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:31:48 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:31:48 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:31:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:31:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:31:48 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:31:48 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:31:48 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 07:31:48 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 07:31:48 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-03-30 07:31:49 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:31:49 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:31:49 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:31:49 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:31:49 [DEBUG] clck_gen.py:128 IND CLOCK 306
2025-03-30 07:31:49 [DEBUG] clck_gen.py:128 IND CLOCK 408
2025-03-30 07:31:50 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:31:50 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:31:50 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:31:50 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:31:50 [DEBUG] clck_gen.py:128 IND CLOCK 510
2025-03-30 07:31:50 [DEBUG] clck_gen.py:128 IND CLOCK 612
2025-03-30 07:31:51 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:31:51 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:31:51 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:31:51 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:31:51 [DEBUG] clck_gen.py:128 IND CLOCK 714
2025-03-30 07:31:51 [DEBUG] clck_gen.py:128 IND CLOCK 816
2025-03-30 07:31:52 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:31:52 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:31:52 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:31:52 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:31:52 [DEBUG] clck_gen.py:128 IND CLOCK 918
2025-03-30 07:31:52 [DEBUG] clck_gen.py:128 IND CLOCK 1020
2025-03-30 07:31:53 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:31:53 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:31:53 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:31:53 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:31:53 [DEBUG] clck_gen.py:128 IND CLOCK 1122
2025-03-30 07:31:53 [DEBUG] clck_gen.py:128 IND CLOCK 1224
2025-03-30 07:31:54 [DEBUG] clck_gen.py:128 IND CLOCK 1326
2025-03-30 07:31:54 [DEBUG] clck_gen.py:128 IND CLOCK 1428
2025-03-30 07:31:55 [DEBUG] clck_gen.py:128 IND CLOCK 1530
2025-03-30 07:31:55 [DEBUG] clck_gen.py:128 IND CLOCK 1632
2025-03-30 07:31:56 [DEBUG] clck_gen.py:128 IND CLOCK 1734
2025-03-30 07:31:56 [DEBUG] clck_gen.py:128 IND CLOCK 1836
2025-03-30 07:31:56 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:31:56 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:31:56 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:31:56 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:31:56 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:31:56 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:31:56 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:31:56 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:31:56 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:31:56 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 07:31:56 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 07:31:56 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 07:31:56 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:32:01 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 07:32:01 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 07:32:01 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:32:01 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:32:01 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:32:01 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:32:01 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:32:01 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 07:32:01 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:32:01 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 07:32:01 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 07:32:01 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 07:32:01 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 07:32:01 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 07:32:01 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:32:01 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:32:01 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 07:32:01 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 07:32:01 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 07:32:01 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 07:32:01 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 07:32:01 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 07:32:01 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:32:01 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:32:01 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 07:32:01 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 07:32:01 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 07:32:01 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 07:32:01 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 07:32:01 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 07:32:01 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:32:01 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:32:01 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 07:32:01 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 07:32:01 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 07:32:01 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 07:32:01 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 07:32:01 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 07:32:01 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 07:32:01 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 07:32:01 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 07:32:01 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 07:32:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 07:32:01 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:32:01 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 07:32:01 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 07:32:01 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:32:01 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:32:01 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 07:32:01 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 07:32:01 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 07:32:01 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 07:32:01 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:32:01 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:32:01 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:32:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 07:32:01 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:32:01 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:32:01 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:32:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:32:01 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:32:01 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:32:01 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:32:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:32:01 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:32:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:32:01 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:32:01 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:32:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:32:01 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:32:01 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:32:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:32:01 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:32:01 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:32:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:32:01 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:32:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:32:01 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:32:01 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:32:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:32:01 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:32:01 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:32:01 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-03-30 07:32:02 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-03-30 07:32:02 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-03-30 07:32:02 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-03-30 07:32:02 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-03-30 07:32:02 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-03-30 07:32:02 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-03-30 07:32:02 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-03-30 07:32:02 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-03-30 07:32:02 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-03-30 07:32:02 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=0 bl=148 pwr=0
2025-03-30 07:32:02 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=1 bl=148 pwr=0
2025-03-30 07:32:02 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=2 bl=148 pwr=0
2025-03-30 07:32:02 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=3 bl=148 pwr=0
2025-03-30 07:32:02 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=4 bl=148 pwr=0
2025-03-30 07:32:02 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=5 bl=148 pwr=0
2025-03-30 07:32:02 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=6 bl=148 pwr=0
2025-03-30 07:32:02 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=7 bl=148 pwr=0
2025-03-30 07:32:02 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 07:32:02 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 07:32:02 [DEBUG] fake_trx.py:317 (BTS@172.18.26.20:5700) Recv FAKE_CI cmd
2025-03-30 07:32:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:32:02 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:32:02 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:32:02 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:32:02 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:32:02 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:32:02 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:32:02 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 07:32:02 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 07:32:02 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-03-30 07:32:02 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:32:02 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:32:02 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:32:02 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:32:03 [DEBUG] clck_gen.py:128 IND CLOCK 306
2025-03-30 07:32:03 [WARNING] clck_gen.py:108 CLCKGen: time overrun by -16890us; resetting the clock
2025-03-30 07:32:03 [DEBUG] clck_gen.py:128 IND CLOCK 408
2025-03-30 07:32:03 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:32:03 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:32:03 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:32:03 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:32:04 [DEBUG] clck_gen.py:128 IND CLOCK 510
2025-03-30 07:32:04 [DEBUG] clck_gen.py:128 IND CLOCK 612
2025-03-30 07:32:04 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:32:04 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:32:04 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:32:04 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:32:04 [DEBUG] clck_gen.py:128 IND CLOCK 714
2025-03-30 07:32:05 [DEBUG] clck_gen.py:128 IND CLOCK 816
2025-03-30 07:32:05 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:32:05 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:32:05 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:32:05 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:32:05 [DEBUG] clck_gen.py:128 IND CLOCK 918
2025-03-30 07:32:06 [DEBUG] clck_gen.py:128 IND CLOCK 1020
2025-03-30 07:32:06 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:32:06 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:32:06 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:32:06 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:32:06 [DEBUG] clck_gen.py:128 IND CLOCK 1122
2025-03-30 07:32:07 [DEBUG] clck_gen.py:128 IND CLOCK 1224
2025-03-30 07:32:07 [DEBUG] clck_gen.py:128 IND CLOCK 1326
2025-03-30 07:32:08 [DEBUG] clck_gen.py:128 IND CLOCK 1428
2025-03-30 07:32:08 [DEBUG] clck_gen.py:128 IND CLOCK 1530
2025-03-30 07:32:09 [DEBUG] clck_gen.py:128 IND CLOCK 1632
2025-03-30 07:32:09 [DEBUG] clck_gen.py:128 IND CLOCK 1734
2025-03-30 07:32:10 [DEBUG] clck_gen.py:128 IND CLOCK 1836
2025-03-30 07:32:10 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:32:10 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:32:10 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:32:10 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:32:10 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:32:10 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:32:10 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:32:10 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:32:10 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:32:10 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:32:10 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 07:32:10 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 07:32:10 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 07:32:15 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 07:32:15 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 07:32:15 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:32:15 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:32:15 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:32:15 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:32:15 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:32:15 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 07:32:15 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:32:15 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 07:32:15 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 07:32:15 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 07:32:15 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 07:32:15 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 07:32:15 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:32:15 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:32:15 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 07:32:15 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 07:32:15 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 07:32:15 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 07:32:15 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 07:32:15 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 07:32:15 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:32:15 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 07:32:15 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:32:15 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 07:32:15 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 07:32:15 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 07:32:15 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 07:32:15 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 07:32:15 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:32:15 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 07:32:15 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:32:15 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 07:32:15 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 07:32:15 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 07:32:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 07:32:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 07:32:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 07:32:15 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 07:32:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 07:32:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 07:32:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 07:32:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 07:32:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:32:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:32:15 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 07:32:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:32:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:32:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:32:15 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 07:32:15 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 07:32:15 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 07:32:15 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 07:32:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:32:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:32:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:32:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 07:32:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:32:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:32:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:32:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:32:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:32:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:32:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:32:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:32:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:32:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:32:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:32:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:32:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:32:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:32:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:32:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:32:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:32:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:32:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:32:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:32:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:32:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:32:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:32:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:32:15 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-03-30 07:32:15 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-03-30 07:32:15 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-03-30 07:32:15 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-03-30 07:32:15 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-03-30 07:32:15 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-03-30 07:32:15 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-03-30 07:32:15 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-03-30 07:32:15 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-03-30 07:32:15 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-03-30 07:32:15 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=0 bl=148 pwr=0
2025-03-30 07:32:15 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=1 bl=148 pwr=0
2025-03-30 07:32:15 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=2 bl=148 pwr=0
2025-03-30 07:32:15 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=3 bl=148 pwr=0
2025-03-30 07:32:15 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=4 bl=148 pwr=0
2025-03-30 07:32:15 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=5 bl=148 pwr=0
2025-03-30 07:32:15 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=6 bl=148 pwr=0
2025-03-30 07:32:15 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=7 bl=148 pwr=0
2025-03-30 07:32:15 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 07:32:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:32:15 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 07:32:15 [DEBUG] fake_trx.py:317 (BTS@172.18.26.20:5700) Recv FAKE_CI cmd
2025-03-30 07:32:15 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:32:15 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:32:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:32:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:32:15 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:32:15 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:32:15 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 07:32:15 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 07:32:16 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-03-30 07:32:16 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:32:16 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:32:16 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:32:16 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:32:16 [DEBUG] clck_gen.py:128 IND CLOCK 306
2025-03-30 07:32:17 [DEBUG] clck_gen.py:128 IND CLOCK 408
2025-03-30 07:32:17 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:32:17 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:32:17 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:32:17 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:32:17 [DEBUG] clck_gen.py:128 IND CLOCK 510
2025-03-30 07:32:18 [DEBUG] clck_gen.py:128 IND CLOCK 612
2025-03-30 07:32:18 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:32:18 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:32:18 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:32:18 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:32:18 [DEBUG] clck_gen.py:128 IND CLOCK 714
2025-03-30 07:32:19 [DEBUG] clck_gen.py:128 IND CLOCK 816
2025-03-30 07:32:19 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:32:19 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:32:19 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:32:19 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:32:19 [DEBUG] clck_gen.py:128 IND CLOCK 918
2025-03-30 07:32:19 [DEBUG] clck_gen.py:128 IND CLOCK 1020
2025-03-30 07:32:20 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:32:20 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:32:20 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:32:20 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:32:20 [DEBUG] clck_gen.py:128 IND CLOCK 1122
2025-03-30 07:32:20 [DEBUG] clck_gen.py:128 IND CLOCK 1224
2025-03-30 07:32:21 [DEBUG] clck_gen.py:128 IND CLOCK 1326
2025-03-30 07:32:21 [DEBUG] clck_gen.py:128 IND CLOCK 1428
2025-03-30 07:32:22 [DEBUG] clck_gen.py:128 IND CLOCK 1530
2025-03-30 07:32:22 [DEBUG] clck_gen.py:128 IND CLOCK 1632
2025-03-30 07:32:23 [DEBUG] clck_gen.py:128 IND CLOCK 1734
2025-03-30 07:32:23 [DEBUG] clck_gen.py:128 IND CLOCK 1836
2025-03-30 07:32:23 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:32:23 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:32:23 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:32:23 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:32:23 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:32:23 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:32:23 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:32:23 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:32:23 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:32:23 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:32:23 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 07:32:23 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 07:32:23 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 07:32:28 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 07:32:28 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 07:32:28 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:32:28 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:32:28 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:32:28 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:32:28 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:32:28 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 07:32:28 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:32:28 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 07:32:28 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 07:32:28 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 07:32:28 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 07:32:28 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 07:32:28 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:32:28 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:32:28 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 07:32:28 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 07:32:28 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 07:32:28 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 07:32:28 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 07:32:28 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 07:32:28 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:32:28 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:32:28 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 07:32:28 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 07:32:28 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 07:32:28 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 07:32:28 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 07:32:28 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 07:32:28 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:32:28 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:32:28 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 07:32:28 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 07:32:28 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 07:32:28 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 07:32:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 07:32:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 07:32:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 07:32:28 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 07:32:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 07:32:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 07:32:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 07:32:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:32:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 07:32:28 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 07:32:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:32:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:32:28 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 07:32:28 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 07:32:28 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 07:32:28 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 07:32:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:32:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:32:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:32:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 07:32:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:32:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:32:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:32:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:32:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:32:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:32:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:32:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:32:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:32:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:32:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:32:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:32:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:32:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:32:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:32:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:32:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:32:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:32:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:32:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:32:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:32:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:32:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:32:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:32:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:32:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:32:28 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-03-30 07:32:29 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-03-30 07:32:29 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-03-30 07:32:29 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-03-30 07:32:29 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-03-30 07:32:29 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-03-30 07:32:29 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-03-30 07:32:29 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-03-30 07:32:29 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-03-30 07:32:29 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-03-30 07:32:29 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=0 bl=148 pwr=0
2025-03-30 07:32:29 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=1 bl=148 pwr=0
2025-03-30 07:32:29 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=2 bl=148 pwr=0
2025-03-30 07:32:29 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=3 bl=148 pwr=0
2025-03-30 07:32:29 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=4 bl=148 pwr=0
2025-03-30 07:32:29 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=5 bl=148 pwr=0
2025-03-30 07:32:29 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=6 bl=148 pwr=0
2025-03-30 07:32:29 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=7 bl=148 pwr=0
2025-03-30 07:32:29 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 07:32:29 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 07:32:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:32:29 [DEBUG] fake_trx.py:317 (BTS@172.18.26.20:5700) Recv FAKE_CI cmd
2025-03-30 07:32:29 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:32:29 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:32:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:32:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:32:29 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:32:29 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:32:29 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 07:32:29 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 07:32:29 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-03-30 07:32:29 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:32:29 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:32:29 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:32:29 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:32:30 [DEBUG] clck_gen.py:128 IND CLOCK 306
2025-03-30 07:32:30 [DEBUG] clck_gen.py:128 IND CLOCK 408
2025-03-30 07:32:30 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:32:30 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:32:30 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:32:30 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:32:31 [DEBUG] clck_gen.py:128 IND CLOCK 510
2025-03-30 07:32:31 [DEBUG] clck_gen.py:128 IND CLOCK 612
2025-03-30 07:32:31 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:32:31 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:32:31 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:32:31 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:32:32 [DEBUG] clck_gen.py:128 IND CLOCK 714
2025-03-30 07:32:32 [DEBUG] clck_gen.py:128 IND CLOCK 816
2025-03-30 07:32:32 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:32:32 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:32:32 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:32:32 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:32:33 [DEBUG] clck_gen.py:128 IND CLOCK 918
2025-03-30 07:32:33 [DEBUG] clck_gen.py:128 IND CLOCK 1020
2025-03-30 07:32:33 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:32:33 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:32:33 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:32:33 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:32:34 [DEBUG] clck_gen.py:128 IND CLOCK 1122
2025-03-30 07:32:34 [DEBUG] clck_gen.py:128 IND CLOCK 1224
2025-03-30 07:32:35 [DEBUG] clck_gen.py:128 IND CLOCK 1326
2025-03-30 07:32:35 [DEBUG] clck_gen.py:128 IND CLOCK 1428
2025-03-30 07:32:35 [DEBUG] clck_gen.py:128 IND CLOCK 1530
2025-03-30 07:32:36 [DEBUG] clck_gen.py:128 IND CLOCK 1632
2025-03-30 07:32:36 [DEBUG] clck_gen.py:128 IND CLOCK 1734
2025-03-30 07:32:37 [DEBUG] clck_gen.py:128 IND CLOCK 1836
2025-03-30 07:32:37 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:32:37 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:32:37 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:32:37 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:32:37 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:32:37 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:32:37 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:32:37 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:32:37 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:32:37 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:32:37 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 07:32:37 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 07:32:37 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 07:32:37 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=1863 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:32:37 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=1863 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:32:37 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=1863 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:32:37 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=1864 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:32:37 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=1864 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:32:37 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=1864 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:32:37 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=1864 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:32:37 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=1864 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:32:37 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=1864 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:32:37 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=1864 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:32:37 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=1864 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:32:42 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 07:32:42 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 07:32:42 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:32:42 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:32:42 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:32:42 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:32:42 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:32:42 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 07:32:42 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:32:42 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 07:32:42 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 07:32:42 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 07:32:42 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 07:32:42 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 07:32:42 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:32:42 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:32:42 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 07:32:42 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 07:32:42 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 07:32:42 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 07:32:42 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 07:32:42 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 07:32:42 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:32:42 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:32:42 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 07:32:42 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 07:32:42 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 07:32:42 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 07:32:42 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 07:32:42 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 07:32:42 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:32:42 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:32:42 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 07:32:42 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 07:32:42 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 07:32:42 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 07:32:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 07:32:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 07:32:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 07:32:42 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 07:32:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 07:32:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 07:32:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 07:32:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:32:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 07:32:42 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 07:32:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:32:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:32:42 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 07:32:42 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 07:32:42 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 07:32:42 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 07:32:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:32:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:32:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:32:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 07:32:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:32:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:32:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:32:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:32:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:32:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:32:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:32:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:32:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:32:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:32:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:32:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:32:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:32:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:32:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:32:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:32:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:32:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:32:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:32:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:32:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:32:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:32:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:32:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:32:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:32:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:32:42 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-03-30 07:32:43 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-03-30 07:32:43 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-03-30 07:32:43 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-03-30 07:32:43 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-03-30 07:32:43 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-03-30 07:32:43 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-03-30 07:32:43 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-03-30 07:32:43 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-03-30 07:32:43 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-03-30 07:32:43 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=0 bl=148 pwr=0
2025-03-30 07:32:43 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=1 bl=148 pwr=0
2025-03-30 07:32:43 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=2 bl=148 pwr=0
2025-03-30 07:32:43 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=3 bl=148 pwr=0
2025-03-30 07:32:43 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=4 bl=148 pwr=0
2025-03-30 07:32:43 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=5 bl=148 pwr=0
2025-03-30 07:32:43 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=6 bl=148 pwr=0
2025-03-30 07:32:43 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=7 bl=148 pwr=0
2025-03-30 07:32:43 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 07:32:43 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 07:32:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:32:43 [DEBUG] fake_trx.py:317 (BTS@172.18.26.20:5700) Recv FAKE_CI cmd
2025-03-30 07:32:43 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:32:43 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:32:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:32:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:32:43 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:32:43 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:32:43 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 07:32:43 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 07:32:43 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-03-30 07:32:43 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:32:43 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:32:43 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:32:43 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:32:43 [DEBUG] clck_gen.py:128 IND CLOCK 306
2025-03-30 07:32:44 [DEBUG] clck_gen.py:128 IND CLOCK 408
2025-03-30 07:32:44 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:32:44 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:32:44 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:32:44 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:32:44 [DEBUG] clck_gen.py:128 IND CLOCK 510
2025-03-30 07:32:45 [DEBUG] clck_gen.py:128 IND CLOCK 612
2025-03-30 07:32:45 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:32:45 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:32:45 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:32:45 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:32:45 [DEBUG] clck_gen.py:128 IND CLOCK 714
2025-03-30 07:32:46 [DEBUG] clck_gen.py:128 IND CLOCK 816
2025-03-30 07:32:46 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:32:46 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:32:46 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:32:46 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:32:46 [DEBUG] clck_gen.py:128 IND CLOCK 918
2025-03-30 07:32:47 [DEBUG] clck_gen.py:128 IND CLOCK 1020
2025-03-30 07:32:47 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:32:47 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:32:47 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:32:47 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:32:47 [DEBUG] clck_gen.py:128 IND CLOCK 1122
2025-03-30 07:32:48 [DEBUG] clck_gen.py:128 IND CLOCK 1224
2025-03-30 07:32:48 [DEBUG] clck_gen.py:128 IND CLOCK 1326
2025-03-30 07:32:49 [DEBUG] clck_gen.py:128 IND CLOCK 1428
2025-03-30 07:32:49 [DEBUG] clck_gen.py:128 IND CLOCK 1530
2025-03-30 07:32:50 [DEBUG] clck_gen.py:128 IND CLOCK 1632
2025-03-30 07:32:50 [DEBUG] clck_gen.py:128 IND CLOCK 1734
2025-03-30 07:32:51 [DEBUG] clck_gen.py:128 IND CLOCK 1836
2025-03-30 07:32:51 [DEBUG] clck_gen.py:128 IND CLOCK 1938
2025-03-30 07:32:51 [DEBUG] clck_gen.py:128 IND CLOCK 2040
2025-03-30 07:32:52 [DEBUG] clck_gen.py:128 IND CLOCK 2142
2025-03-30 07:32:52 [DEBUG] clck_gen.py:128 IND CLOCK 2244
2025-03-30 07:32:53 [DEBUG] clck_gen.py:128 IND CLOCK 2346
2025-03-30 07:32:53 [DEBUG] clck_gen.py:128 IND CLOCK 2448
2025-03-30 07:32:54 [DEBUG] clck_gen.py:128 IND CLOCK 2550
2025-03-30 07:32:54 [DEBUG] clck_gen.py:128 IND CLOCK 2652
2025-03-30 07:32:55 [DEBUG] clck_gen.py:128 IND CLOCK 2754
2025-03-30 07:32:55 [DEBUG] clck_gen.py:128 IND CLOCK 2856
2025-03-30 07:32:56 [DEBUG] clck_gen.py:128 IND CLOCK 2958
2025-03-30 07:32:56 [DEBUG] clck_gen.py:128 IND CLOCK 3060
2025-03-30 07:32:57 [DEBUG] clck_gen.py:128 IND CLOCK 3162
2025-03-30 07:32:57 [DEBUG] clck_gen.py:128 IND CLOCK 3264
2025-03-30 07:32:58 [DEBUG] clck_gen.py:128 IND CLOCK 3366
2025-03-30 07:32:58 [DEBUG] clck_gen.py:128 IND CLOCK 3468
2025-03-30 07:32:59 [DEBUG] clck_gen.py:128 IND CLOCK 3570
2025-03-30 07:32:59 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:32:59 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:32:59 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:32:59 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:32:59 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:32:59 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:32:59 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:32:59 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:32:59 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:32:59 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:32:59 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 07:32:59 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 07:32:59 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 07:33:04 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 07:33:04 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 07:33:04 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:33:04 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:33:04 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:33:04 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:33:04 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:33:04 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 07:33:04 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:33:04 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 07:33:04 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 07:33:04 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 07:33:04 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 07:33:04 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 07:33:04 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:33:04 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:33:04 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 07:33:04 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 07:33:04 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 07:33:04 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 07:33:04 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 07:33:04 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 07:33:04 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:33:04 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:33:04 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 07:33:04 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 07:33:04 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 07:33:04 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 07:33:04 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 07:33:04 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 07:33:04 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:33:04 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:33:04 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 07:33:04 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 07:33:04 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 07:33:04 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 07:33:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 07:33:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 07:33:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 07:33:04 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 07:33:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 07:33:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 07:33:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 07:33:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:33:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 07:33:04 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 07:33:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:33:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:33:04 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 07:33:04 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 07:33:04 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 07:33:04 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 07:33:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:33:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:33:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:33:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 07:33:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:33:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:33:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:33:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:33:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:33:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:33:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:33:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:33:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:33:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:33:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:33:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:33:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:33:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:33:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:33:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:33:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:33:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:33:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:33:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:33:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:33:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:33:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:33:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:33:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:33:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:33:04 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-03-30 07:33:04 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-03-30 07:33:04 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-03-30 07:33:04 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-03-30 07:33:04 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-03-30 07:33:04 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-03-30 07:33:04 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-03-30 07:33:04 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-03-30 07:33:04 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-03-30 07:33:04 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-03-30 07:33:04 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=0 bl=148 pwr=0
2025-03-30 07:33:04 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=1 bl=148 pwr=0
2025-03-30 07:33:04 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=2 bl=148 pwr=0
2025-03-30 07:33:04 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=3 bl=148 pwr=0
2025-03-30 07:33:04 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=4 bl=148 pwr=0
2025-03-30 07:33:04 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=5 bl=148 pwr=0
2025-03-30 07:33:04 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=6 bl=148 pwr=0
2025-03-30 07:33:04 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=7 bl=148 pwr=0
2025-03-30 07:33:04 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 07:33:04 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 07:33:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:33:04 [DEBUG] fake_trx.py:317 (BTS@172.18.26.20:5700) Recv FAKE_CI cmd
2025-03-30 07:33:04 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:33:04 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:33:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:33:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:33:04 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:33:04 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:33:04 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 07:33:04 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 07:33:04 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=127): ver=1 fn=126 tn=0 bl=148 pwr=0
2025-03-30 07:33:04 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=127): ver=1 fn=126 tn=1 bl=148 pwr=0
2025-03-30 07:33:04 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=127): ver=1 fn=126 tn=2 bl=148 pwr=0
2025-03-30 07:33:04 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=127): ver=1 fn=126 tn=3 bl=148 pwr=0
2025-03-30 07:33:04 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=127): ver=1 fn=126 tn=4 bl=148 pwr=0
2025-03-30 07:33:04 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=127): ver=1 fn=126 tn=5 bl=148 pwr=0
2025-03-30 07:33:04 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=127): ver=1 fn=126 tn=6 bl=148 pwr=0
2025-03-30 07:33:04 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=127): ver=1 fn=126 tn=7 bl=148 pwr=0
2025-03-30 07:33:05 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-03-30 07:33:05 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:33:05 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:33:05 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:33:05 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:33:05 [DEBUG] clck_gen.py:128 IND CLOCK 306
2025-03-30 07:33:06 [DEBUG] clck_gen.py:128 IND CLOCK 408
2025-03-30 07:33:06 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:33:06 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:33:06 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:33:06 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:33:06 [DEBUG] clck_gen.py:128 IND CLOCK 510
2025-03-30 07:33:07 [DEBUG] clck_gen.py:128 IND CLOCK 612
2025-03-30 07:33:07 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:33:07 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:33:07 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:33:07 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:33:07 [DEBUG] clck_gen.py:128 IND CLOCK 714
2025-03-30 07:33:07 [DEBUG] clck_gen.py:128 IND CLOCK 816
2025-03-30 07:33:08 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:33:08 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:33:08 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:33:08 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:33:08 [DEBUG] clck_gen.py:128 IND CLOCK 918
2025-03-30 07:33:08 [DEBUG] clck_gen.py:128 IND CLOCK 1020
2025-03-30 07:33:09 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:33:09 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:33:09 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:33:09 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:33:09 [DEBUG] clck_gen.py:128 IND CLOCK 1122
2025-03-30 07:33:09 [DEBUG] clck_gen.py:128 IND CLOCK 1224
2025-03-30 07:33:10 [DEBUG] clck_gen.py:128 IND CLOCK 1326
2025-03-30 07:33:10 [DEBUG] clck_gen.py:128 IND CLOCK 1428
2025-03-30 07:33:11 [DEBUG] clck_gen.py:128 IND CLOCK 1530
2025-03-30 07:33:11 [DEBUG] clck_gen.py:128 IND CLOCK 1632
2025-03-30 07:33:12 [DEBUG] clck_gen.py:128 IND CLOCK 1734
2025-03-30 07:33:12 [DEBUG] clck_gen.py:128 IND CLOCK 1836
2025-03-30 07:33:12 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:33:12 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:33:12 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:33:12 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:33:12 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:33:12 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:33:12 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:33:12 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:33:12 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:33:12 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:33:12 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 07:33:12 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 07:33:12 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 07:33:17 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 07:33:17 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 07:33:17 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:33:17 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:33:17 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:33:17 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:33:17 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:33:17 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 07:33:17 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:33:17 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 07:33:17 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 07:33:17 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 07:33:17 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 07:33:17 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 07:33:17 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:33:17 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:33:17 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 07:33:17 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 07:33:17 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 07:33:17 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 07:33:17 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 07:33:17 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 07:33:17 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:33:17 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:33:17 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 07:33:17 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 07:33:17 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 07:33:17 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 07:33:17 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 07:33:17 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 07:33:17 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:33:17 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:33:17 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 07:33:17 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 07:33:17 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 07:33:17 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 07:33:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 07:33:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 07:33:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 07:33:17 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 07:33:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 07:33:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 07:33:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 07:33:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 07:33:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:33:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:33:17 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 07:33:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:33:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:33:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:33:17 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 07:33:17 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 07:33:17 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 07:33:17 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 07:33:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:33:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:33:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:33:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 07:33:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:33:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:33:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:33:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:33:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:33:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:33:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:33:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:33:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:33:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:33:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:33:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:33:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:33:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:33:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:33:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:33:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:33:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:33:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:33:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:33:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:33:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:33:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:33:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:33:17 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-03-30 07:33:18 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-03-30 07:33:18 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-03-30 07:33:18 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-03-30 07:33:18 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-03-30 07:33:18 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-03-30 07:33:18 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-03-30 07:33:18 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-03-30 07:33:18 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-03-30 07:33:18 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-03-30 07:33:18 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=0 bl=148 pwr=0
2025-03-30 07:33:18 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=1 bl=148 pwr=0
2025-03-30 07:33:18 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=2 bl=148 pwr=0
2025-03-30 07:33:18 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=3 bl=148 pwr=0
2025-03-30 07:33:18 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=4 bl=148 pwr=0
2025-03-30 07:33:18 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=5 bl=148 pwr=0
2025-03-30 07:33:18 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=6 bl=148 pwr=0
2025-03-30 07:33:18 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=7 bl=148 pwr=0
2025-03-30 07:33:18 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 07:33:18 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 07:33:18 [DEBUG] fake_trx.py:317 (BTS@172.18.26.20:5700) Recv FAKE_CI cmd
2025-03-30 07:33:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:33:18 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:33:18 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:33:18 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:33:18 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:33:18 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:33:18 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:33:18 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 07:33:18 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 07:33:18 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-03-30 07:33:18 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:33:18 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:33:18 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:33:18 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:33:19 [DEBUG] clck_gen.py:128 IND CLOCK 306
2025-03-30 07:33:19 [DEBUG] clck_gen.py:128 IND CLOCK 408
2025-03-30 07:33:19 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:33:19 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:33:19 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:33:19 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:33:20 [DEBUG] clck_gen.py:128 IND CLOCK 510
2025-03-30 07:33:20 [DEBUG] clck_gen.py:128 IND CLOCK 612
2025-03-30 07:33:20 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:33:20 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:33:20 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:33:20 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:33:21 [DEBUG] clck_gen.py:128 IND CLOCK 714
2025-03-30 07:33:21 [DEBUG] clck_gen.py:128 IND CLOCK 816
2025-03-30 07:33:21 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:33:21 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:33:21 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:33:21 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:33:22 [DEBUG] clck_gen.py:128 IND CLOCK 918
2025-03-30 07:33:22 [DEBUG] clck_gen.py:128 IND CLOCK 1020
2025-03-30 07:33:22 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:33:22 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:33:22 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:33:22 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:33:23 [DEBUG] clck_gen.py:128 IND CLOCK 1122
2025-03-30 07:33:23 [DEBUG] clck_gen.py:128 IND CLOCK 1224
2025-03-30 07:33:23 [DEBUG] clck_gen.py:128 IND CLOCK 1326
2025-03-30 07:33:24 [DEBUG] clck_gen.py:128 IND CLOCK 1428
2025-03-30 07:33:24 [DEBUG] clck_gen.py:128 IND CLOCK 1530
2025-03-30 07:33:25 [DEBUG] clck_gen.py:128 IND CLOCK 1632
2025-03-30 07:33:25 [DEBUG] clck_gen.py:128 IND CLOCK 1734
2025-03-30 07:33:26 [DEBUG] clck_gen.py:128 IND CLOCK 1836
2025-03-30 07:33:26 [DEBUG] clck_gen.py:128 IND CLOCK 1938
2025-03-30 07:33:27 [DEBUG] clck_gen.py:128 IND CLOCK 2040
2025-03-30 07:33:27 [DEBUG] clck_gen.py:128 IND CLOCK 2142
2025-03-30 07:33:28 [DEBUG] clck_gen.py:128 IND CLOCK 2244
2025-03-30 07:33:28 [DEBUG] clck_gen.py:128 IND CLOCK 2346
2025-03-30 07:33:29 [DEBUG] clck_gen.py:128 IND CLOCK 2448
2025-03-30 07:33:29 [DEBUG] clck_gen.py:128 IND CLOCK 2550
2025-03-30 07:33:30 [DEBUG] clck_gen.py:128 IND CLOCK 2652
2025-03-30 07:33:30 [DEBUG] clck_gen.py:128 IND CLOCK 2754
2025-03-30 07:33:31 [DEBUG] clck_gen.py:128 IND CLOCK 2856
2025-03-30 07:33:31 [DEBUG] clck_gen.py:128 IND CLOCK 2958
2025-03-30 07:33:31 [DEBUG] clck_gen.py:128 IND CLOCK 3060
2025-03-30 07:33:32 [DEBUG] clck_gen.py:128 IND CLOCK 3162
2025-03-30 07:33:32 [DEBUG] clck_gen.py:128 IND CLOCK 3264
2025-03-30 07:33:33 [DEBUG] clck_gen.py:128 IND CLOCK 3366
2025-03-30 07:33:33 [DEBUG] clck_gen.py:128 IND CLOCK 3468
2025-03-30 07:33:34 [DEBUG] clck_gen.py:128 IND CLOCK 3570
2025-03-30 07:33:34 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:33:34 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:33:34 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:33:34 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:33:34 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:33:34 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:33:34 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:33:34 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:33:34 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:33:34 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:33:34 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 07:33:34 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 07:33:34 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 07:33:39 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 07:33:39 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 07:33:39 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:33:39 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:33:39 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:33:39 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:33:39 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:33:39 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 07:33:39 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:33:39 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 07:33:39 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 07:33:39 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 07:33:39 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 07:33:39 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 07:33:39 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:33:39 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:33:39 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 07:33:39 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 07:33:39 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 07:33:39 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 07:33:39 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 07:33:39 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 07:33:39 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:33:39 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:33:39 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 07:33:39 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 07:33:39 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 07:33:39 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 07:33:39 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 07:33:39 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 07:33:39 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:33:39 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:33:39 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 07:33:39 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 07:33:39 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 07:33:39 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 07:33:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 07:33:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 07:33:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 07:33:39 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 07:33:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 07:33:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 07:33:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 07:33:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:33:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 07:33:39 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 07:33:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:33:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:33:39 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 07:33:39 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 07:33:39 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 07:33:39 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 07:33:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:33:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:33:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:33:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 07:33:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:33:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:33:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:33:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:33:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:33:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:33:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:33:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:33:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:33:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:33:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:33:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:33:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:33:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:33:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:33:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:33:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:33:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:33:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:33:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:33:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:33:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:33:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:33:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:33:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:33:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:33:39 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-03-30 07:33:39 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-03-30 07:33:39 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-03-30 07:33:39 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-03-30 07:33:39 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-03-30 07:33:39 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-03-30 07:33:39 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-03-30 07:33:39 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-03-30 07:33:39 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-03-30 07:33:39 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-03-30 07:33:39 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=0 bl=148 pwr=0
2025-03-30 07:33:39 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=1 bl=148 pwr=0
2025-03-30 07:33:39 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=2 bl=148 pwr=0
2025-03-30 07:33:39 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=3 bl=148 pwr=0
2025-03-30 07:33:39 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=4 bl=148 pwr=0
2025-03-30 07:33:39 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=5 bl=148 pwr=0
2025-03-30 07:33:39 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=6 bl=148 pwr=0
2025-03-30 07:33:39 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=7 bl=148 pwr=0
2025-03-30 07:33:39 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 07:33:39 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 07:33:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:33:40 [DEBUG] fake_trx.py:317 (BTS@172.18.26.20:5700) Recv FAKE_CI cmd
2025-03-30 07:33:40 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:33:40 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:33:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:33:40 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:33:40 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:33:40 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:33:40 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:33:40 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:33:40 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:33:40 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:33:40 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:33:40 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 07:33:40 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 07:33:40 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 07:33:45 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 07:33:45 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 07:33:45 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:33:45 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:33:45 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:33:45 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:33:45 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:33:45 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 07:33:45 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:33:45 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 07:33:45 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 07:33:45 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 07:33:45 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 07:33:45 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 07:33:45 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:33:45 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:33:45 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 07:33:45 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 07:33:45 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 07:33:45 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 07:33:45 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 07:33:45 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 07:33:45 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:33:45 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 07:33:45 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:33:45 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 07:33:45 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 07:33:45 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 07:33:45 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 07:33:45 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 07:33:45 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:33:45 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 07:33:45 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:33:45 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 07:33:45 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 07:33:45 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 07:33:45 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 07:33:45 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 07:33:45 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 07:33:45 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 07:33:45 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 07:33:45 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 07:33:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 07:33:45 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:33:45 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 07:33:45 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 07:33:45 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:33:45 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:33:45 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 07:33:45 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 07:33:45 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 07:33:45 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 07:33:45 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:33:45 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:33:45 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:33:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 07:33:45 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:33:45 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:33:45 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:33:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:33:45 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:33:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:33:45 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:33:45 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:33:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:33:45 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:33:45 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:33:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:33:45 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:33:45 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:33:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:33:45 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:33:45 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:33:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:33:45 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:33:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:33:45 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:33:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:33:45 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:33:45 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:33:45 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:33:45 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:33:45 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-03-30 07:33:45 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-03-30 07:33:45 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-03-30 07:33:45 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-03-30 07:33:45 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-03-30 07:33:45 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-03-30 07:33:45 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-03-30 07:33:45 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-03-30 07:33:45 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-03-30 07:33:45 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-03-30 07:33:45 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=0 bl=148 pwr=0
2025-03-30 07:33:45 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=1 bl=148 pwr=0
2025-03-30 07:33:45 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=2 bl=148 pwr=0
2025-03-30 07:33:45 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=3 bl=148 pwr=0
2025-03-30 07:33:45 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=4 bl=148 pwr=0
2025-03-30 07:33:45 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=5 bl=148 pwr=0
2025-03-30 07:33:45 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=6 bl=148 pwr=0
2025-03-30 07:33:45 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=7 bl=148 pwr=0
2025-03-30 07:33:45 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 07:33:45 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 07:33:45 [DEBUG] fake_trx.py:317 (BTS@172.18.26.20:5700) Recv FAKE_CI cmd
2025-03-30 07:33:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:33:45 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:33:45 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:33:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:33:45 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:33:45 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:33:45 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:33:45 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:33:45 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:33:45 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 07:33:45 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 07:33:45 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 07:33:45 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:33:45 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:33:45 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:33:50 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 07:33:50 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 07:33:50 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:33:50 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:33:50 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:33:50 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:33:50 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:33:50 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 07:33:50 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:33:50 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 07:33:50 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 07:33:50 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 07:33:50 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 07:33:50 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 07:33:50 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:33:50 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:33:50 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 07:33:50 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 07:33:50 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 07:33:50 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 07:33:50 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 07:33:50 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 07:33:50 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:33:50 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:33:50 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 07:33:50 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 07:33:50 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 07:33:50 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 07:33:50 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 07:33:50 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 07:33:50 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:33:50 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:33:50 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 07:33:50 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 07:33:50 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 07:33:50 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 07:33:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 07:33:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 07:33:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 07:33:50 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 07:33:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 07:33:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 07:33:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 07:33:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 07:33:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:33:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:33:50 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 07:33:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:33:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:33:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:33:50 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 07:33:50 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 07:33:50 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 07:33:50 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 07:33:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:33:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:33:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:33:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 07:33:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:33:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:33:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:33:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:33:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:33:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:33:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:33:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:33:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:33:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:33:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:33:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:33:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:33:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:33:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:33:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:33:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:33:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:33:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:33:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:33:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:33:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:33:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:33:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:33:50 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-03-30 07:33:51 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-03-30 07:33:51 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-03-30 07:33:51 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-03-30 07:33:51 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-03-30 07:33:51 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-03-30 07:33:51 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-03-30 07:33:51 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-03-30 07:33:51 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-03-30 07:33:51 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-03-30 07:33:51 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=0 bl=148 pwr=0
2025-03-30 07:33:51 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=1 bl=148 pwr=0
2025-03-30 07:33:51 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=2 bl=148 pwr=0
2025-03-30 07:33:51 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=3 bl=148 pwr=0
2025-03-30 07:33:51 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=4 bl=148 pwr=0
2025-03-30 07:33:51 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=5 bl=148 pwr=0
2025-03-30 07:33:51 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=6 bl=148 pwr=0
2025-03-30 07:33:51 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=7 bl=148 pwr=0
2025-03-30 07:33:51 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 07:33:51 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 07:33:51 [DEBUG] fake_trx.py:317 (BTS@172.18.26.20:5700) Recv FAKE_CI cmd
2025-03-30 07:33:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:33:51 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:33:51 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:33:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:33:51 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:33:51 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:33:51 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:33:51 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:33:51 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:33:51 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:33:51 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:33:51 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:33:51 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 07:33:51 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 07:33:51 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 07:33:51 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=130 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:33:51 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=130 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:33:51 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=130 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:33:51 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=130 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:33:56 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 07:33:56 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 07:33:56 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:33:56 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:33:56 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:33:56 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:33:56 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:33:56 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 07:33:56 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:33:56 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 07:33:56 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 07:33:56 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 07:33:56 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 07:33:56 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 07:33:56 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:33:56 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:33:56 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 07:33:56 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 07:33:56 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 07:33:56 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 07:33:56 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 07:33:56 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 07:33:56 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:33:56 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:33:56 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 07:33:56 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 07:33:56 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 07:33:56 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 07:33:56 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 07:33:56 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 07:33:56 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:33:56 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:33:56 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 07:33:56 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 07:33:56 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 07:33:56 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 07:33:56 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 07:33:56 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 07:33:56 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 07:33:56 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 07:33:56 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 07:33:56 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 07:33:56 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 07:33:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 07:33:56 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:33:56 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:33:56 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 07:33:56 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:33:56 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 07:33:56 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 07:33:56 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 07:33:56 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 07:33:56 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:33:56 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:33:56 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:33:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 07:33:56 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:33:56 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:33:56 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:33:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:33:56 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:33:56 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:33:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:33:56 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:33:56 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:33:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:33:56 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:33:56 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:33:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:33:56 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:33:56 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:33:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:33:56 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:33:56 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:33:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:33:56 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:33:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:33:56 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:33:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:33:56 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:33:56 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:33:56 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:33:56 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-03-30 07:33:56 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-03-30 07:33:56 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-03-30 07:33:56 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-03-30 07:33:56 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-03-30 07:33:56 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-03-30 07:33:56 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-03-30 07:33:56 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-03-30 07:33:56 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-03-30 07:33:56 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-03-30 07:33:56 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=0 bl=148 pwr=0
2025-03-30 07:33:56 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=1 bl=148 pwr=0
2025-03-30 07:33:56 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=2 bl=148 pwr=0
2025-03-30 07:33:56 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=3 bl=148 pwr=0
2025-03-30 07:33:56 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=4 bl=148 pwr=0
2025-03-30 07:33:56 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=5 bl=148 pwr=0
2025-03-30 07:33:56 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=6 bl=148 pwr=0
2025-03-30 07:33:56 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=7 bl=148 pwr=0
2025-03-30 07:33:56 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 07:33:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:33:56 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 07:33:56 [DEBUG] fake_trx.py:317 (BTS@172.18.26.20:5700) Recv FAKE_CI cmd
2025-03-30 07:33:56 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:33:56 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:33:56 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:33:56 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:33:56 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:33:56 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:33:56 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:33:56 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:33:56 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:33:56 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:33:56 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:33:56 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 07:33:56 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 07:33:56 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 07:33:56 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=134 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:33:56 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=134 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:33:56 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=134 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:33:56 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=134 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:34:01 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 07:34:01 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 07:34:01 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:34:01 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:34:01 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:34:01 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:34:01 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:34:01 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 07:34:01 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:34:01 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 07:34:01 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 07:34:01 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 07:34:01 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 07:34:01 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 07:34:01 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:34:01 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:34:01 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 07:34:01 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 07:34:01 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 07:34:01 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 07:34:01 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 07:34:01 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 07:34:01 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:34:01 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:34:01 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 07:34:01 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 07:34:01 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 07:34:01 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 07:34:01 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 07:34:01 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 07:34:01 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:34:01 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:34:01 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 07:34:01 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 07:34:01 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 07:34:01 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 07:34:01 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 07:34:01 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 07:34:01 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 07:34:01 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 07:34:01 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 07:34:01 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 07:34:01 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 07:34:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 07:34:01 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:34:01 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:34:01 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 07:34:01 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:34:01 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:34:01 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:34:01 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 07:34:01 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 07:34:01 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 07:34:01 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 07:34:01 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:34:01 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:34:01 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:34:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 07:34:01 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:34:01 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:34:01 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:34:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:34:01 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:34:01 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:34:01 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:34:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:34:01 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:34:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:34:01 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:34:01 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:34:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:34:01 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:34:01 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:34:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:34:01 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:34:01 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:34:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:34:01 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:34:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:34:01 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:34:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:34:01 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:34:01 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-03-30 07:34:02 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-03-30 07:34:02 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-03-30 07:34:02 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-03-30 07:34:02 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-03-30 07:34:02 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-03-30 07:34:02 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-03-30 07:34:02 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-03-30 07:34:02 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-03-30 07:34:02 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-03-30 07:34:02 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=0 bl=148 pwr=0
2025-03-30 07:34:02 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=1 bl=148 pwr=0
2025-03-30 07:34:02 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=2 bl=148 pwr=0
2025-03-30 07:34:02 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=3 bl=148 pwr=0
2025-03-30 07:34:02 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=4 bl=148 pwr=0
2025-03-30 07:34:02 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=5 bl=148 pwr=0
2025-03-30 07:34:02 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=6 bl=148 pwr=0
2025-03-30 07:34:02 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=7 bl=148 pwr=0
2025-03-30 07:34:02 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 07:34:02 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 07:34:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:34:02 [DEBUG] fake_trx.py:317 (BTS@172.18.26.20:5700) Recv FAKE_CI cmd
2025-03-30 07:34:02 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:34:02 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:34:02 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:34:02 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:34:02 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:34:02 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:34:02 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:34:02 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:34:02 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:34:02 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:34:02 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:34:02 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:34:02 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:34:02 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 07:34:02 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 07:34:02 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 07:34:02 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:34:02 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=125 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:34:02 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=125 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:34:02 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=125 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:34:02 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=125 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:34:02 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=125 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:34:02 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=125 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:34:02 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=125 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:34:07 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 07:34:07 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 07:34:07 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:34:07 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:34:07 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:34:07 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:34:07 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:34:07 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 07:34:07 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:34:07 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 07:34:07 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 07:34:07 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 07:34:07 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 07:34:07 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 07:34:07 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:34:07 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 07:34:07 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:34:07 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 07:34:07 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 07:34:07 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 07:34:07 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 07:34:07 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 07:34:07 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:34:07 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 07:34:07 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:34:07 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 07:34:07 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 07:34:07 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 07:34:07 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 07:34:07 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 07:34:07 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:34:07 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 07:34:07 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:34:07 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 07:34:07 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 07:34:07 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 07:34:07 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 07:34:07 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 07:34:07 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 07:34:07 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 07:34:07 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 07:34:07 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 07:34:07 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 07:34:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 07:34:07 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:34:07 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:34:07 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 07:34:07 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:34:07 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:34:07 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:34:07 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 07:34:07 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 07:34:07 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 07:34:07 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 07:34:07 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:34:07 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:34:07 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:34:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 07:34:07 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:34:07 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:34:07 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:34:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:34:07 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:34:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:34:07 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:34:07 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:34:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:34:07 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:34:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:34:07 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:34:07 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:34:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:34:07 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:34:07 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:34:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:34:07 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:34:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:34:07 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:34:07 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:34:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:34:07 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:34:07 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:34:07 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-03-30 07:34:08 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-03-30 07:34:08 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-03-30 07:34:08 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-03-30 07:34:08 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-03-30 07:34:08 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-03-30 07:34:08 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-03-30 07:34:08 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-03-30 07:34:08 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-03-30 07:34:08 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-03-30 07:34:08 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=0 bl=148 pwr=0
2025-03-30 07:34:08 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=1 bl=148 pwr=0
2025-03-30 07:34:08 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=2 bl=148 pwr=0
2025-03-30 07:34:08 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=3 bl=148 pwr=0
2025-03-30 07:34:08 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=4 bl=148 pwr=0
2025-03-30 07:34:08 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=5 bl=148 pwr=0
2025-03-30 07:34:08 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=6 bl=148 pwr=0
2025-03-30 07:34:08 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=7 bl=148 pwr=0
2025-03-30 07:34:08 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 07:34:08 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 07:34:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:34:08 [DEBUG] fake_trx.py:317 (BTS@172.18.26.20:5700) Recv FAKE_CI cmd
2025-03-30 07:34:08 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:34:08 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:34:08 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:34:08 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:34:08 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:34:08 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:34:08 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:34:08 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:34:08 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:34:08 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:34:08 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:34:08 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:34:08 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:34:08 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 07:34:08 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 07:34:08 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 07:34:08 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:34:13 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 07:34:13 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 07:34:13 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:34:13 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:34:13 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:34:13 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:34:13 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:34:13 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 07:34:13 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:34:13 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 07:34:13 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 07:34:13 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 07:34:13 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 07:34:13 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 07:34:13 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:34:13 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:34:13 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 07:34:13 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 07:34:13 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 07:34:13 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 07:34:13 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 07:34:13 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 07:34:13 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:34:13 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:34:13 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 07:34:13 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 07:34:13 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 07:34:13 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 07:34:13 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 07:34:13 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 07:34:13 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:34:13 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:34:13 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 07:34:13 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 07:34:13 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 07:34:13 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 07:34:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 07:34:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 07:34:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 07:34:13 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 07:34:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 07:34:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 07:34:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 07:34:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:34:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 07:34:13 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 07:34:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:34:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:34:13 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 07:34:13 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 07:34:13 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 07:34:13 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 07:34:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:34:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:34:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:34:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 07:34:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:34:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:34:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:34:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:34:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:34:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:34:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:34:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:34:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:34:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:34:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:34:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:34:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:34:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:34:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:34:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:34:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:34:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:34:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:34:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:34:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:34:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:34:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:34:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:34:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:34:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:34:13 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-03-30 07:34:13 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-03-30 07:34:13 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-03-30 07:34:13 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-03-30 07:34:13 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-03-30 07:34:13 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-03-30 07:34:13 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-03-30 07:34:13 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-03-30 07:34:13 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-03-30 07:34:13 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-03-30 07:34:13 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=0 bl=148 pwr=0
2025-03-30 07:34:13 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=1 bl=148 pwr=0
2025-03-30 07:34:13 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=2 bl=148 pwr=0
2025-03-30 07:34:13 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=3 bl=148 pwr=0
2025-03-30 07:34:13 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=4 bl=148 pwr=0
2025-03-30 07:34:13 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=5 bl=148 pwr=0
2025-03-30 07:34:13 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=6 bl=148 pwr=0
2025-03-30 07:34:13 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=7 bl=148 pwr=0
2025-03-30 07:34:13 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 07:34:13 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 07:34:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:34:13 [DEBUG] fake_trx.py:317 (BTS@172.18.26.20:5700) Recv FAKE_CI cmd
2025-03-30 07:34:13 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:34:13 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:34:13 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:34:13 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:34:13 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:34:13 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:34:13 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 07:34:13 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 07:34:14 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-03-30 07:34:14 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:34:14 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:34:14 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:34:14 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:34:14 [DEBUG] clck_gen.py:128 IND CLOCK 306
2025-03-30 07:34:15 [DEBUG] clck_gen.py:128 IND CLOCK 408
2025-03-30 07:34:15 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:34:15 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:34:15 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:34:15 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:34:15 [DEBUG] clck_gen.py:128 IND CLOCK 510
2025-03-30 07:34:16 [DEBUG] clck_gen.py:128 IND CLOCK 612
2025-03-30 07:34:16 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:34:16 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:34:16 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:34:16 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:34:16 [DEBUG] clck_gen.py:128 IND CLOCK 714
2025-03-30 07:34:17 [DEBUG] clck_gen.py:128 IND CLOCK 816
2025-03-30 07:34:17 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:34:17 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:34:17 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:34:17 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:34:17 [DEBUG] clck_gen.py:128 IND CLOCK 918
2025-03-30 07:34:17 [DEBUG] clck_gen.py:128 IND CLOCK 1020
2025-03-30 07:34:18 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:34:18 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:34:18 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:34:18 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:34:18 [DEBUG] clck_gen.py:128 IND CLOCK 1122
2025-03-30 07:34:18 [DEBUG] clck_gen.py:128 IND CLOCK 1224
2025-03-30 07:34:19 [DEBUG] clck_gen.py:128 IND CLOCK 1326
2025-03-30 07:34:19 [DEBUG] clck_gen.py:128 IND CLOCK 1428
2025-03-30 07:34:20 [DEBUG] clck_gen.py:128 IND CLOCK 1530
2025-03-30 07:34:20 [DEBUG] clck_gen.py:128 IND CLOCK 1632
2025-03-30 07:34:21 [DEBUG] clck_gen.py:128 IND CLOCK 1734
2025-03-30 07:34:21 [DEBUG] clck_gen.py:128 IND CLOCK 1836
2025-03-30 07:34:22 [DEBUG] clck_gen.py:128 IND CLOCK 1938
2025-03-30 07:34:22 [DEBUG] clck_gen.py:128 IND CLOCK 2040
2025-03-30 07:34:23 [DEBUG] clck_gen.py:128 IND CLOCK 2142
2025-03-30 07:34:23 [DEBUG] clck_gen.py:128 IND CLOCK 2244
2025-03-30 07:34:24 [DEBUG] clck_gen.py:128 IND CLOCK 2346
2025-03-30 07:34:24 [DEBUG] clck_gen.py:128 IND CLOCK 2448
2025-03-30 07:34:25 [DEBUG] clck_gen.py:128 IND CLOCK 2550
2025-03-30 07:34:25 [DEBUG] clck_gen.py:128 IND CLOCK 2652
2025-03-30 07:34:25 [DEBUG] clck_gen.py:128 IND CLOCK 2754
2025-03-30 07:34:26 [DEBUG] clck_gen.py:128 IND CLOCK 2856
2025-03-30 07:34:26 [DEBUG] clck_gen.py:128 IND CLOCK 2958
2025-03-30 07:34:27 [DEBUG] clck_gen.py:128 IND CLOCK 3060
2025-03-30 07:34:27 [DEBUG] clck_gen.py:128 IND CLOCK 3162
2025-03-30 07:34:28 [DEBUG] clck_gen.py:128 IND CLOCK 3264
2025-03-30 07:34:28 [DEBUG] clck_gen.py:128 IND CLOCK 3366
2025-03-30 07:34:29 [DEBUG] clck_gen.py:128 IND CLOCK 3468
2025-03-30 07:34:29 [DEBUG] clck_gen.py:128 IND CLOCK 3570
2025-03-30 07:34:30 [DEBUG] clck_gen.py:128 IND CLOCK 3672
2025-03-30 07:34:30 [DEBUG] clck_gen.py:128 IND CLOCK 3774
2025-03-30 07:34:31 [DEBUG] clck_gen.py:128 IND CLOCK 3876
2025-03-30 07:34:31 [DEBUG] clck_gen.py:128 IND CLOCK 3978
2025-03-30 07:34:32 [DEBUG] clck_gen.py:128 IND CLOCK 4080
2025-03-30 07:34:32 [DEBUG] clck_gen.py:128 IND CLOCK 4182
2025-03-30 07:34:33 [DEBUG] clck_gen.py:128 IND CLOCK 4284
2025-03-30 07:34:33 [DEBUG] clck_gen.py:128 IND CLOCK 4386
2025-03-30 07:34:33 [DEBUG] clck_gen.py:128 IND CLOCK 4488
2025-03-30 07:34:34 [DEBUG] clck_gen.py:128 IND CLOCK 4590
2025-03-30 07:34:34 [DEBUG] clck_gen.py:128 IND CLOCK 4692
2025-03-30 07:34:35 [DEBUG] clck_gen.py:128 IND CLOCK 4794
2025-03-30 07:34:35 [DEBUG] clck_gen.py:128 IND CLOCK 4896
2025-03-30 07:34:36 [DEBUG] clck_gen.py:128 IND CLOCK 4998
2025-03-30 07:34:36 [DEBUG] clck_gen.py:128 IND CLOCK 5100
2025-03-30 07:34:37 [DEBUG] clck_gen.py:128 IND CLOCK 5202
2025-03-30 07:34:37 [DEBUG] clck_gen.py:128 IND CLOCK 5304
2025-03-30 07:34:38 [DEBUG] clck_gen.py:128 IND CLOCK 5406
2025-03-30 07:34:38 [DEBUG] clck_gen.py:128 IND CLOCK 5508
2025-03-30 07:34:39 [DEBUG] clck_gen.py:128 IND CLOCK 5610
2025-03-30 07:34:39 [DEBUG] clck_gen.py:128 IND CLOCK 5712
2025-03-30 07:34:40 [DEBUG] clck_gen.py:128 IND CLOCK 5814
2025-03-30 07:34:40 [DEBUG] clck_gen.py:128 IND CLOCK 5916
2025-03-30 07:34:41 [DEBUG] clck_gen.py:128 IND CLOCK 6018
2025-03-30 07:34:41 [DEBUG] clck_gen.py:128 IND CLOCK 6120
2025-03-30 07:34:41 [DEBUG] clck_gen.py:128 IND CLOCK 6222
2025-03-30 07:34:42 [DEBUG] clck_gen.py:128 IND CLOCK 6324
2025-03-30 07:34:42 [DEBUG] clck_gen.py:128 IND CLOCK 6426
2025-03-30 07:34:43 [DEBUG] clck_gen.py:128 IND CLOCK 6528
2025-03-30 07:34:43 [DEBUG] clck_gen.py:128 IND CLOCK 6630
2025-03-30 07:34:44 [DEBUG] clck_gen.py:128 IND CLOCK 6732
2025-03-30 07:34:44 [DEBUG] clck_gen.py:128 IND CLOCK 6834
2025-03-30 07:34:45 [DEBUG] clck_gen.py:128 IND CLOCK 6936
2025-03-30 07:34:45 [DEBUG] clck_gen.py:128 IND CLOCK 7038
2025-03-30 07:34:46 [DEBUG] clck_gen.py:128 IND CLOCK 7140
2025-03-30 07:34:46 [DEBUG] clck_gen.py:128 IND CLOCK 7242
2025-03-30 07:34:47 [DEBUG] clck_gen.py:128 IND CLOCK 7344
2025-03-30 07:34:47 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:34:47 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:34:47 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:34:47 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:34:47 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:34:47 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:34:47 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:34:47 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:34:47 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:34:47 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:34:47 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 07:34:47 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 07:34:47 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 07:34:52 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 07:34:52 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 07:34:52 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:34:52 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:34:52 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:34:52 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:34:52 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:34:52 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 07:34:52 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:34:52 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 07:34:52 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 07:34:52 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 07:34:52 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 07:34:52 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 07:34:52 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:34:52 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:34:52 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 07:34:52 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 07:34:52 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 07:34:52 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 07:34:52 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 07:34:52 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 07:34:52 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:34:52 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:34:52 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 07:34:52 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 07:34:52 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 07:34:52 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 07:34:52 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 07:34:52 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 07:34:52 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:34:52 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:34:52 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 07:34:52 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 07:34:52 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 07:34:52 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 07:34:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 07:34:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 07:34:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 07:34:52 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 07:34:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 07:34:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 07:34:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 07:34:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:34:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 07:34:52 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 07:34:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:34:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:34:52 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 07:34:52 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 07:34:52 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 07:34:52 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 07:34:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:34:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:34:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:34:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 07:34:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:34:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:34:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:34:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:34:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:34:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:34:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:34:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:34:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:34:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:34:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:34:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:34:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:34:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:34:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:34:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:34:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:34:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:34:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:34:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:34:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:34:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:34:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:34:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:34:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:34:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:34:52 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-03-30 07:34:52 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-03-30 07:34:52 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-03-30 07:34:52 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-03-30 07:34:52 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-03-30 07:34:52 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-03-30 07:34:52 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-03-30 07:34:52 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-03-30 07:34:52 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-03-30 07:34:52 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-03-30 07:34:52 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=0 bl=148 pwr=0
2025-03-30 07:34:52 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=1 bl=148 pwr=0
2025-03-30 07:34:52 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=2 bl=148 pwr=0
2025-03-30 07:34:52 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=3 bl=148 pwr=0
2025-03-30 07:34:52 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=4 bl=148 pwr=0
2025-03-30 07:34:52 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=5 bl=148 pwr=0
2025-03-30 07:34:52 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=6 bl=148 pwr=0
2025-03-30 07:34:52 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=7 bl=148 pwr=0
2025-03-30 07:34:52 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 07:34:52 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 07:34:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:34:52 [DEBUG] fake_trx.py:317 (BTS@172.18.26.20:5700) Recv FAKE_CI cmd
2025-03-30 07:34:53 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-03-30 07:34:53 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:34:53 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:34:53 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:34:53 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:34:53 [DEBUG] clck_gen.py:128 IND CLOCK 306
2025-03-30 07:34:54 [DEBUG] clck_gen.py:128 IND CLOCK 408
2025-03-30 07:34:54 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:34:54 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:34:54 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:34:54 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:34:54 [DEBUG] clck_gen.py:128 IND CLOCK 510
2025-03-30 07:34:55 [DEBUG] clck_gen.py:128 IND CLOCK 612
2025-03-30 07:34:55 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:34:55 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:34:55 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:34:55 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:34:55 [DEBUG] clck_gen.py:128 IND CLOCK 714
2025-03-30 07:34:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:34:55 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:34:55 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:34:55 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:34:55 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:34:55 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:34:55 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:34:55 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:34:55 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 07:34:55 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 07:34:55 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 07:34:55 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:35:00 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 07:35:00 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 07:35:00 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:35:00 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:35:00 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:35:00 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:35:00 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:35:00 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 07:35:00 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:35:00 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 07:35:00 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 07:35:00 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 07:35:00 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 07:35:00 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 07:35:00 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:35:00 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:35:00 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 07:35:00 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 07:35:00 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 07:35:00 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 07:35:00 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 07:35:00 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 07:35:00 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:35:00 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:35:00 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 07:35:00 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 07:35:00 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 07:35:00 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 07:35:00 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 07:35:00 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 07:35:00 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:35:00 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:35:00 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 07:35:00 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 07:35:00 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 07:35:00 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 07:35:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 07:35:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 07:35:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 07:35:00 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 07:35:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 07:35:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 07:35:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 07:35:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:35:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 07:35:00 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 07:35:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:35:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:35:00 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 07:35:00 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 07:35:00 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 07:35:00 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 07:35:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:35:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:35:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:35:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 07:35:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:35:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:35:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:35:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:35:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:35:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:35:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:35:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:35:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:35:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:35:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:35:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:35:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:35:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:35:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:35:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:35:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:35:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:35:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:35:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:35:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:35:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:35:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:35:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:35:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:35:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:35:00 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-03-30 07:35:01 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-03-30 07:35:01 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-03-30 07:35:01 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-03-30 07:35:01 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-03-30 07:35:01 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-03-30 07:35:01 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-03-30 07:35:01 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-03-30 07:35:01 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-03-30 07:35:01 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-03-30 07:35:01 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 07:35:01 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 07:35:01 [DEBUG] fake_trx.py:317 (BTS@172.18.26.20:5700) Recv FAKE_CI cmd
2025-03-30 07:35:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:35:01 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-03-30 07:35:01 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:35:01 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:35:01 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:35:01 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:35:02 [DEBUG] clck_gen.py:128 IND CLOCK 306
2025-03-30 07:35:02 [DEBUG] clck_gen.py:128 IND CLOCK 408
2025-03-30 07:35:02 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:35:02 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:35:02 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:35:02 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:35:03 [DEBUG] clck_gen.py:128 IND CLOCK 510
2025-03-30 07:35:03 [DEBUG] clck_gen.py:128 IND CLOCK 612
2025-03-30 07:35:03 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:35:03 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:35:03 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:35:03 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:35:04 [DEBUG] clck_gen.py:128 IND CLOCK 714
2025-03-30 07:35:04 [DEBUG] clck_gen.py:128 IND CLOCK 816
2025-03-30 07:35:04 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:35:04 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:35:04 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:35:04 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:35:05 [DEBUG] clck_gen.py:128 IND CLOCK 918
2025-03-30 07:35:05 [DEBUG] clck_gen.py:128 IND CLOCK 1020
2025-03-30 07:35:05 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:35:05 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:35:05 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:35:05 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:35:06 [DEBUG] clck_gen.py:128 IND CLOCK 1122
2025-03-30 07:35:06 [DEBUG] clck_gen.py:128 IND CLOCK 1224
2025-03-30 07:35:07 [DEBUG] clck_gen.py:128 IND CLOCK 1326
2025-03-30 07:35:07 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:35:07 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:35:07 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:35:07 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:35:07 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:35:07 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:35:07 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:35:07 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:35:07 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 07:35:07 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 07:35:07 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 07:35:12 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 07:35:12 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 07:35:12 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:35:12 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:35:12 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:35:12 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:35:12 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:35:12 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 07:35:12 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:35:12 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 07:35:12 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 07:35:12 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 07:35:12 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 07:35:12 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 07:35:12 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:35:12 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 07:35:12 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:35:12 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 07:35:12 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 07:35:12 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 07:35:12 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 07:35:12 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 07:35:12 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:35:12 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 07:35:12 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:35:12 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 07:35:12 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 07:35:12 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 07:35:12 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 07:35:12 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 07:35:12 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:35:12 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 07:35:12 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:35:12 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 07:35:12 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 07:35:12 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 07:35:12 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 07:35:12 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 07:35:12 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 07:35:12 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 07:35:12 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 07:35:12 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 07:35:12 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 07:35:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 07:35:12 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:35:12 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:35:12 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 07:35:12 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:35:12 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:35:12 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:35:12 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 07:35:12 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 07:35:12 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 07:35:12 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 07:35:12 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:35:12 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:35:12 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:35:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 07:35:12 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:35:12 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:35:12 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:35:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:35:12 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:35:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:35:12 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:35:12 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:35:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:35:12 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:35:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:35:12 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:35:12 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:35:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:35:12 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:35:12 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:35:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:35:12 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:35:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:35:12 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:35:12 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:35:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:35:12 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:35:12 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:35:12 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-03-30 07:35:12 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-03-30 07:35:12 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-03-30 07:35:12 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-03-30 07:35:12 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-03-30 07:35:12 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-03-30 07:35:12 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-03-30 07:35:12 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-03-30 07:35:12 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-03-30 07:35:12 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-03-30 07:35:12 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=0 bl=148 pwr=0
2025-03-30 07:35:12 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=1 bl=148 pwr=0
2025-03-30 07:35:12 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=2 bl=148 pwr=0
2025-03-30 07:35:12 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=3 bl=148 pwr=0
2025-03-30 07:35:12 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=4 bl=148 pwr=0
2025-03-30 07:35:12 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=5 bl=148 pwr=0
2025-03-30 07:35:12 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=6 bl=148 pwr=0
2025-03-30 07:35:12 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=7 bl=148 pwr=0
2025-03-30 07:35:13 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 07:35:13 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 07:35:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:35:13 [DEBUG] fake_trx.py:317 (BTS@172.18.26.20:5700) Recv FAKE_CI cmd
2025-03-30 07:35:13 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-03-30 07:35:13 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:35:13 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:35:13 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:35:13 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:35:13 [DEBUG] clck_gen.py:128 IND CLOCK 306
2025-03-30 07:35:14 [DEBUG] clck_gen.py:128 IND CLOCK 408
2025-03-30 07:35:14 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:35:14 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:35:14 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:35:14 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:35:14 [DEBUG] clck_gen.py:128 IND CLOCK 510
2025-03-30 07:35:15 [DEBUG] clck_gen.py:128 IND CLOCK 612
2025-03-30 07:35:15 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:35:15 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:35:15 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:35:15 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:35:15 [DEBUG] clck_gen.py:128 IND CLOCK 714
2025-03-30 07:35:16 [DEBUG] clck_gen.py:128 IND CLOCK 816
2025-03-30 07:35:16 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:35:16 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:35:16 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:35:16 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:35:16 [DEBUG] clck_gen.py:128 IND CLOCK 918
2025-03-30 07:35:17 [DEBUG] clck_gen.py:128 IND CLOCK 1020
2025-03-30 07:35:17 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:35:17 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:35:17 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:35:17 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:35:17 [DEBUG] clck_gen.py:128 IND CLOCK 1122
2025-03-30 07:35:18 [DEBUG] clck_gen.py:128 IND CLOCK 1224
2025-03-30 07:35:18 [DEBUG] clck_gen.py:128 IND CLOCK 1326
2025-03-30 07:35:19 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:35:19 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:35:19 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:35:19 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:35:19 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:35:19 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:35:19 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:35:19 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 07:35:19 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 07:35:19 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 07:35:19 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:35:24 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 07:35:24 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 07:35:24 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:35:24 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:35:24 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:35:24 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:35:24 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:35:24 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 07:35:24 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:35:24 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 07:35:24 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 07:35:24 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 07:35:24 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 07:35:24 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 07:35:24 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:35:24 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:35:24 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 07:35:24 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 07:35:24 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 07:35:24 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 07:35:24 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 07:35:24 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 07:35:24 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:35:24 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:35:24 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 07:35:24 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 07:35:24 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 07:35:24 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 07:35:24 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 07:35:24 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 07:35:24 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:35:24 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:35:24 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 07:35:24 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 07:35:24 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 07:35:24 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 07:35:24 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 07:35:24 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 07:35:24 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 07:35:24 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 07:35:24 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 07:35:24 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 07:35:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 07:35:24 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:35:24 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 07:35:24 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 07:35:24 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:35:24 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:35:24 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 07:35:24 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 07:35:24 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 07:35:24 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 07:35:24 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:35:24 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:35:24 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:35:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 07:35:24 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:35:24 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:35:24 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:35:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:35:24 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:35:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:35:24 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:35:24 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:35:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:35:24 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:35:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:35:24 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:35:24 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:35:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:35:24 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:35:24 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:35:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:35:24 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:35:24 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:35:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:35:24 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:35:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:35:24 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:35:24 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:35:24 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:35:24 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:35:24 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-03-30 07:35:24 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-03-30 07:35:24 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-03-30 07:35:24 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-03-30 07:35:24 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-03-30 07:35:24 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-03-30 07:35:24 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-03-30 07:35:24 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-03-30 07:35:24 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-03-30 07:35:24 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-03-30 07:35:24 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=0 bl=148 pwr=0
2025-03-30 07:35:24 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=1 bl=148 pwr=0
2025-03-30 07:35:24 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=2 bl=148 pwr=0
2025-03-30 07:35:24 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=3 bl=148 pwr=0
2025-03-30 07:35:24 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=4 bl=148 pwr=0
2025-03-30 07:35:24 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=5 bl=148 pwr=0
2025-03-30 07:35:24 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=6 bl=148 pwr=0
2025-03-30 07:35:24 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=7 bl=148 pwr=0
2025-03-30 07:35:24 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 07:35:24 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 07:35:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:35:24 [DEBUG] fake_trx.py:317 (BTS@172.18.26.20:5700) Recv FAKE_CI cmd
2025-03-30 07:35:25 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-03-30 07:35:25 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:35:25 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:35:25 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:35:25 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:35:25 [DEBUG] clck_gen.py:128 IND CLOCK 306
2025-03-30 07:35:25 [DEBUG] clck_gen.py:128 IND CLOCK 408
2025-03-30 07:35:26 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:35:26 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:35:26 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:35:26 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:35:26 [DEBUG] clck_gen.py:128 IND CLOCK 510
2025-03-30 07:35:26 [DEBUG] clck_gen.py:128 IND CLOCK 612
2025-03-30 07:35:27 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:35:27 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:35:27 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:35:27 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:35:27 [DEBUG] clck_gen.py:128 IND CLOCK 714
2025-03-30 07:35:27 [DEBUG] clck_gen.py:128 IND CLOCK 816
2025-03-30 07:35:28 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:35:28 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:35:28 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:35:28 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:35:28 [DEBUG] clck_gen.py:128 IND CLOCK 918
2025-03-30 07:35:28 [DEBUG] clck_gen.py:128 IND CLOCK 1020
2025-03-30 07:35:29 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:35:29 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:35:29 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:35:29 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:35:29 [DEBUG] clck_gen.py:128 IND CLOCK 1122
2025-03-30 07:35:29 [DEBUG] clck_gen.py:128 IND CLOCK 1224
2025-03-30 07:35:30 [DEBUG] clck_gen.py:128 IND CLOCK 1326
2025-03-30 07:35:30 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:35:30 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:35:30 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:35:30 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:35:30 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:35:30 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:35:30 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:35:30 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 07:35:30 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 07:35:30 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 07:35:30 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:35:35 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 07:35:35 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 07:35:35 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:35:35 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:35:35 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:35:35 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:35:35 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:35:35 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 07:35:35 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:35:35 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 07:35:35 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 07:35:35 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 07:35:35 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 07:35:35 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 07:35:35 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:35:35 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:35:35 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 07:35:35 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 07:35:35 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 07:35:35 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 07:35:35 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 07:35:35 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 07:35:35 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:35:35 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:35:35 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 07:35:35 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 07:35:35 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 07:35:35 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 07:35:35 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 07:35:35 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 07:35:35 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:35:35 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 07:35:35 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:35:35 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 07:35:35 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 07:35:35 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 07:35:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 07:35:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 07:35:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 07:35:35 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 07:35:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 07:35:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 07:35:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 07:35:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:35:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 07:35:35 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 07:35:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:35:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:35:35 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 07:35:35 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 07:35:35 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 07:35:35 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 07:35:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:35:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:35:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:35:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 07:35:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:35:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:35:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:35:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:35:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:35:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:35:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:35:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:35:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:35:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:35:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:35:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:35:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:35:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:35:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:35:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:35:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:35:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:35:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:35:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:35:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:35:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:35:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:35:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:35:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:35:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:35:35 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-03-30 07:35:36 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-03-30 07:35:36 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=107): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-03-30 07:35:36 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=107): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-03-30 07:35:36 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=107): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-03-30 07:35:36 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=107): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-03-30 07:35:36 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=107): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-03-30 07:35:36 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=107): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-03-30 07:35:36 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=107): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-03-30 07:35:36 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=107): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-03-30 07:35:36 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=107): ver=1 fn=105 tn=0 bl=148 pwr=0
2025-03-30 07:35:36 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=107): ver=1 fn=105 tn=1 bl=148 pwr=0
2025-03-30 07:35:36 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=107): ver=1 fn=105 tn=2 bl=148 pwr=0
2025-03-30 07:35:36 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=107): ver=1 fn=105 tn=3 bl=148 pwr=0
2025-03-30 07:35:36 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=107): ver=1 fn=105 tn=4 bl=148 pwr=0
2025-03-30 07:35:36 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=107): ver=1 fn=105 tn=5 bl=148 pwr=0
2025-03-30 07:35:36 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=107): ver=1 fn=105 tn=6 bl=148 pwr=0
2025-03-30 07:35:36 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=107): ver=1 fn=105 tn=7 bl=148 pwr=0
2025-03-30 07:35:36 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=107): ver=1 fn=106 tn=0 bl=148 pwr=0
2025-03-30 07:35:36 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=107): ver=1 fn=106 tn=1 bl=148 pwr=0
2025-03-30 07:35:36 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=107): ver=1 fn=106 tn=2 bl=148 pwr=0
2025-03-30 07:35:36 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=107): ver=1 fn=106 tn=3 bl=148 pwr=0
2025-03-30 07:35:36 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=107): ver=1 fn=106 tn=4 bl=148 pwr=0
2025-03-30 07:35:36 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=107): ver=1 fn=106 tn=5 bl=148 pwr=0
2025-03-30 07:35:36 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=107): ver=1 fn=106 tn=6 bl=148 pwr=0
2025-03-30 07:35:36 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=107): ver=1 fn=106 tn=7 bl=148 pwr=0
2025-03-30 07:35:36 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 07:35:36 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 07:35:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:35:36 [DEBUG] fake_trx.py:317 (BTS@172.18.26.20:5700) Recv FAKE_CI cmd
2025-03-30 07:35:36 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-03-30 07:35:36 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:35:36 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:35:36 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:35:36 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:35:37 [DEBUG] clck_gen.py:128 IND CLOCK 306
2025-03-30 07:35:37 [DEBUG] clck_gen.py:128 IND CLOCK 408
2025-03-30 07:35:37 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:35:37 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:35:37 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:35:37 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:35:38 [DEBUG] clck_gen.py:128 IND CLOCK 510
2025-03-30 07:35:38 [DEBUG] clck_gen.py:128 IND CLOCK 612
2025-03-30 07:35:38 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:35:38 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:35:38 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:35:38 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:35:38 [DEBUG] clck_gen.py:128 IND CLOCK 714
2025-03-30 07:35:39 [DEBUG] clck_gen.py:128 IND CLOCK 816
2025-03-30 07:35:39 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:35:39 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:35:39 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:35:39 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:35:39 [DEBUG] clck_gen.py:128 IND CLOCK 918
2025-03-30 07:35:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:35:40 [DEBUG] clck_gen.py:128 IND CLOCK 1020
2025-03-30 07:35:40 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:35:40 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:35:40 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:35:40 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:35:40 [DEBUG] clck_gen.py:128 IND CLOCK 1122
2025-03-30 07:35:41 [DEBUG] clck_gen.py:128 IND CLOCK 1224
2025-03-30 07:35:41 [DEBUG] clck_gen.py:128 IND CLOCK 1326
2025-03-30 07:35:42 [DEBUG] clck_gen.py:128 IND CLOCK 1428
2025-03-30 07:35:42 [DEBUG] clck_gen.py:128 IND CLOCK 1530
2025-03-30 07:35:43 [DEBUG] clck_gen.py:128 IND CLOCK 1632
2025-03-30 07:35:43 [DEBUG] clck_gen.py:128 IND CLOCK 1734
2025-03-30 07:35:44 [DEBUG] clck_gen.py:128 IND CLOCK 1836
2025-03-30 07:35:44 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:35:44 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:35:44 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:35:44 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:35:44 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:35:44 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:35:44 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:35:44 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:35:44 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 07:35:44 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 07:35:44 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 07:35:44 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=1858 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:35:44 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=1858 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:35:44 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=1858 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:35:44 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=1858 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:35:44 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=1858 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:35:44 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=1858 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:35:49 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 07:35:49 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 07:35:49 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:35:49 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:35:49 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:35:49 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:35:49 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:35:49 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 07:35:49 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:35:49 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 07:35:49 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 07:35:49 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 07:35:49 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 07:35:49 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 07:35:49 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:35:49 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:35:49 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 07:35:49 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 07:35:49 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 07:35:49 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 07:35:49 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 07:35:49 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 07:35:49 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:35:49 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:35:49 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 07:35:49 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 07:35:49 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 07:35:49 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 07:35:49 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 07:35:49 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 07:35:49 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:35:49 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:35:49 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 07:35:49 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 07:35:49 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 07:35:49 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 07:35:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 07:35:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 07:35:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 07:35:49 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 07:35:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 07:35:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 07:35:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 07:35:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:35:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 07:35:49 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 07:35:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:35:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:35:49 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 07:35:49 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 07:35:49 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 07:35:49 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 07:35:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:35:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:35:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:35:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 07:35:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:35:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:35:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:35:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:35:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:35:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:35:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:35:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:35:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:35:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:35:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:35:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:35:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:35:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:35:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:35:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:35:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:35:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:35:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:35:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:35:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:35:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:35:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:35:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:35:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:35:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:35:49 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-03-30 07:35:49 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-03-30 07:35:49 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-03-30 07:35:49 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-03-30 07:35:49 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-03-30 07:35:49 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-03-30 07:35:49 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-03-30 07:35:49 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-03-30 07:35:49 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-03-30 07:35:49 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-03-30 07:35:49 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=0 bl=148 pwr=0
2025-03-30 07:35:49 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=1 bl=148 pwr=0
2025-03-30 07:35:49 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=2 bl=148 pwr=0
2025-03-30 07:35:49 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=3 bl=148 pwr=0
2025-03-30 07:35:49 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=4 bl=148 pwr=0
2025-03-30 07:35:49 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=5 bl=148 pwr=0
2025-03-30 07:35:49 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=6 bl=148 pwr=0
2025-03-30 07:35:49 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=7 bl=148 pwr=0
2025-03-30 07:35:49 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 07:35:49 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 07:35:49 [DEBUG] fake_trx.py:317 (BTS@172.18.26.20:5700) Recv FAKE_CI cmd
2025-03-30 07:35:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:35:50 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-03-30 07:35:50 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:35:50 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:35:50 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:35:50 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:35:50 [DEBUG] clck_gen.py:128 IND CLOCK 306
2025-03-30 07:35:51 [DEBUG] clck_gen.py:128 IND CLOCK 408
2025-03-30 07:35:51 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:35:51 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:35:51 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:35:51 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:35:51 [DEBUG] clck_gen.py:128 IND CLOCK 510
2025-03-30 07:35:52 [DEBUG] clck_gen.py:128 IND CLOCK 612
2025-03-30 07:35:52 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=630): ver=1 fn=626 tn=0 bl=148 pwr=0
2025-03-30 07:35:52 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=630): ver=1 fn=626 tn=1 bl=148 pwr=0
2025-03-30 07:35:52 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=630): ver=1 fn=626 tn=2 bl=148 pwr=0
2025-03-30 07:35:52 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=630): ver=1 fn=626 tn=3 bl=148 pwr=0
2025-03-30 07:35:52 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=630): ver=1 fn=626 tn=4 bl=148 pwr=0
2025-03-30 07:35:52 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=630): ver=1 fn=626 tn=5 bl=148 pwr=0
2025-03-30 07:35:52 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=630): ver=1 fn=626 tn=6 bl=148 pwr=0
2025-03-30 07:35:52 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=630): ver=1 fn=626 tn=7 bl=148 pwr=0
2025-03-30 07:35:52 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=630): ver=1 fn=627 tn=0 bl=148 pwr=0
2025-03-30 07:35:52 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=630): ver=1 fn=627 tn=1 bl=148 pwr=0
2025-03-30 07:35:52 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=630): ver=1 fn=627 tn=2 bl=148 pwr=0
2025-03-30 07:35:52 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=630): ver=1 fn=627 tn=3 bl=148 pwr=0
2025-03-30 07:35:52 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=630): ver=1 fn=627 tn=4 bl=148 pwr=0
2025-03-30 07:35:52 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=630): ver=1 fn=627 tn=5 bl=148 pwr=0
2025-03-30 07:35:52 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=630): ver=1 fn=627 tn=6 bl=148 pwr=0
2025-03-30 07:35:52 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=630): ver=1 fn=627 tn=7 bl=148 pwr=0
2025-03-30 07:35:52 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=630): ver=1 fn=628 tn=0 bl=148 pwr=0
2025-03-30 07:35:52 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=630): ver=1 fn=628 tn=1 bl=148 pwr=0
2025-03-30 07:35:52 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=630): ver=1 fn=628 tn=2 bl=148 pwr=0
2025-03-30 07:35:52 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=630): ver=1 fn=628 tn=3 bl=148 pwr=0
2025-03-30 07:35:52 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=630): ver=1 fn=628 tn=4 bl=148 pwr=0
2025-03-30 07:35:52 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=630): ver=1 fn=628 tn=5 bl=148 pwr=0
2025-03-30 07:35:52 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=630): ver=1 fn=628 tn=6 bl=148 pwr=0
2025-03-30 07:35:52 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=630): ver=1 fn=628 tn=7 bl=148 pwr=0
2025-03-30 07:35:52 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=630): ver=1 fn=629 tn=0 bl=148 pwr=0
2025-03-30 07:35:52 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=630): ver=1 fn=629 tn=1 bl=148 pwr=0
2025-03-30 07:35:52 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=630): ver=1 fn=629 tn=2 bl=148 pwr=0
2025-03-30 07:35:52 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=630): ver=1 fn=629 tn=3 bl=148 pwr=0
2025-03-30 07:35:52 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=630): ver=1 fn=629 tn=4 bl=148 pwr=0
2025-03-30 07:35:52 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=630): ver=1 fn=629 tn=5 bl=148 pwr=0
2025-03-30 07:35:52 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=630): ver=1 fn=629 tn=6 bl=148 pwr=0
2025-03-30 07:35:52 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=630): ver=1 fn=629 tn=7 bl=148 pwr=0
2025-03-30 07:35:52 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:35:52 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:35:52 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:35:52 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:35:52 [DEBUG] clck_gen.py:128 IND CLOCK 714
2025-03-30 07:35:53 [DEBUG] clck_gen.py:128 IND CLOCK 816
2025-03-30 07:35:53 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:35:53 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:35:53 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:35:53 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:35:53 [DEBUG] clck_gen.py:128 IND CLOCK 918
2025-03-30 07:35:53 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:35:53 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:35:53 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:35:53 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:35:53 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:35:53 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:35:53 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:35:53 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 07:35:53 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 07:35:53 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 07:35:53 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=987 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:35:53 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:35:53 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=987 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:35:58 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 07:35:58 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 07:35:58 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:35:58 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:35:58 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:35:58 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:35:58 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:35:58 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 07:35:58 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:35:58 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 07:35:58 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 07:35:58 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 07:35:58 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 07:35:58 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 07:35:58 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:35:58 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:35:58 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 07:35:58 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 07:35:58 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 07:35:58 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 07:35:58 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 07:35:58 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 07:35:58 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:35:58 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:35:58 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 07:35:58 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 07:35:58 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 07:35:58 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 07:35:58 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 07:35:58 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 07:35:58 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:35:58 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:35:58 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 07:35:58 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 07:35:58 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 07:35:58 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 07:35:58 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 07:35:58 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 07:35:58 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 07:35:58 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 07:35:58 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 07:35:58 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 07:35:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 07:35:58 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:35:58 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 07:35:58 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 07:35:58 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:35:58 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:35:58 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 07:35:58 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 07:35:58 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 07:35:58 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 07:35:58 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:35:58 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:35:58 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:35:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 07:35:58 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:35:58 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:35:58 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:35:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:35:58 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:35:58 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:35:58 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:35:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:35:58 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:35:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:35:58 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:35:58 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:35:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:35:58 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:35:58 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:35:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:35:58 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:35:58 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:35:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:35:58 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:35:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:35:58 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:35:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:35:58 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:35:58 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:35:58 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:35:58 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-03-30 07:35:59 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-03-30 07:35:59 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-03-30 07:35:59 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-03-30 07:35:59 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-03-30 07:35:59 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-03-30 07:35:59 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-03-30 07:35:59 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-03-30 07:35:59 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-03-30 07:35:59 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-03-30 07:35:59 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=0 bl=148 pwr=0
2025-03-30 07:35:59 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=1 bl=148 pwr=0
2025-03-30 07:35:59 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=2 bl=148 pwr=0
2025-03-30 07:35:59 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=3 bl=148 pwr=0
2025-03-30 07:35:59 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=4 bl=148 pwr=0
2025-03-30 07:35:59 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=5 bl=148 pwr=0
2025-03-30 07:35:59 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=6 bl=148 pwr=0
2025-03-30 07:35:59 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=7 bl=148 pwr=0
2025-03-30 07:35:59 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 07:35:59 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 07:35:59 [DEBUG] fake_trx.py:317 (BTS@172.18.26.20:5700) Recv FAKE_CI cmd
2025-03-30 07:35:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:35:59 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:35:59 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:35:59 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:35:59 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:35:59 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:35:59 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:35:59 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:35:59 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:35:59 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 07:35:59 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 07:35:59 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 07:36:04 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 07:36:04 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 07:36:04 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:36:04 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:36:04 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:36:04 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:36:04 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:36:04 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 07:36:04 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:36:04 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 07:36:04 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 07:36:04 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 07:36:04 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 07:36:04 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 07:36:04 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:36:04 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 07:36:04 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:36:04 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 07:36:04 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 07:36:04 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 07:36:04 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 07:36:04 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 07:36:04 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:36:04 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 07:36:04 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:36:04 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 07:36:04 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 07:36:04 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 07:36:04 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 07:36:04 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 07:36:04 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:36:04 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:36:04 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 07:36:04 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 07:36:04 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 07:36:04 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 07:36:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 07:36:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 07:36:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 07:36:04 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 07:36:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 07:36:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 07:36:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 07:36:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 07:36:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:36:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:36:04 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 07:36:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:36:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:36:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:36:04 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 07:36:04 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 07:36:04 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 07:36:04 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 07:36:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:36:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:36:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:36:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 07:36:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:36:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:36:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:36:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:36:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:36:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:36:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:36:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:36:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:36:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:36:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:36:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:36:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:36:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:36:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:36:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:36:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:36:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:36:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:36:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:36:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:36:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:36:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:36:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:36:04 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-03-30 07:36:04 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-03-30 07:36:04 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-03-30 07:36:04 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-03-30 07:36:04 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-03-30 07:36:04 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-03-30 07:36:04 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-03-30 07:36:04 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-03-30 07:36:04 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-03-30 07:36:04 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-03-30 07:36:04 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=105 tn=0 bl=148 pwr=0
2025-03-30 07:36:04 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=105 tn=1 bl=148 pwr=0
2025-03-30 07:36:04 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=105 tn=2 bl=148 pwr=0
2025-03-30 07:36:04 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=105 tn=3 bl=148 pwr=0
2025-03-30 07:36:04 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=105 tn=4 bl=148 pwr=0
2025-03-30 07:36:04 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=105 tn=5 bl=148 pwr=0
2025-03-30 07:36:04 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=105 tn=6 bl=148 pwr=0
2025-03-30 07:36:04 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=105 tn=7 bl=148 pwr=0
2025-03-30 07:36:04 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=106 tn=0 bl=148 pwr=0
2025-03-30 07:36:04 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=106 tn=1 bl=148 pwr=0
2025-03-30 07:36:04 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=106 tn=2 bl=148 pwr=0
2025-03-30 07:36:04 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=106 tn=3 bl=148 pwr=0
2025-03-30 07:36:04 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=106 tn=4 bl=148 pwr=0
2025-03-30 07:36:04 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=106 tn=5 bl=148 pwr=0
2025-03-30 07:36:04 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=106 tn=6 bl=148 pwr=0
2025-03-30 07:36:04 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=106 tn=7 bl=148 pwr=0
2025-03-30 07:36:04 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=107 tn=0 bl=148 pwr=0
2025-03-30 07:36:04 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=107 tn=1 bl=148 pwr=0
2025-03-30 07:36:04 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=107 tn=2 bl=148 pwr=0
2025-03-30 07:36:04 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=107 tn=3 bl=148 pwr=0
2025-03-30 07:36:04 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=107 tn=4 bl=148 pwr=0
2025-03-30 07:36:04 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=107 tn=5 bl=148 pwr=0
2025-03-30 07:36:04 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=107 tn=6 bl=148 pwr=0
2025-03-30 07:36:04 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=107 tn=7 bl=148 pwr=0
2025-03-30 07:36:04 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 07:36:04 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 07:36:04 [DEBUG] fake_trx.py:317 (BTS@172.18.26.20:5700) Recv FAKE_CI cmd
2025-03-30 07:36:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:36:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:36:04 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:36:04 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:36:04 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:36:04 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:36:04 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:36:04 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:36:04 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:36:04 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 07:36:04 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 07:36:04 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 07:36:04 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:36:09 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 07:36:09 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 07:36:09 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:36:09 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:36:09 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:36:09 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:36:09 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:36:09 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 07:36:09 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:36:09 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 07:36:09 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 07:36:09 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 07:36:09 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 07:36:09 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 07:36:09 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:36:09 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:36:09 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 07:36:09 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 07:36:09 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 07:36:09 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 07:36:09 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 07:36:09 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 07:36:09 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:36:09 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 07:36:09 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:36:09 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 07:36:09 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 07:36:09 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 07:36:09 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 07:36:09 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 07:36:09 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:36:09 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:36:09 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 07:36:09 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 07:36:09 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 07:36:09 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 07:36:09 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 07:36:09 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 07:36:09 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 07:36:09 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 07:36:09 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 07:36:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 07:36:09 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 07:36:09 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 07:36:09 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 07:36:09 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:36:09 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:36:09 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 07:36:09 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 07:36:09 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 07:36:09 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 07:36:09 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:36:09 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:36:09 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:36:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 07:36:09 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:36:09 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:36:09 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:36:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:36:09 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:36:09 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:36:09 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:36:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:36:09 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:36:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:36:09 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:36:09 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:36:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:36:09 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:36:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:36:09 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:36:09 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:36:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:36:09 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:36:09 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:36:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:36:09 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:36:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:36:09 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:36:09 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:36:09 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:36:09 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:36:09 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-03-30 07:36:10 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-03-30 07:36:10 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-03-30 07:36:10 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-03-30 07:36:10 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-03-30 07:36:10 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-03-30 07:36:10 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-03-30 07:36:10 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-03-30 07:36:10 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-03-30 07:36:10 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-03-30 07:36:10 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=105 tn=0 bl=148 pwr=0
2025-03-30 07:36:10 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=105 tn=1 bl=148 pwr=0
2025-03-30 07:36:10 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=105 tn=2 bl=148 pwr=0
2025-03-30 07:36:10 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=105 tn=3 bl=148 pwr=0
2025-03-30 07:36:10 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=105 tn=4 bl=148 pwr=0
2025-03-30 07:36:10 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=105 tn=5 bl=148 pwr=0
2025-03-30 07:36:10 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=105 tn=6 bl=148 pwr=0
2025-03-30 07:36:10 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=105 tn=7 bl=148 pwr=0
2025-03-30 07:36:10 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=106 tn=0 bl=148 pwr=0
2025-03-30 07:36:10 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=106 tn=1 bl=148 pwr=0
2025-03-30 07:36:10 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=106 tn=2 bl=148 pwr=0
2025-03-30 07:36:10 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=106 tn=3 bl=148 pwr=0
2025-03-30 07:36:10 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=106 tn=4 bl=148 pwr=0
2025-03-30 07:36:10 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=106 tn=5 bl=148 pwr=0
2025-03-30 07:36:10 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=106 tn=6 bl=148 pwr=0
2025-03-30 07:36:10 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=106 tn=7 bl=148 pwr=0
2025-03-30 07:36:10 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=107 tn=0 bl=148 pwr=0
2025-03-30 07:36:10 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=107 tn=1 bl=148 pwr=0
2025-03-30 07:36:10 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=107 tn=2 bl=148 pwr=0
2025-03-30 07:36:10 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=107 tn=3 bl=148 pwr=0
2025-03-30 07:36:10 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=107 tn=4 bl=148 pwr=0
2025-03-30 07:36:10 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=107 tn=5 bl=148 pwr=0
2025-03-30 07:36:10 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=107 tn=6 bl=148 pwr=0
2025-03-30 07:36:10 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=107 tn=7 bl=148 pwr=0
2025-03-30 07:36:10 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 07:36:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:36:10 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 07:36:10 [DEBUG] fake_trx.py:317 (BTS@172.18.26.20:5700) Recv FAKE_CI cmd
2025-03-30 07:36:10 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:36:10 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:36:10 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:36:10 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:36:10 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:36:10 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:36:10 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:36:10 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:36:10 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 07:36:10 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 07:36:10 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 07:36:10 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=124 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:36:10 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=124 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:36:10 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=124 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:36:10 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=124 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:36:10 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=124 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:36:10 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=124 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:36:10 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=124 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:36:10 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=124 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:36:15 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 07:36:15 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 07:36:15 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:36:15 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:36:15 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:36:15 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:36:15 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:36:15 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 07:36:15 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:36:15 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 07:36:15 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 07:36:15 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 07:36:15 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 07:36:15 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 07:36:15 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:36:15 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:36:15 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 07:36:15 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 07:36:15 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 07:36:15 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 07:36:15 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 07:36:15 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 07:36:15 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:36:15 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:36:15 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 07:36:15 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 07:36:15 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 07:36:15 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 07:36:15 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 07:36:15 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 07:36:15 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:36:15 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:36:15 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 07:36:15 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 07:36:15 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 07:36:15 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 07:36:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 07:36:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 07:36:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 07:36:15 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 07:36:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 07:36:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 07:36:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 07:36:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 07:36:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:36:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:36:15 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 07:36:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:36:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:36:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:36:15 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 07:36:15 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 07:36:15 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 07:36:15 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 07:36:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:36:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:36:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:36:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 07:36:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:36:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:36:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:36:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:36:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:36:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:36:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:36:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:36:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:36:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:36:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:36:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:36:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:36:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:36:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:36:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:36:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:36:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:36:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:36:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:36:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:36:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:36:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:36:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:36:15 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-03-30 07:36:16 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-03-30 07:36:16 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-03-30 07:36:16 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-03-30 07:36:16 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-03-30 07:36:16 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-03-30 07:36:16 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-03-30 07:36:16 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-03-30 07:36:16 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-03-30 07:36:16 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-03-30 07:36:16 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=0 bl=148 pwr=0
2025-03-30 07:36:16 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=1 bl=148 pwr=0
2025-03-30 07:36:16 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=2 bl=148 pwr=0
2025-03-30 07:36:16 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=3 bl=148 pwr=0
2025-03-30 07:36:16 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=4 bl=148 pwr=0
2025-03-30 07:36:16 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=5 bl=148 pwr=0
2025-03-30 07:36:16 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=6 bl=148 pwr=0
2025-03-30 07:36:16 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=7 bl=148 pwr=0
2025-03-30 07:36:16 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 07:36:16 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 07:36:16 [DEBUG] fake_trx.py:317 (BTS@172.18.26.20:5700) Recv FAKE_CI cmd
2025-03-30 07:36:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:36:16 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:36:16 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:36:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:36:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:36:16 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:36:16 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:36:16 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 07:36:16 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 07:36:16 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-03-30 07:36:16 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:36:16 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:36:16 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:36:16 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:36:17 [DEBUG] clck_gen.py:128 IND CLOCK 306
2025-03-30 07:36:17 [DEBUG] clck_gen.py:128 IND CLOCK 408
2025-03-30 07:36:17 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:36:17 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:36:17 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:36:17 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:36:17 [DEBUG] clck_gen.py:128 IND CLOCK 510
2025-03-30 07:36:18 [DEBUG] clck_gen.py:128 IND CLOCK 612
2025-03-30 07:36:18 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:36:18 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:36:18 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:36:18 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:36:18 [DEBUG] clck_gen.py:128 IND CLOCK 714
2025-03-30 07:36:19 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.26.22:6700) Recv SETFH cmd
2025-03-30 07:36:19 [INFO] transceiver.py:237 (MS@172.18.26.22:6700) Frequency hopping configured: hsn=0, maio=1, ma_len=2
2025-03-30 07:36:19 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:36:19 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:36:19 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:36:19 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:36:19 [INFO] transceiver.py:241 (MS@172.18.26.22:6700) Frequency hopping disabled
2025-03-30 07:36:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:36:19 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:36:19 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:36:19 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:36:19 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:36:19 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:36:19 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:36:19 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:36:19 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:36:19 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 07:36:19 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 07:36:19 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 07:36:24 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 07:36:24 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 07:36:24 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:36:24 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:36:24 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:36:24 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:36:24 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:36:24 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 07:36:24 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:36:24 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 07:36:24 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 07:36:24 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 07:36:24 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 07:36:24 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 07:36:24 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:36:24 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:36:24 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 07:36:24 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 07:36:24 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 07:36:24 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 07:36:24 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 07:36:24 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 07:36:24 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:36:24 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:36:24 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 07:36:24 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 07:36:24 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 07:36:24 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 07:36:24 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 07:36:24 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 07:36:24 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:36:24 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:36:24 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 07:36:24 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 07:36:24 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 07:36:24 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 07:36:24 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 07:36:24 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 07:36:24 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 07:36:24 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 07:36:24 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 07:36:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 07:36:24 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 07:36:24 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 07:36:24 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 07:36:24 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:36:24 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:36:24 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 07:36:24 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 07:36:24 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 07:36:24 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 07:36:24 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:36:24 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:36:24 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:36:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 07:36:24 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:36:24 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:36:24 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:36:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:36:24 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:36:24 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:36:24 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:36:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:36:24 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:36:24 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:36:24 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:36:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:36:24 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:36:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:36:24 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:36:24 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:36:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:36:24 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:36:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:36:24 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:36:24 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:36:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:36:24 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:36:24 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:36:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:36:24 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:36:24 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:36:24 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-03-30 07:36:24 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-03-30 07:36:24 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-03-30 07:36:24 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-03-30 07:36:24 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-03-30 07:36:24 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-03-30 07:36:24 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-03-30 07:36:24 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-03-30 07:36:24 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-03-30 07:36:24 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-03-30 07:36:24 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 07:36:24 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 07:36:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:36:24 [DEBUG] fake_trx.py:317 (BTS@172.18.26.20:5700) Recv FAKE_CI cmd
2025-03-30 07:36:24 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:36:24 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:36:24 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:36:24 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:36:24 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:36:24 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:36:24 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 07:36:24 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 07:36:25 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-03-30 07:36:25 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:36:25 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:36:25 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:36:25 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:36:25 [DEBUG] clck_gen.py:128 IND CLOCK 306
2025-03-30 07:36:26 [DEBUG] clck_gen.py:128 IND CLOCK 408
2025-03-30 07:36:26 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:36:26 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:36:26 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:36:26 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:36:26 [DEBUG] clck_gen.py:128 IND CLOCK 510
2025-03-30 07:36:27 [DEBUG] clck_gen.py:128 IND CLOCK 612
2025-03-30 07:36:27 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:36:27 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:36:27 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:36:27 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:36:27 [DEBUG] clck_gen.py:128 IND CLOCK 714
2025-03-30 07:36:27 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.26.22:6700) Recv SETFH cmd
2025-03-30 07:36:27 [INFO] transceiver.py:237 (MS@172.18.26.22:6700) Frequency hopping configured: hsn=0, maio=1, ma_len=2
2025-03-30 07:36:27 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:36:27 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:36:28 [DEBUG] clck_gen.py:128 IND CLOCK 816
2025-03-30 07:36:28 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:36:28 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:36:28 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:36:28 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:36:28 [DEBUG] clck_gen.py:128 IND CLOCK 918
2025-03-30 07:36:28 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:36:28 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:36:28 [INFO] transceiver.py:241 (MS@172.18.26.22:6700) Frequency hopping disabled
2025-03-30 07:36:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:36:28 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:36:28 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:36:28 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:36:28 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:36:28 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:36:28 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:36:28 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:36:28 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:36:28 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 07:36:28 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 07:36:28 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 07:36:33 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 07:36:33 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 07:36:33 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:36:33 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:36:33 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:36:33 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:36:33 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:36:33 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 07:36:33 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:36:33 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 07:36:33 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 07:36:33 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 07:36:33 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 07:36:33 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 07:36:33 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:36:33 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:36:33 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 07:36:33 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 07:36:33 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 07:36:33 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 07:36:33 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 07:36:33 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 07:36:33 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:36:33 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:36:33 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 07:36:33 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 07:36:33 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 07:36:33 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 07:36:33 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 07:36:33 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 07:36:33 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:36:33 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:36:33 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 07:36:33 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 07:36:33 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 07:36:33 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 07:36:33 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 07:36:33 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 07:36:33 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 07:36:33 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 07:36:33 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 07:36:33 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 07:36:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 07:36:33 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:36:33 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 07:36:33 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 07:36:33 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:36:33 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:36:33 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:36:33 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 07:36:33 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 07:36:33 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 07:36:33 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 07:36:33 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:36:33 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:36:33 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:36:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 07:36:33 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:36:33 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:36:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:36:33 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:36:33 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:36:33 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:36:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:36:33 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:36:33 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:36:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:36:33 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:36:33 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:36:33 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:36:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:36:33 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:36:33 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:36:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:36:33 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:36:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:36:33 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:36:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:36:33 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:36:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:36:33 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:36:33 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:36:33 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-03-30 07:36:34 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-03-30 07:36:34 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-03-30 07:36:34 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-03-30 07:36:34 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-03-30 07:36:34 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-03-30 07:36:34 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-03-30 07:36:34 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-03-30 07:36:34 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-03-30 07:36:34 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-03-30 07:36:34 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 07:36:34 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 07:36:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:36:34 [DEBUG] fake_trx.py:317 (BTS@172.18.26.20:5700) Recv FAKE_CI cmd
2025-03-30 07:36:34 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:36:34 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:36:34 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:36:34 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:36:34 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:36:34 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:36:34 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 07:36:34 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 07:36:34 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-03-30 07:36:34 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:36:34 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:36:34 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:36:34 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:36:34 [DEBUG] clck_gen.py:128 IND CLOCK 306
2025-03-30 07:36:35 [DEBUG] clck_gen.py:128 IND CLOCK 408
2025-03-30 07:36:35 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:36:35 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:36:35 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:36:35 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:36:35 [DEBUG] clck_gen.py:128 IND CLOCK 510
2025-03-30 07:36:36 [DEBUG] clck_gen.py:128 IND CLOCK 612
2025-03-30 07:36:36 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:36:36 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:36:36 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:36:36 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:36:36 [DEBUG] clck_gen.py:128 IND CLOCK 714
2025-03-30 07:36:37 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.26.22:6700) Recv SETFH cmd
2025-03-30 07:36:37 [INFO] transceiver.py:237 (MS@172.18.26.22:6700) Frequency hopping configured: hsn=0, maio=1, ma_len=2
2025-03-30 07:36:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:36:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:36:37 [DEBUG] clck_gen.py:128 IND CLOCK 816
2025-03-30 07:36:37 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:36:37 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:36:37 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:36:37 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:36:37 [DEBUG] clck_gen.py:128 IND CLOCK 918
2025-03-30 07:36:38 [DEBUG] clck_gen.py:128 IND CLOCK 1020
2025-03-30 07:36:38 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:36:38 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:36:38 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:36:38 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:36:38 [DEBUG] clck_gen.py:128 IND CLOCK 1122
2025-03-30 07:36:39 [DEBUG] clck_gen.py:128 IND CLOCK 1224
2025-03-30 07:36:39 [DEBUG] clck_gen.py:128 IND CLOCK 1326
2025-03-30 07:36:40 [DEBUG] clck_gen.py:128 IND CLOCK 1428
2025-03-30 07:36:40 [DEBUG] clck_gen.py:128 IND CLOCK 1530
2025-03-30 07:36:41 [DEBUG] clck_gen.py:128 IND CLOCK 1632
2025-03-30 07:36:41 [DEBUG] clck_gen.py:128 IND CLOCK 1734
2025-03-30 07:36:42 [DEBUG] clck_gen.py:128 IND CLOCK 1836
2025-03-30 07:36:42 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:36:42 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:36:42 [INFO] transceiver.py:241 (MS@172.18.26.22:6700) Frequency hopping disabled
2025-03-30 07:36:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:36:42 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:36:42 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:36:42 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:36:42 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:36:42 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:36:42 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:36:42 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:36:42 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 07:36:42 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 07:36:42 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 07:36:42 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:36:47 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 07:36:47 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 07:36:47 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:36:47 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:36:47 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:36:47 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:36:47 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:36:47 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 07:36:47 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:36:47 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 07:36:47 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 07:36:47 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 07:36:47 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 07:36:47 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 07:36:47 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:36:47 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:36:47 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 07:36:47 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 07:36:47 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 07:36:47 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 07:36:47 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 07:36:47 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 07:36:47 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:36:47 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:36:47 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 07:36:47 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 07:36:47 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 07:36:47 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 07:36:47 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 07:36:47 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 07:36:47 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:36:47 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:36:47 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 07:36:47 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 07:36:47 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 07:36:47 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 07:36:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 07:36:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 07:36:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 07:36:47 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 07:36:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 07:36:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 07:36:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 07:36:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 07:36:47 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 07:36:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:36:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:36:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:36:47 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 07:36:47 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 07:36:47 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 07:36:47 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 07:36:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:36:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:36:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:36:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 07:36:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:36:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:36:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:36:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:36:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:36:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:36:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:36:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:36:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:36:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:36:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:36:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:36:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:36:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:36:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:36:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:36:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:36:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:36:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:36:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:36:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:36:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:36:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:36:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:36:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:36:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:36:47 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-03-30 07:36:47 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-03-30 07:36:47 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-03-30 07:36:47 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-03-30 07:36:47 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-03-30 07:36:47 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-03-30 07:36:47 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-03-30 07:36:47 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-03-30 07:36:47 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-03-30 07:36:47 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-03-30 07:36:47 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 07:36:47 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 07:36:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:36:47 [DEBUG] fake_trx.py:317 (BTS@172.18.26.20:5700) Recv FAKE_CI cmd
2025-03-30 07:36:47 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:36:47 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:36:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:36:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:36:47 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:36:47 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:36:47 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 07:36:47 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 07:36:48 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-03-30 07:36:48 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:36:48 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:36:48 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:36:48 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:36:48 [DEBUG] clck_gen.py:128 IND CLOCK 306
2025-03-30 07:36:49 [DEBUG] clck_gen.py:128 IND CLOCK 408
2025-03-30 07:36:49 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:36:49 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:36:49 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:36:49 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:36:49 [DEBUG] clck_gen.py:128 IND CLOCK 510
2025-03-30 07:36:49 [DEBUG] clck_gen.py:128 IND CLOCK 612
2025-03-30 07:36:50 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:36:50 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:36:50 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:36:50 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:36:50 [DEBUG] clck_gen.py:128 IND CLOCK 714
2025-03-30 07:36:50 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.26.22:6700) Recv SETFH cmd
2025-03-30 07:36:50 [INFO] transceiver.py:237 (MS@172.18.26.22:6700) Frequency hopping configured: hsn=0, maio=1, ma_len=2
2025-03-30 07:36:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:36:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:36:50 [DEBUG] clck_gen.py:128 IND CLOCK 816
2025-03-30 07:36:51 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:36:51 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:36:51 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:36:51 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:36:51 [DEBUG] clck_gen.py:128 IND CLOCK 918
2025-03-30 07:36:51 [DEBUG] clck_gen.py:128 IND CLOCK 1020
2025-03-30 07:36:52 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:36:52 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:36:52 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:36:52 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:36:52 [DEBUG] clck_gen.py:128 IND CLOCK 1122
2025-03-30 07:36:52 [DEBUG] clck_gen.py:128 IND CLOCK 1224
2025-03-30 07:36:53 [DEBUG] clck_gen.py:128 IND CLOCK 1326
2025-03-30 07:36:53 [DEBUG] clck_gen.py:128 IND CLOCK 1428
2025-03-30 07:36:54 [DEBUG] clck_gen.py:128 IND CLOCK 1530
2025-03-30 07:36:54 [DEBUG] clck_gen.py:128 IND CLOCK 1632
2025-03-30 07:36:55 [DEBUG] clck_gen.py:128 IND CLOCK 1734
2025-03-30 07:36:55 [DEBUG] clck_gen.py:128 IND CLOCK 1836
2025-03-30 07:36:55 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:36:55 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:36:55 [INFO] transceiver.py:241 (MS@172.18.26.22:6700) Frequency hopping disabled
2025-03-30 07:36:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:36:55 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:36:55 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:36:55 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:36:55 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:36:55 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:36:55 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:36:55 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:36:55 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 07:36:55 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 07:36:55 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 07:36:55 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:36:55 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=1853 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:36:55 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=1853 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:36:55 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=1853 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:36:55 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=1853 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:36:55 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=1853 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:36:55 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=1853 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:36:55 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=1853 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:36:55 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=1853 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:37:00 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 07:37:00 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 07:37:00 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:37:00 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:37:00 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:37:00 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:37:00 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:37:00 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 07:37:00 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:37:00 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 07:37:00 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 07:37:00 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 07:37:00 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 07:37:00 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 07:37:00 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:37:00 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:37:00 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 07:37:00 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 07:37:00 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 07:37:00 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 07:37:00 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 07:37:00 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 07:37:00 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:37:00 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 07:37:00 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:37:00 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 07:37:00 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 07:37:00 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 07:37:00 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 07:37:00 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 07:37:00 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:37:00 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:37:00 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 07:37:00 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 07:37:00 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 07:37:00 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 07:37:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 07:37:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 07:37:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 07:37:00 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 07:37:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 07:37:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 07:37:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 07:37:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 07:37:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:37:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:37:00 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 07:37:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:37:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:37:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:37:00 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 07:37:00 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 07:37:00 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 07:37:00 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 07:37:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:37:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:37:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:37:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 07:37:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:37:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:37:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:37:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:37:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:37:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:37:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:37:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:37:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:37:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:37:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:37:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:37:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:37:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:37:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:37:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:37:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:37:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:37:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:37:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:37:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:37:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:37:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:37:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:37:00 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-03-30 07:37:01 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-03-30 07:37:01 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-03-30 07:37:01 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-03-30 07:37:01 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-03-30 07:37:01 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-03-30 07:37:01 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-03-30 07:37:01 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-03-30 07:37:01 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-03-30 07:37:01 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-03-30 07:37:01 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 07:37:01 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 07:37:01 [DEBUG] fake_trx.py:317 (BTS@172.18.26.20:5700) Recv FAKE_CI cmd
2025-03-30 07:37:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:37:01 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:37:01 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:37:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:37:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:37:01 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:37:01 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:37:01 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 07:37:01 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 07:37:01 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-03-30 07:37:01 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:37:01 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:37:01 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:37:01 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:37:02 [DEBUG] clck_gen.py:128 IND CLOCK 306
2025-03-30 07:37:02 [DEBUG] clck_gen.py:128 IND CLOCK 408
2025-03-30 07:37:02 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:37:02 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:37:02 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:37:02 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:37:03 [DEBUG] clck_gen.py:128 IND CLOCK 510
2025-03-30 07:37:03 [DEBUG] clck_gen.py:128 IND CLOCK 612
2025-03-30 07:37:03 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:37:03 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:37:03 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:37:03 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:37:03 [DEBUG] clck_gen.py:128 IND CLOCK 714
2025-03-30 07:37:04 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.26.22:6700) Recv SETFH cmd
2025-03-30 07:37:04 [INFO] transceiver.py:237 (MS@172.18.26.22:6700) Frequency hopping configured: hsn=0, maio=1, ma_len=2
2025-03-30 07:37:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:37:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:37:04 [DEBUG] clck_gen.py:128 IND CLOCK 816
2025-03-30 07:37:04 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:37:04 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:37:04 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:37:04 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:37:04 [DEBUG] clck_gen.py:128 IND CLOCK 918
2025-03-30 07:37:05 [DEBUG] clck_gen.py:128 IND CLOCK 1020
2025-03-30 07:37:05 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:37:05 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:37:05 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:37:05 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:37:05 [DEBUG] clck_gen.py:128 IND CLOCK 1122
2025-03-30 07:37:06 [DEBUG] clck_gen.py:128 IND CLOCK 1224
2025-03-30 07:37:06 [DEBUG] clck_gen.py:128 IND CLOCK 1326
2025-03-30 07:37:07 [DEBUG] clck_gen.py:128 IND CLOCK 1428
2025-03-30 07:37:07 [DEBUG] clck_gen.py:128 IND CLOCK 1530
2025-03-30 07:37:08 [DEBUG] clck_gen.py:128 IND CLOCK 1632
2025-03-30 07:37:08 [DEBUG] clck_gen.py:128 IND CLOCK 1734
2025-03-30 07:37:09 [DEBUG] clck_gen.py:128 IND CLOCK 1836
2025-03-30 07:37:09 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:37:09 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:37:09 [INFO] transceiver.py:241 (MS@172.18.26.22:6700) Frequency hopping disabled
2025-03-30 07:37:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:37:09 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:37:09 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:37:09 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:37:09 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:37:09 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:37:09 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:37:09 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 07:37:09 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 07:37:09 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 07:37:09 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:37:09 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:37:09 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=1856 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:37:09 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=1856 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:37:09 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=1856 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:37:09 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=1856 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:37:09 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=1856 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:37:09 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=1856 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:37:14 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 07:37:14 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 07:37:14 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:37:14 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:37:14 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:37:14 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:37:14 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:37:14 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 07:37:14 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:37:14 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 07:37:14 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 07:37:14 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 07:37:14 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 07:37:14 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 07:37:14 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:37:14 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:37:14 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 07:37:14 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 07:37:14 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 07:37:14 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 07:37:14 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 07:37:14 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 07:37:14 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:37:14 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 07:37:14 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:37:14 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 07:37:14 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 07:37:14 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 07:37:14 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 07:37:14 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 07:37:14 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:37:14 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 07:37:14 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:37:14 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 07:37:14 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 07:37:14 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 07:37:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 07:37:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 07:37:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 07:37:14 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 07:37:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 07:37:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 07:37:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 07:37:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 07:37:14 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 07:37:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:37:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:37:14 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 07:37:14 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 07:37:14 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 07:37:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:37:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:37:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:37:14 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 07:37:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 07:37:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:37:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:37:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:37:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:37:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:37:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:37:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:37:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:37:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:37:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:37:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:37:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:37:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:37:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:37:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:37:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:37:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:37:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:37:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:37:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:37:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:37:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:37:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:37:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:37:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:37:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:37:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:37:14 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-03-30 07:37:14 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-03-30 07:37:14 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-03-30 07:37:14 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-03-30 07:37:14 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-03-30 07:37:14 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-03-30 07:37:14 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-03-30 07:37:14 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-03-30 07:37:14 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-03-30 07:37:14 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-03-30 07:37:14 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 07:37:14 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 07:37:14 [DEBUG] fake_trx.py:317 (BTS@172.18.26.20:5700) Recv FAKE_CI cmd
2025-03-30 07:37:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:37:14 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:37:14 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:37:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:37:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:37:14 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:37:14 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:37:14 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 07:37:14 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 07:37:14 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.26.22:6700) Recv SETFH cmd
2025-03-30 07:37:14 [INFO] transceiver.py:237 (MS@172.18.26.22:6700) Frequency hopping configured: hsn=0, maio=1, ma_len=2
2025-03-30 07:37:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:37:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:37:15 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-03-30 07:37:15 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:37:15 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:37:15 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:37:15 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:37:15 [DEBUG] clck_gen.py:128 IND CLOCK 306
2025-03-30 07:37:16 [DEBUG] clck_gen.py:128 IND CLOCK 408
2025-03-30 07:37:16 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:37:16 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:37:16 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:37:16 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:37:16 [DEBUG] clck_gen.py:128 IND CLOCK 510
2025-03-30 07:37:17 [DEBUG] clck_gen.py:128 IND CLOCK 612
2025-03-30 07:37:17 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:37:17 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:37:17 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:37:17 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:37:17 [DEBUG] clck_gen.py:128 IND CLOCK 714
2025-03-30 07:37:18 [DEBUG] clck_gen.py:128 IND CLOCK 816
2025-03-30 07:37:18 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:37:18 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:37:18 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:37:18 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:37:18 [DEBUG] clck_gen.py:128 IND CLOCK 918
2025-03-30 07:37:18 [DEBUG] clck_gen.py:128 IND CLOCK 1020
2025-03-30 07:37:19 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:37:19 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:37:19 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:37:19 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:37:19 [DEBUG] clck_gen.py:128 IND CLOCK 1122
2025-03-30 07:37:19 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:37:19 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:37:19 [INFO] transceiver.py:241 (MS@172.18.26.22:6700) Frequency hopping disabled
2025-03-30 07:37:19 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:37:19 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:37:19 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:37:19 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:37:19 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:37:19 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:37:19 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:37:19 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:37:19 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 07:37:19 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 07:37:19 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 07:37:19 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=1200 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:37:19 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=1200 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:37:19 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=1200 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:37:19 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=1200 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:37:19 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=1200 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:37:19 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=1200 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:37:24 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 07:37:24 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 07:37:24 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:37:24 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:37:24 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:37:24 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:37:24 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:37:24 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 07:37:24 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:37:24 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 07:37:24 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 07:37:24 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 07:37:24 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 07:37:24 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 07:37:24 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:37:24 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:37:24 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 07:37:24 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 07:37:24 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 07:37:24 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 07:37:24 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 07:37:24 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 07:37:24 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:37:24 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:37:24 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 07:37:24 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 07:37:24 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 07:37:24 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 07:37:24 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 07:37:24 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 07:37:24 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:37:24 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:37:24 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 07:37:24 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 07:37:24 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 07:37:24 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 07:37:24 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 07:37:24 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 07:37:24 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 07:37:24 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 07:37:24 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 07:37:24 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 07:37:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 07:37:24 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:37:24 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 07:37:24 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 07:37:24 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:37:24 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:37:24 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 07:37:24 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 07:37:24 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 07:37:24 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 07:37:24 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:37:24 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:37:24 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:37:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 07:37:24 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:37:24 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:37:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:37:24 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:37:24 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:37:24 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:37:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:37:24 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:37:24 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:37:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:37:24 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:37:24 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:37:24 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:37:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:37:24 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:37:24 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:37:24 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:37:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:37:24 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:37:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:37:24 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:37:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:37:24 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:37:24 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:37:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:37:24 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:37:24 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-03-30 07:37:25 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-03-30 07:37:25 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-03-30 07:37:25 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-03-30 07:37:25 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-03-30 07:37:25 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-03-30 07:37:25 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-03-30 07:37:25 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-03-30 07:37:25 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-03-30 07:37:25 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-03-30 07:37:25 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 07:37:25 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 07:37:25 [DEBUG] fake_trx.py:317 (BTS@172.18.26.20:5700) Recv FAKE_CI cmd
2025-03-30 07:37:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:37:25 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:37:25 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:37:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:37:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:37:25 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:37:25 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:37:25 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 07:37:25 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 07:37:25 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-03-30 07:37:25 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:37:25 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:37:25 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:37:25 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:37:26 [DEBUG] clck_gen.py:128 IND CLOCK 306
2025-03-30 07:37:26 [DEBUG] clck_gen.py:128 IND CLOCK 408
2025-03-30 07:37:26 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:37:26 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:37:26 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:37:26 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:37:27 [DEBUG] clck_gen.py:128 IND CLOCK 510
2025-03-30 07:37:27 [DEBUG] clck_gen.py:128 IND CLOCK 612
2025-03-30 07:37:27 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:37:27 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:37:27 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:37:27 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:37:28 [DEBUG] clck_gen.py:128 IND CLOCK 714
2025-03-30 07:37:28 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.26.22:6700) Recv SETFH cmd
2025-03-30 07:37:28 [INFO] transceiver.py:237 (MS@172.18.26.22:6700) Frequency hopping configured: hsn=0, maio=1, ma_len=2
2025-03-30 07:37:28 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:37:28 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:37:28 [DEBUG] clck_gen.py:128 IND CLOCK 816
2025-03-30 07:37:28 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:37:28 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:37:28 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:37:28 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:37:29 [DEBUG] clck_gen.py:128 IND CLOCK 918
2025-03-30 07:37:29 [DEBUG] clck_gen.py:128 IND CLOCK 1020
2025-03-30 07:37:29 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:37:29 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:37:29 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:37:29 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:37:30 [DEBUG] clck_gen.py:128 IND CLOCK 1122
2025-03-30 07:37:30 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:37:30 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:37:30 [INFO] transceiver.py:241 (MS@172.18.26.22:6700) Frequency hopping disabled
2025-03-30 07:37:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:37:30 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:37:30 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:37:30 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:37:30 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:37:30 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:37:30 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:37:30 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:37:30 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:37:30 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 07:37:30 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 07:37:30 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 07:37:30 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=1205 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:37:30 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=1205 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:37:30 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=1205 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:37:30 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=1205 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:37:30 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=1205 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:37:30 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=1205 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:37:35 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 07:37:35 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 07:37:35 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:37:35 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:37:35 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:37:35 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:37:35 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:37:35 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 07:37:35 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:37:35 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 07:37:35 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 07:37:35 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 07:37:35 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 07:37:35 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 07:37:35 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:37:35 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:37:35 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 07:37:35 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 07:37:35 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 07:37:35 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 07:37:35 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 07:37:35 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 07:37:35 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:37:35 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:37:35 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 07:37:35 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 07:37:35 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 07:37:35 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 07:37:35 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 07:37:35 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 07:37:35 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:37:35 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:37:35 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 07:37:35 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 07:37:35 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 07:37:35 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 07:37:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 07:37:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 07:37:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 07:37:35 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 07:37:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 07:37:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 07:37:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 07:37:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:37:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 07:37:35 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 07:37:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:37:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:37:35 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 07:37:35 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 07:37:35 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 07:37:35 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 07:37:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:37:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:37:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:37:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 07:37:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:37:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:37:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:37:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:37:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:37:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:37:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:37:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:37:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:37:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:37:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:37:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:37:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:37:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:37:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:37:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:37:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:37:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:37:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:37:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:37:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:37:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:37:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:37:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:37:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:37:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:37:35 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-03-30 07:37:35 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-03-30 07:37:35 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-03-30 07:37:35 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-03-30 07:37:35 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-03-30 07:37:35 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-03-30 07:37:35 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-03-30 07:37:35 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-03-30 07:37:35 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-03-30 07:37:35 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-03-30 07:37:35 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=0 bl=148 pwr=0
2025-03-30 07:37:35 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=1 bl=148 pwr=0
2025-03-30 07:37:35 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=2 bl=148 pwr=0
2025-03-30 07:37:35 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=3 bl=148 pwr=0
2025-03-30 07:37:35 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=4 bl=148 pwr=0
2025-03-30 07:37:35 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=5 bl=148 pwr=0
2025-03-30 07:37:35 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=6 bl=148 pwr=0
2025-03-30 07:37:35 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=7 bl=148 pwr=0
2025-03-30 07:37:35 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 07:37:35 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 07:37:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:37:35 [DEBUG] fake_trx.py:317 (BTS@172.18.26.20:5700) Recv FAKE_CI cmd
2025-03-30 07:37:35 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:37:35 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:37:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:37:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:37:35 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:37:35 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:37:35 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 07:37:35 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 07:37:36 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-03-30 07:37:36 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:37:36 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:37:36 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:37:36 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:37:36 [DEBUG] clck_gen.py:128 IND CLOCK 306
2025-03-30 07:37:37 [DEBUG] clck_gen.py:128 IND CLOCK 408
2025-03-30 07:37:37 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:37:37 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:37:37 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:37:37 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:37:37 [DEBUG] clck_gen.py:128 IND CLOCK 510
2025-03-30 07:37:38 [DEBUG] clck_gen.py:128 IND CLOCK 612
2025-03-30 07:37:38 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:37:38 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:37:38 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:37:38 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:37:38 [DEBUG] clck_gen.py:128 IND CLOCK 714
2025-03-30 07:37:38 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:37:38 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:37:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:37:39 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:37:39 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:37:39 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:37:39 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:37:39 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:37:39 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:37:39 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:37:39 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:37:39 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 07:37:39 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 07:37:39 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 07:37:44 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 07:37:44 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 07:37:44 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:37:44 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:37:44 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:37:44 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:37:44 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:37:44 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 07:37:44 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:37:44 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 07:37:44 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 07:37:44 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 07:37:44 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 07:37:44 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 07:37:44 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:37:44 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:37:44 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 07:37:44 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 07:37:44 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 07:37:44 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 07:37:44 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 07:37:44 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 07:37:44 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:37:44 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 07:37:44 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:37:44 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 07:37:44 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 07:37:44 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 07:37:44 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 07:37:44 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 07:37:44 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:37:44 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 07:37:44 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:37:44 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 07:37:44 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 07:37:44 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 07:37:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 07:37:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 07:37:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 07:37:44 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 07:37:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 07:37:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 07:37:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 07:37:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 07:37:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:37:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:37:44 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 07:37:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:37:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:37:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:37:44 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 07:37:44 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 07:37:44 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 07:37:44 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 07:37:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:37:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:37:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:37:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 07:37:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:37:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:37:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:37:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:37:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:37:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:37:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:37:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:37:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:37:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:37:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:37:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:37:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:37:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:37:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:37:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:37:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:37:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:37:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:37:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:37:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:37:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:37:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:37:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:37:44 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-03-30 07:37:44 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-03-30 07:37:44 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-03-30 07:37:44 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-03-30 07:37:44 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-03-30 07:37:44 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-03-30 07:37:44 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-03-30 07:37:44 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-03-30 07:37:44 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-03-30 07:37:44 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-03-30 07:37:44 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=0 bl=148 pwr=0
2025-03-30 07:37:44 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=1 bl=148 pwr=0
2025-03-30 07:37:44 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=2 bl=148 pwr=0
2025-03-30 07:37:44 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=3 bl=148 pwr=0
2025-03-30 07:37:44 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=4 bl=148 pwr=0
2025-03-30 07:37:44 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=5 bl=148 pwr=0
2025-03-30 07:37:44 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=6 bl=148 pwr=0
2025-03-30 07:37:44 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=7 bl=148 pwr=0
2025-03-30 07:37:44 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 07:37:44 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 07:37:44 [DEBUG] fake_trx.py:317 (BTS@172.18.26.20:5700) Recv FAKE_CI cmd
2025-03-30 07:37:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:37:44 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:37:44 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:37:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:37:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:37:44 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:37:44 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:37:44 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 07:37:44 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 07:37:44 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-03-30 07:37:45 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:37:45 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:37:45 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:37:45 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:37:45 [DEBUG] clck_gen.py:128 IND CLOCK 306
2025-03-30 07:37:45 [DEBUG] clck_gen.py:128 IND CLOCK 408
2025-03-30 07:37:46 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:37:46 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:37:46 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:37:46 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:37:46 [DEBUG] clck_gen.py:128 IND CLOCK 510
2025-03-30 07:37:46 [DEBUG] clck_gen.py:128 IND CLOCK 612
2025-03-30 07:37:47 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:37:47 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:37:47 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:37:47 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:37:47 [DEBUG] clck_gen.py:128 IND CLOCK 714
2025-03-30 07:37:47 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:37:47 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:37:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:37:47 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:37:47 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:37:47 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:37:47 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:37:47 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:37:47 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:37:47 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:37:47 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:37:47 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 07:37:47 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 07:37:47 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 07:37:52 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 07:37:52 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 07:37:52 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:37:52 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:37:52 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:37:52 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:37:52 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:37:52 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 07:37:52 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:37:52 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 07:37:52 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 07:37:52 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 07:37:52 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 07:37:52 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 07:37:52 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:37:52 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:37:52 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 07:37:52 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 07:37:52 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 07:37:52 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 07:37:52 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 07:37:52 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 07:37:52 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:37:52 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:37:52 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 07:37:52 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 07:37:52 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 07:37:52 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 07:37:52 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 07:37:52 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 07:37:52 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:37:52 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:37:52 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 07:37:52 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 07:37:52 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 07:37:52 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 07:37:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 07:37:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 07:37:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 07:37:52 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 07:37:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 07:37:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 07:37:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 07:37:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 07:37:52 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 07:37:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:37:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:37:52 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 07:37:52 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 07:37:52 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 07:37:52 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 07:37:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:37:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:37:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:37:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 07:37:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:37:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:37:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:37:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:37:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:37:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:37:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:37:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:37:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:37:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:37:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:37:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:37:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:37:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:37:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:37:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:37:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:37:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:37:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:37:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:37:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:37:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:37:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:37:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:37:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:37:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:37:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:37:52 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-03-30 07:37:53 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-03-30 07:37:53 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-03-30 07:37:53 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-03-30 07:37:53 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-03-30 07:37:53 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-03-30 07:37:53 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-03-30 07:37:53 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-03-30 07:37:53 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-03-30 07:37:53 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-03-30 07:37:53 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=0 bl=148 pwr=0
2025-03-30 07:37:53 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=1 bl=148 pwr=0
2025-03-30 07:37:53 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=2 bl=148 pwr=0
2025-03-30 07:37:53 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=3 bl=148 pwr=0
2025-03-30 07:37:53 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=4 bl=148 pwr=0
2025-03-30 07:37:53 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=5 bl=148 pwr=0
2025-03-30 07:37:53 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=6 bl=148 pwr=0
2025-03-30 07:37:53 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=7 bl=148 pwr=0
2025-03-30 07:37:53 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 07:37:53 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 07:37:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:37:53 [DEBUG] fake_trx.py:317 (BTS@172.18.26.20:5700) Recv FAKE_CI cmd
2025-03-30 07:37:53 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:37:53 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:37:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:37:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:37:53 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:37:53 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:37:53 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 07:37:53 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 07:37:53 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:37:53 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:37:53 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:37:53 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:37:53 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:37:53 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:37:53 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:37:53 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:37:53 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:37:53 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:37:53 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 07:37:53 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 07:37:53 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 07:37:58 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 07:37:58 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 07:37:58 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:37:58 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:37:58 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:37:58 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:37:58 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:37:58 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 07:37:58 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:37:58 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 07:37:58 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 07:37:58 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 07:37:58 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 07:37:58 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 07:37:58 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:37:58 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:37:58 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 07:37:58 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 07:37:58 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 07:37:58 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 07:37:58 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 07:37:58 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 07:37:58 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:37:58 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:37:58 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 07:37:58 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 07:37:58 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 07:37:58 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 07:37:58 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 07:37:58 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 07:37:58 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:37:58 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:37:58 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 07:37:58 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 07:37:58 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 07:37:58 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 07:37:58 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 07:37:58 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 07:37:58 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 07:37:58 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 07:37:58 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 07:37:58 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 07:37:58 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 07:37:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 07:37:58 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:37:58 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:37:58 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 07:37:58 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:37:58 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:37:58 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 07:37:58 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 07:37:58 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 07:37:58 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 07:37:58 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:37:58 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:37:58 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:37:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 07:37:58 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:37:58 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:37:58 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:37:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:37:58 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:37:58 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:37:58 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:37:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:37:58 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:37:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:37:58 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:37:58 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:37:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:37:58 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:37:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:37:58 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:37:58 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:37:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:37:58 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:37:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:37:58 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:37:58 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:37:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:37:58 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:37:58 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:37:58 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-03-30 07:37:58 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-03-30 07:37:59 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-03-30 07:37:59 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-03-30 07:37:59 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-03-30 07:37:59 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-03-30 07:37:59 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-03-30 07:37:59 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-03-30 07:37:59 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-03-30 07:37:59 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-03-30 07:37:59 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=0 bl=148 pwr=0
2025-03-30 07:37:59 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=1 bl=148 pwr=0
2025-03-30 07:37:59 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=2 bl=148 pwr=0
2025-03-30 07:37:59 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=3 bl=148 pwr=0
2025-03-30 07:37:59 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=4 bl=148 pwr=0
2025-03-30 07:37:59 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=5 bl=148 pwr=0
2025-03-30 07:37:59 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=6 bl=148 pwr=0
2025-03-30 07:37:59 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=7 bl=148 pwr=0
2025-03-30 07:37:59 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 07:37:59 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 07:37:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:37:59 [DEBUG] fake_trx.py:317 (BTS@172.18.26.20:5700) Recv FAKE_CI cmd
2025-03-30 07:37:59 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:37:59 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:37:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:37:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:37:59 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:37:59 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:37:59 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 07:37:59 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 07:37:59 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:37:59 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:37:59 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:37:59 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:37:59 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:37:59 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:37:59 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:37:59 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:37:59 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:37:59 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 07:37:59 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 07:37:59 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 07:37:59 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:38:04 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 07:38:04 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 07:38:04 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:38:04 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:38:04 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:38:04 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:38:04 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:38:04 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 07:38:04 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:38:04 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 07:38:04 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 07:38:04 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 07:38:04 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 07:38:04 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 07:38:04 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:38:04 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:38:04 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 07:38:04 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 07:38:04 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 07:38:04 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 07:38:04 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 07:38:04 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 07:38:04 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:38:04 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:38:04 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 07:38:04 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 07:38:04 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 07:38:04 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 07:38:04 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 07:38:04 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 07:38:04 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:38:04 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:38:04 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 07:38:04 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 07:38:04 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 07:38:04 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 07:38:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 07:38:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 07:38:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 07:38:04 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 07:38:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 07:38:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 07:38:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 07:38:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:38:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 07:38:04 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 07:38:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:38:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:38:04 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 07:38:04 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 07:38:04 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 07:38:04 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 07:38:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:38:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:38:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:38:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 07:38:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:38:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:38:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:38:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:38:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:38:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:38:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:38:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:38:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:38:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:38:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:38:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:38:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:38:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:38:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:38:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:38:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:38:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:38:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:38:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:38:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:38:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:38:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:38:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:38:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:38:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:38:04 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-03-30 07:38:04 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-03-30 07:38:04 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-03-30 07:38:04 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-03-30 07:38:04 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-03-30 07:38:04 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-03-30 07:38:04 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-03-30 07:38:04 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-03-30 07:38:04 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-03-30 07:38:04 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-03-30 07:38:04 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 07:38:04 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 07:38:04 [DEBUG] fake_trx.py:317 (BTS@172.18.26.20:5700) Recv FAKE_CI cmd
2025-03-30 07:38:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:38:04 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:38:04 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:38:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:38:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:38:04 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:38:04 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:38:04 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 07:38:04 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 07:38:05 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-03-30 07:38:05 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:38:05 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:38:05 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:38:05 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:38:05 [DEBUG] clck_gen.py:128 IND CLOCK 306
2025-03-30 07:38:06 [DEBUG] clck_gen.py:128 IND CLOCK 408
2025-03-30 07:38:06 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:38:06 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:38:06 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:38:06 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:38:06 [DEBUG] clck_gen.py:128 IND CLOCK 510
2025-03-30 07:38:07 [DEBUG] clck_gen.py:128 IND CLOCK 612
2025-03-30 07:38:07 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:38:07 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:38:07 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:38:07 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:38:07 [DEBUG] clck_gen.py:128 IND CLOCK 714
2025-03-30 07:38:08 [DEBUG] clck_gen.py:128 IND CLOCK 816
2025-03-30 07:38:08 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:38:08 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:38:08 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:38:08 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:38:08 [DEBUG] clck_gen.py:128 IND CLOCK 918
2025-03-30 07:38:09 [DEBUG] clck_gen.py:128 IND CLOCK 1020
2025-03-30 07:38:09 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:38:09 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:38:09 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:38:09 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:38:09 [DEBUG] clck_gen.py:128 IND CLOCK 1122
2025-03-30 07:38:09 [DEBUG] clck_gen.py:128 IND CLOCK 1224
2025-03-30 07:38:10 [DEBUG] clck_gen.py:128 IND CLOCK 1326
2025-03-30 07:38:10 [DEBUG] clck_gen.py:128 IND CLOCK 1428
2025-03-30 07:38:11 [DEBUG] clck_gen.py:128 IND CLOCK 1530
2025-03-30 07:38:11 [DEBUG] clck_gen.py:128 IND CLOCK 1632
2025-03-30 07:38:12 [DEBUG] clck_gen.py:128 IND CLOCK 1734
2025-03-30 07:38:12 [DEBUG] clck_gen.py:128 IND CLOCK 1836
2025-03-30 07:38:13 [DEBUG] clck_gen.py:128 IND CLOCK 1938
2025-03-30 07:38:13 [DEBUG] clck_gen.py:128 IND CLOCK 2040
2025-03-30 07:38:14 [DEBUG] clck_gen.py:128 IND CLOCK 2142
2025-03-30 07:38:14 [DEBUG] clck_gen.py:128 IND CLOCK 2244
2025-03-30 07:38:15 [DEBUG] clck_gen.py:128 IND CLOCK 2346
2025-03-30 07:38:15 [DEBUG] clck_gen.py:128 IND CLOCK 2448
2025-03-30 07:38:16 [DEBUG] clck_gen.py:128 IND CLOCK 2550
2025-03-30 07:38:16 [DEBUG] clck_gen.py:128 IND CLOCK 2652
2025-03-30 07:38:17 [DEBUG] clck_gen.py:128 IND CLOCK 2754
2025-03-30 07:38:17 [DEBUG] clck_gen.py:128 IND CLOCK 2856
2025-03-30 07:38:17 [DEBUG] clck_gen.py:128 IND CLOCK 2958
2025-03-30 07:38:18 [DEBUG] clck_gen.py:128 IND CLOCK 3060
2025-03-30 07:38:18 [DEBUG] clck_gen.py:128 IND CLOCK 3162
2025-03-30 07:38:19 [DEBUG] clck_gen.py:128 IND CLOCK 3264
2025-03-30 07:38:19 [DEBUG] clck_gen.py:128 IND CLOCK 3366
2025-03-30 07:38:20 [DEBUG] clck_gen.py:128 IND CLOCK 3468
2025-03-30 07:38:20 [DEBUG] clck_gen.py:128 IND CLOCK 3570
2025-03-30 07:38:21 [DEBUG] clck_gen.py:128 IND CLOCK 3672
2025-03-30 07:38:21 [DEBUG] clck_gen.py:128 IND CLOCK 3774
2025-03-30 07:38:22 [DEBUG] clck_gen.py:128 IND CLOCK 3876
2025-03-30 07:38:22 [DEBUG] clck_gen.py:128 IND CLOCK 3978
2025-03-30 07:38:23 [DEBUG] clck_gen.py:128 IND CLOCK 4080
2025-03-30 07:38:23 [DEBUG] clck_gen.py:128 IND CLOCK 4182
2025-03-30 07:38:24 [DEBUG] clck_gen.py:128 IND CLOCK 4284
2025-03-30 07:38:24 [DEBUG] clck_gen.py:128 IND CLOCK 4386
2025-03-30 07:38:25 [DEBUG] clck_gen.py:128 IND CLOCK 4488
2025-03-30 07:38:25 [DEBUG] clck_gen.py:128 IND CLOCK 4590
2025-03-30 07:38:25 [DEBUG] clck_gen.py:128 IND CLOCK 4692
2025-03-30 07:38:26 [DEBUG] clck_gen.py:128 IND CLOCK 4794
2025-03-30 07:38:26 [DEBUG] clck_gen.py:128 IND CLOCK 4896
2025-03-30 07:38:27 [DEBUG] clck_gen.py:128 IND CLOCK 4998
2025-03-30 07:38:27 [DEBUG] clck_gen.py:128 IND CLOCK 5100
2025-03-30 07:38:28 [DEBUG] clck_gen.py:128 IND CLOCK 5202
2025-03-30 07:38:28 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:38:28 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:38:28 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:38:28 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:38:28 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:38:28 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:38:28 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:38:28 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:38:28 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:38:28 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:38:28 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 07:38:28 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 07:38:28 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 07:38:33 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 07:38:33 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 07:38:33 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:38:33 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:38:33 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:38:33 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:38:33 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:38:33 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 07:38:33 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:38:33 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 07:38:33 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 07:38:33 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 07:38:33 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 07:38:33 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 07:38:33 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:38:33 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:38:33 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 07:38:33 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 07:38:33 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 07:38:33 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 07:38:33 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 07:38:33 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 07:38:33 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:38:33 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 07:38:33 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:38:33 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 07:38:33 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 07:38:33 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 07:38:33 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 07:38:33 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 07:38:33 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:38:33 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:38:33 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 07:38:33 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 07:38:33 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 07:38:33 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 07:38:33 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 07:38:33 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 07:38:33 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 07:38:33 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 07:38:33 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 07:38:33 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 07:38:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 07:38:33 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:38:33 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 07:38:33 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 07:38:33 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:38:33 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:38:33 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 07:38:33 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 07:38:33 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 07:38:33 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 07:38:33 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:38:33 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:38:33 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:38:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 07:38:33 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:38:33 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:38:33 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:38:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:38:33 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:38:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:38:33 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:38:33 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:38:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:38:33 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:38:33 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:38:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:38:33 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:38:33 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:38:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:38:33 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:38:33 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:38:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:38:33 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:38:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:38:33 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:38:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:38:33 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:38:33 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:38:33 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:38:33 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:38:33 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-03-30 07:38:33 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-03-30 07:38:33 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-03-30 07:38:33 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-03-30 07:38:33 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-03-30 07:38:33 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-03-30 07:38:33 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-03-30 07:38:33 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-03-30 07:38:33 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-03-30 07:38:33 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-03-30 07:38:33 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=0 bl=148 pwr=0
2025-03-30 07:38:33 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=1 bl=148 pwr=0
2025-03-30 07:38:33 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=2 bl=148 pwr=0
2025-03-30 07:38:33 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=3 bl=148 pwr=0
2025-03-30 07:38:33 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=4 bl=148 pwr=0
2025-03-30 07:38:33 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=5 bl=148 pwr=0
2025-03-30 07:38:33 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=6 bl=148 pwr=0
2025-03-30 07:38:33 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=7 bl=148 pwr=0
2025-03-30 07:38:33 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 07:38:33 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 07:38:33 [DEBUG] fake_trx.py:317 (BTS@172.18.26.20:5700) Recv FAKE_CI cmd
2025-03-30 07:38:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:38:33 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:38:33 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:38:33 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:38:33 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:38:33 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:38:33 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:38:33 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 07:38:33 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 07:38:34 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-03-30 07:38:34 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:38:34 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:38:34 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:38:34 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:38:34 [DEBUG] clck_gen.py:128 IND CLOCK 306
2025-03-30 07:38:35 [DEBUG] clck_gen.py:128 IND CLOCK 408
2025-03-30 07:38:35 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:38:35 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:38:35 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:38:35 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:38:35 [DEBUG] clck_gen.py:128 IND CLOCK 510
2025-03-30 07:38:36 [DEBUG] clck_gen.py:128 IND CLOCK 612
2025-03-30 07:38:36 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:38:36 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:38:36 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:38:36 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:38:36 [DEBUG] clck_gen.py:128 IND CLOCK 714
2025-03-30 07:38:37 [DEBUG] clck_gen.py:128 IND CLOCK 816
2025-03-30 07:38:37 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:38:37 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:38:37 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:38:37 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:38:37 [DEBUG] clck_gen.py:128 IND CLOCK 918
2025-03-30 07:38:38 [DEBUG] clck_gen.py:128 IND CLOCK 1020
2025-03-30 07:38:38 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:38:38 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:38:38 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:38:38 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:38:38 [DEBUG] clck_gen.py:128 IND CLOCK 1122
2025-03-30 07:38:39 [DEBUG] clck_gen.py:128 IND CLOCK 1224
2025-03-30 07:38:39 [DEBUG] clck_gen.py:128 IND CLOCK 1326
2025-03-30 07:38:40 [DEBUG] clck_gen.py:128 IND CLOCK 1428
2025-03-30 07:38:40 [DEBUG] clck_gen.py:128 IND CLOCK 1530
2025-03-30 07:38:40 [DEBUG] clck_gen.py:128 IND CLOCK 1632
2025-03-30 07:38:41 [DEBUG] clck_gen.py:128 IND CLOCK 1734
2025-03-30 07:38:41 [DEBUG] clck_gen.py:128 IND CLOCK 1836
2025-03-30 07:38:42 [DEBUG] clck_gen.py:128 IND CLOCK 1938
2025-03-30 07:38:42 [DEBUG] clck_gen.py:128 IND CLOCK 2040
2025-03-30 07:38:43 [DEBUG] clck_gen.py:128 IND CLOCK 2142
2025-03-30 07:38:43 [DEBUG] clck_gen.py:128 IND CLOCK 2244
2025-03-30 07:38:44 [DEBUG] clck_gen.py:128 IND CLOCK 2346
2025-03-30 07:38:44 [DEBUG] clck_gen.py:128 IND CLOCK 2448
2025-03-30 07:38:45 [DEBUG] clck_gen.py:128 IND CLOCK 2550
2025-03-30 07:38:45 [DEBUG] clck_gen.py:128 IND CLOCK 2652
2025-03-30 07:38:46 [DEBUG] clck_gen.py:128 IND CLOCK 2754
2025-03-30 07:38:46 [DEBUG] clck_gen.py:128 IND CLOCK 2856
2025-03-30 07:38:47 [DEBUG] clck_gen.py:128 IND CLOCK 2958
2025-03-30 07:38:47 [DEBUG] clck_gen.py:128 IND CLOCK 3060
2025-03-30 07:38:48 [DEBUG] clck_gen.py:128 IND CLOCK 3162
2025-03-30 07:38:48 [DEBUG] clck_gen.py:128 IND CLOCK 3264
2025-03-30 07:38:48 [DEBUG] clck_gen.py:128 IND CLOCK 3366
2025-03-30 07:38:49 [DEBUG] clck_gen.py:128 IND CLOCK 3468
2025-03-30 07:38:49 [DEBUG] clck_gen.py:128 IND CLOCK 3570
2025-03-30 07:38:50 [DEBUG] clck_gen.py:128 IND CLOCK 3672
2025-03-30 07:38:50 [DEBUG] clck_gen.py:128 IND CLOCK 3774
2025-03-30 07:38:51 [DEBUG] clck_gen.py:128 IND CLOCK 3876
2025-03-30 07:38:51 [DEBUG] clck_gen.py:128 IND CLOCK 3978
2025-03-30 07:38:52 [DEBUG] clck_gen.py:128 IND CLOCK 4080
2025-03-30 07:38:52 [DEBUG] clck_gen.py:128 IND CLOCK 4182
2025-03-30 07:38:53 [DEBUG] clck_gen.py:128 IND CLOCK 4284
2025-03-30 07:38:53 [DEBUG] clck_gen.py:128 IND CLOCK 4386
2025-03-30 07:38:54 [DEBUG] clck_gen.py:128 IND CLOCK 4488
2025-03-30 07:38:54 [DEBUG] clck_gen.py:128 IND CLOCK 4590
2025-03-30 07:38:55 [DEBUG] clck_gen.py:128 IND CLOCK 4692
2025-03-30 07:38:55 [DEBUG] clck_gen.py:128 IND CLOCK 4794
2025-03-30 07:38:56 [DEBUG] clck_gen.py:128 IND CLOCK 4896
2025-03-30 07:38:56 [DEBUG] clck_gen.py:128 IND CLOCK 4998
2025-03-30 07:38:56 [DEBUG] clck_gen.py:128 IND CLOCK 5100
2025-03-30 07:38:57 [DEBUG] clck_gen.py:128 IND CLOCK 5202
2025-03-30 07:38:57 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:38:57 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:38:57 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:38:57 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:38:57 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:38:57 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:38:57 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:38:57 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:38:57 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:38:57 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:38:57 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 07:38:57 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 07:38:57 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 07:38:57 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=5211 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:38:57 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=5211 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:38:57 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=5211 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:38:57 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=5211 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:38:57 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=5211 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:38:57 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=5211 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:38:57 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=5211 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:39:02 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 07:39:02 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 07:39:02 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:39:02 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:39:02 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:39:02 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:39:02 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:39:02 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 07:39:02 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:39:02 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 07:39:02 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 07:39:02 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 07:39:02 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 07:39:02 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 07:39:02 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:39:02 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:39:02 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 07:39:02 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 07:39:02 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 07:39:02 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 07:39:02 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 07:39:02 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 07:39:02 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:39:02 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:39:02 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 07:39:02 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 07:39:02 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 07:39:02 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 07:39:02 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 07:39:02 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 07:39:02 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:39:02 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:39:02 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 07:39:02 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 07:39:02 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 07:39:02 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 07:39:02 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 07:39:02 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 07:39:02 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 07:39:02 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 07:39:02 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 07:39:02 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 07:39:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 07:39:02 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:39:02 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 07:39:02 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 07:39:02 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:39:02 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:39:02 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 07:39:02 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 07:39:02 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 07:39:02 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 07:39:02 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:39:02 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:39:02 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:39:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 07:39:02 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:39:02 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:39:02 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:39:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:39:02 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:39:02 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:39:02 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:39:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:39:02 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:39:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:39:02 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:39:02 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:39:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:39:02 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:39:02 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:39:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:39:02 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:39:02 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:39:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:39:02 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:39:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:39:02 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:39:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:39:02 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:39:02 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:39:02 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:39:02 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-03-30 07:39:02 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-03-30 07:39:02 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-03-30 07:39:02 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-03-30 07:39:02 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-03-30 07:39:02 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-03-30 07:39:02 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-03-30 07:39:02 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-03-30 07:39:02 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-03-30 07:39:02 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-03-30 07:39:03 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 07:39:03 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 07:39:03 [DEBUG] fake_trx.py:317 (BTS@172.18.26.20:5700) Recv FAKE_CI cmd
2025-03-30 07:39:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:39:03 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:39:03 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:39:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:39:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:39:03 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:39:03 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:39:03 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 07:39:03 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 07:39:03 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-03-30 07:39:03 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:39:03 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:39:03 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:39:03 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:39:03 [DEBUG] clck_gen.py:128 IND CLOCK 306
2025-03-30 07:39:04 [DEBUG] clck_gen.py:128 IND CLOCK 408
2025-03-30 07:39:04 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:39:04 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:39:04 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:39:04 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:39:04 [DEBUG] clck_gen.py:128 IND CLOCK 510
2025-03-30 07:39:05 [DEBUG] clck_gen.py:128 IND CLOCK 612
2025-03-30 07:39:05 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:39:05 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:39:05 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:39:05 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:39:05 [DEBUG] clck_gen.py:128 IND CLOCK 714
2025-03-30 07:39:06 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.26.22:6700) Recv SETFH cmd
2025-03-30 07:39:06 [INFO] transceiver.py:237 (MS@172.18.26.22:6700) Frequency hopping configured: hsn=0, maio=1, ma_len=2
2025-03-30 07:39:06 [DEBUG] fake_trx.py:317 (BTS@172.18.26.20:5700) Recv FAKE_CI cmd
2025-03-30 07:39:06 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:39:06 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:39:06 [DEBUG] clck_gen.py:128 IND CLOCK 816
2025-03-30 07:39:06 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:39:06 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:39:06 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:39:06 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:39:06 [DEBUG] clck_gen.py:128 IND CLOCK 918
2025-03-30 07:39:07 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:39:07 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:39:07 [INFO] transceiver.py:241 (MS@172.18.26.22:6700) Frequency hopping disabled
2025-03-30 07:39:07 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:39:07 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:39:07 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:39:07 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:39:07 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:39:07 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:39:07 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:39:07 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:39:07 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 07:39:07 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 07:39:07 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 07:39:12 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 07:39:12 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 07:39:12 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:39:12 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:39:12 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:39:12 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:39:12 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:39:12 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 07:39:12 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:39:12 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 07:39:12 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 07:39:12 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 07:39:12 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 07:39:12 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 07:39:12 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:39:12 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:39:12 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 07:39:12 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 07:39:12 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 07:39:12 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 07:39:12 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 07:39:12 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 07:39:12 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:39:12 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:39:12 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 07:39:12 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 07:39:12 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 07:39:12 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 07:39:12 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 07:39:12 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 07:39:12 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:39:12 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:39:12 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 07:39:12 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 07:39:12 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 07:39:12 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 07:39:12 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 07:39:12 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 07:39:12 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 07:39:12 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 07:39:12 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 07:39:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 07:39:12 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 07:39:12 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 07:39:12 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 07:39:12 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:39:12 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:39:12 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 07:39:12 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 07:39:12 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 07:39:12 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 07:39:12 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:39:12 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:39:12 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:39:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 07:39:12 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:39:12 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:39:12 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:39:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:39:12 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:39:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:39:12 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:39:12 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:39:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:39:12 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:39:12 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:39:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:39:12 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:39:12 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:39:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:39:12 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:39:12 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:39:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:39:12 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:39:12 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:39:12 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:39:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:39:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:39:12 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:39:12 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:39:12 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:39:12 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:39:12 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-03-30 07:39:12 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-03-30 07:39:12 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=107): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-03-30 07:39:12 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=107): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-03-30 07:39:12 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=107): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-03-30 07:39:12 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=107): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-03-30 07:39:12 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=107): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-03-30 07:39:12 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=107): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-03-30 07:39:12 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=107): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-03-30 07:39:12 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=107): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-03-30 07:39:12 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=107): ver=1 fn=105 tn=0 bl=148 pwr=0
2025-03-30 07:39:12 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=107): ver=1 fn=105 tn=1 bl=148 pwr=0
2025-03-30 07:39:12 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=107): ver=1 fn=105 tn=2 bl=148 pwr=0
2025-03-30 07:39:12 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=107): ver=1 fn=105 tn=3 bl=148 pwr=0
2025-03-30 07:39:12 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=107): ver=1 fn=105 tn=4 bl=148 pwr=0
2025-03-30 07:39:12 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=107): ver=1 fn=105 tn=5 bl=148 pwr=0
2025-03-30 07:39:12 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=107): ver=1 fn=105 tn=6 bl=148 pwr=0
2025-03-30 07:39:12 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=107): ver=1 fn=105 tn=7 bl=148 pwr=0
2025-03-30 07:39:12 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=107): ver=1 fn=106 tn=0 bl=148 pwr=0
2025-03-30 07:39:12 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=107): ver=1 fn=106 tn=1 bl=148 pwr=0
2025-03-30 07:39:12 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=107): ver=1 fn=106 tn=2 bl=148 pwr=0
2025-03-30 07:39:12 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=107): ver=1 fn=106 tn=3 bl=148 pwr=0
2025-03-30 07:39:12 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=107): ver=1 fn=106 tn=4 bl=148 pwr=0
2025-03-30 07:39:12 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=107): ver=1 fn=106 tn=5 bl=148 pwr=0
2025-03-30 07:39:12 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=107): ver=1 fn=106 tn=6 bl=148 pwr=0
2025-03-30 07:39:12 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=107): ver=1 fn=106 tn=7 bl=148 pwr=0
2025-03-30 07:39:12 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 07:39:12 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 07:39:12 [DEBUG] fake_trx.py:317 (BTS@172.18.26.20:5700) Recv FAKE_CI cmd
2025-03-30 07:39:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:39:12 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:39:12 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:39:12 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:39:12 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:39:12 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:39:12 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:39:12 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:39:12 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 07:39:12 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 07:39:12 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 07:39:12 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:39:17 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 07:39:17 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 07:39:17 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:39:17 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:39:17 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:39:17 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:39:17 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:39:17 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 07:39:17 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:39:17 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 07:39:17 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 07:39:17 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 07:39:17 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 07:39:17 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 07:39:17 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:39:17 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:39:17 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 07:39:17 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 07:39:17 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 07:39:17 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 07:39:17 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 07:39:17 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 07:39:17 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:39:17 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:39:17 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 07:39:17 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 07:39:17 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 07:39:17 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 07:39:17 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 07:39:17 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 07:39:17 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:39:17 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:39:17 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 07:39:17 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 07:39:17 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 07:39:17 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 07:39:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 07:39:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 07:39:17 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 07:39:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 07:39:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 07:39:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 07:39:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 07:39:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:39:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 07:39:17 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 07:39:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:39:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:39:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:39:17 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 07:39:17 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 07:39:17 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 07:39:17 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 07:39:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:39:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:39:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:39:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 07:39:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:39:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:39:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:39:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:39:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:39:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:39:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:39:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:39:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:39:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:39:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:39:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:39:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:39:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:39:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:39:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:39:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:39:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:39:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:39:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:39:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:39:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:39:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:39:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:39:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:39:17 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-03-30 07:39:18 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-03-30 07:39:18 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=107): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-03-30 07:39:18 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=107): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-03-30 07:39:18 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=107): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-03-30 07:39:18 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=107): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-03-30 07:39:18 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=107): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-03-30 07:39:18 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=107): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-03-30 07:39:18 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=107): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-03-30 07:39:18 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=107): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-03-30 07:39:18 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=107): ver=1 fn=105 tn=0 bl=148 pwr=0
2025-03-30 07:39:18 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=107): ver=1 fn=105 tn=1 bl=148 pwr=0
2025-03-30 07:39:18 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=107): ver=1 fn=105 tn=2 bl=148 pwr=0
2025-03-30 07:39:18 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=107): ver=1 fn=105 tn=3 bl=148 pwr=0
2025-03-30 07:39:18 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=107): ver=1 fn=105 tn=4 bl=148 pwr=0
2025-03-30 07:39:18 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=107): ver=1 fn=105 tn=5 bl=148 pwr=0
2025-03-30 07:39:18 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=107): ver=1 fn=105 tn=6 bl=148 pwr=0
2025-03-30 07:39:18 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=107): ver=1 fn=105 tn=7 bl=148 pwr=0
2025-03-30 07:39:18 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=107): ver=1 fn=106 tn=0 bl=148 pwr=0
2025-03-30 07:39:18 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=107): ver=1 fn=106 tn=1 bl=148 pwr=0
2025-03-30 07:39:18 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=107): ver=1 fn=106 tn=2 bl=148 pwr=0
2025-03-30 07:39:18 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=107): ver=1 fn=106 tn=3 bl=148 pwr=0
2025-03-30 07:39:18 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=107): ver=1 fn=106 tn=4 bl=148 pwr=0
2025-03-30 07:39:18 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=107): ver=1 fn=106 tn=5 bl=148 pwr=0
2025-03-30 07:39:18 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=107): ver=1 fn=106 tn=6 bl=148 pwr=0
2025-03-30 07:39:18 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=107): ver=1 fn=106 tn=7 bl=148 pwr=0
2025-03-30 07:39:18 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 07:39:18 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 07:39:18 [DEBUG] fake_trx.py:317 (BTS@172.18.26.20:5700) Recv FAKE_CI cmd
2025-03-30 07:39:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:39:18 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-03-30 07:39:18 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:39:18 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:39:18 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:39:18 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:39:19 [DEBUG] clck_gen.py:128 IND CLOCK 306
2025-03-30 07:39:19 [DEBUG] clck_gen.py:128 IND CLOCK 408
2025-03-30 07:39:19 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:39:19 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:39:19 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:39:19 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:39:20 [DEBUG] clck_gen.py:128 IND CLOCK 510
2025-03-30 07:39:20 [DEBUG] clck_gen.py:128 IND CLOCK 612
2025-03-30 07:39:20 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:39:20 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:39:20 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:39:20 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:39:21 [DEBUG] clck_gen.py:128 IND CLOCK 714
2025-03-30 07:39:21 [DEBUG] clck_gen.py:128 IND CLOCK 816
2025-03-30 07:39:21 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:39:21 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:39:21 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:39:21 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:39:21 [DEBUG] clck_gen.py:128 IND CLOCK 918
2025-03-30 07:39:22 [DEBUG] clck_gen.py:128 IND CLOCK 1020
2025-03-30 07:39:22 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:39:22 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:39:22 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:39:22 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:39:22 [DEBUG] clck_gen.py:128 IND CLOCK 1122
2025-03-30 07:39:23 [DEBUG] clck_gen.py:128 IND CLOCK 1224
2025-03-30 07:39:23 [DEBUG] clck_gen.py:128 IND CLOCK 1326
2025-03-30 07:39:24 [DEBUG] clck_gen.py:128 IND CLOCK 1428
2025-03-30 07:39:24 [DEBUG] clck_gen.py:128 IND CLOCK 1530
2025-03-30 07:39:25 [DEBUG] clck_gen.py:128 IND CLOCK 1632
2025-03-30 07:39:25 [DEBUG] clck_gen.py:128 IND CLOCK 1734
2025-03-30 07:39:26 [DEBUG] clck_gen.py:128 IND CLOCK 1836
2025-03-30 07:39:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:39:26 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:39:26 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:39:26 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:39:26 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:39:26 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:39:26 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:39:26 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:39:26 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:39:26 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 07:39:26 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 07:39:26 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 07:39:26 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=1853 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:39:26 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=1853 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:39:26 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=1853 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:39:26 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=1853 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:39:26 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=1853 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:39:26 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=1853 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:39:26 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=1854 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:39:26 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=1854 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:39:26 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=1854 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:39:26 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=1854 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:39:26 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=1854 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:39:26 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=1854 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:39:26 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=1854 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:39:26 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=1854 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:39:26 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=1855 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:39:26 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=1855 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:39:26 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=1855 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:39:26 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=1855 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:39:26 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=1855 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:39:26 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=1855 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:39:26 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=1855 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:39:26 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=1855 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:39:31 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 07:39:31 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 07:39:31 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:39:31 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:39:31 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:39:31 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:39:31 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:39:31 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 07:39:31 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:39:31 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 07:39:31 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 07:39:31 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 07:39:31 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 07:39:31 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 07:39:31 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:39:31 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:39:31 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 07:39:31 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 07:39:31 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 07:39:31 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 07:39:31 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 07:39:31 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 07:39:31 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:39:31 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:39:31 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 07:39:31 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 07:39:31 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 07:39:31 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 07:39:31 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 07:39:31 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 07:39:31 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:39:31 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:39:31 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 07:39:31 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 07:39:31 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 07:39:31 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 07:39:31 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 07:39:31 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 07:39:31 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 07:39:31 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 07:39:31 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 07:39:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 07:39:31 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 07:39:31 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 07:39:31 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 07:39:31 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:39:31 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:39:31 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 07:39:31 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 07:39:31 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 07:39:31 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 07:39:31 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:39:31 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:39:31 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:39:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 07:39:31 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:39:31 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:39:31 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:39:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:39:31 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:39:31 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:39:31 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:39:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:39:31 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:39:31 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:39:31 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:39:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:39:31 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:39:31 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:39:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:39:31 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:39:31 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:39:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:39:31 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:39:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:39:31 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:39:31 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:39:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:39:31 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:39:31 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:39:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:39:31 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:39:31 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-03-30 07:39:31 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-03-30 07:39:31 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-03-30 07:39:31 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-03-30 07:39:31 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-03-30 07:39:31 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-03-30 07:39:31 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-03-30 07:39:31 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-03-30 07:39:31 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-03-30 07:39:31 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-03-30 07:39:31 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=105 tn=0 bl=148 pwr=0
2025-03-30 07:39:31 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=105 tn=1 bl=148 pwr=0
2025-03-30 07:39:31 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=105 tn=2 bl=148 pwr=0
2025-03-30 07:39:31 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=105 tn=3 bl=148 pwr=0
2025-03-30 07:39:31 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=105 tn=4 bl=148 pwr=0
2025-03-30 07:39:31 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=105 tn=5 bl=148 pwr=0
2025-03-30 07:39:31 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=105 tn=6 bl=148 pwr=0
2025-03-30 07:39:31 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=105 tn=7 bl=148 pwr=0
2025-03-30 07:39:31 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=106 tn=0 bl=148 pwr=0
2025-03-30 07:39:31 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=106 tn=1 bl=148 pwr=0
2025-03-30 07:39:31 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=106 tn=2 bl=148 pwr=0
2025-03-30 07:39:31 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=106 tn=3 bl=148 pwr=0
2025-03-30 07:39:31 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=106 tn=4 bl=148 pwr=0
2025-03-30 07:39:31 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=106 tn=5 bl=148 pwr=0
2025-03-30 07:39:31 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=106 tn=6 bl=148 pwr=0
2025-03-30 07:39:31 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=106 tn=7 bl=148 pwr=0
2025-03-30 07:39:31 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=107 tn=0 bl=148 pwr=0
2025-03-30 07:39:31 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=107 tn=1 bl=148 pwr=0
2025-03-30 07:39:31 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=107 tn=2 bl=148 pwr=0
2025-03-30 07:39:31 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=107 tn=3 bl=148 pwr=0
2025-03-30 07:39:31 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=107 tn=4 bl=148 pwr=0
2025-03-30 07:39:31 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=107 tn=5 bl=148 pwr=0
2025-03-30 07:39:31 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=107 tn=6 bl=148 pwr=0
2025-03-30 07:39:31 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=107 tn=7 bl=148 pwr=0
2025-03-30 07:39:31 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 07:39:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:39:31 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 07:39:31 [DEBUG] fake_trx.py:317 (BTS@172.18.26.20:5700) Recv FAKE_CI cmd
2025-03-30 07:39:32 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-03-30 07:39:32 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:39:32 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:39:32 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:39:32 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:39:32 [DEBUG] clck_gen.py:128 IND CLOCK 306
2025-03-30 07:39:33 [DEBUG] clck_gen.py:128 IND CLOCK 408
2025-03-30 07:39:33 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:39:33 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:39:33 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:39:33 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:39:33 [DEBUG] clck_gen.py:128 IND CLOCK 510
2025-03-30 07:39:34 [DEBUG] clck_gen.py:128 IND CLOCK 612
2025-03-30 07:39:34 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:39:34 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:39:34 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:39:34 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:39:34 [DEBUG] clck_gen.py:128 IND CLOCK 714
2025-03-30 07:39:35 [DEBUG] clck_gen.py:128 IND CLOCK 816
2025-03-30 07:39:35 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:39:35 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:39:35 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:39:35 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:39:35 [DEBUG] clck_gen.py:128 IND CLOCK 918
2025-03-30 07:39:36 [DEBUG] clck_gen.py:128 IND CLOCK 1020
2025-03-30 07:39:36 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:39:36 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:39:36 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:39:36 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:39:36 [DEBUG] clck_gen.py:128 IND CLOCK 1122
2025-03-30 07:39:36 [DEBUG] clck_gen.py:128 IND CLOCK 1224
2025-03-30 07:39:37 [DEBUG] clck_gen.py:128 IND CLOCK 1326
2025-03-30 07:39:37 [DEBUG] clck_gen.py:128 IND CLOCK 1428
2025-03-30 07:39:38 [DEBUG] clck_gen.py:128 IND CLOCK 1530
2025-03-30 07:39:38 [DEBUG] clck_gen.py:128 IND CLOCK 1632
2025-03-30 07:39:39 [DEBUG] clck_gen.py:128 IND CLOCK 1734
2025-03-30 07:39:39 [DEBUG] clck_gen.py:128 IND CLOCK 1836
2025-03-30 07:39:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:39:39 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:39:39 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:39:39 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:39:39 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:39:39 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:39:39 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:39:39 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:39:39 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:39:39 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 07:39:39 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 07:39:39 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 07:39:39 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=1848 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:39:39 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=1848 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:39:39 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=1848 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:39:39 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=1848 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:39:39 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=1848 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:39:39 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=1848 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:39:44 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 07:39:44 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 07:39:44 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:39:44 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:39:44 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:39:44 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:39:44 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:39:44 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 07:39:44 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:39:44 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 07:39:44 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 07:39:44 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 07:39:44 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 07:39:44 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 07:39:44 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:39:44 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 07:39:44 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:39:44 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 07:39:44 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 07:39:44 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 07:39:44 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 07:39:44 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 07:39:44 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:39:44 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:39:44 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 07:39:44 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 07:39:44 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 07:39:44 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 07:39:44 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 07:39:44 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 07:39:44 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:39:44 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:39:44 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 07:39:44 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 07:39:44 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 07:39:44 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 07:39:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 07:39:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 07:39:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 07:39:44 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 07:39:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 07:39:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 07:39:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 07:39:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 07:39:44 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 07:39:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:39:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:39:44 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 07:39:44 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 07:39:44 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 07:39:44 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 07:39:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:39:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:39:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:39:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 07:39:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:39:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:39:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:39:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:39:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:39:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:39:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:39:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:39:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:39:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:39:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:39:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:39:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:39:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:39:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:39:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:39:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:39:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:39:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:39:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:39:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:39:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:39:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:39:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:39:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:39:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:39:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:39:44 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-03-30 07:39:45 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-03-30 07:39:45 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-03-30 07:39:45 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-03-30 07:39:45 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-03-30 07:39:45 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-03-30 07:39:45 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-03-30 07:39:45 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-03-30 07:39:45 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-03-30 07:39:45 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-03-30 07:39:45 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=0 bl=148 pwr=0
2025-03-30 07:39:45 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=1 bl=148 pwr=0
2025-03-30 07:39:45 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=2 bl=148 pwr=0
2025-03-30 07:39:45 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=3 bl=148 pwr=0
2025-03-30 07:39:45 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=4 bl=148 pwr=0
2025-03-30 07:39:45 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=5 bl=148 pwr=0
2025-03-30 07:39:45 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=6 bl=148 pwr=0
2025-03-30 07:39:45 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=7 bl=148 pwr=0
2025-03-30 07:39:45 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 07:39:45 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 07:39:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:39:45 [DEBUG] fake_trx.py:317 (BTS@172.18.26.20:5700) Recv FAKE_CI cmd
2025-03-30 07:39:45 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-03-30 07:39:45 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:39:45 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:39:45 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:39:45 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:39:46 [DEBUG] clck_gen.py:128 IND CLOCK 306
2025-03-30 07:39:46 [DEBUG] clck_gen.py:128 IND CLOCK 408
2025-03-30 07:39:46 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:39:46 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:39:46 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:39:46 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:39:47 [DEBUG] clck_gen.py:128 IND CLOCK 510
2025-03-30 07:39:47 [DEBUG] clck_gen.py:128 IND CLOCK 612
2025-03-30 07:39:47 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:39:47 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:39:47 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:39:47 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:39:48 [DEBUG] clck_gen.py:128 IND CLOCK 714
2025-03-30 07:39:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:39:48 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:39:48 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:39:48 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:39:48 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:39:48 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:39:48 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:39:48 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:39:48 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:39:48 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 07:39:48 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 07:39:48 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 07:39:53 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 07:39:53 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 07:39:53 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:39:53 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:39:53 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:39:53 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:39:53 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:39:53 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 07:39:53 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:39:53 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 07:39:53 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 07:39:53 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 07:39:53 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 07:39:53 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 07:39:53 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:39:53 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:39:53 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 07:39:53 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 07:39:53 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 07:39:53 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 07:39:53 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 07:39:53 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 07:39:53 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:39:53 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:39:53 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 07:39:53 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 07:39:53 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 07:39:53 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 07:39:53 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 07:39:53 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 07:39:53 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:39:53 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:39:53 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 07:39:53 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 07:39:53 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 07:39:53 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 07:39:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 07:39:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 07:39:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 07:39:53 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 07:39:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 07:39:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 07:39:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 07:39:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:39:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 07:39:53 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 07:39:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:39:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:39:53 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 07:39:53 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 07:39:53 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 07:39:53 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 07:39:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:39:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:39:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:39:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 07:39:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:39:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:39:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:39:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:39:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:39:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:39:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:39:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:39:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:39:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:39:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:39:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:39:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:39:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:39:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:39:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:39:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:39:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:39:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:39:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:39:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:39:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:39:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:39:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:39:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:39:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:39:53 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-03-30 07:39:53 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-03-30 07:39:53 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-03-30 07:39:53 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-03-30 07:39:53 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-03-30 07:39:53 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-03-30 07:39:53 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-03-30 07:39:53 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-03-30 07:39:53 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-03-30 07:39:53 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-03-30 07:39:53 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 07:39:53 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 07:39:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:39:53 [DEBUG] fake_trx.py:317 (BTS@172.18.26.20:5700) Recv FAKE_CI cmd
2025-03-30 07:39:53 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:39:53 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:39:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:39:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:39:53 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:39:53 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:39:53 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 07:39:53 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 07:39:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:39:53 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:39:53 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:39:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:39:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:39:54 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-03-30 07:39:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:39:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:39:54 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:39:54 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:39:54 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:39:54 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:39:54 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:39:54 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:39:54 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:39:54 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:39:54 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:39:54 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:39:54 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 07:39:54 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 07:39:54 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 07:39:54 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=211 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:39:54 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=211 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:39:54 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=211 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:39:54 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=211 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:39:54 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=211 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:39:54 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=211 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:39:54 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=211 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:39:54 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=211 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:39:59 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 07:39:59 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 07:39:59 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:39:59 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:39:59 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:39:59 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:39:59 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:39:59 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 07:39:59 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:39:59 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 07:39:59 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 07:39:59 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 07:39:59 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 07:39:59 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 07:39:59 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:39:59 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:39:59 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 07:39:59 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 07:39:59 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 07:39:59 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 07:39:59 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 07:39:59 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 07:39:59 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:39:59 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:39:59 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 07:39:59 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 07:39:59 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 07:39:59 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 07:39:59 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 07:39:59 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 07:39:59 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:39:59 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:39:59 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 07:39:59 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 07:39:59 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 07:39:59 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 07:39:59 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 07:39:59 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 07:39:59 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 07:39:59 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 07:39:59 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 07:39:59 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 07:39:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 07:39:59 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:39:59 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 07:39:59 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 07:39:59 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:39:59 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:39:59 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 07:39:59 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 07:39:59 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 07:39:59 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 07:39:59 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:39:59 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:39:59 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:39:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 07:39:59 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:39:59 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:39:59 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:39:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:39:59 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:39:59 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:39:59 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:39:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:39:59 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:39:59 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:39:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:39:59 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:39:59 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:39:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:39:59 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:39:59 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:39:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:39:59 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:39:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:39:59 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:39:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:39:59 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:39:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:39:59 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:39:59 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:39:59 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:39:59 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-03-30 07:39:59 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-03-30 07:39:59 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-03-30 07:39:59 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-03-30 07:39:59 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-03-30 07:39:59 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-03-30 07:39:59 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-03-30 07:39:59 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-03-30 07:39:59 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-03-30 07:39:59 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-03-30 07:39:59 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=105 tn=0 bl=148 pwr=0
2025-03-30 07:39:59 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=105 tn=1 bl=148 pwr=0
2025-03-30 07:39:59 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=105 tn=2 bl=148 pwr=0
2025-03-30 07:39:59 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=105 tn=3 bl=148 pwr=0
2025-03-30 07:39:59 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=105 tn=4 bl=148 pwr=0
2025-03-30 07:39:59 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=105 tn=5 bl=148 pwr=0
2025-03-30 07:39:59 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=105 tn=6 bl=148 pwr=0
2025-03-30 07:39:59 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=105 tn=7 bl=148 pwr=0
2025-03-30 07:39:59 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=106 tn=0 bl=148 pwr=0
2025-03-30 07:39:59 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=106 tn=1 bl=148 pwr=0
2025-03-30 07:39:59 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=106 tn=2 bl=148 pwr=0
2025-03-30 07:39:59 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=106 tn=3 bl=148 pwr=0
2025-03-30 07:39:59 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=106 tn=4 bl=148 pwr=0
2025-03-30 07:39:59 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=106 tn=5 bl=148 pwr=0
2025-03-30 07:39:59 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=106 tn=6 bl=148 pwr=0
2025-03-30 07:39:59 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=106 tn=7 bl=148 pwr=0
2025-03-30 07:39:59 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=107 tn=0 bl=148 pwr=0
2025-03-30 07:39:59 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=107 tn=1 bl=148 pwr=0
2025-03-30 07:39:59 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=107 tn=2 bl=148 pwr=0
2025-03-30 07:39:59 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=107 tn=3 bl=148 pwr=0
2025-03-30 07:39:59 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=107 tn=4 bl=148 pwr=0
2025-03-30 07:39:59 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=107 tn=5 bl=148 pwr=0
2025-03-30 07:39:59 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=107 tn=6 bl=148 pwr=0
2025-03-30 07:39:59 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=107 tn=7 bl=148 pwr=0
2025-03-30 07:39:59 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 07:39:59 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 07:39:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:39:59 [DEBUG] fake_trx.py:317 (BTS@172.18.26.20:5700) Recv FAKE_CI cmd
2025-03-30 07:39:59 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:39:59 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:39:59 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:39:59 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:39:59 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:39:59 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:39:59 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:39:59 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:39:59 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 07:39:59 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 07:39:59 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 07:39:59 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=113 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:39:59 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=113 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:39:59 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=113 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:39:59 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=113 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:39:59 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=113 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:39:59 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=113 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:39:59 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=114 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:39:59 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=114 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:39:59 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=114 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:39:59 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=114 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:39:59 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=114 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:39:59 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=114 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:39:59 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=114 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:39:59 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=114 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:40:04 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 07:40:04 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 07:40:04 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:40:04 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:40:04 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:40:04 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:40:04 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:40:05 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 07:40:05 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:40:05 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 07:40:05 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 07:40:05 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 07:40:05 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 07:40:05 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 07:40:05 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:40:05 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:40:05 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 07:40:05 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 07:40:05 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 07:40:05 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 07:40:05 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 07:40:05 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 07:40:05 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:40:05 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:40:05 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 07:40:05 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 07:40:05 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 07:40:05 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 07:40:05 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 07:40:05 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 07:40:05 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:40:05 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:40:05 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 07:40:05 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 07:40:05 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 07:40:05 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 07:40:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 07:40:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 07:40:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 07:40:05 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 07:40:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 07:40:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 07:40:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 07:40:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 07:40:05 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 07:40:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:40:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:40:05 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 07:40:05 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 07:40:05 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 07:40:05 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 07:40:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:40:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:40:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:40:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 07:40:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:40:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:40:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:40:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:40:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:40:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:40:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:40:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:40:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:40:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:40:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:40:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:40:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:40:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:40:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:40:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:40:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:40:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:40:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:40:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:40:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:40:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:40:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:40:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:40:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:40:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:40:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:40:05 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-03-30 07:40:05 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-03-30 07:40:05 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-03-30 07:40:05 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-03-30 07:40:05 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-03-30 07:40:05 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-03-30 07:40:05 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-03-30 07:40:05 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-03-30 07:40:05 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-03-30 07:40:05 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-03-30 07:40:05 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 07:40:05 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 07:40:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:40:05 [DEBUG] fake_trx.py:317 (BTS@172.18.26.20:5700) Recv FAKE_CI cmd
2025-03-30 07:40:05 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-03-30 07:40:06 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:40:06 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:40:06 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:40:06 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:40:06 [DEBUG] clck_gen.py:128 IND CLOCK 306
2025-03-30 07:40:06 [DEBUG] clck_gen.py:128 IND CLOCK 408
2025-03-30 07:40:07 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:40:07 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:40:07 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:40:07 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:40:07 [DEBUG] clck_gen.py:128 IND CLOCK 510
2025-03-30 07:40:07 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:40:07 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:40:07 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:40:07 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:40:07 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:40:07 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:40:07 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 07:40:07 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 07:40:07 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 07:40:07 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:40:07 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:40:12 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 07:40:12 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 07:40:12 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:40:12 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:40:12 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:40:12 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:40:12 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:40:12 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 07:40:12 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:40:12 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 07:40:12 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 07:40:12 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 07:40:12 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 07:40:12 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 07:40:12 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:40:12 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:40:12 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 07:40:12 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 07:40:12 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 07:40:12 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 07:40:12 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 07:40:12 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 07:40:12 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:40:12 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 07:40:12 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:40:12 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 07:40:12 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 07:40:12 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 07:40:12 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 07:40:12 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 07:40:12 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:40:12 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:40:12 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 07:40:12 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 07:40:12 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 07:40:12 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 07:40:12 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 07:40:12 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 07:40:12 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 07:40:12 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 07:40:12 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 07:40:12 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 07:40:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 07:40:12 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:40:12 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 07:40:12 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 07:40:12 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:40:12 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:40:12 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 07:40:12 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 07:40:12 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 07:40:12 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 07:40:12 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:40:12 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:40:12 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:40:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 07:40:12 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:40:12 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:40:12 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:40:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:40:12 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:40:12 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:40:12 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:40:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:40:12 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:40:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:40:12 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:40:12 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:40:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:40:12 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:40:12 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:40:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:40:12 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:40:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:40:12 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:40:12 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:40:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:40:12 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:40:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:40:12 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:40:12 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:40:12 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:40:12 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-03-30 07:40:13 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-03-30 07:40:13 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-03-30 07:40:13 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-03-30 07:40:13 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-03-30 07:40:13 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-03-30 07:40:13 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-03-30 07:40:13 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-03-30 07:40:13 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-03-30 07:40:13 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-03-30 07:40:13 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 07:40:13 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 07:40:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:40:13 [DEBUG] fake_trx.py:317 (BTS@172.18.26.20:5700) Recv FAKE_CI cmd
2025-03-30 07:40:13 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:40:13 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:40:13 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:40:13 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:40:13 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:40:13 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:40:13 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 07:40:13 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 07:40:13 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-03-30 07:40:13 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:40:13 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:40:13 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:40:13 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:40:13 [DEBUG] clck_gen.py:128 IND CLOCK 306
2025-03-30 07:40:14 [DEBUG] clck_gen.py:128 IND CLOCK 408
2025-03-30 07:40:14 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:40:14 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:40:14 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:40:14 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:40:14 [DEBUG] clck_gen.py:128 IND CLOCK 510
2025-03-30 07:40:15 [DEBUG] clck_gen.py:128 IND CLOCK 612
2025-03-30 07:40:15 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:40:15 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:40:15 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:40:15 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:40:15 [DEBUG] clck_gen.py:128 IND CLOCK 714
2025-03-30 07:40:15 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:40:15 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:40:15 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:40:15 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:40:15 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:40:15 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:40:15 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:40:15 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:40:15 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:40:15 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:40:15 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 07:40:15 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 07:40:15 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 07:40:20 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 07:40:20 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 07:40:20 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:40:20 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:40:20 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:40:20 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:40:20 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:40:20 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 07:40:20 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:40:20 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 07:40:20 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 07:40:20 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 07:40:20 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 07:40:20 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 07:40:20 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:40:20 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:40:20 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 07:40:20 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 07:40:20 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 07:40:20 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 07:40:20 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 07:40:20 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 07:40:20 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:40:20 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:40:20 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 07:40:20 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 07:40:20 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 07:40:20 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 07:40:20 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 07:40:20 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 07:40:20 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:40:20 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:40:20 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 07:40:20 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 07:40:20 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 07:40:20 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 07:40:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 07:40:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 07:40:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 07:40:20 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 07:40:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 07:40:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 07:40:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 07:40:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 07:40:20 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 07:40:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:40:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:40:20 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 07:40:20 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 07:40:20 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 07:40:20 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 07:40:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:40:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:40:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:40:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 07:40:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:40:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:40:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:40:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:40:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:40:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:40:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:40:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:40:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:40:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:40:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:40:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:40:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:40:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:40:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:40:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:40:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:40:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:40:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:40:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:40:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:40:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:40:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:40:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:40:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:40:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:40:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:40:20 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-03-30 07:40:21 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-03-30 07:40:21 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-03-30 07:40:21 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-03-30 07:40:21 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-03-30 07:40:21 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-03-30 07:40:21 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-03-30 07:40:21 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-03-30 07:40:21 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-03-30 07:40:21 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-03-30 07:40:21 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 07:40:21 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 07:40:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:40:21 [DEBUG] fake_trx.py:317 (BTS@172.18.26.20:5700) Recv FAKE_CI cmd
2025-03-30 07:40:21 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:40:21 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:40:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:40:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:40:21 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:40:21 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:40:21 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 07:40:21 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 07:40:21 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-03-30 07:40:21 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:40:21 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:40:21 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:40:21 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:40:22 [DEBUG] clck_gen.py:128 IND CLOCK 306
2025-03-30 07:40:22 [DEBUG] clck_gen.py:128 IND CLOCK 408
2025-03-30 07:40:22 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:40:22 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:40:22 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:40:22 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:40:23 [DEBUG] clck_gen.py:128 IND CLOCK 510
2025-03-30 07:40:23 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:40:23 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:40:23 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:40:23 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:40:23 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:40:23 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:40:23 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:40:23 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:40:23 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:40:23 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:40:23 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 07:40:23 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 07:40:23 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 07:40:28 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 07:40:28 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 07:40:28 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:40:28 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:40:28 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:40:28 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:40:28 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:40:28 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 07:40:28 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:40:28 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 07:40:28 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 07:40:28 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 07:40:28 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 07:40:28 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 07:40:28 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:40:28 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:40:28 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 07:40:28 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 07:40:28 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 07:40:28 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 07:40:28 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 07:40:28 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 07:40:28 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:40:28 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:40:28 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 07:40:28 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 07:40:28 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 07:40:28 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 07:40:28 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 07:40:28 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 07:40:28 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:40:28 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:40:28 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 07:40:28 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 07:40:28 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 07:40:28 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 07:40:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 07:40:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 07:40:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 07:40:28 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 07:40:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 07:40:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 07:40:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 07:40:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 07:40:28 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 07:40:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:40:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:40:28 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 07:40:28 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 07:40:28 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 07:40:28 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 07:40:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:40:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:40:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:40:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 07:40:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:40:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:40:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:40:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:40:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:40:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:40:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:40:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:40:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:40:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:40:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:40:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:40:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:40:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:40:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:40:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:40:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:40:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:40:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:40:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:40:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:40:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:40:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:40:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:40:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:40:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:40:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:40:28 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-03-30 07:40:29 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-03-30 07:40:29 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-03-30 07:40:29 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-03-30 07:40:29 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-03-30 07:40:29 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-03-30 07:40:29 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-03-30 07:40:29 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-03-30 07:40:29 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-03-30 07:40:29 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-03-30 07:40:29 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 07:40:29 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 07:40:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:40:29 [DEBUG] fake_trx.py:317 (BTS@172.18.26.20:5700) Recv FAKE_CI cmd
2025-03-30 07:40:29 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:40:29 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:40:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:40:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:40:29 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:40:29 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:40:29 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 07:40:29 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 07:40:29 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-03-30 07:40:29 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:40:29 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:40:29 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:40:29 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:40:30 [DEBUG] clck_gen.py:128 IND CLOCK 306
2025-03-30 07:40:30 [DEBUG] clck_gen.py:128 IND CLOCK 408
2025-03-30 07:40:30 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:40:30 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:40:30 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:40:30 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:40:30 [DEBUG] clck_gen.py:128 IND CLOCK 510
2025-03-30 07:40:31 [DEBUG] clck_gen.py:128 IND CLOCK 612
2025-03-30 07:40:31 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:40:31 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:40:31 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:40:31 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:40:31 [DEBUG] clck_gen.py:128 IND CLOCK 714
2025-03-30 07:40:31 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:40:31 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:40:31 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:40:31 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:40:31 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:40:31 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:40:31 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:40:31 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:40:31 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:40:31 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:40:31 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 07:40:31 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 07:40:31 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 07:40:36 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 07:40:36 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 07:40:36 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:40:36 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:40:36 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:40:36 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:40:36 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:40:36 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 07:40:36 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:40:36 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 07:40:36 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 07:40:36 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 07:40:36 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 07:40:36 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 07:40:36 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:40:36 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:40:36 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 07:40:36 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 07:40:36 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 07:40:36 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 07:40:36 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 07:40:36 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 07:40:36 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:40:36 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:40:36 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 07:40:36 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 07:40:36 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 07:40:36 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 07:40:36 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 07:40:36 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 07:40:36 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:40:36 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:40:36 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 07:40:36 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 07:40:36 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 07:40:36 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 07:40:36 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 07:40:36 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 07:40:36 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 07:40:36 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 07:40:36 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 07:40:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 07:40:36 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 07:40:36 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 07:40:36 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 07:40:36 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:40:36 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:40:36 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 07:40:36 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 07:40:36 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 07:40:36 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 07:40:36 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:40:36 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:40:36 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:40:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 07:40:36 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:40:36 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:40:36 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:40:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:40:36 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:40:36 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:40:36 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:40:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:40:36 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:40:36 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:40:36 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:40:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:40:36 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:40:36 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:40:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:40:36 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:40:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:40:36 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:40:36 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:40:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:40:36 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:40:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:40:36 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:40:36 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:40:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:40:36 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:40:36 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:40:36 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-03-30 07:40:37 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-03-30 07:40:37 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-03-30 07:40:37 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-03-30 07:40:37 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-03-30 07:40:37 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-03-30 07:40:37 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-03-30 07:40:37 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-03-30 07:40:37 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-03-30 07:40:37 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-03-30 07:40:37 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 07:40:37 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 07:40:37 [DEBUG] fake_trx.py:317 (BTS@172.18.26.20:5700) Recv FAKE_CI cmd
2025-03-30 07:40:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:40:37 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:40:37 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:40:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:40:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:40:37 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:40:37 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:40:37 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 07:40:37 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 07:40:37 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-03-30 07:40:37 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:40:37 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:40:37 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:40:37 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:40:38 [DEBUG] clck_gen.py:128 IND CLOCK 306
2025-03-30 07:40:38 [DEBUG] clck_gen.py:128 IND CLOCK 408
2025-03-30 07:40:38 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:40:38 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:40:38 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:40:38 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:40:39 [DEBUG] clck_gen.py:128 IND CLOCK 510
2025-03-30 07:40:39 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:40:39 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:40:39 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:40:39 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:40:39 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:40:39 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:40:39 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:40:39 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:40:39 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:40:39 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:40:39 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 07:40:39 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 07:40:39 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 07:40:39 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=570 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:40:39 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=570 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:40:39 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=570 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:40:39 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=570 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:40:39 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=570 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:40:39 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=570 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:40:39 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=570 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:40:39 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=570 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:40:44 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 07:40:44 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 07:40:44 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:40:44 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:40:44 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:40:44 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:40:44 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:40:44 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 07:40:44 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:40:44 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 07:40:44 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 07:40:44 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 07:40:44 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 07:40:44 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 07:40:44 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:40:44 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:40:44 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 07:40:44 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 07:40:44 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 07:40:44 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 07:40:44 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 07:40:44 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 07:40:44 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:40:44 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:40:44 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 07:40:44 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 07:40:44 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 07:40:44 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 07:40:44 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 07:40:44 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 07:40:44 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:40:44 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:40:44 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 07:40:44 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 07:40:44 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 07:40:44 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 07:40:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 07:40:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 07:40:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 07:40:44 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 07:40:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 07:40:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 07:40:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 07:40:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:40:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 07:40:44 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 07:40:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:40:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:40:44 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 07:40:44 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 07:40:44 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 07:40:44 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 07:40:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:40:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:40:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:40:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 07:40:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:40:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:40:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:40:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:40:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:40:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:40:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:40:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:40:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:40:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:40:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:40:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:40:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:40:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:40:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:40:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:40:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:40:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:40:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:40:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:40:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:40:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:40:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:40:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:40:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:40:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:40:44 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-03-30 07:40:45 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-03-30 07:40:45 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-03-30 07:40:45 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-03-30 07:40:45 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-03-30 07:40:45 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-03-30 07:40:45 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-03-30 07:40:45 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-03-30 07:40:45 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-03-30 07:40:45 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-03-30 07:40:45 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 07:40:45 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 07:40:45 [DEBUG] fake_trx.py:317 (BTS@172.18.26.20:5700) Recv FAKE_CI cmd
2025-03-30 07:40:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:40:45 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:40:45 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:40:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:40:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:40:45 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:40:45 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:40:45 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 07:40:45 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 07:40:45 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-03-30 07:40:45 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:40:45 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:40:45 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:40:45 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:40:46 [DEBUG] clck_gen.py:128 IND CLOCK 306
2025-03-30 07:40:46 [DEBUG] clck_gen.py:128 IND CLOCK 408
2025-03-30 07:40:46 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:40:46 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:40:46 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:40:46 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:40:46 [DEBUG] clck_gen.py:128 IND CLOCK 510
2025-03-30 07:40:47 [DEBUG] clck_gen.py:128 IND CLOCK 612
2025-03-30 07:40:47 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:40:47 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:40:47 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:40:47 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:40:47 [DEBUG] clck_gen.py:128 IND CLOCK 714
2025-03-30 07:40:48 [DEBUG] clck_gen.py:128 IND CLOCK 816
2025-03-30 07:40:48 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:40:48 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:40:48 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:40:48 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:40:48 [DEBUG] clck_gen.py:128 IND CLOCK 918
2025-03-30 07:40:48 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:40:48 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:40:48 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:40:48 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:40:48 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:40:48 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:40:48 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:40:48 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:40:48 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:40:48 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:40:48 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 07:40:48 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 07:40:48 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 07:40:53 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 07:40:53 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 07:40:53 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:40:53 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:40:53 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:40:53 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:40:53 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:40:53 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 07:40:53 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:40:53 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 07:40:53 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 07:40:53 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 07:40:53 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 07:40:53 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 07:40:53 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:40:53 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 07:40:53 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:40:53 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 07:40:53 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 07:40:53 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 07:40:53 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 07:40:53 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 07:40:53 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:40:53 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:40:53 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 07:40:53 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 07:40:53 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 07:40:53 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 07:40:53 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 07:40:53 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 07:40:53 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:40:53 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:40:53 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 07:40:53 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 07:40:53 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 07:40:53 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 07:40:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 07:40:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 07:40:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 07:40:53 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 07:40:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 07:40:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 07:40:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 07:40:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:40:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 07:40:53 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 07:40:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:40:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:40:53 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 07:40:53 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 07:40:53 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 07:40:53 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 07:40:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:40:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:40:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:40:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 07:40:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:40:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:40:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:40:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:40:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:40:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:40:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:40:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:40:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:40:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:40:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:40:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:40:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:40:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:40:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:40:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:40:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:40:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:40:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:40:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:40:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:40:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:40:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:40:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:40:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:40:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:40:53 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-03-30 07:40:54 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-03-30 07:40:54 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-03-30 07:40:54 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-03-30 07:40:54 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-03-30 07:40:54 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-03-30 07:40:54 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-03-30 07:40:54 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-03-30 07:40:54 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-03-30 07:40:54 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-03-30 07:40:54 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 07:40:54 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 07:40:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:40:54 [DEBUG] fake_trx.py:317 (BTS@172.18.26.20:5700) Recv FAKE_CI cmd
2025-03-30 07:40:54 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:40:54 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:40:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:40:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:40:54 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:40:54 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:40:54 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 07:40:54 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 07:40:54 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-03-30 07:40:54 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:40:54 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:40:54 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:40:54 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:40:55 [DEBUG] clck_gen.py:128 IND CLOCK 306
2025-03-30 07:40:55 [DEBUG] clck_gen.py:128 IND CLOCK 408
2025-03-30 07:40:55 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:40:55 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:40:55 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:40:55 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:40:56 [DEBUG] clck_gen.py:128 IND CLOCK 510
2025-03-30 07:40:56 [DEBUG] clck_gen.py:128 IND CLOCK 612
2025-03-30 07:40:56 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:40:56 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:40:56 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:40:56 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:40:57 [DEBUG] clck_gen.py:128 IND CLOCK 714
2025-03-30 07:40:57 [DEBUG] clck_gen.py:128 IND CLOCK 816
2025-03-30 07:40:57 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:40:57 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:40:57 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:40:57 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:40:58 [DEBUG] clck_gen.py:128 IND CLOCK 918
2025-03-30 07:40:58 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:40:58 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:40:58 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:40:58 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:40:58 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:40:58 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:40:58 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:40:58 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:40:58 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:40:58 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:40:58 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 07:40:58 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 07:40:58 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 07:41:03 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 07:41:03 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 07:41:03 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:41:03 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:41:03 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:41:03 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:41:03 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:41:03 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 07:41:03 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:41:03 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 07:41:03 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 07:41:03 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 07:41:03 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 07:41:03 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 07:41:03 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:41:03 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:41:03 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 07:41:03 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 07:41:03 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 07:41:03 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 07:41:03 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 07:41:03 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 07:41:03 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:41:03 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:41:03 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 07:41:03 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 07:41:03 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 07:41:03 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 07:41:03 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 07:41:03 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 07:41:03 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:41:03 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:41:03 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 07:41:03 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 07:41:03 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 07:41:03 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 07:41:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 07:41:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 07:41:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 07:41:03 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 07:41:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 07:41:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 07:41:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 07:41:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 07:41:03 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 07:41:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:41:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:41:03 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 07:41:03 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 07:41:03 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 07:41:03 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 07:41:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:41:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:41:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:41:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 07:41:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:41:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:41:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:41:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:41:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:41:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:41:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:41:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:41:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:41:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:41:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:41:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:41:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:41:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:41:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:41:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:41:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:41:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:41:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:41:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:41:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:41:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:41:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:41:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:41:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:41:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:41:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:41:03 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-03-30 07:41:03 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-03-30 07:41:03 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-03-30 07:41:03 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-03-30 07:41:03 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-03-30 07:41:03 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-03-30 07:41:03 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-03-30 07:41:03 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-03-30 07:41:03 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-03-30 07:41:03 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-03-30 07:41:03 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 07:41:03 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 07:41:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:41:03 [DEBUG] fake_trx.py:317 (BTS@172.18.26.20:5700) Recv FAKE_CI cmd
2025-03-30 07:41:04 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-03-30 07:41:04 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:41:04 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:41:04 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:41:04 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:41:04 [DEBUG] clck_gen.py:128 IND CLOCK 306
2025-03-30 07:41:05 [DEBUG] clck_gen.py:128 IND CLOCK 408
2025-03-30 07:41:05 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:41:05 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:41:05 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:41:05 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:41:05 [DEBUG] clck_gen.py:128 IND CLOCK 510
2025-03-30 07:41:05 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:41:05 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:41:05 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:41:05 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:41:05 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:41:05 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:41:05 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:41:05 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:41:05 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 07:41:05 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 07:41:05 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 07:41:10 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 07:41:10 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 07:41:10 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:41:10 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:41:10 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:41:10 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:41:10 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:41:10 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 07:41:10 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:41:10 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 07:41:10 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 07:41:10 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 07:41:10 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 07:41:10 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 07:41:10 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:41:10 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 07:41:10 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:41:10 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 07:41:10 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 07:41:10 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 07:41:10 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 07:41:10 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 07:41:10 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:41:10 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 07:41:10 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:41:10 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 07:41:10 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 07:41:10 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 07:41:10 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 07:41:10 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 07:41:10 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:41:10 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:41:10 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 07:41:10 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 07:41:10 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 07:41:10 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 07:41:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 07:41:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 07:41:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 07:41:10 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 07:41:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 07:41:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 07:41:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 07:41:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 07:41:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:41:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:41:10 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 07:41:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:41:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:41:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:41:10 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 07:41:10 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 07:41:10 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 07:41:10 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 07:41:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:41:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:41:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:41:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 07:41:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:41:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:41:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:41:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:41:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:41:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:41:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:41:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:41:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:41:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:41:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:41:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:41:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:41:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:41:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:41:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:41:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:41:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:41:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:41:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:41:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:41:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:41:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:41:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:41:10 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-03-30 07:41:11 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-03-30 07:41:11 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-03-30 07:41:11 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-03-30 07:41:11 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-03-30 07:41:11 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-03-30 07:41:11 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-03-30 07:41:11 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-03-30 07:41:11 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-03-30 07:41:11 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-03-30 07:41:11 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=0 bl=148 pwr=0
2025-03-30 07:41:11 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=1 bl=148 pwr=0
2025-03-30 07:41:11 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=2 bl=148 pwr=0
2025-03-30 07:41:11 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=3 bl=148 pwr=0
2025-03-30 07:41:11 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=4 bl=148 pwr=0
2025-03-30 07:41:11 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=5 bl=148 pwr=0
2025-03-30 07:41:11 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=6 bl=148 pwr=0
2025-03-30 07:41:11 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=7 bl=148 pwr=0
2025-03-30 07:41:11 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 07:41:11 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 07:41:11 [DEBUG] fake_trx.py:317 (BTS@172.18.26.20:5700) Recv FAKE_CI cmd
2025-03-30 07:41:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:41:11 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:41:11 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:41:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:41:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:41:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:41:11 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-03-30 07:41:11 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:41:11 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:41:11 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:41:11 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:41:12 [DEBUG] clck_gen.py:128 IND CLOCK 306
2025-03-30 07:41:12 [DEBUG] clck_gen.py:128 IND CLOCK 408
2025-03-30 07:41:12 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:41:12 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:41:12 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:41:12 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:41:13 [DEBUG] clck_gen.py:128 IND CLOCK 510
2025-03-30 07:41:13 [DEBUG] clck_gen.py:128 IND CLOCK 612
2025-03-30 07:41:13 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:41:13 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:41:13 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:41:13 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:41:14 [DEBUG] clck_gen.py:128 IND CLOCK 714
2025-03-30 07:41:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:41:14 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:41:14 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:41:14 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:41:14 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:41:14 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:41:14 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:41:14 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:41:14 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:41:14 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 07:41:14 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 07:41:14 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 07:41:14 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=778 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:41:14 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=778 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:41:14 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=778 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:41:14 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=778 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:41:14 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=778 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:41:14 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=778 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:41:19 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 07:41:19 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 07:41:19 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:41:19 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:41:19 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:41:19 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:41:19 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:41:19 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 07:41:19 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:41:19 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 07:41:19 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 07:41:19 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 07:41:19 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 07:41:19 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 07:41:19 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:41:19 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:41:19 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 07:41:19 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 07:41:19 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 07:41:19 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 07:41:19 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 07:41:19 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 07:41:19 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:41:19 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:41:19 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 07:41:19 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 07:41:19 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 07:41:19 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 07:41:19 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 07:41:19 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 07:41:19 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:41:19 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:41:19 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 07:41:19 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 07:41:19 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 07:41:19 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 07:41:19 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 07:41:19 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 07:41:19 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 07:41:19 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 07:41:19 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 07:41:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 07:41:19 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 07:41:19 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 07:41:19 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 07:41:19 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:41:19 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:41:19 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 07:41:19 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 07:41:19 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 07:41:19 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 07:41:19 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:41:19 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:41:19 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:41:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 07:41:19 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:41:19 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:41:19 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:41:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:41:19 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:41:19 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:41:19 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:41:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:41:19 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:41:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:41:19 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:41:19 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:41:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:41:19 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:41:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:41:19 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:41:19 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:41:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:41:19 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:41:19 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:41:19 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:41:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:41:19 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:41:19 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:41:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:41:19 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:41:19 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:41:19 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-03-30 07:41:20 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-03-30 07:41:20 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-03-30 07:41:20 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-03-30 07:41:20 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-03-30 07:41:20 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-03-30 07:41:20 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-03-30 07:41:20 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-03-30 07:41:20 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-03-30 07:41:20 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-03-30 07:41:20 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=0 bl=148 pwr=0
2025-03-30 07:41:20 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=1 bl=148 pwr=0
2025-03-30 07:41:20 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=2 bl=148 pwr=0
2025-03-30 07:41:20 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=3 bl=148 pwr=0
2025-03-30 07:41:20 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=4 bl=148 pwr=0
2025-03-30 07:41:20 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=5 bl=148 pwr=0
2025-03-30 07:41:20 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=6 bl=148 pwr=0
2025-03-30 07:41:20 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=7 bl=148 pwr=0
2025-03-30 07:41:20 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 07:41:20 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 07:41:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:41:20 [DEBUG] fake_trx.py:317 (BTS@172.18.26.20:5700) Recv FAKE_CI cmd
2025-03-30 07:41:20 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:41:20 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:41:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:41:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:41:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:41:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:41:20 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:41:20 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:41:20 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:41:20 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:41:20 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:41:20 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:41:20 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:41:20 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:41:20 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 07:41:20 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 07:41:20 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 07:41:25 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 07:41:25 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 07:41:25 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:41:25 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:41:25 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:41:25 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:41:25 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:41:25 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 07:41:25 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:41:25 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 07:41:25 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 07:41:25 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 07:41:25 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 07:41:25 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 07:41:25 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:41:25 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:41:25 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 07:41:25 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 07:41:25 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 07:41:25 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 07:41:25 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 07:41:25 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 07:41:25 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:41:25 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:41:25 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 07:41:25 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 07:41:25 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 07:41:25 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 07:41:25 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 07:41:25 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 07:41:25 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:41:25 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:41:25 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 07:41:25 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 07:41:25 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 07:41:25 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 07:41:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 07:41:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 07:41:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 07:41:25 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 07:41:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 07:41:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 07:41:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 07:41:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 07:41:25 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 07:41:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:41:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:41:25 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 07:41:25 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 07:41:25 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 07:41:25 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 07:41:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:41:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:41:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:41:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 07:41:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:41:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:41:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:41:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:41:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:41:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:41:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:41:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:41:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:41:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:41:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:41:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:41:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:41:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:41:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:41:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:41:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:41:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:41:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:41:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:41:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:41:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:41:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:41:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:41:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:41:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:41:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:41:25 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-03-30 07:41:25 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-03-30 07:41:25 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-03-30 07:41:25 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-03-30 07:41:25 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-03-30 07:41:25 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-03-30 07:41:25 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-03-30 07:41:25 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-03-30 07:41:25 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-03-30 07:41:25 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-03-30 07:41:25 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 07:41:25 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 07:41:25 [DEBUG] fake_trx.py:317 (BTS@172.18.26.20:5700) Recv FAKE_CI cmd
2025-03-30 07:41:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:41:25 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:41:25 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:41:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:41:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:41:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:41:26 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-03-30 07:41:26 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:41:26 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:41:26 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:41:26 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:41:26 [DEBUG] clck_gen.py:128 IND CLOCK 306
2025-03-30 07:41:27 [DEBUG] clck_gen.py:128 IND CLOCK 408
2025-03-30 07:41:27 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:41:27 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:41:27 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:41:27 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:41:27 [DEBUG] clck_gen.py:128 IND CLOCK 510
2025-03-30 07:41:27 [DEBUG] clck_gen.py:128 IND CLOCK 612
2025-03-30 07:41:28 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:41:28 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:41:28 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:41:28 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:41:28 [DEBUG] clck_gen.py:128 IND CLOCK 714
2025-03-30 07:41:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:41:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:41:28 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:41:28 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:41:28 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:41:28 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:41:28 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:41:28 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:41:28 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 07:41:28 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 07:41:28 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 07:41:28 [WARNING] transceiver.py:287 (TRX1@172.18.26.20:5700/1) RX TRXD message (ver=1 fn=772 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:41:28 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:41:28 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:41:28 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=772 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:41:28 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=772 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:41:28 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=772 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:41:28 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=772 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:41:28 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=772 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:41:28 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=772 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:41:28 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=772 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:41:33 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 07:41:33 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 07:41:33 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:41:33 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:41:33 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:41:33 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:41:33 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:41:33 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 07:41:33 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:41:33 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 07:41:33 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 07:41:33 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 07:41:33 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 07:41:33 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 07:41:33 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:41:33 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:41:33 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 07:41:33 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 07:41:33 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 07:41:33 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 07:41:33 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 07:41:33 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 07:41:33 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:41:33 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:41:33 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 07:41:33 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 07:41:33 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 07:41:33 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 07:41:33 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 07:41:33 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 07:41:33 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:41:33 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:41:33 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 07:41:33 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 07:41:33 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 07:41:33 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 07:41:33 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 07:41:33 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 07:41:33 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 07:41:33 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 07:41:33 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 07:41:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 07:41:33 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 07:41:33 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 07:41:33 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 07:41:33 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:41:33 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:41:33 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 07:41:33 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 07:41:33 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 07:41:33 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 07:41:33 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:41:33 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:41:33 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:41:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 07:41:33 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:41:33 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:41:33 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:41:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:41:33 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:41:33 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:41:33 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:41:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:41:33 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:41:33 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:41:33 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:41:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:41:33 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:41:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:41:33 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:41:33 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:41:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:41:33 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:41:33 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:41:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:41:33 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:41:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:41:33 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:41:33 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:41:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:41:33 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:41:33 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:41:33 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-03-30 07:41:34 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-03-30 07:41:34 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-03-30 07:41:34 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-03-30 07:41:34 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-03-30 07:41:34 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-03-30 07:41:34 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-03-30 07:41:34 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-03-30 07:41:34 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-03-30 07:41:34 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-03-30 07:41:34 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=0 bl=148 pwr=0
2025-03-30 07:41:34 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=1 bl=148 pwr=0
2025-03-30 07:41:34 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=2 bl=148 pwr=0
2025-03-30 07:41:34 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=3 bl=148 pwr=0
2025-03-30 07:41:34 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=4 bl=148 pwr=0
2025-03-30 07:41:34 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=5 bl=148 pwr=0
2025-03-30 07:41:34 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=6 bl=148 pwr=0
2025-03-30 07:41:34 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=7 bl=148 pwr=0
2025-03-30 07:41:34 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 07:41:34 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 07:41:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:41:34 [DEBUG] fake_trx.py:317 (BTS@172.18.26.20:5700) Recv FAKE_CI cmd
2025-03-30 07:41:34 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:41:34 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:41:34 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:41:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:41:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:41:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:41:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:41:34 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:41:34 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:41:34 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:41:34 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:41:34 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:41:34 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:41:34 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 07:41:34 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 07:41:34 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 07:41:34 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:41:34 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:41:34 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=124 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:41:34 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=124 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:41:34 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=124 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:41:34 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=124 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:41:34 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=124 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:41:34 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=124 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:41:34 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=124 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:41:39 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 07:41:39 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 07:41:39 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:41:39 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:41:39 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:41:39 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:41:39 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:41:39 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 07:41:39 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:41:39 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 07:41:39 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 07:41:39 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 07:41:39 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 07:41:39 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 07:41:39 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:41:39 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:41:39 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 07:41:39 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 07:41:39 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 07:41:39 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 07:41:39 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 07:41:39 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 07:41:39 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:41:39 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:41:39 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 07:41:39 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 07:41:39 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 07:41:39 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 07:41:39 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 07:41:39 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 07:41:39 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:41:39 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:41:39 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 07:41:39 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 07:41:39 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 07:41:39 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 07:41:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 07:41:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 07:41:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 07:41:39 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 07:41:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 07:41:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 07:41:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 07:41:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 07:41:39 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 07:41:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:41:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:41:39 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 07:41:39 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 07:41:39 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 07:41:39 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 07:41:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:41:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:41:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:41:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 07:41:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:41:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:41:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:41:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:41:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:41:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:41:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:41:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:41:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:41:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:41:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:41:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:41:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:41:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:41:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:41:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:41:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:41:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:41:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:41:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:41:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:41:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:41:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:41:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:41:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:41:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:41:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:41:39 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-03-30 07:41:39 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-03-30 07:41:39 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-03-30 07:41:39 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-03-30 07:41:39 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-03-30 07:41:39 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-03-30 07:41:39 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-03-30 07:41:39 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-03-30 07:41:39 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-03-30 07:41:39 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-03-30 07:41:39 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 07:41:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:41:39 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 07:41:39 [DEBUG] fake_trx.py:317 (BTS@172.18.26.20:5700) Recv FAKE_CI cmd
2025-03-30 07:41:39 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:41:39 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:41:39 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:41:39 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:41:39 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:41:39 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:41:39 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:41:39 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 07:41:39 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 07:41:39 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 07:41:39 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:41:39 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=114 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:41:39 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=114 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:41:39 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=114 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:41:39 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=114 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:41:39 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=114 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:41:39 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=114 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:41:39 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=114 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:41:39 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=114 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:41:44 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 07:41:44 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 07:41:44 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:41:44 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:41:44 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:41:44 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:41:44 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:41:44 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 07:41:44 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:41:44 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 07:41:44 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 07:41:44 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 07:41:44 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 07:41:44 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 07:41:44 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:41:44 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:41:44 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 07:41:44 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 07:41:44 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 07:41:44 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 07:41:44 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 07:41:44 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 07:41:44 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:41:44 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:41:44 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 07:41:44 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 07:41:44 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 07:41:44 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 07:41:44 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 07:41:44 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 07:41:44 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:41:44 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:41:44 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 07:41:44 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 07:41:44 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 07:41:44 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 07:41:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 07:41:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 07:41:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 07:41:44 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 07:41:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 07:41:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 07:41:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 07:41:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:41:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 07:41:44 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 07:41:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:41:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:41:44 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 07:41:44 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 07:41:44 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 07:41:44 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 07:41:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:41:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:41:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:41:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 07:41:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:41:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:41:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:41:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:41:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:41:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:41:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:41:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:41:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:41:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:41:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:41:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:41:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:41:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:41:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:41:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:41:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:41:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:41:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:41:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:41:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:41:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:41:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:41:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:41:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:41:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:41:44 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-03-30 07:41:45 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-03-30 07:41:45 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=107): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-03-30 07:41:45 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=107): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-03-30 07:41:45 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=107): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-03-30 07:41:45 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=107): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-03-30 07:41:45 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=107): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-03-30 07:41:45 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=107): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-03-30 07:41:45 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=107): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-03-30 07:41:45 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=107): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-03-30 07:41:45 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=107): ver=1 fn=105 tn=0 bl=148 pwr=0
2025-03-30 07:41:45 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=107): ver=1 fn=105 tn=1 bl=148 pwr=0
2025-03-30 07:41:45 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=107): ver=1 fn=105 tn=2 bl=148 pwr=0
2025-03-30 07:41:45 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=107): ver=1 fn=105 tn=3 bl=148 pwr=0
2025-03-30 07:41:45 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=107): ver=1 fn=105 tn=4 bl=148 pwr=0
2025-03-30 07:41:45 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=107): ver=1 fn=105 tn=5 bl=148 pwr=0
2025-03-30 07:41:45 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=107): ver=1 fn=105 tn=6 bl=148 pwr=0
2025-03-30 07:41:45 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=107): ver=1 fn=105 tn=7 bl=148 pwr=0
2025-03-30 07:41:45 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=107): ver=1 fn=106 tn=0 bl=148 pwr=0
2025-03-30 07:41:45 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=107): ver=1 fn=106 tn=1 bl=148 pwr=0
2025-03-30 07:41:45 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=107): ver=1 fn=106 tn=2 bl=148 pwr=0
2025-03-30 07:41:45 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=107): ver=1 fn=106 tn=3 bl=148 pwr=0
2025-03-30 07:41:45 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=107): ver=1 fn=106 tn=4 bl=148 pwr=0
2025-03-30 07:41:45 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=107): ver=1 fn=106 tn=5 bl=148 pwr=0
2025-03-30 07:41:45 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=107): ver=1 fn=106 tn=6 bl=148 pwr=0
2025-03-30 07:41:45 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=107): ver=1 fn=106 tn=7 bl=148 pwr=0
2025-03-30 07:41:45 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 07:41:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:41:45 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 07:41:45 [DEBUG] fake_trx.py:317 (BTS@172.18.26.20:5700) Recv FAKE_CI cmd
2025-03-30 07:41:45 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:41:45 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:41:45 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:41:45 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:41:45 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:41:45 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:41:45 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:41:45 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:41:45 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 07:41:45 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 07:41:45 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 07:41:45 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=115 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:41:45 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=115 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:41:45 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=115 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:41:45 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=115 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:41:45 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=115 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:41:45 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=115 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:41:50 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 07:41:50 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 07:41:50 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:41:50 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:41:50 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:41:50 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:41:50 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:41:50 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 07:41:50 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:41:50 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 07:41:50 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 07:41:50 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 07:41:50 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 07:41:50 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 07:41:50 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:41:50 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:41:50 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 07:41:50 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 07:41:50 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 07:41:50 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 07:41:50 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 07:41:50 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 07:41:50 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:41:50 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:41:50 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 07:41:50 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 07:41:50 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 07:41:50 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 07:41:50 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 07:41:50 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 07:41:50 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:41:50 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:41:50 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 07:41:50 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 07:41:50 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 07:41:50 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 07:41:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 07:41:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 07:41:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 07:41:50 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 07:41:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 07:41:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 07:41:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 07:41:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:41:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 07:41:50 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 07:41:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:41:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:41:50 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 07:41:50 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 07:41:50 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 07:41:50 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 07:41:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:41:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:41:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:41:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 07:41:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:41:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:41:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:41:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:41:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:41:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:41:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:41:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:41:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:41:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:41:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:41:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:41:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:41:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:41:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:41:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:41:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:41:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:41:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:41:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:41:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:41:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:41:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:41:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:41:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:41:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:41:50 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-03-30 07:41:50 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-03-30 07:41:50 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-03-30 07:41:50 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-03-30 07:41:50 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-03-30 07:41:50 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-03-30 07:41:50 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-03-30 07:41:50 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-03-30 07:41:50 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-03-30 07:41:50 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-03-30 07:41:50 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=0 bl=148 pwr=0
2025-03-30 07:41:50 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=1 bl=148 pwr=0
2025-03-30 07:41:50 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=2 bl=148 pwr=0
2025-03-30 07:41:50 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=3 bl=148 pwr=0
2025-03-30 07:41:50 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=4 bl=148 pwr=0
2025-03-30 07:41:50 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=5 bl=148 pwr=0
2025-03-30 07:41:50 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=6 bl=148 pwr=0
2025-03-30 07:41:50 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=7 bl=148 pwr=0
2025-03-30 07:41:50 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 07:41:50 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 07:41:50 [DEBUG] fake_trx.py:317 (BTS@172.18.26.20:5700) Recv FAKE_CI cmd
2025-03-30 07:41:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:41:50 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:41:50 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:41:50 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:41:50 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:41:50 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:41:50 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:41:50 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:41:50 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 07:41:50 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 07:41:50 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 07:41:50 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:41:55 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 07:41:56 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 07:41:56 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:41:56 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:41:56 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:41:56 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:41:56 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:41:56 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 07:41:56 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:41:56 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 07:41:56 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 07:41:56 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 07:41:56 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 07:41:56 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 07:41:56 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:41:56 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 07:41:56 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:41:56 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 07:41:56 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 07:41:56 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 07:41:56 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 07:41:56 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 07:41:56 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:41:56 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:41:56 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 07:41:56 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 07:41:56 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 07:41:56 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 07:41:56 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 07:41:56 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 07:41:56 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:41:56 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:41:56 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 07:41:56 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 07:41:56 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 07:41:56 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 07:41:56 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 07:41:56 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 07:41:56 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 07:41:56 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 07:41:56 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 07:41:56 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 07:41:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 07:41:56 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:41:56 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 07:41:56 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 07:41:56 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:41:56 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:41:56 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 07:41:56 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 07:41:56 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 07:41:56 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 07:41:56 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:41:56 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:41:56 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:41:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 07:41:56 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:41:56 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:41:56 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:41:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:41:56 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:41:56 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:41:56 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:41:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:41:56 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:41:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:41:56 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:41:56 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:41:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:41:56 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:41:56 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:41:56 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:41:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:41:56 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:41:56 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:41:56 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:41:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:41:56 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:41:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:41:56 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:41:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:41:56 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:41:56 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-03-30 07:41:56 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-03-30 07:41:56 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-03-30 07:41:56 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-03-30 07:41:56 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-03-30 07:41:56 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-03-30 07:41:56 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-03-30 07:41:56 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-03-30 07:41:56 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-03-30 07:41:56 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-03-30 07:41:56 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=105 tn=0 bl=148 pwr=0
2025-03-30 07:41:56 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=105 tn=1 bl=148 pwr=0
2025-03-30 07:41:56 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=105 tn=2 bl=148 pwr=0
2025-03-30 07:41:56 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=105 tn=3 bl=148 pwr=0
2025-03-30 07:41:56 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=105 tn=4 bl=148 pwr=0
2025-03-30 07:41:56 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=105 tn=5 bl=148 pwr=0
2025-03-30 07:41:56 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=105 tn=6 bl=148 pwr=0
2025-03-30 07:41:56 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=105 tn=7 bl=148 pwr=0
2025-03-30 07:41:56 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=106 tn=0 bl=148 pwr=0
2025-03-30 07:41:56 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=106 tn=1 bl=148 pwr=0
2025-03-30 07:41:56 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=106 tn=2 bl=148 pwr=0
2025-03-30 07:41:56 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=106 tn=3 bl=148 pwr=0
2025-03-30 07:41:56 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=106 tn=4 bl=148 pwr=0
2025-03-30 07:41:56 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=106 tn=5 bl=148 pwr=0
2025-03-30 07:41:56 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=106 tn=6 bl=148 pwr=0
2025-03-30 07:41:56 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=106 tn=7 bl=148 pwr=0
2025-03-30 07:41:56 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=107 tn=0 bl=148 pwr=0
2025-03-30 07:41:56 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=107 tn=1 bl=148 pwr=0
2025-03-30 07:41:56 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=107 tn=2 bl=148 pwr=0
2025-03-30 07:41:56 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=107 tn=3 bl=148 pwr=0
2025-03-30 07:41:56 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=107 tn=4 bl=148 pwr=0
2025-03-30 07:41:56 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=107 tn=5 bl=148 pwr=0
2025-03-30 07:41:56 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=107 tn=6 bl=148 pwr=0
2025-03-30 07:41:56 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=107 tn=7 bl=148 pwr=0
2025-03-30 07:41:56 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 07:41:56 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 07:41:56 [DEBUG] fake_trx.py:317 (BTS@172.18.26.20:5700) Recv FAKE_CI cmd
2025-03-30 07:41:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:41:56 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:41:56 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:41:56 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:41:56 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:41:56 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:41:56 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:41:56 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:41:56 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:41:56 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 07:41:56 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 07:41:56 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 07:42:01 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 07:42:01 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 07:42:01 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:42:01 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:42:01 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:42:01 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:42:01 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:42:01 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 07:42:01 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:42:01 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 07:42:01 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 07:42:01 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 07:42:01 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 07:42:01 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 07:42:01 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:42:01 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:42:01 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 07:42:01 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 07:42:01 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 07:42:01 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 07:42:01 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 07:42:01 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 07:42:01 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:42:01 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:42:01 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 07:42:01 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 07:42:01 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 07:42:01 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 07:42:01 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 07:42:01 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 07:42:01 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:42:01 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:42:01 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 07:42:01 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 07:42:01 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 07:42:01 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 07:42:01 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 07:42:01 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 07:42:01 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 07:42:01 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 07:42:01 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 07:42:01 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 07:42:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 07:42:01 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:42:01 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 07:42:01 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 07:42:01 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:42:01 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:42:01 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 07:42:01 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 07:42:01 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 07:42:01 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 07:42:01 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:42:01 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:42:01 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:42:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 07:42:01 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:42:01 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:42:01 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:42:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:42:01 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:42:01 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:42:01 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:42:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:42:01 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:42:01 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:42:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:42:01 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:42:01 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:42:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:42:01 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:42:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:42:01 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:42:01 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:42:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:42:01 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:42:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:42:01 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:42:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:42:01 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:42:01 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:42:01 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:42:01 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-03-30 07:42:02 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-03-30 07:42:02 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-03-30 07:42:02 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-03-30 07:42:02 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-03-30 07:42:02 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-03-30 07:42:02 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-03-30 07:42:02 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-03-30 07:42:02 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-03-30 07:42:02 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-03-30 07:42:02 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 07:42:02 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 07:42:02 [DEBUG] fake_trx.py:317 (BTS@172.18.26.20:5700) Recv FAKE_CI cmd
2025-03-30 07:42:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:42:02 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-03-30 07:42:02 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:42:02 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:42:02 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:42:02 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:42:02 [DEBUG] clck_gen.py:128 IND CLOCK 306
2025-03-30 07:42:03 [DEBUG] clck_gen.py:128 IND CLOCK 408
2025-03-30 07:42:03 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:42:03 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:42:03 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:42:03 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:42:03 [DEBUG] clck_gen.py:128 IND CLOCK 510
2025-03-30 07:42:04 [DEBUG] clck_gen.py:128 IND CLOCK 612
2025-03-30 07:42:04 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:42:04 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:42:04 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:42:04 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:42:04 [DEBUG] clck_gen.py:128 IND CLOCK 714
2025-03-30 07:42:05 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:42:05 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:42:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:42:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:42:05 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:42:05 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:42:05 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 07:42:05 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 07:42:05 [DEBUG] clck_gen.py:128 IND CLOCK 816
2025-03-30 07:42:05 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:42:05 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:42:05 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:42:05 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:42:05 [DEBUG] clck_gen.py:128 IND CLOCK 918
2025-03-30 07:42:06 [DEBUG] clck_gen.py:128 IND CLOCK 1020
2025-03-30 07:42:06 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:42:06 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:42:06 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:42:06 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:42:06 [DEBUG] clck_gen.py:128 IND CLOCK 1122
2025-03-30 07:42:07 [DEBUG] clck_gen.py:128 IND CLOCK 1224
2025-03-30 07:42:07 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:42:07 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:42:07 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:42:07 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:42:07 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:42:07 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:42:07 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:42:07 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:42:07 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:42:07 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:42:07 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 07:42:07 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 07:42:07 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 07:42:07 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=1251 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:42:07 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=1251 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:42:07 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=1251 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:42:07 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=1251 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:42:07 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=1251 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:42:07 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=1251 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:42:07 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=1251 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:42:07 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=1251 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:42:07 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=1252 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:42:07 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=1252 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:42:07 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=1252 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:42:07 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=1252 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:42:07 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=1252 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:42:07 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=1252 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:42:07 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=1252 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:42:07 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=1252 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:42:12 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 07:42:12 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 07:42:12 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:42:12 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:42:12 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:42:12 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:42:12 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:42:12 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 07:42:12 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:42:12 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 07:42:12 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 07:42:12 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 07:42:12 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 07:42:12 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 07:42:12 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:42:12 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:42:12 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 07:42:12 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 07:42:12 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 07:42:12 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 07:42:12 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 07:42:12 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 07:42:12 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:42:12 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:42:12 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 07:42:12 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 07:42:12 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 07:42:12 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 07:42:12 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 07:42:12 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 07:42:12 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:42:12 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:42:12 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 07:42:12 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 07:42:12 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 07:42:12 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 07:42:12 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 07:42:12 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 07:42:12 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 07:42:12 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 07:42:12 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 07:42:12 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 07:42:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 07:42:12 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:42:12 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 07:42:12 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 07:42:12 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:42:12 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:42:12 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 07:42:12 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 07:42:12 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 07:42:12 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 07:42:12 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:42:12 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:42:12 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:42:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 07:42:12 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:42:12 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:42:12 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:42:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:42:12 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:42:12 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:42:12 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:42:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:42:12 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:42:12 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:42:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:42:12 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:42:12 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:42:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:42:12 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:42:12 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:42:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:42:12 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:42:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:42:12 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:42:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:42:12 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:42:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:42:12 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:42:12 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:42:12 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:42:12 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-03-30 07:42:12 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-03-30 07:42:12 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-03-30 07:42:12 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-03-30 07:42:12 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-03-30 07:42:12 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-03-30 07:42:12 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-03-30 07:42:12 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-03-30 07:42:12 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-03-30 07:42:12 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-03-30 07:42:12 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 07:42:12 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 07:42:12 [DEBUG] fake_trx.py:317 (BTS@172.18.26.20:5700) Recv FAKE_CI cmd
2025-03-30 07:42:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:42:12 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:42:12 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:42:12 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:42:12 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:42:12 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:42:12 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:42:12 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:42:12 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:42:12 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:42:12 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:42:12 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:42:12 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 07:42:12 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 07:42:12 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 07:42:12 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=115 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:42:12 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=115 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:42:12 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=115 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:42:12 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=115 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:42:12 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=115 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:42:12 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=115 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:42:17 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 07:42:17 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 07:42:17 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:42:17 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:42:17 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:42:17 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:42:17 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:42:17 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 07:42:17 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:42:17 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 07:42:17 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 07:42:17 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 07:42:17 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 07:42:17 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 07:42:17 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:42:17 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:42:17 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 07:42:17 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 07:42:17 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 07:42:17 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 07:42:17 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 07:42:17 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 07:42:17 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:42:17 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:42:17 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 07:42:17 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 07:42:17 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 07:42:17 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 07:42:17 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 07:42:17 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 07:42:17 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:42:17 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 07:42:17 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:42:17 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 07:42:17 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 07:42:17 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 07:42:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 07:42:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 07:42:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 07:42:17 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 07:42:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 07:42:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 07:42:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 07:42:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:42:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 07:42:17 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 07:42:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:42:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:42:17 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 07:42:17 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 07:42:17 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 07:42:17 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 07:42:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:42:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:42:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:42:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 07:42:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:42:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:42:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:42:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:42:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:42:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:42:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:42:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:42:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:42:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:42:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:42:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:42:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:42:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:42:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:42:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:42:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:42:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:42:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:42:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:42:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:42:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:42:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:42:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:42:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:42:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:42:17 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-03-30 07:42:18 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-03-30 07:42:18 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-03-30 07:42:18 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-03-30 07:42:18 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-03-30 07:42:18 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-03-30 07:42:18 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-03-30 07:42:18 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-03-30 07:42:18 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-03-30 07:42:18 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-03-30 07:42:18 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 07:42:18 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 07:42:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:42:18 [DEBUG] fake_trx.py:317 (BTS@172.18.26.20:5700) Recv FAKE_CI cmd
2025-03-30 07:42:18 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:42:18 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:42:18 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:42:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:42:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:42:18 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:42:18 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:42:18 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:42:18 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:42:18 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:42:18 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:42:18 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:42:18 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:42:18 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 07:42:18 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 07:42:18 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 07:42:18 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=123 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:42:18 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=123 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:42:18 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=123 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:42:18 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=123 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:42:18 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=123 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:42:18 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=123 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:42:18 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=123 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:42:18 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=123 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:42:23 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 07:42:23 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 07:42:23 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:42:23 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:42:23 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:42:23 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:42:23 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:42:23 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 07:42:23 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:42:23 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 07:42:23 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 07:42:23 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 07:42:23 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 07:42:23 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 07:42:23 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:42:23 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:42:23 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 07:42:23 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 07:42:23 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 07:42:23 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 07:42:23 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 07:42:23 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 07:42:23 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:42:23 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:42:23 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 07:42:23 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 07:42:23 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 07:42:23 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 07:42:23 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 07:42:23 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 07:42:23 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:42:23 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:42:23 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 07:42:23 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 07:42:23 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 07:42:23 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 07:42:23 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 07:42:23 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 07:42:23 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 07:42:23 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 07:42:23 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 07:42:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 07:42:23 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 07:42:23 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 07:42:23 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 07:42:23 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:42:23 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:42:23 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 07:42:23 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 07:42:23 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 07:42:23 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 07:42:23 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:42:23 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:42:23 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:42:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 07:42:23 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:42:23 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:42:23 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:42:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:42:23 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:42:23 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:42:23 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:42:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:42:23 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:42:23 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:42:23 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:42:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:42:23 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:42:23 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:42:23 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:42:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:42:23 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:42:23 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:42:23 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:42:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:42:23 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:42:23 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:42:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:42:23 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:42:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:42:23 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:42:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:42:23 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-03-30 07:42:24 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-03-30 07:42:24 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=107): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-03-30 07:42:24 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=107): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-03-30 07:42:24 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=107): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-03-30 07:42:24 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=107): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-03-30 07:42:24 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=107): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-03-30 07:42:24 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=107): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-03-30 07:42:24 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=107): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-03-30 07:42:24 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=107): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-03-30 07:42:24 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=107): ver=1 fn=105 tn=0 bl=148 pwr=0
2025-03-30 07:42:24 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=107): ver=1 fn=105 tn=1 bl=148 pwr=0
2025-03-30 07:42:24 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=107): ver=1 fn=105 tn=2 bl=148 pwr=0
2025-03-30 07:42:24 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=107): ver=1 fn=105 tn=3 bl=148 pwr=0
2025-03-30 07:42:24 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=107): ver=1 fn=105 tn=4 bl=148 pwr=0
2025-03-30 07:42:24 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=107): ver=1 fn=105 tn=5 bl=148 pwr=0
2025-03-30 07:42:24 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=107): ver=1 fn=105 tn=6 bl=148 pwr=0
2025-03-30 07:42:24 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=107): ver=1 fn=105 tn=7 bl=148 pwr=0
2025-03-30 07:42:24 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=107): ver=1 fn=106 tn=0 bl=148 pwr=0
2025-03-30 07:42:24 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=107): ver=1 fn=106 tn=1 bl=148 pwr=0
2025-03-30 07:42:24 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=107): ver=1 fn=106 tn=2 bl=148 pwr=0
2025-03-30 07:42:24 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=107): ver=1 fn=106 tn=3 bl=148 pwr=0
2025-03-30 07:42:24 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=107): ver=1 fn=106 tn=4 bl=148 pwr=0
2025-03-30 07:42:24 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=107): ver=1 fn=106 tn=5 bl=148 pwr=0
2025-03-30 07:42:24 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=107): ver=1 fn=106 tn=6 bl=148 pwr=0
2025-03-30 07:42:24 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=107): ver=1 fn=106 tn=7 bl=148 pwr=0
2025-03-30 07:42:24 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 07:42:24 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 07:42:24 [DEBUG] fake_trx.py:317 (BTS@172.18.26.20:5700) Recv FAKE_CI cmd
2025-03-30 07:42:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:42:24 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:42:24 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:42:24 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:42:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:42:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:42:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:42:24 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:42:24 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:42:24 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:42:24 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:42:24 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:42:24 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:42:24 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:42:24 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:42:24 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 07:42:24 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 07:42:24 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 07:42:29 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 07:42:29 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 07:42:29 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:42:29 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:42:29 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:42:29 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:42:29 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:42:29 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 07:42:29 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:42:29 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 07:42:29 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 07:42:29 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 07:42:29 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 07:42:29 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 07:42:29 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:42:29 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:42:29 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 07:42:29 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 07:42:29 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 07:42:29 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 07:42:29 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 07:42:29 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 07:42:29 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:42:29 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:42:29 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 07:42:29 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 07:42:29 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 07:42:29 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 07:42:29 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 07:42:29 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 07:42:29 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:42:29 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:42:29 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 07:42:29 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 07:42:29 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 07:42:29 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 07:42:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 07:42:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 07:42:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 07:42:29 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 07:42:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 07:42:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 07:42:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 07:42:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:42:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 07:42:29 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 07:42:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:42:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:42:29 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 07:42:29 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 07:42:29 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 07:42:29 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 07:42:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:42:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:42:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:42:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 07:42:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:42:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:42:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:42:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:42:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:42:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:42:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:42:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:42:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:42:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:42:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:42:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:42:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:42:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:42:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:42:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:42:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:42:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:42:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:42:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:42:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:42:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:42:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:42:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:42:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:42:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:42:29 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-03-30 07:42:29 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-03-30 07:42:29 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-03-30 07:42:29 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-03-30 07:42:29 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-03-30 07:42:29 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-03-30 07:42:29 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-03-30 07:42:29 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-03-30 07:42:29 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-03-30 07:42:29 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-03-30 07:42:29 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=0 bl=148 pwr=0
2025-03-30 07:42:29 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=1 bl=148 pwr=0
2025-03-30 07:42:29 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=2 bl=148 pwr=0
2025-03-30 07:42:29 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=3 bl=148 pwr=0
2025-03-30 07:42:29 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=4 bl=148 pwr=0
2025-03-30 07:42:29 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=5 bl=148 pwr=0
2025-03-30 07:42:29 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=6 bl=148 pwr=0
2025-03-30 07:42:29 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=7 bl=148 pwr=0
2025-03-30 07:42:29 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 07:42:29 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 07:42:29 [DEBUG] fake_trx.py:317 (BTS@172.18.26.20:5700) Recv FAKE_CI cmd
2025-03-30 07:42:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:42:29 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:42:29 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:42:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:42:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:42:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:42:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:42:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:42:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:42:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:42:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:42:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:42:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:42:29 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:42:29 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:42:29 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:42:29 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:42:29 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:42:29 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:42:29 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:42:29 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:42:29 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 07:42:29 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 07:42:29 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 07:42:29 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=136 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:42:29 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=136 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:42:29 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=136 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:42:29 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=136 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:42:29 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=136 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:42:29 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=136 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:42:29 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=137 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:42:29 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=137 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:42:29 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=137 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:42:29 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=137 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:42:29 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=137 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:42:29 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=137 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:42:29 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=137 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:42:29 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=137 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:42:34 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 07:42:34 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 07:42:34 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:42:34 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:42:34 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:42:34 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:42:34 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:42:34 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 07:42:34 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:42:34 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 07:42:34 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 07:42:34 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 07:42:34 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 07:42:34 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 07:42:34 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:42:34 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:42:34 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 07:42:34 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 07:42:34 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 07:42:34 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 07:42:34 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 07:42:34 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 07:42:34 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:42:34 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:42:34 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 07:42:34 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 07:42:34 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 07:42:34 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 07:42:34 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 07:42:34 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 07:42:34 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:42:34 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:42:34 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 07:42:34 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 07:42:34 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 07:42:34 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 07:42:34 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 07:42:34 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 07:42:34 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 07:42:34 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 07:42:34 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 07:42:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 07:42:34 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 07:42:34 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 07:42:34 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 07:42:34 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:42:34 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:42:34 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 07:42:34 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 07:42:34 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 07:42:34 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 07:42:34 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:42:34 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:42:34 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:42:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 07:42:34 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:42:34 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:42:34 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:42:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:42:34 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:42:34 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:42:34 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:42:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:42:34 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:42:34 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:42:34 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:42:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:42:34 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:42:34 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:42:34 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:42:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:42:34 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:42:34 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:42:34 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:42:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:42:34 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:42:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:42:34 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:42:34 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:42:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:42:34 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:42:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:42:34 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-03-30 07:42:35 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-03-30 07:42:35 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-03-30 07:42:35 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-03-30 07:42:35 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-03-30 07:42:35 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-03-30 07:42:35 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-03-30 07:42:35 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-03-30 07:42:35 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-03-30 07:42:35 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-03-30 07:42:35 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=105 tn=0 bl=148 pwr=0
2025-03-30 07:42:35 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=105 tn=1 bl=148 pwr=0
2025-03-30 07:42:35 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=105 tn=2 bl=148 pwr=0
2025-03-30 07:42:35 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=105 tn=3 bl=148 pwr=0
2025-03-30 07:42:35 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=105 tn=4 bl=148 pwr=0
2025-03-30 07:42:35 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=105 tn=5 bl=148 pwr=0
2025-03-30 07:42:35 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=105 tn=6 bl=148 pwr=0
2025-03-30 07:42:35 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=105 tn=7 bl=148 pwr=0
2025-03-30 07:42:35 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=106 tn=0 bl=148 pwr=0
2025-03-30 07:42:35 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=106 tn=1 bl=148 pwr=0
2025-03-30 07:42:35 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=106 tn=2 bl=148 pwr=0
2025-03-30 07:42:35 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=106 tn=3 bl=148 pwr=0
2025-03-30 07:42:35 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=106 tn=4 bl=148 pwr=0
2025-03-30 07:42:35 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=106 tn=5 bl=148 pwr=0
2025-03-30 07:42:35 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=106 tn=6 bl=148 pwr=0
2025-03-30 07:42:35 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=106 tn=7 bl=148 pwr=0
2025-03-30 07:42:35 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=107 tn=0 bl=148 pwr=0
2025-03-30 07:42:35 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=107 tn=1 bl=148 pwr=0
2025-03-30 07:42:35 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=107 tn=2 bl=148 pwr=0
2025-03-30 07:42:35 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=107 tn=3 bl=148 pwr=0
2025-03-30 07:42:35 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=107 tn=4 bl=148 pwr=0
2025-03-30 07:42:35 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=107 tn=5 bl=148 pwr=0
2025-03-30 07:42:35 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=107 tn=6 bl=148 pwr=0
2025-03-30 07:42:35 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=107 tn=7 bl=148 pwr=0
2025-03-30 07:42:35 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 07:42:35 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 07:42:35 [DEBUG] fake_trx.py:317 (BTS@172.18.26.20:5700) Recv FAKE_CI cmd
2025-03-30 07:42:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:42:35 [DEBUG] fake_trx.py:377 (BTS@172.18.26.20:5700) Recv FAKE_TRXC_DELAY cmd
2025-03-30 07:42:35 [INFO] fake_trx.py:380 (BTS@172.18.26.20:5700) Artificial TRXC delay set to 200
2025-03-30 07:42:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD FAKE_TRXC_DELAY
2025-03-30 07:42:35 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=156): ver=1 fn=114 tn=0 bl=148 pwr=0
2025-03-30 07:42:35 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=156): ver=1 fn=114 tn=1 bl=148 pwr=0
2025-03-30 07:42:35 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=156): ver=1 fn=114 tn=2 bl=148 pwr=0
2025-03-30 07:42:35 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=156): ver=1 fn=114 tn=3 bl=148 pwr=0
2025-03-30 07:42:35 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=156): ver=1 fn=114 tn=4 bl=148 pwr=0
2025-03-30 07:42:35 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=156): ver=1 fn=114 tn=5 bl=148 pwr=0
2025-03-30 07:42:35 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=156): ver=1 fn=114 tn=6 bl=148 pwr=0
2025-03-30 07:42:35 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=156): ver=1 fn=114 tn=7 bl=148 pwr=0
2025-03-30 07:42:35 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=156): ver=1 fn=115 tn=0 bl=148 pwr=0
2025-03-30 07:42:35 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=156): ver=1 fn=115 tn=1 bl=148 pwr=0
2025-03-30 07:42:35 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=156): ver=1 fn=115 tn=2 bl=148 pwr=0
2025-03-30 07:42:35 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=156): ver=1 fn=115 tn=3 bl=148 pwr=0
2025-03-30 07:42:35 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=156): ver=1 fn=115 tn=4 bl=148 pwr=0
2025-03-30 07:42:35 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=156): ver=1 fn=115 tn=5 bl=148 pwr=0
2025-03-30 07:42:35 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=156): ver=1 fn=115 tn=6 bl=148 pwr=0
2025-03-30 07:42:35 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=156): ver=1 fn=115 tn=7 bl=148 pwr=0
2025-03-30 07:42:35 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=156): ver=1 fn=116 tn=0 bl=148 pwr=0
2025-03-30 07:42:35 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=156): ver=1 fn=116 tn=1 bl=148 pwr=0
2025-03-30 07:42:35 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=156): ver=1 fn=116 tn=2 bl=148 pwr=0
2025-03-30 07:42:35 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=156): ver=1 fn=116 tn=3 bl=148 pwr=0
2025-03-30 07:42:35 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=156): ver=1 fn=116 tn=4 bl=148 pwr=0
2025-03-30 07:42:35 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=156): ver=1 fn=116 tn=5 bl=148 pwr=0
2025-03-30 07:42:35 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=156): ver=1 fn=116 tn=6 bl=148 pwr=0
2025-03-30 07:42:35 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=156): ver=1 fn=116 tn=7 bl=148 pwr=0
2025-03-30 07:42:35 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=156): ver=1 fn=117 tn=0 bl=148 pwr=0
2025-03-30 07:42:35 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=156): ver=1 fn=117 tn=1 bl=148 pwr=0
2025-03-30 07:42:35 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=156): ver=1 fn=117 tn=2 bl=148 pwr=0
2025-03-30 07:42:35 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=156): ver=1 fn=117 tn=3 bl=148 pwr=0
2025-03-30 07:42:35 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=156): ver=1 fn=117 tn=4 bl=148 pwr=0
2025-03-30 07:42:35 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=156): ver=1 fn=117 tn=5 bl=148 pwr=0
2025-03-30 07:42:35 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=156): ver=1 fn=117 tn=6 bl=148 pwr=0
2025-03-30 07:42:35 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=156): ver=1 fn=117 tn=7 bl=148 pwr=0
2025-03-30 07:42:35 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=156): ver=1 fn=118 tn=0 bl=148 pwr=0
2025-03-30 07:42:35 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=156): ver=1 fn=118 tn=1 bl=148 pwr=0
2025-03-30 07:42:35 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=156): ver=1 fn=118 tn=2 bl=148 pwr=0
2025-03-30 07:42:35 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=156): ver=1 fn=118 tn=3 bl=148 pwr=0
2025-03-30 07:42:35 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=156): ver=1 fn=118 tn=4 bl=148 pwr=0
2025-03-30 07:42:35 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=156): ver=1 fn=118 tn=5 bl=148 pwr=0
2025-03-30 07:42:35 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=156): ver=1 fn=118 tn=6 bl=148 pwr=0
2025-03-30 07:42:35 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=156): ver=1 fn=118 tn=7 bl=148 pwr=0
2025-03-30 07:42:35 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=156): ver=1 fn=119 tn=0 bl=148 pwr=0
2025-03-30 07:42:35 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=156): ver=1 fn=119 tn=1 bl=148 pwr=0
2025-03-30 07:42:35 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=156): ver=1 fn=119 tn=2 bl=148 pwr=0
2025-03-30 07:42:35 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=156): ver=1 fn=119 tn=3 bl=148 pwr=0
2025-03-30 07:42:35 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=156): ver=1 fn=119 tn=4 bl=148 pwr=0
2025-03-30 07:42:35 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=156): ver=1 fn=119 tn=5 bl=148 pwr=0
2025-03-30 07:42:35 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=156): ver=1 fn=119 tn=6 bl=148 pwr=0
2025-03-30 07:42:35 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=156): ver=1 fn=119 tn=7 bl=148 pwr=0
2025-03-30 07:42:35 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=156): ver=1 fn=120 tn=0 bl=148 pwr=0
2025-03-30 07:42:35 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=156): ver=1 fn=120 tn=1 bl=148 pwr=0
2025-03-30 07:42:35 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=156): ver=1 fn=120 tn=2 bl=148 pwr=0
2025-03-30 07:42:35 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=156): ver=1 fn=120 tn=3 bl=148 pwr=0
2025-03-30 07:42:35 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=156): ver=1 fn=120 tn=4 bl=148 pwr=0
2025-03-30 07:42:35 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=156): ver=1 fn=120 tn=5 bl=148 pwr=0
2025-03-30 07:42:35 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=156): ver=1 fn=120 tn=6 bl=148 pwr=0
2025-03-30 07:42:35 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=156): ver=1 fn=120 tn=7 bl=148 pwr=0
2025-03-30 07:42:35 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=156): ver=1 fn=121 tn=0 bl=148 pwr=0
2025-03-30 07:42:35 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=156): ver=1 fn=121 tn=1 bl=148 pwr=0
2025-03-30 07:42:35 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=156): ver=1 fn=121 tn=2 bl=148 pwr=0
2025-03-30 07:42:35 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=156): ver=1 fn=121 tn=3 bl=148 pwr=0
2025-03-30 07:42:35 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=156): ver=1 fn=121 tn=4 bl=148 pwr=0
2025-03-30 07:42:35 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=156): ver=1 fn=121 tn=5 bl=148 pwr=0
2025-03-30 07:42:35 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=156): ver=1 fn=121 tn=6 bl=148 pwr=0
2025-03-30 07:42:35 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=156): ver=1 fn=121 tn=7 bl=148 pwr=0
2025-03-30 07:42:35 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=156): ver=1 fn=122 tn=0 bl=148 pwr=0
2025-03-30 07:42:35 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=156): ver=1 fn=122 tn=1 bl=148 pwr=0
2025-03-30 07:42:35 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=156): ver=1 fn=122 tn=2 bl=148 pwr=0
2025-03-30 07:42:35 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=156): ver=1 fn=122 tn=3 bl=148 pwr=0
2025-03-30 07:42:35 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=156): ver=1 fn=122 tn=4 bl=148 pwr=0
2025-03-30 07:42:35 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=156): ver=1 fn=122 tn=5 bl=148 pwr=0
2025-03-30 07:42:35 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=156): ver=1 fn=122 tn=6 bl=148 pwr=0
2025-03-30 07:42:35 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=156): ver=1 fn=122 tn=7 bl=148 pwr=0
2025-03-30 07:42:35 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=156): ver=1 fn=123 tn=0 bl=148 pwr=0
2025-03-30 07:42:35 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=156): ver=1 fn=123 tn=1 bl=148 pwr=0
2025-03-30 07:42:35 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=156): ver=1 fn=123 tn=2 bl=148 pwr=0
2025-03-30 07:42:35 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=156): ver=1 fn=123 tn=3 bl=148 pwr=0
2025-03-30 07:42:35 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=156): ver=1 fn=123 tn=4 bl=148 pwr=0
2025-03-30 07:42:35 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=156): ver=1 fn=123 tn=5 bl=148 pwr=0
2025-03-30 07:42:35 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=156): ver=1 fn=123 tn=6 bl=148 pwr=0
2025-03-30 07:42:35 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=156): ver=1 fn=123 tn=7 bl=148 pwr=0
2025-03-30 07:42:35 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=156): ver=1 fn=124 tn=0 bl=148 pwr=0
2025-03-30 07:42:35 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=156): ver=1 fn=124 tn=1 bl=148 pwr=0
2025-03-30 07:42:35 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=156): ver=1 fn=124 tn=2 bl=148 pwr=0
2025-03-30 07:42:35 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=156): ver=1 fn=124 tn=3 bl=148 pwr=0
2025-03-30 07:42:35 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=156): ver=1 fn=124 tn=4 bl=148 pwr=0
2025-03-30 07:42:35 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=156): ver=1 fn=124 tn=5 bl=148 pwr=0
2025-03-30 07:42:35 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=156): ver=1 fn=124 tn=6 bl=148 pwr=0
2025-03-30 07:42:35 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=156): ver=1 fn=124 tn=7 bl=148 pwr=0
2025-03-30 07:42:35 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=156): ver=1 fn=125 tn=0 bl=148 pwr=0
2025-03-30 07:42:35 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=156): ver=1 fn=125 tn=1 bl=148 pwr=0
2025-03-30 07:42:35 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=156): ver=1 fn=125 tn=2 bl=148 pwr=0
2025-03-30 07:42:35 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=156): ver=1 fn=125 tn=3 bl=148 pwr=0
2025-03-30 07:42:35 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=156): ver=1 fn=125 tn=4 bl=148 pwr=0
2025-03-30 07:42:35 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=156): ver=1 fn=125 tn=5 bl=148 pwr=0
2025-03-30 07:42:35 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=156): ver=1 fn=125 tn=6 bl=148 pwr=0
2025-03-30 07:42:35 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=156): ver=1 fn=125 tn=7 bl=148 pwr=0
2025-03-30 07:42:35 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=156): ver=1 fn=126 tn=0 bl=148 pwr=0
2025-03-30 07:42:35 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=156): ver=1 fn=126 tn=1 bl=148 pwr=0
2025-03-30 07:42:35 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=156): ver=1 fn=126 tn=2 bl=148 pwr=0
2025-03-30 07:42:35 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=156): ver=1 fn=126 tn=3 bl=148 pwr=0
2025-03-30 07:42:35 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=156): ver=1 fn=126 tn=4 bl=148 pwr=0
2025-03-30 07:42:35 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=156): ver=1 fn=126 tn=5 bl=148 pwr=0
2025-03-30 07:42:35 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=156): ver=1 fn=126 tn=6 bl=148 pwr=0
2025-03-30 07:42:35 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=156): ver=1 fn=126 tn=7 bl=148 pwr=0
2025-03-30 07:42:35 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=156): ver=1 fn=127 tn=0 bl=148 pwr=0
2025-03-30 07:42:35 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=156): ver=1 fn=127 tn=1 bl=148 pwr=0
2025-03-30 07:42:35 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=156): ver=1 fn=127 tn=2 bl=148 pwr=0
2025-03-30 07:42:35 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=156): ver=1 fn=127 tn=3 bl=148 pwr=0
2025-03-30 07:42:35 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=156): ver=1 fn=127 tn=4 bl=148 pwr=0
2025-03-30 07:42:35 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=156): ver=1 fn=127 tn=5 bl=148 pwr=0
2025-03-30 07:42:35 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=156): ver=1 fn=127 tn=6 bl=148 pwr=0
2025-03-30 07:42:35 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=156): ver=1 fn=127 tn=7 bl=148 pwr=0
2025-03-30 07:42:35 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=156): ver=1 fn=128 tn=0 bl=148 pwr=0
2025-03-30 07:42:35 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=156): ver=1 fn=128 tn=1 bl=148 pwr=0
2025-03-30 07:42:35 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=156): ver=1 fn=128 tn=2 bl=148 pwr=0
2025-03-30 07:42:35 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=156): ver=1 fn=128 tn=3 bl=148 pwr=0
2025-03-30 07:42:35 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=156): ver=1 fn=128 tn=4 bl=148 pwr=0
2025-03-30 07:42:35 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=156): ver=1 fn=128 tn=5 bl=148 pwr=0
2025-03-30 07:42:35 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=156): ver=1 fn=128 tn=6 bl=148 pwr=0
2025-03-30 07:42:35 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=156): ver=1 fn=128 tn=7 bl=148 pwr=0
2025-03-30 07:42:35 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=156): ver=1 fn=129 tn=0 bl=148 pwr=0
2025-03-30 07:42:35 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=156): ver=1 fn=129 tn=1 bl=148 pwr=0
2025-03-30 07:42:35 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=156): ver=1 fn=129 tn=2 bl=148 pwr=0
2025-03-30 07:42:35 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=156): ver=1 fn=129 tn=3 bl=148 pwr=0
2025-03-30 07:42:35 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=156): ver=1 fn=129 tn=4 bl=148 pwr=0
2025-03-30 07:42:35 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=156): ver=1 fn=129 tn=5 bl=148 pwr=0
2025-03-30 07:42:35 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=156): ver=1 fn=129 tn=6 bl=148 pwr=0
2025-03-30 07:42:35 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=156): ver=1 fn=129 tn=7 bl=148 pwr=0
2025-03-30 07:42:35 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=156): ver=1 fn=130 tn=0 bl=148 pwr=0
2025-03-30 07:42:35 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=156): ver=1 fn=130 tn=1 bl=148 pwr=0
2025-03-30 07:42:35 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=156): ver=1 fn=130 tn=2 bl=148 pwr=0
2025-03-30 07:42:35 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=156): ver=1 fn=130 tn=3 bl=148 pwr=0
2025-03-30 07:42:35 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=156): ver=1 fn=130 tn=4 bl=148 pwr=0
2025-03-30 07:42:35 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=156): ver=1 fn=130 tn=5 bl=148 pwr=0
2025-03-30 07:42:35 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=156): ver=1 fn=130 tn=6 bl=148 pwr=0
2025-03-30 07:42:35 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=156): ver=1 fn=130 tn=7 bl=148 pwr=0
2025-03-30 07:42:35 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=156): ver=1 fn=131 tn=0 bl=148 pwr=0
2025-03-30 07:42:35 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=156): ver=1 fn=131 tn=1 bl=148 pwr=0
2025-03-30 07:42:35 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=156): ver=1 fn=131 tn=2 bl=148 pwr=0
2025-03-30 07:42:35 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=156): ver=1 fn=131 tn=3 bl=148 pwr=0
2025-03-30 07:42:35 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=156): ver=1 fn=131 tn=4 bl=148 pwr=0
2025-03-30 07:42:35 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=156): ver=1 fn=131 tn=5 bl=148 pwr=0
2025-03-30 07:42:35 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=156): ver=1 fn=131 tn=6 bl=148 pwr=0
2025-03-30 07:42:35 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=156): ver=1 fn=131 tn=7 bl=148 pwr=0
2025-03-30 07:42:35 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=156): ver=1 fn=132 tn=0 bl=148 pwr=0
2025-03-30 07:42:35 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=156): ver=1 fn=132 tn=1 bl=148 pwr=0
2025-03-30 07:42:35 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=156): ver=1 fn=132 tn=2 bl=148 pwr=0
2025-03-30 07:42:35 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=156): ver=1 fn=132 tn=3 bl=148 pwr=0
2025-03-30 07:42:35 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=156): ver=1 fn=132 tn=4 bl=148 pwr=0
2025-03-30 07:42:35 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=156): ver=1 fn=132 tn=5 bl=148 pwr=0
2025-03-30 07:42:35 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=156): ver=1 fn=132 tn=6 bl=148 pwr=0
2025-03-30 07:42:35 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=156): ver=1 fn=132 tn=7 bl=148 pwr=0
2025-03-30 07:42:35 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=156): ver=1 fn=133 tn=0 bl=148 pwr=0
2025-03-30 07:42:35 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=156): ver=1 fn=133 tn=1 bl=148 pwr=0
2025-03-30 07:42:35 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=156): ver=1 fn=133 tn=2 bl=148 pwr=0
2025-03-30 07:42:35 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=156): ver=1 fn=133 tn=3 bl=148 pwr=0
2025-03-30 07:42:35 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=156): ver=1 fn=133 tn=4 bl=148 pwr=0
2025-03-30 07:42:35 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=156): ver=1 fn=133 tn=5 bl=148 pwr=0
2025-03-30 07:42:35 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=156): ver=1 fn=133 tn=6 bl=148 pwr=0
2025-03-30 07:42:35 [WARNING] clck_gen.py:108 CLCKGen: time overrun by -6473us; resetting the clock
2025-03-30 07:42:35 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=157): ver=1 fn=133 tn=7 bl=148 pwr=0
2025-03-30 07:42:35 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=157): ver=1 fn=134 tn=0 bl=148 pwr=0
2025-03-30 07:42:35 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=157): ver=1 fn=134 tn=1 bl=148 pwr=0
2025-03-30 07:42:35 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=157): ver=1 fn=134 tn=2 bl=148 pwr=0
2025-03-30 07:42:35 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=157): ver=1 fn=134 tn=3 bl=148 pwr=0
2025-03-30 07:42:35 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=157): ver=1 fn=134 tn=4 bl=148 pwr=0
2025-03-30 07:42:35 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=157): ver=1 fn=134 tn=5 bl=148 pwr=0
2025-03-30 07:42:35 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=157): ver=1 fn=134 tn=6 bl=148 pwr=0
2025-03-30 07:42:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:42:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:42:35 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=202): ver=1 fn=162 tn=0 bl=148 pwr=0
2025-03-30 07:42:35 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=202): ver=1 fn=162 tn=1 bl=148 pwr=0
2025-03-30 07:42:35 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=202): ver=1 fn=162 tn=2 bl=148 pwr=0
2025-03-30 07:42:35 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=202): ver=1 fn=162 tn=3 bl=148 pwr=0
2025-03-30 07:42:35 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=202): ver=1 fn=162 tn=4 bl=148 pwr=0
2025-03-30 07:42:35 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=202): ver=1 fn=162 tn=5 bl=148 pwr=0
2025-03-30 07:42:35 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=202): ver=1 fn=162 tn=6 bl=148 pwr=0
2025-03-30 07:42:35 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=202): ver=1 fn=162 tn=7 bl=148 pwr=0
2025-03-30 07:42:35 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=202): ver=1 fn=163 tn=0 bl=148 pwr=0
2025-03-30 07:42:35 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=202): ver=1 fn=163 tn=1 bl=148 pwr=0
2025-03-30 07:42:35 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=202): ver=1 fn=163 tn=2 bl=148 pwr=0
2025-03-30 07:42:35 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=202): ver=1 fn=163 tn=3 bl=148 pwr=0
2025-03-30 07:42:35 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=202): ver=1 fn=163 tn=4 bl=148 pwr=0
2025-03-30 07:42:35 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=202): ver=1 fn=163 tn=5 bl=148 pwr=0
2025-03-30 07:42:35 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=202): ver=1 fn=163 tn=6 bl=148 pwr=0
2025-03-30 07:42:35 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=202): ver=1 fn=163 tn=7 bl=148 pwr=0
2025-03-30 07:42:35 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=202): ver=1 fn=164 tn=0 bl=148 pwr=0
2025-03-30 07:42:35 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=202): ver=1 fn=164 tn=1 bl=148 pwr=0
2025-03-30 07:42:35 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=202): ver=1 fn=164 tn=2 bl=148 pwr=0
2025-03-30 07:42:35 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=202): ver=1 fn=164 tn=3 bl=148 pwr=0
2025-03-30 07:42:35 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=202): ver=1 fn=164 tn=4 bl=148 pwr=0
2025-03-30 07:42:35 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=202): ver=1 fn=164 tn=5 bl=148 pwr=0
2025-03-30 07:42:35 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=202): ver=1 fn=164 tn=6 bl=148 pwr=0
2025-03-30 07:42:35 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=202): ver=1 fn=164 tn=7 bl=148 pwr=0
2025-03-30 07:42:35 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=202): ver=1 fn=165 tn=0 bl=148 pwr=0
2025-03-30 07:42:35 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=202): ver=1 fn=165 tn=1 bl=148 pwr=0
2025-03-30 07:42:35 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=202): ver=1 fn=165 tn=2 bl=148 pwr=0
2025-03-30 07:42:35 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=202): ver=1 fn=165 tn=3 bl=148 pwr=0
2025-03-30 07:42:35 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=202): ver=1 fn=165 tn=4 bl=148 pwr=0
2025-03-30 07:42:35 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=202): ver=1 fn=165 tn=5 bl=148 pwr=0
2025-03-30 07:42:35 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=202): ver=1 fn=165 tn=6 bl=148 pwr=0
2025-03-30 07:42:35 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=202): ver=1 fn=165 tn=7 bl=148 pwr=0
2025-03-30 07:42:35 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=202): ver=1 fn=166 tn=0 bl=148 pwr=0
2025-03-30 07:42:35 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=202): ver=1 fn=166 tn=1 bl=148 pwr=0
2025-03-30 07:42:35 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=202): ver=1 fn=166 tn=2 bl=148 pwr=0
2025-03-30 07:42:35 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=202): ver=1 fn=166 tn=3 bl=148 pwr=0
2025-03-30 07:42:35 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=202): ver=1 fn=166 tn=4 bl=148 pwr=0
2025-03-30 07:42:35 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=202): ver=1 fn=166 tn=5 bl=148 pwr=0
2025-03-30 07:42:35 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=202): ver=1 fn=166 tn=6 bl=148 pwr=0
2025-03-30 07:42:35 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=202): ver=1 fn=166 tn=7 bl=148 pwr=0
2025-03-30 07:42:35 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=202): ver=1 fn=167 tn=0 bl=148 pwr=0
2025-03-30 07:42:35 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=202): ver=1 fn=167 tn=1 bl=148 pwr=0
2025-03-30 07:42:35 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=202): ver=1 fn=167 tn=2 bl=148 pwr=0
2025-03-30 07:42:35 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=202): ver=1 fn=167 tn=3 bl=148 pwr=0
2025-03-30 07:42:35 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=202): ver=1 fn=167 tn=4 bl=148 pwr=0
2025-03-30 07:42:35 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=202): ver=1 fn=167 tn=5 bl=148 pwr=0
2025-03-30 07:42:35 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=202): ver=1 fn=167 tn=6 bl=148 pwr=0
2025-03-30 07:42:35 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=202): ver=1 fn=167 tn=7 bl=148 pwr=0
2025-03-30 07:42:35 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=202): ver=1 fn=168 tn=0 bl=148 pwr=0
2025-03-30 07:42:35 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=202): ver=1 fn=168 tn=1 bl=148 pwr=0
2025-03-30 07:42:35 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=202): ver=1 fn=168 tn=2 bl=148 pwr=0
2025-03-30 07:42:35 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=202): ver=1 fn=168 tn=3 bl=148 pwr=0
2025-03-30 07:42:35 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=202): ver=1 fn=168 tn=4 bl=148 pwr=0
2025-03-30 07:42:35 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=202): ver=1 fn=168 tn=5 bl=148 pwr=0
2025-03-30 07:42:35 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=202): ver=1 fn=168 tn=6 bl=148 pwr=0
2025-03-30 07:42:35 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=202): ver=1 fn=168 tn=7 bl=148 pwr=0
2025-03-30 07:42:35 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=202): ver=1 fn=169 tn=0 bl=148 pwr=0
2025-03-30 07:42:35 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=202): ver=1 fn=169 tn=1 bl=148 pwr=0
2025-03-30 07:42:35 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=202): ver=1 fn=169 tn=2 bl=148 pwr=0
2025-03-30 07:42:35 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=202): ver=1 fn=169 tn=3 bl=148 pwr=0
2025-03-30 07:42:35 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=202): ver=1 fn=169 tn=4 bl=148 pwr=0
2025-03-30 07:42:35 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=202): ver=1 fn=169 tn=5 bl=148 pwr=0
2025-03-30 07:42:35 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=202): ver=1 fn=169 tn=6 bl=148 pwr=0
2025-03-30 07:42:35 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=202): ver=1 fn=169 tn=7 bl=148 pwr=0
2025-03-30 07:42:35 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=202): ver=1 fn=170 tn=0 bl=148 pwr=0
2025-03-30 07:42:35 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=202): ver=1 fn=170 tn=1 bl=148 pwr=0
2025-03-30 07:42:35 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=202): ver=1 fn=170 tn=2 bl=148 pwr=0
2025-03-30 07:42:35 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=202): ver=1 fn=170 tn=3 bl=148 pwr=0
2025-03-30 07:42:35 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=202): ver=1 fn=170 tn=4 bl=148 pwr=0
2025-03-30 07:42:35 [WARNING] clck_gen.py:108 CLCKGen: time overrun by -753us; resetting the clock
2025-03-30 07:42:35 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=203): ver=1 fn=170 tn=5 bl=148 pwr=0
2025-03-30 07:42:35 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=203): ver=1 fn=170 tn=6 bl=148 pwr=0
2025-03-30 07:42:35 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-03-30 07:42:35 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:42:35 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:42:35 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:42:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:42:35 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=246): ver=1 fn=170 tn=7 bl=148 pwr=0
2025-03-30 07:42:35 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=246): ver=1 fn=171 tn=0 bl=148 pwr=0
2025-03-30 07:42:36 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:42:36 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=289): ver=1 fn=171 tn=1 bl=148 pwr=0
2025-03-30 07:42:36 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=289): ver=1 fn=171 tn=2 bl=148 pwr=0
2025-03-30 07:42:36 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=289): ver=1 fn=171 tn=3 bl=148 pwr=0
2025-03-30 07:42:36 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=289): ver=1 fn=171 tn=4 bl=148 pwr=0
2025-03-30 07:42:36 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=289): ver=1 fn=171 tn=5 bl=148 pwr=0
2025-03-30 07:42:36 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=289): ver=1 fn=171 tn=6 bl=148 pwr=0
2025-03-30 07:42:36 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=289): ver=1 fn=171 tn=7 bl=148 pwr=0
2025-03-30 07:42:36 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=289): ver=1 fn=172 tn=0 bl=148 pwr=0
2025-03-30 07:42:36 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=289): ver=1 fn=172 tn=1 bl=148 pwr=0
2025-03-30 07:42:36 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=289): ver=1 fn=172 tn=2 bl=148 pwr=0
2025-03-30 07:42:36 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=289): ver=1 fn=172 tn=3 bl=148 pwr=0
2025-03-30 07:42:36 [DEBUG] clck_gen.py:128 IND CLOCK 306
2025-03-30 07:42:36 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=333): ver=1 fn=172 tn=4 bl=148 pwr=0
2025-03-30 07:42:36 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=333): ver=1 fn=172 tn=5 bl=148 pwr=0
2025-03-30 07:42:36 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=333): ver=1 fn=172 tn=6 bl=148 pwr=0
2025-03-30 07:42:36 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=333): ver=1 fn=172 tn=7 bl=148 pwr=0
2025-03-30 07:42:36 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=333): ver=1 fn=173 tn=0 bl=148 pwr=0
2025-03-30 07:42:36 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=333): ver=1 fn=173 tn=1 bl=148 pwr=0
2025-03-30 07:42:36 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=333): ver=1 fn=173 tn=2 bl=148 pwr=0
2025-03-30 07:42:36 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=333): ver=1 fn=173 tn=3 bl=148 pwr=0
2025-03-30 07:42:36 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=333): ver=1 fn=173 tn=4 bl=148 pwr=0
2025-03-30 07:42:36 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=333): ver=1 fn=173 tn=5 bl=148 pwr=0
2025-03-30 07:42:36 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=333): ver=1 fn=173 tn=6 bl=148 pwr=0
2025-03-30 07:42:36 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=333): ver=1 fn=173 tn=7 bl=148 pwr=0
2025-03-30 07:42:36 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=333): ver=1 fn=174 tn=0 bl=148 pwr=0
2025-03-30 07:42:36 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=333): ver=1 fn=174 tn=1 bl=148 pwr=0
2025-03-30 07:42:36 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=333): ver=1 fn=174 tn=2 bl=148 pwr=0
2025-03-30 07:42:36 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=333): ver=1 fn=174 tn=3 bl=148 pwr=0
2025-03-30 07:42:36 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=333): ver=1 fn=174 tn=4 bl=148 pwr=0
2025-03-30 07:42:36 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=333): ver=1 fn=174 tn=5 bl=148 pwr=0
2025-03-30 07:42:36 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=333): ver=1 fn=174 tn=6 bl=148 pwr=0
2025-03-30 07:42:36 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=333): ver=1 fn=174 tn=7 bl=148 pwr=0
2025-03-30 07:42:36 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=333): ver=1 fn=175 tn=0 bl=148 pwr=0
2025-03-30 07:42:36 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=333): ver=1 fn=175 tn=1 bl=148 pwr=0
2025-03-30 07:42:36 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=333): ver=1 fn=175 tn=2 bl=148 pwr=0
2025-03-30 07:42:36 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=333): ver=1 fn=175 tn=3 bl=148 pwr=0
2025-03-30 07:42:36 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=333): ver=1 fn=175 tn=4 bl=148 pwr=0
2025-03-30 07:42:36 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=333): ver=1 fn=175 tn=5 bl=148 pwr=0
2025-03-30 07:42:36 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=333): ver=1 fn=175 tn=6 bl=148 pwr=0
2025-03-30 07:42:36 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=333): ver=1 fn=175 tn=7 bl=148 pwr=0
2025-03-30 07:42:36 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=333): ver=1 fn=176 tn=0 bl=148 pwr=0
2025-03-30 07:42:36 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=333): ver=1 fn=176 tn=1 bl=148 pwr=0
2025-03-30 07:42:36 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=333): ver=1 fn=176 tn=2 bl=148 pwr=0
2025-03-30 07:42:36 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=333): ver=1 fn=176 tn=3 bl=148 pwr=0
2025-03-30 07:42:36 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=333): ver=1 fn=176 tn=4 bl=148 pwr=0
2025-03-30 07:42:36 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=333): ver=1 fn=176 tn=5 bl=148 pwr=0
2025-03-30 07:42:36 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=333): ver=1 fn=176 tn=6 bl=148 pwr=0
2025-03-30 07:42:36 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=333): ver=1 fn=176 tn=7 bl=148 pwr=0
2025-03-30 07:42:36 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=333): ver=1 fn=177 tn=0 bl=148 pwr=0
2025-03-30 07:42:36 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=333): ver=1 fn=177 tn=1 bl=148 pwr=0
2025-03-30 07:42:36 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=333): ver=1 fn=177 tn=2 bl=148 pwr=0
2025-03-30 07:42:36 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=333): ver=1 fn=177 tn=3 bl=148 pwr=0
2025-03-30 07:42:36 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=333): ver=1 fn=177 tn=4 bl=148 pwr=0
2025-03-30 07:42:36 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=333): ver=1 fn=177 tn=5 bl=148 pwr=0
2025-03-30 07:42:36 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=333): ver=1 fn=177 tn=6 bl=148 pwr=0
2025-03-30 07:42:36 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=333): ver=1 fn=177 tn=7 bl=148 pwr=0
2025-03-30 07:42:36 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=333): ver=1 fn=178 tn=0 bl=148 pwr=0
2025-03-30 07:42:36 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=333): ver=1 fn=178 tn=1 bl=148 pwr=0
2025-03-30 07:42:36 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=333): ver=1 fn=178 tn=2 bl=148 pwr=0
2025-03-30 07:42:36 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=333): ver=1 fn=178 tn=3 bl=148 pwr=0
2025-03-30 07:42:36 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=333): ver=1 fn=178 tn=4 bl=148 pwr=0
2025-03-30 07:42:36 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=333): ver=1 fn=178 tn=5 bl=148 pwr=0
2025-03-30 07:42:36 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=333): ver=1 fn=178 tn=6 bl=148 pwr=0
2025-03-30 07:42:36 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=333): ver=1 fn=178 tn=7 bl=148 pwr=0
2025-03-30 07:42:36 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=333): ver=1 fn=179 tn=0 bl=148 pwr=0
2025-03-30 07:42:36 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=333): ver=1 fn=179 tn=1 bl=148 pwr=0
2025-03-30 07:42:36 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=333): ver=1 fn=179 tn=2 bl=148 pwr=0
2025-03-30 07:42:36 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=333): ver=1 fn=179 tn=3 bl=148 pwr=0
2025-03-30 07:42:36 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=333): ver=1 fn=179 tn=4 bl=148 pwr=0
2025-03-30 07:42:36 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=333): ver=1 fn=179 tn=5 bl=148 pwr=0
2025-03-30 07:42:36 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=333): ver=1 fn=179 tn=6 bl=148 pwr=0
2025-03-30 07:42:36 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=333): ver=1 fn=179 tn=7 bl=148 pwr=0
2025-03-30 07:42:36 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=333): ver=1 fn=180 tn=0 bl=148 pwr=0
2025-03-30 07:42:36 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=333): ver=1 fn=180 tn=1 bl=148 pwr=0
2025-03-30 07:42:36 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=333): ver=1 fn=180 tn=2 bl=148 pwr=0
2025-03-30 07:42:36 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=333): ver=1 fn=180 tn=3 bl=148 pwr=0
2025-03-30 07:42:36 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=333): ver=1 fn=180 tn=4 bl=148 pwr=0
2025-03-30 07:42:36 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=333): ver=1 fn=180 tn=5 bl=148 pwr=0
2025-03-30 07:42:36 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=333): ver=1 fn=180 tn=6 bl=148 pwr=0
2025-03-30 07:42:36 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=333): ver=1 fn=180 tn=7 bl=148 pwr=0
2025-03-30 07:42:36 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=333): ver=1 fn=181 tn=0 bl=148 pwr=0
2025-03-30 07:42:36 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=333): ver=1 fn=181 tn=1 bl=148 pwr=0
2025-03-30 07:42:36 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=333): ver=1 fn=181 tn=2 bl=148 pwr=0
2025-03-30 07:42:36 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=333): ver=1 fn=181 tn=3 bl=148 pwr=0
2025-03-30 07:42:36 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=333): ver=1 fn=181 tn=4 bl=148 pwr=0
2025-03-30 07:42:36 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=333): ver=1 fn=181 tn=5 bl=148 pwr=0
2025-03-30 07:42:36 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=333): ver=1 fn=181 tn=6 bl=148 pwr=0
2025-03-30 07:42:36 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=333): ver=1 fn=181 tn=7 bl=148 pwr=0
2025-03-30 07:42:36 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=333): ver=1 fn=182 tn=0 bl=148 pwr=0
2025-03-30 07:42:36 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=333): ver=1 fn=182 tn=1 bl=148 pwr=0
2025-03-30 07:42:36 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=333): ver=1 fn=182 tn=2 bl=148 pwr=0
2025-03-30 07:42:36 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=333): ver=1 fn=182 tn=3 bl=148 pwr=0
2025-03-30 07:42:36 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=333): ver=1 fn=182 tn=4 bl=148 pwr=0
2025-03-30 07:42:36 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=333): ver=1 fn=182 tn=5 bl=148 pwr=0
2025-03-30 07:42:36 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=333): ver=1 fn=182 tn=6 bl=148 pwr=0
2025-03-30 07:42:36 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=333): ver=1 fn=205 tn=0 bl=148 pwr=0
2025-03-30 07:42:36 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=333): ver=1 fn=205 tn=1 bl=148 pwr=0
2025-03-30 07:42:36 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=333): ver=1 fn=205 tn=2 bl=148 pwr=0
2025-03-30 07:42:36 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=333): ver=1 fn=205 tn=3 bl=148 pwr=0
2025-03-30 07:42:36 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=333): ver=1 fn=205 tn=4 bl=148 pwr=0
2025-03-30 07:42:36 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=333): ver=1 fn=205 tn=5 bl=148 pwr=0
2025-03-30 07:42:36 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=333): ver=1 fn=205 tn=6 bl=148 pwr=0
2025-03-30 07:42:36 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=333): ver=1 fn=205 tn=7 bl=148 pwr=0
2025-03-30 07:42:36 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=333): ver=1 fn=206 tn=0 bl=148 pwr=0
2025-03-30 07:42:36 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=333): ver=1 fn=206 tn=1 bl=148 pwr=0
2025-03-30 07:42:36 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=333): ver=1 fn=206 tn=2 bl=148 pwr=0
2025-03-30 07:42:36 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=333): ver=1 fn=206 tn=3 bl=148 pwr=0
2025-03-30 07:42:36 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=333): ver=1 fn=206 tn=4 bl=148 pwr=0
2025-03-30 07:42:36 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=333): ver=1 fn=206 tn=5 bl=148 pwr=0
2025-03-30 07:42:36 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=333): ver=1 fn=206 tn=6 bl=148 pwr=0
2025-03-30 07:42:36 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=333): ver=1 fn=206 tn=7 bl=148 pwr=0
2025-03-30 07:42:36 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=333): ver=1 fn=207 tn=0 bl=148 pwr=0
2025-03-30 07:42:36 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=333): ver=1 fn=207 tn=1 bl=148 pwr=0
2025-03-30 07:42:36 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=333): ver=1 fn=207 tn=2 bl=148 pwr=0
2025-03-30 07:42:36 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=333): ver=1 fn=207 tn=3 bl=148 pwr=0
2025-03-30 07:42:36 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=333): ver=1 fn=207 tn=4 bl=148 pwr=0
2025-03-30 07:42:36 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=333): ver=1 fn=207 tn=5 bl=148 pwr=0
2025-03-30 07:42:36 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=333): ver=1 fn=207 tn=6 bl=148 pwr=0
2025-03-30 07:42:36 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=333): ver=1 fn=207 tn=7 bl=148 pwr=0
2025-03-30 07:42:36 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=333): ver=1 fn=208 tn=0 bl=148 pwr=0
2025-03-30 07:42:36 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=333): ver=1 fn=208 tn=1 bl=148 pwr=0
2025-03-30 07:42:36 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=333): ver=1 fn=208 tn=2 bl=148 pwr=0
2025-03-30 07:42:36 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=333): ver=1 fn=208 tn=3 bl=148 pwr=0
2025-03-30 07:42:36 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=333): ver=1 fn=208 tn=4 bl=148 pwr=0
2025-03-30 07:42:36 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=333): ver=1 fn=208 tn=5 bl=148 pwr=0
2025-03-30 07:42:36 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=333): ver=1 fn=208 tn=6 bl=148 pwr=0
2025-03-30 07:42:36 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=333): ver=1 fn=208 tn=7 bl=148 pwr=0
2025-03-30 07:42:36 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=333): ver=1 fn=209 tn=0 bl=148 pwr=0
2025-03-30 07:42:36 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=333): ver=1 fn=209 tn=1 bl=148 pwr=0
2025-03-30 07:42:36 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=333): ver=1 fn=209 tn=2 bl=148 pwr=0
2025-03-30 07:42:36 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=333): ver=1 fn=209 tn=3 bl=148 pwr=0
2025-03-30 07:42:36 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=333): ver=1 fn=209 tn=4 bl=148 pwr=0
2025-03-30 07:42:36 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=333): ver=1 fn=209 tn=5 bl=148 pwr=0
2025-03-30 07:42:36 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=333): ver=1 fn=209 tn=6 bl=148 pwr=0
2025-03-30 07:42:36 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=333): ver=1 fn=209 tn=7 bl=148 pwr=0
2025-03-30 07:42:36 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=333): ver=1 fn=210 tn=0 bl=148 pwr=0
2025-03-30 07:42:36 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=333): ver=1 fn=210 tn=1 bl=148 pwr=0
2025-03-30 07:42:36 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=333): ver=1 fn=291 tn=0 bl=148 pwr=0
2025-03-30 07:42:36 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=333): ver=1 fn=291 tn=1 bl=148 pwr=0
2025-03-30 07:42:36 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=333): ver=1 fn=291 tn=2 bl=148 pwr=0
2025-03-30 07:42:36 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=333): ver=1 fn=291 tn=3 bl=148 pwr=0
2025-03-30 07:42:36 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=333): ver=1 fn=291 tn=4 bl=148 pwr=0
2025-03-30 07:42:36 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=333): ver=1 fn=291 tn=5 bl=148 pwr=0
2025-03-30 07:42:36 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=333): ver=1 fn=291 tn=6 bl=148 pwr=0
2025-03-30 07:42:36 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=333): ver=1 fn=291 tn=7 bl=148 pwr=0
2025-03-30 07:42:36 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=333): ver=1 fn=292 tn=0 bl=148 pwr=0
2025-03-30 07:42:36 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=333): ver=1 fn=292 tn=1 bl=148 pwr=0
2025-03-30 07:42:36 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=333): ver=1 fn=292 tn=2 bl=148 pwr=0
2025-03-30 07:42:36 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=333): ver=1 fn=292 tn=3 bl=148 pwr=0
2025-03-30 07:42:36 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=333): ver=1 fn=292 tn=4 bl=148 pwr=0
2025-03-30 07:42:36 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=333): ver=1 fn=292 tn=5 bl=148 pwr=0
2025-03-30 07:42:36 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=333): ver=1 fn=292 tn=6 bl=148 pwr=0
2025-03-30 07:42:36 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=333): ver=1 fn=292 tn=7 bl=148 pwr=0
2025-03-30 07:42:36 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=333): ver=1 fn=293 tn=0 bl=148 pwr=0
2025-03-30 07:42:36 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=333): ver=1 fn=293 tn=1 bl=148 pwr=0
2025-03-30 07:42:36 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=333): ver=1 fn=293 tn=2 bl=148 pwr=0
2025-03-30 07:42:36 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=333): ver=1 fn=293 tn=3 bl=148 pwr=0
2025-03-30 07:42:36 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=333): ver=1 fn=293 tn=4 bl=148 pwr=0
2025-03-30 07:42:36 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=333): ver=1 fn=293 tn=5 bl=148 pwr=0
2025-03-30 07:42:36 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=333): ver=1 fn=293 tn=6 bl=148 pwr=0
2025-03-30 07:42:36 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=333): ver=1 fn=293 tn=7 bl=148 pwr=0
2025-03-30 07:42:36 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=333): ver=1 fn=294 tn=0 bl=148 pwr=0
2025-03-30 07:42:36 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=333): ver=1 fn=294 tn=1 bl=148 pwr=0
2025-03-30 07:42:36 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=333): ver=1 fn=294 tn=2 bl=148 pwr=0
2025-03-30 07:42:36 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=333): ver=1 fn=294 tn=3 bl=148 pwr=0
2025-03-30 07:42:36 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=333): ver=1 fn=294 tn=4 bl=148 pwr=0
2025-03-30 07:42:36 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=333): ver=1 fn=294 tn=5 bl=148 pwr=0
2025-03-30 07:42:36 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=333): ver=1 fn=294 tn=6 bl=148 pwr=0
2025-03-30 07:42:36 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=333): ver=1 fn=294 tn=7 bl=148 pwr=0
2025-03-30 07:42:36 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=333): ver=1 fn=295 tn=0 bl=148 pwr=0
2025-03-30 07:42:36 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=333): ver=1 fn=295 tn=1 bl=148 pwr=0
2025-03-30 07:42:36 [WARNING] clck_gen.py:108 CLCKGen: time overrun by -8073us; resetting the clock
2025-03-30 07:42:36 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=334): ver=1 fn=295 tn=2 bl=148 pwr=0
2025-03-30 07:42:36 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=334): ver=1 fn=295 tn=3 bl=148 pwr=0
2025-03-30 07:42:36 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=334): ver=1 fn=295 tn=4 bl=148 pwr=0
2025-03-30 07:42:36 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=334): ver=1 fn=295 tn=5 bl=148 pwr=0
2025-03-30 07:42:36 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=334): ver=1 fn=295 tn=6 bl=148 pwr=0
2025-03-30 07:42:36 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=334): ver=1 fn=295 tn=7 bl=148 pwr=0
2025-03-30 07:42:36 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=334): ver=1 fn=296 tn=0 bl=148 pwr=0
2025-03-30 07:42:36 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=334): ver=1 fn=296 tn=1 bl=148 pwr=0
2025-03-30 07:42:36 [DEBUG] clck_gen.py:128 IND CLOCK 408
2025-03-30 07:42:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:42:36 [DEBUG] fake_trx.py:377 (BTS@172.18.26.20:5700) Recv FAKE_TRXC_DELAY cmd
2025-03-30 07:42:36 [INFO] fake_trx.py:380 (BTS@172.18.26.20:5700) Artificial TRXC delay set to 0
2025-03-30 07:42:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD FAKE_TRXC_DELAY
2025-03-30 07:42:36 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:42:36 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:42:36 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:42:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:42:36 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=462): ver=1 fn=421 tn=0 bl=148 pwr=0
2025-03-30 07:42:36 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=462): ver=1 fn=421 tn=1 bl=148 pwr=0
2025-03-30 07:42:36 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=462): ver=1 fn=421 tn=2 bl=148 pwr=0
2025-03-30 07:42:36 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=462): ver=1 fn=421 tn=3 bl=148 pwr=0
2025-03-30 07:42:36 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=462): ver=1 fn=421 tn=4 bl=148 pwr=0
2025-03-30 07:42:36 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=462): ver=1 fn=421 tn=5 bl=148 pwr=0
2025-03-30 07:42:36 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=462): ver=1 fn=421 tn=6 bl=148 pwr=0
2025-03-30 07:42:36 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=462): ver=1 fn=421 tn=7 bl=148 pwr=0
2025-03-30 07:42:36 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=462): ver=1 fn=422 tn=0 bl=148 pwr=0
2025-03-30 07:42:36 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=462): ver=1 fn=422 tn=1 bl=148 pwr=0
2025-03-30 07:42:36 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=462): ver=1 fn=422 tn=2 bl=148 pwr=0
2025-03-30 07:42:36 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=462): ver=1 fn=422 tn=3 bl=148 pwr=0
2025-03-30 07:42:36 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=462): ver=1 fn=422 tn=4 bl=148 pwr=0
2025-03-30 07:42:36 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=462): ver=1 fn=422 tn=5 bl=148 pwr=0
2025-03-30 07:42:36 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=462): ver=1 fn=422 tn=6 bl=148 pwr=0
2025-03-30 07:42:36 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=462): ver=1 fn=422 tn=7 bl=148 pwr=0
2025-03-30 07:42:36 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=462): ver=1 fn=423 tn=0 bl=148 pwr=0
2025-03-30 07:42:36 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=462): ver=1 fn=423 tn=1 bl=148 pwr=0
2025-03-30 07:42:36 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=462): ver=1 fn=423 tn=2 bl=148 pwr=0
2025-03-30 07:42:36 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=462): ver=1 fn=423 tn=3 bl=148 pwr=0
2025-03-30 07:42:36 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=462): ver=1 fn=423 tn=4 bl=148 pwr=0
2025-03-30 07:42:36 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=462): ver=1 fn=423 tn=5 bl=148 pwr=0
2025-03-30 07:42:36 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=462): ver=1 fn=423 tn=6 bl=148 pwr=0
2025-03-30 07:42:36 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=462): ver=1 fn=423 tn=7 bl=148 pwr=0
2025-03-30 07:42:36 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=462): ver=1 fn=424 tn=0 bl=148 pwr=0
2025-03-30 07:42:36 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=462): ver=1 fn=424 tn=1 bl=148 pwr=0
2025-03-30 07:42:36 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=462): ver=1 fn=424 tn=2 bl=148 pwr=0
2025-03-30 07:42:36 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=462): ver=1 fn=424 tn=3 bl=148 pwr=0
2025-03-30 07:42:36 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=462): ver=1 fn=424 tn=4 bl=148 pwr=0
2025-03-30 07:42:36 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=462): ver=1 fn=424 tn=5 bl=148 pwr=0
2025-03-30 07:42:36 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=462): ver=1 fn=424 tn=6 bl=148 pwr=0
2025-03-30 07:42:36 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=462): ver=1 fn=424 tn=7 bl=148 pwr=0
2025-03-30 07:42:36 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=462): ver=1 fn=425 tn=0 bl=148 pwr=0
2025-03-30 07:42:36 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=462): ver=1 fn=425 tn=1 bl=148 pwr=0
2025-03-30 07:42:36 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=462): ver=1 fn=425 tn=2 bl=148 pwr=0
2025-03-30 07:42:36 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=462): ver=1 fn=425 tn=3 bl=148 pwr=0
2025-03-30 07:42:36 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=462): ver=1 fn=425 tn=4 bl=148 pwr=0
2025-03-30 07:42:36 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=462): ver=1 fn=425 tn=5 bl=148 pwr=0
2025-03-30 07:42:36 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=462): ver=1 fn=425 tn=6 bl=148 pwr=0
2025-03-30 07:42:36 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=462): ver=1 fn=425 tn=7 bl=148 pwr=0
2025-03-30 07:42:36 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=462): ver=1 fn=426 tn=0 bl=148 pwr=0
2025-03-30 07:42:36 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=462): ver=1 fn=426 tn=1 bl=148 pwr=0
2025-03-30 07:42:36 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=462): ver=1 fn=426 tn=2 bl=148 pwr=0
2025-03-30 07:42:36 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=462): ver=1 fn=426 tn=3 bl=148 pwr=0
2025-03-30 07:42:36 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=462): ver=1 fn=426 tn=4 bl=148 pwr=0
2025-03-30 07:42:36 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=462): ver=1 fn=426 tn=5 bl=148 pwr=0
2025-03-30 07:42:36 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=462): ver=1 fn=426 tn=6 bl=148 pwr=0
2025-03-30 07:42:36 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=462): ver=1 fn=426 tn=7 bl=148 pwr=0
2025-03-30 07:42:36 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=462): ver=1 fn=427 tn=0 bl=148 pwr=0
2025-03-30 07:42:36 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=462): ver=1 fn=427 tn=1 bl=148 pwr=0
2025-03-30 07:42:36 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=462): ver=1 fn=427 tn=2 bl=148 pwr=0
2025-03-30 07:42:36 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=462): ver=1 fn=427 tn=3 bl=148 pwr=0
2025-03-30 07:42:36 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=462): ver=1 fn=427 tn=4 bl=148 pwr=0
2025-03-30 07:42:36 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=462): ver=1 fn=427 tn=5 bl=148 pwr=0
2025-03-30 07:42:36 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=462): ver=1 fn=427 tn=6 bl=148 pwr=0
2025-03-30 07:42:36 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=462): ver=1 fn=427 tn=7 bl=148 pwr=0
2025-03-30 07:42:36 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=462): ver=1 fn=428 tn=0 bl=148 pwr=0
2025-03-30 07:42:36 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=462): ver=1 fn=428 tn=1 bl=148 pwr=0
2025-03-30 07:42:36 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=462): ver=1 fn=428 tn=2 bl=148 pwr=0
2025-03-30 07:42:36 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=462): ver=1 fn=428 tn=3 bl=148 pwr=0
2025-03-30 07:42:36 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=462): ver=1 fn=428 tn=4 bl=148 pwr=0
2025-03-30 07:42:36 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=462): ver=1 fn=428 tn=5 bl=148 pwr=0
2025-03-30 07:42:36 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=462): ver=1 fn=428 tn=6 bl=148 pwr=0
2025-03-30 07:42:36 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=462): ver=1 fn=428 tn=7 bl=148 pwr=0
2025-03-30 07:42:36 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=462): ver=1 fn=429 tn=0 bl=148 pwr=0
2025-03-30 07:42:36 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=462): ver=1 fn=429 tn=1 bl=148 pwr=0
2025-03-30 07:42:36 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=462): ver=1 fn=429 tn=2 bl=148 pwr=0
2025-03-30 07:42:36 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=462): ver=1 fn=429 tn=3 bl=148 pwr=0
2025-03-30 07:42:36 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=462): ver=1 fn=429 tn=4 bl=148 pwr=0
2025-03-30 07:42:36 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=462): ver=1 fn=429 tn=5 bl=148 pwr=0
2025-03-30 07:42:36 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=462): ver=1 fn=429 tn=6 bl=148 pwr=0
2025-03-30 07:42:36 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=462): ver=1 fn=429 tn=7 bl=148 pwr=0
2025-03-30 07:42:36 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=462): ver=1 fn=430 tn=0 bl=148 pwr=0
2025-03-30 07:42:36 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=462): ver=1 fn=430 tn=1 bl=148 pwr=0
2025-03-30 07:42:36 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=462): ver=1 fn=430 tn=2 bl=148 pwr=0
2025-03-30 07:42:36 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=462): ver=1 fn=430 tn=3 bl=148 pwr=0
2025-03-30 07:42:36 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=462): ver=1 fn=430 tn=4 bl=148 pwr=0
2025-03-30 07:42:36 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=462): ver=1 fn=430 tn=5 bl=148 pwr=0
2025-03-30 07:42:36 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=462): ver=1 fn=430 tn=6 bl=148 pwr=0
2025-03-30 07:42:36 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=462): ver=1 fn=430 tn=7 bl=148 pwr=0
2025-03-30 07:42:36 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=462): ver=1 fn=431 tn=0 bl=148 pwr=0
2025-03-30 07:42:36 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=462): ver=1 fn=431 tn=1 bl=148 pwr=0
2025-03-30 07:42:36 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=462): ver=1 fn=431 tn=2 bl=148 pwr=0
2025-03-30 07:42:36 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=462): ver=1 fn=431 tn=3 bl=148 pwr=0
2025-03-30 07:42:36 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=462): ver=1 fn=431 tn=4 bl=148 pwr=0
2025-03-30 07:42:36 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=462): ver=1 fn=431 tn=5 bl=148 pwr=0
2025-03-30 07:42:36 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=462): ver=1 fn=431 tn=6 bl=148 pwr=0
2025-03-30 07:42:36 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=462): ver=1 fn=431 tn=7 bl=148 pwr=0
2025-03-30 07:42:36 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=462): ver=1 fn=432 tn=0 bl=148 pwr=0
2025-03-30 07:42:36 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=462): ver=1 fn=432 tn=1 bl=148 pwr=0
2025-03-30 07:42:36 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=462): ver=1 fn=432 tn=2 bl=148 pwr=0
2025-03-30 07:42:36 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=462): ver=1 fn=432 tn=3 bl=148 pwr=0
2025-03-30 07:42:36 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=462): ver=1 fn=432 tn=4 bl=148 pwr=0
2025-03-30 07:42:36 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=462): ver=1 fn=432 tn=5 bl=148 pwr=0
2025-03-30 07:42:36 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=462): ver=1 fn=432 tn=6 bl=148 pwr=0
2025-03-30 07:42:36 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=462): ver=1 fn=432 tn=7 bl=148 pwr=0
2025-03-30 07:42:36 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=462): ver=1 fn=433 tn=0 bl=148 pwr=0
2025-03-30 07:42:36 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=462): ver=1 fn=433 tn=1 bl=148 pwr=0
2025-03-30 07:42:36 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=462): ver=1 fn=433 tn=2 bl=148 pwr=0
2025-03-30 07:42:36 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=462): ver=1 fn=433 tn=3 bl=148 pwr=0
2025-03-30 07:42:36 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=462): ver=1 fn=433 tn=4 bl=148 pwr=0
2025-03-30 07:42:36 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=462): ver=1 fn=433 tn=5 bl=148 pwr=0
2025-03-30 07:42:36 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=462): ver=1 fn=433 tn=6 bl=148 pwr=0
2025-03-30 07:42:36 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:42:36 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:42:36 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:42:36 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:42:36 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:42:36 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:42:36 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:42:36 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:42:36 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 07:42:36 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 07:42:36 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 07:42:41 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 07:42:41 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 07:42:41 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:42:41 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:42:41 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:42:41 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:42:41 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:42:41 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 07:42:41 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:42:41 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 07:42:41 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 07:42:42 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 07:42:42 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 07:42:42 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 07:42:42 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:42:42 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:42:42 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 07:42:42 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 07:42:42 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 07:42:42 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 07:42:42 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 07:42:42 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 07:42:42 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:42:42 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:42:42 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 07:42:42 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 07:42:42 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 07:42:42 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 07:42:42 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 07:42:42 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 07:42:42 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:42:42 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:42:42 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 07:42:42 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 07:42:42 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 07:42:42 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 07:42:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 07:42:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 07:42:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 07:42:42 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 07:42:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 07:42:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 07:42:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 07:42:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:42:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 07:42:42 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 07:42:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:42:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:42:42 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 07:42:42 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 07:42:42 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 07:42:42 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 07:42:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:42:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:42:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:42:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 07:42:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:42:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:42:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:42:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:42:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:42:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:42:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:42:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:42:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:42:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:42:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:42:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:42:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:42:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:42:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:42:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:42:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:42:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:42:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:42:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:42:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:42:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:42:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:42:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:42:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:42:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:42:42 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-03-30 07:42:42 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-03-30 07:42:42 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-03-30 07:42:42 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-03-30 07:42:42 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-03-30 07:42:42 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-03-30 07:42:42 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-03-30 07:42:42 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-03-30 07:42:42 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-03-30 07:42:42 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-03-30 07:42:42 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 07:42:42 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 07:42:42 [DEBUG] fake_trx.py:317 (BTS@172.18.26.20:5700) Recv FAKE_CI cmd
2025-03-30 07:42:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:42:42 [DEBUG] fake_trx.py:377 (BTS@172.18.26.20:5700) Recv FAKE_TRXC_DELAY cmd
2025-03-30 07:42:42 [INFO] fake_trx.py:380 (BTS@172.18.26.20:5700) Artificial TRXC delay set to 200
2025-03-30 07:42:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD FAKE_TRXC_DELAY
2025-03-30 07:42:42 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=154): ver=1 fn=113 tn=0 bl=148 pwr=0
2025-03-30 07:42:42 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=154): ver=1 fn=113 tn=1 bl=148 pwr=0
2025-03-30 07:42:42 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=154): ver=1 fn=113 tn=2 bl=148 pwr=0
2025-03-30 07:42:42 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=154): ver=1 fn=113 tn=3 bl=148 pwr=0
2025-03-30 07:42:42 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=154): ver=1 fn=113 tn=4 bl=148 pwr=0
2025-03-30 07:42:42 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=154): ver=1 fn=113 tn=5 bl=148 pwr=0
2025-03-30 07:42:42 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=154): ver=1 fn=113 tn=6 bl=148 pwr=0
2025-03-30 07:42:42 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=154): ver=1 fn=113 tn=7 bl=148 pwr=0
2025-03-30 07:42:42 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=154): ver=1 fn=114 tn=0 bl=148 pwr=0
2025-03-30 07:42:42 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=154): ver=1 fn=114 tn=1 bl=148 pwr=0
2025-03-30 07:42:42 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=154): ver=1 fn=114 tn=2 bl=148 pwr=0
2025-03-30 07:42:42 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=154): ver=1 fn=114 tn=3 bl=148 pwr=0
2025-03-30 07:42:42 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=154): ver=1 fn=114 tn=4 bl=148 pwr=0
2025-03-30 07:42:42 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=154): ver=1 fn=114 tn=5 bl=148 pwr=0
2025-03-30 07:42:42 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=154): ver=1 fn=114 tn=6 bl=148 pwr=0
2025-03-30 07:42:42 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=154): ver=1 fn=114 tn=7 bl=148 pwr=0
2025-03-30 07:42:42 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=154): ver=1 fn=115 tn=0 bl=148 pwr=0
2025-03-30 07:42:42 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=154): ver=1 fn=115 tn=1 bl=148 pwr=0
2025-03-30 07:42:42 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=154): ver=1 fn=115 tn=2 bl=148 pwr=0
2025-03-30 07:42:42 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=154): ver=1 fn=115 tn=3 bl=148 pwr=0
2025-03-30 07:42:42 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=154): ver=1 fn=115 tn=4 bl=148 pwr=0
2025-03-30 07:42:42 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=154): ver=1 fn=115 tn=5 bl=148 pwr=0
2025-03-30 07:42:42 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=154): ver=1 fn=115 tn=6 bl=148 pwr=0
2025-03-30 07:42:42 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=154): ver=1 fn=115 tn=7 bl=148 pwr=0
2025-03-30 07:42:42 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=154): ver=1 fn=116 tn=0 bl=148 pwr=0
2025-03-30 07:42:42 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=154): ver=1 fn=116 tn=1 bl=148 pwr=0
2025-03-30 07:42:42 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=154): ver=1 fn=116 tn=2 bl=148 pwr=0
2025-03-30 07:42:42 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=154): ver=1 fn=116 tn=3 bl=148 pwr=0
2025-03-30 07:42:42 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=154): ver=1 fn=116 tn=4 bl=148 pwr=0
2025-03-30 07:42:42 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=154): ver=1 fn=116 tn=5 bl=148 pwr=0
2025-03-30 07:42:42 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=154): ver=1 fn=116 tn=6 bl=148 pwr=0
2025-03-30 07:42:42 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=154): ver=1 fn=116 tn=7 bl=148 pwr=0
2025-03-30 07:42:42 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=154): ver=1 fn=117 tn=0 bl=148 pwr=0
2025-03-30 07:42:42 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=154): ver=1 fn=117 tn=1 bl=148 pwr=0
2025-03-30 07:42:42 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=154): ver=1 fn=117 tn=2 bl=148 pwr=0
2025-03-30 07:42:42 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=154): ver=1 fn=117 tn=3 bl=148 pwr=0
2025-03-30 07:42:42 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=154): ver=1 fn=117 tn=4 bl=148 pwr=0
2025-03-30 07:42:42 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=154): ver=1 fn=117 tn=5 bl=148 pwr=0
2025-03-30 07:42:42 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=154): ver=1 fn=117 tn=6 bl=148 pwr=0
2025-03-30 07:42:42 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=154): ver=1 fn=117 tn=7 bl=148 pwr=0
2025-03-30 07:42:42 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=154): ver=1 fn=118 tn=0 bl=148 pwr=0
2025-03-30 07:42:42 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=154): ver=1 fn=118 tn=1 bl=148 pwr=0
2025-03-30 07:42:42 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=154): ver=1 fn=118 tn=2 bl=148 pwr=0
2025-03-30 07:42:42 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=154): ver=1 fn=118 tn=3 bl=148 pwr=0
2025-03-30 07:42:42 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=154): ver=1 fn=118 tn=4 bl=148 pwr=0
2025-03-30 07:42:42 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=154): ver=1 fn=118 tn=5 bl=148 pwr=0
2025-03-30 07:42:42 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=154): ver=1 fn=118 tn=6 bl=148 pwr=0
2025-03-30 07:42:42 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=154): ver=1 fn=118 tn=7 bl=148 pwr=0
2025-03-30 07:42:42 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=154): ver=1 fn=119 tn=0 bl=148 pwr=0
2025-03-30 07:42:42 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=154): ver=1 fn=119 tn=1 bl=148 pwr=0
2025-03-30 07:42:42 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=154): ver=1 fn=119 tn=2 bl=148 pwr=0
2025-03-30 07:42:42 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=154): ver=1 fn=119 tn=3 bl=148 pwr=0
2025-03-30 07:42:42 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=154): ver=1 fn=119 tn=4 bl=148 pwr=0
2025-03-30 07:42:42 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=154): ver=1 fn=119 tn=5 bl=148 pwr=0
2025-03-30 07:42:42 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=154): ver=1 fn=119 tn=6 bl=148 pwr=0
2025-03-30 07:42:42 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=154): ver=1 fn=119 tn=7 bl=148 pwr=0
2025-03-30 07:42:42 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=154): ver=1 fn=120 tn=0 bl=148 pwr=0
2025-03-30 07:42:42 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=154): ver=1 fn=120 tn=1 bl=148 pwr=0
2025-03-30 07:42:42 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=154): ver=1 fn=120 tn=2 bl=148 pwr=0
2025-03-30 07:42:42 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=154): ver=1 fn=120 tn=3 bl=148 pwr=0
2025-03-30 07:42:42 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=154): ver=1 fn=120 tn=4 bl=148 pwr=0
2025-03-30 07:42:42 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=154): ver=1 fn=120 tn=5 bl=148 pwr=0
2025-03-30 07:42:42 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=154): ver=1 fn=120 tn=6 bl=148 pwr=0
2025-03-30 07:42:42 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=154): ver=1 fn=120 tn=7 bl=148 pwr=0
2025-03-30 07:42:42 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=154): ver=1 fn=121 tn=0 bl=148 pwr=0
2025-03-30 07:42:42 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=154): ver=1 fn=121 tn=1 bl=148 pwr=0
2025-03-30 07:42:42 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=154): ver=1 fn=121 tn=2 bl=148 pwr=0
2025-03-30 07:42:42 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=154): ver=1 fn=121 tn=3 bl=148 pwr=0
2025-03-30 07:42:42 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=154): ver=1 fn=121 tn=4 bl=148 pwr=0
2025-03-30 07:42:42 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=154): ver=1 fn=121 tn=5 bl=148 pwr=0
2025-03-30 07:42:42 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=154): ver=1 fn=121 tn=6 bl=148 pwr=0
2025-03-30 07:42:42 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=154): ver=1 fn=121 tn=7 bl=148 pwr=0
2025-03-30 07:42:42 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=154): ver=1 fn=122 tn=0 bl=148 pwr=0
2025-03-30 07:42:42 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=154): ver=1 fn=122 tn=1 bl=148 pwr=0
2025-03-30 07:42:42 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=154): ver=1 fn=122 tn=2 bl=148 pwr=0
2025-03-30 07:42:42 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=154): ver=1 fn=122 tn=3 bl=148 pwr=0
2025-03-30 07:42:42 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=154): ver=1 fn=122 tn=4 bl=148 pwr=0
2025-03-30 07:42:42 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=154): ver=1 fn=122 tn=5 bl=148 pwr=0
2025-03-30 07:42:42 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=154): ver=1 fn=122 tn=6 bl=148 pwr=0
2025-03-30 07:42:42 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=154): ver=1 fn=122 tn=7 bl=148 pwr=0
2025-03-30 07:42:42 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=154): ver=1 fn=123 tn=0 bl=148 pwr=0
2025-03-30 07:42:42 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=154): ver=1 fn=123 tn=1 bl=148 pwr=0
2025-03-30 07:42:42 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=154): ver=1 fn=123 tn=2 bl=148 pwr=0
2025-03-30 07:42:42 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=154): ver=1 fn=123 tn=3 bl=148 pwr=0
2025-03-30 07:42:42 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=154): ver=1 fn=123 tn=4 bl=148 pwr=0
2025-03-30 07:42:42 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=154): ver=1 fn=123 tn=5 bl=148 pwr=0
2025-03-30 07:42:42 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=154): ver=1 fn=123 tn=6 bl=148 pwr=0
2025-03-30 07:42:42 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=154): ver=1 fn=123 tn=7 bl=148 pwr=0
2025-03-30 07:42:42 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=154): ver=1 fn=124 tn=0 bl=148 pwr=0
2025-03-30 07:42:42 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=154): ver=1 fn=124 tn=1 bl=148 pwr=0
2025-03-30 07:42:42 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=154): ver=1 fn=124 tn=2 bl=148 pwr=0
2025-03-30 07:42:42 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=154): ver=1 fn=124 tn=3 bl=148 pwr=0
2025-03-30 07:42:42 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=154): ver=1 fn=124 tn=4 bl=148 pwr=0
2025-03-30 07:42:42 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=154): ver=1 fn=124 tn=5 bl=148 pwr=0
2025-03-30 07:42:42 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=154): ver=1 fn=124 tn=6 bl=148 pwr=0
2025-03-30 07:42:42 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=154): ver=1 fn=124 tn=7 bl=148 pwr=0
2025-03-30 07:42:42 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=154): ver=1 fn=125 tn=0 bl=148 pwr=0
2025-03-30 07:42:42 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=154): ver=1 fn=125 tn=1 bl=148 pwr=0
2025-03-30 07:42:42 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=154): ver=1 fn=125 tn=2 bl=148 pwr=0
2025-03-30 07:42:42 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=154): ver=1 fn=125 tn=3 bl=148 pwr=0
2025-03-30 07:42:42 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=154): ver=1 fn=125 tn=4 bl=148 pwr=0
2025-03-30 07:42:42 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=154): ver=1 fn=125 tn=5 bl=148 pwr=0
2025-03-30 07:42:42 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=154): ver=1 fn=125 tn=6 bl=148 pwr=0
2025-03-30 07:42:42 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=154): ver=1 fn=125 tn=7 bl=148 pwr=0
2025-03-30 07:42:42 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=154): ver=1 fn=126 tn=0 bl=148 pwr=0
2025-03-30 07:42:42 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=154): ver=1 fn=126 tn=1 bl=148 pwr=0
2025-03-30 07:42:42 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=154): ver=1 fn=126 tn=2 bl=148 pwr=0
2025-03-30 07:42:42 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=154): ver=1 fn=126 tn=3 bl=148 pwr=0
2025-03-30 07:42:42 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=154): ver=1 fn=126 tn=4 bl=148 pwr=0
2025-03-30 07:42:42 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=154): ver=1 fn=126 tn=5 bl=148 pwr=0
2025-03-30 07:42:42 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=154): ver=1 fn=126 tn=6 bl=148 pwr=0
2025-03-30 07:42:42 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=154): ver=1 fn=126 tn=7 bl=148 pwr=0
2025-03-30 07:42:42 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=154): ver=1 fn=127 tn=0 bl=148 pwr=0
2025-03-30 07:42:42 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=154): ver=1 fn=127 tn=1 bl=148 pwr=0
2025-03-30 07:42:42 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=154): ver=1 fn=127 tn=2 bl=148 pwr=0
2025-03-30 07:42:42 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=154): ver=1 fn=127 tn=3 bl=148 pwr=0
2025-03-30 07:42:42 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=154): ver=1 fn=127 tn=4 bl=148 pwr=0
2025-03-30 07:42:42 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=154): ver=1 fn=127 tn=5 bl=148 pwr=0
2025-03-30 07:42:42 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=154): ver=1 fn=127 tn=6 bl=148 pwr=0
2025-03-30 07:42:42 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=154): ver=1 fn=127 tn=7 bl=148 pwr=0
2025-03-30 07:42:42 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=154): ver=1 fn=128 tn=0 bl=148 pwr=0
2025-03-30 07:42:42 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=154): ver=1 fn=128 tn=1 bl=148 pwr=0
2025-03-30 07:42:42 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=154): ver=1 fn=128 tn=2 bl=148 pwr=0
2025-03-30 07:42:42 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=154): ver=1 fn=128 tn=3 bl=148 pwr=0
2025-03-30 07:42:42 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=154): ver=1 fn=128 tn=4 bl=148 pwr=0
2025-03-30 07:42:42 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=154): ver=1 fn=128 tn=5 bl=148 pwr=0
2025-03-30 07:42:42 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=154): ver=1 fn=128 tn=6 bl=148 pwr=0
2025-03-30 07:42:42 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=154): ver=1 fn=128 tn=7 bl=148 pwr=0
2025-03-30 07:42:42 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=154): ver=1 fn=129 tn=0 bl=148 pwr=0
2025-03-30 07:42:42 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=154): ver=1 fn=129 tn=1 bl=148 pwr=0
2025-03-30 07:42:42 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=154): ver=1 fn=129 tn=2 bl=148 pwr=0
2025-03-30 07:42:42 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=154): ver=1 fn=129 tn=3 bl=148 pwr=0
2025-03-30 07:42:42 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=154): ver=1 fn=129 tn=4 bl=148 pwr=0
2025-03-30 07:42:42 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=154): ver=1 fn=129 tn=5 bl=148 pwr=0
2025-03-30 07:42:42 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=154): ver=1 fn=129 tn=6 bl=148 pwr=0
2025-03-30 07:42:42 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=154): ver=1 fn=129 tn=7 bl=148 pwr=0
2025-03-30 07:42:42 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=154): ver=1 fn=130 tn=0 bl=148 pwr=0
2025-03-30 07:42:42 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=154): ver=1 fn=130 tn=1 bl=148 pwr=0
2025-03-30 07:42:42 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=154): ver=1 fn=130 tn=2 bl=148 pwr=0
2025-03-30 07:42:42 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=154): ver=1 fn=130 tn=3 bl=148 pwr=0
2025-03-30 07:42:42 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=154): ver=1 fn=130 tn=4 bl=148 pwr=0
2025-03-30 07:42:42 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=154): ver=1 fn=130 tn=5 bl=148 pwr=0
2025-03-30 07:42:42 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=154): ver=1 fn=130 tn=6 bl=148 pwr=0
2025-03-30 07:42:42 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=154): ver=1 fn=130 tn=7 bl=148 pwr=0
2025-03-30 07:42:42 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=154): ver=1 fn=131 tn=0 bl=148 pwr=0
2025-03-30 07:42:42 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=154): ver=1 fn=131 tn=1 bl=148 pwr=0
2025-03-30 07:42:42 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=154): ver=1 fn=131 tn=2 bl=148 pwr=0
2025-03-30 07:42:42 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=154): ver=1 fn=131 tn=3 bl=148 pwr=0
2025-03-30 07:42:42 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=154): ver=1 fn=131 tn=4 bl=148 pwr=0
2025-03-30 07:42:42 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=154): ver=1 fn=131 tn=5 bl=148 pwr=0
2025-03-30 07:42:42 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=154): ver=1 fn=131 tn=6 bl=148 pwr=0
2025-03-30 07:42:42 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=154): ver=1 fn=131 tn=7 bl=148 pwr=0
2025-03-30 07:42:42 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=154): ver=1 fn=132 tn=0 bl=148 pwr=0
2025-03-30 07:42:42 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=154): ver=1 fn=132 tn=1 bl=148 pwr=0
2025-03-30 07:42:42 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=154): ver=1 fn=132 tn=2 bl=148 pwr=0
2025-03-30 07:42:42 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=154): ver=1 fn=132 tn=3 bl=148 pwr=0
2025-03-30 07:42:42 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=154): ver=1 fn=132 tn=4 bl=148 pwr=0
2025-03-30 07:42:42 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=154): ver=1 fn=132 tn=5 bl=148 pwr=0
2025-03-30 07:42:42 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=154): ver=1 fn=132 tn=6 bl=148 pwr=0
2025-03-30 07:42:42 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=154): ver=1 fn=132 tn=7 bl=148 pwr=0
2025-03-30 07:42:42 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=154): ver=1 fn=133 tn=0 bl=148 pwr=0
2025-03-30 07:42:42 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=154): ver=1 fn=133 tn=1 bl=148 pwr=0
2025-03-30 07:42:42 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=154): ver=1 fn=133 tn=2 bl=148 pwr=0
2025-03-30 07:42:42 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=154): ver=1 fn=133 tn=3 bl=148 pwr=0
2025-03-30 07:42:42 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=154): ver=1 fn=133 tn=4 bl=148 pwr=0
2025-03-30 07:42:42 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=154): ver=1 fn=133 tn=5 bl=148 pwr=0
2025-03-30 07:42:42 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=154): ver=1 fn=133 tn=6 bl=148 pwr=0
2025-03-30 07:42:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:42:42 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=199): ver=1 fn=158 tn=0 bl=148 pwr=0
2025-03-30 07:42:42 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=199): ver=1 fn=158 tn=1 bl=148 pwr=0
2025-03-30 07:42:42 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=199): ver=1 fn=158 tn=2 bl=148 pwr=0
2025-03-30 07:42:42 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=199): ver=1 fn=158 tn=3 bl=148 pwr=0
2025-03-30 07:42:42 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=199): ver=1 fn=158 tn=4 bl=148 pwr=0
2025-03-30 07:42:42 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=199): ver=1 fn=158 tn=5 bl=148 pwr=0
2025-03-30 07:42:42 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=199): ver=1 fn=158 tn=6 bl=148 pwr=0
2025-03-30 07:42:42 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=199): ver=1 fn=158 tn=7 bl=148 pwr=0
2025-03-30 07:42:42 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=199): ver=1 fn=159 tn=0 bl=148 pwr=0
2025-03-30 07:42:42 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=199): ver=1 fn=159 tn=1 bl=148 pwr=0
2025-03-30 07:42:42 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=199): ver=1 fn=159 tn=2 bl=148 pwr=0
2025-03-30 07:42:42 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=199): ver=1 fn=159 tn=3 bl=148 pwr=0
2025-03-30 07:42:42 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=199): ver=1 fn=159 tn=4 bl=148 pwr=0
2025-03-30 07:42:42 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=199): ver=1 fn=159 tn=5 bl=148 pwr=0
2025-03-30 07:42:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:42:42 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=199): ver=1 fn=159 tn=6 bl=148 pwr=0
2025-03-30 07:42:42 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=199): ver=1 fn=159 tn=7 bl=148 pwr=0
2025-03-30 07:42:42 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=199): ver=1 fn=160 tn=0 bl=148 pwr=0
2025-03-30 07:42:42 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=199): ver=1 fn=160 tn=1 bl=148 pwr=0
2025-03-30 07:42:42 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=199): ver=1 fn=160 tn=2 bl=148 pwr=0
2025-03-30 07:42:42 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=199): ver=1 fn=160 tn=3 bl=148 pwr=0
2025-03-30 07:42:42 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=199): ver=1 fn=160 tn=4 bl=148 pwr=0
2025-03-30 07:42:42 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=199): ver=1 fn=160 tn=5 bl=148 pwr=0
2025-03-30 07:42:42 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=199): ver=1 fn=160 tn=6 bl=148 pwr=0
2025-03-30 07:42:42 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=199): ver=1 fn=160 tn=7 bl=148 pwr=0
2025-03-30 07:42:42 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=199): ver=1 fn=161 tn=0 bl=148 pwr=0
2025-03-30 07:42:42 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=199): ver=1 fn=161 tn=1 bl=148 pwr=0
2025-03-30 07:42:42 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=199): ver=1 fn=161 tn=2 bl=148 pwr=0
2025-03-30 07:42:42 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=199): ver=1 fn=161 tn=3 bl=148 pwr=0
2025-03-30 07:42:42 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=199): ver=1 fn=161 tn=4 bl=148 pwr=0
2025-03-30 07:42:42 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=199): ver=1 fn=161 tn=5 bl=148 pwr=0
2025-03-30 07:42:42 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=199): ver=1 fn=161 tn=6 bl=148 pwr=0
2025-03-30 07:42:42 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=199): ver=1 fn=161 tn=7 bl=148 pwr=0
2025-03-30 07:42:42 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=199): ver=1 fn=162 tn=0 bl=148 pwr=0
2025-03-30 07:42:42 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=199): ver=1 fn=162 tn=1 bl=148 pwr=0
2025-03-30 07:42:42 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=199): ver=1 fn=162 tn=2 bl=148 pwr=0
2025-03-30 07:42:42 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=199): ver=1 fn=162 tn=3 bl=148 pwr=0
2025-03-30 07:42:42 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=199): ver=1 fn=162 tn=4 bl=148 pwr=0
2025-03-30 07:42:42 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=199): ver=1 fn=162 tn=5 bl=148 pwr=0
2025-03-30 07:42:42 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=199): ver=1 fn=162 tn=6 bl=148 pwr=0
2025-03-30 07:42:42 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=199): ver=1 fn=162 tn=7 bl=148 pwr=0
2025-03-30 07:42:42 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=199): ver=1 fn=163 tn=0 bl=148 pwr=0
2025-03-30 07:42:42 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=199): ver=1 fn=163 tn=1 bl=148 pwr=0
2025-03-30 07:42:42 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=199): ver=1 fn=163 tn=2 bl=148 pwr=0
2025-03-30 07:42:42 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=199): ver=1 fn=163 tn=3 bl=148 pwr=0
2025-03-30 07:42:42 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=199): ver=1 fn=163 tn=4 bl=148 pwr=0
2025-03-30 07:42:42 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=199): ver=1 fn=163 tn=5 bl=148 pwr=0
2025-03-30 07:42:42 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=199): ver=1 fn=163 tn=6 bl=148 pwr=0
2025-03-30 07:42:42 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=199): ver=1 fn=163 tn=7 bl=148 pwr=0
2025-03-30 07:42:42 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=199): ver=1 fn=164 tn=0 bl=148 pwr=0
2025-03-30 07:42:42 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=199): ver=1 fn=164 tn=1 bl=148 pwr=0
2025-03-30 07:42:42 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=199): ver=1 fn=164 tn=2 bl=148 pwr=0
2025-03-30 07:42:42 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=199): ver=1 fn=164 tn=3 bl=148 pwr=0
2025-03-30 07:42:42 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=199): ver=1 fn=164 tn=4 bl=148 pwr=0
2025-03-30 07:42:42 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=199): ver=1 fn=164 tn=5 bl=148 pwr=0
2025-03-30 07:42:42 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=199): ver=1 fn=164 tn=6 bl=148 pwr=0
2025-03-30 07:42:42 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=199): ver=1 fn=164 tn=7 bl=148 pwr=0
2025-03-30 07:42:42 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=199): ver=1 fn=165 tn=0 bl=148 pwr=0
2025-03-30 07:42:42 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=199): ver=1 fn=165 tn=1 bl=148 pwr=0
2025-03-30 07:42:42 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=199): ver=1 fn=165 tn=2 bl=148 pwr=0
2025-03-30 07:42:42 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=199): ver=1 fn=165 tn=3 bl=148 pwr=0
2025-03-30 07:42:42 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=199): ver=1 fn=165 tn=4 bl=148 pwr=0
2025-03-30 07:42:42 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=199): ver=1 fn=165 tn=5 bl=148 pwr=0
2025-03-30 07:42:42 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=199): ver=1 fn=165 tn=6 bl=148 pwr=0
2025-03-30 07:42:42 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=199): ver=1 fn=165 tn=7 bl=148 pwr=0
2025-03-30 07:42:42 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=199): ver=1 fn=166 tn=0 bl=148 pwr=0
2025-03-30 07:42:42 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=199): ver=1 fn=166 tn=1 bl=148 pwr=0
2025-03-30 07:42:42 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=199): ver=1 fn=166 tn=2 bl=148 pwr=0
2025-03-30 07:42:42 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=199): ver=1 fn=166 tn=3 bl=148 pwr=0
2025-03-30 07:42:42 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=199): ver=1 fn=166 tn=4 bl=148 pwr=0
2025-03-30 07:42:42 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=199): ver=1 fn=166 tn=5 bl=148 pwr=0
2025-03-30 07:42:42 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=199): ver=1 fn=166 tn=6 bl=148 pwr=0
2025-03-30 07:42:42 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=199): ver=1 fn=166 tn=7 bl=148 pwr=0
2025-03-30 07:42:42 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=199): ver=1 fn=167 tn=0 bl=148 pwr=0
2025-03-30 07:42:42 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=199): ver=1 fn=167 tn=1 bl=148 pwr=0
2025-03-30 07:42:42 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=199): ver=1 fn=167 tn=2 bl=148 pwr=0
2025-03-30 07:42:42 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=199): ver=1 fn=167 tn=3 bl=148 pwr=0
2025-03-30 07:42:42 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=199): ver=1 fn=167 tn=4 bl=148 pwr=0
2025-03-30 07:42:42 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=199): ver=1 fn=167 tn=5 bl=148 pwr=0
2025-03-30 07:42:42 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=199): ver=1 fn=167 tn=6 bl=148 pwr=0
2025-03-30 07:42:42 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=199): ver=1 fn=167 tn=7 bl=148 pwr=0
2025-03-30 07:42:42 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=199): ver=1 fn=168 tn=0 bl=148 pwr=0
2025-03-30 07:42:42 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=199): ver=1 fn=168 tn=1 bl=148 pwr=0
2025-03-30 07:42:42 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=199): ver=1 fn=168 tn=2 bl=148 pwr=0
2025-03-30 07:42:42 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=199): ver=1 fn=168 tn=3 bl=148 pwr=0
2025-03-30 07:42:42 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=199): ver=1 fn=168 tn=4 bl=148 pwr=0
2025-03-30 07:42:42 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=199): ver=1 fn=168 tn=5 bl=148 pwr=0
2025-03-30 07:42:42 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=199): ver=1 fn=168 tn=6 bl=148 pwr=0
2025-03-30 07:42:42 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=199): ver=1 fn=168 tn=7 bl=148 pwr=0
2025-03-30 07:42:42 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=199): ver=1 fn=169 tn=0 bl=148 pwr=0
2025-03-30 07:42:42 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=199): ver=1 fn=169 tn=1 bl=148 pwr=0
2025-03-30 07:42:42 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=199): ver=1 fn=169 tn=2 bl=148 pwr=0
2025-03-30 07:42:42 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=199): ver=1 fn=169 tn=3 bl=148 pwr=0
2025-03-30 07:42:42 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=199): ver=1 fn=169 tn=4 bl=148 pwr=0
2025-03-30 07:42:42 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=199): ver=1 fn=169 tn=5 bl=148 pwr=0
2025-03-30 07:42:42 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=199): ver=1 fn=169 tn=6 bl=148 pwr=0
2025-03-30 07:42:42 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=199): ver=1 fn=169 tn=7 bl=148 pwr=0
2025-03-30 07:42:42 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=199): ver=1 fn=170 tn=0 bl=148 pwr=0
2025-03-30 07:42:42 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=199): ver=1 fn=170 tn=1 bl=148 pwr=0
2025-03-30 07:42:42 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=199): ver=1 fn=170 tn=2 bl=148 pwr=0
2025-03-30 07:42:42 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=199): ver=1 fn=170 tn=3 bl=148 pwr=0
2025-03-30 07:42:42 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=199): ver=1 fn=170 tn=4 bl=148 pwr=0
2025-03-30 07:42:42 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=199): ver=1 fn=170 tn=5 bl=148 pwr=0
2025-03-30 07:42:42 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=199): ver=1 fn=170 tn=6 bl=148 pwr=0
2025-03-30 07:42:42 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=199): ver=1 fn=170 tn=7 bl=148 pwr=0
2025-03-30 07:42:42 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=199): ver=1 fn=171 tn=0 bl=148 pwr=0
2025-03-30 07:42:42 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=199): ver=1 fn=171 tn=1 bl=148 pwr=0
2025-03-30 07:42:42 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=199): ver=1 fn=171 tn=2 bl=148 pwr=0
2025-03-30 07:42:42 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=199): ver=1 fn=171 tn=3 bl=148 pwr=0
2025-03-30 07:42:42 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=199): ver=1 fn=171 tn=4 bl=148 pwr=0
2025-03-30 07:42:42 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=199): ver=1 fn=171 tn=5 bl=148 pwr=0
2025-03-30 07:42:42 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=199): ver=1 fn=171 tn=6 bl=148 pwr=0
2025-03-30 07:42:42 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=199): ver=1 fn=171 tn=7 bl=148 pwr=0
2025-03-30 07:42:42 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=199): ver=1 fn=172 tn=0 bl=148 pwr=0
2025-03-30 07:42:42 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=199): ver=1 fn=172 tn=1 bl=148 pwr=0
2025-03-30 07:42:42 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=199): ver=1 fn=172 tn=2 bl=148 pwr=0
2025-03-30 07:42:42 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=199): ver=1 fn=172 tn=3 bl=148 pwr=0
2025-03-30 07:42:42 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=199): ver=1 fn=172 tn=4 bl=148 pwr=0
2025-03-30 07:42:42 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=199): ver=1 fn=172 tn=5 bl=148 pwr=0
2025-03-30 07:42:42 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=199): ver=1 fn=172 tn=6 bl=148 pwr=0
2025-03-30 07:42:42 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=199): ver=1 fn=172 tn=7 bl=148 pwr=0
2025-03-30 07:42:42 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=199): ver=1 fn=173 tn=0 bl=148 pwr=0
2025-03-30 07:42:42 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=199): ver=1 fn=173 tn=1 bl=148 pwr=0
2025-03-30 07:42:42 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=199): ver=1 fn=173 tn=2 bl=148 pwr=0
2025-03-30 07:42:42 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=199): ver=1 fn=173 tn=3 bl=148 pwr=0
2025-03-30 07:42:42 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=199): ver=1 fn=173 tn=4 bl=148 pwr=0
2025-03-30 07:42:42 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=199): ver=1 fn=173 tn=5 bl=148 pwr=0
2025-03-30 07:42:42 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=199): ver=1 fn=173 tn=6 bl=148 pwr=0
2025-03-30 07:42:42 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=199): ver=1 fn=173 tn=7 bl=148 pwr=0
2025-03-30 07:42:42 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=199): ver=1 fn=174 tn=0 bl=148 pwr=0
2025-03-30 07:42:42 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=199): ver=1 fn=174 tn=1 bl=148 pwr=0
2025-03-30 07:42:42 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=199): ver=1 fn=174 tn=2 bl=148 pwr=0
2025-03-30 07:42:42 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=199): ver=1 fn=174 tn=3 bl=148 pwr=0
2025-03-30 07:42:42 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=199): ver=1 fn=174 tn=4 bl=148 pwr=0
2025-03-30 07:42:42 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=199): ver=1 fn=174 tn=5 bl=148 pwr=0
2025-03-30 07:42:42 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=199): ver=1 fn=174 tn=6 bl=148 pwr=0
2025-03-30 07:42:42 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=199): ver=1 fn=174 tn=7 bl=148 pwr=0
2025-03-30 07:42:42 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=199): ver=1 fn=175 tn=0 bl=148 pwr=0
2025-03-30 07:42:42 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=199): ver=1 fn=175 tn=1 bl=148 pwr=0
2025-03-30 07:42:42 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=199): ver=1 fn=175 tn=2 bl=148 pwr=0
2025-03-30 07:42:42 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=199): ver=1 fn=175 tn=3 bl=148 pwr=0
2025-03-30 07:42:42 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=199): ver=1 fn=175 tn=4 bl=148 pwr=0
2025-03-30 07:42:42 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=199): ver=1 fn=175 tn=5 bl=148 pwr=0
2025-03-30 07:42:42 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=199): ver=1 fn=175 tn=6 bl=148 pwr=0
2025-03-30 07:42:42 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=199): ver=1 fn=175 tn=7 bl=148 pwr=0
2025-03-30 07:42:42 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=199): ver=1 fn=176 tn=0 bl=148 pwr=0
2025-03-30 07:42:42 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=199): ver=1 fn=176 tn=1 bl=148 pwr=0
2025-03-30 07:42:42 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=199): ver=1 fn=176 tn=2 bl=148 pwr=0
2025-03-30 07:42:42 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=199): ver=1 fn=176 tn=3 bl=148 pwr=0
2025-03-30 07:42:42 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=199): ver=1 fn=176 tn=4 bl=148 pwr=0
2025-03-30 07:42:42 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=199): ver=1 fn=176 tn=5 bl=148 pwr=0
2025-03-30 07:42:42 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=199): ver=1 fn=176 tn=6 bl=148 pwr=0
2025-03-30 07:42:42 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=199): ver=1 fn=176 tn=7 bl=148 pwr=0
2025-03-30 07:42:42 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=199): ver=1 fn=177 tn=0 bl=148 pwr=0
2025-03-30 07:42:42 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=199): ver=1 fn=177 tn=1 bl=148 pwr=0
2025-03-30 07:42:42 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=199): ver=1 fn=177 tn=2 bl=148 pwr=0
2025-03-30 07:42:42 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=199): ver=1 fn=177 tn=3 bl=148 pwr=0
2025-03-30 07:42:42 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=199): ver=1 fn=177 tn=4 bl=148 pwr=0
2025-03-30 07:42:42 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=199): ver=1 fn=177 tn=5 bl=148 pwr=0
2025-03-30 07:42:42 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=199): ver=1 fn=177 tn=6 bl=148 pwr=0
2025-03-30 07:42:42 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=199): ver=1 fn=177 tn=7 bl=148 pwr=0
2025-03-30 07:42:42 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=199): ver=1 fn=178 tn=0 bl=148 pwr=0
2025-03-30 07:42:42 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=199): ver=1 fn=178 tn=1 bl=148 pwr=0
2025-03-30 07:42:42 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=199): ver=1 fn=178 tn=2 bl=148 pwr=0
2025-03-30 07:42:42 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=199): ver=1 fn=178 tn=3 bl=148 pwr=0
2025-03-30 07:42:42 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=199): ver=1 fn=178 tn=4 bl=148 pwr=0
2025-03-30 07:42:42 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=199): ver=1 fn=178 tn=5 bl=148 pwr=0
2025-03-30 07:42:42 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=199): ver=1 fn=178 tn=6 bl=148 pwr=0
2025-03-30 07:42:42 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-03-30 07:42:43 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:42:43 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:42:43 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:42:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:42:43 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=243): ver=1 fn=201 tn=0 bl=148 pwr=0
2025-03-30 07:42:43 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=243): ver=1 fn=201 tn=1 bl=148 pwr=0
2025-03-30 07:42:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:42:43 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=286): ver=1 fn=201 tn=2 bl=148 pwr=0
2025-03-30 07:42:43 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=286): ver=1 fn=201 tn=3 bl=148 pwr=0
2025-03-30 07:42:43 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=286): ver=1 fn=201 tn=4 bl=148 pwr=0
2025-03-30 07:42:43 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=286): ver=1 fn=201 tn=5 bl=148 pwr=0
2025-03-30 07:42:43 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=286): ver=1 fn=201 tn=6 bl=148 pwr=0
2025-03-30 07:42:43 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=286): ver=1 fn=201 tn=7 bl=148 pwr=0
2025-03-30 07:42:43 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=286): ver=1 fn=202 tn=0 bl=148 pwr=0
2025-03-30 07:42:43 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=286): ver=1 fn=202 tn=1 bl=148 pwr=0
2025-03-30 07:42:43 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=286): ver=1 fn=202 tn=2 bl=148 pwr=0
2025-03-30 07:42:43 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=286): ver=1 fn=202 tn=3 bl=148 pwr=0
2025-03-30 07:42:43 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=286): ver=1 fn=202 tn=4 bl=148 pwr=0
2025-03-30 07:42:43 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=286): ver=1 fn=202 tn=5 bl=148 pwr=0
2025-03-30 07:42:43 [DEBUG] clck_gen.py:128 IND CLOCK 306
2025-03-30 07:42:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:42:43 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=330): ver=1 fn=202 tn=6 bl=148 pwr=0
2025-03-30 07:42:43 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=330): ver=1 fn=202 tn=7 bl=148 pwr=0
2025-03-30 07:42:43 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=330): ver=1 fn=203 tn=0 bl=148 pwr=0
2025-03-30 07:42:43 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=330): ver=1 fn=203 tn=1 bl=148 pwr=0
2025-03-30 07:42:43 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=330): ver=1 fn=203 tn=2 bl=148 pwr=0
2025-03-30 07:42:43 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=330): ver=1 fn=203 tn=3 bl=148 pwr=0
2025-03-30 07:42:43 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=330): ver=1 fn=203 tn=4 bl=148 pwr=0
2025-03-30 07:42:43 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=330): ver=1 fn=203 tn=5 bl=148 pwr=0
2025-03-30 07:42:43 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=330): ver=1 fn=203 tn=6 bl=148 pwr=0
2025-03-30 07:42:43 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=330): ver=1 fn=203 tn=7 bl=148 pwr=0
2025-03-30 07:42:43 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=330): ver=1 fn=204 tn=0 bl=148 pwr=0
2025-03-30 07:42:43 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=330): ver=1 fn=204 tn=1 bl=148 pwr=0
2025-03-30 07:42:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:42:43 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=373): ver=1 fn=204 tn=2 bl=148 pwr=0
2025-03-30 07:42:43 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=373): ver=1 fn=204 tn=3 bl=148 pwr=0
2025-03-30 07:42:43 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=373): ver=1 fn=204 tn=4 bl=148 pwr=0
2025-03-30 07:42:43 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=373): ver=1 fn=204 tn=5 bl=148 pwr=0
2025-03-30 07:42:43 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=373): ver=1 fn=204 tn=6 bl=148 pwr=0
2025-03-30 07:42:43 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=373): ver=1 fn=204 tn=7 bl=148 pwr=0
2025-03-30 07:42:43 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=373): ver=1 fn=205 tn=0 bl=148 pwr=0
2025-03-30 07:42:43 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=373): ver=1 fn=205 tn=1 bl=148 pwr=0
2025-03-30 07:42:43 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=373): ver=1 fn=205 tn=2 bl=148 pwr=0
2025-03-30 07:42:43 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=373): ver=1 fn=205 tn=3 bl=148 pwr=0
2025-03-30 07:42:43 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=373): ver=1 fn=205 tn=4 bl=148 pwr=0
2025-03-30 07:42:43 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=373): ver=1 fn=205 tn=5 bl=148 pwr=0
2025-03-30 07:42:43 [DEBUG] clck_gen.py:128 IND CLOCK 408
2025-03-30 07:42:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:42:43 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=417): ver=1 fn=205 tn=6 bl=148 pwr=0
2025-03-30 07:42:43 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=417): ver=1 fn=205 tn=7 bl=148 pwr=0
2025-03-30 07:42:43 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=417): ver=1 fn=206 tn=0 bl=148 pwr=0
2025-03-30 07:42:43 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=417): ver=1 fn=206 tn=1 bl=148 pwr=0
2025-03-30 07:42:43 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=417): ver=1 fn=206 tn=2 bl=148 pwr=0
2025-03-30 07:42:43 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=417): ver=1 fn=206 tn=3 bl=148 pwr=0
2025-03-30 07:42:43 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=417): ver=1 fn=206 tn=4 bl=148 pwr=0
2025-03-30 07:42:43 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=417): ver=1 fn=206 tn=5 bl=148 pwr=0
2025-03-30 07:42:43 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=417): ver=1 fn=206 tn=6 bl=148 pwr=0
2025-03-30 07:42:43 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=417): ver=1 fn=206 tn=7 bl=148 pwr=0
2025-03-30 07:42:43 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=417): ver=1 fn=207 tn=0 bl=148 pwr=0
2025-03-30 07:42:44 [DEBUG] fake_trx.py:377 (BTS@172.18.26.20:5700) Recv FAKE_TRXC_DELAY cmd
2025-03-30 07:42:44 [INFO] fake_trx.py:380 (BTS@172.18.26.20:5700) Artificial TRXC delay set to 0
2025-03-30 07:42:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD FAKE_TRXC_DELAY
2025-03-30 07:42:44 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:42:44 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:42:44 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:42:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:42:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:42:44 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:42:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:42:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:42:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:42:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:42:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:42:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:42:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:42:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:42:44 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=460): ver=1 fn=207 tn=1 bl=148 pwr=0
2025-03-30 07:42:44 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=460): ver=1 fn=207 tn=2 bl=148 pwr=0
2025-03-30 07:42:44 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=460): ver=1 fn=207 tn=3 bl=148 pwr=0
2025-03-30 07:42:44 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=460): ver=1 fn=207 tn=4 bl=148 pwr=0
2025-03-30 07:42:44 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=460): ver=1 fn=207 tn=5 bl=148 pwr=0
2025-03-30 07:42:44 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=460): ver=1 fn=207 tn=6 bl=148 pwr=0
2025-03-30 07:42:44 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=460): ver=1 fn=207 tn=7 bl=148 pwr=0
2025-03-30 07:42:44 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=460): ver=1 fn=208 tn=0 bl=148 pwr=0
2025-03-30 07:42:44 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=460): ver=1 fn=208 tn=1 bl=148 pwr=0
2025-03-30 07:42:44 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=460): ver=1 fn=208 tn=2 bl=148 pwr=0
2025-03-30 07:42:44 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=460): ver=1 fn=208 tn=3 bl=148 pwr=0
2025-03-30 07:42:44 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=460): ver=1 fn=208 tn=4 bl=148 pwr=0
2025-03-30 07:42:44 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=460): ver=1 fn=208 tn=5 bl=148 pwr=0
2025-03-30 07:42:44 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=460): ver=1 fn=208 tn=6 bl=148 pwr=0
2025-03-30 07:42:44 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=460): ver=1 fn=208 tn=7 bl=148 pwr=0
2025-03-30 07:42:44 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=460): ver=1 fn=209 tn=0 bl=148 pwr=0
2025-03-30 07:42:44 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=460): ver=1 fn=209 tn=1 bl=148 pwr=0
2025-03-30 07:42:44 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=460): ver=1 fn=209 tn=2 bl=148 pwr=0
2025-03-30 07:42:44 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=460): ver=1 fn=209 tn=3 bl=148 pwr=0
2025-03-30 07:42:44 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=460): ver=1 fn=209 tn=4 bl=148 pwr=0
2025-03-30 07:42:44 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=460): ver=1 fn=209 tn=5 bl=148 pwr=0
2025-03-30 07:42:44 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=460): ver=1 fn=209 tn=6 bl=148 pwr=0
2025-03-30 07:42:44 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=460): ver=1 fn=209 tn=7 bl=148 pwr=0
2025-03-30 07:42:44 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=460): ver=1 fn=210 tn=0 bl=148 pwr=0
2025-03-30 07:42:44 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=460): ver=1 fn=210 tn=1 bl=148 pwr=0
2025-03-30 07:42:44 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=460): ver=1 fn=210 tn=2 bl=148 pwr=0
2025-03-30 07:42:44 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=460): ver=1 fn=210 tn=3 bl=148 pwr=0
2025-03-30 07:42:44 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=460): ver=1 fn=210 tn=4 bl=148 pwr=0
2025-03-30 07:42:44 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=460): ver=1 fn=210 tn=5 bl=148 pwr=0
2025-03-30 07:42:44 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=460): ver=1 fn=210 tn=6 bl=148 pwr=0
2025-03-30 07:42:44 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=460): ver=1 fn=210 tn=7 bl=148 pwr=0
2025-03-30 07:42:44 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=460): ver=1 fn=211 tn=0 bl=148 pwr=0
2025-03-30 07:42:44 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=460): ver=1 fn=211 tn=1 bl=148 pwr=0
2025-03-30 07:42:44 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=460): ver=1 fn=211 tn=2 bl=148 pwr=0
2025-03-30 07:42:44 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=460): ver=1 fn=211 tn=3 bl=148 pwr=0
2025-03-30 07:42:44 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=460): ver=1 fn=211 tn=4 bl=148 pwr=0
2025-03-30 07:42:44 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=460): ver=1 fn=211 tn=5 bl=148 pwr=0
2025-03-30 07:42:44 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=460): ver=1 fn=211 tn=6 bl=148 pwr=0
2025-03-30 07:42:44 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=460): ver=1 fn=211 tn=7 bl=148 pwr=0
2025-03-30 07:42:44 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=460): ver=1 fn=212 tn=0 bl=148 pwr=0
2025-03-30 07:42:44 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=460): ver=1 fn=212 tn=1 bl=148 pwr=0
2025-03-30 07:42:44 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=460): ver=1 fn=212 tn=2 bl=148 pwr=0
2025-03-30 07:42:44 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=460): ver=1 fn=212 tn=3 bl=148 pwr=0
2025-03-30 07:42:44 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=460): ver=1 fn=212 tn=4 bl=148 pwr=0
2025-03-30 07:42:44 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=460): ver=1 fn=212 tn=5 bl=148 pwr=0
2025-03-30 07:42:44 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=460): ver=1 fn=212 tn=6 bl=148 pwr=0
2025-03-30 07:42:44 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=460): ver=1 fn=212 tn=7 bl=148 pwr=0
2025-03-30 07:42:44 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=460): ver=1 fn=213 tn=0 bl=148 pwr=0
2025-03-30 07:42:44 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=460): ver=1 fn=213 tn=1 bl=148 pwr=0
2025-03-30 07:42:44 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=460): ver=1 fn=213 tn=2 bl=148 pwr=0
2025-03-30 07:42:44 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=460): ver=1 fn=213 tn=3 bl=148 pwr=0
2025-03-30 07:42:44 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=460): ver=1 fn=213 tn=4 bl=148 pwr=0
2025-03-30 07:42:44 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=460): ver=1 fn=213 tn=5 bl=148 pwr=0
2025-03-30 07:42:44 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=460): ver=1 fn=213 tn=6 bl=148 pwr=0
2025-03-30 07:42:44 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=460): ver=1 fn=213 tn=7 bl=148 pwr=0
2025-03-30 07:42:44 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=460): ver=1 fn=214 tn=0 bl=148 pwr=0
2025-03-30 07:42:44 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=460): ver=1 fn=214 tn=1 bl=148 pwr=0
2025-03-30 07:42:44 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=460): ver=1 fn=214 tn=2 bl=148 pwr=0
2025-03-30 07:42:44 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=460): ver=1 fn=214 tn=3 bl=148 pwr=0
2025-03-30 07:42:44 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=460): ver=1 fn=214 tn=4 bl=148 pwr=0
2025-03-30 07:42:44 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=460): ver=1 fn=214 tn=5 bl=148 pwr=0
2025-03-30 07:42:44 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=460): ver=1 fn=214 tn=6 bl=148 pwr=0
2025-03-30 07:42:44 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=460): ver=1 fn=214 tn=7 bl=148 pwr=0
2025-03-30 07:42:44 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=460): ver=1 fn=215 tn=0 bl=148 pwr=0
2025-03-30 07:42:44 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=460): ver=1 fn=215 tn=1 bl=148 pwr=0
2025-03-30 07:42:44 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=460): ver=1 fn=215 tn=2 bl=148 pwr=0
2025-03-30 07:42:44 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=460): ver=1 fn=215 tn=3 bl=148 pwr=0
2025-03-30 07:42:44 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=460): ver=1 fn=215 tn=4 bl=148 pwr=0
2025-03-30 07:42:44 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=460): ver=1 fn=215 tn=5 bl=148 pwr=0
2025-03-30 07:42:44 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=460): ver=1 fn=215 tn=6 bl=148 pwr=0
2025-03-30 07:42:44 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=460): ver=1 fn=215 tn=7 bl=148 pwr=0
2025-03-30 07:42:44 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=460): ver=1 fn=216 tn=0 bl=148 pwr=0
2025-03-30 07:42:44 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=460): ver=1 fn=216 tn=1 bl=148 pwr=0
2025-03-30 07:42:44 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=460): ver=1 fn=216 tn=2 bl=148 pwr=0
2025-03-30 07:42:44 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=460): ver=1 fn=216 tn=3 bl=148 pwr=0
2025-03-30 07:42:44 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=460): ver=1 fn=216 tn=4 bl=148 pwr=0
2025-03-30 07:42:44 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:42:44 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=460): ver=1 fn=216 tn=5 bl=148 pwr=0
2025-03-30 07:42:44 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=460): ver=1 fn=216 tn=6 bl=148 pwr=0
2025-03-30 07:42:44 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:42:44 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=460): ver=1 fn=216 tn=7 bl=148 pwr=0
2025-03-30 07:42:44 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=460): ver=1 fn=217 tn=0 bl=148 pwr=0
2025-03-30 07:42:44 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=460): ver=1 fn=217 tn=1 bl=148 pwr=0
2025-03-30 07:42:44 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=460): ver=1 fn=217 tn=2 bl=148 pwr=0
2025-03-30 07:42:44 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=460): ver=1 fn=217 tn=3 bl=148 pwr=0
2025-03-30 07:42:44 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=460): ver=1 fn=217 tn=4 bl=148 pwr=0
2025-03-30 07:42:44 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=460): ver=1 fn=217 tn=5 bl=148 pwr=0
2025-03-30 07:42:44 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=460): ver=1 fn=217 tn=6 bl=148 pwr=0
2025-03-30 07:42:44 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=460): ver=1 fn=217 tn=7 bl=148 pwr=0
2025-03-30 07:42:44 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:42:44 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=460): ver=1 fn=218 tn=0 bl=148 pwr=0
2025-03-30 07:42:44 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:42:44 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=460): ver=1 fn=218 tn=1 bl=148 pwr=0
2025-03-30 07:42:44 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=460): ver=1 fn=218 tn=2 bl=148 pwr=0
2025-03-30 07:42:44 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=460): ver=1 fn=218 tn=3 bl=148 pwr=0
2025-03-30 07:42:44 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=460): ver=1 fn=218 tn=4 bl=148 pwr=0
2025-03-30 07:42:44 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=460): ver=1 fn=218 tn=5 bl=148 pwr=0
2025-03-30 07:42:44 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=460): ver=1 fn=218 tn=6 bl=148 pwr=0
2025-03-30 07:42:44 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=460): ver=1 fn=218 tn=7 bl=148 pwr=0
2025-03-30 07:42:44 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=460): ver=1 fn=219 tn=0 bl=148 pwr=0
2025-03-30 07:42:44 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=460): ver=1 fn=219 tn=1 bl=148 pwr=0
2025-03-30 07:42:44 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=460): ver=1 fn=219 tn=2 bl=148 pwr=0
2025-03-30 07:42:44 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=460): ver=1 fn=219 tn=3 bl=148 pwr=0
2025-03-30 07:42:44 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=460): ver=1 fn=219 tn=4 bl=148 pwr=0
2025-03-30 07:42:44 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=460): ver=1 fn=219 tn=5 bl=148 pwr=0
2025-03-30 07:42:44 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=460): ver=1 fn=219 tn=6 bl=148 pwr=0
2025-03-30 07:42:44 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=460): ver=1 fn=219 tn=7 bl=148 pwr=0
2025-03-30 07:42:44 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=460): ver=1 fn=220 tn=0 bl=148 pwr=0
2025-03-30 07:42:44 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=460): ver=1 fn=220 tn=1 bl=148 pwr=0
2025-03-30 07:42:44 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=460): ver=1 fn=220 tn=2 bl=148 pwr=0
2025-03-30 07:42:44 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=460): ver=1 fn=220 tn=3 bl=148 pwr=0
2025-03-30 07:42:44 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=460): ver=1 fn=220 tn=4 bl=148 pwr=0
2025-03-30 07:42:44 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=460): ver=1 fn=220 tn=5 bl=148 pwr=0
2025-03-30 07:42:44 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=460): ver=1 fn=220 tn=6 bl=148 pwr=0
2025-03-30 07:42:44 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=460): ver=1 fn=220 tn=7 bl=148 pwr=0
2025-03-30 07:42:44 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=460): ver=1 fn=221 tn=0 bl=148 pwr=0
2025-03-30 07:42:44 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=460): ver=1 fn=221 tn=1 bl=148 pwr=0
2025-03-30 07:42:44 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=460): ver=1 fn=221 tn=2 bl=148 pwr=0
2025-03-30 07:42:44 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=460): ver=1 fn=221 tn=3 bl=148 pwr=0
2025-03-30 07:42:44 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=460): ver=1 fn=221 tn=4 bl=148 pwr=0
2025-03-30 07:42:44 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=460): ver=1 fn=221 tn=5 bl=148 pwr=0
2025-03-30 07:42:44 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=460): ver=1 fn=221 tn=6 bl=148 pwr=0
2025-03-30 07:42:44 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=460): ver=1 fn=420 tn=0 bl=148 pwr=0
2025-03-30 07:42:44 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=460): ver=1 fn=420 tn=1 bl=148 pwr=0
2025-03-30 07:42:44 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=460): ver=1 fn=420 tn=2 bl=148 pwr=0
2025-03-30 07:42:44 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=460): ver=1 fn=420 tn=3 bl=148 pwr=0
2025-03-30 07:42:44 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=460): ver=1 fn=420 tn=4 bl=148 pwr=0
2025-03-30 07:42:44 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:42:44 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=460): ver=1 fn=420 tn=5 bl=148 pwr=0
2025-03-30 07:42:44 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:42:44 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=460): ver=1 fn=420 tn=6 bl=148 pwr=0
2025-03-30 07:42:44 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=460): ver=1 fn=420 tn=7 bl=148 pwr=0
2025-03-30 07:42:44 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=460): ver=1 fn=421 tn=0 bl=148 pwr=0
2025-03-30 07:42:44 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=460): ver=1 fn=421 tn=1 bl=148 pwr=0
2025-03-30 07:42:44 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=460): ver=1 fn=421 tn=2 bl=148 pwr=0
2025-03-30 07:42:44 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=460): ver=1 fn=421 tn=3 bl=148 pwr=0
2025-03-30 07:42:44 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=460): ver=1 fn=421 tn=4 bl=148 pwr=0
2025-03-30 07:42:44 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=460): ver=1 fn=421 tn=5 bl=148 pwr=0
2025-03-30 07:42:44 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=460): ver=1 fn=421 tn=6 bl=148 pwr=0
2025-03-30 07:42:44 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=460): ver=1 fn=421 tn=7 bl=148 pwr=0
2025-03-30 07:42:44 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=460): ver=1 fn=422 tn=0 bl=148 pwr=0
2025-03-30 07:42:44 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=460): ver=1 fn=422 tn=1 bl=148 pwr=0
2025-03-30 07:42:44 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=460): ver=1 fn=422 tn=2 bl=148 pwr=0
2025-03-30 07:42:44 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=460): ver=1 fn=422 tn=3 bl=148 pwr=0
2025-03-30 07:42:44 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=460): ver=1 fn=422 tn=4 bl=148 pwr=0
2025-03-30 07:42:44 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=460): ver=1 fn=422 tn=5 bl=148 pwr=0
2025-03-30 07:42:44 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=460): ver=1 fn=422 tn=6 bl=148 pwr=0
2025-03-30 07:42:44 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=460): ver=1 fn=422 tn=7 bl=148 pwr=0
2025-03-30 07:42:44 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=460): ver=1 fn=423 tn=0 bl=148 pwr=0
2025-03-30 07:42:44 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=460): ver=1 fn=423 tn=1 bl=148 pwr=0
2025-03-30 07:42:44 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=460): ver=1 fn=423 tn=2 bl=148 pwr=0
2025-03-30 07:42:44 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=460): ver=1 fn=423 tn=3 bl=148 pwr=0
2025-03-30 07:42:44 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=460): ver=1 fn=423 tn=4 bl=148 pwr=0
2025-03-30 07:42:44 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=460): ver=1 fn=423 tn=5 bl=148 pwr=0
2025-03-30 07:42:44 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=460): ver=1 fn=423 tn=6 bl=148 pwr=0
2025-03-30 07:42:44 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=460): ver=1 fn=423 tn=7 bl=148 pwr=0
2025-03-30 07:42:44 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=460): ver=1 fn=424 tn=0 bl=148 pwr=0
2025-03-30 07:42:44 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=460): ver=1 fn=424 tn=1 bl=148 pwr=0
2025-03-30 07:42:44 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=460): ver=1 fn=424 tn=2 bl=148 pwr=0
2025-03-30 07:42:44 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=460): ver=1 fn=424 tn=3 bl=148 pwr=0
2025-03-30 07:42:44 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=460): ver=1 fn=424 tn=4 bl=148 pwr=0
2025-03-30 07:42:44 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=460): ver=1 fn=424 tn=5 bl=148 pwr=0
2025-03-30 07:42:44 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=460): ver=1 fn=424 tn=6 bl=148 pwr=0
2025-03-30 07:42:44 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=460): ver=1 fn=424 tn=7 bl=148 pwr=0
2025-03-30 07:42:44 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=460): ver=1 fn=425 tn=0 bl=148 pwr=0
2025-03-30 07:42:44 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=460): ver=1 fn=425 tn=1 bl=148 pwr=0
2025-03-30 07:42:44 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:42:44 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:42:44 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 07:42:44 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 07:42:44 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 07:42:44 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=463 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:42:44 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=463 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:42:44 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=463 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:42:44 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=463 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:42:49 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 07:42:49 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 07:42:49 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:42:49 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:42:49 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:42:49 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:42:49 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:42:49 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 07:42:49 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:42:49 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 07:42:49 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 07:42:49 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 07:42:49 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 07:42:49 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 07:42:49 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:42:49 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:42:49 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 07:42:49 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 07:42:49 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 07:42:49 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 07:42:49 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 07:42:49 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 07:42:49 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:42:49 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:42:49 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 07:42:49 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 07:42:49 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 07:42:49 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 07:42:49 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 07:42:49 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 07:42:49 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:42:49 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 07:42:49 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:42:49 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 07:42:49 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 07:42:49 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 07:42:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 07:42:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 07:42:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 07:42:49 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 07:42:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 07:42:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 07:42:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 07:42:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:42:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 07:42:49 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 07:42:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:42:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:42:49 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 07:42:49 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 07:42:49 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 07:42:49 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 07:42:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:42:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:42:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:42:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 07:42:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:42:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:42:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:42:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:42:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:42:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:42:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:42:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:42:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:42:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:42:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:42:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:42:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:42:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:42:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:42:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:42:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:42:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:42:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:42:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:42:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:42:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:42:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:42:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:42:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:42:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:42:49 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-03-30 07:42:49 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-03-30 07:42:49 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-03-30 07:42:49 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-03-30 07:42:49 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-03-30 07:42:49 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-03-30 07:42:49 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-03-30 07:42:49 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-03-30 07:42:49 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-03-30 07:42:49 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-03-30 07:42:49 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=105 tn=0 bl=148 pwr=0
2025-03-30 07:42:49 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=105 tn=1 bl=148 pwr=0
2025-03-30 07:42:49 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=105 tn=2 bl=148 pwr=0
2025-03-30 07:42:49 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=105 tn=3 bl=148 pwr=0
2025-03-30 07:42:49 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=105 tn=4 bl=148 pwr=0
2025-03-30 07:42:49 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=105 tn=5 bl=148 pwr=0
2025-03-30 07:42:49 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=105 tn=6 bl=148 pwr=0
2025-03-30 07:42:49 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=105 tn=7 bl=148 pwr=0
2025-03-30 07:42:49 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=106 tn=0 bl=148 pwr=0
2025-03-30 07:42:49 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=106 tn=1 bl=148 pwr=0
2025-03-30 07:42:49 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=106 tn=2 bl=148 pwr=0
2025-03-30 07:42:49 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=106 tn=3 bl=148 pwr=0
2025-03-30 07:42:49 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=106 tn=4 bl=148 pwr=0
2025-03-30 07:42:49 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=106 tn=5 bl=148 pwr=0
2025-03-30 07:42:49 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=106 tn=6 bl=148 pwr=0
2025-03-30 07:42:49 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=106 tn=7 bl=148 pwr=0
2025-03-30 07:42:49 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=107 tn=0 bl=148 pwr=0
2025-03-30 07:42:49 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=107 tn=1 bl=148 pwr=0
2025-03-30 07:42:49 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=107 tn=2 bl=148 pwr=0
2025-03-30 07:42:49 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=107 tn=3 bl=148 pwr=0
2025-03-30 07:42:49 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=107 tn=4 bl=148 pwr=0
2025-03-30 07:42:49 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=107 tn=5 bl=148 pwr=0
2025-03-30 07:42:49 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=107 tn=6 bl=148 pwr=0
2025-03-30 07:42:49 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=107 tn=7 bl=148 pwr=0
2025-03-30 07:42:49 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 07:42:49 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 07:42:49 [DEBUG] fake_trx.py:317 (BTS@172.18.26.20:5700) Recv FAKE_CI cmd
2025-03-30 07:42:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:42:49 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:42:49 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:42:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:42:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:42:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:42:49 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:42:49 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:42:49 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:42:49 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:42:49 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:42:49 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:42:49 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:42:49 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:42:49 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 07:42:49 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 07:42:49 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 07:42:49 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=117 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:42:49 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=117 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:42:49 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=117 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:42:49 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=117 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:42:49 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=117 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:42:49 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=117 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:42:49 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=118 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:42:49 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=118 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:42:49 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=118 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:42:49 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=118 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:42:49 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=118 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:42:49 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=118 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:42:49 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=118 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:42:49 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=118 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:42:54 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 07:42:54 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 07:42:54 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:42:54 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:42:54 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:42:54 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:42:54 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:42:54 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 07:42:54 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:42:54 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 07:42:54 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 07:42:54 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 07:42:54 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 07:42:54 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 07:42:54 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:42:54 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:42:54 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 07:42:54 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 07:42:54 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 07:42:54 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 07:42:54 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 07:42:54 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 07:42:54 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:42:54 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:42:54 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 07:42:54 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 07:42:54 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 07:42:54 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 07:42:54 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 07:42:54 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 07:42:54 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:42:54 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:42:54 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 07:42:54 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 07:42:54 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 07:42:54 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 07:42:54 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 07:42:54 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 07:42:54 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 07:42:54 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 07:42:54 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 07:42:54 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 07:42:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 07:42:54 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:42:54 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 07:42:54 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 07:42:54 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:42:54 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:42:54 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 07:42:54 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 07:42:54 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 07:42:54 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 07:42:54 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:42:54 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:42:54 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:42:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 07:42:54 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:42:54 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:42:54 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:42:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:42:54 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:42:54 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:42:54 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:42:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:42:54 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:42:54 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:42:54 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:42:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:42:54 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:42:54 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:42:54 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:42:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:42:54 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:42:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:42:54 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:42:54 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:42:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:42:54 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:42:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:42:54 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:42:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:42:54 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:42:54 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-03-30 07:42:55 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-03-30 07:42:55 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-03-30 07:42:55 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-03-30 07:42:55 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-03-30 07:42:55 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-03-30 07:42:55 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-03-30 07:42:55 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-03-30 07:42:55 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-03-30 07:42:55 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-03-30 07:42:55 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=105 tn=0 bl=148 pwr=0
2025-03-30 07:42:55 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=105 tn=1 bl=148 pwr=0
2025-03-30 07:42:55 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=105 tn=2 bl=148 pwr=0
2025-03-30 07:42:55 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=105 tn=3 bl=148 pwr=0
2025-03-30 07:42:55 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=105 tn=4 bl=148 pwr=0
2025-03-30 07:42:55 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=105 tn=5 bl=148 pwr=0
2025-03-30 07:42:55 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=105 tn=6 bl=148 pwr=0
2025-03-30 07:42:55 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=105 tn=7 bl=148 pwr=0
2025-03-30 07:42:55 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=106 tn=0 bl=148 pwr=0
2025-03-30 07:42:55 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=106 tn=1 bl=148 pwr=0
2025-03-30 07:42:55 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=106 tn=2 bl=148 pwr=0
2025-03-30 07:42:55 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=106 tn=3 bl=148 pwr=0
2025-03-30 07:42:55 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=106 tn=4 bl=148 pwr=0
2025-03-30 07:42:55 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=106 tn=5 bl=148 pwr=0
2025-03-30 07:42:55 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=106 tn=6 bl=148 pwr=0
2025-03-30 07:42:55 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=106 tn=7 bl=148 pwr=0
2025-03-30 07:42:55 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=107 tn=0 bl=148 pwr=0
2025-03-30 07:42:55 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=107 tn=1 bl=148 pwr=0
2025-03-30 07:42:55 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=107 tn=2 bl=148 pwr=0
2025-03-30 07:42:55 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=107 tn=3 bl=148 pwr=0
2025-03-30 07:42:55 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=107 tn=4 bl=148 pwr=0
2025-03-30 07:42:55 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=107 tn=5 bl=148 pwr=0
2025-03-30 07:42:55 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=107 tn=6 bl=148 pwr=0
2025-03-30 07:42:55 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=107 tn=7 bl=148 pwr=0
2025-03-30 07:42:55 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 07:42:55 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 07:42:55 [DEBUG] fake_trx.py:317 (BTS@172.18.26.20:5700) Recv FAKE_CI cmd
2025-03-30 07:42:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:42:55 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:42:55 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:42:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:42:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:42:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:42:55 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:42:55 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:42:55 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:42:55 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:42:55 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:42:55 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:42:55 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:42:55 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:42:55 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 07:42:55 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 07:42:55 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 07:43:00 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 07:43:00 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 07:43:00 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:43:00 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:43:00 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:43:00 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:43:00 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:43:00 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 07:43:00 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:43:00 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 07:43:00 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 07:43:00 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 07:43:00 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 07:43:00 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 07:43:00 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:43:00 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:43:00 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 07:43:00 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 07:43:00 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 07:43:00 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 07:43:00 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 07:43:00 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 07:43:00 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:43:00 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:43:00 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 07:43:00 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 07:43:00 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 07:43:00 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 07:43:00 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 07:43:00 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 07:43:00 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:43:00 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:43:00 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 07:43:00 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 07:43:00 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 07:43:00 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 07:43:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 07:43:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 07:43:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 07:43:00 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 07:43:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 07:43:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 07:43:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 07:43:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:43:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 07:43:00 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 07:43:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:43:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:43:00 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 07:43:00 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 07:43:00 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 07:43:00 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 07:43:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:43:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:43:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:43:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 07:43:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:43:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:43:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:43:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:43:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:43:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:43:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:43:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:43:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:43:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:43:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:43:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:43:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:43:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:43:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:43:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:43:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:43:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:43:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:43:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:43:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:43:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:43:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:43:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:43:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:43:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:43:00 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-03-30 07:43:00 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-03-30 07:43:00 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-03-30 07:43:00 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-03-30 07:43:00 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-03-30 07:43:00 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-03-30 07:43:00 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-03-30 07:43:00 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-03-30 07:43:00 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-03-30 07:43:00 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-03-30 07:43:00 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=105 tn=0 bl=148 pwr=0
2025-03-30 07:43:00 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=105 tn=1 bl=148 pwr=0
2025-03-30 07:43:00 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=105 tn=2 bl=148 pwr=0
2025-03-30 07:43:00 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=105 tn=3 bl=148 pwr=0
2025-03-30 07:43:00 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=105 tn=4 bl=148 pwr=0
2025-03-30 07:43:00 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=105 tn=5 bl=148 pwr=0
2025-03-30 07:43:00 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=105 tn=6 bl=148 pwr=0
2025-03-30 07:43:00 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=105 tn=7 bl=148 pwr=0
2025-03-30 07:43:00 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=106 tn=0 bl=148 pwr=0
2025-03-30 07:43:00 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=106 tn=1 bl=148 pwr=0
2025-03-30 07:43:00 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=106 tn=2 bl=148 pwr=0
2025-03-30 07:43:00 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=106 tn=3 bl=148 pwr=0
2025-03-30 07:43:00 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=106 tn=4 bl=148 pwr=0
2025-03-30 07:43:00 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=106 tn=5 bl=148 pwr=0
2025-03-30 07:43:00 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=106 tn=6 bl=148 pwr=0
2025-03-30 07:43:00 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=106 tn=7 bl=148 pwr=0
2025-03-30 07:43:00 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=107 tn=0 bl=148 pwr=0
2025-03-30 07:43:00 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=107 tn=1 bl=148 pwr=0
2025-03-30 07:43:00 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=107 tn=2 bl=148 pwr=0
2025-03-30 07:43:00 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=107 tn=3 bl=148 pwr=0
2025-03-30 07:43:00 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=107 tn=4 bl=148 pwr=0
2025-03-30 07:43:00 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=107 tn=5 bl=148 pwr=0
2025-03-30 07:43:00 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=107 tn=6 bl=148 pwr=0
2025-03-30 07:43:00 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=107 tn=7 bl=148 pwr=0
2025-03-30 07:43:00 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 07:43:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:43:00 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 07:43:00 [DEBUG] fake_trx.py:317 (BTS@172.18.26.20:5700) Recv FAKE_CI cmd
2025-03-30 07:43:00 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:43:00 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:43:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:43:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:43:00 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:43:00 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:43:00 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 07:43:00 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 07:43:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:43:00 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:43:00 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:43:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:43:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:43:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:43:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:43:01 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:43:01 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:43:01 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:43:01 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:43:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:43:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:43:01 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:43:01 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:43:01 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 07:43:01 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 07:43:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:43:01 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:43:01 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:43:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:43:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:43:01 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-03-30 07:43:01 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:43:01 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:43:01 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:43:01 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:43:01 [DEBUG] clck_gen.py:128 IND CLOCK 306
2025-03-30 07:43:02 [DEBUG] clck_gen.py:128 IND CLOCK 408
2025-03-30 07:43:02 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:43:02 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:43:02 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:43:02 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:43:02 [DEBUG] clck_gen.py:128 IND CLOCK 510
2025-03-30 07:43:03 [DEBUG] clck_gen.py:128 IND CLOCK 612
2025-03-30 07:43:03 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:43:03 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:43:03 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:43:03 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:43:03 [DEBUG] clck_gen.py:128 IND CLOCK 714
2025-03-30 07:43:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:43:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:43:04 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:43:04 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:43:04 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:43:04 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:43:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:43:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:43:04 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:43:04 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:43:04 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 07:43:04 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 07:43:04 [DEBUG] clck_gen.py:128 IND CLOCK 816
2025-03-30 07:43:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:43:04 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:43:04 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:43:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:43:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:43:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:43:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:43:04 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:43:04 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:43:04 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:43:04 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:43:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:43:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:43:04 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:43:04 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:43:04 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 07:43:04 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 07:43:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:43:04 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:43:04 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:43:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:43:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:43:04 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:43:04 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:43:04 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:43:04 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:43:04 [DEBUG] clck_gen.py:128 IND CLOCK 918
2025-03-30 07:43:05 [DEBUG] clck_gen.py:128 IND CLOCK 1020
2025-03-30 07:43:05 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:43:05 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:43:05 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:43:05 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:43:05 [DEBUG] clck_gen.py:128 IND CLOCK 1122
2025-03-30 07:43:06 [DEBUG] clck_gen.py:128 IND CLOCK 1224
2025-03-30 07:43:06 [DEBUG] clck_gen.py:128 IND CLOCK 1326
2025-03-30 07:43:06 [DEBUG] clck_gen.py:128 IND CLOCK 1428
2025-03-30 07:43:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:43:07 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:43:07 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:43:07 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:43:07 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:43:07 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:43:07 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:43:07 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:43:07 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:43:07 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:43:07 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 07:43:07 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 07:43:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:43:07 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:43:07 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:43:07 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:43:07 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:43:07 [DEBUG] clck_gen.py:128 IND CLOCK 1530
2025-03-30 07:43:07 [DEBUG] clck_gen.py:128 IND CLOCK 1632
2025-03-30 07:43:08 [DEBUG] clck_gen.py:128 IND CLOCK 1734
2025-03-30 07:43:08 [DEBUG] clck_gen.py:128 IND CLOCK 1836
2025-03-30 07:43:09 [DEBUG] clck_gen.py:128 IND CLOCK 1938
2025-03-30 07:43:09 [DEBUG] clck_gen.py:128 IND CLOCK 2040
2025-03-30 07:43:10 [DEBUG] clck_gen.py:128 IND CLOCK 2142
2025-03-30 07:43:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:43:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:43:10 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:43:10 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:43:10 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:43:10 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:43:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:43:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:43:10 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:43:10 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:43:10 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 07:43:10 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 07:43:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:43:10 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:43:10 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:43:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:43:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:43:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:43:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:43:10 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:43:10 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:43:10 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:43:10 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:43:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:43:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:43:10 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:43:10 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:43:10 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 07:43:10 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 07:43:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:43:10 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:43:10 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:43:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:43:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:43:10 [DEBUG] clck_gen.py:128 IND CLOCK 2244
2025-03-30 07:43:11 [DEBUG] clck_gen.py:128 IND CLOCK 2346
2025-03-30 07:43:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:43:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:43:11 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:43:11 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:43:11 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:43:11 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:43:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:43:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:43:11 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:43:11 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:43:11 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 07:43:11 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 07:43:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:43:11 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.26.22:6700) Recv SETFH cmd
2025-03-30 07:43:11 [INFO] transceiver.py:237 (MS@172.18.26.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2025-03-30 07:43:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:43:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:43:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:43:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:43:11 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:43:11 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:43:11 [INFO] transceiver.py:241 (MS@172.18.26.22:6700) Frequency hopping disabled
2025-03-30 07:43:11 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:43:11 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:43:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:43:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:43:11 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:43:11 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:43:11 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 07:43:11 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 07:43:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:43:11 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.26.22:6700) Recv SETFH cmd
2025-03-30 07:43:11 [INFO] transceiver.py:237 (MS@172.18.26.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2025-03-30 07:43:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:43:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:43:11 [DEBUG] clck_gen.py:128 IND CLOCK 2448
2025-03-30 07:43:12 [DEBUG] clck_gen.py:128 IND CLOCK 2550
2025-03-30 07:43:12 [DEBUG] clck_gen.py:128 IND CLOCK 2652
2025-03-30 07:43:13 [DEBUG] clck_gen.py:128 IND CLOCK 2754
2025-03-30 07:43:13 [DEBUG] clck_gen.py:128 IND CLOCK 2856
2025-03-30 07:43:14 [DEBUG] clck_gen.py:128 IND CLOCK 2958
2025-03-30 07:43:14 [DEBUG] clck_gen.py:128 IND CLOCK 3060
2025-03-30 07:43:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:43:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:43:14 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:43:14 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:43:14 [INFO] transceiver.py:241 (MS@172.18.26.22:6700) Frequency hopping disabled
2025-03-30 07:43:14 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:43:14 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:43:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:43:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:43:14 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:43:14 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:43:14 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 07:43:14 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 07:43:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:43:14 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.26.22:6700) Recv SETFH cmd
2025-03-30 07:43:14 [INFO] transceiver.py:237 (MS@172.18.26.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2025-03-30 07:43:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:43:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:43:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:43:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:43:14 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:43:14 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:43:14 [INFO] transceiver.py:241 (MS@172.18.26.22:6700) Frequency hopping disabled
2025-03-30 07:43:14 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:43:14 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:43:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:43:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:43:14 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:43:14 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:43:14 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 07:43:14 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 07:43:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:43:14 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.26.22:6700) Recv SETFH cmd
2025-03-30 07:43:14 [INFO] transceiver.py:237 (MS@172.18.26.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2025-03-30 07:43:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:43:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:43:14 [DEBUG] clck_gen.py:128 IND CLOCK 3162
2025-03-30 07:43:15 [DEBUG] clck_gen.py:128 IND CLOCK 3264
2025-03-30 07:43:15 [DEBUG] clck_gen.py:128 IND CLOCK 3366
2025-03-30 07:43:16 [DEBUG] clck_gen.py:128 IND CLOCK 3468
2025-03-30 07:43:16 [DEBUG] clck_gen.py:128 IND CLOCK 3570
2025-03-30 07:43:17 [DEBUG] clck_gen.py:128 IND CLOCK 3672
2025-03-30 07:43:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:43:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:43:17 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:43:17 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:43:17 [INFO] transceiver.py:241 (MS@172.18.26.22:6700) Frequency hopping disabled
2025-03-30 07:43:17 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:43:17 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:43:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:43:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:43:17 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:43:17 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:43:17 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 07:43:17 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 07:43:17 [DEBUG] clck_gen.py:128 IND CLOCK 3774
2025-03-30 07:43:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:43:17 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.26.22:6700) Recv SETFH cmd
2025-03-30 07:43:17 [INFO] transceiver.py:237 (MS@172.18.26.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2025-03-30 07:43:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:43:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:43:18 [DEBUG] clck_gen.py:128 IND CLOCK 3876
2025-03-30 07:43:18 [DEBUG] clck_gen.py:128 IND CLOCK 3978
2025-03-30 07:43:19 [DEBUG] clck_gen.py:128 IND CLOCK 4080
2025-03-30 07:43:19 [DEBUG] clck_gen.py:128 IND CLOCK 4182
2025-03-30 07:43:20 [DEBUG] clck_gen.py:128 IND CLOCK 4284
2025-03-30 07:43:20 [DEBUG] clck_gen.py:128 IND CLOCK 4386
2025-03-30 07:43:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:43:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:43:20 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:43:20 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:43:20 [INFO] transceiver.py:241 (MS@172.18.26.22:6700) Frequency hopping disabled
2025-03-30 07:43:20 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:43:20 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:43:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:43:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:43:20 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:43:20 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:43:20 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 07:43:20 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 07:43:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:43:20 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.26.22:6700) Recv SETFH cmd
2025-03-30 07:43:20 [INFO] transceiver.py:237 (MS@172.18.26.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2025-03-30 07:43:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:43:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:43:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:43:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:43:20 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:43:20 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:43:20 [INFO] transceiver.py:241 (MS@172.18.26.22:6700) Frequency hopping disabled
2025-03-30 07:43:20 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:43:20 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:43:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:43:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:43:20 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:43:20 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:43:20 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 07:43:20 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 07:43:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:43:20 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.26.22:6700) Recv SETFH cmd
2025-03-30 07:43:20 [INFO] transceiver.py:237 (MS@172.18.26.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2025-03-30 07:43:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:43:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:43:21 [DEBUG] clck_gen.py:128 IND CLOCK 4488
2025-03-30 07:43:21 [DEBUG] clck_gen.py:128 IND CLOCK 4590
2025-03-30 07:43:22 [DEBUG] clck_gen.py:128 IND CLOCK 4692
2025-03-30 07:43:22 [DEBUG] clck_gen.py:128 IND CLOCK 4794
2025-03-30 07:43:22 [DEBUG] clck_gen.py:128 IND CLOCK 4896
2025-03-30 07:43:23 [DEBUG] clck_gen.py:128 IND CLOCK 4998
2025-03-30 07:43:23 [DEBUG] clck_gen.py:128 IND CLOCK 5100
2025-03-30 07:43:23 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:43:23 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:43:23 [INFO] transceiver.py:241 (MS@172.18.26.22:6700) Frequency hopping disabled
2025-03-30 07:43:23 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:43:23 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:43:23 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:43:23 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:43:23 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:43:23 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:43:23 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:43:23 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:43:23 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 07:43:23 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 07:43:23 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 07:43:23 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=5123 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:43:23 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=5123 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:43:23 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=5123 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:43:23 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=5123 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:43:23 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=5123 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:43:23 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=5123 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:43:28 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 07:43:28 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 07:43:28 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:43:29 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:43:29 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:43:29 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:43:29 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:43:29 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 07:43:29 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:43:29 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 07:43:29 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 07:43:29 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 07:43:29 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 07:43:29 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 07:43:29 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:43:29 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 07:43:29 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:43:29 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 07:43:29 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 07:43:29 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 07:43:29 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 07:43:29 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 07:43:29 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:43:29 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:43:29 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 07:43:29 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 07:43:29 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 07:43:29 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 07:43:29 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 07:43:29 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 07:43:29 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:43:29 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:43:29 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 07:43:29 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 07:43:29 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 07:43:29 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 07:43:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 07:43:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 07:43:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 07:43:29 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 07:43:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 07:43:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 07:43:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 07:43:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:43:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 07:43:29 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 07:43:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:43:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:43:29 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 07:43:29 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 07:43:29 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 07:43:29 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 07:43:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:43:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:43:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:43:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 07:43:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:43:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:43:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:43:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:43:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:43:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:43:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:43:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:43:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:43:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:43:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:43:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:43:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:43:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:43:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:43:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:43:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:43:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:43:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:43:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:43:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:43:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:43:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:43:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:43:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:43:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:43:29 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-03-30 07:43:29 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-03-30 07:43:29 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-03-30 07:43:29 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-03-30 07:43:29 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-03-30 07:43:29 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-03-30 07:43:29 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-03-30 07:43:29 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-03-30 07:43:29 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-03-30 07:43:29 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-03-30 07:43:29 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=105 tn=0 bl=148 pwr=0
2025-03-30 07:43:29 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=105 tn=1 bl=148 pwr=0
2025-03-30 07:43:29 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=105 tn=2 bl=148 pwr=0
2025-03-30 07:43:29 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=105 tn=3 bl=148 pwr=0
2025-03-30 07:43:29 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=105 tn=4 bl=148 pwr=0
2025-03-30 07:43:29 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=105 tn=5 bl=148 pwr=0
2025-03-30 07:43:29 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=105 tn=6 bl=148 pwr=0
2025-03-30 07:43:29 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=105 tn=7 bl=148 pwr=0
2025-03-30 07:43:29 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=106 tn=0 bl=148 pwr=0
2025-03-30 07:43:29 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=106 tn=1 bl=148 pwr=0
2025-03-30 07:43:29 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=106 tn=2 bl=148 pwr=0
2025-03-30 07:43:29 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=106 tn=3 bl=148 pwr=0
2025-03-30 07:43:29 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=106 tn=4 bl=148 pwr=0
2025-03-30 07:43:29 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=106 tn=5 bl=148 pwr=0
2025-03-30 07:43:29 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=106 tn=6 bl=148 pwr=0
2025-03-30 07:43:29 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=106 tn=7 bl=148 pwr=0
2025-03-30 07:43:29 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=107 tn=0 bl=148 pwr=0
2025-03-30 07:43:29 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=107 tn=1 bl=148 pwr=0
2025-03-30 07:43:29 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=107 tn=2 bl=148 pwr=0
2025-03-30 07:43:29 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=107 tn=3 bl=148 pwr=0
2025-03-30 07:43:29 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=107 tn=4 bl=148 pwr=0
2025-03-30 07:43:29 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=107 tn=5 bl=148 pwr=0
2025-03-30 07:43:29 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=107 tn=6 bl=148 pwr=0
2025-03-30 07:43:29 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=107 tn=7 bl=148 pwr=0
2025-03-30 07:43:29 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 07:43:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:43:29 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 07:43:29 [DEBUG] fake_trx.py:317 (BTS@172.18.26.20:5700) Recv FAKE_CI cmd
2025-03-30 07:43:29 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:43:29 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:43:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:43:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:43:29 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:43:29 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:43:29 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 07:43:29 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 07:43:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:43:29 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:43:29 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:43:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:43:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:43:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:43:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:43:29 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:43:29 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:43:29 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:43:29 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:43:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:43:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:43:29 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:43:29 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:43:29 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 07:43:29 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 07:43:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:43:29 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.26.22:6700) Recv SETFH cmd
2025-03-30 07:43:29 [INFO] transceiver.py:237 (MS@172.18.26.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2025-03-30 07:43:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:43:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:43:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:43:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:43:29 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:43:29 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:43:29 [INFO] transceiver.py:241 (MS@172.18.26.22:6700) Frequency hopping disabled
2025-03-30 07:43:29 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:43:29 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:43:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:43:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:43:29 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:43:29 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:43:29 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 07:43:29 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 07:43:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:43:29 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:43:29 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:43:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:43:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:43:29 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-03-30 07:43:30 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:43:30 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:43:30 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:43:30 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:43:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:43:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:43:30 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:43:30 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:43:30 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:43:30 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:43:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:43:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:43:30 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:43:30 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:43:30 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 07:43:30 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 07:43:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:43:30 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.26.22:6700) Recv SETFH cmd
2025-03-30 07:43:30 [INFO] transceiver.py:237 (MS@172.18.26.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2025-03-30 07:43:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:43:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:43:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:43:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:43:30 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:43:30 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:43:30 [INFO] transceiver.py:241 (MS@172.18.26.22:6700) Frequency hopping disabled
2025-03-30 07:43:30 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:43:30 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:43:30 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:43:30 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:43:30 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:43:30 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:43:30 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:43:30 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:43:30 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 07:43:30 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 07:43:30 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 07:43:35 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 07:43:35 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 07:43:35 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:43:35 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:43:35 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:43:35 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:43:35 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:43:35 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 07:43:35 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:43:35 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 07:43:35 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 07:43:35 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 07:43:35 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 07:43:35 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 07:43:35 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:43:35 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:43:35 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 07:43:35 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 07:43:35 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 07:43:35 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 07:43:35 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 07:43:35 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 07:43:35 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:43:35 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:43:35 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 07:43:35 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 07:43:35 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 07:43:35 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 07:43:35 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 07:43:35 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 07:43:35 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:43:35 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:43:35 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 07:43:35 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 07:43:35 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 07:43:35 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 07:43:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 07:43:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 07:43:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 07:43:35 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 07:43:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 07:43:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 07:43:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 07:43:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 07:43:35 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 07:43:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:43:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:43:35 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 07:43:35 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 07:43:35 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 07:43:35 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 07:43:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:43:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:43:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:43:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 07:43:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:43:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:43:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:43:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:43:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:43:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:43:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:43:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:43:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:43:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:43:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:43:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:43:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:43:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:43:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:43:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:43:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:43:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:43:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:43:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:43:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:43:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:43:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:43:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:43:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:43:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:43:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:43:35 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-03-30 07:43:35 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-03-30 07:43:35 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-03-30 07:43:35 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-03-30 07:43:35 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-03-30 07:43:35 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-03-30 07:43:35 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-03-30 07:43:35 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-03-30 07:43:35 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-03-30 07:43:35 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-03-30 07:43:35 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 07:43:35 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 07:43:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:43:35 [DEBUG] fake_trx.py:317 (BTS@172.18.26.20:5700) Recv FAKE_CI cmd
2025-03-30 07:43:35 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:43:35 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:43:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:43:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:43:35 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:43:35 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:43:35 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 07:43:35 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 07:43:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:43:35 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:43:35 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:43:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:43:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:43:36 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-03-30 07:43:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:43:36 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:43:36 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:43:36 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:43:36 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:43:36 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:43:36 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:43:36 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:43:36 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:43:36 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:43:36 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 07:43:36 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 07:43:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:43:36 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.26.22:6700) Recv SETFH cmd
2025-03-30 07:43:36 [INFO] transceiver.py:237 (MS@172.18.26.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2025-03-30 07:43:36 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:43:36 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:43:36 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:43:36 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:43:36 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:43:36 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:43:36 [DEBUG] clck_gen.py:128 IND CLOCK 306
2025-03-30 07:43:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:43:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:43:37 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:43:37 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:43:37 [INFO] transceiver.py:241 (MS@172.18.26.22:6700) Frequency hopping disabled
2025-03-30 07:43:37 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:43:37 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:43:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:43:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:43:37 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:43:37 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:43:37 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 07:43:37 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 07:43:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:43:37 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:43:37 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:43:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:43:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:43:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:43:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:43:37 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:43:37 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:43:37 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:43:37 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:43:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:43:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:43:37 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:43:37 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:43:37 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 07:43:37 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 07:43:37 [DEBUG] clck_gen.py:128 IND CLOCK 408
2025-03-30 07:43:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:43:37 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.26.22:6700) Recv SETFH cmd
2025-03-30 07:43:37 [INFO] transceiver.py:237 (MS@172.18.26.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2025-03-30 07:43:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:43:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:43:37 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:43:37 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:43:37 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:43:37 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:43:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:43:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:43:37 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:43:37 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:43:37 [INFO] transceiver.py:241 (MS@172.18.26.22:6700) Frequency hopping disabled
2025-03-30 07:43:37 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:43:37 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:43:37 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:43:37 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:43:37 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:43:37 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:43:37 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:43:37 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 07:43:37 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 07:43:37 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 07:43:37 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:43:37 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=498 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:43:37 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=498 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:43:37 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=498 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:43:37 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=498 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:43:37 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=498 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:43:37 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=498 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:43:37 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=498 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:43:37 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=498 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:43:42 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 07:43:42 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 07:43:42 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:43:42 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:43:42 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:43:42 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:43:42 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:43:42 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 07:43:42 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:43:42 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 07:43:42 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 07:43:42 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 07:43:42 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 07:43:42 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 07:43:42 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:43:42 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:43:42 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 07:43:42 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 07:43:42 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 07:43:42 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 07:43:42 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 07:43:42 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 07:43:42 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:43:42 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 07:43:42 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:43:42 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 07:43:42 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 07:43:42 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 07:43:42 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 07:43:42 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 07:43:42 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:43:42 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 07:43:42 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:43:42 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 07:43:42 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 07:43:42 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 07:43:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 07:43:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 07:43:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 07:43:42 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 07:43:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 07:43:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 07:43:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 07:43:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 07:43:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:43:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:43:42 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 07:43:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:43:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:43:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:43:42 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 07:43:42 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 07:43:42 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 07:43:42 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 07:43:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:43:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:43:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:43:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 07:43:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:43:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:43:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:43:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:43:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:43:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:43:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:43:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:43:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:43:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:43:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:43:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:43:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:43:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:43:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:43:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:43:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:43:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:43:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:43:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:43:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:43:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:43:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:43:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:43:42 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-03-30 07:43:43 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-03-30 07:43:43 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-03-30 07:43:43 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-03-30 07:43:43 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-03-30 07:43:43 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-03-30 07:43:43 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-03-30 07:43:43 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-03-30 07:43:43 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-03-30 07:43:43 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-03-30 07:43:43 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 07:43:43 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 07:43:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:43:43 [DEBUG] fake_trx.py:317 (BTS@172.18.26.20:5700) Recv FAKE_CI cmd
2025-03-30 07:43:43 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:43:43 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:43:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:43:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:43:43 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:43:43 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:43:43 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 07:43:43 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 07:43:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:43:43 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:43:43 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:43:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:43:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:43:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:43:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:43:43 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:43:43 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:43:43 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:43:43 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:43:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:43:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:43:43 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:43:43 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:43:43 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 07:43:43 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 07:43:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:43:43 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.26.22:6700) Recv SETFH cmd
2025-03-30 07:43:43 [INFO] transceiver.py:237 (MS@172.18.26.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2025-03-30 07:43:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:43:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:43:43 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-03-30 07:43:43 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:43:43 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:43:43 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:43:43 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:43:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:43:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:43:43 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:43:43 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:43:43 [INFO] transceiver.py:241 (MS@172.18.26.22:6700) Frequency hopping disabled
2025-03-30 07:43:43 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:43:43 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:43:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:43:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:43:43 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:43:43 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:43:43 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 07:43:43 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 07:43:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:43:43 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:43:43 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:43:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:43:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:43:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:43:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:43:44 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:43:44 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:43:44 [DEBUG] clck_gen.py:128 IND CLOCK 306
2025-03-30 07:43:44 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:43:44 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:43:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:43:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:43:44 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:43:44 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:43:44 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 07:43:44 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 07:43:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:43:44 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.26.22:6700) Recv SETFH cmd
2025-03-30 07:43:44 [INFO] transceiver.py:237 (MS@172.18.26.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2025-03-30 07:43:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:43:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:43:44 [DEBUG] clck_gen.py:128 IND CLOCK 408
2025-03-30 07:43:44 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:43:44 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:43:44 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:43:44 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:43:45 [DEBUG] clck_gen.py:128 IND CLOCK 510
2025-03-30 07:43:45 [DEBUG] clck_gen.py:128 IND CLOCK 612
2025-03-30 07:43:45 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:43:45 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:43:45 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:43:45 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:43:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:43:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:43:45 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:43:45 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:43:45 [INFO] transceiver.py:241 (MS@172.18.26.22:6700) Frequency hopping disabled
2025-03-30 07:43:45 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:43:45 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:43:45 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:43:45 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:43:45 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:43:45 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:43:45 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:43:45 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:43:45 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 07:43:45 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 07:43:45 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 07:43:50 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 07:43:50 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 07:43:50 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:43:50 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:43:50 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:43:50 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:43:50 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:43:50 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 07:43:50 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:43:50 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 07:43:50 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 07:43:50 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 07:43:50 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 07:43:50 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 07:43:50 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:43:50 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:43:50 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 07:43:50 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 07:43:50 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 07:43:50 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 07:43:50 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 07:43:50 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 07:43:50 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:43:50 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:43:50 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 07:43:50 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 07:43:50 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 07:43:50 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 07:43:50 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 07:43:50 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 07:43:50 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:43:50 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:43:50 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 07:43:50 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 07:43:50 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 07:43:50 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 07:43:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 07:43:50 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 07:43:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 07:43:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 07:43:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 07:43:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 07:43:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 07:43:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 07:43:50 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 07:43:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:43:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:43:50 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 07:43:50 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 07:43:50 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 07:43:50 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 07:43:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:43:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:43:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:43:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 07:43:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:43:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:43:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:43:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:43:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:43:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:43:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:43:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:43:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:43:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:43:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:43:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:43:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:43:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:43:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:43:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:43:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:43:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:43:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:43:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:43:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:43:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:43:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:43:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:43:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:43:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:43:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:43:50 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-03-30 07:43:51 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-03-30 07:43:51 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-03-30 07:43:51 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-03-30 07:43:51 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-03-30 07:43:51 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-03-30 07:43:51 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-03-30 07:43:51 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-03-30 07:43:51 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-03-30 07:43:51 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-03-30 07:43:51 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 07:43:51 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 07:43:51 [DEBUG] fake_trx.py:317 (BTS@172.18.26.20:5700) Recv FAKE_CI cmd
2025-03-30 07:43:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:43:51 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:43:51 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:43:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:43:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:43:51 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:43:51 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:43:51 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 07:43:51 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 07:43:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:43:51 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:43:51 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:43:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:43:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:43:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:43:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:43:51 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:43:51 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:43:51 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:43:51 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:43:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:43:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:43:51 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:43:51 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:43:51 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 07:43:51 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 07:43:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:43:51 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.26.22:6700) Recv SETFH cmd
2025-03-30 07:43:51 [INFO] transceiver.py:237 (MS@172.18.26.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2025-03-30 07:43:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:43:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:43:51 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-03-30 07:43:51 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:43:51 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:43:51 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:43:51 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:43:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:43:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:43:52 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:43:52 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:43:52 [INFO] transceiver.py:241 (MS@172.18.26.22:6700) Frequency hopping disabled
2025-03-30 07:43:52 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:43:52 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:43:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:43:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:43:52 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:43:52 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:43:52 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 07:43:52 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 07:43:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:43:52 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:43:52 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:43:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:43:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:43:52 [DEBUG] clck_gen.py:128 IND CLOCK 306
2025-03-30 07:43:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:43:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:43:52 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:43:52 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:43:52 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:43:52 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:43:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:43:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:43:52 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:43:52 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:43:52 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 07:43:52 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 07:43:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:43:52 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.26.22:6700) Recv SETFH cmd
2025-03-30 07:43:52 [INFO] transceiver.py:237 (MS@172.18.26.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2025-03-30 07:43:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:43:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:43:52 [DEBUG] clck_gen.py:128 IND CLOCK 408
2025-03-30 07:43:52 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:43:52 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:43:52 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:43:52 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:43:53 [DEBUG] clck_gen.py:128 IND CLOCK 510
2025-03-30 07:43:53 [DEBUG] clck_gen.py:128 IND CLOCK 612
2025-03-30 07:43:53 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:43:53 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:43:53 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:43:53 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:43:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:43:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:43:54 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:43:54 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:43:54 [INFO] transceiver.py:241 (MS@172.18.26.22:6700) Frequency hopping disabled
2025-03-30 07:43:54 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:43:54 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:43:54 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:43:54 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:43:54 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:43:54 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:43:54 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:43:54 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:43:54 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 07:43:54 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 07:43:54 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 07:43:54 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=698 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:43:54 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=698 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:43:54 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=698 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:43:54 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=698 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:43:54 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=698 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:43:54 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=698 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:43:54 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=698 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:43:54 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=698 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:43:59 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 07:43:59 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 07:43:59 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:43:59 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:43:59 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:43:59 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:43:59 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:43:59 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 07:43:59 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:43:59 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 07:43:59 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 07:43:59 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 07:43:59 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 07:43:59 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 07:43:59 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:43:59 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:43:59 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 07:43:59 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 07:43:59 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 07:43:59 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 07:43:59 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 07:43:59 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 07:43:59 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:43:59 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:43:59 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 07:43:59 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 07:43:59 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 07:43:59 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 07:43:59 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 07:43:59 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 07:43:59 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:43:59 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:43:59 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 07:43:59 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 07:43:59 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 07:43:59 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 07:43:59 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 07:43:59 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 07:43:59 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 07:43:59 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 07:43:59 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 07:43:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 07:43:59 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 07:43:59 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 07:43:59 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 07:43:59 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:43:59 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:43:59 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 07:43:59 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 07:43:59 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 07:43:59 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 07:43:59 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:43:59 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:43:59 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:43:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 07:43:59 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:43:59 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:43:59 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:43:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:43:59 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:43:59 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:43:59 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:43:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:43:59 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:43:59 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:43:59 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:43:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:43:59 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:43:59 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:43:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:43:59 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:43:59 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:43:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:43:59 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:43:59 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:43:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:43:59 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:43:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:43:59 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:43:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:43:59 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:43:59 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:43:59 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-03-30 07:43:59 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-03-30 07:43:59 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-03-30 07:43:59 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-03-30 07:43:59 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-03-30 07:43:59 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-03-30 07:43:59 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-03-30 07:43:59 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-03-30 07:43:59 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-03-30 07:43:59 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-03-30 07:43:59 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 07:43:59 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 07:43:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:43:59 [DEBUG] fake_trx.py:317 (BTS@172.18.26.20:5700) Recv FAKE_CI cmd
2025-03-30 07:43:59 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:43:59 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:43:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:43:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:43:59 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:43:59 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:43:59 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 07:43:59 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 07:43:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:43:59 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:43:59 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:43:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:43:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:44:00 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-03-30 07:44:00 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:44:00 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:44:00 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:44:00 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:44:00 [DEBUG] clck_gen.py:128 IND CLOCK 306
2025-03-30 07:44:01 [DEBUG] clck_gen.py:128 IND CLOCK 408
2025-03-30 07:44:01 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:44:01 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:44:01 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:44:01 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:44:01 [DEBUG] clck_gen.py:128 IND CLOCK 510
2025-03-30 07:44:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:44:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:44:01 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:44:01 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:44:01 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:44:01 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:44:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:44:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:44:01 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:44:01 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:44:01 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 07:44:01 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 07:44:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:44:01 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.26.22:6700) Recv SETFH cmd
2025-03-30 07:44:01 [INFO] transceiver.py:237 (MS@172.18.26.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2025-03-30 07:44:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:44:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:44:01 [DEBUG] clck_gen.py:128 IND CLOCK 612
2025-03-30 07:44:02 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:44:02 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:44:02 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:44:02 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:44:02 [DEBUG] clck_gen.py:128 IND CLOCK 714
2025-03-30 07:44:02 [DEBUG] clck_gen.py:128 IND CLOCK 816
2025-03-30 07:44:03 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:44:03 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:44:03 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:44:03 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:44:03 [DEBUG] clck_gen.py:128 IND CLOCK 918
2025-03-30 07:44:03 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:44:03 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:44:03 [INFO] transceiver.py:241 (MS@172.18.26.22:6700) Frequency hopping disabled
2025-03-30 07:44:03 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:44:03 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:44:03 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:44:03 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:44:03 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:44:03 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:44:03 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:44:03 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:44:03 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 07:44:03 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 07:44:03 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 07:44:08 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 07:44:08 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 07:44:08 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:44:08 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:44:08 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:44:08 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:44:08 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:44:08 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 07:44:08 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:44:08 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 07:44:08 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 07:44:08 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 07:44:08 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 07:44:08 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 07:44:08 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:44:08 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:44:08 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 07:44:08 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 07:44:08 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 07:44:08 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 07:44:08 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 07:44:08 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 07:44:08 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:44:08 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:44:08 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 07:44:08 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 07:44:08 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 07:44:08 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 07:44:08 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 07:44:08 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 07:44:08 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:44:08 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:44:08 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 07:44:08 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 07:44:08 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 07:44:08 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 07:44:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 07:44:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 07:44:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 07:44:08 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 07:44:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 07:44:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 07:44:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 07:44:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:44:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 07:44:08 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 07:44:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:44:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:44:08 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 07:44:08 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 07:44:08 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 07:44:08 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 07:44:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:44:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:44:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:44:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 07:44:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:44:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:44:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:44:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:44:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:44:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:44:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:44:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:44:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:44:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:44:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:44:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:44:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:44:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:44:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:44:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:44:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:44:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:44:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:44:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:44:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:44:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:44:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:44:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:44:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:44:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:44:08 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-03-30 07:44:09 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-03-30 07:44:09 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-03-30 07:44:09 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-03-30 07:44:09 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-03-30 07:44:09 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-03-30 07:44:09 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-03-30 07:44:09 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-03-30 07:44:09 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-03-30 07:44:09 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-03-30 07:44:09 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=0 bl=148 pwr=0
2025-03-30 07:44:09 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=1 bl=148 pwr=0
2025-03-30 07:44:09 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=2 bl=148 pwr=0
2025-03-30 07:44:09 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=3 bl=148 pwr=0
2025-03-30 07:44:09 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=4 bl=148 pwr=0
2025-03-30 07:44:09 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=5 bl=148 pwr=0
2025-03-30 07:44:09 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=6 bl=148 pwr=0
2025-03-30 07:44:09 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=7 bl=148 pwr=0
2025-03-30 07:44:09 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 07:44:09 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 07:44:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:44:09 [DEBUG] fake_trx.py:317 (BTS@172.18.26.20:5700) Recv FAKE_CI cmd
2025-03-30 07:44:09 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:44:09 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:44:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:44:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:44:09 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:44:09 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:44:09 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 07:44:09 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 07:44:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:44:09 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:44:09 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:44:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:44:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:44:09 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-03-30 07:44:09 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:44:09 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:44:09 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:44:09 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:44:10 [DEBUG] clck_gen.py:128 IND CLOCK 306
2025-03-30 07:44:10 [DEBUG] clck_gen.py:128 IND CLOCK 408
2025-03-30 07:44:10 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:44:10 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:44:10 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:44:10 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:44:11 [DEBUG] clck_gen.py:128 IND CLOCK 510
2025-03-30 07:44:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:44:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:44:11 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:44:11 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:44:11 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:44:11 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:44:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:44:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:44:11 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:44:11 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:44:11 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 07:44:11 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 07:44:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:44:11 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.26.22:6700) Recv SETFH cmd
2025-03-30 07:44:11 [INFO] transceiver.py:237 (MS@172.18.26.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2025-03-30 07:44:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:44:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:44:11 [DEBUG] clck_gen.py:128 IND CLOCK 612
2025-03-30 07:44:11 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:44:11 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:44:11 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:44:11 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:44:11 [DEBUG] clck_gen.py:128 IND CLOCK 714
2025-03-30 07:44:12 [DEBUG] clck_gen.py:128 IND CLOCK 816
2025-03-30 07:44:12 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:44:12 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:44:12 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:44:12 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:44:12 [DEBUG] clck_gen.py:128 IND CLOCK 918
2025-03-30 07:44:13 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:44:13 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:44:13 [INFO] transceiver.py:241 (MS@172.18.26.22:6700) Frequency hopping disabled
2025-03-30 07:44:13 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:44:13 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:44:13 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:44:13 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:44:13 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:44:13 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:44:13 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:44:13 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:44:13 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 07:44:13 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 07:44:13 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 07:44:18 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 07:44:18 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 07:44:18 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:44:18 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:44:18 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:44:18 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:44:18 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:44:18 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 07:44:18 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:44:18 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 07:44:18 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 07:44:18 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 07:44:18 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 07:44:18 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 07:44:18 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:44:18 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:44:18 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 07:44:18 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 07:44:18 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 07:44:18 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 07:44:18 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 07:44:18 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 07:44:18 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:44:18 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:44:18 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 07:44:18 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 07:44:18 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 07:44:18 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 07:44:18 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 07:44:18 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 07:44:18 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:44:18 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:44:18 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 07:44:18 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 07:44:18 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 07:44:18 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 07:44:18 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 07:44:18 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 07:44:18 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 07:44:18 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 07:44:18 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 07:44:18 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 07:44:18 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 07:44:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 07:44:18 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:44:18 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:44:18 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 07:44:18 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:44:18 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:44:18 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:44:18 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 07:44:18 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 07:44:18 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 07:44:18 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 07:44:18 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:44:18 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:44:18 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:44:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 07:44:18 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:44:18 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:44:18 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:44:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:44:18 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:44:18 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:44:18 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:44:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:44:18 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:44:18 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:44:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:44:18 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:44:18 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:44:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:44:18 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:44:18 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:44:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:44:18 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:44:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:44:18 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:44:18 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:44:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:44:18 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:44:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:44:18 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-03-30 07:44:18 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-03-30 07:44:18 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-03-30 07:44:18 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-03-30 07:44:18 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-03-30 07:44:18 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-03-30 07:44:18 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-03-30 07:44:18 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-03-30 07:44:18 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-03-30 07:44:18 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-03-30 07:44:18 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=0 bl=148 pwr=0
2025-03-30 07:44:18 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=1 bl=148 pwr=0
2025-03-30 07:44:18 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=2 bl=148 pwr=0
2025-03-30 07:44:18 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=3 bl=148 pwr=0
2025-03-30 07:44:18 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=4 bl=148 pwr=0
2025-03-30 07:44:18 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=5 bl=148 pwr=0
2025-03-30 07:44:18 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=6 bl=148 pwr=0
2025-03-30 07:44:18 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=7 bl=148 pwr=0
2025-03-30 07:44:18 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 07:44:18 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 07:44:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:44:18 [DEBUG] fake_trx.py:317 (BTS@172.18.26.20:5700) Recv FAKE_CI cmd
2025-03-30 07:44:18 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:44:18 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:44:18 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:44:18 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:44:18 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:44:18 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:44:18 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 07:44:18 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 07:44:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:44:18 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:44:18 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:44:18 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:44:18 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:44:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:44:18 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:44:18 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:44:18 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:44:18 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:44:18 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:44:18 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:44:18 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:44:18 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:44:18 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:44:18 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 07:44:18 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 07:44:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:44:18 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:44:18 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:44:18 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:44:18 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:44:19 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-03-30 07:44:19 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:44:19 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:44:19 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:44:19 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:44:19 [DEBUG] clck_gen.py:128 IND CLOCK 306
2025-03-30 07:44:20 [DEBUG] clck_gen.py:128 IND CLOCK 408
2025-03-30 07:44:20 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:44:20 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:44:20 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:44:20 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:44:20 [DEBUG] clck_gen.py:128 IND CLOCK 510
2025-03-30 07:44:21 [DEBUG] clck_gen.py:128 IND CLOCK 612
2025-03-30 07:44:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:44:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:44:21 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:44:21 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:44:21 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:44:21 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:44:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:44:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:44:21 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:44:21 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:44:21 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 07:44:21 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 07:44:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:44:21 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:44:21 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:44:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:44:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:44:21 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:44:21 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:44:21 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:44:21 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:44:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:44:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:44:21 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:44:21 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:44:21 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:44:21 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:44:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:44:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:44:21 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:44:21 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:44:21 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 07:44:21 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 07:44:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:44:21 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:44:21 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:44:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:44:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:44:21 [DEBUG] clck_gen.py:128 IND CLOCK 714
2025-03-30 07:44:21 [DEBUG] clck_gen.py:128 IND CLOCK 816
2025-03-30 07:44:22 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:44:22 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:44:22 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:44:22 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:44:22 [DEBUG] clck_gen.py:128 IND CLOCK 918
2025-03-30 07:44:22 [DEBUG] clck_gen.py:128 IND CLOCK 1020
2025-03-30 07:44:23 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:44:23 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:44:23 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:44:23 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:44:23 [DEBUG] clck_gen.py:128 IND CLOCK 1122
2025-03-30 07:44:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:44:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:44:23 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:44:23 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:44:23 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:44:23 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:44:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:44:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:44:23 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:44:23 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:44:23 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 07:44:23 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 07:44:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:44:23 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.26.22:6700) Recv SETFH cmd
2025-03-30 07:44:23 [INFO] transceiver.py:237 (MS@172.18.26.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2025-03-30 07:44:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:44:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:44:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:44:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:44:23 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:44:23 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:44:23 [INFO] transceiver.py:241 (MS@172.18.26.22:6700) Frequency hopping disabled
2025-03-30 07:44:23 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:44:23 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:44:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:44:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:44:23 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:44:23 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:44:23 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 07:44:23 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 07:44:23 [DEBUG] clck_gen.py:128 IND CLOCK 1224
2025-03-30 07:44:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:44:23 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.26.22:6700) Recv SETFH cmd
2025-03-30 07:44:23 [INFO] transceiver.py:237 (MS@172.18.26.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2025-03-30 07:44:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:44:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:44:24 [DEBUG] clck_gen.py:128 IND CLOCK 1326
2025-03-30 07:44:24 [DEBUG] clck_gen.py:128 IND CLOCK 1428
2025-03-30 07:44:25 [DEBUG] clck_gen.py:128 IND CLOCK 1530
2025-03-30 07:44:25 [DEBUG] clck_gen.py:128 IND CLOCK 1632
2025-03-30 07:44:25 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:44:25 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:44:25 [INFO] transceiver.py:241 (MS@172.18.26.22:6700) Frequency hopping disabled
2025-03-30 07:44:25 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:44:25 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:44:25 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:44:25 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:44:25 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:44:25 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:44:25 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:44:25 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:44:25 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 07:44:25 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 07:44:25 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 07:44:30 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 07:44:30 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 07:44:30 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:44:30 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:44:30 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:44:30 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:44:30 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:44:30 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 07:44:30 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:44:30 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 07:44:30 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 07:44:30 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 07:44:30 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 07:44:30 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 07:44:30 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:44:30 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:44:30 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 07:44:30 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 07:44:30 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 07:44:30 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 07:44:30 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 07:44:30 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 07:44:30 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:44:30 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:44:30 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 07:44:30 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 07:44:30 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 07:44:30 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 07:44:30 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 07:44:30 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 07:44:30 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:44:30 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:44:30 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 07:44:30 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 07:44:30 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 07:44:30 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 07:44:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 07:44:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 07:44:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 07:44:30 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 07:44:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 07:44:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 07:44:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 07:44:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 07:44:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:44:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:44:30 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 07:44:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:44:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:44:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:44:30 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 07:44:30 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 07:44:30 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 07:44:30 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 07:44:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:44:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:44:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:44:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 07:44:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:44:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:44:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:44:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:44:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:44:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:44:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:44:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:44:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:44:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:44:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:44:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:44:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:44:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:44:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:44:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:44:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:44:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:44:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:44:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:44:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:44:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:44:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:44:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:44:30 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-03-30 07:44:31 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-03-30 07:44:31 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-03-30 07:44:31 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-03-30 07:44:31 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-03-30 07:44:31 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-03-30 07:44:31 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-03-30 07:44:31 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-03-30 07:44:31 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-03-30 07:44:31 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-03-30 07:44:31 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=0 bl=148 pwr=0
2025-03-30 07:44:31 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=1 bl=148 pwr=0
2025-03-30 07:44:31 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=2 bl=148 pwr=0
2025-03-30 07:44:31 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=3 bl=148 pwr=0
2025-03-30 07:44:31 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=4 bl=148 pwr=0
2025-03-30 07:44:31 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=5 bl=148 pwr=0
2025-03-30 07:44:31 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=6 bl=148 pwr=0
2025-03-30 07:44:31 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=7 bl=148 pwr=0
2025-03-30 07:44:31 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 07:44:31 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 07:44:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:44:31 [DEBUG] fake_trx.py:317 (BTS@172.18.26.20:5700) Recv FAKE_CI cmd
2025-03-30 07:44:31 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:44:31 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:44:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:44:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:44:31 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:44:31 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:44:31 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 07:44:31 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 07:44:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:44:31 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:44:31 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:44:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:44:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:44:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:44:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:44:31 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:44:31 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:44:31 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:44:31 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:44:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:44:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:44:31 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:44:31 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:44:31 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 07:44:31 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 07:44:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:44:31 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:44:31 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:44:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:44:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:44:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:44:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:44:31 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:44:31 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:44:31 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:44:31 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:44:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:44:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:44:31 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:44:31 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:44:31 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 07:44:31 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 07:44:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:44:31 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.26.22:6700) Recv SETFH cmd
2025-03-30 07:44:31 [INFO] transceiver.py:237 (MS@172.18.26.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2025-03-30 07:44:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:44:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:44:31 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-03-30 07:44:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:44:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:44:31 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:44:31 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:44:31 [INFO] transceiver.py:241 (MS@172.18.26.22:6700) Frequency hopping disabled
2025-03-30 07:44:31 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:44:31 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:44:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:44:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:44:31 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:44:31 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:44:31 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 07:44:31 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 07:44:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:44:31 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:44:31 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:44:31 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:44:31 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:44:31 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.26.22:6700) Recv SETFH cmd
2025-03-30 07:44:31 [INFO] transceiver.py:237 (MS@172.18.26.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2025-03-30 07:44:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:44:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:44:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:44:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:44:32 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:44:32 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:44:32 [INFO] transceiver.py:241 (MS@172.18.26.22:6700) Frequency hopping disabled
2025-03-30 07:44:32 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:44:32 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:44:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:44:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:44:32 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:44:32 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:44:32 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 07:44:32 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 07:44:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:44:32 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:44:32 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:44:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:44:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:44:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:44:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:44:32 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:44:32 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:44:32 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:44:32 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:44:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:44:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:44:32 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:44:32 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:44:32 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 07:44:32 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 07:44:32 [DEBUG] clck_gen.py:128 IND CLOCK 306
2025-03-30 07:44:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:44:32 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:44:32 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:44:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:44:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:44:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:44:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:44:32 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:44:32 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:44:32 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:44:32 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:44:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:44:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:44:32 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:44:32 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:44:32 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 07:44:32 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 07:44:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:44:32 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.26.22:6700) Recv SETFH cmd
2025-03-30 07:44:32 [INFO] transceiver.py:237 (MS@172.18.26.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2025-03-30 07:44:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:44:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:44:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:44:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:44:32 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:44:32 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:44:32 [INFO] transceiver.py:241 (MS@172.18.26.22:6700) Frequency hopping disabled
2025-03-30 07:44:32 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:44:32 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:44:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:44:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:44:32 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:44:32 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:44:32 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 07:44:32 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 07:44:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:44:32 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.26.22:6700) Recv SETFH cmd
2025-03-30 07:44:32 [INFO] transceiver.py:237 (MS@172.18.26.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2025-03-30 07:44:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:44:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:44:32 [DEBUG] clck_gen.py:128 IND CLOCK 408
2025-03-30 07:44:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:44:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:44:32 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:44:32 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:44:32 [INFO] transceiver.py:241 (MS@172.18.26.22:6700) Frequency hopping disabled
2025-03-30 07:44:32 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:44:32 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:44:32 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:44:32 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:44:32 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:44:32 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:44:32 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:44:32 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:44:32 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 07:44:32 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 07:44:32 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 07:44:32 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=434 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:44:32 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=434 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:44:37 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 07:44:37 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 07:44:37 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:44:37 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:44:37 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:44:37 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:44:37 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:44:37 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 07:44:37 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:44:37 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 07:44:37 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 07:44:37 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 07:44:37 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 07:44:37 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 07:44:37 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:44:37 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:44:37 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 07:44:37 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 07:44:37 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 07:44:37 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 07:44:37 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 07:44:37 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 07:44:37 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:44:37 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:44:37 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 07:44:37 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 07:44:37 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 07:44:37 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 07:44:37 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 07:44:37 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 07:44:37 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:44:37 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:44:37 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 07:44:37 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 07:44:37 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 07:44:37 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 07:44:37 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 07:44:37 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 07:44:37 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 07:44:37 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 07:44:37 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 07:44:37 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 07:44:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 07:44:37 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:44:37 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 07:44:37 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 07:44:37 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:44:37 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:44:37 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 07:44:37 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 07:44:37 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 07:44:37 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 07:44:37 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:44:37 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:44:37 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:44:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 07:44:37 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:44:37 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:44:37 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:44:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:44:37 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:44:37 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:44:37 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:44:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:44:37 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:44:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:44:37 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:44:37 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:44:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:44:37 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:44:37 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:44:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:44:37 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:44:37 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:44:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:44:37 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:44:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:44:37 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:44:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:44:37 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:44:37 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:44:37 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:44:37 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-03-30 07:44:38 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-03-30 07:44:38 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-03-30 07:44:38 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-03-30 07:44:38 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-03-30 07:44:38 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-03-30 07:44:38 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-03-30 07:44:38 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-03-30 07:44:38 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-03-30 07:44:38 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-03-30 07:44:38 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=0 bl=148 pwr=0
2025-03-30 07:44:38 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=1 bl=148 pwr=0
2025-03-30 07:44:38 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=2 bl=148 pwr=0
2025-03-30 07:44:38 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=3 bl=148 pwr=0
2025-03-30 07:44:38 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=4 bl=148 pwr=0
2025-03-30 07:44:38 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=5 bl=148 pwr=0
2025-03-30 07:44:38 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=6 bl=148 pwr=0
2025-03-30 07:44:38 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=7 bl=148 pwr=0
2025-03-30 07:44:38 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 07:44:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:44:38 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 07:44:38 [DEBUG] fake_trx.py:317 (BTS@172.18.26.20:5700) Recv FAKE_CI cmd
2025-03-30 07:44:38 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:44:38 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:44:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:44:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:44:38 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:44:38 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:44:38 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 07:44:38 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 07:44:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:44:38 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:44:38 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:44:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:44:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:44:38 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-03-30 07:44:38 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:44:38 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:44:38 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:44:38 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:44:39 [DEBUG] clck_gen.py:128 IND CLOCK 306
2025-03-30 07:44:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:44:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:44:39 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:44:39 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:44:39 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:44:39 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:44:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:44:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:44:39 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:44:39 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:44:39 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 07:44:39 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 07:44:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:44:39 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:44:39 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:44:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:44:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:44:39 [DEBUG] clck_gen.py:128 IND CLOCK 408
2025-03-30 07:44:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:44:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:44:39 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:44:39 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:44:39 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:44:39 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:44:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:44:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:44:39 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:44:39 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:44:39 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 07:44:39 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 07:44:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:44:39 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.26.22:6700) Recv SETFH cmd
2025-03-30 07:44:39 [INFO] transceiver.py:237 (MS@172.18.26.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2025-03-30 07:44:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:44:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:44:39 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:44:39 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:44:39 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:44:39 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:44:40 [DEBUG] clck_gen.py:128 IND CLOCK 510
2025-03-30 07:44:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:44:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:44:40 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:44:40 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:44:40 [INFO] transceiver.py:241 (MS@172.18.26.22:6700) Frequency hopping disabled
2025-03-30 07:44:40 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:44:40 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:44:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:44:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:44:40 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:44:40 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:44:40 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 07:44:40 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 07:44:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:44:40 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.26.22:6700) Recv SETFH cmd
2025-03-30 07:44:40 [INFO] transceiver.py:237 (MS@172.18.26.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2025-03-30 07:44:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:44:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:44:40 [DEBUG] clck_gen.py:128 IND CLOCK 612
2025-03-30 07:44:40 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:44:40 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:44:40 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:44:40 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:44:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:44:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:44:41 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:44:41 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:44:41 [INFO] transceiver.py:241 (MS@172.18.26.22:6700) Frequency hopping disabled
2025-03-30 07:44:41 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:44:41 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:44:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:44:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:44:41 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:44:41 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:44:41 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 07:44:41 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 07:44:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:44:41 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:44:41 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:44:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:44:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:44:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:44:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:44:41 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:44:41 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:44:41 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:44:41 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:44:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:44:41 [DEBUG] clck_gen.py:128 IND CLOCK 714
2025-03-30 07:44:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:44:41 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:44:41 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:44:41 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 07:44:41 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 07:44:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:44:41 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:44:41 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:44:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:44:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:44:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:44:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:44:41 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:44:41 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:44:41 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:44:41 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:44:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:44:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:44:41 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:44:41 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:44:41 [DEBUG] clck_gen.py:128 IND CLOCK 816
2025-03-30 07:44:41 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 07:44:41 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 07:44:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:44:41 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.26.22:6700) Recv SETFH cmd
2025-03-30 07:44:41 [INFO] transceiver.py:237 (MS@172.18.26.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2025-03-30 07:44:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:44:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:44:41 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:44:41 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:44:41 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:44:41 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:44:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:44:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:44:42 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:44:42 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:44:42 [INFO] transceiver.py:241 (MS@172.18.26.22:6700) Frequency hopping disabled
2025-03-30 07:44:42 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:44:42 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:44:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:44:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:44:42 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:44:42 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:44:42 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 07:44:42 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 07:44:42 [DEBUG] clck_gen.py:128 IND CLOCK 918
2025-03-30 07:44:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:44:42 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.26.22:6700) Recv SETFH cmd
2025-03-30 07:44:42 [INFO] transceiver.py:237 (MS@172.18.26.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2025-03-30 07:44:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:44:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:44:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:44:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:44:42 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:44:42 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:44:42 [INFO] transceiver.py:241 (MS@172.18.26.22:6700) Frequency hopping disabled
2025-03-30 07:44:42 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:44:42 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:44:42 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:44:42 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:44:42 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:44:42 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:44:42 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:44:42 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:44:42 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 07:44:42 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 07:44:42 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 07:44:47 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 07:44:47 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 07:44:47 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:44:47 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:44:47 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:44:47 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:44:47 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:44:47 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 07:44:47 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:44:47 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 07:44:47 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 07:44:47 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 07:44:47 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 07:44:47 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 07:44:47 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:44:47 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:44:47 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 07:44:47 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 07:44:47 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 07:44:47 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 07:44:47 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 07:44:47 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 07:44:47 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:44:47 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:44:47 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 07:44:47 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 07:44:47 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 07:44:47 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 07:44:47 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 07:44:47 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 07:44:47 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:44:47 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 07:44:47 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:44:47 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 07:44:47 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 07:44:47 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 07:44:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 07:44:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 07:44:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 07:44:47 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 07:44:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 07:44:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 07:44:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 07:44:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 07:44:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:44:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:44:47 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 07:44:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:44:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:44:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:44:47 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 07:44:47 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 07:44:47 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 07:44:47 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 07:44:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:44:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:44:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:44:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 07:44:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:44:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:44:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:44:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:44:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:44:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:44:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:44:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:44:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:44:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:44:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:44:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:44:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:44:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:44:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:44:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:44:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:44:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:44:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:44:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:44:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:44:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:44:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:44:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:44:47 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-03-30 07:44:48 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-03-30 07:44:48 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-03-30 07:44:48 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-03-30 07:44:48 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-03-30 07:44:48 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-03-30 07:44:48 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-03-30 07:44:48 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-03-30 07:44:48 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-03-30 07:44:48 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-03-30 07:44:48 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=0 bl=148 pwr=0
2025-03-30 07:44:48 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=1 bl=148 pwr=0
2025-03-30 07:44:48 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=2 bl=148 pwr=0
2025-03-30 07:44:48 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=3 bl=148 pwr=0
2025-03-30 07:44:48 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=4 bl=148 pwr=0
2025-03-30 07:44:48 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=5 bl=148 pwr=0
2025-03-30 07:44:48 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=6 bl=148 pwr=0
2025-03-30 07:44:48 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=7 bl=148 pwr=0
2025-03-30 07:44:48 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 07:44:48 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 07:44:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:44:48 [DEBUG] fake_trx.py:317 (BTS@172.18.26.20:5700) Recv FAKE_CI cmd
2025-03-30 07:44:48 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:44:48 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:44:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:44:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:44:48 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:44:48 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:44:48 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 07:44:48 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 07:44:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:44:48 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:44:48 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:44:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:44:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:44:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:44:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:44:48 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:44:48 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:44:48 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:44:48 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:44:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:44:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:44:48 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:44:48 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:44:48 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 07:44:48 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 07:44:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:44:48 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:44:48 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:44:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:44:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:44:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:44:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:44:48 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:44:48 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:44:48 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:44:48 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:44:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:44:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:44:48 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:44:48 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:44:48 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 07:44:48 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 07:44:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:44:48 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.26.22:6700) Recv SETFH cmd
2025-03-30 07:44:48 [INFO] transceiver.py:237 (MS@172.18.26.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2025-03-30 07:44:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:44:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:44:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:44:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:44:48 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:44:48 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:44:48 [INFO] transceiver.py:241 (MS@172.18.26.22:6700) Frequency hopping disabled
2025-03-30 07:44:48 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:44:48 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:44:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:44:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:44:48 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:44:48 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:44:48 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 07:44:48 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 07:44:48 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-03-30 07:44:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:44:48 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.26.22:6700) Recv SETFH cmd
2025-03-30 07:44:48 [INFO] transceiver.py:237 (MS@172.18.26.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2025-03-30 07:44:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:44:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:44:48 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:44:48 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:44:48 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:44:48 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:44:49 [DEBUG] clck_gen.py:128 IND CLOCK 306
2025-03-30 07:44:49 [DEBUG] clck_gen.py:128 IND CLOCK 408
2025-03-30 07:44:49 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:44:49 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:44:49 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:44:49 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:44:49 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=437): ver=1 fn=436 tn=0 bl=148 pwr=0
2025-03-30 07:44:49 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=437): ver=1 fn=436 tn=1 bl=148 pwr=0
2025-03-30 07:44:49 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=437): ver=1 fn=436 tn=2 bl=148 pwr=0
2025-03-30 07:44:49 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=437): ver=1 fn=436 tn=3 bl=148 pwr=0
2025-03-30 07:44:49 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=437): ver=1 fn=436 tn=4 bl=148 pwr=0
2025-03-30 07:44:49 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=437): ver=1 fn=436 tn=5 bl=148 pwr=0
2025-03-30 07:44:49 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=437): ver=1 fn=436 tn=6 bl=148 pwr=0
2025-03-30 07:44:49 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=437): ver=1 fn=436 tn=7 bl=148 pwr=0
2025-03-30 07:44:49 [WARNING] transceiver.py:330 (TRX1@172.18.26.20:5700/1) Stale TRXD message (fn=437): ver=1 fn=436 tn=5 bl=148 pwr=0
2025-03-30 07:44:49 [DEBUG] clck_gen.py:128 IND CLOCK 510
2025-03-30 07:44:50 [DEBUG] clck_gen.py:128 IND CLOCK 612
2025-03-30 07:44:50 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:44:50 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:44:50 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:44:50 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:44:50 [DEBUG] clck_gen.py:128 IND CLOCK 714
2025-03-30 07:44:51 [DEBUG] clck_gen.py:128 IND CLOCK 816
2025-03-30 07:44:51 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:44:51 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:44:51 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:44:51 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:44:51 [DEBUG] clck_gen.py:128 IND CLOCK 918
2025-03-30 07:44:52 [DEBUG] clck_gen.py:128 IND CLOCK 1020
2025-03-30 07:44:52 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:44:52 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:44:52 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:44:52 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:44:52 [DEBUG] clck_gen.py:128 IND CLOCK 1122
2025-03-30 07:44:53 [DEBUG] clck_gen.py:128 IND CLOCK 1224
2025-03-30 07:44:53 [DEBUG] clck_gen.py:128 IND CLOCK 1326
2025-03-30 07:44:54 [DEBUG] clck_gen.py:128 IND CLOCK 1428
2025-03-30 07:44:54 [DEBUG] clck_gen.py:128 IND CLOCK 1530
2025-03-30 07:44:55 [DEBUG] clck_gen.py:128 IND CLOCK 1632
2025-03-30 07:44:55 [DEBUG] clck_gen.py:128 IND CLOCK 1734
2025-03-30 07:44:56 [DEBUG] clck_gen.py:128 IND CLOCK 1836
2025-03-30 07:44:56 [DEBUG] clck_gen.py:128 IND CLOCK 1938
2025-03-30 07:44:57 [DEBUG] clck_gen.py:128 IND CLOCK 2040
2025-03-30 07:44:57 [DEBUG] clck_gen.py:128 IND CLOCK 2142
2025-03-30 07:44:57 [DEBUG] clck_gen.py:128 IND CLOCK 2244
2025-03-30 07:44:58 [DEBUG] clck_gen.py:128 IND CLOCK 2346
2025-03-30 07:44:58 [DEBUG] clck_gen.py:128 IND CLOCK 2448
2025-03-30 07:44:59 [DEBUG] clck_gen.py:128 IND CLOCK 2550
2025-03-30 07:44:59 [DEBUG] clck_gen.py:128 IND CLOCK 2652
2025-03-30 07:45:00 [DEBUG] clck_gen.py:128 IND CLOCK 2754
2025-03-30 07:45:00 [DEBUG] clck_gen.py:128 IND CLOCK 2856
2025-03-30 07:45:01 [DEBUG] clck_gen.py:128 IND CLOCK 2958
2025-03-30 07:45:01 [DEBUG] clck_gen.py:128 IND CLOCK 3060
2025-03-30 07:45:02 [DEBUG] clck_gen.py:128 IND CLOCK 3162
2025-03-30 07:45:02 [DEBUG] clck_gen.py:128 IND CLOCK 3264
2025-03-30 07:45:03 [DEBUG] clck_gen.py:128 IND CLOCK 3366
2025-03-30 07:45:03 [DEBUG] clck_gen.py:128 IND CLOCK 3468
2025-03-30 07:45:04 [DEBUG] clck_gen.py:128 IND CLOCK 3570
2025-03-30 07:45:04 [DEBUG] clck_gen.py:128 IND CLOCK 3672
2025-03-30 07:45:05 [DEBUG] clck_gen.py:128 IND CLOCK 3774
2025-03-30 07:45:05 [DEBUG] clck_gen.py:128 IND CLOCK 3876
2025-03-30 07:45:05 [DEBUG] clck_gen.py:128 IND CLOCK 3978
2025-03-30 07:45:06 [DEBUG] clck_gen.py:128 IND CLOCK 4080
2025-03-30 07:45:06 [DEBUG] clck_gen.py:128 IND CLOCK 4182
2025-03-30 07:45:07 [DEBUG] clck_gen.py:128 IND CLOCK 4284
2025-03-30 07:45:07 [DEBUG] clck_gen.py:128 IND CLOCK 4386
2025-03-30 07:45:08 [DEBUG] clck_gen.py:128 IND CLOCK 4488
2025-03-30 07:45:08 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:45:08 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:45:08 [INFO] transceiver.py:241 (MS@172.18.26.22:6700) Frequency hopping disabled
2025-03-30 07:45:08 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:45:08 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:45:08 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:45:08 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:45:08 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:45:08 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:45:08 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:45:08 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 07:45:08 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 07:45:08 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 07:45:08 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:45:13 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 07:45:13 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 07:45:13 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:45:13 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:45:13 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:45:13 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:45:13 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:45:13 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 07:45:13 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:45:13 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 07:45:13 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 07:45:13 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 07:45:13 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 07:45:13 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 07:45:13 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:45:13 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:45:13 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 07:45:13 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 07:45:13 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 07:45:13 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 07:45:13 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 07:45:13 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 07:45:13 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:45:13 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:45:13 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 07:45:13 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 07:45:13 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 07:45:13 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 07:45:13 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 07:45:13 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 07:45:13 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:45:13 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:45:13 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 07:45:13 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 07:45:13 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 07:45:13 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 07:45:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 07:45:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 07:45:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 07:45:13 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 07:45:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 07:45:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 07:45:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 07:45:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:45:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 07:45:13 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 07:45:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:45:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:45:13 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 07:45:13 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 07:45:13 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 07:45:13 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 07:45:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:45:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:45:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:45:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 07:45:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:45:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:45:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:45:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:45:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:45:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:45:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:45:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:45:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:45:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:45:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:45:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:45:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:45:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:45:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:45:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:45:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:45:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:45:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:45:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:45:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:45:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:45:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:45:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:45:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:45:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:45:13 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-03-30 07:45:14 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-03-30 07:45:14 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-03-30 07:45:14 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-03-30 07:45:14 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-03-30 07:45:14 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-03-30 07:45:14 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-03-30 07:45:14 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-03-30 07:45:14 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-03-30 07:45:14 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-03-30 07:45:14 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=0 bl=148 pwr=0
2025-03-30 07:45:14 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=1 bl=148 pwr=0
2025-03-30 07:45:14 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=2 bl=148 pwr=0
2025-03-30 07:45:14 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=3 bl=148 pwr=0
2025-03-30 07:45:14 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=4 bl=148 pwr=0
2025-03-30 07:45:14 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=5 bl=148 pwr=0
2025-03-30 07:45:14 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=6 bl=148 pwr=0
2025-03-30 07:45:14 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=7 bl=148 pwr=0
2025-03-30 07:45:14 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 07:45:14 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 07:45:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:45:14 [DEBUG] fake_trx.py:317 (BTS@172.18.26.20:5700) Recv FAKE_CI cmd
2025-03-30 07:45:14 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:45:14 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:45:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:45:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:45:14 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:45:14 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:45:14 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 07:45:14 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 07:45:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:45:14 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:45:14 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:45:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:45:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:45:14 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-03-30 07:45:14 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:45:14 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:45:14 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:45:14 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:45:14 [DEBUG] clck_gen.py:128 IND CLOCK 306
2025-03-30 07:45:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:45:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:45:15 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:45:15 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:45:15 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:45:15 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:45:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:45:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:45:15 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:45:15 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:45:15 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 07:45:15 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 07:45:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:45:15 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:45:15 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:45:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:45:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:45:15 [DEBUG] clck_gen.py:128 IND CLOCK 408
2025-03-30 07:45:15 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:45:15 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:45:15 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:45:15 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:45:15 [DEBUG] clck_gen.py:128 IND CLOCK 510
2025-03-30 07:45:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:45:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:45:15 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:45:15 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:45:15 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:45:15 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:45:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:45:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:45:16 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:45:16 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:45:16 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 07:45:16 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 07:45:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:45:16 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.26.22:6700) Recv SETFH cmd
2025-03-30 07:45:16 [INFO] transceiver.py:237 (MS@172.18.26.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2025-03-30 07:45:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:45:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:45:16 [DEBUG] clck_gen.py:128 IND CLOCK 612
2025-03-30 07:45:16 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:45:16 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:45:16 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:45:16 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:45:16 [DEBUG] clck_gen.py:128 IND CLOCK 714
2025-03-30 07:45:17 [DEBUG] clck_gen.py:128 IND CLOCK 816
2025-03-30 07:45:17 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:45:17 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:45:17 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:45:17 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:45:17 [DEBUG] clck_gen.py:128 IND CLOCK 918
2025-03-30 07:45:18 [DEBUG] clck_gen.py:128 IND CLOCK 1020
2025-03-30 07:45:18 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:45:18 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:45:18 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:45:18 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:45:18 [DEBUG] clck_gen.py:128 IND CLOCK 1122
2025-03-30 07:45:19 [DEBUG] clck_gen.py:128 IND CLOCK 1224
2025-03-30 07:45:19 [DEBUG] clck_gen.py:128 IND CLOCK 1326
2025-03-30 07:45:20 [DEBUG] clck_gen.py:128 IND CLOCK 1428
2025-03-30 07:45:20 [DEBUG] clck_gen.py:128 IND CLOCK 1530
2025-03-30 07:45:21 [DEBUG] clck_gen.py:128 IND CLOCK 1632
2025-03-30 07:45:21 [DEBUG] clck_gen.py:128 IND CLOCK 1734
2025-03-30 07:45:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:45:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:45:21 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:45:21 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:45:21 [INFO] transceiver.py:241 (MS@172.18.26.22:6700) Frequency hopping disabled
2025-03-30 07:45:22 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:45:22 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:45:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:45:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:45:22 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:45:22 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:45:22 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 07:45:22 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 07:45:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:45:22 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.26.22:6700) Recv SETFH cmd
2025-03-30 07:45:22 [INFO] transceiver.py:237 (MS@172.18.26.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2025-03-30 07:45:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:45:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:45:22 [DEBUG] clck_gen.py:128 IND CLOCK 1836
2025-03-30 07:45:22 [DEBUG] clck_gen.py:128 IND CLOCK 1938
2025-03-30 07:45:22 [DEBUG] clck_gen.py:128 IND CLOCK 2040
2025-03-30 07:45:23 [DEBUG] clck_gen.py:128 IND CLOCK 2142
2025-03-30 07:45:23 [DEBUG] clck_gen.py:128 IND CLOCK 2244
2025-03-30 07:45:24 [DEBUG] clck_gen.py:128 IND CLOCK 2346
2025-03-30 07:45:24 [DEBUG] clck_gen.py:128 IND CLOCK 2448
2025-03-30 07:45:25 [DEBUG] clck_gen.py:128 IND CLOCK 2550
2025-03-30 07:45:25 [DEBUG] clck_gen.py:128 IND CLOCK 2652
2025-03-30 07:45:26 [DEBUG] clck_gen.py:128 IND CLOCK 2754
2025-03-30 07:45:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:45:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:45:26 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:45:26 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:45:26 [INFO] transceiver.py:241 (MS@172.18.26.22:6700) Frequency hopping disabled
2025-03-30 07:45:26 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:45:26 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:45:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:45:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:45:26 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:45:26 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:45:26 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 07:45:26 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 07:45:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:45:26 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:45:26 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:45:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:45:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:45:26 [DEBUG] clck_gen.py:128 IND CLOCK 2856
2025-03-30 07:45:27 [DEBUG] clck_gen.py:128 IND CLOCK 2958
2025-03-30 07:45:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:45:27 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:45:27 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:45:27 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:45:27 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:45:27 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:45:27 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:45:27 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:45:27 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:45:27 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:45:27 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 07:45:27 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 07:45:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:45:27 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:45:27 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:45:27 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:45:27 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:45:27 [DEBUG] clck_gen.py:128 IND CLOCK 3060
2025-03-30 07:45:28 [DEBUG] clck_gen.py:128 IND CLOCK 3162
2025-03-30 07:45:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:45:28 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:45:28 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:45:28 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:45:28 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:45:28 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:45:28 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:45:28 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:45:28 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:45:28 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:45:28 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 07:45:28 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 07:45:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:45:28 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.26.22:6700) Recv SETFH cmd
2025-03-30 07:45:28 [INFO] transceiver.py:237 (MS@172.18.26.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2025-03-30 07:45:28 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:45:28 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:45:28 [DEBUG] clck_gen.py:128 IND CLOCK 3264
2025-03-30 07:45:29 [DEBUG] clck_gen.py:128 IND CLOCK 3366
2025-03-30 07:45:29 [DEBUG] clck_gen.py:128 IND CLOCK 3468
2025-03-30 07:45:30 [DEBUG] clck_gen.py:128 IND CLOCK 3570
2025-03-30 07:45:30 [DEBUG] clck_gen.py:128 IND CLOCK 3672
2025-03-30 07:45:30 [DEBUG] clck_gen.py:128 IND CLOCK 3774
2025-03-30 07:45:31 [DEBUG] clck_gen.py:128 IND CLOCK 3876
2025-03-30 07:45:31 [DEBUG] clck_gen.py:128 IND CLOCK 3978
2025-03-30 07:45:32 [DEBUG] clck_gen.py:128 IND CLOCK 4080
2025-03-30 07:45:32 [DEBUG] clck_gen.py:128 IND CLOCK 4182
2025-03-30 07:45:33 [DEBUG] clck_gen.py:128 IND CLOCK 4284
2025-03-30 07:45:33 [DEBUG] clck_gen.py:128 IND CLOCK 4386
2025-03-30 07:45:34 [DEBUG] clck_gen.py:128 IND CLOCK 4488
2025-03-30 07:45:34 [DEBUG] clck_gen.py:128 IND CLOCK 4590
2025-03-30 07:45:35 [DEBUG] clck_gen.py:128 IND CLOCK 4692
2025-03-30 07:45:35 [DEBUG] clck_gen.py:128 IND CLOCK 4794
2025-03-30 07:45:36 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=4879): ver=1 fn=4878 tn=0 bl=148 pwr=0
2025-03-30 07:45:36 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=4879): ver=1 fn=4878 tn=1 bl=148 pwr=0
2025-03-30 07:45:36 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=4879): ver=1 fn=4878 tn=2 bl=148 pwr=0
2025-03-30 07:45:36 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=4879): ver=1 fn=4878 tn=3 bl=148 pwr=0
2025-03-30 07:45:36 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=4879): ver=1 fn=4878 tn=4 bl=148 pwr=0
2025-03-30 07:45:36 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=4879): ver=1 fn=4878 tn=5 bl=148 pwr=0
2025-03-30 07:45:36 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=4879): ver=1 fn=4878 tn=6 bl=148 pwr=0
2025-03-30 07:45:36 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=4879): ver=1 fn=4878 tn=7 bl=148 pwr=0
2025-03-30 07:45:36 [WARNING] transceiver.py:330 (TRX3@172.18.26.20:5700/3) Stale TRXD message (fn=4879): ver=1 fn=4878 tn=6 bl=148 pwr=0
2025-03-30 07:45:36 [DEBUG] clck_gen.py:128 IND CLOCK 4896
2025-03-30 07:45:36 [DEBUG] clck_gen.py:128 IND CLOCK 4998
2025-03-30 07:45:37 [DEBUG] clck_gen.py:128 IND CLOCK 5100
2025-03-30 07:45:37 [DEBUG] clck_gen.py:128 IND CLOCK 5202
2025-03-30 07:45:38 [DEBUG] clck_gen.py:128 IND CLOCK 5304
2025-03-30 07:45:38 [DEBUG] clck_gen.py:128 IND CLOCK 5406
2025-03-30 07:45:38 [DEBUG] clck_gen.py:128 IND CLOCK 5508
2025-03-30 07:45:39 [DEBUG] clck_gen.py:128 IND CLOCK 5610
2025-03-30 07:45:39 [DEBUG] clck_gen.py:128 IND CLOCK 5712
2025-03-30 07:45:40 [DEBUG] clck_gen.py:128 IND CLOCK 5814
2025-03-30 07:45:40 [DEBUG] clck_gen.py:128 IND CLOCK 5916
2025-03-30 07:45:41 [DEBUG] clck_gen.py:128 IND CLOCK 6018
2025-03-30 07:45:41 [DEBUG] clck_gen.py:128 IND CLOCK 6120
2025-03-30 07:45:42 [DEBUG] clck_gen.py:128 IND CLOCK 6222
2025-03-30 07:45:42 [DEBUG] clck_gen.py:128 IND CLOCK 6324
2025-03-30 07:45:43 [DEBUG] clck_gen.py:128 IND CLOCK 6426
2025-03-30 07:45:43 [DEBUG] clck_gen.py:128 IND CLOCK 6528
2025-03-30 07:45:44 [DEBUG] clck_gen.py:128 IND CLOCK 6630
2025-03-30 07:45:44 [DEBUG] clck_gen.py:128 IND CLOCK 6732
2025-03-30 07:45:45 [DEBUG] clck_gen.py:128 IND CLOCK 6834
2025-03-30 07:45:45 [DEBUG] clck_gen.py:128 IND CLOCK 6936
2025-03-30 07:45:46 [DEBUG] clck_gen.py:128 IND CLOCK 7038
2025-03-30 07:45:46 [DEBUG] clck_gen.py:128 IND CLOCK 7140
2025-03-30 07:45:46 [DEBUG] clck_gen.py:128 IND CLOCK 7242
2025-03-30 07:45:47 [DEBUG] clck_gen.py:128 IND CLOCK 7344
2025-03-30 07:45:47 [DEBUG] clck_gen.py:128 IND CLOCK 7446
2025-03-30 07:45:48 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:45:48 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:45:48 [INFO] transceiver.py:241 (MS@172.18.26.22:6700) Frequency hopping disabled
2025-03-30 07:45:48 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:45:48 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:45:48 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:45:48 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:45:48 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:45:48 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:45:48 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:45:48 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:45:48 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 07:45:48 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 07:45:48 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 07:45:53 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 07:45:53 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 07:45:53 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:45:53 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:45:53 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:45:53 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:45:53 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:45:53 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 07:45:53 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:45:53 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 07:45:53 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 07:45:53 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 07:45:53 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 07:45:53 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 07:45:53 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:45:53 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:45:53 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 07:45:53 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 07:45:53 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 07:45:53 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 07:45:53 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 07:45:53 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 07:45:53 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:45:53 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:45:53 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 07:45:53 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 07:45:53 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 07:45:53 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 07:45:53 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 07:45:53 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 07:45:53 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:45:53 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:45:53 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 07:45:53 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 07:45:53 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 07:45:53 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 07:45:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 07:45:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 07:45:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 07:45:53 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 07:45:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 07:45:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 07:45:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 07:45:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:45:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 07:45:53 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 07:45:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:45:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:45:53 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 07:45:53 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 07:45:53 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 07:45:53 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 07:45:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:45:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:45:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:45:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 07:45:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:45:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:45:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:45:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:45:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:45:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:45:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:45:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:45:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:45:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:45:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:45:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:45:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:45:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:45:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:45:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:45:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:45:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:45:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:45:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:45:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:45:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:45:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:45:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:45:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:45:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:45:53 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-03-30 07:45:53 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-03-30 07:45:53 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-03-30 07:45:53 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-03-30 07:45:53 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-03-30 07:45:53 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-03-30 07:45:53 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-03-30 07:45:53 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-03-30 07:45:53 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-03-30 07:45:53 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-03-30 07:45:53 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=0 bl=148 pwr=0
2025-03-30 07:45:53 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=1 bl=148 pwr=0
2025-03-30 07:45:53 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=2 bl=148 pwr=0
2025-03-30 07:45:53 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=3 bl=148 pwr=0
2025-03-30 07:45:53 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=4 bl=148 pwr=0
2025-03-30 07:45:53 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=5 bl=148 pwr=0
2025-03-30 07:45:53 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=6 bl=148 pwr=0
2025-03-30 07:45:53 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=7 bl=148 pwr=0
2025-03-30 07:45:53 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 07:45:53 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 07:45:53 [DEBUG] fake_trx.py:317 (BTS@172.18.26.20:5700) Recv FAKE_CI cmd
2025-03-30 07:45:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:45:53 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:45:53 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:45:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:45:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:45:53 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:45:53 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:45:53 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 07:45:53 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 07:45:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:45:53 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:45:53 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:45:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:45:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:45:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:45:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:45:54 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:45:54 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:45:54 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:45:54 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:45:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:45:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:45:54 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:45:54 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:45:54 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 07:45:54 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 07:45:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:45:54 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.26.22:6700) Recv SETFH cmd
2025-03-30 07:45:54 [INFO] transceiver.py:237 (MS@172.18.26.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2025-03-30 07:45:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:45:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:45:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:45:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:45:54 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:45:54 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:45:54 [INFO] transceiver.py:241 (MS@172.18.26.22:6700) Frequency hopping disabled
2025-03-30 07:45:54 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:45:54 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:45:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:45:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:45:54 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:45:54 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:45:54 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 07:45:54 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 07:45:54 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-03-30 07:45:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:45:54 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:45:54 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:45:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:45:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:45:54 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:45:54 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:45:54 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:45:54 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:45:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:45:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:45:54 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:45:54 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:45:54 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:45:54 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:45:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:45:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:45:54 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:45:54 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:45:54 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 07:45:54 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 07:45:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:45:54 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.26.22:6700) Recv SETFH cmd
2025-03-30 07:45:54 [INFO] transceiver.py:237 (MS@172.18.26.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2025-03-30 07:45:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:45:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:45:54 [DEBUG] clck_gen.py:128 IND CLOCK 306
2025-03-30 07:45:55 [DEBUG] clck_gen.py:128 IND CLOCK 408
2025-03-30 07:45:55 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:45:55 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:45:55 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:45:55 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:45:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:45:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:45:55 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:45:55 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:45:55 [INFO] transceiver.py:241 (MS@172.18.26.22:6700) Frequency hopping disabled
2025-03-30 07:45:55 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:45:55 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:45:55 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:45:55 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:45:55 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:45:55 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:45:55 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:45:55 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:45:55 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 07:45:55 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 07:45:55 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 07:46:00 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 07:46:00 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 07:46:00 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:46:00 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:46:00 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:46:00 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:46:00 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:46:00 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 07:46:00 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:46:00 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 07:46:00 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 07:46:00 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 07:46:00 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 07:46:00 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 07:46:00 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:46:00 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:46:00 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 07:46:00 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 07:46:00 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 07:46:00 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 07:46:00 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 07:46:00 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 07:46:00 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:46:00 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:46:00 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 07:46:00 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 07:46:00 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 07:46:00 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 07:46:00 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 07:46:00 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 07:46:00 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:46:00 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:46:00 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 07:46:00 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 07:46:00 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 07:46:00 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 07:46:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 07:46:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 07:46:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 07:46:00 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 07:46:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 07:46:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 07:46:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 07:46:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:46:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 07:46:00 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 07:46:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:46:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:46:00 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 07:46:00 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 07:46:00 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 07:46:00 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 07:46:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:46:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:46:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:46:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 07:46:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:46:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:46:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:46:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:46:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:46:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:46:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:46:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:46:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:46:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:46:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:46:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:46:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:46:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:46:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:46:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:46:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:46:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:46:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:46:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:46:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:46:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:46:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:46:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:46:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:46:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:46:00 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-03-30 07:46:01 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-03-30 07:46:01 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-03-30 07:46:01 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-03-30 07:46:01 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-03-30 07:46:01 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-03-30 07:46:01 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-03-30 07:46:01 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-03-30 07:46:01 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-03-30 07:46:01 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-03-30 07:46:01 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=0 bl=148 pwr=0
2025-03-30 07:46:01 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=1 bl=148 pwr=0
2025-03-30 07:46:01 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=2 bl=148 pwr=0
2025-03-30 07:46:01 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=3 bl=148 pwr=0
2025-03-30 07:46:01 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=4 bl=148 pwr=0
2025-03-30 07:46:01 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=5 bl=148 pwr=0
2025-03-30 07:46:01 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=6 bl=148 pwr=0
2025-03-30 07:46:01 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=7 bl=148 pwr=0
2025-03-30 07:46:01 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 07:46:01 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 07:46:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:46:01 [DEBUG] fake_trx.py:317 (BTS@172.18.26.20:5700) Recv FAKE_CI cmd
2025-03-30 07:46:01 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:46:01 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:46:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:46:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:46:01 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:46:01 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:46:01 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 07:46:01 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 07:46:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:46:01 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:46:01 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:46:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:46:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:46:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:46:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:46:01 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:46:01 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:46:01 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:46:01 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:46:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:46:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:46:01 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:46:01 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:46:01 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 07:46:01 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 07:46:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:46:01 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.26.22:6700) Recv SETFH cmd
2025-03-30 07:46:01 [INFO] transceiver.py:237 (MS@172.18.26.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2025-03-30 07:46:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:46:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:46:01 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-03-30 07:46:01 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:46:01 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:46:01 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:46:01 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:46:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:46:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:46:01 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:46:01 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:46:01 [INFO] transceiver.py:241 (MS@172.18.26.22:6700) Frequency hopping disabled
2025-03-30 07:46:01 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:46:01 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:46:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:46:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:46:01 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:46:01 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:46:01 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 07:46:01 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 07:46:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:46:01 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:46:01 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:46:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:46:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:46:02 [DEBUG] clck_gen.py:128 IND CLOCK 306
2025-03-30 07:46:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:46:02 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:46:02 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:46:02 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:46:02 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:46:02 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:46:02 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:46:02 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:46:02 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:46:02 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:46:02 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 07:46:02 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 07:46:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:46:02 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.26.22:6700) Recv SETFH cmd
2025-03-30 07:46:02 [INFO] transceiver.py:237 (MS@172.18.26.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2025-03-30 07:46:02 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:46:02 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:46:02 [DEBUG] clck_gen.py:128 IND CLOCK 408
2025-03-30 07:46:02 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:46:02 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:46:02 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:46:02 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:46:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:46:02 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:46:02 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:46:02 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:46:02 [INFO] transceiver.py:241 (MS@172.18.26.22:6700) Frequency hopping disabled
2025-03-30 07:46:02 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:46:02 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:46:02 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:46:02 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:46:02 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:46:02 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:46:02 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:46:02 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:46:02 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 07:46:02 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 07:46:02 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 07:46:07 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 07:46:07 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 07:46:07 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:46:07 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:46:07 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:46:07 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:46:07 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:46:07 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 07:46:07 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:46:07 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 07:46:07 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 07:46:07 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 07:46:07 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 07:46:07 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 07:46:07 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:46:07 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:46:07 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 07:46:07 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 07:46:07 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 07:46:07 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 07:46:07 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 07:46:07 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 07:46:07 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:46:07 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:46:07 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 07:46:07 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 07:46:07 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 07:46:07 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 07:46:07 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 07:46:07 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 07:46:07 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:46:07 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:46:07 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 07:46:07 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 07:46:07 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 07:46:07 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 07:46:07 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 07:46:07 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 07:46:07 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 07:46:07 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 07:46:07 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 07:46:07 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 07:46:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 07:46:07 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:46:07 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 07:46:07 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 07:46:07 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:46:07 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:46:07 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 07:46:07 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 07:46:07 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 07:46:07 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 07:46:07 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:46:07 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:46:07 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:46:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 07:46:07 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:46:07 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:46:07 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:46:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:46:07 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:46:07 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:46:07 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:46:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:46:07 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:46:07 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:46:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:46:07 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:46:07 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:46:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:46:07 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:46:07 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:46:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:46:07 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:46:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:46:07 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:46:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:46:07 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:46:07 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:46:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:46:07 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:46:07 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:46:07 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-03-30 07:46:08 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-03-30 07:46:08 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-03-30 07:46:08 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-03-30 07:46:08 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-03-30 07:46:08 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-03-30 07:46:08 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-03-30 07:46:08 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-03-30 07:46:08 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-03-30 07:46:08 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-03-30 07:46:08 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=0 bl=148 pwr=0
2025-03-30 07:46:08 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=1 bl=148 pwr=0
2025-03-30 07:46:08 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=2 bl=148 pwr=0
2025-03-30 07:46:08 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=3 bl=148 pwr=0
2025-03-30 07:46:08 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=4 bl=148 pwr=0
2025-03-30 07:46:08 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=5 bl=148 pwr=0
2025-03-30 07:46:08 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=6 bl=148 pwr=0
2025-03-30 07:46:08 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=7 bl=148 pwr=0
2025-03-30 07:46:08 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 07:46:08 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 07:46:08 [DEBUG] fake_trx.py:317 (BTS@172.18.26.20:5700) Recv FAKE_CI cmd
2025-03-30 07:46:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:46:08 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:46:08 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:46:08 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:46:08 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:46:08 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:46:08 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:46:08 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 07:46:08 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 07:46:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:46:08 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:46:08 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:46:08 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:46:08 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:46:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:46:08 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:46:08 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:46:08 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:46:08 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:46:08 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:46:08 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:46:08 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:46:08 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:46:08 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:46:08 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 07:46:08 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 07:46:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:46:08 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.26.22:6700) Recv SETFH cmd
2025-03-30 07:46:08 [INFO] transceiver.py:237 (MS@172.18.26.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2025-03-30 07:46:08 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:46:08 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:46:08 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-03-30 07:46:08 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:46:08 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:46:08 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:46:08 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:46:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:46:08 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:46:08 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:46:08 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:46:08 [INFO] transceiver.py:241 (MS@172.18.26.22:6700) Frequency hopping disabled
2025-03-30 07:46:08 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:46:08 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:46:08 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:46:08 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:46:08 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:46:08 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:46:08 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 07:46:08 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 07:46:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:46:09 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:46:09 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:46:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:46:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:46:09 [DEBUG] clck_gen.py:128 IND CLOCK 306
2025-03-30 07:46:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:46:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:46:09 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:46:09 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:46:09 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:46:09 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:46:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:46:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:46:09 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:46:09 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:46:09 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 07:46:09 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 07:46:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:46:09 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.26.22:6700) Recv SETFH cmd
2025-03-30 07:46:09 [INFO] transceiver.py:237 (MS@172.18.26.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2025-03-30 07:46:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:46:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:46:09 [DEBUG] clck_gen.py:128 IND CLOCK 408
2025-03-30 07:46:09 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:46:09 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:46:09 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:46:09 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:46:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:46:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:46:10 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:46:10 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:46:10 [INFO] transceiver.py:241 (MS@172.18.26.22:6700) Frequency hopping disabled
2025-03-30 07:46:10 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:46:10 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:46:10 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:46:10 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:46:10 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:46:10 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:46:10 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:46:10 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:46:10 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 07:46:10 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 07:46:10 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 07:46:10 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=499 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:46:10 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=499 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:46:10 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=499 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:46:10 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=499 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:46:10 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=499 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:46:10 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=499 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:46:10 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=499 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:46:10 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=499 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:46:15 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 07:46:15 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 07:46:15 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:46:15 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:46:15 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:46:15 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:46:15 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:46:15 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 07:46:15 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:46:15 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 07:46:15 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 07:46:15 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 07:46:15 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 07:46:15 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 07:46:15 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:46:15 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:46:15 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 07:46:15 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 07:46:15 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 07:46:15 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 07:46:15 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 07:46:15 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 07:46:15 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:46:15 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:46:15 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 07:46:15 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 07:46:15 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 07:46:15 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 07:46:15 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 07:46:15 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 07:46:15 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:46:15 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:46:15 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 07:46:15 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 07:46:15 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 07:46:15 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 07:46:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 07:46:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 07:46:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 07:46:15 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 07:46:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 07:46:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 07:46:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 07:46:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:46:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 07:46:15 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 07:46:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:46:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:46:15 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 07:46:15 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 07:46:15 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 07:46:15 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 07:46:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:46:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:46:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:46:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 07:46:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:46:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:46:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:46:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:46:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:46:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:46:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:46:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:46:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:46:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:46:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:46:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:46:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:46:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:46:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:46:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:46:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:46:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:46:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:46:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:46:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:46:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:46:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:46:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:46:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:46:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:46:15 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-03-30 07:46:15 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-03-30 07:46:15 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-03-30 07:46:15 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-03-30 07:46:15 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-03-30 07:46:15 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-03-30 07:46:15 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-03-30 07:46:15 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-03-30 07:46:15 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-03-30 07:46:15 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-03-30 07:46:15 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=0 bl=148 pwr=0
2025-03-30 07:46:15 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=1 bl=148 pwr=0
2025-03-30 07:46:15 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=2 bl=148 pwr=0
2025-03-30 07:46:15 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=3 bl=148 pwr=0
2025-03-30 07:46:15 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=4 bl=148 pwr=0
2025-03-30 07:46:15 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=5 bl=148 pwr=0
2025-03-30 07:46:15 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=6 bl=148 pwr=0
2025-03-30 07:46:15 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=7 bl=148 pwr=0
2025-03-30 07:46:15 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 07:46:15 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 07:46:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:46:15 [DEBUG] fake_trx.py:317 (BTS@172.18.26.20:5700) Recv FAKE_CI cmd
2025-03-30 07:46:15 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:46:15 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:46:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:46:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:46:15 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:46:15 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:46:15 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 07:46:15 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 07:46:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:46:15 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:46:15 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:46:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:46:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:46:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:46:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:46:16 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:46:16 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:46:16 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:46:16 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:46:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:46:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:46:16 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:46:16 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:46:16 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 07:46:16 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 07:46:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:46:16 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.26.22:6700) Recv SETFH cmd
2025-03-30 07:46:16 [INFO] transceiver.py:237 (MS@172.18.26.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2025-03-30 07:46:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:46:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:46:16 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-03-30 07:46:16 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:46:16 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:46:16 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:46:16 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:46:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:46:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:46:16 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:46:16 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:46:16 [INFO] transceiver.py:241 (MS@172.18.26.22:6700) Frequency hopping disabled
2025-03-30 07:46:16 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:46:16 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:46:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:46:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:46:16 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:46:16 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:46:16 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 07:46:16 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 07:46:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:46:16 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:46:16 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:46:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:46:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:46:16 [DEBUG] clck_gen.py:128 IND CLOCK 306
2025-03-30 07:46:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:46:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:46:16 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:46:16 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:46:16 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:46:16 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:46:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:46:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:46:16 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:46:16 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:46:16 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 07:46:16 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 07:46:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:46:16 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.26.22:6700) Recv SETFH cmd
2025-03-30 07:46:16 [INFO] transceiver.py:237 (MS@172.18.26.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2025-03-30 07:46:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:46:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:46:17 [DEBUG] clck_gen.py:128 IND CLOCK 408
2025-03-30 07:46:17 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:46:17 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:46:17 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:46:17 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:46:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:46:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:46:17 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:46:17 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:46:17 [INFO] transceiver.py:241 (MS@172.18.26.22:6700) Frequency hopping disabled
2025-03-30 07:46:17 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:46:17 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:46:17 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:46:17 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:46:17 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:46:17 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:46:17 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:46:17 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 07:46:17 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 07:46:17 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 07:46:17 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=497 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:46:17 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:46:17 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=497 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:46:17 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=497 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:46:17 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=497 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:46:17 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=497 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:46:17 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=497 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:46:22 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 07:46:22 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 07:46:22 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:46:22 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:46:22 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:46:22 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:46:22 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:46:22 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 07:46:22 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:46:22 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 07:46:22 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 07:46:22 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 07:46:22 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 07:46:22 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 07:46:22 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:46:22 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:46:22 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 07:46:22 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 07:46:22 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 07:46:22 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 07:46:22 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 07:46:22 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 07:46:22 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:46:22 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:46:22 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 07:46:22 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 07:46:22 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 07:46:22 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 07:46:22 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 07:46:22 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 07:46:22 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:46:22 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:46:22 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 07:46:22 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 07:46:22 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 07:46:22 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 07:46:22 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 07:46:22 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 07:46:22 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 07:46:22 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 07:46:22 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 07:46:22 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 07:46:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 07:46:22 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:46:22 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 07:46:22 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 07:46:22 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:46:22 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:46:22 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 07:46:22 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 07:46:22 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 07:46:22 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 07:46:22 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:46:22 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:46:22 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:46:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 07:46:22 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:46:22 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:46:22 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:46:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:46:22 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:46:22 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:46:22 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:46:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:46:22 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:46:22 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:46:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:46:22 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:46:22 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:46:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:46:22 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:46:22 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:46:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:46:22 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:46:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:46:22 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:46:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:46:22 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:46:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:46:22 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:46:22 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:46:22 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:46:22 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-03-30 07:46:23 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-03-30 07:46:23 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-03-30 07:46:23 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-03-30 07:46:23 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-03-30 07:46:23 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-03-30 07:46:23 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-03-30 07:46:23 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-03-30 07:46:23 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-03-30 07:46:23 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-03-30 07:46:23 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=0 bl=148 pwr=0
2025-03-30 07:46:23 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=1 bl=148 pwr=0
2025-03-30 07:46:23 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=2 bl=148 pwr=0
2025-03-30 07:46:23 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=3 bl=148 pwr=0
2025-03-30 07:46:23 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=4 bl=148 pwr=0
2025-03-30 07:46:23 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=5 bl=148 pwr=0
2025-03-30 07:46:23 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=6 bl=148 pwr=0
2025-03-30 07:46:23 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=7 bl=148 pwr=0
2025-03-30 07:46:23 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 07:46:23 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 07:46:23 [DEBUG] fake_trx.py:317 (BTS@172.18.26.20:5700) Recv FAKE_CI cmd
2025-03-30 07:46:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:46:23 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:46:23 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:46:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:46:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:46:23 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:46:23 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:46:23 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 07:46:23 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 07:46:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:46:23 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:46:23 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:46:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:46:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:46:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:46:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:46:23 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:46:23 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:46:23 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-03-30 07:46:23 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:46:23 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:46:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:46:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:46:23 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:46:23 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:46:23 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 07:46:23 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 07:46:23 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:46:23 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:46:23 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:46:23 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:46:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:46:23 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.26.22:6700) Recv SETFH cmd
2025-03-30 07:46:23 [INFO] transceiver.py:237 (MS@172.18.26.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2025-03-30 07:46:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:46:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:46:24 [DEBUG] clck_gen.py:128 IND CLOCK 306
2025-03-30 07:46:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:46:24 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:46:24 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:46:24 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:46:24 [INFO] transceiver.py:241 (MS@172.18.26.22:6700) Frequency hopping disabled
2025-03-30 07:46:24 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:46:24 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:46:24 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:46:24 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:46:24 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:46:24 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:46:24 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 07:46:24 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 07:46:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:46:24 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:46:24 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:46:24 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:46:24 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:46:24 [DEBUG] clck_gen.py:128 IND CLOCK 408
2025-03-30 07:46:24 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:46:24 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:46:24 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:46:24 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:46:24 [DEBUG] clck_gen.py:128 IND CLOCK 510
2025-03-30 07:46:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:46:25 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=602): ver=1 fn=600 tn=0 bl=148 pwr=0
2025-03-30 07:46:25 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=602): ver=1 fn=600 tn=1 bl=148 pwr=0
2025-03-30 07:46:25 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=602): ver=1 fn=600 tn=2 bl=148 pwr=0
2025-03-30 07:46:25 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=602): ver=1 fn=600 tn=3 bl=148 pwr=0
2025-03-30 07:46:25 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=602): ver=1 fn=600 tn=4 bl=148 pwr=0
2025-03-30 07:46:25 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=602): ver=1 fn=600 tn=5 bl=148 pwr=0
2025-03-30 07:46:25 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=602): ver=1 fn=600 tn=6 bl=148 pwr=0
2025-03-30 07:46:25 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=602): ver=1 fn=600 tn=7 bl=148 pwr=0
2025-03-30 07:46:25 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=602): ver=1 fn=601 tn=0 bl=148 pwr=0
2025-03-30 07:46:25 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=602): ver=1 fn=601 tn=1 bl=148 pwr=0
2025-03-30 07:46:25 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=602): ver=1 fn=601 tn=2 bl=148 pwr=0
2025-03-30 07:46:25 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=602): ver=1 fn=601 tn=3 bl=148 pwr=0
2025-03-30 07:46:25 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=602): ver=1 fn=601 tn=4 bl=148 pwr=0
2025-03-30 07:46:25 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=602): ver=1 fn=601 tn=5 bl=148 pwr=0
2025-03-30 07:46:25 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=602): ver=1 fn=601 tn=6 bl=148 pwr=0
2025-03-30 07:46:25 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=602): ver=1 fn=601 tn=7 bl=148 pwr=0
2025-03-30 07:46:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:46:25 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:46:25 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:46:25 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:46:25 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:46:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:46:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:46:25 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:46:25 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:46:25 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 07:46:25 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 07:46:25 [DEBUG] clck_gen.py:128 IND CLOCK 612
2025-03-30 07:46:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:46:25 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.26.22:6700) Recv SETFH cmd
2025-03-30 07:46:25 [INFO] transceiver.py:237 (MS@172.18.26.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2025-03-30 07:46:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:46:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:46:25 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:46:25 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:46:25 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:46:25 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:46:25 [DEBUG] clck_gen.py:128 IND CLOCK 714
2025-03-30 07:46:26 [DEBUG] clck_gen.py:128 IND CLOCK 816
2025-03-30 07:46:26 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:46:26 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:46:26 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:46:26 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:46:26 [DEBUG] clck_gen.py:128 IND CLOCK 918
2025-03-30 07:46:27 [DEBUG] clck_gen.py:128 IND CLOCK 1020
2025-03-30 07:46:27 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:46:27 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:46:27 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:46:27 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:46:27 [DEBUG] clck_gen.py:128 IND CLOCK 1122
2025-03-30 07:46:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:46:27 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:46:27 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:46:27 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:46:27 [INFO] transceiver.py:241 (MS@172.18.26.22:6700) Frequency hopping disabled
2025-03-30 07:46:27 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:46:27 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:46:27 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:46:27 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:46:27 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:46:27 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:46:27 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:46:27 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:46:27 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 07:46:27 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 07:46:27 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 07:46:32 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 07:46:32 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 07:46:32 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:46:32 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:46:32 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:46:32 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:46:32 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:46:32 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 07:46:32 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:46:32 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 07:46:32 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 07:46:32 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 07:46:32 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 07:46:32 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 07:46:32 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:46:32 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:46:32 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 07:46:32 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 07:46:32 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 07:46:32 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 07:46:32 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 07:46:32 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 07:46:32 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:46:32 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:46:32 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 07:46:32 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 07:46:32 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 07:46:32 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 07:46:32 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 07:46:32 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 07:46:32 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:46:32 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:46:32 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 07:46:32 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 07:46:32 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 07:46:32 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 07:46:32 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 07:46:32 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 07:46:32 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 07:46:32 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 07:46:32 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 07:46:32 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 07:46:32 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 07:46:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 07:46:32 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:46:32 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:46:32 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:46:32 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 07:46:32 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:46:32 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:46:32 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:46:32 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 07:46:32 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 07:46:32 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 07:46:32 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 07:46:32 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:46:32 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:46:32 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:46:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 07:46:32 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:46:32 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:46:32 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:46:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:46:32 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:46:32 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:46:32 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:46:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:46:32 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:46:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:46:32 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:46:32 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:46:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:46:32 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:46:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:46:32 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:46:32 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:46:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:46:32 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:46:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:46:32 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:46:32 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:46:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:46:32 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-03-30 07:46:33 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-03-30 07:46:33 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-03-30 07:46:33 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-03-30 07:46:33 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-03-30 07:46:33 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-03-30 07:46:33 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-03-30 07:46:33 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-03-30 07:46:33 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-03-30 07:46:33 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-03-30 07:46:33 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=0 bl=148 pwr=0
2025-03-30 07:46:33 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=1 bl=148 pwr=0
2025-03-30 07:46:33 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=2 bl=148 pwr=0
2025-03-30 07:46:33 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=3 bl=148 pwr=0
2025-03-30 07:46:33 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=4 bl=148 pwr=0
2025-03-30 07:46:33 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=5 bl=148 pwr=0
2025-03-30 07:46:33 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=6 bl=148 pwr=0
2025-03-30 07:46:33 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=7 bl=148 pwr=0
2025-03-30 07:46:33 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 07:46:33 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 07:46:33 [DEBUG] fake_trx.py:317 (BTS@172.18.26.20:5700) Recv FAKE_CI cmd
2025-03-30 07:46:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:46:33 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:46:33 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:46:33 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:46:33 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:46:33 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:46:33 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:46:33 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 07:46:33 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 07:46:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:46:33 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:46:33 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:46:33 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:46:33 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:46:33 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-03-30 07:46:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:46:33 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:46:33 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:46:33 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:46:33 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:46:33 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:46:33 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:46:33 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:46:33 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:46:33 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:46:33 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 07:46:33 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 07:46:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:46:33 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:46:33 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:46:33 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:46:33 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:46:33 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.26.22:6700) Recv SETFH cmd
2025-03-30 07:46:33 [INFO] transceiver.py:237 (MS@172.18.26.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2025-03-30 07:46:33 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:46:33 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:46:34 [DEBUG] clck_gen.py:128 IND CLOCK 306
2025-03-30 07:46:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:46:34 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:46:34 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:46:34 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:46:34 [INFO] transceiver.py:241 (MS@172.18.26.22:6700) Frequency hopping disabled
2025-03-30 07:46:34 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:46:34 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:46:34 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:46:34 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:46:34 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:46:34 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:46:34 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 07:46:34 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 07:46:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:46:34 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:46:34 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:46:34 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:46:34 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:46:34 [DEBUG] clck_gen.py:128 IND CLOCK 408
2025-03-30 07:46:34 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:46:34 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:46:34 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:46:34 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:46:35 [DEBUG] clck_gen.py:128 IND CLOCK 510
2025-03-30 07:46:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:46:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:46:35 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:46:35 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:46:35 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:46:35 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:46:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:46:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:46:35 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:46:35 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:46:35 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 07:46:35 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 07:46:35 [DEBUG] clck_gen.py:128 IND CLOCK 612
2025-03-30 07:46:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:46:35 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.26.22:6700) Recv SETFH cmd
2025-03-30 07:46:35 [INFO] transceiver.py:237 (MS@172.18.26.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2025-03-30 07:46:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:46:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:46:35 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:46:35 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:46:35 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:46:35 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:46:36 [DEBUG] clck_gen.py:128 IND CLOCK 714
2025-03-30 07:46:36 [DEBUG] clck_gen.py:128 IND CLOCK 816
2025-03-30 07:46:36 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:46:36 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:46:36 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:46:36 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:46:37 [DEBUG] clck_gen.py:128 IND CLOCK 918
2025-03-30 07:46:37 [DEBUG] clck_gen.py:128 IND CLOCK 1020
2025-03-30 07:46:37 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:46:37 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:46:37 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:46:37 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:46:38 [DEBUG] clck_gen.py:128 IND CLOCK 1122
2025-03-30 07:46:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:46:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:46:38 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:46:38 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:46:38 [INFO] transceiver.py:241 (MS@172.18.26.22:6700) Frequency hopping disabled
2025-03-30 07:46:38 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:46:38 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:46:38 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:46:38 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:46:38 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:46:38 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:46:38 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:46:38 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:46:38 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 07:46:38 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 07:46:38 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 07:46:43 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 07:46:43 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 07:46:43 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:46:43 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:46:43 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:46:43 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:46:43 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:46:43 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 07:46:43 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:46:43 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 07:46:43 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 07:46:43 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 07:46:43 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 07:46:43 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 07:46:43 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:46:43 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:46:43 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 07:46:43 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 07:46:43 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 07:46:43 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 07:46:43 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 07:46:43 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 07:46:43 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:46:43 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:46:43 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 07:46:43 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 07:46:43 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 07:46:43 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 07:46:43 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 07:46:43 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 07:46:43 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:46:43 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:46:43 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 07:46:43 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 07:46:43 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 07:46:43 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 07:46:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 07:46:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 07:46:43 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 07:46:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 07:46:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 07:46:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 07:46:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 07:46:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 07:46:43 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 07:46:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:46:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:46:43 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 07:46:43 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 07:46:43 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 07:46:43 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 07:46:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:46:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:46:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:46:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 07:46:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:46:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:46:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:46:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:46:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:46:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:46:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:46:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:46:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:46:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:46:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:46:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:46:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:46:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:46:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:46:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:46:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:46:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:46:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:46:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:46:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:46:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:46:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:46:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:46:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:46:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:46:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:46:43 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-03-30 07:46:43 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-03-30 07:46:43 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-03-30 07:46:43 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-03-30 07:46:43 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-03-30 07:46:43 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-03-30 07:46:43 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-03-30 07:46:43 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-03-30 07:46:43 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-03-30 07:46:43 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-03-30 07:46:43 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=0 bl=148 pwr=0
2025-03-30 07:46:43 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=1 bl=148 pwr=0
2025-03-30 07:46:43 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=2 bl=148 pwr=0
2025-03-30 07:46:43 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=3 bl=148 pwr=0
2025-03-30 07:46:43 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=4 bl=148 pwr=0
2025-03-30 07:46:43 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=5 bl=148 pwr=0
2025-03-30 07:46:43 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=6 bl=148 pwr=0
2025-03-30 07:46:43 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=7 bl=148 pwr=0
2025-03-30 07:46:43 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 07:46:43 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 07:46:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:46:43 [DEBUG] fake_trx.py:317 (BTS@172.18.26.20:5700) Recv FAKE_CI cmd
2025-03-30 07:46:43 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:46:43 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:46:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:46:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:46:43 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:46:43 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:46:43 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 07:46:43 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 07:46:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:46:43 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:46:43 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:46:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:46:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:46:44 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-03-30 07:46:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:46:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:46:44 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:46:44 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:46:44 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:46:44 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:46:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:46:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:46:44 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:46:44 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:46:44 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 07:46:44 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 07:46:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:46:44 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:46:44 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:46:44 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:46:44 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:46:44 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.26.22:6700) Recv SETFH cmd
2025-03-30 07:46:44 [INFO] transceiver.py:237 (MS@172.18.26.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2025-03-30 07:46:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:46:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:46:44 [DEBUG] clck_gen.py:128 IND CLOCK 306
2025-03-30 07:46:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:46:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:46:44 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:46:44 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:46:44 [INFO] transceiver.py:241 (MS@172.18.26.22:6700) Frequency hopping disabled
2025-03-30 07:46:44 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:46:44 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:46:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:46:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:46:44 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:46:44 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:46:44 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 07:46:44 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 07:46:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:46:44 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:46:44 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:46:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:46:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:46:45 [DEBUG] clck_gen.py:128 IND CLOCK 408
2025-03-30 07:46:45 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:46:45 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:46:45 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:46:45 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:46:45 [DEBUG] clck_gen.py:128 IND CLOCK 510
2025-03-30 07:46:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:46:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:46:46 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:46:46 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:46:46 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:46:46 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:46:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:46:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:46:46 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:46:46 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:46:46 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 07:46:46 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 07:46:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:46:46 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.26.22:6700) Recv SETFH cmd
2025-03-30 07:46:46 [INFO] transceiver.py:237 (MS@172.18.26.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2025-03-30 07:46:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:46:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:46:46 [DEBUG] clck_gen.py:128 IND CLOCK 612
2025-03-30 07:46:46 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:46:46 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:46:46 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:46:46 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:46:46 [DEBUG] clck_gen.py:128 IND CLOCK 714
2025-03-30 07:46:47 [DEBUG] clck_gen.py:128 IND CLOCK 816
2025-03-30 07:46:47 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:46:47 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:46:47 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:46:47 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:46:47 [DEBUG] clck_gen.py:128 IND CLOCK 918
2025-03-30 07:46:47 [DEBUG] clck_gen.py:128 IND CLOCK 1020
2025-03-30 07:46:48 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:46:48 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:46:48 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:46:48 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:46:48 [DEBUG] clck_gen.py:128 IND CLOCK 1122
2025-03-30 07:46:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:46:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:46:48 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:46:48 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:46:48 [INFO] transceiver.py:241 (MS@172.18.26.22:6700) Frequency hopping disabled
2025-03-30 07:46:48 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:46:48 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:46:48 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:46:48 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:46:48 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:46:48 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:46:48 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:46:48 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:46:48 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 07:46:48 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 07:46:48 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 07:46:48 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=1148 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:46:48 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=1148 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:46:48 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=1148 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:46:48 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=1148 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:46:48 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=1148 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:46:48 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=1148 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:46:48 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=1148 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:46:48 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=1148 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:46:53 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 07:46:53 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 07:46:53 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:46:53 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:46:53 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:46:53 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:46:53 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:46:53 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 07:46:53 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:46:53 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 07:46:53 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 07:46:53 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 07:46:53 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 07:46:53 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 07:46:53 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:46:53 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:46:53 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 07:46:53 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 07:46:53 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 07:46:53 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 07:46:53 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 07:46:53 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 07:46:53 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:46:53 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:46:53 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 07:46:53 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 07:46:53 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 07:46:53 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 07:46:53 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 07:46:53 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 07:46:53 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:46:53 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:46:53 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 07:46:53 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 07:46:53 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 07:46:53 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 07:46:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 07:46:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 07:46:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 07:46:53 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 07:46:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 07:46:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 07:46:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 07:46:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:46:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 07:46:53 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 07:46:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:46:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:46:53 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 07:46:53 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 07:46:53 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 07:46:53 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 07:46:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:46:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:46:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:46:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 07:46:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:46:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:46:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:46:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:46:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:46:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:46:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:46:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:46:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:46:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:46:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:46:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:46:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:46:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:46:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:46:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:46:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:46:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:46:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:46:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:46:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:46:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:46:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:46:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:46:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:46:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:46:53 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-03-30 07:46:54 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-03-30 07:46:54 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-03-30 07:46:54 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-03-30 07:46:54 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-03-30 07:46:54 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-03-30 07:46:54 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-03-30 07:46:54 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-03-30 07:46:54 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-03-30 07:46:54 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-03-30 07:46:54 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=0 bl=148 pwr=0
2025-03-30 07:46:54 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=1 bl=148 pwr=0
2025-03-30 07:46:54 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=2 bl=148 pwr=0
2025-03-30 07:46:54 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=3 bl=148 pwr=0
2025-03-30 07:46:54 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=4 bl=148 pwr=0
2025-03-30 07:46:54 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=5 bl=148 pwr=0
2025-03-30 07:46:54 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=6 bl=148 pwr=0
2025-03-30 07:46:54 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=7 bl=148 pwr=0
2025-03-30 07:46:54 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 07:46:54 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 07:46:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:46:54 [DEBUG] fake_trx.py:317 (BTS@172.18.26.20:5700) Recv FAKE_CI cmd
2025-03-30 07:46:54 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:46:54 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:46:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:46:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:46:54 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:46:54 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:46:54 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 07:46:54 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 07:46:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:46:54 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:46:54 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:46:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:46:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:46:54 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-03-30 07:46:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:46:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:46:54 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:46:54 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:46:54 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:46:54 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:46:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:46:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:46:54 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:46:54 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:46:54 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 07:46:54 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 07:46:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:46:54 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.26.22:6700) Recv SETFH cmd
2025-03-30 07:46:54 [INFO] transceiver.py:237 (MS@172.18.26.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2025-03-30 07:46:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:46:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:46:54 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:46:54 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:46:54 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:46:54 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:46:55 [DEBUG] clck_gen.py:128 IND CLOCK 306
2025-03-30 07:46:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:46:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:46:55 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:46:55 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:46:55 [INFO] transceiver.py:241 (MS@172.18.26.22:6700) Frequency hopping disabled
2025-03-30 07:46:55 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:46:55 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:46:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:46:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:46:55 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:46:55 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:46:55 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 07:46:55 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 07:46:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:46:55 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:46:55 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:46:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:46:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:46:55 [DEBUG] clck_gen.py:128 IND CLOCK 408
2025-03-30 07:46:55 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:46:55 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:46:55 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:46:55 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:46:55 [DEBUG] clck_gen.py:128 IND CLOCK 510
2025-03-30 07:46:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:46:56 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:46:56 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:46:56 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:46:56 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:46:56 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:46:56 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:46:56 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:46:56 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:46:56 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:46:56 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 07:46:56 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 07:46:56 [DEBUG] clck_gen.py:128 IND CLOCK 612
2025-03-30 07:46:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:46:56 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.26.22:6700) Recv SETFH cmd
2025-03-30 07:46:56 [INFO] transceiver.py:237 (MS@172.18.26.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2025-03-30 07:46:56 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:46:56 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:46:56 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:46:56 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:46:56 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:46:56 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:46:56 [DEBUG] clck_gen.py:128 IND CLOCK 714
2025-03-30 07:46:57 [DEBUG] clck_gen.py:128 IND CLOCK 816
2025-03-30 07:46:57 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:46:57 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:46:57 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:46:57 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:46:57 [DEBUG] clck_gen.py:128 IND CLOCK 918
2025-03-30 07:46:58 [DEBUG] clck_gen.py:128 IND CLOCK 1020
2025-03-30 07:46:58 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:46:58 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:46:58 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:46:58 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:46:58 [DEBUG] clck_gen.py:128 IND CLOCK 1122
2025-03-30 07:46:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:46:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:46:58 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:46:58 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:46:58 [INFO] transceiver.py:241 (MS@172.18.26.22:6700) Frequency hopping disabled
2025-03-30 07:46:58 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:46:58 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:46:58 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:46:58 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:46:58 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:46:58 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:46:58 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:46:58 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:46:58 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 07:46:58 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 07:46:58 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 07:47:03 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 07:47:03 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 07:47:03 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:47:03 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:47:03 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:47:03 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:47:03 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:47:03 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 07:47:03 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:47:03 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 07:47:03 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 07:47:03 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 07:47:03 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 07:47:03 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 07:47:03 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:47:03 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:47:03 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 07:47:03 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 07:47:03 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 07:47:03 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 07:47:03 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 07:47:03 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 07:47:03 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:47:03 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 07:47:03 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:47:03 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 07:47:03 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 07:47:03 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 07:47:03 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 07:47:03 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 07:47:03 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:47:03 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 07:47:03 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:47:03 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 07:47:03 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 07:47:03 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 07:47:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 07:47:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 07:47:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 07:47:03 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 07:47:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 07:47:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 07:47:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 07:47:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 07:47:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:47:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:47:03 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 07:47:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:47:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:47:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:47:03 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 07:47:03 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 07:47:03 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 07:47:03 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 07:47:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:47:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:47:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:47:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 07:47:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:47:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:47:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:47:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:47:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:47:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:47:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:47:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:47:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:47:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:47:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:47:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:47:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:47:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:47:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:47:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:47:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:47:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:47:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:47:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:47:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:47:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:47:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:47:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:47:03 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-03-30 07:47:04 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-03-30 07:47:04 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-03-30 07:47:04 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-03-30 07:47:04 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-03-30 07:47:04 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-03-30 07:47:04 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-03-30 07:47:04 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-03-30 07:47:04 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-03-30 07:47:04 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-03-30 07:47:04 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=0 bl=148 pwr=0
2025-03-30 07:47:04 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=1 bl=148 pwr=0
2025-03-30 07:47:04 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=2 bl=148 pwr=0
2025-03-30 07:47:04 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=3 bl=148 pwr=0
2025-03-30 07:47:04 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=4 bl=148 pwr=0
2025-03-30 07:47:04 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=5 bl=148 pwr=0
2025-03-30 07:47:04 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=6 bl=148 pwr=0
2025-03-30 07:47:04 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=7 bl=148 pwr=0
2025-03-30 07:47:04 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 07:47:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:47:04 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 07:47:04 [DEBUG] fake_trx.py:317 (BTS@172.18.26.20:5700) Recv FAKE_CI cmd
2025-03-30 07:47:04 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:47:04 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:47:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:47:04 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:47:04 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:47:04 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:47:04 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:47:04 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:47:04 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:47:04 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:47:04 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:47:04 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 07:47:04 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 07:47:04 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 07:47:09 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 07:47:09 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 07:47:09 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:47:09 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:47:09 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:47:09 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:47:09 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:47:09 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 07:47:09 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:47:09 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 07:47:09 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 07:47:09 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 07:47:09 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 07:47:09 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 07:47:09 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:47:09 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:47:09 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 07:47:09 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 07:47:09 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 07:47:09 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 07:47:09 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 07:47:09 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 07:47:09 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:47:09 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:47:09 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 07:47:09 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 07:47:09 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 07:47:09 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 07:47:09 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 07:47:09 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 07:47:09 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:47:09 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:47:09 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 07:47:09 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 07:47:09 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 07:47:09 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 07:47:09 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 07:47:09 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 07:47:09 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 07:47:09 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 07:47:09 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 07:47:09 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 07:47:09 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 07:47:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 07:47:09 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:47:09 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:47:09 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 07:47:09 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:47:09 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:47:09 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:47:09 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 07:47:09 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 07:47:09 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 07:47:09 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 07:47:09 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:47:09 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:47:09 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:47:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 07:47:09 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:47:09 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:47:09 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:47:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:47:09 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:47:09 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:47:09 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:47:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:47:09 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:47:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:47:09 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:47:09 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:47:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:47:09 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:47:09 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:47:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:47:09 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:47:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:47:09 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:47:09 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:47:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:47:09 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:47:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:47:09 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:47:09 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-03-30 07:47:10 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-03-30 07:47:10 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-03-30 07:47:10 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-03-30 07:47:10 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-03-30 07:47:10 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-03-30 07:47:10 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-03-30 07:47:10 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-03-30 07:47:10 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-03-30 07:47:10 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-03-30 07:47:10 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=0 bl=148 pwr=0
2025-03-30 07:47:10 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=1 bl=148 pwr=0
2025-03-30 07:47:10 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=2 bl=148 pwr=0
2025-03-30 07:47:10 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=3 bl=148 pwr=0
2025-03-30 07:47:10 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=4 bl=148 pwr=0
2025-03-30 07:47:10 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=5 bl=148 pwr=0
2025-03-30 07:47:10 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=6 bl=148 pwr=0
2025-03-30 07:47:10 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=7 bl=148 pwr=0
2025-03-30 07:47:10 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 07:47:10 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 07:47:10 [DEBUG] fake_trx.py:317 (BTS@172.18.26.20:5700) Recv FAKE_CI cmd
2025-03-30 07:47:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:47:10 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:47:10 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:47:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:47:10 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:47:10 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:47:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:47:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:47:10 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:47:10 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:47:10 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:47:10 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:47:10 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:47:10 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:47:10 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:47:10 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 07:47:10 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 07:47:10 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 07:47:10 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:47:10 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=136 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:47:10 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=136 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:47:10 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=136 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:47:10 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=136 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:47:10 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=136 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:47:10 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=136 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:47:10 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=136 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:47:10 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=136 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:47:15 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 07:47:15 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 07:47:15 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:47:15 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:47:15 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:47:15 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:47:15 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:47:15 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 07:47:15 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:47:15 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 07:47:15 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 07:47:15 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 07:47:15 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 07:47:15 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 07:47:15 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:47:15 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:47:15 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 07:47:15 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 07:47:15 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 07:47:15 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 07:47:15 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 07:47:15 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 07:47:15 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:47:15 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:47:15 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 07:47:15 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 07:47:15 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 07:47:15 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 07:47:15 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 07:47:15 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 07:47:15 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:47:15 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:47:15 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 07:47:15 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 07:47:15 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 07:47:15 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 07:47:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 07:47:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 07:47:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 07:47:15 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 07:47:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 07:47:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 07:47:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 07:47:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:47:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 07:47:15 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 07:47:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:47:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:47:15 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 07:47:15 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 07:47:15 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 07:47:15 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 07:47:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:47:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:47:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:47:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 07:47:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:47:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:47:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:47:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:47:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:47:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:47:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:47:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:47:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:47:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:47:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:47:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:47:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:47:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:47:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:47:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:47:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:47:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:47:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:47:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:47:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:47:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:47:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:47:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:47:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:47:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:47:15 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-03-30 07:47:15 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-03-30 07:47:15 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-03-30 07:47:15 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-03-30 07:47:15 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-03-30 07:47:15 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-03-30 07:47:15 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-03-30 07:47:15 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-03-30 07:47:15 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-03-30 07:47:15 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-03-30 07:47:15 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=0 bl=148 pwr=0
2025-03-30 07:47:15 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=1 bl=148 pwr=0
2025-03-30 07:47:15 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=2 bl=148 pwr=0
2025-03-30 07:47:15 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=3 bl=148 pwr=0
2025-03-30 07:47:15 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=4 bl=148 pwr=0
2025-03-30 07:47:15 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=5 bl=148 pwr=0
2025-03-30 07:47:15 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=6 bl=148 pwr=0
2025-03-30 07:47:15 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=7 bl=148 pwr=0
2025-03-30 07:47:15 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 07:47:15 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 07:47:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:47:15 [DEBUG] fake_trx.py:317 (BTS@172.18.26.20:5700) Recv FAKE_CI cmd
2025-03-30 07:47:15 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:47:15 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:47:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:47:15 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:47:15 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:47:15 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:47:15 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:47:15 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:47:15 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:47:15 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:47:15 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:47:15 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 07:47:15 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 07:47:15 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 07:47:15 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=127 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:47:15 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=127 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:47:15 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=127 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:47:15 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=127 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:47:15 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=127 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:47:15 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=127 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:47:15 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=127 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:47:15 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=127 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:47:20 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 07:47:20 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 07:47:20 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:47:20 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:47:20 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:47:20 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:47:20 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:47:20 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 07:47:20 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:47:20 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 07:47:20 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 07:47:20 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 07:47:20 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 07:47:20 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 07:47:20 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:47:20 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:47:20 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 07:47:20 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 07:47:20 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 07:47:20 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 07:47:20 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 07:47:20 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 07:47:20 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:47:20 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:47:20 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 07:47:20 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 07:47:20 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 07:47:20 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 07:47:20 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 07:47:20 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 07:47:20 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:47:20 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:47:20 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 07:47:20 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 07:47:20 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 07:47:20 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 07:47:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 07:47:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 07:47:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 07:47:20 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 07:47:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 07:47:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 07:47:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 07:47:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:47:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 07:47:20 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 07:47:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:47:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:47:20 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 07:47:20 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 07:47:20 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 07:47:20 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 07:47:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:47:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:47:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:47:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 07:47:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:47:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:47:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:47:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:47:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:47:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:47:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:47:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:47:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:47:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:47:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:47:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:47:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:47:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:47:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:47:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:47:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:47:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:47:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:47:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:47:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:47:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:47:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:47:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:47:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:47:20 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:47:20 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:47:20 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 07:47:20 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 07:47:20 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 07:47:20 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:47:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:47:25 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 07:47:25 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 07:47:25 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:47:25 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:47:25 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:47:25 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:47:25 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:47:25 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 07:47:25 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:47:25 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 07:47:25 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 07:47:25 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 07:47:25 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 07:47:25 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 07:47:25 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:47:25 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:47:25 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 07:47:25 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 07:47:25 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 07:47:25 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 07:47:25 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 07:47:25 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 07:47:25 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:47:25 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:47:25 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 07:47:25 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 07:47:25 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 07:47:25 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 07:47:25 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 07:47:25 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 07:47:25 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:47:25 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:47:25 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 07:47:25 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 07:47:25 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 07:47:25 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 07:47:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 07:47:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 07:47:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 07:47:25 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 07:47:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 07:47:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 07:47:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 07:47:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:47:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 07:47:25 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 07:47:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:47:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:47:25 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 07:47:25 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 07:47:25 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 07:47:25 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 07:47:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:47:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:47:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:47:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 07:47:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:47:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:47:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:47:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:47:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:47:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:47:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:47:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:47:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:47:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:47:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:47:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:47:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:47:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:47:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:47:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:47:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:47:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:47:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:47:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:47:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:47:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:47:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:47:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:47:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:47:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:47:25 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-03-30 07:47:26 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-03-30 07:47:26 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-03-30 07:47:26 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-03-30 07:47:26 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-03-30 07:47:26 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-03-30 07:47:26 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-03-30 07:47:26 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-03-30 07:47:26 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-03-30 07:47:26 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-03-30 07:47:26 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=0 bl=148 pwr=0
2025-03-30 07:47:26 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=1 bl=148 pwr=0
2025-03-30 07:47:26 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=2 bl=148 pwr=0
2025-03-30 07:47:26 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=3 bl=148 pwr=0
2025-03-30 07:47:26 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=4 bl=148 pwr=0
2025-03-30 07:47:26 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=5 bl=148 pwr=0
2025-03-30 07:47:26 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=6 bl=148 pwr=0
2025-03-30 07:47:26 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=7 bl=148 pwr=0
2025-03-30 07:47:26 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 07:47:26 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 07:47:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:47:26 [DEBUG] fake_trx.py:317 (BTS@172.18.26.20:5700) Recv FAKE_CI cmd
2025-03-30 07:47:26 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:47:26 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:47:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:47:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:47:26 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:47:26 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:47:26 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 07:47:26 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 07:47:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:47:26 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:47:26 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:47:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:47:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:47:26 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-03-30 07:47:26 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:47:26 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:47:26 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:47:26 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:47:27 [DEBUG] clck_gen.py:128 IND CLOCK 306
2025-03-30 07:47:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:47:27 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:47:27 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:47:27 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:47:27 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:47:27 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:47:27 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:47:27 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:47:27 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:47:27 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:47:27 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 07:47:27 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 07:47:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:47:27 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:47:27 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:47:27 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:47:27 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:47:27 [DEBUG] clck_gen.py:128 IND CLOCK 408
2025-03-30 07:47:27 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:47:27 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:47:27 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:47:27 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:47:28 [DEBUG] clck_gen.py:128 IND CLOCK 510
2025-03-30 07:47:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:47:28 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:47:28 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:47:28 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:47:28 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:47:28 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:47:28 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:47:28 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:47:28 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:47:28 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:47:28 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 07:47:28 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 07:47:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:47:28 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:47:28 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:47:28 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:47:28 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:47:28 [DEBUG] clck_gen.py:128 IND CLOCK 612
2025-03-30 07:47:28 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:47:28 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:47:28 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:47:28 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:47:29 [DEBUG] clck_gen.py:128 IND CLOCK 714
2025-03-30 07:47:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:47:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:47:29 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:47:29 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:47:29 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:47:29 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:47:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:47:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:47:29 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:47:29 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:47:29 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 07:47:29 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 07:47:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:47:29 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:47:29 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:47:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:47:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:47:29 [DEBUG] clck_gen.py:128 IND CLOCK 816
2025-03-30 07:47:29 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:47:29 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:47:29 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:47:29 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:47:30 [DEBUG] clck_gen.py:128 IND CLOCK 918
2025-03-30 07:47:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:47:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:47:30 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:47:30 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:47:30 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:47:30 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:47:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:47:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:47:30 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:47:30 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:47:30 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 07:47:30 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 07:47:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:47:30 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:47:30 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:47:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:47:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:47:30 [DEBUG] clck_gen.py:128 IND CLOCK 1020
2025-03-30 07:47:30 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:47:30 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:47:30 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:47:30 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:47:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:47:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:47:30 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:47:30 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:47:30 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:47:30 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:47:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:47:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:47:30 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:47:30 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:47:30 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 07:47:30 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 07:47:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:47:30 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.26.22:6700) Recv SETFH cmd
2025-03-30 07:47:30 [INFO] transceiver.py:237 (MS@172.18.26.22:6700) Frequency hopping configured: hsn=2, maio=0, ma_len=2
2025-03-30 07:47:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:47:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:47:31 [DEBUG] clck_gen.py:128 IND CLOCK 1122
2025-03-30 07:47:31 [DEBUG] clck_gen.py:128 IND CLOCK 1224
2025-03-30 07:47:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:47:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:47:31 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:47:31 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:47:31 [INFO] transceiver.py:241 (MS@172.18.26.22:6700) Frequency hopping disabled
2025-03-30 07:47:31 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:47:31 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:47:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:47:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:47:31 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:47:31 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:47:31 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 07:47:31 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 07:47:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:47:31 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.26.22:6700) Recv SETFH cmd
2025-03-30 07:47:31 [INFO] transceiver.py:237 (MS@172.18.26.22:6700) Frequency hopping configured: hsn=3, maio=3, ma_len=4
2025-03-30 07:47:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:47:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:47:32 [DEBUG] clck_gen.py:128 IND CLOCK 1326
2025-03-30 07:47:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:47:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:47:32 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:47:32 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:47:32 [INFO] transceiver.py:241 (MS@172.18.26.22:6700) Frequency hopping disabled
2025-03-30 07:47:32 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:47:32 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:47:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:47:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:47:32 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:47:32 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:47:32 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 07:47:32 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 07:47:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:47:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:47:32 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:47:32 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:47:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:47:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:47:32 [DEBUG] clck_gen.py:128 IND CLOCK 1428
2025-03-30 07:47:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:47:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:47:32 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:47:32 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:47:32 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:47:32 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:47:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:47:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:47:32 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:47:32 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:47:32 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 07:47:32 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 07:47:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:47:32 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:47:32 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:47:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:47:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:47:32 [DEBUG] clck_gen.py:128 IND CLOCK 1530
2025-03-30 07:47:33 [DEBUG] clck_gen.py:128 IND CLOCK 1632
2025-03-30 07:47:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:47:33 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:47:33 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:47:33 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:47:33 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:47:33 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:47:33 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:47:33 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:47:33 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:47:33 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:47:33 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 07:47:33 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 07:47:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:47:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:47:33 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:47:33 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:47:33 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:47:33 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:47:33 [DEBUG] clck_gen.py:128 IND CLOCK 1734
2025-03-30 07:47:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:47:34 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:47:34 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:47:34 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:47:34 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:47:34 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:47:34 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:47:34 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:47:34 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:47:34 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:47:34 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 07:47:34 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 07:47:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:47:34 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.26.22:6700) Recv SETFH cmd
2025-03-30 07:47:34 [INFO] transceiver.py:237 (MS@172.18.26.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2025-03-30 07:47:34 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:47:34 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:47:34 [DEBUG] clck_gen.py:128 IND CLOCK 1836
2025-03-30 07:47:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:47:34 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:47:34 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:47:34 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:47:34 [INFO] transceiver.py:241 (MS@172.18.26.22:6700) Frequency hopping disabled
2025-03-30 07:47:34 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:47:34 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:47:34 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:47:34 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:47:34 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:47:34 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:47:34 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 07:47:34 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 07:47:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:47:34 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.26.22:6700) Recv SETFH cmd
2025-03-30 07:47:34 [INFO] transceiver.py:237 (MS@172.18.26.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2025-03-30 07:47:34 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:47:34 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:47:34 [DEBUG] clck_gen.py:128 IND CLOCK 1938
2025-03-30 07:47:35 [DEBUG] clck_gen.py:128 IND CLOCK 2040
2025-03-30 07:47:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:47:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:47:35 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:47:35 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:47:35 [INFO] transceiver.py:241 (MS@172.18.26.22:6700) Frequency hopping disabled
2025-03-30 07:47:35 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:47:35 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:47:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:47:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:47:35 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:47:35 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:47:35 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 07:47:35 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 07:47:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:47:35 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.26.22:6700) Recv SETFH cmd
2025-03-30 07:47:35 [INFO] transceiver.py:237 (MS@172.18.26.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2025-03-30 07:47:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:47:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:47:35 [DEBUG] clck_gen.py:128 IND CLOCK 2142
2025-03-30 07:47:36 [DEBUG] clck_gen.py:128 IND CLOCK 2244
2025-03-30 07:47:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:47:36 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:47:36 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:47:36 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:47:36 [INFO] transceiver.py:241 (MS@172.18.26.22:6700) Frequency hopping disabled
2025-03-30 07:47:36 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:47:36 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:47:36 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:47:36 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:47:36 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:47:36 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:47:36 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 07:47:36 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 07:47:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:47:36 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.26.22:6700) Recv SETFH cmd
2025-03-30 07:47:36 [INFO] transceiver.py:237 (MS@172.18.26.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2025-03-30 07:47:36 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:47:36 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:47:36 [DEBUG] clck_gen.py:128 IND CLOCK 2346
2025-03-30 07:47:37 [DEBUG] clck_gen.py:128 IND CLOCK 2448
2025-03-30 07:47:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:47:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:47:37 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:47:37 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:47:37 [INFO] transceiver.py:241 (MS@172.18.26.22:6700) Frequency hopping disabled
2025-03-30 07:47:37 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:47:37 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:47:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:47:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:47:37 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:47:37 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:47:37 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 07:47:37 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 07:47:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:47:37 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.26.22:6700) Recv SETFH cmd
2025-03-30 07:47:37 [INFO] transceiver.py:237 (MS@172.18.26.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2025-03-30 07:47:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:47:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:47:37 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=2526): ver=1 fn=2525 tn=0 bl=148 pwr=0
2025-03-30 07:47:37 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=2526): ver=1 fn=2525 tn=1 bl=148 pwr=0
2025-03-30 07:47:37 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=2526): ver=1 fn=2525 tn=2 bl=148 pwr=0
2025-03-30 07:47:37 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=2526): ver=1 fn=2525 tn=3 bl=148 pwr=0
2025-03-30 07:47:37 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=2526): ver=1 fn=2525 tn=4 bl=148 pwr=0
2025-03-30 07:47:37 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=2526): ver=1 fn=2525 tn=5 bl=148 pwr=0
2025-03-30 07:47:37 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=2526): ver=1 fn=2525 tn=6 bl=148 pwr=0
2025-03-30 07:47:37 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=2526): ver=1 fn=2525 tn=7 bl=148 pwr=0
2025-03-30 07:47:37 [DEBUG] clck_gen.py:128 IND CLOCK 2550
2025-03-30 07:47:38 [DEBUG] clck_gen.py:128 IND CLOCK 2652
2025-03-30 07:47:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:47:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:47:38 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:47:38 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:47:38 [INFO] transceiver.py:241 (MS@172.18.26.22:6700) Frequency hopping disabled
2025-03-30 07:47:38 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:47:38 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:47:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:47:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:47:38 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:47:38 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:47:38 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 07:47:38 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 07:47:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:47:38 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.26.22:6700) Recv SETFH cmd
2025-03-30 07:47:38 [INFO] transceiver.py:237 (MS@172.18.26.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2025-03-30 07:47:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:47:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:47:38 [DEBUG] clck_gen.py:128 IND CLOCK 2754
2025-03-30 07:47:39 [DEBUG] clck_gen.py:128 IND CLOCK 2856
2025-03-30 07:47:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:47:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:47:39 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:47:39 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:47:39 [INFO] transceiver.py:241 (MS@172.18.26.22:6700) Frequency hopping disabled
2025-03-30 07:47:39 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:47:39 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:47:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:47:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:47:39 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:47:39 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:47:39 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 07:47:39 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 07:47:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:47:39 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.26.22:6700) Recv SETFH cmd
2025-03-30 07:47:39 [INFO] transceiver.py:237 (MS@172.18.26.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2025-03-30 07:47:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:47:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:47:39 [DEBUG] clck_gen.py:128 IND CLOCK 2958
2025-03-30 07:47:40 [DEBUG] clck_gen.py:128 IND CLOCK 3060
2025-03-30 07:47:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:47:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:47:40 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:47:40 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:47:40 [INFO] transceiver.py:241 (MS@172.18.26.22:6700) Frequency hopping disabled
2025-03-30 07:47:40 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:47:40 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:47:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:47:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:47:40 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:47:40 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:47:40 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 07:47:40 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 07:47:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:47:40 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.26.22:6700) Recv SETFH cmd
2025-03-30 07:47:40 [INFO] transceiver.py:237 (MS@172.18.26.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2025-03-30 07:47:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:47:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:47:40 [DEBUG] clck_gen.py:128 IND CLOCK 3162
2025-03-30 07:47:40 [DEBUG] clck_gen.py:128 IND CLOCK 3264
2025-03-30 07:47:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:47:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:47:41 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:47:41 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:47:41 [INFO] transceiver.py:241 (MS@172.18.26.22:6700) Frequency hopping disabled
2025-03-30 07:47:41 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:47:41 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:47:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:47:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:47:41 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:47:41 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:47:41 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 07:47:41 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 07:47:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:47:41 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.26.22:6700) Recv SETFH cmd
2025-03-30 07:47:41 [INFO] transceiver.py:237 (MS@172.18.26.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2025-03-30 07:47:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:47:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:47:41 [DEBUG] clck_gen.py:128 IND CLOCK 3366
2025-03-30 07:47:41 [DEBUG] clck_gen.py:128 IND CLOCK 3468
2025-03-30 07:47:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:47:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:47:42 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:47:42 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:47:42 [INFO] transceiver.py:241 (MS@172.18.26.22:6700) Frequency hopping disabled
2025-03-30 07:47:42 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:47:42 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:47:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:47:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:47:42 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:47:42 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:47:42 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 07:47:42 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 07:47:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:47:42 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.26.22:6700) Recv SETFH cmd
2025-03-30 07:47:42 [INFO] transceiver.py:237 (MS@172.18.26.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2025-03-30 07:47:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:47:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:47:42 [DEBUG] clck_gen.py:128 IND CLOCK 3570
2025-03-30 07:47:42 [DEBUG] clck_gen.py:128 IND CLOCK 3672
2025-03-30 07:47:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:47:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:47:42 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:47:42 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:47:42 [INFO] transceiver.py:241 (MS@172.18.26.22:6700) Frequency hopping disabled
2025-03-30 07:47:42 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:47:42 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:47:42 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:47:42 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:47:42 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:47:42 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:47:42 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:47:42 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 07:47:42 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 07:47:42 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 07:47:42 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:47:47 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 07:47:47 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 07:47:47 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:47:47 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:47:47 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:47:47 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:47:48 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:47:48 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 07:47:48 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:47:48 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 07:47:48 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 07:47:48 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 07:47:48 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 07:47:48 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 07:47:48 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:47:48 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:47:48 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 07:47:48 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 07:47:48 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 07:47:48 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 07:47:48 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 07:47:48 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 07:47:48 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:47:48 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:47:48 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 07:47:48 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 07:47:48 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 07:47:48 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 07:47:48 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 07:47:48 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 07:47:48 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:47:48 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:47:48 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 07:47:48 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 07:47:48 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 07:47:48 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 07:47:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 07:47:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 07:47:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 07:47:48 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 07:47:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 07:47:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 07:47:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 07:47:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:47:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 07:47:48 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 07:47:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:47:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:47:48 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 07:47:48 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 07:47:48 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 07:47:48 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 07:47:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:47:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:47:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:47:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 07:47:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:47:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:47:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:47:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:47:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:47:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:47:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:47:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:47:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:47:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:47:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:47:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:47:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:47:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:47:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:47:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:47:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:47:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:47:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:47:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:47:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:47:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:47:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:47:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:47:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:47:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:47:48 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-03-30 07:47:48 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-03-30 07:47:48 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-03-30 07:47:48 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-03-30 07:47:48 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-03-30 07:47:48 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-03-30 07:47:48 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-03-30 07:47:48 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-03-30 07:47:48 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-03-30 07:47:48 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-03-30 07:47:48 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=0 bl=148 pwr=0
2025-03-30 07:47:48 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=1 bl=148 pwr=0
2025-03-30 07:47:48 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=2 bl=148 pwr=0
2025-03-30 07:47:48 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=3 bl=148 pwr=0
2025-03-30 07:47:48 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=4 bl=148 pwr=0
2025-03-30 07:47:48 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=5 bl=148 pwr=0
2025-03-30 07:47:48 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=6 bl=148 pwr=0
2025-03-30 07:47:48 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=7 bl=148 pwr=0
2025-03-30 07:47:48 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 07:47:48 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 07:47:48 [DEBUG] fake_trx.py:317 (BTS@172.18.26.20:5700) Recv FAKE_CI cmd
2025-03-30 07:47:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:47:48 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:47:48 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:47:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:47:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:47:48 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:47:48 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:47:48 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 07:47:48 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 07:47:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:47:48 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:47:48 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:47:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:47:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:47:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:47:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:47:48 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:47:48 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:47:48 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:47:48 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:47:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:47:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:47:48 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:47:48 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:47:48 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 07:47:48 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 07:47:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:47:48 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:47:48 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:47:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:47:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:47:48 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-03-30 07:47:49 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:47:49 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:47:49 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:47:49 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:47:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:47:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:47:49 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:47:49 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:47:49 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:47:49 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:47:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:47:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:47:49 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:47:49 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:47:49 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 07:47:49 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 07:47:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:47:49 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:47:49 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:47:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:47:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:47:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:47:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:47:49 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:47:49 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:47:49 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:47:49 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:47:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:47:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:47:49 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:47:49 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:47:49 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 07:47:49 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 07:47:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:47:49 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:47:49 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:47:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:47:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:47:49 [DEBUG] clck_gen.py:128 IND CLOCK 306
2025-03-30 07:47:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:47:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:47:49 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:47:49 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:47:49 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:47:49 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:47:49 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:47:49 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:47:49 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:47:49 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:47:49 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:47:49 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:47:49 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 07:47:49 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 07:47:49 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 07:47:54 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 07:47:54 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 07:47:54 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:47:54 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:47:54 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:47:54 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:47:54 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:47:54 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 07:47:54 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:47:54 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 07:47:54 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 07:47:54 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 07:47:54 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 07:47:54 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 07:47:54 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:47:54 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:47:54 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 07:47:54 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 07:47:54 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 07:47:54 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 07:47:54 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 07:47:54 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 07:47:54 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:47:54 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:47:54 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 07:47:54 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 07:47:54 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 07:47:54 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 07:47:54 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 07:47:54 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 07:47:54 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:47:54 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:47:54 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 07:47:54 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 07:47:54 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 07:47:54 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 07:47:54 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 07:47:54 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 07:47:54 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 07:47:54 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 07:47:54 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 07:47:54 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 07:47:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 07:47:54 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:47:54 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 07:47:54 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 07:47:54 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:47:54 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:47:54 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 07:47:54 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 07:47:54 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 07:47:54 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 07:47:54 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:47:54 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:47:54 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:47:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 07:47:54 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:47:54 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:47:54 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:47:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:47:54 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:47:54 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:47:54 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:47:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:47:54 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:47:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:47:54 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:47:54 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:47:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:47:54 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:47:54 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:47:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:47:54 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:47:54 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:47:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:47:54 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:47:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:47:54 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:47:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:47:54 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:47:54 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:47:54 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:47:54 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-03-30 07:47:55 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-03-30 07:47:55 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-03-30 07:47:55 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-03-30 07:47:55 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-03-30 07:47:55 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-03-30 07:47:55 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-03-30 07:47:55 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-03-30 07:47:55 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-03-30 07:47:55 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-03-30 07:47:55 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=0 bl=148 pwr=0
2025-03-30 07:47:55 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=1 bl=148 pwr=0
2025-03-30 07:47:55 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=2 bl=148 pwr=0
2025-03-30 07:47:55 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=3 bl=148 pwr=0
2025-03-30 07:47:55 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=4 bl=148 pwr=0
2025-03-30 07:47:55 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=5 bl=148 pwr=0
2025-03-30 07:47:55 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=6 bl=148 pwr=0
2025-03-30 07:47:55 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=7 bl=148 pwr=0
2025-03-30 07:47:55 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-03-30 07:47:56 [DEBUG] clck_gen.py:128 IND CLOCK 306
2025-03-30 07:47:56 [DEBUG] clck_gen.py:128 IND CLOCK 408
2025-03-30 07:47:57 [DEBUG] clck_gen.py:128 IND CLOCK 510
2025-03-30 07:47:57 [DEBUG] clck_gen.py:128 IND CLOCK 612
2025-03-30 07:47:57 [DEBUG] clck_gen.py:128 IND CLOCK 714
2025-03-30 07:47:58 [DEBUG] clck_gen.py:128 IND CLOCK 816
2025-03-30 07:47:58 [DEBUG] clck_gen.py:128 IND CLOCK 918
2025-03-30 07:47:59 [DEBUG] clck_gen.py:128 IND CLOCK 1020
2025-03-30 07:47:59 [DEBUG] clck_gen.py:128 IND CLOCK 1122
2025-03-30 07:48:00 [DEBUG] clck_gen.py:128 IND CLOCK 1224
2025-03-30 07:48:00 [DEBUG] clck_gen.py:128 IND CLOCK 1326
2025-03-30 07:48:01 [DEBUG] clck_gen.py:128 IND CLOCK 1428
2025-03-30 07:48:01 [DEBUG] clck_gen.py:128 IND CLOCK 1530
2025-03-30 07:48:02 [DEBUG] clck_gen.py:128 IND CLOCK 1632
2025-03-30 07:48:02 [DEBUG] clck_gen.py:128 IND CLOCK 1734
2025-03-30 07:48:03 [DEBUG] clck_gen.py:128 IND CLOCK 1836
2025-03-30 07:48:03 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=1837): ver=1 fn=1835 tn=0 bl=148 pwr=0
2025-03-30 07:48:03 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=1837): ver=1 fn=1835 tn=1 bl=148 pwr=0
2025-03-30 07:48:03 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=1837): ver=1 fn=1835 tn=2 bl=148 pwr=0
2025-03-30 07:48:03 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=1837): ver=1 fn=1835 tn=3 bl=148 pwr=0
2025-03-30 07:48:03 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=1837): ver=1 fn=1835 tn=4 bl=148 pwr=0
2025-03-30 07:48:03 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=1837): ver=1 fn=1835 tn=5 bl=148 pwr=0
2025-03-30 07:48:03 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=1837): ver=1 fn=1835 tn=6 bl=148 pwr=0
2025-03-30 07:48:03 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=1837): ver=1 fn=1835 tn=7 bl=148 pwr=0
2025-03-30 07:48:03 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=1837): ver=1 fn=1836 tn=0 bl=148 pwr=0
2025-03-30 07:48:03 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=1837): ver=1 fn=1836 tn=1 bl=148 pwr=0
2025-03-30 07:48:03 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=1837): ver=1 fn=1836 tn=2 bl=148 pwr=0
2025-03-30 07:48:03 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=1837): ver=1 fn=1836 tn=3 bl=148 pwr=0
2025-03-30 07:48:03 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=1837): ver=1 fn=1836 tn=4 bl=148 pwr=0
2025-03-30 07:48:03 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=1837): ver=1 fn=1836 tn=5 bl=148 pwr=0
2025-03-30 07:48:03 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=1837): ver=1 fn=1836 tn=6 bl=148 pwr=0
2025-03-30 07:48:03 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=1837): ver=1 fn=1836 tn=7 bl=148 pwr=0
2025-03-30 07:48:03 [DEBUG] clck_gen.py:128 IND CLOCK 1938
2025-03-30 07:48:04 [DEBUG] clck_gen.py:128 IND CLOCK 2040
2025-03-30 07:48:04 [DEBUG] clck_gen.py:128 IND CLOCK 2142
2025-03-30 07:48:05 [DEBUG] clck_gen.py:128 IND CLOCK 2244
2025-03-30 07:48:05 [DEBUG] clck_gen.py:128 IND CLOCK 2346
2025-03-30 07:48:05 [DEBUG] clck_gen.py:128 IND CLOCK 2448
2025-03-30 07:48:06 [DEBUG] clck_gen.py:128 IND CLOCK 2550
2025-03-30 07:48:06 [DEBUG] clck_gen.py:128 IND CLOCK 2652
2025-03-30 07:48:07 [DEBUG] clck_gen.py:128 IND CLOCK 2754
2025-03-30 07:48:07 [DEBUG] clck_gen.py:128 IND CLOCK 2856
2025-03-30 07:48:08 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=2923): ver=1 fn=2920 tn=0 bl=148 pwr=0
2025-03-30 07:48:08 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=2923): ver=1 fn=2920 tn=1 bl=148 pwr=0
2025-03-30 07:48:08 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=2923): ver=1 fn=2920 tn=2 bl=148 pwr=0
2025-03-30 07:48:08 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=2923): ver=1 fn=2920 tn=3 bl=148 pwr=0
2025-03-30 07:48:08 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=2923): ver=1 fn=2920 tn=4 bl=148 pwr=0
2025-03-30 07:48:08 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=2923): ver=1 fn=2920 tn=5 bl=148 pwr=0
2025-03-30 07:48:08 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=2923): ver=1 fn=2920 tn=6 bl=148 pwr=0
2025-03-30 07:48:08 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=2923): ver=1 fn=2920 tn=7 bl=148 pwr=0
2025-03-30 07:48:08 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=2923): ver=1 fn=2921 tn=0 bl=148 pwr=0
2025-03-30 07:48:08 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=2923): ver=1 fn=2921 tn=1 bl=148 pwr=0
2025-03-30 07:48:08 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=2923): ver=1 fn=2921 tn=2 bl=148 pwr=0
2025-03-30 07:48:08 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=2923): ver=1 fn=2921 tn=3 bl=148 pwr=0
2025-03-30 07:48:08 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=2923): ver=1 fn=2921 tn=4 bl=148 pwr=0
2025-03-30 07:48:08 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=2923): ver=1 fn=2921 tn=5 bl=148 pwr=0
2025-03-30 07:48:08 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=2923): ver=1 fn=2921 tn=6 bl=148 pwr=0
2025-03-30 07:48:08 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=2923): ver=1 fn=2921 tn=7 bl=148 pwr=0
2025-03-30 07:48:08 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=2924): ver=1 fn=2922 tn=0 bl=148 pwr=0
2025-03-30 07:48:08 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=2924): ver=1 fn=2922 tn=1 bl=148 pwr=0
2025-03-30 07:48:08 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=2924): ver=1 fn=2922 tn=2 bl=148 pwr=0
2025-03-30 07:48:08 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=2924): ver=1 fn=2922 tn=3 bl=148 pwr=0
2025-03-30 07:48:08 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=2924): ver=1 fn=2922 tn=4 bl=148 pwr=0
2025-03-30 07:48:08 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=2924): ver=1 fn=2922 tn=5 bl=148 pwr=0
2025-03-30 07:48:08 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=2924): ver=1 fn=2922 tn=6 bl=148 pwr=0
2025-03-30 07:48:08 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=2924): ver=1 fn=2922 tn=7 bl=148 pwr=0
2025-03-30 07:48:08 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=2924): ver=1 fn=2923 tn=0 bl=148 pwr=0
2025-03-30 07:48:08 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=2924): ver=1 fn=2923 tn=1 bl=148 pwr=0
2025-03-30 07:48:08 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=2924): ver=1 fn=2923 tn=2 bl=148 pwr=0
2025-03-30 07:48:08 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=2924): ver=1 fn=2923 tn=3 bl=148 pwr=0
2025-03-30 07:48:08 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=2924): ver=1 fn=2923 tn=4 bl=148 pwr=0
2025-03-30 07:48:08 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=2924): ver=1 fn=2923 tn=5 bl=148 pwr=0
2025-03-30 07:48:08 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=2924): ver=1 fn=2923 tn=6 bl=148 pwr=0
2025-03-30 07:48:08 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=2924): ver=1 fn=2923 tn=7 bl=148 pwr=0
2025-03-30 07:48:08 [DEBUG] clck_gen.py:128 IND CLOCK 2958
2025-03-30 07:48:08 [DEBUG] clck_gen.py:128 IND CLOCK 3060
2025-03-30 07:48:09 [DEBUG] clck_gen.py:128 IND CLOCK 3162
2025-03-30 07:48:09 [DEBUG] clck_gen.py:128 IND CLOCK 3264
2025-03-30 07:48:10 [DEBUG] clck_gen.py:128 IND CLOCK 3366
2025-03-30 07:48:10 [DEBUG] clck_gen.py:128 IND CLOCK 3468
2025-03-30 07:48:11 [DEBUG] clck_gen.py:128 IND CLOCK 3570
2025-03-30 07:48:11 [DEBUG] clck_gen.py:128 IND CLOCK 3672
2025-03-30 07:48:12 [DEBUG] clck_gen.py:128 IND CLOCK 3774
2025-03-30 07:48:12 [DEBUG] clck_gen.py:128 IND CLOCK 3876
2025-03-30 07:48:13 [DEBUG] clck_gen.py:128 IND CLOCK 3978
2025-03-30 07:48:13 [DEBUG] clck_gen.py:128 IND CLOCK 4080
2025-03-30 07:48:13 [DEBUG] clck_gen.py:128 IND CLOCK 4182
2025-03-30 07:48:14 [DEBUG] clck_gen.py:128 IND CLOCK 4284
2025-03-30 07:48:14 [DEBUG] clck_gen.py:128 IND CLOCK 4386
2025-03-30 07:48:15 [DEBUG] clck_gen.py:128 IND CLOCK 4488
2025-03-30 07:48:15 [DEBUG] clck_gen.py:128 IND CLOCK 4590
2025-03-30 07:48:16 [DEBUG] clck_gen.py:128 IND CLOCK 4692
2025-03-30 07:48:16 [DEBUG] clck_gen.py:128 IND CLOCK 4794
2025-03-30 07:48:17 [DEBUG] clck_gen.py:128 IND CLOCK 4896
2025-03-30 07:48:17 [DEBUG] clck_gen.py:128 IND CLOCK 4998
2025-03-30 07:48:18 [DEBUG] clck_gen.py:128 IND CLOCK 5100
2025-03-30 07:48:18 [DEBUG] clck_gen.py:128 IND CLOCK 5202
2025-03-30 07:48:18 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:48:18 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:48:18 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:48:18 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:48:18 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 07:48:18 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 07:48:18 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 07:48:23 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 07:48:23 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 07:48:23 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:48:23 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:48:23 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:48:23 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:48:23 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:48:23 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 07:48:23 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:48:23 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 07:48:23 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 07:48:23 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 07:48:23 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 07:48:23 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 07:48:23 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:48:23 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:48:23 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 07:48:23 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 07:48:23 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 07:48:23 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 07:48:23 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 07:48:23 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 07:48:23 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:48:23 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:48:23 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 07:48:23 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 07:48:23 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 07:48:23 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 07:48:23 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 07:48:23 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 07:48:23 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:48:23 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:48:23 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 07:48:23 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 07:48:23 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 07:48:23 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 07:48:23 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 07:48:23 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 07:48:23 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 07:48:23 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 07:48:23 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 07:48:23 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 07:48:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 07:48:23 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:48:23 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 07:48:23 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 07:48:23 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:48:23 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:48:23 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 07:48:23 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 07:48:23 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 07:48:23 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 07:48:23 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:48:23 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:48:23 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:48:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 07:48:23 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:48:23 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:48:23 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:48:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:48:23 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:48:23 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:48:23 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:48:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:48:23 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:48:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:48:23 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:48:23 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:48:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:48:23 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:48:23 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:48:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:48:23 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:48:23 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:48:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:48:23 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:48:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:48:23 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:48:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:48:23 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:48:23 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:48:23 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:48:23 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-03-30 07:48:24 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-03-30 07:48:24 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-03-30 07:48:24 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-03-30 07:48:24 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-03-30 07:48:24 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-03-30 07:48:24 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-03-30 07:48:24 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-03-30 07:48:24 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-03-30 07:48:24 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-03-30 07:48:24 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=0 bl=148 pwr=0
2025-03-30 07:48:24 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=1 bl=148 pwr=0
2025-03-30 07:48:24 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=2 bl=148 pwr=0
2025-03-30 07:48:24 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=3 bl=148 pwr=0
2025-03-30 07:48:24 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=4 bl=148 pwr=0
2025-03-30 07:48:24 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=5 bl=148 pwr=0
2025-03-30 07:48:24 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=6 bl=148 pwr=0
2025-03-30 07:48:24 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=7 bl=148 pwr=0
2025-03-30 07:48:24 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-03-30 07:48:25 [DEBUG] clck_gen.py:128 IND CLOCK 306
2025-03-30 07:48:25 [DEBUG] clck_gen.py:128 IND CLOCK 408
2025-03-30 07:48:26 [DEBUG] clck_gen.py:128 IND CLOCK 510
2025-03-30 07:48:26 [DEBUG] clck_gen.py:128 IND CLOCK 612
2025-03-30 07:48:27 [DEBUG] clck_gen.py:128 IND CLOCK 714
2025-03-30 07:48:27 [DEBUG] clck_gen.py:128 IND CLOCK 816
2025-03-30 07:48:27 [DEBUG] clck_gen.py:128 IND CLOCK 918
2025-03-30 07:48:28 [DEBUG] clck_gen.py:128 IND CLOCK 1020
2025-03-30 07:48:28 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=1085): ver=1 fn=1080 tn=0 bl=148 pwr=0
2025-03-30 07:48:28 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=1085): ver=1 fn=1080 tn=1 bl=148 pwr=0
2025-03-30 07:48:28 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=1085): ver=1 fn=1080 tn=2 bl=148 pwr=0
2025-03-30 07:48:28 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=1085): ver=1 fn=1080 tn=3 bl=148 pwr=0
2025-03-30 07:48:28 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=1085): ver=1 fn=1080 tn=4 bl=148 pwr=0
2025-03-30 07:48:28 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=1085): ver=1 fn=1080 tn=5 bl=148 pwr=0
2025-03-30 07:48:28 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=1085): ver=1 fn=1080 tn=6 bl=148 pwr=0
2025-03-30 07:48:28 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=1085): ver=1 fn=1080 tn=7 bl=148 pwr=0
2025-03-30 07:48:28 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=1085): ver=1 fn=1081 tn=0 bl=148 pwr=0
2025-03-30 07:48:28 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=1085): ver=1 fn=1081 tn=1 bl=148 pwr=0
2025-03-30 07:48:28 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=1085): ver=1 fn=1081 tn=2 bl=148 pwr=0
2025-03-30 07:48:28 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=1085): ver=1 fn=1081 tn=3 bl=148 pwr=0
2025-03-30 07:48:28 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=1085): ver=1 fn=1081 tn=4 bl=148 pwr=0
2025-03-30 07:48:28 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=1085): ver=1 fn=1081 tn=5 bl=148 pwr=0
2025-03-30 07:48:28 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=1085): ver=1 fn=1081 tn=6 bl=148 pwr=0
2025-03-30 07:48:28 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=1085): ver=1 fn=1081 tn=7 bl=148 pwr=0
2025-03-30 07:48:28 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=1085): ver=1 fn=1082 tn=0 bl=148 pwr=0
2025-03-30 07:48:28 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=1085): ver=1 fn=1082 tn=1 bl=148 pwr=0
2025-03-30 07:48:28 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=1085): ver=1 fn=1082 tn=2 bl=148 pwr=0
2025-03-30 07:48:28 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=1085): ver=1 fn=1082 tn=3 bl=148 pwr=0
2025-03-30 07:48:28 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=1085): ver=1 fn=1082 tn=4 bl=148 pwr=0
2025-03-30 07:48:28 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=1085): ver=1 fn=1082 tn=5 bl=148 pwr=0
2025-03-30 07:48:28 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=1085): ver=1 fn=1082 tn=6 bl=148 pwr=0
2025-03-30 07:48:28 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=1085): ver=1 fn=1082 tn=7 bl=148 pwr=0
2025-03-30 07:48:28 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=1085): ver=1 fn=1083 tn=0 bl=148 pwr=0
2025-03-30 07:48:28 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=1085): ver=1 fn=1083 tn=1 bl=148 pwr=0
2025-03-30 07:48:28 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=1085): ver=1 fn=1083 tn=2 bl=148 pwr=0
2025-03-30 07:48:28 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=1085): ver=1 fn=1083 tn=3 bl=148 pwr=0
2025-03-30 07:48:28 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=1085): ver=1 fn=1083 tn=4 bl=148 pwr=0
2025-03-30 07:48:28 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=1085): ver=1 fn=1083 tn=5 bl=148 pwr=0
2025-03-30 07:48:28 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=1085): ver=1 fn=1083 tn=6 bl=148 pwr=0
2025-03-30 07:48:28 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=1085): ver=1 fn=1083 tn=7 bl=148 pwr=0
2025-03-30 07:48:28 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=1086): ver=1 fn=1084 tn=0 bl=148 pwr=0
2025-03-30 07:48:28 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=1086): ver=1 fn=1084 tn=1 bl=148 pwr=0
2025-03-30 07:48:28 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=1086): ver=1 fn=1084 tn=2 bl=148 pwr=0
2025-03-30 07:48:28 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=1086): ver=1 fn=1084 tn=3 bl=148 pwr=0
2025-03-30 07:48:28 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=1086): ver=1 fn=1084 tn=4 bl=148 pwr=0
2025-03-30 07:48:28 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=1086): ver=1 fn=1084 tn=5 bl=148 pwr=0
2025-03-30 07:48:28 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=1086): ver=1 fn=1084 tn=6 bl=148 pwr=0
2025-03-30 07:48:28 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=1086): ver=1 fn=1084 tn=7 bl=148 pwr=0
2025-03-30 07:48:28 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=1086): ver=1 fn=1085 tn=0 bl=148 pwr=0
2025-03-30 07:48:28 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=1086): ver=1 fn=1085 tn=1 bl=148 pwr=0
2025-03-30 07:48:28 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=1086): ver=1 fn=1085 tn=2 bl=148 pwr=0
2025-03-30 07:48:28 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=1086): ver=1 fn=1085 tn=3 bl=148 pwr=0
2025-03-30 07:48:28 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=1086): ver=1 fn=1085 tn=4 bl=148 pwr=0
2025-03-30 07:48:28 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=1086): ver=1 fn=1085 tn=5 bl=148 pwr=0
2025-03-30 07:48:28 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=1086): ver=1 fn=1085 tn=6 bl=148 pwr=0
2025-03-30 07:48:28 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=1086): ver=1 fn=1085 tn=7 bl=148 pwr=0
2025-03-30 07:48:28 [DEBUG] clck_gen.py:128 IND CLOCK 1122
2025-03-30 07:48:29 [DEBUG] clck_gen.py:128 IND CLOCK 1224
2025-03-30 07:48:29 [DEBUG] clck_gen.py:128 IND CLOCK 1326
2025-03-30 07:48:30 [DEBUG] clck_gen.py:128 IND CLOCK 1428
2025-03-30 07:48:30 [DEBUG] clck_gen.py:128 IND CLOCK 1530
2025-03-30 07:48:31 [DEBUG] clck_gen.py:128 IND CLOCK 1632
2025-03-30 07:48:31 [DEBUG] clck_gen.py:128 IND CLOCK 1734
2025-03-30 07:48:32 [DEBUG] clck_gen.py:128 IND CLOCK 1836
2025-03-30 07:48:32 [DEBUG] clck_gen.py:128 IND CLOCK 1938
2025-03-30 07:48:33 [DEBUG] clck_gen.py:128 IND CLOCK 2040
2025-03-30 07:48:33 [DEBUG] clck_gen.py:128 IND CLOCK 2142
2025-03-30 07:48:34 [DEBUG] clck_gen.py:128 IND CLOCK 2244
2025-03-30 07:48:34 [DEBUG] clck_gen.py:128 IND CLOCK 2346
2025-03-30 07:48:35 [DEBUG] clck_gen.py:128 IND CLOCK 2448
2025-03-30 07:48:35 [DEBUG] clck_gen.py:128 IND CLOCK 2550
2025-03-30 07:48:35 [DEBUG] clck_gen.py:128 IND CLOCK 2652
2025-03-30 07:48:36 [DEBUG] clck_gen.py:128 IND CLOCK 2754
2025-03-30 07:48:36 [DEBUG] clck_gen.py:128 IND CLOCK 2856
2025-03-30 07:48:37 [DEBUG] clck_gen.py:128 IND CLOCK 2958
2025-03-30 07:48:37 [DEBUG] clck_gen.py:128 IND CLOCK 3060
2025-03-30 07:48:38 [DEBUG] clck_gen.py:128 IND CLOCK 3162
2025-03-30 07:48:38 [DEBUG] clck_gen.py:128 IND CLOCK 3264
2025-03-30 07:48:39 [DEBUG] clck_gen.py:128 IND CLOCK 3366
2025-03-30 07:48:39 [DEBUG] clck_gen.py:128 IND CLOCK 3468
2025-03-30 07:48:40 [DEBUG] clck_gen.py:128 IND CLOCK 3570
2025-03-30 07:48:40 [DEBUG] clck_gen.py:128 IND CLOCK 3672
2025-03-30 07:48:41 [DEBUG] clck_gen.py:128 IND CLOCK 3774
2025-03-30 07:48:41 [DEBUG] clck_gen.py:128 IND CLOCK 3876
2025-03-30 07:48:42 [DEBUG] clck_gen.py:128 IND CLOCK 3978
2025-03-30 07:48:42 [DEBUG] clck_gen.py:128 IND CLOCK 4080
2025-03-30 07:48:43 [DEBUG] clck_gen.py:128 IND CLOCK 4182
2025-03-30 07:48:43 [DEBUG] clck_gen.py:128 IND CLOCK 4284
2025-03-30 07:48:43 [DEBUG] clck_gen.py:128 IND CLOCK 4386
2025-03-30 07:48:44 [DEBUG] clck_gen.py:128 IND CLOCK 4488
2025-03-30 07:48:44 [DEBUG] clck_gen.py:128 IND CLOCK 4590
2025-03-30 07:48:45 [DEBUG] clck_gen.py:128 IND CLOCK 4692
2025-03-30 07:48:45 [DEBUG] clck_gen.py:128 IND CLOCK 4794
2025-03-30 07:48:46 [DEBUG] clck_gen.py:128 IND CLOCK 4896
2025-03-30 07:48:46 [DEBUG] clck_gen.py:128 IND CLOCK 4998
2025-03-30 07:48:47 [DEBUG] clck_gen.py:128 IND CLOCK 5100
2025-03-30 07:48:47 [DEBUG] clck_gen.py:128 IND CLOCK 5202
2025-03-30 07:48:48 [DEBUG] clck_gen.py:128 IND CLOCK 5304
2025-03-30 07:48:48 [DEBUG] clck_gen.py:128 IND CLOCK 5406
2025-03-30 07:48:49 [DEBUG] clck_gen.py:128 IND CLOCK 5508
2025-03-30 07:48:49 [DEBUG] clck_gen.py:128 IND CLOCK 5610
2025-03-30 07:48:50 [DEBUG] clck_gen.py:128 IND CLOCK 5712
2025-03-30 07:48:50 [DEBUG] clck_gen.py:128 IND CLOCK 5814
2025-03-30 07:48:51 [DEBUG] clck_gen.py:128 IND CLOCK 5916
2025-03-30 07:48:51 [DEBUG] clck_gen.py:128 IND CLOCK 6018
2025-03-30 07:48:51 [DEBUG] clck_gen.py:128 IND CLOCK 6120
2025-03-30 07:48:52 [DEBUG] clck_gen.py:128 IND CLOCK 6222
2025-03-30 07:48:52 [DEBUG] clck_gen.py:128 IND CLOCK 6324
2025-03-30 07:48:53 [DEBUG] clck_gen.py:128 IND CLOCK 6426
2025-03-30 07:48:53 [DEBUG] clck_gen.py:128 IND CLOCK 6528
2025-03-30 07:48:54 [DEBUG] clck_gen.py:128 IND CLOCK 6630
2025-03-30 07:48:54 [DEBUG] clck_gen.py:128 IND CLOCK 6732
2025-03-30 07:48:55 [DEBUG] clck_gen.py:128 IND CLOCK 6834
2025-03-30 07:48:55 [DEBUG] clck_gen.py:128 IND CLOCK 6936
2025-03-30 07:48:56 [DEBUG] clck_gen.py:128 IND CLOCK 7038
2025-03-30 07:48:56 [DEBUG] clck_gen.py:128 IND CLOCK 7140
2025-03-30 07:48:57 [DEBUG] clck_gen.py:128 IND CLOCK 7242
2025-03-30 07:48:57 [DEBUG] clck_gen.py:128 IND CLOCK 7344
2025-03-30 07:48:58 [DEBUG] clck_gen.py:128 IND CLOCK 7446
2025-03-30 07:48:58 [DEBUG] clck_gen.py:128 IND CLOCK 7548
2025-03-30 07:48:59 [DEBUG] clck_gen.py:128 IND CLOCK 7650
2025-03-30 07:48:59 [DEBUG] clck_gen.py:128 IND CLOCK 7752
2025-03-30 07:49:00 [DEBUG] clck_gen.py:128 IND CLOCK 7854
2025-03-30 07:49:00 [DEBUG] clck_gen.py:128 IND CLOCK 7956
2025-03-30 07:49:00 [WARNING] clck_gen.py:108 CLCKGen: time overrun by -806us; resetting the clock
2025-03-30 07:49:00 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:49:00 [DEBUG] clck_gen.py:128 IND CLOCK 8058
2025-03-30 07:49:01 [DEBUG] clck_gen.py:128 IND CLOCK 8160
2025-03-30 07:49:01 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:49:01 [DEBUG] clck_gen.py:128 IND CLOCK 8262
2025-03-30 07:49:02 [DEBUG] clck_gen.py:128 IND CLOCK 8364
2025-03-30 07:49:02 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:49:02 [DEBUG] clck_gen.py:128 IND CLOCK 8466
2025-03-30 07:49:03 [DEBUG] clck_gen.py:128 IND CLOCK 8568
2025-03-30 07:49:03 [DEBUG] clck_gen.py:128 IND CLOCK 8670
2025-03-30 07:49:03 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:49:04 [DEBUG] clck_gen.py:128 IND CLOCK 8772
2025-03-30 07:49:04 [DEBUG] clck_gen.py:128 IND CLOCK 8874
2025-03-30 07:49:04 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:49:05 [DEBUG] clck_gen.py:128 IND CLOCK 8976
2025-03-30 07:49:05 [DEBUG] clck_gen.py:128 IND CLOCK 9078
2025-03-30 07:49:05 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:49:05 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:49:05 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:49:05 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:49:05 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:49:05 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 07:49:05 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 07:49:05 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 07:49:10 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 07:49:10 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 07:49:10 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:49:10 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:49:10 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:49:10 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:49:10 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:49:10 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 07:49:10 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:49:10 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 07:49:10 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 07:49:10 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 07:49:10 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 07:49:10 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 07:49:10 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:49:10 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:49:10 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 07:49:10 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 07:49:10 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 07:49:10 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 07:49:10 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 07:49:10 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 07:49:10 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:49:10 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:49:10 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 07:49:10 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 07:49:10 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 07:49:10 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 07:49:10 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 07:49:10 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 07:49:10 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:49:10 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:49:10 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 07:49:10 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 07:49:10 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 07:49:10 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 07:49:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 07:49:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 07:49:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 07:49:10 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 07:49:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 07:49:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 07:49:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 07:49:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:49:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 07:49:10 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 07:49:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:49:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:49:10 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 07:49:10 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 07:49:10 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 07:49:10 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 07:49:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:49:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:49:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:49:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 07:49:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:49:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:49:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:49:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:49:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:49:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:49:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:49:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:49:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:49:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:49:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:49:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:49:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:49:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:49:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:49:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:49:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:49:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:49:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:49:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:49:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:49:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:49:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:49:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:49:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:49:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:49:10 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-03-30 07:49:11 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-03-30 07:49:11 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-03-30 07:49:11 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-03-30 07:49:11 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-03-30 07:49:11 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-03-30 07:49:11 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-03-30 07:49:11 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-03-30 07:49:11 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-03-30 07:49:11 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-03-30 07:49:11 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=0 bl=148 pwr=0
2025-03-30 07:49:11 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=1 bl=148 pwr=0
2025-03-30 07:49:11 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=2 bl=148 pwr=0
2025-03-30 07:49:11 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=3 bl=148 pwr=0
2025-03-30 07:49:11 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=4 bl=148 pwr=0
2025-03-30 07:49:11 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=5 bl=148 pwr=0
2025-03-30 07:49:11 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=6 bl=148 pwr=0
2025-03-30 07:49:11 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=7 bl=148 pwr=0
2025-03-30 07:49:11 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 07:49:11 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 07:49:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:49:11 [DEBUG] fake_trx.py:317 (BTS@172.18.26.20:5700) Recv FAKE_CI cmd
2025-03-30 07:49:11 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:49:11 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:49:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:49:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:49:11 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:49:11 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:49:11 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 07:49:11 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 07:49:11 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 07:49:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:49:11 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:49:11 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:49:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:49:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:49:11 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-03-30 07:49:11 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:49:11 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:49:11 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:49:11 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:49:12 [DEBUG] clck_gen.py:128 IND CLOCK 306
2025-03-30 07:49:12 [DEBUG] clck_gen.py:128 IND CLOCK 408
2025-03-30 07:49:12 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:49:12 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:49:12 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:49:12 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:49:13 [DEBUG] clck_gen.py:128 IND CLOCK 510
2025-03-30 07:49:13 [DEBUG] clck_gen.py:128 IND CLOCK 612
2025-03-30 07:49:13 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:49:13 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:49:13 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:49:13 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:49:14 [DEBUG] clck_gen.py:128 IND CLOCK 714
2025-03-30 07:49:14 [DEBUG] clck_gen.py:128 IND CLOCK 816
2025-03-30 07:49:14 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:49:14 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:49:14 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:49:14 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:49:15 [DEBUG] clck_gen.py:128 IND CLOCK 918
2025-03-30 07:49:15 [DEBUG] clck_gen.py:128 IND CLOCK 1020
2025-03-30 07:49:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:49:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:49:15 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:49:15 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:49:15 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:49:15 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:49:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:49:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:49:15 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:49:15 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:49:15 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 07:49:15 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 07:49:15 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 07:49:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:49:15 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.26.22:6700) Recv SETFH cmd
2025-03-30 07:49:15 [INFO] transceiver.py:237 (MS@172.18.26.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2025-03-30 07:49:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:49:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:49:15 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:49:15 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:49:15 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:49:15 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:49:16 [DEBUG] clck_gen.py:128 IND CLOCK 1122
2025-03-30 07:49:16 [DEBUG] clck_gen.py:128 IND CLOCK 1224
2025-03-30 07:49:16 [DEBUG] clck_gen.py:128 IND CLOCK 1326
2025-03-30 07:49:17 [DEBUG] clck_gen.py:128 IND CLOCK 1428
2025-03-30 07:49:17 [DEBUG] clck_gen.py:128 IND CLOCK 1530
2025-03-30 07:49:18 [DEBUG] clck_gen.py:128 IND CLOCK 1632
2025-03-30 07:49:18 [DEBUG] clck_gen.py:128 IND CLOCK 1734
2025-03-30 07:49:19 [DEBUG] clck_gen.py:128 IND CLOCK 1836
2025-03-30 07:49:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:49:19 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:49:19 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:49:19 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:49:19 [INFO] transceiver.py:241 (MS@172.18.26.22:6700) Frequency hopping disabled
2025-03-30 07:49:19 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:49:19 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:49:19 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:49:19 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:49:19 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:49:19 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:49:19 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 07:49:19 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 07:49:19 [DEBUG] clck_gen.py:128 IND CLOCK 1938
2025-03-30 07:49:19 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 07:49:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:49:19 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:49:19 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:49:19 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:49:19 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:49:20 [DEBUG] clck_gen.py:128 IND CLOCK 2040
2025-03-30 07:49:20 [DEBUG] clck_gen.py:128 IND CLOCK 2142
2025-03-30 07:49:21 [DEBUG] clck_gen.py:128 IND CLOCK 2244
2025-03-30 07:49:21 [DEBUG] clck_gen.py:128 IND CLOCK 2346
2025-03-30 07:49:22 [DEBUG] clck_gen.py:128 IND CLOCK 2448
2025-03-30 07:49:22 [DEBUG] clck_gen.py:128 IND CLOCK 2550
2025-03-30 07:49:23 [DEBUG] clck_gen.py:128 IND CLOCK 2652
2025-03-30 07:49:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:49:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:49:23 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:49:23 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:49:23 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:49:23 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:49:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:49:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:49:23 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:49:23 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:49:23 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 07:49:23 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 07:49:23 [DEBUG] clck_gen.py:128 IND CLOCK 2754
2025-03-30 07:49:23 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 07:49:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:49:23 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.26.22:6700) Recv SETFH cmd
2025-03-30 07:49:23 [INFO] transceiver.py:237 (MS@172.18.26.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2025-03-30 07:49:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:49:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:49:24 [DEBUG] clck_gen.py:128 IND CLOCK 2856
2025-03-30 07:49:24 [DEBUG] clck_gen.py:128 IND CLOCK 2958
2025-03-30 07:49:24 [DEBUG] clck_gen.py:128 IND CLOCK 3060
2025-03-30 07:49:25 [DEBUG] clck_gen.py:128 IND CLOCK 3162
2025-03-30 07:49:25 [DEBUG] clck_gen.py:128 IND CLOCK 3264
2025-03-30 07:49:26 [DEBUG] clck_gen.py:128 IND CLOCK 3366
2025-03-30 07:49:26 [DEBUG] clck_gen.py:128 IND CLOCK 3468
2025-03-30 07:49:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:49:27 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:49:27 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:49:27 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:49:27 [INFO] transceiver.py:241 (MS@172.18.26.22:6700) Frequency hopping disabled
2025-03-30 07:49:27 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:49:27 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:49:27 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:49:27 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:49:27 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:49:27 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:49:27 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:49:27 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:49:27 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 07:49:27 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 07:49:27 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 07:49:32 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 07:49:32 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 07:49:32 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:49:32 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:49:32 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:49:32 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:49:32 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:49:32 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 07:49:32 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:49:32 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 07:49:32 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 07:49:32 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 07:49:32 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 07:49:32 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 07:49:32 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:49:32 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:49:32 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 07:49:32 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 07:49:32 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 07:49:32 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 07:49:32 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 07:49:32 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 07:49:32 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:49:32 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:49:32 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 07:49:32 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 07:49:32 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 07:49:32 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 07:49:32 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 07:49:32 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 07:49:32 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:49:32 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:49:32 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 07:49:32 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 07:49:32 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 07:49:32 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 07:49:32 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 07:49:32 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 07:49:32 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 07:49:32 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 07:49:32 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 07:49:32 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 07:49:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 07:49:32 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:49:32 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 07:49:32 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 07:49:32 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:49:32 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:49:32 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 07:49:32 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 07:49:32 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 07:49:32 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 07:49:32 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:49:32 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:49:32 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:49:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 07:49:32 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:49:32 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:49:32 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:49:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:49:32 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:49:32 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:49:32 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:49:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:49:32 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:49:32 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:49:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:49:32 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:49:32 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:49:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:49:32 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:49:32 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:49:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:49:32 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:49:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:49:32 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:49:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:49:32 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:49:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:49:32 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:49:32 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:49:32 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:49:32 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-03-30 07:49:32 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-03-30 07:49:32 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-03-30 07:49:32 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-03-30 07:49:32 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-03-30 07:49:32 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-03-30 07:49:32 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-03-30 07:49:32 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-03-30 07:49:32 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-03-30 07:49:32 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-03-30 07:49:32 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=0 bl=148 pwr=0
2025-03-30 07:49:32 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=1 bl=148 pwr=0
2025-03-30 07:49:32 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=2 bl=148 pwr=0
2025-03-30 07:49:32 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=3 bl=148 pwr=0
2025-03-30 07:49:32 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=4 bl=148 pwr=0
2025-03-30 07:49:32 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=5 bl=148 pwr=0
2025-03-30 07:49:32 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=6 bl=148 pwr=0
2025-03-30 07:49:32 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=7 bl=148 pwr=0
2025-03-30 07:49:32 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 07:49:32 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 07:49:32 [DEBUG] fake_trx.py:317 (BTS@172.18.26.20:5700) Recv FAKE_CI cmd
2025-03-30 07:49:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:49:32 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:49:32 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:49:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:49:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:49:32 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:49:32 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:49:32 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 07:49:32 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 07:49:32 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 07:49:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:49:32 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:49:32 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:49:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:49:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:49:33 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-03-30 07:49:33 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:49:33 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:49:33 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:49:33 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:49:33 [DEBUG] clck_gen.py:128 IND CLOCK 306
2025-03-30 07:49:33 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 07:49:34 [DEBUG] clck_gen.py:128 IND CLOCK 408
2025-03-30 07:49:34 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 07:49:34 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:49:34 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:49:34 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:49:34 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:49:34 [DEBUG] clck_gen.py:128 IND CLOCK 510
2025-03-30 07:49:34 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 07:49:35 [DEBUG] clck_gen.py:128 IND CLOCK 612
2025-03-30 07:49:35 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 07:49:35 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:49:35 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:49:35 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:49:35 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:49:35 [DEBUG] clck_gen.py:128 IND CLOCK 714
2025-03-30 07:49:35 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 07:49:36 [DEBUG] clck_gen.py:128 IND CLOCK 816
2025-03-30 07:49:36 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 07:49:36 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:49:36 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:49:36 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:49:36 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:49:36 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=872): ver=1 fn=870 tn=0 bl=148 pwr=0
2025-03-30 07:49:36 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=872): ver=1 fn=870 tn=1 bl=148 pwr=0
2025-03-30 07:49:36 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=872): ver=1 fn=870 tn=2 bl=148 pwr=0
2025-03-30 07:49:36 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=872): ver=1 fn=870 tn=3 bl=148 pwr=0
2025-03-30 07:49:36 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=872): ver=1 fn=870 tn=4 bl=148 pwr=0
2025-03-30 07:49:36 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=872): ver=1 fn=870 tn=5 bl=148 pwr=0
2025-03-30 07:49:36 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=872): ver=1 fn=870 tn=6 bl=148 pwr=0
2025-03-30 07:49:36 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=872): ver=1 fn=870 tn=7 bl=148 pwr=0
2025-03-30 07:49:36 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=872): ver=1 fn=871 tn=0 bl=148 pwr=0
2025-03-30 07:49:36 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=872): ver=1 fn=871 tn=1 bl=148 pwr=0
2025-03-30 07:49:36 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=872): ver=1 fn=871 tn=2 bl=148 pwr=0
2025-03-30 07:49:36 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=872): ver=1 fn=871 tn=3 bl=148 pwr=0
2025-03-30 07:49:36 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=872): ver=1 fn=871 tn=4 bl=148 pwr=0
2025-03-30 07:49:36 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=872): ver=1 fn=871 tn=5 bl=148 pwr=0
2025-03-30 07:49:36 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=872): ver=1 fn=871 tn=6 bl=148 pwr=0
2025-03-30 07:49:36 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=872): ver=1 fn=871 tn=7 bl=148 pwr=0
2025-03-30 07:49:36 [DEBUG] clck_gen.py:128 IND CLOCK 918
2025-03-30 07:49:36 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 07:49:36 [DEBUG] clck_gen.py:128 IND CLOCK 1020
2025-03-30 07:49:37 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 07:49:37 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:49:37 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:49:37 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:49:37 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:49:37 [DEBUG] clck_gen.py:128 IND CLOCK 1122
2025-03-30 07:49:37 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 07:49:37 [DEBUG] clck_gen.py:128 IND CLOCK 1224
2025-03-30 07:49:38 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 07:49:38 [DEBUG] clck_gen.py:128 IND CLOCK 1326
2025-03-30 07:49:38 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 07:49:38 [DEBUG] clck_gen.py:128 IND CLOCK 1428
2025-03-30 07:49:39 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 07:49:39 [DEBUG] clck_gen.py:128 IND CLOCK 1530
2025-03-30 07:49:39 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 07:49:39 [DEBUG] clck_gen.py:128 IND CLOCK 1632
2025-03-30 07:49:39 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 07:49:40 [DEBUG] clck_gen.py:128 IND CLOCK 1734
2025-03-30 07:49:40 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 07:49:40 [DEBUG] clck_gen.py:128 IND CLOCK 1836
2025-03-30 07:49:40 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 07:49:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:49:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:49:40 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:49:40 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:49:40 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:49:40 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:49:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:49:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:49:40 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:49:40 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:49:40 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 07:49:40 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 07:49:41 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 07:49:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:49:41 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.26.22:6700) Recv SETFH cmd
2025-03-30 07:49:41 [INFO] transceiver.py:237 (MS@172.18.26.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2025-03-30 07:49:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:49:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:49:41 [DEBUG] clck_gen.py:128 IND CLOCK 1938
2025-03-30 07:49:41 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 07:49:41 [DEBUG] clck_gen.py:128 IND CLOCK 2040
2025-03-30 07:49:42 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 07:49:42 [DEBUG] clck_gen.py:128 IND CLOCK 2142
2025-03-30 07:49:42 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 07:49:42 [DEBUG] clck_gen.py:128 IND CLOCK 2244
2025-03-30 07:49:43 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 07:49:43 [DEBUG] clck_gen.py:128 IND CLOCK 2346
2025-03-30 07:49:43 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 07:49:43 [DEBUG] clck_gen.py:128 IND CLOCK 2448
2025-03-30 07:49:44 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 07:49:44 [DEBUG] clck_gen.py:128 IND CLOCK 2550
2025-03-30 07:49:44 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 07:49:44 [DEBUG] clck_gen.py:128 IND CLOCK 2652
2025-03-30 07:49:45 [DEBUG] clck_gen.py:128 IND CLOCK 2754
2025-03-30 07:49:45 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 07:49:45 [DEBUG] clck_gen.py:128 IND CLOCK 2856
2025-03-30 07:49:45 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 07:49:45 [DEBUG] clck_gen.py:128 IND CLOCK 2958
2025-03-30 07:49:45 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 07:49:46 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=3040): ver=1 fn=3039 tn=0 bl=148 pwr=0
2025-03-30 07:49:46 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=3040): ver=1 fn=3039 tn=1 bl=148 pwr=0
2025-03-30 07:49:46 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=3040): ver=1 fn=3039 tn=2 bl=148 pwr=0
2025-03-30 07:49:46 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=3040): ver=1 fn=3039 tn=3 bl=148 pwr=0
2025-03-30 07:49:46 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=3040): ver=1 fn=3039 tn=4 bl=148 pwr=0
2025-03-30 07:49:46 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=3040): ver=1 fn=3039 tn=5 bl=148 pwr=0
2025-03-30 07:49:46 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=3040): ver=1 fn=3039 tn=6 bl=148 pwr=0
2025-03-30 07:49:46 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=3040): ver=1 fn=3039 tn=7 bl=148 pwr=0
2025-03-30 07:49:46 [DEBUG] clck_gen.py:128 IND CLOCK 3060
2025-03-30 07:49:46 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 07:49:46 [DEBUG] clck_gen.py:128 IND CLOCK 3162
2025-03-30 07:49:46 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 07:49:47 [DEBUG] clck_gen.py:128 IND CLOCK 3264
2025-03-30 07:49:47 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 07:49:47 [DEBUG] clck_gen.py:128 IND CLOCK 3366
2025-03-30 07:49:47 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 07:49:48 [DEBUG] clck_gen.py:128 IND CLOCK 3468
2025-03-30 07:49:48 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 07:49:48 [DEBUG] clck_gen.py:128 IND CLOCK 3570
2025-03-30 07:49:48 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 07:49:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:49:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:49:48 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:49:48 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:49:48 [INFO] transceiver.py:241 (MS@172.18.26.22:6700) Frequency hopping disabled
2025-03-30 07:49:48 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:49:48 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:49:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:49:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:49:48 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:49:48 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:49:48 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 07:49:48 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 07:49:48 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 07:49:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:49:48 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:49:48 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:49:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:49:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:49:49 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 07:49:49 [DEBUG] clck_gen.py:128 IND CLOCK 3672
2025-03-30 07:49:49 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 07:49:49 [DEBUG] clck_gen.py:128 IND CLOCK 3774
2025-03-30 07:49:50 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 07:49:50 [DEBUG] clck_gen.py:128 IND CLOCK 3876
2025-03-30 07:49:50 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 07:49:50 [DEBUG] clck_gen.py:128 IND CLOCK 3978
2025-03-30 07:49:51 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 07:49:51 [DEBUG] clck_gen.py:128 IND CLOCK 4080
2025-03-30 07:49:51 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 07:49:51 [DEBUG] clck_gen.py:128 IND CLOCK 4182
2025-03-30 07:49:52 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 07:49:52 [DEBUG] clck_gen.py:128 IND CLOCK 4284
2025-03-30 07:49:52 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 07:49:52 [DEBUG] clck_gen.py:128 IND CLOCK 4386
2025-03-30 07:49:52 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 07:49:53 [DEBUG] clck_gen.py:128 IND CLOCK 4488
2025-03-30 07:49:53 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 07:49:53 [DEBUG] clck_gen.py:128 IND CLOCK 4590
2025-03-30 07:49:53 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 07:49:53 [DEBUG] clck_gen.py:128 IND CLOCK 4692
2025-03-30 07:49:54 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 07:49:54 [DEBUG] clck_gen.py:128 IND CLOCK 4794
2025-03-30 07:49:54 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 07:49:54 [DEBUG] clck_gen.py:128 IND CLOCK 4896
2025-03-30 07:49:55 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 07:49:55 [DEBUG] clck_gen.py:128 IND CLOCK 4998
2025-03-30 07:49:55 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 07:49:55 [DEBUG] clck_gen.py:128 IND CLOCK 5100
2025-03-30 07:49:56 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 07:49:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:49:56 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:49:56 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:49:56 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:49:56 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:49:56 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:49:56 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:49:56 [DEBUG] clck_gen.py:128 IND CLOCK 5202
2025-03-30 07:49:56 [WARNING] clck_gen.py:108 CLCKGen: time overrun by -5904us; resetting the clock
2025-03-30 07:49:56 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:49:56 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:49:56 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:49:56 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 07:49:56 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 07:49:56 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 07:49:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:49:56 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.26.22:6700) Recv SETFH cmd
2025-03-30 07:49:56 [INFO] transceiver.py:237 (MS@172.18.26.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2025-03-30 07:49:56 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:49:56 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:49:56 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 07:49:56 [DEBUG] clck_gen.py:128 IND CLOCK 5304
2025-03-30 07:49:57 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 07:49:57 [DEBUG] clck_gen.py:128 IND CLOCK 5406
2025-03-30 07:49:57 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 07:49:57 [DEBUG] clck_gen.py:128 IND CLOCK 5508
2025-03-30 07:49:58 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 07:49:58 [DEBUG] clck_gen.py:128 IND CLOCK 5610
2025-03-30 07:49:58 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 07:49:58 [DEBUG] clck_gen.py:128 IND CLOCK 5712
2025-03-30 07:49:59 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 07:49:59 [DEBUG] clck_gen.py:128 IND CLOCK 5814
2025-03-30 07:49:59 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 07:49:59 [DEBUG] clck_gen.py:128 IND CLOCK 5916
2025-03-30 07:49:59 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 07:50:00 [DEBUG] clck_gen.py:128 IND CLOCK 6018
2025-03-30 07:50:00 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 07:50:00 [DEBUG] clck_gen.py:128 IND CLOCK 6120
2025-03-30 07:50:00 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 07:50:01 [DEBUG] clck_gen.py:128 IND CLOCK 6222
2025-03-30 07:50:01 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 07:50:01 [DEBUG] clck_gen.py:128 IND CLOCK 6324
2025-03-30 07:50:01 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 07:50:01 [DEBUG] clck_gen.py:128 IND CLOCK 6426
2025-03-30 07:50:02 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 07:50:02 [DEBUG] clck_gen.py:128 IND CLOCK 6528
2025-03-30 07:50:02 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 07:50:02 [DEBUG] clck_gen.py:128 IND CLOCK 6630
2025-03-30 07:50:03 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 07:50:03 [DEBUG] clck_gen.py:128 IND CLOCK 6732
2025-03-30 07:50:03 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 07:50:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:50:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:50:03 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:50:03 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:50:03 [INFO] transceiver.py:241 (MS@172.18.26.22:6700) Frequency hopping disabled
2025-03-30 07:50:03 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:50:03 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:50:03 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:50:03 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:50:03 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:50:03 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:50:03 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:50:03 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:50:03 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 07:50:03 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 07:50:03 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 07:50:08 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 07:50:08 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 07:50:08 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:50:08 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:50:08 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:50:08 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:50:08 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:50:08 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 07:50:08 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:50:08 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 07:50:08 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 07:50:08 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 07:50:08 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 07:50:08 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 07:50:08 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:50:08 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:50:08 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 07:50:08 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 07:50:08 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 07:50:08 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 07:50:08 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 07:50:08 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 07:50:08 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:50:08 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:50:08 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 07:50:08 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 07:50:08 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 07:50:08 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 07:50:08 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 07:50:08 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 07:50:08 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:50:08 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:50:08 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 07:50:08 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 07:50:08 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 07:50:08 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 07:50:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 07:50:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 07:50:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 07:50:08 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 07:50:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 07:50:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 07:50:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 07:50:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:50:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 07:50:08 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 07:50:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:50:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:50:08 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 07:50:08 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 07:50:08 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 07:50:08 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 07:50:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:50:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:50:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:50:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 07:50:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:50:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:50:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:50:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:50:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:50:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:50:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:50:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:50:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:50:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:50:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:50:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:50:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:50:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:50:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:50:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:50:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:50:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:50:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:50:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:50:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:50:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:50:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:50:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:50:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:50:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:50:08 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-03-30 07:50:09 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-03-30 07:50:09 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-03-30 07:50:09 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-03-30 07:50:09 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-03-30 07:50:09 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-03-30 07:50:09 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-03-30 07:50:09 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-03-30 07:50:09 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-03-30 07:50:09 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-03-30 07:50:09 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=0 bl=148 pwr=0
2025-03-30 07:50:09 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=1 bl=148 pwr=0
2025-03-30 07:50:09 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=2 bl=148 pwr=0
2025-03-30 07:50:09 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=3 bl=148 pwr=0
2025-03-30 07:50:09 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=4 bl=148 pwr=0
2025-03-30 07:50:09 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=5 bl=148 pwr=0
2025-03-30 07:50:09 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=6 bl=148 pwr=0
2025-03-30 07:50:09 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=7 bl=148 pwr=0
2025-03-30 07:50:09 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 07:50:09 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 07:50:09 [DEBUG] fake_trx.py:317 (BTS@172.18.26.20:5700) Recv FAKE_CI cmd
2025-03-30 07:50:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:50:09 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:50:09 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:50:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:50:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:50:09 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:50:09 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:50:09 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 07:50:09 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 07:50:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:50:09 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:50:09 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:50:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:50:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:50:09 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-03-30 07:50:09 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:50:09 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:50:09 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:50:09 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:50:10 [DEBUG] clck_gen.py:128 IND CLOCK 306
2025-03-30 07:50:10 [DEBUG] clck_gen.py:128 IND CLOCK 408
2025-03-30 07:50:10 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:50:10 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:50:10 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:50:10 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:50:11 [DEBUG] clck_gen.py:128 IND CLOCK 510
2025-03-30 07:50:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:50:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:50:11 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:50:11 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:50:11 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:50:11 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:50:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:50:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:50:11 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:50:11 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:50:11 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 07:50:11 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 07:50:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:50:11 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:50:11 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:50:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:50:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:50:11 [DEBUG] clck_gen.py:128 IND CLOCK 612
2025-03-30 07:50:11 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:50:11 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:50:11 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:50:11 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:50:12 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=710): ver=1 fn=708 tn=0 bl=148 pwr=0
2025-03-30 07:50:12 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=711): ver=1 fn=708 tn=1 bl=148 pwr=0
2025-03-30 07:50:12 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=711): ver=1 fn=708 tn=2 bl=148 pwr=0
2025-03-30 07:50:12 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=711): ver=1 fn=708 tn=3 bl=148 pwr=0
2025-03-30 07:50:12 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=711): ver=1 fn=708 tn=4 bl=148 pwr=0
2025-03-30 07:50:12 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=711): ver=1 fn=708 tn=5 bl=148 pwr=0
2025-03-30 07:50:12 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=711): ver=1 fn=708 tn=6 bl=148 pwr=0
2025-03-30 07:50:12 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=711): ver=1 fn=708 tn=7 bl=148 pwr=0
2025-03-30 07:50:12 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=711): ver=1 fn=709 tn=0 bl=148 pwr=0
2025-03-30 07:50:12 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=711): ver=1 fn=709 tn=1 bl=148 pwr=0
2025-03-30 07:50:12 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=711): ver=1 fn=709 tn=2 bl=148 pwr=0
2025-03-30 07:50:12 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=711): ver=1 fn=709 tn=3 bl=148 pwr=0
2025-03-30 07:50:12 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=711): ver=1 fn=709 tn=4 bl=148 pwr=0
2025-03-30 07:50:12 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=711): ver=1 fn=709 tn=5 bl=148 pwr=0
2025-03-30 07:50:12 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=711): ver=1 fn=709 tn=6 bl=148 pwr=0
2025-03-30 07:50:12 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=711): ver=1 fn=709 tn=7 bl=148 pwr=0
2025-03-30 07:50:12 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=711): ver=1 fn=710 tn=0 bl=148 pwr=0
2025-03-30 07:50:12 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=711): ver=1 fn=710 tn=1 bl=148 pwr=0
2025-03-30 07:50:12 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=711): ver=1 fn=710 tn=2 bl=148 pwr=0
2025-03-30 07:50:12 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=711): ver=1 fn=710 tn=3 bl=148 pwr=0
2025-03-30 07:50:12 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=711): ver=1 fn=710 tn=4 bl=148 pwr=0
2025-03-30 07:50:12 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=711): ver=1 fn=710 tn=5 bl=148 pwr=0
2025-03-30 07:50:12 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=711): ver=1 fn=710 tn=6 bl=148 pwr=0
2025-03-30 07:50:12 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=711): ver=1 fn=710 tn=7 bl=148 pwr=0
2025-03-30 07:50:12 [DEBUG] clck_gen.py:128 IND CLOCK 714
2025-03-30 07:50:12 [DEBUG] clck_gen.py:128 IND CLOCK 816
2025-03-30 07:50:12 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:50:12 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:50:12 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:50:12 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:50:13 [DEBUG] clck_gen.py:128 IND CLOCK 918
2025-03-30 07:50:13 [DEBUG] clck_gen.py:128 IND CLOCK 1020
2025-03-30 07:50:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:50:13 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:50:13 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:50:13 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:50:13 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:50:13 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:50:13 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:50:13 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:50:13 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:50:13 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:50:13 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 07:50:13 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 07:50:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:50:13 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:50:13 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:50:13 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:50:13 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:50:13 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:50:13 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:50:13 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:50:13 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:50:14 [DEBUG] clck_gen.py:128 IND CLOCK 1122
2025-03-30 07:50:14 [DEBUG] clck_gen.py:128 IND CLOCK 1224
2025-03-30 07:50:14 [DEBUG] clck_gen.py:128 IND CLOCK 1326
2025-03-30 07:50:15 [DEBUG] clck_gen.py:128 IND CLOCK 1428
2025-03-30 07:50:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:50:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:50:15 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:50:15 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:50:15 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:50:15 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:50:15 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:50:15 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:50:15 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:50:15 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:50:15 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 07:50:15 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 07:50:15 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 07:50:15 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:50:15 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:50:15 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=1522 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:50:15 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=1522 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:50:15 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=1522 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:50:15 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=1522 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:50:15 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=1522 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:50:15 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=1522 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:50:15 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=1522 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:50:15 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=1523 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:50:15 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=1523 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:50:15 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=1523 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:50:15 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=1523 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:50:15 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=1523 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:50:15 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=1523 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:50:15 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=1523 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:50:15 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=1523 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:50:20 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 07:50:20 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 07:50:20 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:50:20 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:50:20 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:50:20 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:50:20 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:50:20 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 07:50:20 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:50:20 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 07:50:20 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 07:50:20 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 07:50:20 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 07:50:20 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 07:50:20 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:50:20 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:50:20 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 07:50:20 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 07:50:20 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 07:50:20 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 07:50:20 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 07:50:20 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 07:50:20 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:50:20 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:50:20 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 07:50:20 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 07:50:20 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 07:50:20 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 07:50:20 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 07:50:20 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 07:50:20 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:50:20 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:50:20 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 07:50:20 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 07:50:20 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 07:50:20 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 07:50:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 07:50:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 07:50:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 07:50:20 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 07:50:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 07:50:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 07:50:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 07:50:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:50:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 07:50:20 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 07:50:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:50:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:50:20 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 07:50:20 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 07:50:20 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 07:50:20 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 07:50:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:50:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:50:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:50:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 07:50:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:50:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:50:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:50:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:50:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:50:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:50:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:50:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:50:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:50:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:50:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:50:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:50:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:50:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:50:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:50:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:50:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:50:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:50:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:50:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:50:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:50:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:50:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:50:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:50:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:50:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:50:20 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-03-30 07:50:21 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-03-30 07:50:21 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-03-30 07:50:21 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-03-30 07:50:21 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-03-30 07:50:21 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-03-30 07:50:21 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-03-30 07:50:21 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-03-30 07:50:21 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-03-30 07:50:21 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-03-30 07:50:21 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=0 bl=148 pwr=0
2025-03-30 07:50:21 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=1 bl=148 pwr=0
2025-03-30 07:50:21 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=2 bl=148 pwr=0
2025-03-30 07:50:21 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=3 bl=148 pwr=0
2025-03-30 07:50:21 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=4 bl=148 pwr=0
2025-03-30 07:50:21 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=5 bl=148 pwr=0
2025-03-30 07:50:21 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=6 bl=148 pwr=0
2025-03-30 07:50:21 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=7 bl=148 pwr=0
2025-03-30 07:50:21 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 07:50:21 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 07:50:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:50:21 [DEBUG] fake_trx.py:317 (BTS@172.18.26.20:5700) Recv FAKE_CI cmd
2025-03-30 07:50:21 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:50:21 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:50:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:50:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:50:21 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:50:21 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:50:21 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 07:50:21 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 07:50:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:50:21 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.26.22:6700) Recv SETFH cmd
2025-03-30 07:50:21 [INFO] transceiver.py:237 (MS@172.18.26.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2025-03-30 07:50:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:50:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:50:21 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-03-30 07:50:21 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:50:21 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:50:21 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:50:21 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:50:22 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=271): ver=1 fn=269 tn=0 bl=148 pwr=0
2025-03-30 07:50:22 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=271): ver=1 fn=269 tn=1 bl=148 pwr=0
2025-03-30 07:50:22 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=271): ver=1 fn=269 tn=2 bl=148 pwr=0
2025-03-30 07:50:22 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=271): ver=1 fn=269 tn=3 bl=148 pwr=0
2025-03-30 07:50:22 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=271): ver=1 fn=269 tn=4 bl=148 pwr=0
2025-03-30 07:50:22 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=271): ver=1 fn=269 tn=5 bl=148 pwr=0
2025-03-30 07:50:22 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=271): ver=1 fn=269 tn=6 bl=148 pwr=0
2025-03-30 07:50:22 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=271): ver=1 fn=269 tn=7 bl=148 pwr=0
2025-03-30 07:50:22 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=271): ver=1 fn=270 tn=0 bl=148 pwr=0
2025-03-30 07:50:22 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=271): ver=1 fn=270 tn=1 bl=148 pwr=0
2025-03-30 07:50:22 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=271): ver=1 fn=270 tn=2 bl=148 pwr=0
2025-03-30 07:50:22 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=271): ver=1 fn=270 tn=3 bl=148 pwr=0
2025-03-30 07:50:22 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=271): ver=1 fn=270 tn=4 bl=148 pwr=0
2025-03-30 07:50:22 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=271): ver=1 fn=270 tn=5 bl=148 pwr=0
2025-03-30 07:50:22 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=271): ver=1 fn=270 tn=6 bl=148 pwr=0
2025-03-30 07:50:22 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=271): ver=1 fn=270 tn=7 bl=148 pwr=0
2025-03-30 07:50:22 [WARNING] transceiver.py:330 (TRX2@172.18.26.20:5700/2) Stale TRXD message (fn=271): ver=1 fn=270 tn=5 bl=148 pwr=0
2025-03-30 07:50:22 [DEBUG] clck_gen.py:128 IND CLOCK 306
2025-03-30 07:50:22 [DEBUG] clck_gen.py:128 IND CLOCK 408
2025-03-30 07:50:22 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:50:22 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:50:22 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:50:22 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:50:23 [DEBUG] clck_gen.py:128 IND CLOCK 510
2025-03-30 07:50:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:50:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:50:23 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:50:23 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:50:23 [INFO] transceiver.py:241 (MS@172.18.26.22:6700) Frequency hopping disabled
2025-03-30 07:50:23 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:50:23 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:50:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:50:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:50:23 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:50:23 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:50:23 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 07:50:23 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 07:50:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:50:23 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.26.22:6700) Recv SETFH cmd
2025-03-30 07:50:23 [INFO] transceiver.py:237 (MS@172.18.26.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2025-03-30 07:50:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:50:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:50:23 [DEBUG] clck_gen.py:128 IND CLOCK 612
2025-03-30 07:50:23 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:50:23 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:50:23 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:50:23 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:50:24 [DEBUG] clck_gen.py:128 IND CLOCK 714
2025-03-30 07:50:24 [DEBUG] clck_gen.py:128 IND CLOCK 816
2025-03-30 07:50:24 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:50:24 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:50:24 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:50:24 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:50:25 [DEBUG] clck_gen.py:128 IND CLOCK 918
2025-03-30 07:50:25 [DEBUG] clck_gen.py:128 IND CLOCK 1020
2025-03-30 07:50:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:50:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:50:25 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:50:25 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:50:25 [INFO] transceiver.py:241 (MS@172.18.26.22:6700) Frequency hopping disabled
2025-03-30 07:50:25 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:50:25 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:50:25 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:50:25 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:50:25 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:50:25 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:50:25 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:50:25 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:50:25 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 07:50:25 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 07:50:25 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 07:50:25 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=1056 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:50:25 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=1056 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:50:25 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=1056 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:50:25 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=1056 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:50:25 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=1056 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:50:25 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=1056 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:50:25 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=1057 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:50:25 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=1057 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:50:25 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=1057 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:50:25 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=1057 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:50:25 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=1057 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:50:25 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=1057 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:50:25 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=1057 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:50:25 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=1057 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:50:25 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=1058 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:50:25 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=1058 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:50:25 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=1058 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:50:25 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=1058 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:50:25 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=1058 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:50:25 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=1058 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:50:25 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=1058 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:50:25 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=1058 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:50:30 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 07:50:30 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 07:50:30 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:50:30 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:50:30 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:50:30 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:50:30 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:50:30 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 07:50:30 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:50:30 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 07:50:30 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 07:50:30 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 07:50:30 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 07:50:30 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 07:50:30 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:50:30 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:50:30 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 07:50:30 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 07:50:30 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 07:50:30 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 07:50:30 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 07:50:30 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 07:50:30 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:50:30 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:50:30 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 07:50:30 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 07:50:30 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 07:50:30 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 07:50:30 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 07:50:30 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 07:50:30 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:50:30 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:50:30 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 07:50:30 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 07:50:30 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 07:50:30 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 07:50:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 07:50:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 07:50:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 07:50:30 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 07:50:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 07:50:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 07:50:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 07:50:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 07:50:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:50:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:50:30 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 07:50:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:50:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:50:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:50:30 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 07:50:30 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 07:50:30 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 07:50:30 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 07:50:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:50:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:50:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:50:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 07:50:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:50:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:50:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:50:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:50:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:50:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:50:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:50:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:50:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:50:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:50:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:50:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:50:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:50:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:50:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:50:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:50:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:50:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:50:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:50:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:50:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:50:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:50:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:50:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:50:30 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-03-30 07:50:31 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-03-30 07:50:31 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-03-30 07:50:31 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-03-30 07:50:31 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-03-30 07:50:31 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-03-30 07:50:31 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-03-30 07:50:31 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-03-30 07:50:31 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-03-30 07:50:31 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-03-30 07:50:31 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=0 bl=148 pwr=0
2025-03-30 07:50:31 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=1 bl=148 pwr=0
2025-03-30 07:50:31 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=2 bl=148 pwr=0
2025-03-30 07:50:31 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=3 bl=148 pwr=0
2025-03-30 07:50:31 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=4 bl=148 pwr=0
2025-03-30 07:50:31 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=5 bl=148 pwr=0
2025-03-30 07:50:31 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=6 bl=148 pwr=0
2025-03-30 07:50:31 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=7 bl=148 pwr=0
2025-03-30 07:50:31 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 07:50:31 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 07:50:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:50:31 [DEBUG] fake_trx.py:317 (BTS@172.18.26.20:5700) Recv FAKE_CI cmd
2025-03-30 07:50:31 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:50:31 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:50:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:50:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:50:31 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:50:31 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:50:31 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 07:50:31 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 07:50:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:50:31 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:50:31 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:50:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:50:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:50:31 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-03-30 07:50:31 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:50:31 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:50:31 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:50:31 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:50:32 [DEBUG] clck_gen.py:128 IND CLOCK 306
2025-03-30 07:50:32 [DEBUG] clck_gen.py:128 IND CLOCK 408
2025-03-30 07:50:32 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:50:32 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:50:32 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:50:32 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:50:33 [DEBUG] clck_gen.py:128 IND CLOCK 510
2025-03-30 07:50:33 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:50:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:50:33 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:50:33 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:50:33 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:50:33 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:50:33 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:50:33 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:50:33 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:50:33 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:50:33 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 07:50:33 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 07:50:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:50:33 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:50:33 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:50:33 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:50:33 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:50:33 [DEBUG] clck_gen.py:128 IND CLOCK 612
2025-03-30 07:50:33 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:50:33 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:50:33 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:50:33 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:50:34 [DEBUG] clck_gen.py:128 IND CLOCK 714
2025-03-30 07:50:34 [DEBUG] clck_gen.py:128 IND CLOCK 816
2025-03-30 07:50:34 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:50:34 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:50:34 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:50:34 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:50:35 [DEBUG] clck_gen.py:128 IND CLOCK 918
2025-03-30 07:50:35 [DEBUG] clck_gen.py:128 IND CLOCK 1020
2025-03-30 07:50:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:50:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:50:35 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:50:35 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:50:35 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:50:35 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:50:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:50:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:50:35 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:50:35 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:50:35 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 07:50:35 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 07:50:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:50:35 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:50:35 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:50:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:50:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:50:35 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:50:35 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:50:35 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:50:35 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:50:35 [DEBUG] clck_gen.py:128 IND CLOCK 1122
2025-03-30 07:50:36 [DEBUG] clck_gen.py:128 IND CLOCK 1224
2025-03-30 07:50:36 [DEBUG] clck_gen.py:128 IND CLOCK 1326
2025-03-30 07:50:37 [DEBUG] clck_gen.py:128 IND CLOCK 1428
2025-03-30 07:50:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:50:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:50:37 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:50:37 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:50:37 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:50:37 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:50:37 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:50:37 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:50:37 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:50:37 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:50:37 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:50:37 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:50:37 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 07:50:37 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 07:50:37 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 07:50:42 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 07:50:42 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 07:50:42 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:50:42 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:50:42 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:50:42 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:50:42 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:50:42 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 07:50:42 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:50:42 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 07:50:42 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 07:50:42 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 07:50:42 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 07:50:42 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 07:50:42 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:50:42 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:50:42 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 07:50:42 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 07:50:42 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 07:50:42 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 07:50:42 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 07:50:42 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 07:50:42 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:50:42 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:50:42 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 07:50:42 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 07:50:42 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 07:50:42 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 07:50:42 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 07:50:42 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 07:50:42 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:50:42 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:50:42 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 07:50:42 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 07:50:42 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 07:50:42 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 07:50:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 07:50:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 07:50:42 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 07:50:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 07:50:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 07:50:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 07:50:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 07:50:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 07:50:42 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 07:50:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:50:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:50:42 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 07:50:42 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 07:50:42 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 07:50:42 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 07:50:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:50:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:50:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:50:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 07:50:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:50:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:50:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:50:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:50:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:50:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:50:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:50:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:50:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:50:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:50:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:50:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:50:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:50:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:50:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:50:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:50:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:50:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:50:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:50:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:50:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:50:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:50:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:50:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:50:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:50:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:50:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:50:42 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-03-30 07:50:43 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-03-30 07:50:43 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-03-30 07:50:43 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-03-30 07:50:43 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-03-30 07:50:43 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-03-30 07:50:43 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-03-30 07:50:43 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-03-30 07:50:43 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-03-30 07:50:43 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-03-30 07:50:43 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=0 bl=148 pwr=0
2025-03-30 07:50:43 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=1 bl=148 pwr=0
2025-03-30 07:50:43 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=2 bl=148 pwr=0
2025-03-30 07:50:43 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=3 bl=148 pwr=0
2025-03-30 07:50:43 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=4 bl=148 pwr=0
2025-03-30 07:50:43 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=5 bl=148 pwr=0
2025-03-30 07:50:43 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=6 bl=148 pwr=0
2025-03-30 07:50:43 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=7 bl=148 pwr=0
2025-03-30 07:50:43 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 07:50:43 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 07:50:43 [DEBUG] fake_trx.py:317 (BTS@172.18.26.20:5700) Recv FAKE_CI cmd
2025-03-30 07:50:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:50:43 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:50:43 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:50:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:50:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:50:43 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:50:43 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:50:43 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 07:50:43 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 07:50:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:50:43 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.26.22:6700) Recv SETFH cmd
2025-03-30 07:50:43 [INFO] transceiver.py:237 (MS@172.18.26.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2025-03-30 07:50:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:50:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:50:43 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-03-30 07:50:43 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:50:43 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:50:43 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:50:43 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:50:44 [DEBUG] clck_gen.py:128 IND CLOCK 306
2025-03-30 07:50:44 [DEBUG] clck_gen.py:128 IND CLOCK 408
2025-03-30 07:50:44 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:50:44 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:50:44 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:50:44 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:50:45 [DEBUG] clck_gen.py:128 IND CLOCK 510
2025-03-30 07:50:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:50:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:50:45 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:50:45 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:50:45 [INFO] transceiver.py:241 (MS@172.18.26.22:6700) Frequency hopping disabled
2025-03-30 07:50:45 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:50:45 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:50:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:50:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:50:45 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:50:45 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:50:45 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 07:50:45 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 07:50:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:50:45 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.26.22:6700) Recv SETFH cmd
2025-03-30 07:50:45 [INFO] transceiver.py:237 (MS@172.18.26.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2025-03-30 07:50:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:50:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:50:45 [DEBUG] clck_gen.py:128 IND CLOCK 612
2025-03-30 07:50:45 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:50:45 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:50:45 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:50:45 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:50:46 [DEBUG] clck_gen.py:128 IND CLOCK 714
2025-03-30 07:50:46 [DEBUG] clck_gen.py:128 IND CLOCK 816
2025-03-30 07:50:46 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:50:46 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:50:46 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:50:46 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:50:47 [DEBUG] clck_gen.py:128 IND CLOCK 918
2025-03-30 07:50:47 [DEBUG] clck_gen.py:128 IND CLOCK 1020
2025-03-30 07:50:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:50:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:50:47 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:50:47 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:50:47 [INFO] transceiver.py:241 (MS@172.18.26.22:6700) Frequency hopping disabled
2025-03-30 07:50:47 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:50:47 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:50:47 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:50:47 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:50:47 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:50:47 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:50:47 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:50:47 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:50:47 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 07:50:47 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 07:50:47 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 07:50:47 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=1076 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:50:47 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=1076 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:50:47 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=1076 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:50:47 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=1076 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:50:47 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=1076 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:50:47 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=1076 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:50:52 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 07:50:52 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 07:50:52 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:50:52 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:50:52 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:50:52 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:50:52 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:50:52 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 07:50:52 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:50:52 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 07:50:52 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 07:50:52 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 07:50:52 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 07:50:52 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 07:50:52 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:50:52 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:50:52 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 07:50:52 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 07:50:52 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 07:50:52 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 07:50:52 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 07:50:52 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 07:50:52 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:50:52 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:50:52 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 07:50:52 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 07:50:52 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 07:50:52 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 07:50:52 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 07:50:52 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 07:50:52 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:50:52 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:50:52 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 07:50:52 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 07:50:52 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 07:50:52 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 07:50:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 07:50:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 07:50:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 07:50:52 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 07:50:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 07:50:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 07:50:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 07:50:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 07:50:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:50:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:50:52 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 07:50:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:50:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:50:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:50:52 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 07:50:52 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 07:50:52 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 07:50:52 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 07:50:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:50:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:50:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:50:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 07:50:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:50:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:50:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:50:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:50:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:50:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:50:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:50:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:50:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:50:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:50:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:50:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:50:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:50:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:50:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:50:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:50:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:50:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:50:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:50:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:50:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:50:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:50:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:50:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:50:52 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-03-30 07:50:53 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-03-30 07:50:53 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-03-30 07:50:53 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-03-30 07:50:53 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-03-30 07:50:53 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-03-30 07:50:53 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-03-30 07:50:53 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-03-30 07:50:53 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-03-30 07:50:53 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-03-30 07:50:53 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=0 bl=148 pwr=0
2025-03-30 07:50:53 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=1 bl=148 pwr=0
2025-03-30 07:50:53 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=2 bl=148 pwr=0
2025-03-30 07:50:53 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=3 bl=148 pwr=0
2025-03-30 07:50:53 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=4 bl=148 pwr=0
2025-03-30 07:50:53 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=5 bl=148 pwr=0
2025-03-30 07:50:53 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=6 bl=148 pwr=0
2025-03-30 07:50:53 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=7 bl=148 pwr=0
2025-03-30 07:50:53 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 07:50:53 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 07:50:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:50:53 [DEBUG] fake_trx.py:317 (BTS@172.18.26.20:5700) Recv FAKE_CI cmd
2025-03-30 07:50:53 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:50:53 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:50:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:50:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:50:53 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:50:53 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:50:53 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 07:50:53 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 07:50:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:50:53 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:50:53 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:50:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:50:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:50:53 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-03-30 07:50:53 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:50:53 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:50:53 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:50:53 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:50:54 [DEBUG] clck_gen.py:128 IND CLOCK 306
2025-03-30 07:50:54 [DEBUG] clck_gen.py:128 IND CLOCK 408
2025-03-30 07:50:54 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:50:54 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:50:54 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:50:54 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:50:55 [DEBUG] clck_gen.py:128 IND CLOCK 510
2025-03-30 07:50:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:50:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:50:55 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:50:55 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:50:55 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:50:55 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:50:55 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:50:55 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:50:55 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:50:55 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:50:55 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:50:55 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:50:55 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 07:50:55 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 07:50:55 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 07:51:00 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 07:51:00 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 07:51:00 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:51:00 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:51:00 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:51:00 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:51:00 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:51:00 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 07:51:00 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:51:00 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 07:51:00 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 07:51:00 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 07:51:00 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 07:51:00 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 07:51:00 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:51:00 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:51:00 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 07:51:00 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 07:51:00 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 07:51:00 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 07:51:00 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 07:51:00 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 07:51:00 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:51:00 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:51:00 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 07:51:00 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 07:51:00 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 07:51:00 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 07:51:00 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 07:51:00 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 07:51:00 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:51:00 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:51:00 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 07:51:00 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 07:51:00 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 07:51:00 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 07:51:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 07:51:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 07:51:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 07:51:00 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 07:51:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 07:51:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 07:51:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 07:51:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:51:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 07:51:00 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 07:51:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:51:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:51:00 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 07:51:00 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 07:51:00 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 07:51:00 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 07:51:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:51:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:51:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:51:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 07:51:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:51:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:51:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:51:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:51:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:51:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:51:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:51:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:51:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:51:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:51:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:51:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:51:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:51:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:51:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:51:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:51:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:51:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:51:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:51:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:51:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:51:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:51:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:51:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:51:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:51:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:51:00 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-03-30 07:51:01 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-03-30 07:51:01 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-03-30 07:51:01 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-03-30 07:51:01 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-03-30 07:51:01 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-03-30 07:51:01 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-03-30 07:51:01 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-03-30 07:51:01 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-03-30 07:51:01 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-03-30 07:51:01 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=0 bl=148 pwr=0
2025-03-30 07:51:01 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=1 bl=148 pwr=0
2025-03-30 07:51:01 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=2 bl=148 pwr=0
2025-03-30 07:51:01 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=3 bl=148 pwr=0
2025-03-30 07:51:01 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=4 bl=148 pwr=0
2025-03-30 07:51:01 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=5 bl=148 pwr=0
2025-03-30 07:51:01 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=6 bl=148 pwr=0
2025-03-30 07:51:01 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=7 bl=148 pwr=0
2025-03-30 07:51:01 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 07:51:01 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 07:51:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:51:01 [DEBUG] fake_trx.py:317 (BTS@172.18.26.20:5700) Recv FAKE_CI cmd
2025-03-30 07:51:01 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:51:01 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:51:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:51:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:51:01 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:51:01 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:51:01 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 07:51:01 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 07:51:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:51:01 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.26.22:6700) Recv SETFH cmd
2025-03-30 07:51:01 [INFO] transceiver.py:237 (MS@172.18.26.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2025-03-30 07:51:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:51:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:51:01 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-03-30 07:51:01 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:51:01 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:51:01 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:51:01 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:51:02 [DEBUG] clck_gen.py:128 IND CLOCK 306
2025-03-30 07:51:02 [DEBUG] clck_gen.py:128 IND CLOCK 408
2025-03-30 07:51:02 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:51:02 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:51:02 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:51:02 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:51:03 [DEBUG] clck_gen.py:128 IND CLOCK 510
2025-03-30 07:51:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:51:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:51:03 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:51:03 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:51:03 [INFO] transceiver.py:241 (MS@172.18.26.22:6700) Frequency hopping disabled
2025-03-30 07:51:03 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:51:03 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:51:03 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:51:03 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:51:03 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:51:03 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:51:03 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:51:03 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 07:51:03 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 07:51:03 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 07:51:03 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:51:08 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 07:51:08 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 07:51:08 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:51:08 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:51:08 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:51:08 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:51:08 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:51:08 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 07:51:08 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:51:08 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 07:51:08 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 07:51:08 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 07:51:08 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 07:51:08 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 07:51:08 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:51:08 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:51:08 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 07:51:08 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 07:51:08 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 07:51:08 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 07:51:08 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 07:51:08 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 07:51:08 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:51:08 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:51:08 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 07:51:08 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 07:51:08 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 07:51:08 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 07:51:08 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 07:51:08 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 07:51:08 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:51:08 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:51:08 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 07:51:08 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 07:51:08 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 07:51:08 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 07:51:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 07:51:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 07:51:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 07:51:08 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 07:51:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 07:51:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 07:51:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 07:51:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:51:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 07:51:08 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 07:51:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:51:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:51:08 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 07:51:08 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 07:51:08 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 07:51:08 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 07:51:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:51:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:51:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:51:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 07:51:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:51:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:51:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:51:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:51:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:51:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:51:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:51:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:51:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:51:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:51:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:51:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:51:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:51:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:51:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:51:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:51:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:51:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:51:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:51:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:51:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:51:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:51:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:51:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:51:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:51:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:51:08 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-03-30 07:51:09 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-03-30 07:51:09 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-03-30 07:51:09 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-03-30 07:51:09 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-03-30 07:51:09 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-03-30 07:51:09 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-03-30 07:51:09 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-03-30 07:51:09 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-03-30 07:51:09 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-03-30 07:51:09 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=0 bl=148 pwr=0
2025-03-30 07:51:09 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=1 bl=148 pwr=0
2025-03-30 07:51:09 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=2 bl=148 pwr=0
2025-03-30 07:51:09 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=3 bl=148 pwr=0
2025-03-30 07:51:09 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=4 bl=148 pwr=0
2025-03-30 07:51:09 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=5 bl=148 pwr=0
2025-03-30 07:51:09 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=6 bl=148 pwr=0
2025-03-30 07:51:09 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=7 bl=148 pwr=0
2025-03-30 07:51:09 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 07:51:09 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 07:51:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:51:09 [DEBUG] fake_trx.py:317 (BTS@172.18.26.20:5700) Recv FAKE_CI cmd
2025-03-30 07:51:09 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:51:09 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:51:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:51:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:51:09 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:51:09 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:51:09 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 07:51:09 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 07:51:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:51:09 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:51:09 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:51:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:51:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:51:09 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-03-30 07:51:09 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:51:09 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:51:09 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:51:09 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:51:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:51:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:51:09 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:51:09 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:51:09 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:51:09 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:51:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:51:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:51:09 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:51:09 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:51:09 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 07:51:09 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 07:51:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:51:09 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:51:09 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:51:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:51:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:51:09 [DEBUG] clck_gen.py:128 IND CLOCK 306
2025-03-30 07:51:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:51:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:51:10 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:51:10 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:51:10 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:51:10 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:51:10 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:51:10 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:51:10 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:51:10 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:51:10 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:51:10 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:51:10 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 07:51:10 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 07:51:10 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 07:51:15 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 07:51:15 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 07:51:15 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:51:15 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:51:15 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:51:15 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:51:15 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:51:15 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 07:51:15 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:51:15 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 07:51:15 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 07:51:15 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 07:51:15 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 07:51:15 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 07:51:15 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:51:15 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:51:15 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 07:51:15 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 07:51:15 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 07:51:15 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 07:51:15 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 07:51:15 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 07:51:15 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:51:15 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:51:15 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 07:51:15 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 07:51:15 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 07:51:15 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 07:51:15 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 07:51:15 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 07:51:15 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:51:15 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:51:15 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 07:51:15 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 07:51:15 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 07:51:15 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 07:51:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 07:51:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 07:51:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 07:51:15 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 07:51:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 07:51:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 07:51:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 07:51:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:51:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 07:51:15 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 07:51:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:51:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:51:15 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 07:51:15 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 07:51:15 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 07:51:15 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 07:51:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:51:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:51:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:51:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 07:51:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:51:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:51:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:51:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:51:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:51:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:51:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:51:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:51:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:51:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:51:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:51:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:51:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:51:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:51:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:51:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:51:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:51:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:51:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:51:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:51:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:51:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:51:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:51:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:51:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:51:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:51:15 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-03-30 07:51:15 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-03-30 07:51:15 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-03-30 07:51:15 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-03-30 07:51:15 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-03-30 07:51:15 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-03-30 07:51:15 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-03-30 07:51:15 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-03-30 07:51:15 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-03-30 07:51:15 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-03-30 07:51:15 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=0 bl=148 pwr=0
2025-03-30 07:51:15 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=1 bl=148 pwr=0
2025-03-30 07:51:15 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=2 bl=148 pwr=0
2025-03-30 07:51:15 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=3 bl=148 pwr=0
2025-03-30 07:51:15 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=4 bl=148 pwr=0
2025-03-30 07:51:15 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=5 bl=148 pwr=0
2025-03-30 07:51:15 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=6 bl=148 pwr=0
2025-03-30 07:51:15 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=7 bl=148 pwr=0
2025-03-30 07:51:15 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 07:51:15 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 07:51:15 [DEBUG] fake_trx.py:317 (BTS@172.18.26.20:5700) Recv FAKE_CI cmd
2025-03-30 07:51:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:51:15 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:51:15 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:51:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:51:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:51:15 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:51:15 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:51:15 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 07:51:15 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 07:51:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:51:15 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:51:15 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:51:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:51:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:51:16 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-03-30 07:51:16 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:51:16 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:51:16 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:51:16 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:51:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:51:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:51:16 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:51:16 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:51:16 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:51:16 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:51:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:51:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:51:16 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:51:16 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:51:16 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 07:51:16 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 07:51:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:51:16 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:51:16 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:51:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:51:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:51:16 [DEBUG] clck_gen.py:128 IND CLOCK 306
2025-03-30 07:51:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:51:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:51:16 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:51:16 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:51:16 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:51:16 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:51:16 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:51:16 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:51:16 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:51:16 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:51:16 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:51:16 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:51:16 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 07:51:16 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 07:51:16 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 07:51:21 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 07:51:21 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 07:51:21 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:51:21 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:51:21 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:51:21 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:51:21 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:51:21 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 07:51:21 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:51:21 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 07:51:21 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 07:51:21 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 07:51:21 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 07:51:21 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 07:51:21 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:51:21 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:51:21 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 07:51:21 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 07:51:21 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 07:51:21 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 07:51:21 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 07:51:21 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 07:51:21 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:51:21 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:51:21 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 07:51:21 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 07:51:21 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 07:51:21 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 07:51:21 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 07:51:21 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 07:51:21 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:51:21 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:51:21 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 07:51:21 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 07:51:21 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 07:51:21 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 07:51:21 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 07:51:21 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 07:51:21 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 07:51:21 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 07:51:21 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 07:51:21 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 07:51:21 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 07:51:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 07:51:21 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:51:21 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:51:21 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 07:51:21 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:51:21 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:51:21 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:51:21 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 07:51:21 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 07:51:21 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 07:51:21 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 07:51:21 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:51:21 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:51:21 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:51:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 07:51:21 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:51:21 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:51:21 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:51:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:51:21 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:51:21 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:51:21 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:51:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:51:21 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:51:21 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:51:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:51:21 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:51:21 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:51:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:51:21 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:51:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:51:21 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:51:21 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:51:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:51:21 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:51:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:51:21 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:51:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:51:21 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:51:21 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-03-30 07:51:22 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-03-30 07:51:22 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-03-30 07:51:22 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-03-30 07:51:22 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-03-30 07:51:22 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-03-30 07:51:22 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-03-30 07:51:22 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-03-30 07:51:22 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-03-30 07:51:22 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-03-30 07:51:22 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=0 bl=148 pwr=0
2025-03-30 07:51:22 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=1 bl=148 pwr=0
2025-03-30 07:51:22 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=2 bl=148 pwr=0
2025-03-30 07:51:22 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=3 bl=148 pwr=0
2025-03-30 07:51:22 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=4 bl=148 pwr=0
2025-03-30 07:51:22 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=5 bl=148 pwr=0
2025-03-30 07:51:22 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=6 bl=148 pwr=0
2025-03-30 07:51:22 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=7 bl=148 pwr=0
2025-03-30 07:51:22 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 07:51:22 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 07:51:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:51:22 [DEBUG] fake_trx.py:317 (BTS@172.18.26.20:5700) Recv FAKE_CI cmd
2025-03-30 07:51:22 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:51:22 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:51:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:51:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:51:22 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:51:22 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:51:22 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 07:51:22 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 07:51:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:51:22 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:51:22 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:51:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:51:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:51:22 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-03-30 07:51:22 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:51:22 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:51:22 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:51:22 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:51:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:51:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:51:22 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:51:22 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:51:22 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:51:22 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:51:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:51:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:51:22 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:51:22 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:51:22 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 07:51:22 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 07:51:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:51:22 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:51:22 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:51:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:51:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:51:23 [DEBUG] clck_gen.py:128 IND CLOCK 306
2025-03-30 07:51:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:51:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:51:23 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:51:23 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:51:23 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:51:23 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:51:23 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:51:23 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:51:23 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:51:23 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:51:23 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 07:51:23 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 07:51:23 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 07:51:23 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:51:23 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:51:28 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 07:51:28 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 07:51:28 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:51:28 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:51:28 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:51:28 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:51:28 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:51:28 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 07:51:28 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:51:28 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 07:51:28 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 07:51:28 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 07:51:28 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 07:51:28 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 07:51:28 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:51:28 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:51:28 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 07:51:28 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 07:51:28 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 07:51:28 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 07:51:28 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 07:51:28 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 07:51:28 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:51:28 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:51:28 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 07:51:28 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 07:51:28 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 07:51:28 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 07:51:28 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 07:51:28 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 07:51:28 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:51:28 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 07:51:28 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:51:28 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 07:51:28 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 07:51:28 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 07:51:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 07:51:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 07:51:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 07:51:28 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 07:51:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 07:51:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 07:51:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 07:51:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:51:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 07:51:28 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 07:51:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:51:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:51:28 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 07:51:28 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 07:51:28 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 07:51:28 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 07:51:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:51:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:51:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:51:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 07:51:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:51:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:51:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:51:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:51:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:51:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:51:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:51:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:51:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:51:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:51:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:51:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:51:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:51:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:51:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:51:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:51:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:51:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:51:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:51:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:51:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:51:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:51:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:51:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:51:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:51:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:51:28 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-03-30 07:51:28 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-03-30 07:51:28 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-03-30 07:51:28 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-03-30 07:51:28 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-03-30 07:51:28 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-03-30 07:51:28 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-03-30 07:51:28 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-03-30 07:51:28 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-03-30 07:51:28 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-03-30 07:51:28 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=0 bl=148 pwr=0
2025-03-30 07:51:28 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=1 bl=148 pwr=0
2025-03-30 07:51:28 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=2 bl=148 pwr=0
2025-03-30 07:51:28 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=3 bl=148 pwr=0
2025-03-30 07:51:28 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=4 bl=148 pwr=0
2025-03-30 07:51:28 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=5 bl=148 pwr=0
2025-03-30 07:51:28 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=6 bl=148 pwr=0
2025-03-30 07:51:28 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=7 bl=148 pwr=0
2025-03-30 07:51:28 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 07:51:28 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 07:51:28 [DEBUG] fake_trx.py:317 (BTS@172.18.26.20:5700) Recv FAKE_CI cmd
2025-03-30 07:51:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:51:28 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:51:28 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:51:28 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:51:28 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:51:28 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:51:28 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:51:28 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 07:51:28 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 07:51:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:51:28 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.26.22:6700) Recv SETFH cmd
2025-03-30 07:51:28 [INFO] transceiver.py:237 (MS@172.18.26.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2025-03-30 07:51:28 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:51:28 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:51:29 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-03-30 07:51:29 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:51:29 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:51:29 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:51:29 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:51:29 [DEBUG] clck_gen.py:128 IND CLOCK 306
2025-03-30 07:51:30 [DEBUG] clck_gen.py:128 IND CLOCK 408
2025-03-30 07:51:30 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:51:30 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:51:30 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:51:30 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:51:30 [DEBUG] clck_gen.py:128 IND CLOCK 510
2025-03-30 07:51:31 [DEBUG] clck_gen.py:128 IND CLOCK 612
2025-03-30 07:51:31 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:51:31 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:51:31 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:51:31 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:51:31 [DEBUG] clck_gen.py:128 IND CLOCK 714
2025-03-30 07:51:31 [DEBUG] clck_gen.py:128 IND CLOCK 816
2025-03-30 07:51:32 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:51:32 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:51:32 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:51:32 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:51:32 [DEBUG] clck_gen.py:128 IND CLOCK 918
2025-03-30 07:51:32 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:51:32 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:51:32 [INFO] transceiver.py:241 (MS@172.18.26.22:6700) Frequency hopping disabled
2025-03-30 07:51:32 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:51:32 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:51:32 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:51:32 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:51:32 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:51:32 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:51:32 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:51:32 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 07:51:32 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 07:51:32 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 07:51:32 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:51:37 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 07:51:37 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 07:51:37 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:51:37 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:51:37 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:51:37 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:51:37 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:51:37 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 07:51:37 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:51:37 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 07:51:37 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 07:51:37 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 07:51:37 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 07:51:37 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 07:51:37 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:51:37 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:51:37 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 07:51:37 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 07:51:37 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 07:51:37 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 07:51:37 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 07:51:37 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 07:51:37 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:51:37 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:51:37 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 07:51:37 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 07:51:37 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 07:51:37 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 07:51:37 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 07:51:37 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 07:51:37 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:51:37 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:51:37 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 07:51:37 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 07:51:37 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 07:51:37 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 07:51:37 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 07:51:37 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 07:51:37 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 07:51:37 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 07:51:37 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 07:51:37 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 07:51:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 07:51:37 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:51:37 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 07:51:37 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 07:51:37 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:51:37 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:51:37 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 07:51:37 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 07:51:37 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 07:51:37 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 07:51:37 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:51:37 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:51:37 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:51:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 07:51:37 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:51:37 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:51:37 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:51:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:51:37 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:51:37 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:51:37 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:51:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:51:37 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:51:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:51:37 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:51:37 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:51:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:51:37 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:51:37 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:51:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:51:37 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:51:37 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:51:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:51:37 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:51:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:51:37 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:51:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:51:37 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:51:37 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:51:37 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:51:37 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-03-30 07:51:38 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-03-30 07:51:38 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-03-30 07:51:38 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-03-30 07:51:38 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-03-30 07:51:38 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-03-30 07:51:38 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-03-30 07:51:38 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-03-30 07:51:38 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-03-30 07:51:38 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-03-30 07:51:38 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=0 bl=148 pwr=0
2025-03-30 07:51:38 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=1 bl=148 pwr=0
2025-03-30 07:51:38 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=2 bl=148 pwr=0
2025-03-30 07:51:38 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=3 bl=148 pwr=0
2025-03-30 07:51:38 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=4 bl=148 pwr=0
2025-03-30 07:51:38 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=5 bl=148 pwr=0
2025-03-30 07:51:38 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=6 bl=148 pwr=0
2025-03-30 07:51:38 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=7 bl=148 pwr=0
2025-03-30 07:51:38 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 07:51:38 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 07:51:38 [DEBUG] fake_trx.py:317 (BTS@172.18.26.20:5700) Recv FAKE_CI cmd
2025-03-30 07:51:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:51:38 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:51:38 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:51:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:51:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:51:38 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:51:38 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:51:38 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 07:51:38 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 07:51:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:51:38 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:51:38 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:51:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:51:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:51:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:51:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:51:38 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:51:38 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:51:38 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:51:38 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:51:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:51:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:51:38 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:51:38 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:51:38 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 07:51:38 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 07:51:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:51:38 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:51:38 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:51:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:51:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:51:38 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-03-30 07:51:38 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:51:38 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:51:38 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:51:38 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:51:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:51:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:51:39 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:51:39 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:51:39 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:51:39 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:51:39 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:51:39 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:51:39 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:51:39 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:51:39 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:51:39 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:51:39 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 07:51:39 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 07:51:39 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 07:51:44 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 07:51:44 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 07:51:44 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:51:44 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:51:44 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:51:44 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:51:44 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:51:44 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 07:51:44 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:51:44 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 07:51:44 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 07:51:44 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 07:51:44 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 07:51:44 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 07:51:44 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:51:44 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:51:44 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 07:51:44 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 07:51:44 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 07:51:44 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 07:51:44 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 07:51:44 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 07:51:44 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:51:44 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:51:44 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 07:51:44 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 07:51:44 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 07:51:44 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 07:51:44 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 07:51:44 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 07:51:44 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:51:44 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:51:44 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 07:51:44 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 07:51:44 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 07:51:44 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 07:51:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 07:51:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 07:51:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 07:51:44 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 07:51:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 07:51:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 07:51:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 07:51:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:51:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 07:51:44 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 07:51:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:51:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:51:44 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 07:51:44 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 07:51:44 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 07:51:44 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 07:51:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:51:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:51:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:51:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 07:51:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:51:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:51:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:51:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:51:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:51:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:51:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:51:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:51:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:51:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:51:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:51:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:51:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:51:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:51:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:51:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:51:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:51:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:51:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:51:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:51:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:51:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:51:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:51:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:51:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:51:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:51:44 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-03-30 07:51:44 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-03-30 07:51:44 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-03-30 07:51:44 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-03-30 07:51:44 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-03-30 07:51:44 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-03-30 07:51:44 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-03-30 07:51:44 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-03-30 07:51:44 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-03-30 07:51:44 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-03-30 07:51:44 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=0 bl=148 pwr=0
2025-03-30 07:51:44 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=1 bl=148 pwr=0
2025-03-30 07:51:44 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=2 bl=148 pwr=0
2025-03-30 07:51:44 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=3 bl=148 pwr=0
2025-03-30 07:51:44 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=4 bl=148 pwr=0
2025-03-30 07:51:44 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=5 bl=148 pwr=0
2025-03-30 07:51:44 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=6 bl=148 pwr=0
2025-03-30 07:51:44 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=7 bl=148 pwr=0
2025-03-30 07:51:44 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 07:51:44 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 07:51:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:51:44 [DEBUG] fake_trx.py:317 (BTS@172.18.26.20:5700) Recv FAKE_CI cmd
2025-03-30 07:51:44 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:51:44 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:51:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:51:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:51:44 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:51:44 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:51:44 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 07:51:44 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 07:51:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:51:44 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.26.22:6700) Recv SETFH cmd
2025-03-30 07:51:44 [INFO] transceiver.py:237 (MS@172.18.26.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2025-03-30 07:51:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:51:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:51:45 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-03-30 07:51:45 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:51:45 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:51:45 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:51:45 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:51:45 [DEBUG] clck_gen.py:128 IND CLOCK 306
2025-03-30 07:51:45 [DEBUG] clck_gen.py:128 IND CLOCK 408
2025-03-30 07:51:46 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:51:46 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:51:46 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:51:46 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:51:46 [DEBUG] clck_gen.py:128 IND CLOCK 510
2025-03-30 07:51:46 [DEBUG] clck_gen.py:128 IND CLOCK 612
2025-03-30 07:51:47 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:51:47 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:51:47 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:51:47 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:51:47 [DEBUG] clck_gen.py:128 IND CLOCK 714
2025-03-30 07:51:47 [DEBUG] clck_gen.py:128 IND CLOCK 816
2025-03-30 07:51:48 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:51:48 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:51:48 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:51:48 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:51:48 [DEBUG] clck_gen.py:128 IND CLOCK 918
2025-03-30 07:51:48 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:51:48 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:51:48 [INFO] transceiver.py:241 (MS@172.18.26.22:6700) Frequency hopping disabled
2025-03-30 07:51:48 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:51:48 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:51:48 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:51:48 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:51:48 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:51:48 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:51:48 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:51:48 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:51:48 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 07:51:48 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 07:51:48 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 07:51:53 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 07:51:53 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 07:51:53 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:51:53 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:51:53 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:51:53 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:51:53 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:51:53 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 07:51:53 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:51:53 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 07:51:53 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 07:51:53 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 07:51:53 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 07:51:53 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 07:51:53 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:51:53 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:51:53 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 07:51:53 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 07:51:53 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 07:51:53 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 07:51:53 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 07:51:53 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 07:51:53 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:51:53 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:51:53 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 07:51:53 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 07:51:53 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 07:51:53 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 07:51:53 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 07:51:53 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 07:51:53 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:51:53 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:51:53 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 07:51:53 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 07:51:53 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 07:51:53 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 07:51:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 07:51:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 07:51:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 07:51:53 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 07:51:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 07:51:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 07:51:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 07:51:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:51:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 07:51:53 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 07:51:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:51:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:51:53 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 07:51:53 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 07:51:53 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 07:51:53 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 07:51:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:51:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:51:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:51:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 07:51:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:51:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:51:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:51:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:51:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:51:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:51:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:51:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:51:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:51:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:51:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:51:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:51:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:51:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:51:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:51:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:51:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:51:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:51:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:51:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:51:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:51:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:51:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:51:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:51:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:51:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:51:53 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-03-30 07:51:54 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-03-30 07:51:54 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-03-30 07:51:54 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-03-30 07:51:54 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-03-30 07:51:54 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-03-30 07:51:54 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-03-30 07:51:54 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-03-30 07:51:54 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-03-30 07:51:54 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-03-30 07:51:54 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=0 bl=148 pwr=0
2025-03-30 07:51:54 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=1 bl=148 pwr=0
2025-03-30 07:51:54 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=2 bl=148 pwr=0
2025-03-30 07:51:54 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=3 bl=148 pwr=0
2025-03-30 07:51:54 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=4 bl=148 pwr=0
2025-03-30 07:51:54 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=5 bl=148 pwr=0
2025-03-30 07:51:54 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=6 bl=148 pwr=0
2025-03-30 07:51:54 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=7 bl=148 pwr=0
2025-03-30 07:51:54 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 07:51:54 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 07:51:54 [DEBUG] fake_trx.py:317 (BTS@172.18.26.20:5700) Recv FAKE_CI cmd
2025-03-30 07:51:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:51:54 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:51:54 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:51:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:51:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:51:54 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:51:54 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:51:54 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 07:51:54 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 07:51:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:51:54 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:51:54 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:51:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:51:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:51:54 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-03-30 07:51:54 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:51:54 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:51:54 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:51:54 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:51:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:51:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:51:55 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:51:55 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:51:55 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:51:55 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:51:55 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:51:55 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:51:55 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:51:55 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:51:55 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:51:55 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 07:51:55 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 07:51:55 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 07:51:55 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:52:00 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 07:52:00 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 07:52:00 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:52:00 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:52:00 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:52:00 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:52:00 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:52:00 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 07:52:00 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:52:00 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 07:52:00 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 07:52:00 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 07:52:00 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 07:52:00 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 07:52:00 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:52:00 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:52:00 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 07:52:00 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 07:52:00 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 07:52:00 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 07:52:00 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 07:52:00 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 07:52:00 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:52:00 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:52:00 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 07:52:00 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 07:52:00 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 07:52:00 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 07:52:00 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 07:52:00 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 07:52:00 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:52:00 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:52:00 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 07:52:00 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 07:52:00 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 07:52:00 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 07:52:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 07:52:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 07:52:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 07:52:00 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 07:52:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 07:52:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 07:52:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 07:52:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:52:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 07:52:00 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 07:52:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:52:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:52:00 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 07:52:00 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 07:52:00 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 07:52:00 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 07:52:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:52:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:52:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:52:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 07:52:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:52:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:52:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:52:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:52:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:52:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:52:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:52:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:52:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:52:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:52:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:52:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:52:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:52:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:52:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:52:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:52:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:52:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:52:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:52:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:52:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:52:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:52:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:52:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:52:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:52:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:52:00 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-03-30 07:52:00 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-03-30 07:52:00 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-03-30 07:52:00 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-03-30 07:52:00 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-03-30 07:52:00 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-03-30 07:52:00 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-03-30 07:52:00 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-03-30 07:52:00 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-03-30 07:52:00 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-03-30 07:52:00 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=0 bl=148 pwr=0
2025-03-30 07:52:00 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=1 bl=148 pwr=0
2025-03-30 07:52:00 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=2 bl=148 pwr=0
2025-03-30 07:52:00 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=3 bl=148 pwr=0
2025-03-30 07:52:00 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=4 bl=148 pwr=0
2025-03-30 07:52:00 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=5 bl=148 pwr=0
2025-03-30 07:52:00 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=6 bl=148 pwr=0
2025-03-30 07:52:00 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=7 bl=148 pwr=0
2025-03-30 07:52:00 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 07:52:00 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 07:52:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:52:00 [DEBUG] fake_trx.py:317 (BTS@172.18.26.20:5700) Recv FAKE_CI cmd
2025-03-30 07:52:00 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:52:00 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:52:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:52:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:52:00 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:52:00 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:52:00 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 07:52:00 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 07:52:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:52:00 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:52:00 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:52:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:52:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:52:01 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-03-30 07:52:01 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:52:01 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:52:01 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:52:01 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:52:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:52:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:52:01 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:52:01 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:52:01 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:52:01 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:52:01 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:52:01 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:52:01 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:52:01 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:52:01 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:52:01 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:52:01 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 07:52:01 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 07:52:01 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 07:52:06 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 07:52:06 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 07:52:06 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:52:06 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:52:06 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:52:06 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:52:06 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:52:06 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 07:52:06 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:52:06 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 07:52:06 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 07:52:06 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 07:52:06 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 07:52:06 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 07:52:06 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:52:06 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:52:06 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 07:52:06 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 07:52:06 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 07:52:06 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 07:52:06 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 07:52:06 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 07:52:06 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:52:06 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:52:06 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 07:52:06 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 07:52:06 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 07:52:06 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 07:52:06 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 07:52:06 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 07:52:06 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:52:06 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:52:06 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 07:52:06 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 07:52:06 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 07:52:06 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 07:52:06 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 07:52:06 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 07:52:06 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 07:52:06 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 07:52:06 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 07:52:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 07:52:06 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 07:52:06 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 07:52:06 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 07:52:06 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:52:06 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:52:06 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:52:06 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 07:52:06 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 07:52:06 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 07:52:06 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 07:52:06 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:52:06 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:52:06 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:52:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 07:52:06 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:52:06 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:52:06 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:52:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:52:06 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:52:06 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:52:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:52:06 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:52:06 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:52:06 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:52:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:52:06 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:52:06 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:52:06 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:52:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:52:06 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:52:06 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:52:06 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:52:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:52:06 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:52:06 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:52:06 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:52:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:52:06 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:52:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:52:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:52:06 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-03-30 07:52:07 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-03-30 07:52:07 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-03-30 07:52:07 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-03-30 07:52:07 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-03-30 07:52:07 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-03-30 07:52:07 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-03-30 07:52:07 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-03-30 07:52:07 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-03-30 07:52:07 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-03-30 07:52:07 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=0 bl=148 pwr=0
2025-03-30 07:52:07 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=1 bl=148 pwr=0
2025-03-30 07:52:07 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=2 bl=148 pwr=0
2025-03-30 07:52:07 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=3 bl=148 pwr=0
2025-03-30 07:52:07 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=4 bl=148 pwr=0
2025-03-30 07:52:07 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=5 bl=148 pwr=0
2025-03-30 07:52:07 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=6 bl=148 pwr=0
2025-03-30 07:52:07 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=7 bl=148 pwr=0
2025-03-30 07:52:07 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 07:52:07 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 07:52:07 [DEBUG] fake_trx.py:317 (BTS@172.18.26.20:5700) Recv FAKE_CI cmd
2025-03-30 07:52:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:52:07 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:52:07 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:52:07 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:52:07 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:52:07 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:52:07 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:52:07 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 07:52:07 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 07:52:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:52:07 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:52:07 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:52:07 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:52:07 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:52:07 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-03-30 07:52:07 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:52:07 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:52:07 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:52:07 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:52:08 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:52:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:52:08 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:52:08 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:52:08 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:52:08 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:52:08 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:52:08 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:52:08 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:52:08 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:52:08 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:52:08 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:52:08 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 07:52:08 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 07:52:08 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 07:52:13 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 07:52:13 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 07:52:13 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:52:13 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:52:13 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:52:13 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:52:13 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:52:13 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 07:52:13 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:52:13 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 07:52:13 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 07:52:13 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 07:52:13 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 07:52:13 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 07:52:13 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:52:13 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:52:13 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 07:52:13 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 07:52:13 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 07:52:13 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 07:52:13 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 07:52:13 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 07:52:13 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:52:13 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:52:13 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 07:52:13 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 07:52:13 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 07:52:13 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 07:52:13 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 07:52:13 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 07:52:13 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:52:13 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:52:13 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 07:52:13 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 07:52:13 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 07:52:13 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 07:52:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 07:52:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 07:52:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 07:52:13 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 07:52:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 07:52:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 07:52:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 07:52:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:52:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 07:52:13 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 07:52:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:52:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:52:13 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 07:52:13 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 07:52:13 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 07:52:13 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 07:52:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:52:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:52:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:52:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 07:52:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:52:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:52:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:52:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:52:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:52:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:52:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:52:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:52:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:52:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:52:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:52:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:52:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:52:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:52:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:52:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:52:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:52:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:52:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:52:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:52:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:52:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:52:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:52:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:52:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:52:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:52:13 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-03-30 07:52:13 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-03-30 07:52:13 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-03-30 07:52:13 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-03-30 07:52:13 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-03-30 07:52:13 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-03-30 07:52:13 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-03-30 07:52:13 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-03-30 07:52:13 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-03-30 07:52:13 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-03-30 07:52:13 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=0 bl=148 pwr=0
2025-03-30 07:52:13 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=1 bl=148 pwr=0
2025-03-30 07:52:13 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=2 bl=148 pwr=0
2025-03-30 07:52:13 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=3 bl=148 pwr=0
2025-03-30 07:52:13 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=4 bl=148 pwr=0
2025-03-30 07:52:13 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=5 bl=148 pwr=0
2025-03-30 07:52:13 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=6 bl=148 pwr=0
2025-03-30 07:52:13 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=7 bl=148 pwr=0
2025-03-30 07:52:13 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 07:52:13 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 07:52:13 [DEBUG] fake_trx.py:317 (BTS@172.18.26.20:5700) Recv FAKE_CI cmd
2025-03-30 07:52:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:52:13 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:52:13 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:52:13 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:52:13 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:52:13 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:52:13 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:52:13 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 07:52:13 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 07:52:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:52:13 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.26.22:6700) Recv SETFH cmd
2025-03-30 07:52:13 [INFO] transceiver.py:237 (MS@172.18.26.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2025-03-30 07:52:13 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:52:13 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:52:14 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-03-30 07:52:14 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:52:14 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:52:14 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:52:14 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:52:14 [DEBUG] clck_gen.py:128 IND CLOCK 306
2025-03-30 07:52:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:52:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:52:14 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:52:14 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:52:14 [INFO] transceiver.py:241 (MS@172.18.26.22:6700) Frequency hopping disabled
2025-03-30 07:52:14 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:52:14 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:52:14 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:52:14 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:52:14 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:52:14 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:52:14 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:52:14 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:52:14 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 07:52:14 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 07:52:14 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 07:52:19 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 07:52:19 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 07:52:19 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:52:19 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:52:19 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:52:19 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:52:19 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:52:19 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 07:52:19 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:52:19 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 07:52:19 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 07:52:19 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 07:52:19 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 07:52:19 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 07:52:19 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:52:19 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:52:19 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 07:52:19 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 07:52:19 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 07:52:19 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 07:52:19 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 07:52:19 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 07:52:19 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:52:19 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:52:19 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 07:52:19 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 07:52:19 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 07:52:19 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 07:52:19 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 07:52:19 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 07:52:19 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:52:19 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:52:19 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 07:52:19 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 07:52:19 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 07:52:19 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 07:52:19 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 07:52:19 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 07:52:19 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 07:52:19 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 07:52:19 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 07:52:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 07:52:19 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 07:52:19 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 07:52:19 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 07:52:19 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:52:19 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:52:19 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 07:52:19 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 07:52:19 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 07:52:19 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 07:52:19 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:52:19 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:52:19 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:52:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 07:52:19 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:52:19 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:52:19 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:52:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:52:19 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:52:19 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:52:19 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:52:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:52:19 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:52:19 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:52:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:52:19 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:52:19 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:52:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:52:19 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:52:19 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:52:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:52:19 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:52:19 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:52:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:52:19 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:52:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:52:19 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:52:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:52:19 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:52:19 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:52:19 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:52:19 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-03-30 07:52:20 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-03-30 07:52:20 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-03-30 07:52:20 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-03-30 07:52:20 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-03-30 07:52:20 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-03-30 07:52:20 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-03-30 07:52:20 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-03-30 07:52:20 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-03-30 07:52:20 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-03-30 07:52:20 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=0 bl=148 pwr=0
2025-03-30 07:52:20 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=1 bl=148 pwr=0
2025-03-30 07:52:20 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=2 bl=148 pwr=0
2025-03-30 07:52:20 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=3 bl=148 pwr=0
2025-03-30 07:52:20 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=4 bl=148 pwr=0
2025-03-30 07:52:20 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=5 bl=148 pwr=0
2025-03-30 07:52:20 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=6 bl=148 pwr=0
2025-03-30 07:52:20 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=7 bl=148 pwr=0
2025-03-30 07:52:20 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 07:52:20 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 07:52:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:52:20 [DEBUG] fake_trx.py:317 (BTS@172.18.26.20:5700) Recv FAKE_CI cmd
2025-03-30 07:52:20 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:52:20 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:52:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:52:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:52:20 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:52:20 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:52:20 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 07:52:20 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 07:52:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:52:20 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:52:20 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:52:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:52:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:52:20 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-03-30 07:52:20 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:52:20 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:52:20 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:52:20 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:52:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:52:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:52:21 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:52:21 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:52:21 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:52:21 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:52:21 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:52:21 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:52:21 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:52:21 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:52:21 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:52:21 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:52:21 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 07:52:21 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 07:52:21 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 07:52:26 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 07:52:26 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 07:52:26 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:52:26 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:52:26 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:52:26 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:52:26 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:52:26 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 07:52:26 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:52:26 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 07:52:26 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 07:52:26 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 07:52:26 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 07:52:26 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 07:52:26 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:52:26 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:52:26 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 07:52:26 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 07:52:26 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 07:52:26 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 07:52:26 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 07:52:26 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 07:52:26 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:52:26 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:52:26 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 07:52:26 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 07:52:26 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 07:52:26 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 07:52:26 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 07:52:26 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 07:52:26 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:52:26 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:52:26 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 07:52:26 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 07:52:26 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 07:52:26 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 07:52:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 07:52:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 07:52:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 07:52:26 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 07:52:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 07:52:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 07:52:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 07:52:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:52:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 07:52:26 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 07:52:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:52:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:52:26 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 07:52:26 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 07:52:26 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 07:52:26 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 07:52:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:52:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:52:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:52:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 07:52:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:52:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:52:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:52:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:52:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:52:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:52:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:52:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:52:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:52:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:52:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:52:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:52:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:52:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:52:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:52:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:52:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:52:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:52:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:52:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:52:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:52:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:52:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:52:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:52:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:52:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:52:26 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-03-30 07:52:26 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-03-30 07:52:26 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-03-30 07:52:26 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-03-30 07:52:26 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-03-30 07:52:26 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-03-30 07:52:26 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-03-30 07:52:26 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-03-30 07:52:26 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-03-30 07:52:26 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-03-30 07:52:26 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=0 bl=148 pwr=0
2025-03-30 07:52:26 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=1 bl=148 pwr=0
2025-03-30 07:52:26 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=2 bl=148 pwr=0
2025-03-30 07:52:26 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=3 bl=148 pwr=0
2025-03-30 07:52:26 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=4 bl=148 pwr=0
2025-03-30 07:52:26 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=5 bl=148 pwr=0
2025-03-30 07:52:26 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=6 bl=148 pwr=0
2025-03-30 07:52:26 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=7 bl=148 pwr=0
2025-03-30 07:52:26 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 07:52:26 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 07:52:26 [DEBUG] fake_trx.py:317 (BTS@172.18.26.20:5700) Recv FAKE_CI cmd
2025-03-30 07:52:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:52:26 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:52:26 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:52:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:52:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:52:26 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:52:26 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:52:26 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 07:52:26 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 07:52:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:52:26 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.26.22:6700) Recv SETFH cmd
2025-03-30 07:52:26 [INFO] transceiver.py:237 (MS@172.18.26.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2025-03-30 07:52:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:52:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:52:27 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-03-30 07:52:27 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:52:27 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:52:27 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:52:27 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:52:27 [WARNING] transceiver.py:330 (MS@172.18.26.22:6700) Stale TRXD message (fn=221): fn=220 tn=0 pwr=0
2025-03-30 07:52:27 [WARNING] transceiver.py:330 (MS@172.18.26.22:6700) Stale TRXD message (fn=221): fn=220 tn=1 pwr=0
2025-03-30 07:52:27 [WARNING] transceiver.py:330 (MS@172.18.26.22:6700) Stale TRXD message (fn=221): fn=220 tn=2 pwr=0
2025-03-30 07:52:27 [WARNING] transceiver.py:330 (MS@172.18.26.22:6700) Stale TRXD message (fn=221): fn=220 tn=3 pwr=0
2025-03-30 07:52:27 [WARNING] transceiver.py:330 (MS@172.18.26.22:6700) Stale TRXD message (fn=221): fn=220 tn=4 pwr=0
2025-03-30 07:52:27 [WARNING] transceiver.py:330 (MS@172.18.26.22:6700) Stale TRXD message (fn=221): fn=220 tn=5 bl=148 pwr=0
2025-03-30 07:52:27 [WARNING] transceiver.py:330 (MS@172.18.26.22:6700) Stale TRXD message (fn=221): fn=220 tn=6 pwr=0
2025-03-30 07:52:27 [WARNING] transceiver.py:330 (MS@172.18.26.22:6700) Stale TRXD message (fn=221): fn=220 tn=7 pwr=0
2025-03-30 07:52:27 [WARNING] transceiver.py:330 (TRX3@172.18.26.20:5700/3) Stale TRXD message (fn=221): ver=1 fn=220 tn=5 bl=148 pwr=0
2025-03-30 07:52:27 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=222): ver=1 fn=220 tn=0 bl=148 pwr=0
2025-03-30 07:52:27 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=222): ver=1 fn=220 tn=1 bl=148 pwr=0
2025-03-30 07:52:27 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=222): ver=1 fn=220 tn=2 bl=148 pwr=0
2025-03-30 07:52:27 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=222): ver=1 fn=220 tn=3 bl=148 pwr=0
2025-03-30 07:52:27 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=222): ver=1 fn=220 tn=4 bl=148 pwr=0
2025-03-30 07:52:27 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=222): ver=1 fn=220 tn=5 bl=148 pwr=0
2025-03-30 07:52:27 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=222): ver=1 fn=220 tn=6 bl=148 pwr=0
2025-03-30 07:52:27 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=222): ver=1 fn=220 tn=7 bl=148 pwr=0
2025-03-30 07:52:27 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=222): ver=1 fn=221 tn=0 bl=148 pwr=0
2025-03-30 07:52:27 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=222): ver=1 fn=221 tn=1 bl=148 pwr=0
2025-03-30 07:52:27 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=222): ver=1 fn=221 tn=2 bl=148 pwr=0
2025-03-30 07:52:27 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=222): ver=1 fn=221 tn=3 bl=148 pwr=0
2025-03-30 07:52:27 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=222): ver=1 fn=221 tn=4 bl=148 pwr=0
2025-03-30 07:52:27 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=222): ver=1 fn=221 tn=5 bl=148 pwr=0
2025-03-30 07:52:27 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=222): ver=1 fn=221 tn=6 bl=148 pwr=0
2025-03-30 07:52:27 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=222): ver=1 fn=221 tn=7 bl=148 pwr=0
2025-03-30 07:52:27 [DEBUG] clck_gen.py:128 IND CLOCK 306
2025-03-30 07:52:27 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:52:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:52:27 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:52:27 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:52:27 [INFO] transceiver.py:241 (MS@172.18.26.22:6700) Frequency hopping disabled
2025-03-30 07:52:27 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:52:27 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:52:27 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:52:27 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:52:27 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:52:27 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:52:27 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:52:27 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:52:27 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 07:52:27 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 07:52:27 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 07:52:27 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=334 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:52:27 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=334 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:52:27 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=334 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:52:27 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=334 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:52:27 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=334 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:52:27 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=334 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:52:27 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=335 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:52:27 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=335 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:52:27 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=335 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:52:27 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=335 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:52:27 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=335 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:52:27 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=335 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:52:27 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=335 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:52:27 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=335 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:52:32 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 07:52:32 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 07:52:32 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:52:32 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:52:32 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:52:32 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:52:32 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:52:32 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 07:52:32 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:52:32 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 07:52:32 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 07:52:32 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 07:52:32 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 07:52:32 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 07:52:32 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:52:32 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:52:32 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 07:52:32 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 07:52:32 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 07:52:32 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 07:52:32 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 07:52:32 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 07:52:32 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:52:32 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:52:32 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 07:52:32 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 07:52:32 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 07:52:32 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 07:52:32 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 07:52:32 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 07:52:32 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:52:32 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:52:32 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 07:52:32 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 07:52:32 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 07:52:32 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 07:52:32 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 07:52:32 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 07:52:32 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 07:52:32 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 07:52:32 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 07:52:32 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 07:52:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 07:52:32 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:52:32 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 07:52:32 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 07:52:32 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:52:32 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:52:32 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 07:52:32 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 07:52:32 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 07:52:32 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 07:52:32 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:52:32 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:52:32 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:52:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 07:52:32 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:52:32 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:52:32 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:52:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:52:32 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:52:32 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:52:32 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:52:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:52:32 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:52:32 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:52:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:52:32 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:52:32 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:52:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:52:32 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:52:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:52:32 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:52:32 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:52:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:52:32 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:52:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:52:32 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:52:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:52:32 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:52:32 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:52:32 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:52:32 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-03-30 07:52:33 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-03-30 07:52:33 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-03-30 07:52:33 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-03-30 07:52:33 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-03-30 07:52:33 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-03-30 07:52:33 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-03-30 07:52:33 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-03-30 07:52:33 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-03-30 07:52:33 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-03-30 07:52:33 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=0 bl=148 pwr=0
2025-03-30 07:52:33 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=1 bl=148 pwr=0
2025-03-30 07:52:33 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=2 bl=148 pwr=0
2025-03-30 07:52:33 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=3 bl=148 pwr=0
2025-03-30 07:52:33 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=4 bl=148 pwr=0
2025-03-30 07:52:33 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=5 bl=148 pwr=0
2025-03-30 07:52:33 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=6 bl=148 pwr=0
2025-03-30 07:52:33 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=7 bl=148 pwr=0
2025-03-30 07:52:33 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 07:52:33 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 07:52:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:52:33 [DEBUG] fake_trx.py:317 (BTS@172.18.26.20:5700) Recv FAKE_CI cmd
2025-03-30 07:52:33 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:52:33 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:52:33 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:52:33 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:52:33 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:52:33 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:52:33 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 07:52:33 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 07:52:33 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-03-30 07:52:33 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:52:33 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:52:33 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:52:33 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:52:34 [DEBUG] clck_gen.py:128 IND CLOCK 306
2025-03-30 07:52:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:52:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:52:34 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:52:34 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:52:34 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:52:34 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:52:34 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:52:34 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:52:34 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:52:34 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:52:34 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 07:52:34 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 07:52:34 [DEBUG] clck_gen.py:128 IND CLOCK 408
2025-03-30 07:52:34 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:52:34 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:52:34 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:52:34 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:52:35 [DEBUG] clck_gen.py:128 IND CLOCK 510
2025-03-30 07:52:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD NOHANDOVER
2025-03-30 07:52:35 [DEBUG] clck_gen.py:128 IND CLOCK 612
2025-03-30 07:52:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD NOHANDOVER
2025-03-30 07:52:35 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:52:35 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:52:35 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:52:35 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:52:35 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:52:35 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:52:35 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:52:35 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:52:35 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:52:35 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:52:35 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 07:52:35 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 07:52:35 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 07:52:40 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 07:52:40 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 07:52:40 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:52:40 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:52:40 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:52:40 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:52:40 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:52:40 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 07:52:40 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:52:40 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 07:52:40 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 07:52:40 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 07:52:40 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 07:52:40 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 07:52:40 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:52:40 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:52:40 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 07:52:40 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 07:52:40 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 07:52:40 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 07:52:40 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 07:52:40 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 07:52:40 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:52:40 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:52:40 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 07:52:40 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 07:52:40 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 07:52:40 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 07:52:40 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 07:52:40 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 07:52:40 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:52:40 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:52:40 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 07:52:40 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 07:52:40 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 07:52:40 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 07:52:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 07:52:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 07:52:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 07:52:40 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 07:52:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 07:52:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 07:52:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 07:52:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:52:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 07:52:40 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 07:52:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:52:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:52:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:52:40 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 07:52:40 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 07:52:40 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 07:52:40 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 07:52:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:52:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:52:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:52:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 07:52:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:52:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:52:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:52:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:52:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:52:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:52:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:52:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:52:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:52:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:52:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:52:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:52:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:52:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:52:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:52:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:52:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:52:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:52:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:52:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:52:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:52:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:52:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:52:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:52:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:52:40 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-03-30 07:52:41 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-03-30 07:52:41 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-03-30 07:52:41 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-03-30 07:52:41 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-03-30 07:52:41 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-03-30 07:52:41 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-03-30 07:52:41 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-03-30 07:52:41 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-03-30 07:52:41 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-03-30 07:52:41 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=0 bl=148 pwr=0
2025-03-30 07:52:41 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=1 bl=148 pwr=0
2025-03-30 07:52:41 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=2 bl=148 pwr=0
2025-03-30 07:52:41 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=3 bl=148 pwr=0
2025-03-30 07:52:41 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=4 bl=148 pwr=0
2025-03-30 07:52:41 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=5 bl=148 pwr=0
2025-03-30 07:52:41 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=6 bl=148 pwr=0
2025-03-30 07:52:41 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=7 bl=148 pwr=0
2025-03-30 07:52:41 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 07:52:41 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 07:52:41 [DEBUG] fake_trx.py:317 (BTS@172.18.26.20:5700) Recv FAKE_CI cmd
2025-03-30 07:52:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:52:41 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:52:41 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:52:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:52:41 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-03-30 07:52:41 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:52:41 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:52:41 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:52:41 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:52:42 [DEBUG] clck_gen.py:128 IND CLOCK 306
2025-03-30 07:52:42 [DEBUG] clck_gen.py:128 IND CLOCK 408
2025-03-30 07:52:42 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:52:42 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:52:42 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:52:42 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:52:42 [DEBUG] clck_gen.py:128 IND CLOCK 510
2025-03-30 07:52:43 [DEBUG] clck_gen.py:128 IND CLOCK 612
2025-03-30 07:52:43 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:52:43 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:52:43 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:52:43 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:52:43 [DEBUG] clck_gen.py:128 IND CLOCK 714
2025-03-30 07:52:44 [DEBUG] clck_gen.py:128 IND CLOCK 816
2025-03-30 07:52:44 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:52:44 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:52:44 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:52:44 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:52:44 [DEBUG] clck_gen.py:128 IND CLOCK 918
2025-03-30 07:52:45 [DEBUG] clck_gen.py:128 IND CLOCK 1020
2025-03-30 07:52:45 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:52:45 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:52:45 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:52:45 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:52:45 [DEBUG] clck_gen.py:128 IND CLOCK 1122
2025-03-30 07:52:46 [DEBUG] clck_gen.py:128 IND CLOCK 1224
2025-03-30 07:52:46 [DEBUG] clck_gen.py:128 IND CLOCK 1326
2025-03-30 07:52:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:52:47 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:52:47 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:52:47 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 07:52:47 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 07:52:47 [DEBUG] clck_gen.py:128 IND CLOCK 1428
2025-03-30 07:52:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD NOHANDOVER
2025-03-30 07:52:47 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:52:47 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:52:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:52:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:52:47 [DEBUG] clck_gen.py:128 IND CLOCK 1530
2025-03-30 07:52:48 [DEBUG] clck_gen.py:128 IND CLOCK 1632
2025-03-30 07:52:48 [DEBUG] clck_gen.py:128 IND CLOCK 1734
2025-03-30 07:52:49 [DEBUG] clck_gen.py:128 IND CLOCK 1836
2025-03-30 07:52:49 [DEBUG] clck_gen.py:128 IND CLOCK 1938
2025-03-30 07:52:50 [DEBUG] clck_gen.py:128 IND CLOCK 2040
2025-03-30 07:52:50 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:52:50 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:52:50 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:52:50 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:52:50 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:52:50 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:52:50 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:52:50 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:52:50 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:52:50 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:52:50 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 07:52:50 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 07:52:50 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 07:52:55 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 07:52:55 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 07:52:55 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:52:55 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:52:55 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:52:55 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:52:55 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:52:55 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 07:52:55 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:52:55 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 07:52:55 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 07:52:55 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 07:52:55 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 07:52:55 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 07:52:55 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:52:55 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:52:55 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 07:52:55 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 07:52:55 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 07:52:55 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 07:52:55 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 07:52:55 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 07:52:55 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:52:55 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:52:55 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 07:52:55 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 07:52:55 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 07:52:55 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 07:52:55 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 07:52:55 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 07:52:55 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:52:55 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:52:55 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 07:52:55 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 07:52:55 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 07:52:55 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 07:52:55 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 07:52:55 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 07:52:55 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 07:52:55 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 07:52:55 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 07:52:55 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 07:52:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 07:52:55 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:52:55 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 07:52:55 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 07:52:55 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:52:55 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:52:55 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 07:52:55 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 07:52:55 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 07:52:55 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 07:52:55 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:52:55 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:52:55 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:52:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 07:52:55 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:52:55 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:52:55 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:52:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:52:55 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:52:55 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:52:55 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:52:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:52:55 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:52:55 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:52:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:52:55 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:52:55 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:52:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:52:55 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:52:55 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:52:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:52:55 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:52:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:52:55 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:52:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:52:55 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:52:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:52:55 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:52:55 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:52:55 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:52:55 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-03-30 07:52:55 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-03-30 07:52:55 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-03-30 07:52:55 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-03-30 07:52:55 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-03-30 07:52:55 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-03-30 07:52:55 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-03-30 07:52:55 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-03-30 07:52:55 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-03-30 07:52:55 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-03-30 07:52:55 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=0 bl=148 pwr=0
2025-03-30 07:52:55 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=1 bl=148 pwr=0
2025-03-30 07:52:55 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=2 bl=148 pwr=0
2025-03-30 07:52:55 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=3 bl=148 pwr=0
2025-03-30 07:52:55 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=4 bl=148 pwr=0
2025-03-30 07:52:55 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=5 bl=148 pwr=0
2025-03-30 07:52:55 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=6 bl=148 pwr=0
2025-03-30 07:52:55 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=7 bl=148 pwr=0
2025-03-30 07:52:55 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 07:52:55 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 07:52:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:52:55 [DEBUG] fake_trx.py:317 (BTS@172.18.26.20:5700) Recv FAKE_CI cmd
2025-03-30 07:52:55 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:52:55 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:52:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:52:56 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-03-30 07:52:56 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:52:56 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:52:56 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:52:56 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:52:56 [DEBUG] clck_gen.py:128 IND CLOCK 306
2025-03-30 07:52:57 [DEBUG] clck_gen.py:128 IND CLOCK 408
2025-03-30 07:52:57 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:52:57 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:52:57 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:52:57 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:52:57 [DEBUG] clck_gen.py:128 IND CLOCK 510
2025-03-30 07:52:58 [DEBUG] clck_gen.py:128 IND CLOCK 612
2025-03-30 07:52:58 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:52:58 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:52:58 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:52:58 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:52:58 [DEBUG] clck_gen.py:128 IND CLOCK 714
2025-03-30 07:52:59 [DEBUG] clck_gen.py:128 IND CLOCK 816
2025-03-30 07:52:59 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:52:59 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:52:59 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:52:59 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:52:59 [DEBUG] clck_gen.py:128 IND CLOCK 918
2025-03-30 07:52:59 [DEBUG] clck_gen.py:128 IND CLOCK 1020
2025-03-30 07:53:00 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:53:00 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:53:00 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:53:00 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:53:00 [DEBUG] clck_gen.py:128 IND CLOCK 1122
2025-03-30 07:53:00 [DEBUG] clck_gen.py:128 IND CLOCK 1224
2025-03-30 07:53:01 [DEBUG] clck_gen.py:128 IND CLOCK 1326
2025-03-30 07:53:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:53:01 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:53:01 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:53:01 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 07:53:01 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 07:53:01 [DEBUG] clck_gen.py:128 IND CLOCK 1428
2025-03-30 07:53:01 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD NOHANDOVER
2025-03-30 07:53:01 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:53:01 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:53:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:53:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:53:02 [DEBUG] clck_gen.py:128 IND CLOCK 1530
2025-03-30 07:53:02 [WARNING] transceiver.py:330 (MS@172.18.26.22:6700) Stale TRXD message (fn=1602): fn=1601 tn=0 bl=148 pwr=0
2025-03-30 07:53:02 [DEBUG] clck_gen.py:128 IND CLOCK 1632
2025-03-30 07:53:03 [DEBUG] clck_gen.py:128 IND CLOCK 1734
2025-03-30 07:53:03 [DEBUG] clck_gen.py:128 IND CLOCK 1836
2025-03-30 07:53:04 [DEBUG] clck_gen.py:128 IND CLOCK 1938
2025-03-30 07:53:04 [DEBUG] clck_gen.py:128 IND CLOCK 2040
2025-03-30 07:53:04 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:53:04 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:53:04 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:53:04 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:53:04 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:53:04 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:53:04 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:53:04 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:53:04 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:53:04 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:53:04 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 07:53:04 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 07:53:04 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 07:53:04 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=2082 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:53:09 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 07:53:09 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 07:53:09 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:53:09 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:53:09 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:53:09 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:53:09 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:53:09 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 07:53:09 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:53:09 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 07:53:09 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 07:53:09 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 07:53:09 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 07:53:09 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 07:53:09 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:53:09 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:53:09 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 07:53:09 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 07:53:09 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 07:53:09 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 07:53:09 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 07:53:09 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 07:53:09 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:53:09 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:53:09 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 07:53:09 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 07:53:09 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 07:53:09 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 07:53:09 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 07:53:09 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 07:53:09 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:53:09 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:53:09 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 07:53:09 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 07:53:09 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 07:53:09 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 07:53:09 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 07:53:09 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 07:53:09 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 07:53:09 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 07:53:09 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 07:53:09 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 07:53:09 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 07:53:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 07:53:09 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:53:09 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:53:09 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 07:53:09 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:53:09 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:53:09 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:53:09 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 07:53:09 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 07:53:09 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 07:53:09 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 07:53:09 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:53:09 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:53:09 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:53:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 07:53:09 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:53:09 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:53:09 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:53:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:53:09 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:53:09 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:53:09 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:53:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:53:09 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:53:09 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:53:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:53:09 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:53:09 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:53:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:53:09 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:53:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:53:09 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:53:09 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:53:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:53:09 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:53:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:53:09 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:53:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:53:09 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:53:09 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-03-30 07:53:10 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-03-30 07:53:10 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-03-30 07:53:10 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-03-30 07:53:10 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-03-30 07:53:10 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-03-30 07:53:10 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-03-30 07:53:10 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-03-30 07:53:10 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-03-30 07:53:10 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-03-30 07:53:10 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=0 bl=148 pwr=0
2025-03-30 07:53:10 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=1 bl=148 pwr=0
2025-03-30 07:53:10 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=2 bl=148 pwr=0
2025-03-30 07:53:10 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=3 bl=148 pwr=0
2025-03-30 07:53:10 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=4 bl=148 pwr=0
2025-03-30 07:53:10 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=5 bl=148 pwr=0
2025-03-30 07:53:10 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=6 bl=148 pwr=0
2025-03-30 07:53:10 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=7 bl=148 pwr=0
2025-03-30 07:53:10 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 07:53:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:53:10 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 07:53:10 [DEBUG] fake_trx.py:317 (BTS@172.18.26.20:5700) Recv FAKE_CI cmd
2025-03-30 07:53:10 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:53:10 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:53:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:53:10 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-03-30 07:53:10 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:53:10 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:53:10 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:53:10 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:53:11 [DEBUG] clck_gen.py:128 IND CLOCK 306
2025-03-30 07:53:11 [DEBUG] clck_gen.py:128 IND CLOCK 408
2025-03-30 07:53:11 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:53:11 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:53:11 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:53:11 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:53:12 [DEBUG] clck_gen.py:128 IND CLOCK 510
2025-03-30 07:53:12 [DEBUG] clck_gen.py:128 IND CLOCK 612
2025-03-30 07:53:12 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:53:12 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:53:12 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:53:12 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:53:13 [DEBUG] clck_gen.py:128 IND CLOCK 714
2025-03-30 07:53:13 [DEBUG] clck_gen.py:128 IND CLOCK 816
2025-03-30 07:53:13 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:53:13 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:53:13 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:53:13 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:53:14 [DEBUG] clck_gen.py:128 IND CLOCK 918
2025-03-30 07:53:14 [DEBUG] clck_gen.py:128 IND CLOCK 1020
2025-03-30 07:53:14 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:53:14 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:53:14 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:53:14 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:53:15 [DEBUG] clck_gen.py:128 IND CLOCK 1122
2025-03-30 07:53:15 [DEBUG] clck_gen.py:128 IND CLOCK 1224
2025-03-30 07:53:16 [DEBUG] clck_gen.py:128 IND CLOCK 1326
2025-03-30 07:53:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:53:16 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:53:16 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:53:16 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 07:53:16 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 07:53:16 [DEBUG] clck_gen.py:128 IND CLOCK 1428
2025-03-30 07:53:16 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD NOHANDOVER
2025-03-30 07:53:16 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:53:16 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:53:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:53:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:53:16 [DEBUG] clck_gen.py:128 IND CLOCK 1530
2025-03-30 07:53:17 [DEBUG] clck_gen.py:128 IND CLOCK 1632
2025-03-30 07:53:17 [DEBUG] clck_gen.py:128 IND CLOCK 1734
2025-03-30 07:53:18 [DEBUG] clck_gen.py:128 IND CLOCK 1836
2025-03-30 07:53:18 [DEBUG] clck_gen.py:128 IND CLOCK 1938
2025-03-30 07:53:19 [DEBUG] clck_gen.py:128 IND CLOCK 2040
2025-03-30 07:53:19 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:53:19 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:53:19 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:53:19 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:53:19 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:53:19 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:53:19 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:53:19 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:53:19 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:53:19 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:53:19 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 07:53:19 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 07:53:19 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 07:53:24 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 07:53:24 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 07:53:24 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:53:24 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:53:24 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:53:24 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:53:24 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:53:24 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 07:53:24 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:53:24 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 07:53:24 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 07:53:24 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 07:53:24 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 07:53:24 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 07:53:24 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:53:24 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:53:24 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 07:53:24 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 07:53:24 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 07:53:24 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 07:53:24 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 07:53:24 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 07:53:24 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:53:24 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:53:24 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 07:53:24 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 07:53:24 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 07:53:24 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 07:53:24 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 07:53:24 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 07:53:24 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:53:24 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:53:24 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 07:53:24 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 07:53:24 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 07:53:24 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 07:53:24 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 07:53:24 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 07:53:24 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 07:53:24 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 07:53:24 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 07:53:24 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 07:53:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 07:53:24 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:53:24 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 07:53:24 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 07:53:24 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:53:24 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:53:24 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 07:53:24 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 07:53:24 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 07:53:24 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 07:53:24 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:53:24 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:53:24 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:53:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 07:53:24 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:53:24 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:53:24 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:53:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:53:24 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:53:24 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:53:24 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:53:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:53:24 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:53:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:53:24 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:53:24 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:53:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:53:24 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:53:24 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:53:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:53:24 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:53:24 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:53:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:53:24 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:53:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:53:24 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:53:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:53:24 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:53:24 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:53:24 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:53:24 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-03-30 07:53:25 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-03-30 07:53:25 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-03-30 07:53:25 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-03-30 07:53:25 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-03-30 07:53:25 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-03-30 07:53:25 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-03-30 07:53:25 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-03-30 07:53:25 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-03-30 07:53:25 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-03-30 07:53:25 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=0 bl=148 pwr=0
2025-03-30 07:53:25 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=1 bl=148 pwr=0
2025-03-30 07:53:25 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=2 bl=148 pwr=0
2025-03-30 07:53:25 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=3 bl=148 pwr=0
2025-03-30 07:53:25 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=4 bl=148 pwr=0
2025-03-30 07:53:25 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=5 bl=148 pwr=0
2025-03-30 07:53:25 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=6 bl=148 pwr=0
2025-03-30 07:53:25 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=7 bl=148 pwr=0
2025-03-30 07:53:25 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 07:53:25 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 07:53:25 [DEBUG] fake_trx.py:317 (BTS@172.18.26.20:5700) Recv FAKE_CI cmd
2025-03-30 07:53:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:53:25 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:53:25 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:53:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:53:25 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-03-30 07:53:25 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:53:25 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:53:25 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:53:25 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:53:25 [DEBUG] clck_gen.py:128 IND CLOCK 306
2025-03-30 07:53:26 [DEBUG] clck_gen.py:128 IND CLOCK 408
2025-03-30 07:53:26 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:53:26 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:53:26 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:53:26 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:53:26 [DEBUG] clck_gen.py:128 IND CLOCK 510
2025-03-30 07:53:27 [DEBUG] clck_gen.py:128 IND CLOCK 612
2025-03-30 07:53:27 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:53:27 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:53:27 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:53:27 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:53:27 [DEBUG] clck_gen.py:128 IND CLOCK 714
2025-03-30 07:53:28 [DEBUG] clck_gen.py:128 IND CLOCK 816
2025-03-30 07:53:28 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:53:28 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:53:28 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:53:28 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:53:28 [DEBUG] clck_gen.py:128 IND CLOCK 918
2025-03-30 07:53:29 [DEBUG] clck_gen.py:128 IND CLOCK 1020
2025-03-30 07:53:29 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:53:29 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:53:29 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:53:29 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:53:29 [DEBUG] clck_gen.py:128 IND CLOCK 1122
2025-03-30 07:53:30 [DEBUG] clck_gen.py:128 IND CLOCK 1224
2025-03-30 07:53:30 [DEBUG] clck_gen.py:128 IND CLOCK 1326
2025-03-30 07:53:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:53:31 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:53:31 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:53:31 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 07:53:31 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 07:53:31 [DEBUG] clck_gen.py:128 IND CLOCK 1428
2025-03-30 07:53:31 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD NOHANDOVER
2025-03-30 07:53:31 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:53:31 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:53:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:53:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:53:31 [DEBUG] clck_gen.py:128 IND CLOCK 1530
2025-03-30 07:53:32 [DEBUG] clck_gen.py:128 IND CLOCK 1632
2025-03-30 07:53:32 [DEBUG] clck_gen.py:128 IND CLOCK 1734
2025-03-30 07:53:33 [DEBUG] clck_gen.py:128 IND CLOCK 1836
2025-03-30 07:53:33 [DEBUG] clck_gen.py:128 IND CLOCK 1938
2025-03-30 07:53:33 [DEBUG] clck_gen.py:128 IND CLOCK 2040
2025-03-30 07:53:34 [WARNING] transceiver.py:330 (MS@172.18.26.22:6700) Stale TRXD message (fn=2079): fn=2078 tn=0 bl=148 pwr=0
2025-03-30 07:53:34 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:53:34 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:53:34 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:53:34 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:53:34 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:53:34 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:53:34 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:53:34 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:53:34 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:53:34 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:53:34 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 07:53:34 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 07:53:34 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 07:53:39 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 07:53:39 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 07:53:39 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:53:39 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:53:39 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:53:39 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:53:39 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:53:39 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 07:53:39 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:53:39 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 07:53:39 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 07:53:39 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 07:53:39 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 07:53:39 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 07:53:39 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:53:39 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:53:39 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 07:53:39 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 07:53:39 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 07:53:39 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 07:53:39 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 07:53:39 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 07:53:39 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:53:39 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:53:39 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 07:53:39 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 07:53:39 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 07:53:39 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 07:53:39 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 07:53:39 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 07:53:39 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:53:39 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:53:39 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 07:53:39 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 07:53:39 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 07:53:39 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 07:53:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 07:53:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 07:53:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 07:53:39 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 07:53:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 07:53:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 07:53:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 07:53:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:53:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 07:53:39 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 07:53:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:53:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:53:39 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 07:53:39 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 07:53:39 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 07:53:39 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 07:53:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:53:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:53:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:53:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 07:53:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:53:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:53:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:53:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:53:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:53:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:53:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:53:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:53:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:53:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:53:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:53:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:53:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:53:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:53:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:53:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:53:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:53:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:53:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:53:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:53:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:53:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:53:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:53:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:53:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:53:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:53:39 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-03-30 07:53:39 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-03-30 07:53:39 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-03-30 07:53:39 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-03-30 07:53:39 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-03-30 07:53:39 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-03-30 07:53:39 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-03-30 07:53:39 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-03-30 07:53:39 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-03-30 07:53:39 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-03-30 07:53:39 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=105 tn=0 bl=148 pwr=0
2025-03-30 07:53:39 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=105 tn=1 bl=148 pwr=0
2025-03-30 07:53:39 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=105 tn=2 bl=148 pwr=0
2025-03-30 07:53:39 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=105 tn=3 bl=148 pwr=0
2025-03-30 07:53:39 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=105 tn=4 bl=148 pwr=0
2025-03-30 07:53:39 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=105 tn=5 bl=148 pwr=0
2025-03-30 07:53:39 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=105 tn=6 bl=148 pwr=0
2025-03-30 07:53:39 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=105 tn=7 bl=148 pwr=0
2025-03-30 07:53:39 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=106 tn=0 bl=148 pwr=0
2025-03-30 07:53:39 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=106 tn=1 bl=148 pwr=0
2025-03-30 07:53:39 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=106 tn=2 bl=148 pwr=0
2025-03-30 07:53:39 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=106 tn=3 bl=148 pwr=0
2025-03-30 07:53:39 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=106 tn=4 bl=148 pwr=0
2025-03-30 07:53:39 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=106 tn=5 bl=148 pwr=0
2025-03-30 07:53:39 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=106 tn=6 bl=148 pwr=0
2025-03-30 07:53:39 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=106 tn=7 bl=148 pwr=0
2025-03-30 07:53:39 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=107 tn=0 bl=148 pwr=0
2025-03-30 07:53:39 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=107 tn=1 bl=148 pwr=0
2025-03-30 07:53:39 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=107 tn=2 bl=148 pwr=0
2025-03-30 07:53:39 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=107 tn=3 bl=148 pwr=0
2025-03-30 07:53:39 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=107 tn=4 bl=148 pwr=0
2025-03-30 07:53:39 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=107 tn=5 bl=148 pwr=0
2025-03-30 07:53:39 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=107 tn=6 bl=148 pwr=0
2025-03-30 07:53:39 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=107 tn=7 bl=148 pwr=0
2025-03-30 07:53:39 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 07:53:39 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 07:53:39 [DEBUG] fake_trx.py:317 (BTS@172.18.26.20:5700) Recv FAKE_CI cmd
2025-03-30 07:53:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:53:39 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:53:39 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:53:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:53:40 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-03-30 07:53:40 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:53:40 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:53:40 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:53:40 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:53:40 [DEBUG] clck_gen.py:128 IND CLOCK 306
2025-03-30 07:53:41 [DEBUG] clck_gen.py:128 IND CLOCK 408
2025-03-30 07:53:41 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:53:41 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:53:41 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:53:41 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:53:41 [DEBUG] clck_gen.py:128 IND CLOCK 510
2025-03-30 07:53:42 [DEBUG] clck_gen.py:128 IND CLOCK 612
2025-03-30 07:53:42 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:53:42 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:53:42 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:53:42 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:53:42 [DEBUG] clck_gen.py:128 IND CLOCK 714
2025-03-30 07:53:42 [DEBUG] clck_gen.py:128 IND CLOCK 816
2025-03-30 07:53:43 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:53:43 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:53:43 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:53:43 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:53:43 [DEBUG] clck_gen.py:128 IND CLOCK 918
2025-03-30 07:53:43 [DEBUG] clck_gen.py:128 IND CLOCK 1020
2025-03-30 07:53:44 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:53:44 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:53:44 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:53:44 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:53:44 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=1091): ver=1 fn=1088 tn=0 bl=148 pwr=0
2025-03-30 07:53:44 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=1091): ver=1 fn=1088 tn=1 bl=148 pwr=0
2025-03-30 07:53:44 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=1091): ver=1 fn=1088 tn=2 bl=148 pwr=0
2025-03-30 07:53:44 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=1091): ver=1 fn=1088 tn=3 bl=148 pwr=0
2025-03-30 07:53:44 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=1091): ver=1 fn=1088 tn=4 bl=148 pwr=0
2025-03-30 07:53:44 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=1091): ver=1 fn=1088 tn=5 bl=148 pwr=0
2025-03-30 07:53:44 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=1091): ver=1 fn=1088 tn=6 bl=148 pwr=0
2025-03-30 07:53:44 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=1091): ver=1 fn=1088 tn=7 bl=148 pwr=0
2025-03-30 07:53:44 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=1091): ver=1 fn=1089 tn=0 bl=148 pwr=0
2025-03-30 07:53:44 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=1091): ver=1 fn=1089 tn=1 bl=148 pwr=0
2025-03-30 07:53:44 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=1091): ver=1 fn=1089 tn=2 bl=148 pwr=0
2025-03-30 07:53:44 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=1091): ver=1 fn=1089 tn=3 bl=148 pwr=0
2025-03-30 07:53:44 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=1091): ver=1 fn=1089 tn=4 bl=148 pwr=0
2025-03-30 07:53:44 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=1091): ver=1 fn=1089 tn=5 bl=148 pwr=0
2025-03-30 07:53:44 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=1091): ver=1 fn=1089 tn=6 bl=148 pwr=0
2025-03-30 07:53:44 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=1091): ver=1 fn=1089 tn=7 bl=148 pwr=0
2025-03-30 07:53:44 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=1091): ver=1 fn=1090 tn=0 bl=148 pwr=0
2025-03-30 07:53:44 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=1091): ver=1 fn=1090 tn=1 bl=148 pwr=0
2025-03-30 07:53:44 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=1091): ver=1 fn=1090 tn=2 bl=148 pwr=0
2025-03-30 07:53:44 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=1091): ver=1 fn=1090 tn=3 bl=148 pwr=0
2025-03-30 07:53:44 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=1091): ver=1 fn=1090 tn=4 bl=148 pwr=0
2025-03-30 07:53:44 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=1091): ver=1 fn=1090 tn=5 bl=148 pwr=0
2025-03-30 07:53:44 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=1091): ver=1 fn=1090 tn=6 bl=148 pwr=0
2025-03-30 07:53:44 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=1091): ver=1 fn=1090 tn=7 bl=148 pwr=0
2025-03-30 07:53:44 [DEBUG] clck_gen.py:128 IND CLOCK 1122
2025-03-30 07:53:44 [DEBUG] clck_gen.py:128 IND CLOCK 1224
2025-03-30 07:53:45 [DEBUG] clck_gen.py:128 IND CLOCK 1326
2025-03-30 07:53:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:53:45 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:53:45 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:53:45 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 07:53:45 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 07:53:45 [DEBUG] clck_gen.py:128 IND CLOCK 1428
2025-03-30 07:53:45 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD NOHANDOVER
2025-03-30 07:53:45 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:53:45 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:53:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:53:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:53:46 [DEBUG] clck_gen.py:128 IND CLOCK 1530
2025-03-30 07:53:46 [DEBUG] clck_gen.py:128 IND CLOCK 1632
2025-03-30 07:53:47 [DEBUG] clck_gen.py:128 IND CLOCK 1734
2025-03-30 07:53:47 [DEBUG] clck_gen.py:128 IND CLOCK 1836
2025-03-30 07:53:48 [DEBUG] clck_gen.py:128 IND CLOCK 1938
2025-03-30 07:53:48 [DEBUG] clck_gen.py:128 IND CLOCK 2040
2025-03-30 07:53:48 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:53:48 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:53:48 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:53:48 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:53:48 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:53:48 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:53:48 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:53:48 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:53:48 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:53:48 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:53:48 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 07:53:48 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 07:53:48 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 07:53:48 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=2081 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:53:48 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=2081 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:53:48 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=2081 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:53:48 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=2081 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:53:48 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=2081 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:53:48 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=2081 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:53:53 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 07:53:53 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 07:53:53 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:53:53 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:53:53 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:53:53 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:53:53 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:53:53 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 07:53:53 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:53:53 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 07:53:53 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 07:53:53 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 07:53:53 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 07:53:53 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 07:53:53 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:53:53 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 07:53:53 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:53:53 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 07:53:53 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 07:53:53 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 07:53:53 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 07:53:53 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 07:53:53 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:53:53 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:53:53 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 07:53:53 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 07:53:53 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 07:53:53 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 07:53:53 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 07:53:53 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 07:53:53 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:53:53 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:53:53 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 07:53:53 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 07:53:53 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 07:53:53 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 07:53:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 07:53:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 07:53:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 07:53:53 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 07:53:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 07:53:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 07:53:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 07:53:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:53:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 07:53:53 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 07:53:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:53:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:53:53 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 07:53:53 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 07:53:53 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 07:53:53 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 07:53:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:53:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:53:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:53:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 07:53:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:53:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:53:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:53:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:53:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:53:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:53:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:53:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:53:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:53:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:53:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:53:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:53:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:53:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:53:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:53:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:53:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:53:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:53:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:53:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:53:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:53:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:53:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:53:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:53:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:53:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:53:53 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-03-30 07:53:54 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-03-30 07:53:54 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-03-30 07:53:54 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-03-30 07:53:54 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-03-30 07:53:54 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-03-30 07:53:54 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-03-30 07:53:54 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-03-30 07:53:54 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-03-30 07:53:54 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-03-30 07:53:54 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=0 bl=148 pwr=0
2025-03-30 07:53:54 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=1 bl=148 pwr=0
2025-03-30 07:53:54 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=2 bl=148 pwr=0
2025-03-30 07:53:54 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=3 bl=148 pwr=0
2025-03-30 07:53:54 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=4 bl=148 pwr=0
2025-03-30 07:53:54 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=5 bl=148 pwr=0
2025-03-30 07:53:54 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=6 bl=148 pwr=0
2025-03-30 07:53:54 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=7 bl=148 pwr=0
2025-03-30 07:53:54 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 07:53:54 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 07:53:54 [DEBUG] fake_trx.py:317 (BTS@172.18.26.20:5700) Recv FAKE_CI cmd
2025-03-30 07:53:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:53:54 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-03-30 07:53:54 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:53:54 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:53:54 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:53:54 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:53:55 [DEBUG] clck_gen.py:128 IND CLOCK 306
2025-03-30 07:53:55 [DEBUG] clck_gen.py:128 IND CLOCK 408
2025-03-30 07:53:55 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:53:55 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:53:55 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:53:55 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:53:56 [DEBUG] clck_gen.py:128 IND CLOCK 510
2025-03-30 07:53:56 [DEBUG] clck_gen.py:128 IND CLOCK 612
2025-03-30 07:53:56 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:53:56 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:53:56 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:53:56 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:53:57 [DEBUG] clck_gen.py:128 IND CLOCK 714
2025-03-30 07:53:57 [WARNING] clck_gen.py:108 CLCKGen: time overrun by -46us; resetting the clock
2025-03-30 07:53:57 [DEBUG] clck_gen.py:128 IND CLOCK 816
2025-03-30 07:53:57 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:53:57 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:53:57 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:53:57 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:53:58 [DEBUG] clck_gen.py:128 IND CLOCK 918
2025-03-30 07:53:58 [DEBUG] clck_gen.py:128 IND CLOCK 1020
2025-03-30 07:53:58 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:53:58 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:53:58 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:53:58 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:53:59 [DEBUG] clck_gen.py:128 IND CLOCK 1122
2025-03-30 07:53:59 [DEBUG] clck_gen.py:128 IND CLOCK 1224
2025-03-30 07:53:59 [DEBUG] clck_gen.py:128 IND CLOCK 1326
2025-03-30 07:54:00 [DEBUG] clck_gen.py:128 IND CLOCK 1428
2025-03-30 07:54:00 [DEBUG] clck_gen.py:128 IND CLOCK 1530
2025-03-30 07:54:01 [DEBUG] clck_gen.py:128 IND CLOCK 1632
2025-03-30 07:54:01 [DEBUG] clck_gen.py:128 IND CLOCK 1734
2025-03-30 07:54:02 [DEBUG] clck_gen.py:128 IND CLOCK 1836
2025-03-30 07:54:02 [DEBUG] clck_gen.py:128 IND CLOCK 1938
2025-03-30 07:54:03 [DEBUG] clck_gen.py:128 IND CLOCK 2040
2025-03-30 07:54:03 [DEBUG] clck_gen.py:128 IND CLOCK 2142
2025-03-30 07:54:04 [DEBUG] clck_gen.py:128 IND CLOCK 2244
2025-03-30 07:54:04 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:54:04 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:54:04 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:54:04 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:54:04 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:54:04 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:54:04 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:54:04 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:54:04 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 07:54:04 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 07:54:04 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 07:54:04 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=2285 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:54:04 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=2285 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:54:04 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=2285 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:54:04 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=2285 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:54:04 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=2285 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:54:04 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=2285 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:54:04 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=2285 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:54:04 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=2285 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:54:09 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 07:54:09 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 07:54:09 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:54:09 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:54:09 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:54:09 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:54:09 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:54:09 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 07:54:09 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:54:09 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 07:54:09 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 07:54:09 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 07:54:09 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 07:54:09 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 07:54:09 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:54:09 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:54:09 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 07:54:09 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 07:54:09 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 07:54:09 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 07:54:09 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 07:54:09 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 07:54:09 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:54:09 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:54:09 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 07:54:09 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 07:54:09 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 07:54:09 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 07:54:09 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 07:54:09 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 07:54:09 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:54:09 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:54:09 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 07:54:09 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 07:54:09 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 07:54:09 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 07:54:09 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 07:54:09 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 07:54:09 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 07:54:09 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 07:54:09 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 07:54:09 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 07:54:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 07:54:09 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:54:09 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 07:54:09 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 07:54:09 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:54:09 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:54:09 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:54:09 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 07:54:09 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 07:54:09 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 07:54:09 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 07:54:09 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:54:09 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:54:09 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:54:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 07:54:09 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:54:09 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:54:09 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:54:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:54:09 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:54:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:54:09 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:54:09 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:54:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:54:09 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:54:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:54:09 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:54:09 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:54:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:54:09 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:54:09 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:54:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:54:09 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:54:09 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:54:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:54:09 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:54:09 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:54:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:54:09 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:54:09 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:54:09 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:54:09 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:54:09 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 07:54:09 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 07:54:09 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 07:54:09 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:54:14 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 07:54:14 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 07:54:14 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:54:14 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:54:14 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:54:14 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:54:14 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:54:14 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 07:54:14 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:54:14 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 07:54:14 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 07:54:14 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 07:54:14 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 07:54:14 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 07:54:14 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:54:14 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:54:14 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 07:54:14 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 07:54:14 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 07:54:14 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 07:54:14 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 07:54:14 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 07:54:14 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:54:14 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:54:14 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 07:54:14 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 07:54:14 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 07:54:14 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 07:54:14 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 07:54:14 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 07:54:14 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:54:14 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:54:14 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 07:54:14 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 07:54:14 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 07:54:14 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 07:54:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 07:54:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 07:54:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 07:54:14 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 07:54:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 07:54:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 07:54:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 07:54:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:54:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 07:54:14 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 07:54:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:54:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:54:14 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 07:54:14 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 07:54:14 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 07:54:14 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 07:54:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:54:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:54:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:54:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 07:54:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:54:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:54:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:54:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:54:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:54:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:54:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:54:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:54:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:54:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:54:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:54:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:54:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:54:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:54:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:54:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:54:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:54:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:54:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:54:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:54:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:54:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:54:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:54:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:54:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:54:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:54:14 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-03-30 07:54:14 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-03-30 07:54:14 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-03-30 07:54:14 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-03-30 07:54:14 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-03-30 07:54:14 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-03-30 07:54:14 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-03-30 07:54:14 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-03-30 07:54:14 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-03-30 07:54:14 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-03-30 07:54:14 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=0 bl=148 pwr=0
2025-03-30 07:54:14 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=1 bl=148 pwr=0
2025-03-30 07:54:14 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=2 bl=148 pwr=0
2025-03-30 07:54:14 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=3 bl=148 pwr=0
2025-03-30 07:54:14 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=4 bl=148 pwr=0
2025-03-30 07:54:14 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=5 bl=148 pwr=0
2025-03-30 07:54:14 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=6 bl=148 pwr=0
2025-03-30 07:54:14 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=7 bl=148 pwr=0
2025-03-30 07:54:14 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 07:54:14 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 07:54:14 [DEBUG] fake_trx.py:317 (BTS@172.18.26.20:5700) Recv FAKE_CI cmd
2025-03-30 07:54:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:54:14 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:54:14 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:54:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:54:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:54:14 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:54:14 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:54:14 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 07:54:14 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 07:54:15 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-03-30 07:54:15 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:54:15 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:54:15 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:54:15 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:54:15 [DEBUG] clck_gen.py:128 IND CLOCK 306
2025-03-30 07:54:16 [DEBUG] clck_gen.py:128 IND CLOCK 408
2025-03-30 07:54:16 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:54:16 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:54:16 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:54:16 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:54:16 [DEBUG] clck_gen.py:128 IND CLOCK 510
2025-03-30 07:54:17 [DEBUG] clck_gen.py:128 IND CLOCK 612
2025-03-30 07:54:17 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:54:17 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:54:17 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:54:17 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:54:17 [DEBUG] clck_gen.py:128 IND CLOCK 714
2025-03-30 07:54:18 [DEBUG] clck_gen.py:128 IND CLOCK 816
2025-03-30 07:54:18 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:54:18 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:54:18 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:54:18 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:54:18 [DEBUG] clck_gen.py:128 IND CLOCK 918
2025-03-30 07:54:19 [DEBUG] clck_gen.py:128 IND CLOCK 1020
2025-03-30 07:54:19 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:54:19 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:54:19 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:54:19 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:54:19 [DEBUG] clck_gen.py:128 IND CLOCK 1122
2025-03-30 07:54:20 [DEBUG] clck_gen.py:128 IND CLOCK 1224
2025-03-30 07:54:20 [DEBUG] clck_gen.py:128 IND CLOCK 1326
2025-03-30 07:54:21 [DEBUG] clck_gen.py:128 IND CLOCK 1428
2025-03-30 07:54:21 [DEBUG] clck_gen.py:128 IND CLOCK 1530
2025-03-30 07:54:21 [DEBUG] clck_gen.py:128 IND CLOCK 1632
2025-03-30 07:54:22 [DEBUG] clck_gen.py:128 IND CLOCK 1734
2025-03-30 07:54:22 [DEBUG] clck_gen.py:128 IND CLOCK 1836
2025-03-30 07:54:23 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:54:23 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:54:23 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:54:23 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:54:23 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:54:23 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:54:23 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:54:23 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:54:23 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:54:23 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:54:23 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 07:54:23 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 07:54:23 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 07:54:28 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 07:54:28 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 07:54:28 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:54:28 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:54:28 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:54:28 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:54:28 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:54:28 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 07:54:28 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:54:28 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 07:54:28 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 07:54:28 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 07:54:28 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 07:54:28 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 07:54:28 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:54:28 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:54:28 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 07:54:28 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 07:54:28 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 07:54:28 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 07:54:28 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 07:54:28 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 07:54:28 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:54:28 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 07:54:28 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:54:28 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 07:54:28 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 07:54:28 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 07:54:28 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 07:54:28 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 07:54:28 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:54:28 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 07:54:28 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:54:28 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 07:54:28 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 07:54:28 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 07:54:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 07:54:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 07:54:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 07:54:28 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 07:54:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 07:54:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 07:54:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 07:54:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:54:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 07:54:28 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 07:54:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:54:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:54:28 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 07:54:28 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 07:54:28 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 07:54:28 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 07:54:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:54:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:54:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:54:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 07:54:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:54:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:54:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:54:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:54:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:54:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:54:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:54:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:54:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:54:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:54:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:54:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:54:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:54:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:54:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:54:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:54:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:54:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:54:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:54:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:54:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:54:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:54:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:54:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:54:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:54:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:54:28 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:54:28 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:54:28 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:54:28 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:54:28 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 07:54:28 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 07:54:28 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 07:54:33 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 07:54:33 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 07:54:33 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:54:33 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:54:33 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:54:33 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:54:33 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:54:33 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 07:54:33 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:54:33 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 07:54:33 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 07:54:33 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 07:54:33 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 07:54:33 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 07:54:33 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:54:33 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:54:33 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 07:54:33 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 07:54:33 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 07:54:33 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 07:54:33 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 07:54:33 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 07:54:33 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:54:33 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:54:33 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 07:54:33 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 07:54:33 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 07:54:33 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 07:54:33 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 07:54:33 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 07:54:33 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:54:33 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:54:33 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 07:54:33 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 07:54:33 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 07:54:33 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 07:54:33 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 07:54:33 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 07:54:33 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 07:54:33 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 07:54:33 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 07:54:33 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 07:54:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 07:54:33 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:54:33 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 07:54:33 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 07:54:33 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:54:33 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:54:33 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 07:54:33 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 07:54:33 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 07:54:33 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 07:54:33 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:54:33 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:54:33 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:54:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 07:54:33 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:54:33 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:54:33 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:54:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:54:33 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:54:33 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:54:33 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:54:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:54:33 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:54:33 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:54:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:54:33 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:54:33 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:54:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:54:33 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:54:33 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:54:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:54:33 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:54:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:54:33 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:54:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:54:33 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:54:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:54:33 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:54:33 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:54:33 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:54:33 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-03-30 07:54:33 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-03-30 07:54:33 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-03-30 07:54:33 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-03-30 07:54:33 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-03-30 07:54:33 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-03-30 07:54:33 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-03-30 07:54:33 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-03-30 07:54:33 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-03-30 07:54:33 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-03-30 07:54:33 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=0 bl=148 pwr=0
2025-03-30 07:54:33 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=1 bl=148 pwr=0
2025-03-30 07:54:33 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=2 bl=148 pwr=0
2025-03-30 07:54:33 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=3 bl=148 pwr=0
2025-03-30 07:54:33 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=4 bl=148 pwr=0
2025-03-30 07:54:33 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=5 bl=148 pwr=0
2025-03-30 07:54:33 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=6 bl=148 pwr=0
2025-03-30 07:54:33 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=7 bl=148 pwr=0
2025-03-30 07:54:33 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 07:54:33 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 07:54:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:54:33 [DEBUG] fake_trx.py:317 (BTS@172.18.26.20:5700) Recv FAKE_CI cmd
2025-03-30 07:54:33 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:54:33 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:54:33 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:54:33 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:54:33 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:54:33 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:54:33 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 07:54:33 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 07:54:34 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-03-30 07:54:34 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:54:34 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:54:34 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:54:34 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:54:34 [DEBUG] clck_gen.py:128 IND CLOCK 306
2025-03-30 07:54:35 [DEBUG] clck_gen.py:128 IND CLOCK 408
2025-03-30 07:54:35 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:54:35 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:54:35 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:54:35 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:54:35 [DEBUG] clck_gen.py:128 IND CLOCK 510
2025-03-30 07:54:35 [DEBUG] clck_gen.py:128 IND CLOCK 612
2025-03-30 07:54:36 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:54:36 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:54:36 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:54:36 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:54:36 [DEBUG] clck_gen.py:128 IND CLOCK 714
2025-03-30 07:54:36 [DEBUG] clck_gen.py:128 IND CLOCK 816
2025-03-30 07:54:37 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:54:37 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:54:37 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:54:37 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:54:37 [DEBUG] clck_gen.py:128 IND CLOCK 918
2025-03-30 07:54:37 [DEBUG] clck_gen.py:128 IND CLOCK 1020
2025-03-30 07:54:38 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:54:38 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:54:38 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:54:38 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:54:38 [DEBUG] clck_gen.py:128 IND CLOCK 1122
2025-03-30 07:54:38 [DEBUG] clck_gen.py:128 IND CLOCK 1224
2025-03-30 07:54:39 [DEBUG] clck_gen.py:128 IND CLOCK 1326
2025-03-30 07:54:39 [DEBUG] clck_gen.py:128 IND CLOCK 1428
2025-03-30 07:54:40 [DEBUG] clck_gen.py:128 IND CLOCK 1530
2025-03-30 07:54:40 [DEBUG] clck_gen.py:128 IND CLOCK 1632
2025-03-30 07:54:41 [DEBUG] clck_gen.py:128 IND CLOCK 1734
2025-03-30 07:54:41 [DEBUG] clck_gen.py:128 IND CLOCK 1836
2025-03-30 07:54:41 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:54:41 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:54:41 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:54:41 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:54:41 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:54:41 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:54:41 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:54:41 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:54:41 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:54:41 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:54:41 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 07:54:41 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 07:54:41 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 07:54:46 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 07:54:46 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 07:54:46 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:54:46 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:54:46 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:54:46 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:54:46 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:54:46 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 07:54:46 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:54:46 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 07:54:46 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 07:54:46 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 07:54:46 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 07:54:46 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 07:54:46 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:54:46 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:54:46 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 07:54:46 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 07:54:46 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 07:54:46 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 07:54:46 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 07:54:46 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 07:54:46 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:54:46 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:54:46 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 07:54:46 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 07:54:46 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 07:54:46 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 07:54:46 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 07:54:46 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 07:54:46 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:54:46 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:54:46 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 07:54:46 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 07:54:46 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 07:54:46 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 07:54:46 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 07:54:46 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 07:54:46 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 07:54:46 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 07:54:46 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 07:54:46 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 07:54:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 07:54:46 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:54:46 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 07:54:46 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 07:54:46 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:54:46 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:54:46 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 07:54:46 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 07:54:46 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 07:54:46 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 07:54:46 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:54:46 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:54:46 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:54:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 07:54:46 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:54:46 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:54:46 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:54:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:54:46 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:54:46 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:54:46 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:54:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:54:46 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:54:46 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:54:46 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:54:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:54:46 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:54:46 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:54:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:54:46 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:54:46 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:54:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:54:46 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:54:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:54:46 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:54:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:54:46 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:54:46 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:54:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:54:46 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:54:46 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:54:46 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:54:46 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:54:46 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:54:46 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 07:54:46 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 07:54:46 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 07:54:51 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 07:54:51 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 07:54:51 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:54:51 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:54:51 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:54:51 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:54:51 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:54:51 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 07:54:51 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:54:51 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 07:54:51 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 07:54:51 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 07:54:51 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 07:54:51 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 07:54:51 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:54:51 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:54:51 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 07:54:51 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 07:54:51 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 07:54:51 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 07:54:51 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 07:54:51 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 07:54:51 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:54:51 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:54:51 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 07:54:51 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 07:54:51 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 07:54:51 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 07:54:51 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 07:54:51 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 07:54:51 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:54:51 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:54:51 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 07:54:51 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 07:54:51 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 07:54:51 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 07:54:51 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 07:54:51 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 07:54:51 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 07:54:51 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 07:54:51 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 07:54:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 07:54:51 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 07:54:51 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 07:54:51 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 07:54:51 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:54:51 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:54:51 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 07:54:51 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 07:54:51 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 07:54:51 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 07:54:51 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:54:51 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:54:51 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:54:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 07:54:51 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:54:51 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:54:51 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:54:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:54:51 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:54:51 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:54:51 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:54:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:54:51 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:54:51 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:54:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:54:51 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:54:51 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:54:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:54:51 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:54:51 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:54:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:54:51 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:54:51 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:54:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:54:51 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:54:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:54:51 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:54:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:54:51 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:54:51 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:54:51 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:54:51 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-03-30 07:54:52 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-03-30 07:54:52 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-03-30 07:54:52 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-03-30 07:54:52 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-03-30 07:54:52 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-03-30 07:54:52 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-03-30 07:54:52 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-03-30 07:54:52 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-03-30 07:54:52 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-03-30 07:54:52 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=0 bl=148 pwr=0
2025-03-30 07:54:52 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=1 bl=148 pwr=0
2025-03-30 07:54:52 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=2 bl=148 pwr=0
2025-03-30 07:54:52 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=3 bl=148 pwr=0
2025-03-30 07:54:52 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=4 bl=148 pwr=0
2025-03-30 07:54:52 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=5 bl=148 pwr=0
2025-03-30 07:54:52 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=6 bl=148 pwr=0
2025-03-30 07:54:52 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=7 bl=148 pwr=0
2025-03-30 07:54:52 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 07:54:52 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 07:54:52 [DEBUG] fake_trx.py:317 (BTS@172.18.26.20:5700) Recv FAKE_CI cmd
2025-03-30 07:54:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:54:52 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:54:52 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:54:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:54:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:54:52 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:54:52 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:54:52 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 07:54:52 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 07:54:52 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-03-30 07:54:52 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:54:52 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:54:52 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:54:52 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:54:53 [DEBUG] clck_gen.py:128 IND CLOCK 306
2025-03-30 07:54:53 [DEBUG] clck_gen.py:128 IND CLOCK 408
2025-03-30 07:54:53 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:54:53 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:54:53 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:54:53 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:54:54 [DEBUG] clck_gen.py:128 IND CLOCK 510
2025-03-30 07:54:54 [DEBUG] clck_gen.py:128 IND CLOCK 612
2025-03-30 07:54:54 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:54:54 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:54:54 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:54:54 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:54:55 [DEBUG] clck_gen.py:128 IND CLOCK 714
2025-03-30 07:54:55 [DEBUG] clck_gen.py:128 IND CLOCK 816
2025-03-30 07:54:55 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:54:55 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:54:55 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:54:55 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:54:56 [DEBUG] clck_gen.py:128 IND CLOCK 918
2025-03-30 07:54:56 [DEBUG] clck_gen.py:128 IND CLOCK 1020
2025-03-30 07:54:56 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:54:56 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:54:56 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:54:56 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:54:56 [DEBUG] clck_gen.py:128 IND CLOCK 1122
2025-03-30 07:54:57 [DEBUG] clck_gen.py:128 IND CLOCK 1224
2025-03-30 07:54:57 [DEBUG] clck_gen.py:128 IND CLOCK 1326
2025-03-30 07:54:58 [DEBUG] clck_gen.py:128 IND CLOCK 1428
2025-03-30 07:54:58 [DEBUG] clck_gen.py:128 IND CLOCK 1530
2025-03-30 07:54:59 [DEBUG] clck_gen.py:128 IND CLOCK 1632
2025-03-30 07:54:59 [DEBUG] clck_gen.py:128 IND CLOCK 1734
2025-03-30 07:55:00 [DEBUG] clck_gen.py:128 IND CLOCK 1836
2025-03-30 07:55:00 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:55:00 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:55:00 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:55:00 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:55:00 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:55:00 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:55:00 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:55:00 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:55:00 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:55:00 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:55:00 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 07:55:00 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 07:55:00 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 07:55:05 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 07:55:05 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 07:55:05 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:55:05 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:55:05 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:55:05 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:55:05 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:55:05 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 07:55:05 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:55:05 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 07:55:05 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 07:55:05 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 07:55:05 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 07:55:05 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 07:55:05 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:55:05 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:55:05 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 07:55:05 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 07:55:05 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 07:55:05 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 07:55:05 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 07:55:05 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 07:55:05 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:55:05 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:55:05 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 07:55:05 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 07:55:05 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 07:55:05 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 07:55:05 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 07:55:05 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 07:55:05 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:55:05 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:55:05 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 07:55:05 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 07:55:05 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 07:55:05 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 07:55:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 07:55:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 07:55:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 07:55:05 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 07:55:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 07:55:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 07:55:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 07:55:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:55:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 07:55:05 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 07:55:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:55:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:55:05 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 07:55:05 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 07:55:05 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 07:55:05 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 07:55:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:55:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:55:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:55:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 07:55:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:55:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:55:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:55:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:55:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:55:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:55:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:55:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:55:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:55:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:55:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:55:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:55:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:55:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:55:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:55:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:55:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:55:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:55:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:55:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:55:05 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:55:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:55:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:55:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:55:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:55:05 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:55:05 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:55:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:55:05 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 07:55:05 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 07:55:05 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 07:55:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:55:10 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 07:55:10 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 07:55:10 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:55:10 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:55:10 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:55:10 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:55:10 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:55:10 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 07:55:10 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:55:10 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 07:55:10 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 07:55:10 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 07:55:10 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 07:55:10 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 07:55:10 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:55:10 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:55:10 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 07:55:10 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 07:55:10 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 07:55:10 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 07:55:10 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 07:55:10 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 07:55:10 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:55:10 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:55:10 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 07:55:10 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 07:55:10 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 07:55:10 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 07:55:10 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 07:55:10 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 07:55:10 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:55:10 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:55:10 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 07:55:10 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 07:55:10 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 07:55:10 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 07:55:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 07:55:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 07:55:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 07:55:10 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 07:55:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 07:55:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 07:55:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 07:55:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:55:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 07:55:10 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 07:55:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:55:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:55:10 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 07:55:10 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 07:55:10 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 07:55:10 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 07:55:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:55:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:55:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:55:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 07:55:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:55:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:55:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:55:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:55:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:55:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:55:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:55:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:55:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:55:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:55:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:55:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:55:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:55:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:55:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:55:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:55:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:55:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:55:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:55:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:55:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:55:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:55:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:55:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:55:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:55:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:55:10 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-03-30 07:55:10 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-03-30 07:55:10 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-03-30 07:55:10 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-03-30 07:55:10 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-03-30 07:55:10 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-03-30 07:55:10 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-03-30 07:55:10 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-03-30 07:55:10 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-03-30 07:55:10 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-03-30 07:55:10 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=0 bl=148 pwr=0
2025-03-30 07:55:10 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=1 bl=148 pwr=0
2025-03-30 07:55:10 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=2 bl=148 pwr=0
2025-03-30 07:55:10 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=3 bl=148 pwr=0
2025-03-30 07:55:10 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=4 bl=148 pwr=0
2025-03-30 07:55:10 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=5 bl=148 pwr=0
2025-03-30 07:55:10 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=6 bl=148 pwr=0
2025-03-30 07:55:10 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=7 bl=148 pwr=0
2025-03-30 07:55:10 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 07:55:10 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 07:55:10 [DEBUG] fake_trx.py:317 (BTS@172.18.26.20:5700) Recv FAKE_CI cmd
2025-03-30 07:55:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:55:10 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:55:10 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:55:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:55:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:55:10 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:55:10 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:55:10 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 07:55:10 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 07:55:11 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-03-30 07:55:11 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:55:11 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:55:11 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:55:11 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:55:11 [DEBUG] clck_gen.py:128 IND CLOCK 306
2025-03-30 07:55:12 [DEBUG] clck_gen.py:128 IND CLOCK 408
2025-03-30 07:55:12 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:55:12 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:55:12 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:55:12 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:55:12 [DEBUG] clck_gen.py:128 IND CLOCK 510
2025-03-30 07:55:13 [DEBUG] clck_gen.py:128 IND CLOCK 612
2025-03-30 07:55:13 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:55:13 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:55:13 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:55:13 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:55:13 [DEBUG] clck_gen.py:128 IND CLOCK 714
2025-03-30 07:55:14 [DEBUG] clck_gen.py:128 IND CLOCK 816
2025-03-30 07:55:14 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:55:14 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:55:14 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:55:14 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:55:14 [DEBUG] clck_gen.py:128 IND CLOCK 918
2025-03-30 07:55:15 [DEBUG] clck_gen.py:128 IND CLOCK 1020
2025-03-30 07:55:15 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:55:15 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:55:15 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:55:15 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:55:15 [DEBUG] clck_gen.py:128 IND CLOCK 1122
2025-03-30 07:55:16 [DEBUG] clck_gen.py:128 IND CLOCK 1224
2025-03-30 07:55:16 [DEBUG] clck_gen.py:128 IND CLOCK 1326
2025-03-30 07:55:17 [DEBUG] clck_gen.py:128 IND CLOCK 1428
2025-03-30 07:55:17 [DEBUG] clck_gen.py:128 IND CLOCK 1530
2025-03-30 07:55:17 [DEBUG] clck_gen.py:128 IND CLOCK 1632
2025-03-30 07:55:18 [DEBUG] clck_gen.py:128 IND CLOCK 1734
2025-03-30 07:55:18 [DEBUG] clck_gen.py:128 IND CLOCK 1836
2025-03-30 07:55:19 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:55:19 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:55:19 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:55:19 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:55:19 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:55:19 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:55:19 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:55:19 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 07:55:19 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 07:55:19 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 07:55:19 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:55:19 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:55:19 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:55:24 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 07:55:24 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 07:55:24 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:55:24 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:55:24 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:55:24 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:55:24 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:55:24 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 07:55:24 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:55:24 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 07:55:24 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 07:55:24 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 07:55:24 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 07:55:24 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 07:55:24 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:55:24 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:55:24 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 07:55:24 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 07:55:24 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 07:55:24 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 07:55:24 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 07:55:24 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 07:55:24 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:55:24 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:55:24 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 07:55:24 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 07:55:24 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 07:55:24 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 07:55:24 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 07:55:24 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 07:55:24 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:55:24 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:55:24 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 07:55:24 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 07:55:24 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 07:55:24 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 07:55:24 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 07:55:24 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 07:55:24 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 07:55:24 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 07:55:24 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 07:55:24 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 07:55:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 07:55:24 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:55:24 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 07:55:24 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 07:55:24 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:55:24 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:55:24 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 07:55:24 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 07:55:24 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 07:55:24 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 07:55:24 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:55:24 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:55:24 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:55:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 07:55:24 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:55:24 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:55:24 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:55:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:55:24 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:55:24 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:55:24 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:55:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:55:24 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:55:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:55:24 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:55:24 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:55:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:55:24 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:55:24 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:55:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:55:24 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:55:24 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:55:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:55:24 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:55:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:55:24 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:55:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:55:24 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:55:24 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:55:24 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:55:24 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:55:24 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 07:55:24 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 07:55:24 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 07:55:24 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:55:24 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:55:29 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 07:55:29 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 07:55:29 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:55:29 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:55:29 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:55:29 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:55:29 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:55:29 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 07:55:29 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:55:29 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 07:55:29 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 07:55:29 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 07:55:29 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 07:55:29 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 07:55:29 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:55:29 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:55:29 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 07:55:29 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 07:55:29 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 07:55:29 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 07:55:29 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 07:55:29 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 07:55:29 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:55:29 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:55:29 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 07:55:29 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 07:55:29 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 07:55:29 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 07:55:29 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 07:55:29 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 07:55:29 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:55:29 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:55:29 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 07:55:29 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 07:55:29 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 07:55:29 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 07:55:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 07:55:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 07:55:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 07:55:29 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 07:55:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 07:55:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 07:55:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 07:55:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:55:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:55:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 07:55:29 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 07:55:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:55:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:55:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:55:29 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 07:55:29 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 07:55:29 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 07:55:29 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 07:55:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:55:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:55:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:55:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 07:55:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:55:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:55:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:55:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:55:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:55:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:55:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:55:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:55:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:55:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:55:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:55:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:55:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:55:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:55:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:55:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:55:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:55:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:55:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:55:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:55:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:55:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:55:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:55:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:55:29 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-03-30 07:55:29 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-03-30 07:55:29 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-03-30 07:55:29 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-03-30 07:55:29 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-03-30 07:55:29 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-03-30 07:55:29 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-03-30 07:55:29 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-03-30 07:55:29 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-03-30 07:55:29 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-03-30 07:55:29 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=0 bl=148 pwr=0
2025-03-30 07:55:29 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=1 bl=148 pwr=0
2025-03-30 07:55:29 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=2 bl=148 pwr=0
2025-03-30 07:55:29 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=3 bl=148 pwr=0
2025-03-30 07:55:29 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=4 bl=148 pwr=0
2025-03-30 07:55:29 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=5 bl=148 pwr=0
2025-03-30 07:55:29 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=6 bl=148 pwr=0
2025-03-30 07:55:29 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=7 bl=148 pwr=0
2025-03-30 07:55:29 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 07:55:29 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 07:55:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:55:29 [DEBUG] fake_trx.py:317 (BTS@172.18.26.20:5700) Recv FAKE_CI cmd
2025-03-30 07:55:29 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:55:29 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:55:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:55:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:55:29 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:55:29 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:55:29 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 07:55:29 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 07:55:30 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-03-30 07:55:30 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:55:30 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:55:30 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:55:30 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:55:30 [DEBUG] clck_gen.py:128 IND CLOCK 306
2025-03-30 07:55:30 [DEBUG] clck_gen.py:128 IND CLOCK 408
2025-03-30 07:55:31 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:55:31 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:55:31 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:55:31 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:55:31 [DEBUG] clck_gen.py:128 IND CLOCK 510
2025-03-30 07:55:31 [DEBUG] clck_gen.py:128 IND CLOCK 612
2025-03-30 07:55:32 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:55:32 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:55:32 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:55:32 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:55:32 [DEBUG] clck_gen.py:128 IND CLOCK 714
2025-03-30 07:55:32 [DEBUG] clck_gen.py:128 IND CLOCK 816
2025-03-30 07:55:33 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:55:33 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:55:33 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:55:33 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:55:33 [DEBUG] clck_gen.py:128 IND CLOCK 918
2025-03-30 07:55:33 [DEBUG] clck_gen.py:128 IND CLOCK 1020
2025-03-30 07:55:34 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:55:34 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:55:34 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:55:34 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:55:34 [DEBUG] clck_gen.py:128 IND CLOCK 1122
2025-03-30 07:55:34 [DEBUG] clck_gen.py:128 IND CLOCK 1224
2025-03-30 07:55:35 [DEBUG] clck_gen.py:128 IND CLOCK 1326
2025-03-30 07:55:35 [DEBUG] clck_gen.py:128 IND CLOCK 1428
2025-03-30 07:55:36 [DEBUG] clck_gen.py:128 IND CLOCK 1530
2025-03-30 07:55:36 [DEBUG] clck_gen.py:128 IND CLOCK 1632
2025-03-30 07:55:37 [DEBUG] clck_gen.py:128 IND CLOCK 1734
2025-03-30 07:55:37 [DEBUG] clck_gen.py:128 IND CLOCK 1836
2025-03-30 07:55:38 [DEBUG] clck_gen.py:128 IND CLOCK 1938
2025-03-30 07:55:38 [DEBUG] clck_gen.py:128 IND CLOCK 2040
2025-03-30 07:55:38 [DEBUG] clck_gen.py:128 IND CLOCK 2142
2025-03-30 07:55:39 [DEBUG] clck_gen.py:128 IND CLOCK 2244
2025-03-30 07:55:39 [DEBUG] clck_gen.py:128 IND CLOCK 2346
2025-03-30 07:55:40 [DEBUG] clck_gen.py:128 IND CLOCK 2448
2025-03-30 07:55:40 [DEBUG] clck_gen.py:128 IND CLOCK 2550
2025-03-30 07:55:41 [DEBUG] clck_gen.py:128 IND CLOCK 2652
2025-03-30 07:55:41 [DEBUG] clck_gen.py:128 IND CLOCK 2754
2025-03-30 07:55:42 [DEBUG] clck_gen.py:128 IND CLOCK 2856
2025-03-30 07:55:42 [DEBUG] clck_gen.py:128 IND CLOCK 2958
2025-03-30 07:55:43 [DEBUG] clck_gen.py:128 IND CLOCK 3060
2025-03-30 07:55:43 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:55:43 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:55:43 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:55:43 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:55:43 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:55:43 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:55:43 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:55:43 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:55:43 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:55:43 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:55:43 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 07:55:43 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 07:55:43 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 07:55:48 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 07:55:48 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 07:55:48 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:55:48 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:55:48 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:55:48 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:55:48 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:55:48 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 07:55:48 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:55:48 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 07:55:48 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 07:55:48 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 07:55:48 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 07:55:48 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 07:55:48 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:55:48 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:55:48 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 07:55:48 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 07:55:48 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 07:55:48 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 07:55:48 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 07:55:48 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 07:55:48 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:55:48 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:55:48 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 07:55:48 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 07:55:48 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 07:55:48 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 07:55:48 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 07:55:48 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 07:55:48 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:55:48 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:55:48 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 07:55:48 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 07:55:48 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 07:55:48 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 07:55:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 07:55:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 07:55:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 07:55:48 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 07:55:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 07:55:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 07:55:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 07:55:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:55:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 07:55:48 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 07:55:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:55:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:55:48 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 07:55:48 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 07:55:48 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 07:55:48 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 07:55:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:55:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:55:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:55:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 07:55:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:55:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:55:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:55:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:55:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:55:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:55:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:55:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:55:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:55:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:55:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:55:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:55:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:55:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:55:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:55:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:55:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:55:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:55:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:55:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:55:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:55:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:55:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:55:48 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:55:48 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:55:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:55:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:55:48 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 07:55:48 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 07:55:48 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 07:55:48 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:55:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:55:53 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 07:55:53 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 07:55:53 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:55:53 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:55:53 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:55:53 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:55:53 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:55:53 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 07:55:53 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:55:53 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 07:55:53 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 07:55:53 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 07:55:53 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 07:55:53 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 07:55:53 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:55:53 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:55:53 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 07:55:53 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 07:55:53 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 07:55:53 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 07:55:53 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 07:55:53 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 07:55:53 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:55:53 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:55:53 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 07:55:53 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 07:55:53 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 07:55:53 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 07:55:53 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 07:55:53 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 07:55:53 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:55:53 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:55:53 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 07:55:53 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 07:55:53 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 07:55:53 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 07:55:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 07:55:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 07:55:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 07:55:53 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 07:55:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 07:55:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 07:55:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 07:55:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:55:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 07:55:53 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 07:55:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:55:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:55:53 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 07:55:53 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 07:55:53 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 07:55:53 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 07:55:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:55:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:55:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:55:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 07:55:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:55:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:55:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:55:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:55:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:55:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:55:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:55:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:55:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:55:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:55:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:55:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:55:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:55:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:55:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:55:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:55:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:55:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:55:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:55:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:55:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:55:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:55:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:55:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:55:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:55:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:55:53 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-03-30 07:55:54 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-03-30 07:55:54 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-03-30 07:55:54 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-03-30 07:55:54 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-03-30 07:55:54 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-03-30 07:55:54 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-03-30 07:55:54 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-03-30 07:55:54 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-03-30 07:55:54 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-03-30 07:55:54 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=0 bl=148 pwr=0
2025-03-30 07:55:54 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=1 bl=148 pwr=0
2025-03-30 07:55:54 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=2 bl=148 pwr=0
2025-03-30 07:55:54 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=3 bl=148 pwr=0
2025-03-30 07:55:54 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=4 bl=148 pwr=0
2025-03-30 07:55:54 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=5 bl=148 pwr=0
2025-03-30 07:55:54 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=6 bl=148 pwr=0
2025-03-30 07:55:54 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=7 bl=148 pwr=0
2025-03-30 07:55:54 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 07:55:54 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 07:55:54 [DEBUG] fake_trx.py:317 (BTS@172.18.26.20:5700) Recv FAKE_CI cmd
2025-03-30 07:55:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:55:54 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:55:54 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:55:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:55:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:55:54 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:55:54 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:55:54 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 07:55:54 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 07:55:54 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-03-30 07:55:54 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:55:54 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:55:54 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:55:54 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:55:54 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=221): ver=1 fn=220 tn=0 bl=148 pwr=0
2025-03-30 07:55:54 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=221): ver=1 fn=220 tn=1 bl=148 pwr=0
2025-03-30 07:55:54 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=221): ver=1 fn=220 tn=2 bl=148 pwr=0
2025-03-30 07:55:54 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=221): ver=1 fn=220 tn=3 bl=148 pwr=0
2025-03-30 07:55:54 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=221): ver=1 fn=220 tn=4 bl=148 pwr=0
2025-03-30 07:55:54 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=221): ver=1 fn=220 tn=5 bl=148 pwr=0
2025-03-30 07:55:54 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=221): ver=1 fn=220 tn=6 bl=148 pwr=0
2025-03-30 07:55:54 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=221): ver=1 fn=220 tn=7 bl=148 pwr=0
2025-03-30 07:55:54 [WARNING] transceiver.py:330 (MS@172.18.26.22:6700) Stale TRXD message (fn=221): fn=219 tn=0 pwr=0
2025-03-30 07:55:54 [WARNING] transceiver.py:330 (MS@172.18.26.22:6700) Stale TRXD message (fn=221): fn=219 tn=1 pwr=0
2025-03-30 07:55:54 [WARNING] transceiver.py:330 (MS@172.18.26.22:6700) Stale TRXD message (fn=221): fn=219 tn=2 pwr=0
2025-03-30 07:55:54 [WARNING] transceiver.py:330 (MS@172.18.26.22:6700) Stale TRXD message (fn=221): fn=219 tn=3 pwr=0
2025-03-30 07:55:54 [WARNING] transceiver.py:330 (MS@172.18.26.22:6700) Stale TRXD message (fn=221): fn=219 tn=4 pwr=0
2025-03-30 07:55:54 [WARNING] transceiver.py:330 (MS@172.18.26.22:6700) Stale TRXD message (fn=221): fn=219 tn=5 pwr=0
2025-03-30 07:55:54 [WARNING] transceiver.py:330 (MS@172.18.26.22:6700) Stale TRXD message (fn=221): fn=219 tn=6 pwr=0
2025-03-30 07:55:54 [WARNING] transceiver.py:330 (MS@172.18.26.22:6700) Stale TRXD message (fn=221): fn=219 tn=7 pwr=0
2025-03-30 07:55:54 [WARNING] transceiver.py:330 (MS@172.18.26.22:6700) Stale TRXD message (fn=221): fn=220 tn=0 pwr=0
2025-03-30 07:55:54 [WARNING] transceiver.py:330 (MS@172.18.26.22:6700) Stale TRXD message (fn=221): fn=220 tn=1 pwr=0
2025-03-30 07:55:54 [WARNING] transceiver.py:330 (MS@172.18.26.22:6700) Stale TRXD message (fn=221): fn=220 tn=2 pwr=0
2025-03-30 07:55:54 [WARNING] transceiver.py:330 (MS@172.18.26.22:6700) Stale TRXD message (fn=221): fn=220 tn=3 pwr=0
2025-03-30 07:55:54 [WARNING] transceiver.py:330 (MS@172.18.26.22:6700) Stale TRXD message (fn=221): fn=220 tn=4 pwr=0
2025-03-30 07:55:54 [WARNING] transceiver.py:330 (MS@172.18.26.22:6700) Stale TRXD message (fn=221): fn=220 tn=5 pwr=0
2025-03-30 07:55:54 [WARNING] transceiver.py:330 (MS@172.18.26.22:6700) Stale TRXD message (fn=221): fn=220 tn=6 pwr=0
2025-03-30 07:55:54 [WARNING] transceiver.py:330 (MS@172.18.26.22:6700) Stale TRXD message (fn=221): fn=220 tn=7 pwr=0
2025-03-30 07:55:55 [DEBUG] clck_gen.py:128 IND CLOCK 306
2025-03-30 07:55:55 [DEBUG] clck_gen.py:128 IND CLOCK 408
2025-03-30 07:55:55 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:55:55 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:55:55 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:55:55 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:55:56 [DEBUG] clck_gen.py:128 IND CLOCK 510
2025-03-30 07:55:56 [DEBUG] clck_gen.py:128 IND CLOCK 612
2025-03-30 07:55:56 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:55:56 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:55:56 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:55:56 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:55:57 [DEBUG] clck_gen.py:128 IND CLOCK 714
2025-03-30 07:55:57 [DEBUG] clck_gen.py:128 IND CLOCK 816
2025-03-30 07:55:57 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:55:57 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:55:57 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:55:57 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:55:58 [DEBUG] clck_gen.py:128 IND CLOCK 918
2025-03-30 07:55:58 [DEBUG] clck_gen.py:128 IND CLOCK 1020
2025-03-30 07:55:58 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:55:58 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:55:58 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:55:58 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:55:58 [DEBUG] clck_gen.py:128 IND CLOCK 1122
2025-03-30 07:55:59 [DEBUG] clck_gen.py:128 IND CLOCK 1224
2025-03-30 07:55:59 [DEBUG] clck_gen.py:128 IND CLOCK 1326
2025-03-30 07:56:00 [DEBUG] clck_gen.py:128 IND CLOCK 1428
2025-03-30 07:56:00 [DEBUG] clck_gen.py:128 IND CLOCK 1530
2025-03-30 07:56:01 [DEBUG] clck_gen.py:128 IND CLOCK 1632
2025-03-30 07:56:01 [DEBUG] clck_gen.py:128 IND CLOCK 1734
2025-03-30 07:56:02 [DEBUG] clck_gen.py:128 IND CLOCK 1836
2025-03-30 07:56:02 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:56:02 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:56:02 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:56:02 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:56:02 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:56:02 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:56:02 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:56:02 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:56:02 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:56:02 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:56:02 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 07:56:02 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 07:56:02 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 07:56:07 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 07:56:07 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 07:56:07 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:56:07 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:56:07 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:56:07 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:56:07 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:56:07 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 07:56:07 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:56:07 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 07:56:07 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 07:56:07 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 07:56:07 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 07:56:07 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 07:56:07 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:56:07 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:56:07 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 07:56:07 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 07:56:07 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 07:56:07 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 07:56:07 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 07:56:07 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 07:56:07 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:56:07 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 07:56:07 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:56:07 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 07:56:07 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 07:56:07 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 07:56:07 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 07:56:07 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 07:56:07 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:56:07 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:56:07 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 07:56:07 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 07:56:07 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 07:56:07 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 07:56:07 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 07:56:07 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 07:56:07 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 07:56:07 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 07:56:07 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 07:56:07 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 07:56:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 07:56:07 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:56:07 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 07:56:07 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 07:56:07 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:56:07 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:56:07 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 07:56:07 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 07:56:07 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 07:56:07 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 07:56:07 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:56:07 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:56:07 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:56:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 07:56:07 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:56:07 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:56:07 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:56:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:56:07 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:56:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:56:07 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:56:07 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:56:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:56:07 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:56:07 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:56:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:56:07 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:56:07 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:56:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:56:07 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:56:07 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:56:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:56:07 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:56:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:56:07 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:56:07 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:56:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:56:07 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:56:07 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:56:07 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:56:07 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:56:07 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 07:56:07 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 07:56:07 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 07:56:07 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:56:12 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 07:56:12 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 07:56:12 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:56:12 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:56:12 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:56:12 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:56:12 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:56:12 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 07:56:12 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:56:12 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 07:56:12 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 07:56:12 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 07:56:12 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 07:56:12 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 07:56:12 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:56:12 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:56:12 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 07:56:12 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 07:56:12 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 07:56:12 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 07:56:12 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 07:56:12 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 07:56:12 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:56:12 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:56:12 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 07:56:12 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 07:56:12 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 07:56:12 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 07:56:12 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 07:56:12 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 07:56:12 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:56:12 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:56:12 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 07:56:12 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 07:56:12 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 07:56:12 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 07:56:12 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 07:56:12 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 07:56:12 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 07:56:12 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 07:56:12 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 07:56:12 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 07:56:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 07:56:12 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:56:12 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 07:56:12 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 07:56:12 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:56:12 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:56:12 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 07:56:12 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 07:56:12 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 07:56:12 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 07:56:12 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:56:12 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:56:12 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:56:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 07:56:12 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:56:12 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:56:12 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:56:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:56:12 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:56:12 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:56:12 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:56:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:56:12 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:56:12 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:56:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:56:12 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:56:12 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:56:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:56:12 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:56:12 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:56:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:56:12 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:56:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:56:12 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:56:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:56:12 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:56:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:56:12 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:56:12 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:56:12 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:56:12 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-03-30 07:56:12 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-03-30 07:56:12 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-03-30 07:56:12 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-03-30 07:56:12 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-03-30 07:56:12 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-03-30 07:56:12 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-03-30 07:56:12 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-03-30 07:56:12 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-03-30 07:56:12 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-03-30 07:56:12 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=0 bl=148 pwr=0
2025-03-30 07:56:12 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=1 bl=148 pwr=0
2025-03-30 07:56:12 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=2 bl=148 pwr=0
2025-03-30 07:56:12 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=3 bl=148 pwr=0
2025-03-30 07:56:12 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=4 bl=148 pwr=0
2025-03-30 07:56:12 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=5 bl=148 pwr=0
2025-03-30 07:56:12 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=6 bl=148 pwr=0
2025-03-30 07:56:12 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=7 bl=148 pwr=0
2025-03-30 07:56:12 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 07:56:12 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 07:56:12 [DEBUG] fake_trx.py:317 (BTS@172.18.26.20:5700) Recv FAKE_CI cmd
2025-03-30 07:56:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:56:12 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:56:12 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:56:12 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:56:12 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:56:12 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:56:12 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:56:12 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 07:56:12 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 07:56:13 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-03-30 07:56:13 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:56:13 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:56:13 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:56:13 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:56:13 [DEBUG] clck_gen.py:128 IND CLOCK 306
2025-03-30 07:56:14 [DEBUG] clck_gen.py:128 IND CLOCK 408
2025-03-30 07:56:14 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:56:14 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:56:14 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:56:14 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:56:14 [DEBUG] clck_gen.py:128 IND CLOCK 510
2025-03-30 07:56:15 [DEBUG] clck_gen.py:128 IND CLOCK 612
2025-03-30 07:56:15 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:56:15 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:56:15 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:56:15 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:56:15 [DEBUG] clck_gen.py:128 IND CLOCK 714
2025-03-30 07:56:16 [DEBUG] clck_gen.py:128 IND CLOCK 816
2025-03-30 07:56:16 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:56:16 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:56:16 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:56:16 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:56:16 [DEBUG] clck_gen.py:128 IND CLOCK 918
2025-03-30 07:56:17 [DEBUG] clck_gen.py:128 IND CLOCK 1020
2025-03-30 07:56:17 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:56:17 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:56:17 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:56:17 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:56:17 [DEBUG] clck_gen.py:128 IND CLOCK 1122
2025-03-30 07:56:18 [DEBUG] clck_gen.py:128 IND CLOCK 1224
2025-03-30 07:56:18 [DEBUG] clck_gen.py:128 IND CLOCK 1326
2025-03-30 07:56:19 [DEBUG] clck_gen.py:128 IND CLOCK 1428
2025-03-30 07:56:19 [DEBUG] clck_gen.py:128 IND CLOCK 1530
2025-03-30 07:56:19 [DEBUG] clck_gen.py:128 IND CLOCK 1632
2025-03-30 07:56:20 [DEBUG] clck_gen.py:128 IND CLOCK 1734
2025-03-30 07:56:20 [DEBUG] clck_gen.py:128 IND CLOCK 1836
2025-03-30 07:56:21 [DEBUG] clck_gen.py:128 IND CLOCK 1938
2025-03-30 07:56:21 [DEBUG] clck_gen.py:128 IND CLOCK 2040
2025-03-30 07:56:22 [DEBUG] clck_gen.py:128 IND CLOCK 2142
2025-03-30 07:56:22 [DEBUG] clck_gen.py:128 IND CLOCK 2244
2025-03-30 07:56:23 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:56:23 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:56:23 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:56:23 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:56:23 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:56:23 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:56:23 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:56:23 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:56:23 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:56:23 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:56:23 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 07:56:23 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 07:56:23 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 07:56:23 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=2295 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:56:23 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=2295 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:56:23 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=2295 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:56:23 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=2295 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:56:23 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=2295 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:56:23 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=2295 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:56:23 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=2295 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:56:23 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=2295 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:56:28 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 07:56:28 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 07:56:28 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:56:28 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:56:28 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:56:28 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:56:28 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:56:28 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 07:56:28 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:56:28 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 07:56:28 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 07:56:28 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 07:56:28 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 07:56:28 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 07:56:28 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:56:28 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:56:28 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 07:56:28 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 07:56:28 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 07:56:28 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 07:56:28 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 07:56:28 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 07:56:28 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:56:28 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:56:28 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 07:56:28 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 07:56:28 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 07:56:28 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 07:56:28 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 07:56:28 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 07:56:28 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:56:28 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:56:28 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 07:56:28 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 07:56:28 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 07:56:28 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 07:56:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 07:56:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 07:56:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 07:56:28 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 07:56:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 07:56:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 07:56:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 07:56:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:56:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 07:56:28 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 07:56:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:56:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:56:28 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 07:56:28 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 07:56:28 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 07:56:28 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 07:56:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:56:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:56:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:56:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 07:56:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:56:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:56:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:56:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:56:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:56:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:56:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:56:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:56:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:56:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:56:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:56:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:56:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:56:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:56:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:56:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:56:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:56:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:56:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:56:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:56:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:56:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:56:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:56:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:56:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:56:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:56:28 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:56:28 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:56:28 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:56:28 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:56:28 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 07:56:28 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 07:56:28 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 07:56:33 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 07:56:33 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 07:56:33 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:56:33 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:56:33 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:56:33 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:56:33 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:56:33 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 07:56:33 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:56:33 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 07:56:33 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 07:56:33 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 07:56:33 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 07:56:33 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 07:56:33 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:56:33 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:56:33 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 07:56:33 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 07:56:33 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 07:56:33 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 07:56:33 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 07:56:33 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 07:56:33 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:56:33 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:56:33 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 07:56:33 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 07:56:33 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 07:56:33 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 07:56:33 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 07:56:33 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 07:56:33 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:56:33 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:56:33 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 07:56:33 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 07:56:33 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 07:56:33 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 07:56:33 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 07:56:33 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 07:56:33 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 07:56:33 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 07:56:33 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 07:56:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 07:56:33 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 07:56:33 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 07:56:33 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:56:33 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 07:56:33 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:56:33 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:56:33 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 07:56:33 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 07:56:33 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 07:56:33 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 07:56:33 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:56:33 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:56:33 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:56:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 07:56:33 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:56:33 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:56:33 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:56:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:56:33 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:56:33 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:56:33 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:56:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:56:33 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:56:33 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:56:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:56:33 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:56:33 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:56:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:56:33 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:56:33 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:56:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:56:33 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:56:33 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:56:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:56:33 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:56:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:56:33 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:56:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:56:33 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:56:33 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:56:33 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-03-30 07:56:33 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-03-30 07:56:33 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-03-30 07:56:33 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-03-30 07:56:33 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-03-30 07:56:33 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-03-30 07:56:33 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-03-30 07:56:33 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-03-30 07:56:33 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-03-30 07:56:33 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-03-30 07:56:33 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=0 bl=148 pwr=0
2025-03-30 07:56:33 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=1 bl=148 pwr=0
2025-03-30 07:56:33 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=2 bl=148 pwr=0
2025-03-30 07:56:33 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=3 bl=148 pwr=0
2025-03-30 07:56:33 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=4 bl=148 pwr=0
2025-03-30 07:56:33 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=5 bl=148 pwr=0
2025-03-30 07:56:33 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=6 bl=148 pwr=0
2025-03-30 07:56:33 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=7 bl=148 pwr=0
2025-03-30 07:56:33 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 07:56:33 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 07:56:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:56:33 [DEBUG] fake_trx.py:317 (BTS@172.18.26.20:5700) Recv FAKE_CI cmd
2025-03-30 07:56:33 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:56:33 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:56:33 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:56:33 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:56:33 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:56:33 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:56:33 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 07:56:33 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 07:56:34 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-03-30 07:56:34 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:56:34 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:56:34 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:56:34 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:56:34 [DEBUG] clck_gen.py:128 IND CLOCK 306
2025-03-30 07:56:34 [DEBUG] clck_gen.py:128 IND CLOCK 408
2025-03-30 07:56:35 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:56:35 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:56:35 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:56:35 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:56:35 [DEBUG] clck_gen.py:128 IND CLOCK 510
2025-03-30 07:56:35 [DEBUG] clck_gen.py:128 IND CLOCK 612
2025-03-30 07:56:36 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:56:36 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:56:36 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:56:36 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:56:36 [DEBUG] clck_gen.py:128 IND CLOCK 714
2025-03-30 07:56:36 [DEBUG] clck_gen.py:128 IND CLOCK 816
2025-03-30 07:56:37 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:56:37 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:56:37 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:56:37 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:56:37 [DEBUG] clck_gen.py:128 IND CLOCK 918
2025-03-30 07:56:37 [DEBUG] clck_gen.py:128 IND CLOCK 1020
2025-03-30 07:56:38 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:56:38 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:56:38 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:56:38 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:56:38 [DEBUG] clck_gen.py:128 IND CLOCK 1122
2025-03-30 07:56:38 [DEBUG] clck_gen.py:128 IND CLOCK 1224
2025-03-30 07:56:39 [DEBUG] clck_gen.py:128 IND CLOCK 1326
2025-03-30 07:56:39 [DEBUG] clck_gen.py:128 IND CLOCK 1428
2025-03-30 07:56:40 [DEBUG] clck_gen.py:128 IND CLOCK 1530
2025-03-30 07:56:40 [DEBUG] clck_gen.py:128 IND CLOCK 1632
2025-03-30 07:56:41 [DEBUG] clck_gen.py:128 IND CLOCK 1734
2025-03-30 07:56:41 [DEBUG] clck_gen.py:128 IND CLOCK 1836
2025-03-30 07:56:42 [DEBUG] clck_gen.py:128 IND CLOCK 1938
2025-03-30 07:56:42 [DEBUG] clck_gen.py:128 IND CLOCK 2040
2025-03-30 07:56:42 [DEBUG] clck_gen.py:128 IND CLOCK 2142
2025-03-30 07:56:43 [DEBUG] clck_gen.py:128 IND CLOCK 2244
2025-03-30 07:56:43 [DEBUG] clck_gen.py:128 IND CLOCK 2346
2025-03-30 07:56:44 [DEBUG] clck_gen.py:128 IND CLOCK 2448
2025-03-30 07:56:44 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:56:44 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:56:44 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:56:44 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:56:44 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:56:44 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:56:44 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:56:44 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 07:56:44 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 07:56:44 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 07:56:44 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:56:44 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:56:44 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:56:44 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=2512 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:56:44 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=2512 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:56:44 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=2512 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:56:44 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=2512 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:56:44 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=2512 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:56:44 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=2512 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:56:44 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=2512 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:56:49 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 07:56:49 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 07:56:49 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:56:49 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:56:49 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:56:49 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:56:49 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:56:49 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 07:56:49 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:56:49 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 07:56:49 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 07:56:49 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 07:56:49 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 07:56:49 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 07:56:49 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:56:49 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:56:49 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 07:56:49 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 07:56:49 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 07:56:49 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 07:56:49 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 07:56:49 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 07:56:49 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:56:49 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:56:49 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 07:56:49 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 07:56:49 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 07:56:49 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 07:56:49 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 07:56:49 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 07:56:49 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:56:49 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:56:49 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 07:56:49 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 07:56:49 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 07:56:49 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 07:56:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 07:56:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 07:56:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 07:56:49 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 07:56:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 07:56:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 07:56:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 07:56:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:56:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 07:56:49 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 07:56:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:56:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:56:49 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 07:56:49 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 07:56:49 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 07:56:49 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 07:56:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:56:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:56:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:56:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 07:56:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:56:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:56:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:56:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:56:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:56:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:56:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:56:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:56:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:56:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:56:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:56:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:56:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:56:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:56:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:56:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:56:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:56:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:56:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:56:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:56:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:56:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:56:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:56:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:56:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:56:49 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:56:49 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:56:49 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 07:56:49 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 07:56:49 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 07:56:49 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:56:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:56:54 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 07:56:54 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 07:56:54 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:56:54 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:56:54 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:56:54 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:56:54 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:56:54 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 07:56:54 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:56:54 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 07:56:54 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 07:56:54 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 07:56:54 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 07:56:54 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 07:56:54 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:56:54 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:56:54 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 07:56:54 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 07:56:54 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 07:56:54 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 07:56:54 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 07:56:54 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 07:56:54 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:56:54 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:56:54 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 07:56:54 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 07:56:54 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 07:56:54 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 07:56:54 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 07:56:54 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 07:56:54 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:56:54 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:56:54 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 07:56:54 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 07:56:54 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 07:56:54 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 07:56:54 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 07:56:54 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 07:56:54 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 07:56:54 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 07:56:54 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 07:56:54 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 07:56:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 07:56:54 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:56:54 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 07:56:54 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 07:56:54 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:56:54 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:56:54 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 07:56:54 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 07:56:54 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 07:56:54 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 07:56:54 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:56:54 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:56:54 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:56:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 07:56:54 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:56:54 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:56:54 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:56:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:56:54 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:56:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:56:54 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:56:54 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:56:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:56:54 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:56:54 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:56:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:56:54 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:56:54 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:56:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:56:54 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:56:54 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:56:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:56:54 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:56:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:56:54 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:56:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:56:54 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:56:54 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:56:54 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:56:54 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:56:54 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-03-30 07:56:55 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-03-30 07:56:55 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-03-30 07:56:55 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-03-30 07:56:55 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-03-30 07:56:55 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-03-30 07:56:55 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-03-30 07:56:55 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-03-30 07:56:55 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-03-30 07:56:55 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-03-30 07:56:55 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=0 bl=148 pwr=0
2025-03-30 07:56:55 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=1 bl=148 pwr=0
2025-03-30 07:56:55 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=2 bl=148 pwr=0
2025-03-30 07:56:55 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=3 bl=148 pwr=0
2025-03-30 07:56:55 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=4 bl=148 pwr=0
2025-03-30 07:56:55 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=5 bl=148 pwr=0
2025-03-30 07:56:55 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=6 bl=148 pwr=0
2025-03-30 07:56:55 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=7 bl=148 pwr=0
2025-03-30 07:56:55 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 07:56:55 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 07:56:55 [DEBUG] fake_trx.py:317 (BTS@172.18.26.20:5700) Recv FAKE_CI cmd
2025-03-30 07:56:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:56:55 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:56:55 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:56:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:56:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:56:55 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:56:55 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:56:55 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 07:56:55 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 07:56:55 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-03-30 07:56:55 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:56:55 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:56:55 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:56:55 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:56:56 [DEBUG] clck_gen.py:128 IND CLOCK 306
2025-03-30 07:56:56 [DEBUG] clck_gen.py:128 IND CLOCK 408
2025-03-30 07:56:56 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:56:56 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:56:56 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:56:56 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:56:57 [DEBUG] clck_gen.py:128 IND CLOCK 510
2025-03-30 07:56:57 [DEBUG] clck_gen.py:128 IND CLOCK 612
2025-03-30 07:56:57 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:56:57 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:56:57 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:56:57 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:56:58 [DEBUG] clck_gen.py:128 IND CLOCK 714
2025-03-30 07:56:58 [DEBUG] clck_gen.py:128 IND CLOCK 816
2025-03-30 07:56:58 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:56:58 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:56:58 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:56:58 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:56:58 [DEBUG] clck_gen.py:128 IND CLOCK 918
2025-03-30 07:56:59 [DEBUG] clck_gen.py:128 IND CLOCK 1020
2025-03-30 07:56:59 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:56:59 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:56:59 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:56:59 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:56:59 [DEBUG] clck_gen.py:128 IND CLOCK 1122
2025-03-30 07:57:00 [DEBUG] clck_gen.py:128 IND CLOCK 1224
2025-03-30 07:57:00 [DEBUG] clck_gen.py:128 IND CLOCK 1326
2025-03-30 07:57:01 [DEBUG] clck_gen.py:128 IND CLOCK 1428
2025-03-30 07:57:01 [DEBUG] clck_gen.py:128 IND CLOCK 1530
2025-03-30 07:57:02 [DEBUG] clck_gen.py:128 IND CLOCK 1632
2025-03-30 07:57:02 [DEBUG] clck_gen.py:128 IND CLOCK 1734
2025-03-30 07:57:03 [DEBUG] clck_gen.py:128 IND CLOCK 1836
2025-03-30 07:57:03 [DEBUG] clck_gen.py:128 IND CLOCK 1938
2025-03-30 07:57:04 [DEBUG] clck_gen.py:128 IND CLOCK 2040
2025-03-30 07:57:04 [DEBUG] clck_gen.py:128 IND CLOCK 2142
2025-03-30 07:57:05 [DEBUG] clck_gen.py:128 IND CLOCK 2244
2025-03-30 07:57:05 [DEBUG] clck_gen.py:128 IND CLOCK 2346
2025-03-30 07:57:06 [DEBUG] clck_gen.py:128 IND CLOCK 2448
2025-03-30 07:57:06 [DEBUG] clck_gen.py:128 IND CLOCK 2550
2025-03-30 07:57:06 [DEBUG] clck_gen.py:128 IND CLOCK 2652
2025-03-30 07:57:07 [DEBUG] clck_gen.py:128 IND CLOCK 2754
2025-03-30 07:57:07 [DEBUG] clck_gen.py:128 IND CLOCK 2856
2025-03-30 07:57:08 [DEBUG] clck_gen.py:128 IND CLOCK 2958
2025-03-30 07:57:08 [DEBUG] clck_gen.py:128 IND CLOCK 3060
2025-03-30 07:57:09 [DEBUG] clck_gen.py:128 IND CLOCK 3162
2025-03-30 07:57:09 [DEBUG] clck_gen.py:128 IND CLOCK 3264
2025-03-30 07:57:10 [DEBUG] clck_gen.py:128 IND CLOCK 3366
2025-03-30 07:57:10 [DEBUG] clck_gen.py:128 IND CLOCK 3468
2025-03-30 07:57:11 [DEBUG] clck_gen.py:128 IND CLOCK 3570
2025-03-30 07:57:11 [DEBUG] clck_gen.py:128 IND CLOCK 3672
2025-03-30 07:57:12 [DEBUG] clck_gen.py:128 IND CLOCK 3774
2025-03-30 07:57:12 [DEBUG] clck_gen.py:128 IND CLOCK 3876
2025-03-30 07:57:13 [DEBUG] clck_gen.py:128 IND CLOCK 3978
2025-03-30 07:57:13 [DEBUG] clck_gen.py:128 IND CLOCK 4080
2025-03-30 07:57:14 [DEBUG] clck_gen.py:128 IND CLOCK 4182
2025-03-30 07:57:14 [DEBUG] clck_gen.py:128 IND CLOCK 4284
2025-03-30 07:57:14 [DEBUG] clck_gen.py:128 IND CLOCK 4386
2025-03-30 07:57:15 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:57:15 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:57:15 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:57:15 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:57:15 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:57:15 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:57:15 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:57:15 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:57:15 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:57:15 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:57:15 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 07:57:15 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 07:57:15 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 07:57:15 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=4463 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:57:15 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=4463 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:57:15 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=4463 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:57:15 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=4463 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:57:15 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=4463 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:57:15 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=4463 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:57:20 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 07:57:20 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 07:57:20 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:57:20 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:57:20 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:57:20 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:57:20 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:57:20 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 07:57:20 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:57:20 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 07:57:20 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 07:57:20 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 07:57:20 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 07:57:20 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 07:57:20 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:57:20 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:57:20 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 07:57:20 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 07:57:20 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 07:57:20 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 07:57:20 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 07:57:20 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 07:57:20 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:57:20 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:57:20 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 07:57:20 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 07:57:20 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 07:57:20 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 07:57:20 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 07:57:20 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 07:57:20 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:57:20 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:57:20 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 07:57:20 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 07:57:20 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 07:57:20 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 07:57:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 07:57:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 07:57:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 07:57:20 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 07:57:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 07:57:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 07:57:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 07:57:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:57:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 07:57:20 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 07:57:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:57:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:57:20 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 07:57:20 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 07:57:20 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 07:57:20 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 07:57:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:57:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:57:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:57:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 07:57:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:57:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:57:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:57:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:57:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:57:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:57:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:57:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:57:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:57:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:57:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:57:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:57:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:57:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:57:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:57:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:57:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:57:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:57:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:57:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:57:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:57:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:57:20 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:57:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:57:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:57:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:57:20 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:57:20 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:57:20 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 07:57:20 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 07:57:20 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 07:57:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:57:25 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 07:57:25 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 07:57:25 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:57:25 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:57:25 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:57:25 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:57:25 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:57:25 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 07:57:25 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:57:25 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 07:57:25 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 07:57:25 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 07:57:25 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 07:57:25 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 07:57:25 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:57:25 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:57:25 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 07:57:25 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 07:57:25 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 07:57:25 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 07:57:25 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 07:57:25 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 07:57:25 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:57:25 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:57:25 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 07:57:25 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 07:57:25 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 07:57:25 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 07:57:25 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 07:57:25 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 07:57:25 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:57:25 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:57:25 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 07:57:25 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 07:57:25 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 07:57:25 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 07:57:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 07:57:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 07:57:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 07:57:25 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 07:57:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 07:57:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 07:57:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 07:57:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:57:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 07:57:25 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 07:57:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:57:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:57:25 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 07:57:25 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 07:57:25 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 07:57:25 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 07:57:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:57:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:57:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:57:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 07:57:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:57:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:57:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:57:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:57:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:57:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:57:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:57:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:57:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:57:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:57:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:57:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:57:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:57:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:57:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:57:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:57:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:57:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:57:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:57:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:57:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:57:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:57:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:57:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:57:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:57:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:57:25 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-03-30 07:57:25 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-03-30 07:57:25 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-03-30 07:57:25 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-03-30 07:57:25 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-03-30 07:57:25 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-03-30 07:57:25 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-03-30 07:57:25 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-03-30 07:57:25 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-03-30 07:57:25 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-03-30 07:57:25 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=0 bl=148 pwr=0
2025-03-30 07:57:25 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=1 bl=148 pwr=0
2025-03-30 07:57:25 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=2 bl=148 pwr=0
2025-03-30 07:57:25 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=3 bl=148 pwr=0
2025-03-30 07:57:25 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=4 bl=148 pwr=0
2025-03-30 07:57:25 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=5 bl=148 pwr=0
2025-03-30 07:57:25 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=6 bl=148 pwr=0
2025-03-30 07:57:25 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=7 bl=148 pwr=0
2025-03-30 07:57:25 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 07:57:25 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 07:57:25 [DEBUG] fake_trx.py:317 (BTS@172.18.26.20:5700) Recv FAKE_CI cmd
2025-03-30 07:57:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:57:26 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-03-30 07:57:26 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:57:26 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:57:26 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:57:26 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:57:26 [DEBUG] clck_gen.py:128 IND CLOCK 306
2025-03-30 07:57:27 [DEBUG] clck_gen.py:128 IND CLOCK 408
2025-03-30 07:57:27 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:57:27 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:57:27 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:57:27 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:57:27 [DEBUG] clck_gen.py:128 IND CLOCK 510
2025-03-30 07:57:28 [DEBUG] clck_gen.py:128 IND CLOCK 612
2025-03-30 07:57:28 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:57:28 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:57:28 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:57:28 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:57:28 [DEBUG] clck_gen.py:128 IND CLOCK 714
2025-03-30 07:57:29 [DEBUG] clck_gen.py:128 IND CLOCK 816
2025-03-30 07:57:29 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:57:29 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:57:29 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:57:29 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:57:29 [DEBUG] clck_gen.py:128 IND CLOCK 918
2025-03-30 07:57:30 [DEBUG] clck_gen.py:128 IND CLOCK 1020
2025-03-30 07:57:30 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:57:30 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:57:30 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:57:30 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:57:30 [DEBUG] clck_gen.py:128 IND CLOCK 1122
2025-03-30 07:57:31 [DEBUG] clck_gen.py:128 IND CLOCK 1224
2025-03-30 07:57:31 [DEBUG] clck_gen.py:128 IND CLOCK 1326
2025-03-30 07:57:32 [DEBUG] clck_gen.py:128 IND CLOCK 1428
2025-03-30 07:57:32 [DEBUG] clck_gen.py:128 IND CLOCK 1530
2025-03-30 07:57:32 [DEBUG] clck_gen.py:128 IND CLOCK 1632
2025-03-30 07:57:33 [DEBUG] clck_gen.py:128 IND CLOCK 1734
2025-03-30 07:57:33 [DEBUG] clck_gen.py:128 IND CLOCK 1836
2025-03-30 07:57:34 [DEBUG] clck_gen.py:128 IND CLOCK 1938
2025-03-30 07:57:34 [DEBUG] clck_gen.py:128 IND CLOCK 2040
2025-03-30 07:57:35 [DEBUG] clck_gen.py:128 IND CLOCK 2142
2025-03-30 07:57:35 [DEBUG] clck_gen.py:128 IND CLOCK 2244
2025-03-30 07:57:35 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:57:35 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:57:35 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:57:35 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:57:35 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:57:35 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:57:35 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:57:35 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 07:57:35 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 07:57:35 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 07:57:35 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=2286 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:57:35 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:57:35 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=2286 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:57:35 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=2286 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:57:35 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=2286 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:57:35 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=2286 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:57:35 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=2286 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:57:35 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=2286 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:57:35 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=2286 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:57:40 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 07:57:40 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 07:57:40 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:57:40 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:57:40 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:57:40 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:57:40 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:57:40 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 07:57:40 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:57:40 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 07:57:40 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 07:57:40 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 07:57:40 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 07:57:40 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 07:57:40 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:57:40 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:57:40 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 07:57:40 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 07:57:40 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 07:57:40 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 07:57:40 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 07:57:40 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 07:57:40 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:57:40 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:57:40 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 07:57:40 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 07:57:40 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 07:57:40 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 07:57:40 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 07:57:40 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 07:57:40 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:57:40 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:57:40 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 07:57:40 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 07:57:40 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 07:57:40 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 07:57:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 07:57:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 07:57:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 07:57:40 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 07:57:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 07:57:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 07:57:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 07:57:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:57:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 07:57:40 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 07:57:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:57:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:57:40 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 07:57:40 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 07:57:40 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 07:57:40 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 07:57:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:57:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:57:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:57:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 07:57:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:57:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:57:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:57:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:57:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:57:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:57:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:57:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:57:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:57:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:57:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:57:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:57:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:57:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:57:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:57:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:57:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:57:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:57:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:57:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:57:40 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:57:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:57:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:57:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:57:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:57:40 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:57:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:57:40 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:57:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:57:40 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 07:57:40 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 07:57:40 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 07:57:40 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:57:45 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 07:57:45 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 07:57:45 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:57:45 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:57:45 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:57:45 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:57:46 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:57:46 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 07:57:46 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:57:46 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 07:57:46 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 07:57:46 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 07:57:46 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 07:57:46 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 07:57:46 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:57:46 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:57:46 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 07:57:46 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 07:57:46 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 07:57:46 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 07:57:46 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 07:57:46 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 07:57:46 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:57:46 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:57:46 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 07:57:46 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 07:57:46 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 07:57:46 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 07:57:46 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 07:57:46 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 07:57:46 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:57:46 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:57:46 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 07:57:46 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 07:57:46 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 07:57:46 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 07:57:46 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 07:57:46 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 07:57:46 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 07:57:46 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 07:57:46 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 07:57:46 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 07:57:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 07:57:46 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:57:46 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 07:57:46 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 07:57:46 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:57:46 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:57:46 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 07:57:46 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 07:57:46 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 07:57:46 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 07:57:46 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:57:46 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:57:46 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:57:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 07:57:46 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:57:46 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:57:46 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:57:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:57:46 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:57:46 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:57:46 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:57:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:57:46 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:57:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:57:46 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:57:46 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:57:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:57:46 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:57:46 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:57:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:57:46 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:57:46 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:57:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:57:46 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:57:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:57:46 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:57:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:57:46 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:57:46 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:57:46 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:57:46 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-03-30 07:57:46 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-03-30 07:57:46 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-03-30 07:57:46 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-03-30 07:57:46 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-03-30 07:57:46 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-03-30 07:57:46 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-03-30 07:57:46 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-03-30 07:57:46 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-03-30 07:57:46 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-03-30 07:57:46 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=0 bl=148 pwr=0
2025-03-30 07:57:46 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=1 bl=148 pwr=0
2025-03-30 07:57:46 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=2 bl=148 pwr=0
2025-03-30 07:57:46 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=3 bl=148 pwr=0
2025-03-30 07:57:46 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=4 bl=148 pwr=0
2025-03-30 07:57:46 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=5 bl=148 pwr=0
2025-03-30 07:57:46 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=6 bl=148 pwr=0
2025-03-30 07:57:46 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=7 bl=148 pwr=0
2025-03-30 07:57:46 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 07:57:46 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 07:57:46 [DEBUG] fake_trx.py:317 (BTS@172.18.26.20:5700) Recv FAKE_CI cmd
2025-03-30 07:57:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:57:46 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-03-30 07:57:47 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:57:47 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:57:47 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:57:47 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:57:47 [DEBUG] clck_gen.py:128 IND CLOCK 306
2025-03-30 07:57:47 [DEBUG] clck_gen.py:128 IND CLOCK 408
2025-03-30 07:57:48 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:57:48 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:57:48 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:57:48 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:57:48 [DEBUG] clck_gen.py:128 IND CLOCK 510
2025-03-30 07:57:48 [DEBUG] clck_gen.py:128 IND CLOCK 612
2025-03-30 07:57:49 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:57:49 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:57:49 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:57:49 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:57:49 [DEBUG] clck_gen.py:128 IND CLOCK 714
2025-03-30 07:57:49 [DEBUG] clck_gen.py:128 IND CLOCK 816
2025-03-30 07:57:50 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:57:50 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:57:50 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:57:50 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:57:50 [DEBUG] clck_gen.py:128 IND CLOCK 918
2025-03-30 07:57:50 [DEBUG] clck_gen.py:128 IND CLOCK 1020
2025-03-30 07:57:51 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:57:51 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:57:51 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:57:51 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:57:51 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=1089): ver=1 fn=1087 tn=0 bl=148 pwr=0
2025-03-30 07:57:51 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=1089): ver=1 fn=1087 tn=1 bl=148 pwr=0
2025-03-30 07:57:51 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=1089): ver=1 fn=1087 tn=2 bl=148 pwr=0
2025-03-30 07:57:51 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=1089): ver=1 fn=1087 tn=3 bl=148 pwr=0
2025-03-30 07:57:51 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=1089): ver=1 fn=1087 tn=4 bl=148 pwr=0
2025-03-30 07:57:51 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=1089): ver=1 fn=1087 tn=5 bl=148 pwr=0
2025-03-30 07:57:51 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=1089): ver=1 fn=1087 tn=6 bl=148 pwr=0
2025-03-30 07:57:51 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=1089): ver=1 fn=1087 tn=7 bl=148 pwr=0
2025-03-30 07:57:51 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=1089): ver=1 fn=1088 tn=0 bl=148 pwr=0
2025-03-30 07:57:51 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=1089): ver=1 fn=1088 tn=1 bl=148 pwr=0
2025-03-30 07:57:51 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=1089): ver=1 fn=1088 tn=2 bl=148 pwr=0
2025-03-30 07:57:51 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=1089): ver=1 fn=1088 tn=3 bl=148 pwr=0
2025-03-30 07:57:51 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=1089): ver=1 fn=1088 tn=4 bl=148 pwr=0
2025-03-30 07:57:51 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=1089): ver=1 fn=1088 tn=5 bl=148 pwr=0
2025-03-30 07:57:51 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=1089): ver=1 fn=1088 tn=6 bl=148 pwr=0
2025-03-30 07:57:51 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=1089): ver=1 fn=1088 tn=7 bl=148 pwr=0
2025-03-30 07:57:51 [DEBUG] clck_gen.py:128 IND CLOCK 1122
2025-03-30 07:57:51 [DEBUG] clck_gen.py:128 IND CLOCK 1224
2025-03-30 07:57:52 [DEBUG] clck_gen.py:128 IND CLOCK 1326
2025-03-30 07:57:52 [DEBUG] clck_gen.py:128 IND CLOCK 1428
2025-03-30 07:57:53 [DEBUG] clck_gen.py:128 IND CLOCK 1530
2025-03-30 07:57:53 [DEBUG] clck_gen.py:128 IND CLOCK 1632
2025-03-30 07:57:54 [DEBUG] clck_gen.py:128 IND CLOCK 1734
2025-03-30 07:57:54 [DEBUG] clck_gen.py:128 IND CLOCK 1836
2025-03-30 07:57:54 [DEBUG] clck_gen.py:128 IND CLOCK 1938
2025-03-30 07:57:55 [DEBUG] clck_gen.py:128 IND CLOCK 2040
2025-03-30 07:57:55 [DEBUG] clck_gen.py:128 IND CLOCK 2142
2025-03-30 07:57:56 [DEBUG] clck_gen.py:128 IND CLOCK 2244
2025-03-30 07:57:56 [DEBUG] clck_gen.py:128 IND CLOCK 2346
2025-03-30 07:57:57 [DEBUG] clck_gen.py:128 IND CLOCK 2448
2025-03-30 07:57:57 [DEBUG] clck_gen.py:128 IND CLOCK 2550
2025-03-30 07:57:58 [DEBUG] clck_gen.py:128 IND CLOCK 2652
2025-03-30 07:57:58 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:57:58 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:57:58 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:57:58 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:57:58 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:57:58 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:57:58 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:57:58 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 07:57:58 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 07:57:58 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 07:57:58 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:58:03 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 07:58:03 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 07:58:03 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:58:03 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:58:03 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:58:03 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:58:03 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:58:03 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 07:58:03 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:58:03 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 07:58:03 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 07:58:03 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 07:58:03 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 07:58:03 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 07:58:03 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:58:03 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:58:03 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 07:58:03 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 07:58:03 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 07:58:03 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 07:58:03 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 07:58:03 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 07:58:03 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:58:03 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:58:03 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 07:58:03 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 07:58:03 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 07:58:03 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 07:58:03 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 07:58:03 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 07:58:03 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:58:03 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:58:03 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 07:58:03 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 07:58:03 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 07:58:03 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 07:58:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 07:58:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 07:58:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 07:58:03 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 07:58:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 07:58:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 07:58:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 07:58:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:58:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 07:58:03 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 07:58:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:58:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:58:03 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 07:58:03 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 07:58:03 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 07:58:03 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 07:58:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:58:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:58:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:58:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 07:58:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:58:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:58:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:58:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:58:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:58:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:58:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:58:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:58:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:58:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:58:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:58:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:58:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:58:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:58:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:58:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:58:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:58:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:58:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:58:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:58:03 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:58:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:58:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:58:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:58:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:58:03 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:58:03 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:58:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:58:03 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 07:58:03 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 07:58:03 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 07:58:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:58:08 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 07:58:08 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 07:58:08 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:58:08 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:58:08 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:58:08 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:58:08 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:58:08 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 07:58:08 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:58:08 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 07:58:08 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 07:58:08 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 07:58:08 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 07:58:08 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 07:58:08 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:58:08 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:58:08 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 07:58:08 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 07:58:08 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 07:58:08 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 07:58:08 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 07:58:08 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 07:58:08 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:58:08 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:58:08 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 07:58:08 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 07:58:08 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 07:58:08 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 07:58:08 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 07:58:08 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 07:58:08 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:58:08 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:58:08 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 07:58:08 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 07:58:08 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 07:58:08 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 07:58:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 07:58:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 07:58:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 07:58:08 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 07:58:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 07:58:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 07:58:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 07:58:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:58:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 07:58:08 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 07:58:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:58:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:58:08 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 07:58:08 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 07:58:08 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 07:58:08 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 07:58:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:58:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:58:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:58:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 07:58:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:58:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:58:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:58:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:58:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:58:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:58:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:58:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:58:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:58:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:58:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:58:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:58:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:58:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:58:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:58:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:58:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:58:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:58:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:58:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:58:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:58:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:58:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:58:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:58:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:58:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:58:08 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-03-30 07:58:09 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-03-30 07:58:09 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-03-30 07:58:09 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-03-30 07:58:09 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-03-30 07:58:09 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-03-30 07:58:09 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-03-30 07:58:09 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-03-30 07:58:09 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-03-30 07:58:09 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-03-30 07:58:09 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=0 bl=148 pwr=0
2025-03-30 07:58:09 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=1 bl=148 pwr=0
2025-03-30 07:58:09 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=2 bl=148 pwr=0
2025-03-30 07:58:09 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=3 bl=148 pwr=0
2025-03-30 07:58:09 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=4 bl=148 pwr=0
2025-03-30 07:58:09 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=5 bl=148 pwr=0
2025-03-30 07:58:09 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=6 bl=148 pwr=0
2025-03-30 07:58:09 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=7 bl=148 pwr=0
2025-03-30 07:58:09 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 07:58:09 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 07:58:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:58:09 [DEBUG] fake_trx.py:317 (BTS@172.18.26.20:5700) Recv FAKE_CI cmd
2025-03-30 07:58:09 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:58:09 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:58:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:58:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:58:09 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:58:09 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:58:09 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 07:58:09 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 07:58:09 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.26.22:6700) Recv SETFH cmd
2025-03-30 07:58:09 [INFO] transceiver.py:237 (MS@172.18.26.22:6700) Frequency hopping configured: hsn=2, maio=0, ma_len=2
2025-03-30 07:58:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:58:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:58:09 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-03-30 07:58:09 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:58:09 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:58:09 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:58:09 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:58:10 [DEBUG] clck_gen.py:128 IND CLOCK 306
2025-03-30 07:58:10 [DEBUG] clck_gen.py:128 IND CLOCK 408
2025-03-30 07:58:10 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:58:10 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:58:10 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:58:10 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:58:10 [DEBUG] clck_gen.py:128 IND CLOCK 510
2025-03-30 07:58:11 [DEBUG] clck_gen.py:128 IND CLOCK 612
2025-03-30 07:58:11 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:58:11 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:58:11 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:58:11 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:58:11 [DEBUG] clck_gen.py:128 IND CLOCK 714
2025-03-30 07:58:12 [DEBUG] clck_gen.py:128 IND CLOCK 816
2025-03-30 07:58:12 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:58:12 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:58:12 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:58:12 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:58:12 [DEBUG] clck_gen.py:128 IND CLOCK 918
2025-03-30 07:58:13 [DEBUG] clck_gen.py:128 IND CLOCK 1020
2025-03-30 07:58:13 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:58:13 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:58:13 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:58:13 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:58:13 [DEBUG] clck_gen.py:128 IND CLOCK 1122
2025-03-30 07:58:14 [DEBUG] clck_gen.py:128 IND CLOCK 1224
2025-03-30 07:58:14 [DEBUG] clck_gen.py:128 IND CLOCK 1326
2025-03-30 07:58:15 [DEBUG] clck_gen.py:128 IND CLOCK 1428
2025-03-30 07:58:15 [DEBUG] clck_gen.py:128 IND CLOCK 1530
2025-03-30 07:58:16 [DEBUG] clck_gen.py:128 IND CLOCK 1632
2025-03-30 07:58:16 [DEBUG] clck_gen.py:128 IND CLOCK 1734
2025-03-30 07:58:17 [DEBUG] clck_gen.py:128 IND CLOCK 1836
2025-03-30 07:58:17 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:58:17 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:58:17 [INFO] transceiver.py:241 (MS@172.18.26.22:6700) Frequency hopping disabled
2025-03-30 07:58:17 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:58:17 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:58:17 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:58:17 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:58:17 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:58:17 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:58:17 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:58:17 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:58:17 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 07:58:17 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 07:58:17 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 07:58:22 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 07:58:22 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 07:58:22 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:58:22 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:58:22 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:58:22 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:58:22 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:58:22 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 07:58:22 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:58:22 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 07:58:22 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 07:58:22 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 07:58:22 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 07:58:22 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 07:58:22 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:58:22 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:58:22 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 07:58:22 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 07:58:22 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 07:58:22 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 07:58:22 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 07:58:22 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 07:58:22 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:58:22 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:58:22 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 07:58:22 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 07:58:22 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 07:58:22 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 07:58:22 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 07:58:22 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 07:58:22 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:58:22 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:58:22 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 07:58:22 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 07:58:22 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 07:58:22 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 07:58:22 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 07:58:22 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 07:58:22 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 07:58:22 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 07:58:22 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 07:58:22 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 07:58:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 07:58:22 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:58:22 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 07:58:22 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 07:58:22 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:58:22 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:58:22 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 07:58:22 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 07:58:22 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 07:58:22 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 07:58:22 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:58:22 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:58:22 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:58:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 07:58:22 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:58:22 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:58:22 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:58:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:58:22 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:58:22 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:58:22 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:58:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:58:22 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:58:22 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:58:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:58:22 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:58:22 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:58:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:58:22 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:58:22 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:58:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:58:22 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:58:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:58:22 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:58:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:58:22 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:58:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:58:22 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:58:22 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:58:22 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:58:22 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:58:22 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 07:58:22 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 07:58:22 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 07:58:22 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:58:22 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:58:27 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 07:58:27 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 07:58:27 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:58:27 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:58:27 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:58:27 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:58:27 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:58:27 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 07:58:27 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:58:27 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 07:58:27 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 07:58:27 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 07:58:27 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 07:58:27 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 07:58:27 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:58:27 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:58:27 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 07:58:27 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 07:58:27 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 07:58:27 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 07:58:27 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 07:58:27 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 07:58:27 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:58:27 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:58:27 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 07:58:27 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 07:58:27 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 07:58:27 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 07:58:27 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 07:58:27 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 07:58:27 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:58:27 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:58:27 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 07:58:27 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 07:58:27 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 07:58:27 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 07:58:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 07:58:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 07:58:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 07:58:27 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 07:58:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 07:58:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 07:58:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 07:58:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:58:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 07:58:27 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 07:58:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:58:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:58:27 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 07:58:27 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 07:58:27 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 07:58:27 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 07:58:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:58:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:58:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:58:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 07:58:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:58:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:58:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:58:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:58:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:58:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:58:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:58:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:58:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:58:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:58:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:58:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:58:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:58:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:58:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:58:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:58:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:58:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:58:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:58:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:58:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:58:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:58:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:58:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:58:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:58:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:58:27 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-03-30 07:58:27 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-03-30 07:58:27 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-03-30 07:58:27 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-03-30 07:58:27 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-03-30 07:58:27 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-03-30 07:58:27 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-03-30 07:58:27 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-03-30 07:58:27 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-03-30 07:58:27 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-03-30 07:58:27 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=0 bl=148 pwr=0
2025-03-30 07:58:27 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=1 bl=148 pwr=0
2025-03-30 07:58:27 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=2 bl=148 pwr=0
2025-03-30 07:58:27 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=3 bl=148 pwr=0
2025-03-30 07:58:27 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=4 bl=148 pwr=0
2025-03-30 07:58:27 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=5 bl=148 pwr=0
2025-03-30 07:58:27 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=6 bl=148 pwr=0
2025-03-30 07:58:27 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=7 bl=148 pwr=0
2025-03-30 07:58:27 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 07:58:27 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 07:58:27 [DEBUG] fake_trx.py:317 (BTS@172.18.26.20:5700) Recv FAKE_CI cmd
2025-03-30 07:58:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:58:27 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:58:27 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:58:27 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:58:27 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:58:27 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:58:27 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:58:27 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 07:58:27 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 07:58:27 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.26.22:6700) Recv SETFH cmd
2025-03-30 07:58:27 [INFO] transceiver.py:237 (MS@172.18.26.22:6700) Frequency hopping configured: hsn=2, maio=0, ma_len=2
2025-03-30 07:58:27 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:58:27 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:58:28 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-03-30 07:58:28 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:58:28 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:58:28 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:58:28 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:58:28 [DEBUG] clck_gen.py:128 IND CLOCK 306
2025-03-30 07:58:29 [DEBUG] clck_gen.py:128 IND CLOCK 408
2025-03-30 07:58:29 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:58:29 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:58:29 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:58:29 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:58:29 [DEBUG] clck_gen.py:128 IND CLOCK 510
2025-03-30 07:58:30 [DEBUG] clck_gen.py:128 IND CLOCK 612
2025-03-30 07:58:30 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:58:30 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:58:30 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:58:30 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:58:30 [DEBUG] clck_gen.py:128 IND CLOCK 714
2025-03-30 07:58:31 [DEBUG] clck_gen.py:128 IND CLOCK 816
2025-03-30 07:58:31 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:58:31 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:58:31 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:58:31 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:58:31 [DEBUG] clck_gen.py:128 IND CLOCK 918
2025-03-30 07:58:31 [DEBUG] clck_gen.py:128 IND CLOCK 1020
2025-03-30 07:58:32 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:58:32 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:58:32 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:58:32 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:58:32 [DEBUG] clck_gen.py:128 IND CLOCK 1122
2025-03-30 07:58:32 [DEBUG] clck_gen.py:128 IND CLOCK 1224
2025-03-30 07:58:33 [DEBUG] clck_gen.py:128 IND CLOCK 1326
2025-03-30 07:58:33 [WARNING] clck_gen.py:108 CLCKGen: time overrun by -8210us; resetting the clock
2025-03-30 07:58:33 [DEBUG] clck_gen.py:128 IND CLOCK 1428
2025-03-30 07:58:34 [DEBUG] clck_gen.py:128 IND CLOCK 1530
2025-03-30 07:58:34 [DEBUG] clck_gen.py:128 IND CLOCK 1632
2025-03-30 07:58:35 [DEBUG] clck_gen.py:128 IND CLOCK 1734
2025-03-30 07:58:35 [DEBUG] clck_gen.py:128 IND CLOCK 1836
2025-03-30 07:58:35 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:58:35 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:58:35 [INFO] transceiver.py:241 (MS@172.18.26.22:6700) Frequency hopping disabled
2025-03-30 07:58:35 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:58:35 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:58:35 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:58:35 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:58:35 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:58:35 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:58:35 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:58:35 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:58:35 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 07:58:35 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 07:58:35 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 07:58:40 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 07:58:40 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 07:58:40 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:58:40 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:58:40 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:58:40 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:58:40 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:58:40 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 07:58:40 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:58:40 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 07:58:40 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 07:58:40 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 07:58:40 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 07:58:40 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 07:58:40 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:58:40 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:58:40 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 07:58:40 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 07:58:40 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 07:58:40 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 07:58:40 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 07:58:40 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 07:58:40 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:58:40 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:58:40 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 07:58:40 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 07:58:40 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 07:58:40 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 07:58:40 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 07:58:40 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 07:58:40 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:58:40 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:58:40 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 07:58:40 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 07:58:40 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 07:58:40 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 07:58:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 07:58:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 07:58:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 07:58:40 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 07:58:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 07:58:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 07:58:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 07:58:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:58:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 07:58:40 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 07:58:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:58:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:58:40 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 07:58:40 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 07:58:40 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 07:58:40 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 07:58:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:58:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:58:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:58:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 07:58:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:58:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:58:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:58:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:58:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:58:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:58:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:58:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:58:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:58:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:58:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:58:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:58:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:58:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:58:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:58:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:58:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:58:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:58:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:58:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:58:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:58:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:58:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:58:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:58:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:58:40 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:58:40 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:58:40 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:58:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:58:40 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 07:58:40 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 07:58:40 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 07:58:40 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:58:45 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 07:58:45 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 07:58:45 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:58:45 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:58:45 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:58:45 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:58:45 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:58:45 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 07:58:45 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:58:45 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 07:58:45 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 07:58:45 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 07:58:45 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 07:58:45 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 07:58:45 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:58:45 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:58:45 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 07:58:45 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 07:58:45 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 07:58:45 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 07:58:45 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 07:58:45 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 07:58:45 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:58:45 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:58:45 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 07:58:45 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 07:58:45 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 07:58:45 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 07:58:45 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 07:58:45 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 07:58:45 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:58:45 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:58:45 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 07:58:45 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 07:58:45 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 07:58:45 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 07:58:45 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 07:58:45 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 07:58:45 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 07:58:45 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 07:58:45 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 07:58:45 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 07:58:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 07:58:45 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:58:45 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 07:58:45 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 07:58:45 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:58:45 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:58:45 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 07:58:45 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 07:58:45 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 07:58:45 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 07:58:45 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:58:45 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:58:45 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:58:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 07:58:45 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:58:45 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:58:45 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:58:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:58:45 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:58:45 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:58:45 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:58:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:58:45 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:58:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:58:45 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:58:45 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:58:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:58:45 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:58:45 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:58:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:58:45 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:58:45 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:58:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:58:45 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:58:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:58:45 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:58:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:58:45 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:58:45 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:58:45 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:58:45 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-03-30 07:58:46 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-03-30 07:58:46 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-03-30 07:58:46 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-03-30 07:58:46 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-03-30 07:58:46 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-03-30 07:58:46 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-03-30 07:58:46 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-03-30 07:58:46 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-03-30 07:58:46 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-03-30 07:58:46 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=0 bl=148 pwr=0
2025-03-30 07:58:46 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=1 bl=148 pwr=0
2025-03-30 07:58:46 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=2 bl=148 pwr=0
2025-03-30 07:58:46 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=3 bl=148 pwr=0
2025-03-30 07:58:46 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=4 bl=148 pwr=0
2025-03-30 07:58:46 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=5 bl=148 pwr=0
2025-03-30 07:58:46 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=6 bl=148 pwr=0
2025-03-30 07:58:46 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=7 bl=148 pwr=0
2025-03-30 07:58:46 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 07:58:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:58:46 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 07:58:46 [DEBUG] fake_trx.py:317 (BTS@172.18.26.20:5700) Recv FAKE_CI cmd
2025-03-30 07:58:46 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:58:46 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:58:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:58:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:58:46 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:58:46 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:58:46 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 07:58:46 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 07:58:46 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.26.22:6700) Recv SETFH cmd
2025-03-30 07:58:46 [INFO] transceiver.py:237 (MS@172.18.26.22:6700) Frequency hopping configured: hsn=2, maio=0, ma_len=2
2025-03-30 07:58:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:58:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:58:46 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-03-30 07:58:46 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:58:46 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:58:46 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:58:46 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:58:47 [DEBUG] clck_gen.py:128 IND CLOCK 306
2025-03-30 07:58:47 [DEBUG] clck_gen.py:128 IND CLOCK 408
2025-03-30 07:58:47 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:58:47 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:58:47 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:58:47 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:58:48 [DEBUG] clck_gen.py:128 IND CLOCK 510
2025-03-30 07:58:48 [DEBUG] clck_gen.py:128 IND CLOCK 612
2025-03-30 07:58:48 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:58:48 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:58:48 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:58:48 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:58:49 [DEBUG] clck_gen.py:128 IND CLOCK 714
2025-03-30 07:58:49 [DEBUG] clck_gen.py:128 IND CLOCK 816
2025-03-30 07:58:49 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:58:49 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:58:49 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:58:49 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:58:50 [DEBUG] clck_gen.py:128 IND CLOCK 918
2025-03-30 07:58:50 [DEBUG] clck_gen.py:128 IND CLOCK 1020
2025-03-30 07:58:50 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:58:50 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:58:50 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:58:50 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:58:51 [DEBUG] clck_gen.py:128 IND CLOCK 1122
2025-03-30 07:58:51 [DEBUG] clck_gen.py:128 IND CLOCK 1224
2025-03-30 07:58:52 [DEBUG] clck_gen.py:128 IND CLOCK 1326
2025-03-30 07:58:52 [DEBUG] clck_gen.py:128 IND CLOCK 1428
2025-03-30 07:58:53 [DEBUG] clck_gen.py:128 IND CLOCK 1530
2025-03-30 07:58:53 [DEBUG] clck_gen.py:128 IND CLOCK 1632
2025-03-30 07:58:53 [DEBUG] clck_gen.py:128 IND CLOCK 1734
2025-03-30 07:58:54 [DEBUG] clck_gen.py:128 IND CLOCK 1836
2025-03-30 07:58:54 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:58:54 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:58:54 [INFO] transceiver.py:241 (MS@172.18.26.22:6700) Frequency hopping disabled
2025-03-30 07:58:54 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:58:54 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:58:54 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:58:54 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:58:54 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:58:54 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:58:54 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:58:54 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:58:54 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 07:58:54 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 07:58:54 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 07:58:59 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 07:58:59 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 07:58:59 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:58:59 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:58:59 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:58:59 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:58:59 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:58:59 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 07:58:59 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:58:59 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 07:58:59 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 07:58:59 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 07:58:59 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 07:58:59 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 07:58:59 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:58:59 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:58:59 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 07:58:59 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 07:58:59 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 07:58:59 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 07:58:59 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 07:58:59 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 07:58:59 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:58:59 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:58:59 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 07:58:59 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 07:58:59 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 07:58:59 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 07:58:59 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 07:58:59 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 07:58:59 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:58:59 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:58:59 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 07:58:59 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 07:58:59 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 07:58:59 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 07:58:59 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 07:58:59 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 07:58:59 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 07:58:59 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 07:58:59 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 07:58:59 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 07:58:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 07:58:59 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:58:59 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 07:58:59 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 07:58:59 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:58:59 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:58:59 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 07:58:59 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 07:58:59 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 07:58:59 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 07:58:59 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:58:59 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:58:59 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:58:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 07:58:59 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:58:59 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:58:59 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:58:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:58:59 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:58:59 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:58:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:58:59 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:58:59 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:58:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:58:59 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:58:59 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:58:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:58:59 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:58:59 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:58:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:58:59 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:58:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:58:59 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:58:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:58:59 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:58:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:58:59 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:58:59 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:58:59 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:58:59 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:58:59 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:58:59 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 07:58:59 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 07:58:59 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 07:58:59 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:58:59 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:59:04 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 07:59:04 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 07:59:04 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:59:04 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:59:04 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:59:04 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:59:04 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:59:04 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 07:59:04 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:59:04 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 07:59:04 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 07:59:04 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 07:59:04 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 07:59:04 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 07:59:04 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:59:04 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:59:04 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 07:59:04 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 07:59:04 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 07:59:04 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 07:59:04 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 07:59:04 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 07:59:04 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:59:04 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:59:04 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 07:59:04 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 07:59:04 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 07:59:04 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 07:59:04 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 07:59:04 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 07:59:04 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:59:04 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:59:04 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 07:59:04 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 07:59:04 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 07:59:04 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 07:59:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 07:59:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 07:59:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 07:59:04 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 07:59:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 07:59:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 07:59:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 07:59:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 07:59:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:59:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:59:04 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 07:59:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:59:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:59:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:59:04 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 07:59:04 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 07:59:04 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 07:59:04 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 07:59:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:59:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:59:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:59:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 07:59:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:59:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:59:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:59:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:59:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:59:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:59:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:59:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:59:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:59:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:59:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:59:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:59:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:59:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:59:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:59:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:59:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:59:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:59:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:59:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:59:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:59:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:59:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:59:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:59:04 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-03-30 07:59:05 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-03-30 07:59:05 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-03-30 07:59:05 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-03-30 07:59:05 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-03-30 07:59:05 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-03-30 07:59:05 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-03-30 07:59:05 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-03-30 07:59:05 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-03-30 07:59:05 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-03-30 07:59:05 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=0 bl=148 pwr=0
2025-03-30 07:59:05 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=1 bl=148 pwr=0
2025-03-30 07:59:05 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=2 bl=148 pwr=0
2025-03-30 07:59:05 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=3 bl=148 pwr=0
2025-03-30 07:59:05 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=4 bl=148 pwr=0
2025-03-30 07:59:05 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=5 bl=148 pwr=0
2025-03-30 07:59:05 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=6 bl=148 pwr=0
2025-03-30 07:59:05 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=7 bl=148 pwr=0
2025-03-30 07:59:05 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 07:59:05 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 07:59:05 [DEBUG] fake_trx.py:317 (BTS@172.18.26.20:5700) Recv FAKE_CI cmd
2025-03-30 07:59:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:59:05 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:59:05 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:59:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:59:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:59:05 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:59:05 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:59:05 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 07:59:05 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 07:59:05 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.26.22:6700) Recv SETFH cmd
2025-03-30 07:59:05 [INFO] transceiver.py:237 (MS@172.18.26.22:6700) Frequency hopping configured: hsn=2, maio=0, ma_len=2
2025-03-30 07:59:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:59:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:59:05 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-03-30 07:59:05 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:59:05 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:59:05 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:59:05 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:59:06 [DEBUG] clck_gen.py:128 IND CLOCK 306
2025-03-30 07:59:06 [DEBUG] clck_gen.py:128 IND CLOCK 408
2025-03-30 07:59:06 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:59:06 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:59:06 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:59:06 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:59:06 [DEBUG] clck_gen.py:128 IND CLOCK 510
2025-03-30 07:59:07 [DEBUG] clck_gen.py:128 IND CLOCK 612
2025-03-30 07:59:07 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:59:07 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:59:07 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:59:07 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:59:07 [DEBUG] clck_gen.py:128 IND CLOCK 714
2025-03-30 07:59:08 [DEBUG] clck_gen.py:128 IND CLOCK 816
2025-03-30 07:59:08 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:59:08 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:59:08 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:59:08 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:59:08 [DEBUG] clck_gen.py:128 IND CLOCK 918
2025-03-30 07:59:09 [DEBUG] clck_gen.py:128 IND CLOCK 1020
2025-03-30 07:59:09 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:59:09 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:59:09 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:59:09 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:59:09 [DEBUG] clck_gen.py:128 IND CLOCK 1122
2025-03-30 07:59:10 [DEBUG] clck_gen.py:128 IND CLOCK 1224
2025-03-30 07:59:10 [DEBUG] clck_gen.py:128 IND CLOCK 1326
2025-03-30 07:59:11 [DEBUG] clck_gen.py:128 IND CLOCK 1428
2025-03-30 07:59:11 [DEBUG] clck_gen.py:128 IND CLOCK 1530
2025-03-30 07:59:12 [DEBUG] clck_gen.py:128 IND CLOCK 1632
2025-03-30 07:59:12 [DEBUG] clck_gen.py:128 IND CLOCK 1734
2025-03-30 07:59:13 [DEBUG] clck_gen.py:128 IND CLOCK 1836
2025-03-30 07:59:13 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:59:13 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:59:13 [INFO] transceiver.py:241 (MS@172.18.26.22:6700) Frequency hopping disabled
2025-03-30 07:59:13 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:59:13 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:59:13 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:59:13 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:59:13 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:59:13 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:59:13 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:59:13 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 07:59:13 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 07:59:13 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 07:59:13 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:59:18 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 07:59:18 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 07:59:18 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:59:18 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:59:18 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:59:18 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:59:18 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:59:18 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 07:59:18 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:59:18 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 07:59:18 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 07:59:18 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 07:59:18 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 07:59:18 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 07:59:18 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:59:18 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:59:18 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 07:59:18 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 07:59:18 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 07:59:18 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 07:59:18 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 07:59:18 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 07:59:18 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:59:18 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:59:18 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 07:59:18 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 07:59:18 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 07:59:18 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 07:59:18 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 07:59:18 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 07:59:18 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:59:18 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:59:18 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 07:59:18 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 07:59:18 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 07:59:18 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 07:59:18 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 07:59:18 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 07:59:18 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 07:59:18 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 07:59:18 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 07:59:18 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 07:59:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 07:59:18 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:59:18 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 07:59:18 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 07:59:18 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:59:18 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:59:18 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 07:59:18 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 07:59:18 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 07:59:18 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 07:59:18 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:59:18 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:59:18 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:59:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 07:59:18 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:59:18 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:59:18 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:59:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:59:18 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:59:18 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:59:18 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:59:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:59:18 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:59:18 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:59:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:59:18 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:59:18 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:59:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:59:18 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:59:18 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:59:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:59:18 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:59:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:59:18 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:59:18 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:59:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:59:18 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:59:18 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:59:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:59:18 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:59:18 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:59:18 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:59:18 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 07:59:18 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 07:59:18 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 07:59:18 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:59:23 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 07:59:23 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 07:59:23 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:59:23 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:59:23 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:59:23 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:59:23 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:59:23 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 07:59:23 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:59:23 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 07:59:23 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 07:59:23 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 07:59:23 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 07:59:23 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 07:59:23 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:59:23 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:59:23 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 07:59:23 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 07:59:23 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 07:59:23 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 07:59:23 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 07:59:23 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 07:59:23 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:59:23 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:59:23 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 07:59:23 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 07:59:23 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 07:59:23 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 07:59:23 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 07:59:23 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 07:59:23 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:59:23 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:59:23 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 07:59:23 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 07:59:23 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 07:59:23 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 07:59:23 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 07:59:23 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 07:59:23 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 07:59:23 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 07:59:23 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 07:59:23 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 07:59:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 07:59:23 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:59:23 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 07:59:23 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 07:59:23 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:59:23 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:59:23 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 07:59:23 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 07:59:23 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 07:59:23 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 07:59:23 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:59:23 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:59:23 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:59:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 07:59:23 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:59:23 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:59:23 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:59:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:59:23 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:59:23 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:59:23 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:59:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:59:23 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:59:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:59:23 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:59:23 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:59:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:59:23 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:59:23 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:59:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:59:23 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:59:23 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:59:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:59:23 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:59:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:59:23 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:59:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:59:23 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:59:23 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:59:23 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:59:23 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-03-30 07:59:23 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-03-30 07:59:23 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-03-30 07:59:23 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-03-30 07:59:23 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-03-30 07:59:23 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-03-30 07:59:23 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-03-30 07:59:23 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-03-30 07:59:23 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-03-30 07:59:23 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-03-30 07:59:23 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=0 bl=148 pwr=0
2025-03-30 07:59:23 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=1 bl=148 pwr=0
2025-03-30 07:59:23 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=2 bl=148 pwr=0
2025-03-30 07:59:23 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=3 bl=148 pwr=0
2025-03-30 07:59:23 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=4 bl=148 pwr=0
2025-03-30 07:59:23 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=5 bl=148 pwr=0
2025-03-30 07:59:23 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=6 bl=148 pwr=0
2025-03-30 07:59:23 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=7 bl=148 pwr=0
2025-03-30 07:59:23 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 07:59:23 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 07:59:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:59:23 [DEBUG] fake_trx.py:317 (BTS@172.18.26.20:5700) Recv FAKE_CI cmd
2025-03-30 07:59:23 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:59:23 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:59:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:59:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:59:23 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:59:23 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:59:23 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 07:59:23 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 07:59:23 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.26.22:6700) Recv SETFH cmd
2025-03-30 07:59:23 [INFO] transceiver.py:237 (MS@172.18.26.22:6700) Frequency hopping configured: hsn=2, maio=0, ma_len=2
2025-03-30 07:59:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:59:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:59:24 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-03-30 07:59:24 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:59:24 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:59:24 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:59:24 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:59:24 [DEBUG] clck_gen.py:128 IND CLOCK 306
2025-03-30 07:59:25 [DEBUG] clck_gen.py:128 IND CLOCK 408
2025-03-30 07:59:25 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:59:25 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:59:25 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:59:25 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:59:25 [DEBUG] clck_gen.py:128 IND CLOCK 510
2025-03-30 07:59:26 [DEBUG] clck_gen.py:128 IND CLOCK 612
2025-03-30 07:59:26 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:59:26 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:59:26 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:59:26 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:59:26 [DEBUG] clck_gen.py:128 IND CLOCK 714
2025-03-30 07:59:27 [DEBUG] clck_gen.py:128 IND CLOCK 816
2025-03-30 07:59:27 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:59:27 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:59:27 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:59:27 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:59:27 [DEBUG] clck_gen.py:128 IND CLOCK 918
2025-03-30 07:59:27 [DEBUG] clck_gen.py:128 IND CLOCK 1020
2025-03-30 07:59:28 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:59:28 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:59:28 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:59:28 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:59:28 [DEBUG] clck_gen.py:128 IND CLOCK 1122
2025-03-30 07:59:28 [DEBUG] clck_gen.py:128 IND CLOCK 1224
2025-03-30 07:59:29 [DEBUG] clck_gen.py:128 IND CLOCK 1326
2025-03-30 07:59:29 [DEBUG] clck_gen.py:128 IND CLOCK 1428
2025-03-30 07:59:30 [DEBUG] clck_gen.py:128 IND CLOCK 1530
2025-03-30 07:59:30 [DEBUG] clck_gen.py:128 IND CLOCK 1632
2025-03-30 07:59:31 [DEBUG] clck_gen.py:128 IND CLOCK 1734
2025-03-30 07:59:31 [DEBUG] clck_gen.py:128 IND CLOCK 1836
2025-03-30 07:59:32 [DEBUG] clck_gen.py:128 IND CLOCK 1938
2025-03-30 07:59:32 [DEBUG] clck_gen.py:128 IND CLOCK 2040
2025-03-30 07:59:33 [DEBUG] clck_gen.py:128 IND CLOCK 2142
2025-03-30 07:59:33 [DEBUG] clck_gen.py:128 IND CLOCK 2244
2025-03-30 07:59:34 [DEBUG] clck_gen.py:128 IND CLOCK 2346
2025-03-30 07:59:34 [DEBUG] clck_gen.py:128 IND CLOCK 2448
2025-03-30 07:59:35 [DEBUG] clck_gen.py:128 IND CLOCK 2550
2025-03-30 07:59:35 [DEBUG] clck_gen.py:128 IND CLOCK 2652
2025-03-30 07:59:35 [DEBUG] clck_gen.py:128 IND CLOCK 2754
2025-03-30 07:59:36 [DEBUG] clck_gen.py:128 IND CLOCK 2856
2025-03-30 07:59:36 [DEBUG] clck_gen.py:128 IND CLOCK 2958
2025-03-30 07:59:36 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=2963): ver=1 fn=2961 tn=0 bl=148 pwr=0
2025-03-30 07:59:36 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=2963): ver=1 fn=2961 tn=1 bl=148 pwr=0
2025-03-30 07:59:36 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=2963): ver=1 fn=2961 tn=2 bl=148 pwr=0
2025-03-30 07:59:36 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=2963): ver=1 fn=2961 tn=3 bl=148 pwr=0
2025-03-30 07:59:36 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=2963): ver=1 fn=2961 tn=4 bl=148 pwr=0
2025-03-30 07:59:36 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=2963): ver=1 fn=2961 tn=5 bl=148 pwr=0
2025-03-30 07:59:36 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=2963): ver=1 fn=2961 tn=6 bl=148 pwr=0
2025-03-30 07:59:36 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=2963): ver=1 fn=2961 tn=7 bl=148 pwr=0
2025-03-30 07:59:36 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=2963): ver=1 fn=2962 tn=0 bl=148 pwr=0
2025-03-30 07:59:36 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=2963): ver=1 fn=2962 tn=1 bl=148 pwr=0
2025-03-30 07:59:36 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=2963): ver=1 fn=2962 tn=2 bl=148 pwr=0
2025-03-30 07:59:36 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=2963): ver=1 fn=2962 tn=3 bl=148 pwr=0
2025-03-30 07:59:36 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=2963): ver=1 fn=2962 tn=4 bl=148 pwr=0
2025-03-30 07:59:36 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=2963): ver=1 fn=2962 tn=5 bl=148 pwr=0
2025-03-30 07:59:36 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=2963): ver=1 fn=2962 tn=6 bl=148 pwr=0
2025-03-30 07:59:36 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=2963): ver=1 fn=2962 tn=7 bl=148 pwr=0
2025-03-30 07:59:37 [DEBUG] clck_gen.py:128 IND CLOCK 3060
2025-03-30 07:59:37 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:59:37 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:59:37 [INFO] transceiver.py:241 (MS@172.18.26.22:6700) Frequency hopping disabled
2025-03-30 07:59:37 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:59:37 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:59:37 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:59:37 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:59:37 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:59:37 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:59:37 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:59:37 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:59:37 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 07:59:37 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 07:59:37 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 07:59:37 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=3161 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:59:37 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=3161 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:59:37 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=3161 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:59:37 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=3161 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:59:37 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=3161 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:59:37 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=3161 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:59:37 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=3161 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:59:37 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=3161 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 07:59:42 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 07:59:42 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 07:59:42 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:59:42 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:59:42 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:59:42 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:59:42 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:59:42 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 07:59:42 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:59:42 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 07:59:42 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 07:59:42 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 07:59:42 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 07:59:42 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 07:59:42 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:59:42 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:59:42 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 07:59:42 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 07:59:42 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 07:59:42 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 07:59:42 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 07:59:42 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 07:59:42 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:59:42 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:59:42 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 07:59:42 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 07:59:42 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 07:59:42 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 07:59:42 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 07:59:42 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 07:59:42 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:59:42 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:59:42 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 07:59:42 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 07:59:42 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 07:59:42 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 07:59:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 07:59:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 07:59:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 07:59:42 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 07:59:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 07:59:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 07:59:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 07:59:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:59:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 07:59:42 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 07:59:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:59:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:59:42 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 07:59:42 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 07:59:42 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 07:59:42 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 07:59:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:59:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:59:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:59:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 07:59:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:59:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:59:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:59:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:59:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:59:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:59:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:59:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:59:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:59:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:59:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:59:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:59:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:59:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:59:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:59:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:59:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:59:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:59:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:59:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:59:42 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:59:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:59:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:59:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:59:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:59:42 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:59:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:59:42 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:59:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:59:42 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 07:59:42 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 07:59:42 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 07:59:42 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:59:47 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 07:59:47 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 07:59:47 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:59:47 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:59:47 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:59:47 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:59:47 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:59:47 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 07:59:47 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:59:47 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 07:59:47 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 07:59:47 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 07:59:47 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 07:59:47 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 07:59:47 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:59:47 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:59:47 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 07:59:47 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 07:59:47 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 07:59:47 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 07:59:47 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 07:59:47 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 07:59:47 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:59:47 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:59:47 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 07:59:47 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 07:59:47 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 07:59:47 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 07:59:47 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 07:59:47 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 07:59:47 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 07:59:47 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:59:47 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 07:59:47 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 07:59:47 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 07:59:47 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 07:59:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 07:59:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 07:59:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 07:59:47 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 07:59:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 07:59:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 07:59:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 07:59:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:59:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 07:59:47 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 07:59:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:59:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:59:47 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 07:59:47 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 07:59:47 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 07:59:47 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 07:59:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:59:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:59:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:59:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 07:59:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:59:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:59:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:59:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:59:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:59:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:59:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:59:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:59:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:59:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:59:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:59:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:59:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:59:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:59:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 07:59:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:59:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:59:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:59:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:59:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:59:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:59:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:59:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 07:59:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 07:59:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:59:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 07:59:47 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-03-30 07:59:48 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-03-30 07:59:48 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-03-30 07:59:48 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-03-30 07:59:48 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-03-30 07:59:48 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-03-30 07:59:48 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-03-30 07:59:48 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-03-30 07:59:48 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-03-30 07:59:48 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-03-30 07:59:48 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=0 bl=148 pwr=0
2025-03-30 07:59:48 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=1 bl=148 pwr=0
2025-03-30 07:59:48 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=2 bl=148 pwr=0
2025-03-30 07:59:48 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=3 bl=148 pwr=0
2025-03-30 07:59:48 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=4 bl=148 pwr=0
2025-03-30 07:59:48 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=5 bl=148 pwr=0
2025-03-30 07:59:48 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=6 bl=148 pwr=0
2025-03-30 07:59:48 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=7 bl=148 pwr=0
2025-03-30 07:59:48 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 07:59:48 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 07:59:48 [DEBUG] fake_trx.py:317 (BTS@172.18.26.20:5700) Recv FAKE_CI cmd
2025-03-30 07:59:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 07:59:48 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:59:48 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:59:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 07:59:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:59:48 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 07:59:48 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 07:59:48 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 07:59:48 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 07:59:48 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.26.22:6700) Recv SETFH cmd
2025-03-30 07:59:48 [INFO] transceiver.py:237 (MS@172.18.26.22:6700) Frequency hopping configured: hsn=2, maio=0, ma_len=2
2025-03-30 07:59:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:59:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 07:59:48 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-03-30 07:59:48 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:59:48 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:59:48 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:59:48 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:59:49 [DEBUG] clck_gen.py:128 IND CLOCK 306
2025-03-30 07:59:49 [DEBUG] clck_gen.py:128 IND CLOCK 408
2025-03-30 07:59:49 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:59:49 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:59:49 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:59:49 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:59:50 [DEBUG] clck_gen.py:128 IND CLOCK 510
2025-03-30 07:59:50 [DEBUG] clck_gen.py:128 IND CLOCK 612
2025-03-30 07:59:50 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:59:50 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:59:50 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:59:50 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:59:51 [DEBUG] clck_gen.py:128 IND CLOCK 714
2025-03-30 07:59:51 [DEBUG] clck_gen.py:128 IND CLOCK 816
2025-03-30 07:59:51 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:59:51 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:59:51 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:59:51 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:59:52 [DEBUG] clck_gen.py:128 IND CLOCK 918
2025-03-30 07:59:52 [DEBUG] clck_gen.py:128 IND CLOCK 1020
2025-03-30 07:59:52 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:59:52 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:59:52 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:59:52 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:59:53 [DEBUG] clck_gen.py:128 IND CLOCK 1122
2025-03-30 07:59:53 [DEBUG] clck_gen.py:128 IND CLOCK 1224
2025-03-30 07:59:54 [DEBUG] clck_gen.py:128 IND CLOCK 1326
2025-03-30 07:59:54 [DEBUG] clck_gen.py:128 IND CLOCK 1428
2025-03-30 07:59:54 [DEBUG] clck_gen.py:128 IND CLOCK 1530
2025-03-30 07:59:55 [DEBUG] clck_gen.py:128 IND CLOCK 1632
2025-03-30 07:59:55 [DEBUG] clck_gen.py:128 IND CLOCK 1734
2025-03-30 07:59:56 [DEBUG] clck_gen.py:128 IND CLOCK 1836
2025-03-30 07:59:56 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 07:59:56 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 07:59:56 [INFO] transceiver.py:241 (MS@172.18.26.22:6700) Frequency hopping disabled
2025-03-30 07:59:56 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 07:59:56 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 07:59:56 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 07:59:56 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 07:59:56 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 07:59:56 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 07:59:56 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 07:59:56 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 07:59:56 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 07:59:56 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 07:59:56 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 08:00:01 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 08:00:01 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 08:00:01 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 08:00:01 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 08:00:01 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 08:00:01 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 08:00:01 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 08:00:01 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 08:00:01 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 08:00:01 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 08:00:01 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 08:00:01 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 08:00:01 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 08:00:01 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 08:00:01 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 08:00:01 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 08:00:01 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 08:00:01 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 08:00:01 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 08:00:01 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 08:00:01 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 08:00:01 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 08:00:01 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 08:00:01 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 08:00:01 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 08:00:01 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 08:00:01 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 08:00:01 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 08:00:01 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 08:00:01 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 08:00:01 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 08:00:01 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 08:00:01 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 08:00:01 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 08:00:01 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 08:00:01 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 08:00:01 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 08:00:01 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 08:00:01 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 08:00:01 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 08:00:01 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 08:00:01 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 08:00:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 08:00:01 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 08:00:01 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 08:00:01 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 08:00:01 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 08:00:01 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 08:00:01 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 08:00:01 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 08:00:01 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 08:00:01 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 08:00:01 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 08:00:01 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 08:00:01 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 08:00:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 08:00:01 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 08:00:01 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 08:00:01 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 08:00:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 08:00:01 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 08:00:01 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 08:00:01 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 08:00:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 08:00:01 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 08:00:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 08:00:01 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 08:00:01 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 08:00:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 08:00:01 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 08:00:01 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 08:00:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 08:00:01 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 08:00:01 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 08:00:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 08:00:01 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 08:00:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 08:00:01 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 08:00:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 08:00:01 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 08:00:01 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 08:00:01 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 08:00:01 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 08:00:01 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 08:00:01 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 08:00:01 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 08:00:01 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 08:00:01 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 08:00:06 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 08:00:06 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 08:00:06 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 08:00:06 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 08:00:06 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 08:00:06 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 08:00:06 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 08:00:06 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 08:00:06 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 08:00:06 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 08:00:06 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 08:00:06 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 08:00:06 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 08:00:06 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 08:00:06 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 08:00:06 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 08:00:06 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 08:00:06 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 08:00:06 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 08:00:06 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 08:00:06 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 08:00:06 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 08:00:06 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 08:00:06 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 08:00:06 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 08:00:06 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 08:00:06 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 08:00:06 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 08:00:06 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 08:00:06 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 08:00:06 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 08:00:06 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 08:00:06 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 08:00:06 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 08:00:06 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 08:00:06 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 08:00:06 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 08:00:06 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 08:00:06 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 08:00:06 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 08:00:06 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 08:00:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 08:00:06 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 08:00:06 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 08:00:06 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 08:00:06 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 08:00:06 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 08:00:06 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 08:00:06 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 08:00:06 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 08:00:06 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 08:00:06 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 08:00:06 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 08:00:06 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 08:00:06 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 08:00:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 08:00:06 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 08:00:06 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 08:00:06 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 08:00:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 08:00:06 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 08:00:06 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 08:00:06 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 08:00:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 08:00:06 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 08:00:06 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 08:00:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 08:00:06 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 08:00:06 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 08:00:06 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 08:00:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 08:00:06 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 08:00:06 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 08:00:06 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 08:00:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 08:00:06 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 08:00:06 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 08:00:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 08:00:06 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 08:00:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 08:00:06 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 08:00:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 08:00:06 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-03-30 08:00:07 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-03-30 08:00:07 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-03-30 08:00:07 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-03-30 08:00:07 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-03-30 08:00:07 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-03-30 08:00:07 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-03-30 08:00:07 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-03-30 08:00:07 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-03-30 08:00:07 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-03-30 08:00:07 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=0 bl=148 pwr=0
2025-03-30 08:00:07 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=1 bl=148 pwr=0
2025-03-30 08:00:07 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=2 bl=148 pwr=0
2025-03-30 08:00:07 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=3 bl=148 pwr=0
2025-03-30 08:00:07 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=4 bl=148 pwr=0
2025-03-30 08:00:07 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=5 bl=148 pwr=0
2025-03-30 08:00:07 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=6 bl=148 pwr=0
2025-03-30 08:00:07 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=7 bl=148 pwr=0
2025-03-30 08:00:07 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 08:00:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:00:07 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 08:00:07 [DEBUG] fake_trx.py:317 (BTS@172.18.26.20:5700) Recv FAKE_CI cmd
2025-03-30 08:00:07 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 08:00:07 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 08:00:07 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 08:00:07 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 08:00:07 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 08:00:07 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 08:00:07 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 08:00:07 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 08:00:07 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-03-30 08:00:07 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 08:00:07 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 08:00:07 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 08:00:07 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 08:00:08 [DEBUG] clck_gen.py:128 IND CLOCK 306
2025-03-30 08:00:08 [DEBUG] clck_gen.py:128 IND CLOCK 408
2025-03-30 08:00:08 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 08:00:08 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 08:00:08 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 08:00:08 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 08:00:08 [DEBUG] clck_gen.py:128 IND CLOCK 510
2025-03-30 08:00:09 [DEBUG] clck_gen.py:128 IND CLOCK 612
2025-03-30 08:00:09 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 08:00:09 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 08:00:09 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 08:00:09 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 08:00:09 [DEBUG] clck_gen.py:128 IND CLOCK 714
2025-03-30 08:00:10 [DEBUG] clck_gen.py:128 IND CLOCK 816
2025-03-30 08:00:10 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 08:00:10 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 08:00:10 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 08:00:10 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 08:00:10 [DEBUG] clck_gen.py:128 IND CLOCK 918
2025-03-30 08:00:11 [DEBUG] clck_gen.py:128 IND CLOCK 1020
2025-03-30 08:00:11 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 08:00:11 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 08:00:11 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 08:00:11 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 08:00:11 [DEBUG] clck_gen.py:128 IND CLOCK 1122
2025-03-30 08:00:12 [DEBUG] clck_gen.py:128 IND CLOCK 1224
2025-03-30 08:00:12 [DEBUG] clck_gen.py:128 IND CLOCK 1326
2025-03-30 08:00:13 [DEBUG] clck_gen.py:128 IND CLOCK 1428
2025-03-30 08:00:13 [DEBUG] clck_gen.py:128 IND CLOCK 1530
2025-03-30 08:00:14 [DEBUG] clck_gen.py:128 IND CLOCK 1632
2025-03-30 08:00:14 [DEBUG] clck_gen.py:128 IND CLOCK 1734
2025-03-30 08:00:15 [DEBUG] clck_gen.py:128 IND CLOCK 1836
2025-03-30 08:00:15 [DEBUG] clck_gen.py:128 IND CLOCK 1938
2025-03-30 08:00:16 [DEBUG] clck_gen.py:128 IND CLOCK 2040
2025-03-30 08:00:16 [DEBUG] clck_gen.py:128 IND CLOCK 2142
2025-03-30 08:00:16 [DEBUG] clck_gen.py:128 IND CLOCK 2244
2025-03-30 08:00:17 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 08:00:17 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 08:00:17 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 08:00:17 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 08:00:17 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 08:00:17 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 08:00:17 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 08:00:17 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 08:00:17 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 08:00:17 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 08:00:17 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 08:00:17 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 08:00:17 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 08:00:17 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=2295 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 08:00:17 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=2295 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 08:00:17 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=2295 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 08:00:17 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=2295 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 08:00:17 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=2295 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 08:00:17 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=2295 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 08:00:17 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=2295 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 08:00:17 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=2295 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 08:00:22 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 08:00:22 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 08:00:22 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 08:00:22 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 08:00:22 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 08:00:22 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 08:00:22 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 08:00:22 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 08:00:22 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 08:00:22 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 08:00:22 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 08:00:22 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 08:00:22 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 08:00:22 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 08:00:22 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 08:00:22 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 08:00:22 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 08:00:22 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 08:00:22 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 08:00:22 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 08:00:22 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 08:00:22 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 08:00:22 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 08:00:22 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 08:00:22 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 08:00:22 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 08:00:22 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 08:00:22 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 08:00:22 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 08:00:22 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 08:00:22 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 08:00:22 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 08:00:22 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 08:00:22 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 08:00:22 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 08:00:22 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 08:00:22 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 08:00:22 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 08:00:22 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 08:00:22 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 08:00:22 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 08:00:22 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 08:00:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 08:00:22 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 08:00:22 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 08:00:22 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 08:00:22 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 08:00:22 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 08:00:22 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 08:00:22 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 08:00:22 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 08:00:22 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 08:00:22 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 08:00:22 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 08:00:22 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 08:00:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 08:00:22 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 08:00:22 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 08:00:22 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 08:00:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 08:00:22 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 08:00:22 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 08:00:22 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 08:00:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 08:00:22 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 08:00:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 08:00:22 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 08:00:22 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 08:00:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 08:00:22 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 08:00:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 08:00:22 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 08:00:22 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 08:00:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 08:00:22 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 08:00:22 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 08:00:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 08:00:22 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 08:00:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 08:00:22 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 08:00:22 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 08:00:22 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 08:00:22 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 08:00:22 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 08:00:22 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 08:00:22 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 08:00:22 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 08:00:22 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 08:00:27 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 08:00:27 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 08:00:27 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 08:00:27 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 08:00:27 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 08:00:27 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 08:00:27 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 08:00:27 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 08:00:27 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 08:00:27 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 08:00:27 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 08:00:27 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 08:00:27 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 08:00:27 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 08:00:27 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 08:00:27 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 08:00:27 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 08:00:27 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 08:00:27 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 08:00:27 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 08:00:27 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 08:00:27 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 08:00:27 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 08:00:27 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 08:00:27 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 08:00:27 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 08:00:27 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 08:00:27 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 08:00:27 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 08:00:27 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 08:00:27 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 08:00:27 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 08:00:27 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 08:00:27 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 08:00:27 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 08:00:27 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 08:00:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 08:00:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 08:00:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 08:00:27 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 08:00:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 08:00:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 08:00:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 08:00:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 08:00:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 08:00:27 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 08:00:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 08:00:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 08:00:27 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 08:00:27 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 08:00:27 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 08:00:27 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 08:00:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 08:00:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 08:00:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 08:00:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 08:00:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 08:00:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 08:00:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 08:00:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 08:00:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 08:00:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 08:00:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 08:00:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 08:00:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 08:00:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 08:00:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 08:00:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 08:00:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 08:00:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 08:00:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 08:00:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 08:00:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 08:00:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 08:00:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 08:00:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 08:00:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 08:00:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 08:00:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 08:00:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 08:00:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 08:00:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 08:00:27 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-03-30 08:00:27 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-03-30 08:00:27 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-03-30 08:00:27 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-03-30 08:00:27 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-03-30 08:00:27 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-03-30 08:00:27 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-03-30 08:00:27 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-03-30 08:00:27 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-03-30 08:00:27 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-03-30 08:00:27 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=0 bl=148 pwr=0
2025-03-30 08:00:27 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=1 bl=148 pwr=0
2025-03-30 08:00:27 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=2 bl=148 pwr=0
2025-03-30 08:00:27 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=3 bl=148 pwr=0
2025-03-30 08:00:27 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=4 bl=148 pwr=0
2025-03-30 08:00:27 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=5 bl=148 pwr=0
2025-03-30 08:00:27 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=6 bl=148 pwr=0
2025-03-30 08:00:27 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=7 bl=148 pwr=0
2025-03-30 08:00:27 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 08:00:27 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 08:00:27 [DEBUG] fake_trx.py:317 (BTS@172.18.26.20:5700) Recv FAKE_CI cmd
2025-03-30 08:00:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:00:27 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 08:00:27 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 08:00:27 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 08:00:27 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 08:00:27 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 08:00:27 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 08:00:27 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 08:00:27 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 08:00:27 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.26.22:6700) Recv SETFH cmd
2025-03-30 08:00:27 [INFO] transceiver.py:237 (MS@172.18.26.22:6700) Frequency hopping configured: hsn=2, maio=0, ma_len=2
2025-03-30 08:00:27 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 08:00:27 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 08:00:28 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-03-30 08:00:28 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 08:00:28 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 08:00:28 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 08:00:28 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 08:00:28 [DEBUG] clck_gen.py:128 IND CLOCK 306
2025-03-30 08:00:29 [DEBUG] clck_gen.py:128 IND CLOCK 408
2025-03-30 08:00:29 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 08:00:29 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 08:00:29 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 08:00:29 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 08:00:29 [DEBUG] clck_gen.py:128 IND CLOCK 510
2025-03-30 08:00:30 [DEBUG] clck_gen.py:128 IND CLOCK 612
2025-03-30 08:00:30 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 08:00:30 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 08:00:30 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 08:00:30 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 08:00:30 [DEBUG] clck_gen.py:128 IND CLOCK 714
2025-03-30 08:00:31 [DEBUG] clck_gen.py:128 IND CLOCK 816
2025-03-30 08:00:31 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 08:00:31 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 08:00:31 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 08:00:31 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 08:00:31 [DEBUG] clck_gen.py:128 IND CLOCK 918
2025-03-30 08:00:32 [DEBUG] clck_gen.py:128 IND CLOCK 1020
2025-03-30 08:00:32 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 08:00:32 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 08:00:32 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 08:00:32 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 08:00:32 [DEBUG] clck_gen.py:128 IND CLOCK 1122
2025-03-30 08:00:32 [DEBUG] clck_gen.py:128 IND CLOCK 1224
2025-03-30 08:00:33 [DEBUG] clck_gen.py:128 IND CLOCK 1326
2025-03-30 08:00:33 [DEBUG] clck_gen.py:128 IND CLOCK 1428
2025-03-30 08:00:34 [DEBUG] clck_gen.py:128 IND CLOCK 1530
2025-03-30 08:00:34 [DEBUG] clck_gen.py:128 IND CLOCK 1632
2025-03-30 08:00:35 [DEBUG] clck_gen.py:128 IND CLOCK 1734
2025-03-30 08:00:35 [DEBUG] clck_gen.py:128 IND CLOCK 1836
2025-03-30 08:00:36 [DEBUG] clck_gen.py:128 IND CLOCK 1938
2025-03-30 08:00:36 [DEBUG] clck_gen.py:128 IND CLOCK 2040
2025-03-30 08:00:37 [DEBUG] clck_gen.py:128 IND CLOCK 2142
2025-03-30 08:00:37 [DEBUG] clck_gen.py:128 IND CLOCK 2244
2025-03-30 08:00:38 [DEBUG] clck_gen.py:128 IND CLOCK 2346
2025-03-30 08:00:38 [DEBUG] clck_gen.py:128 IND CLOCK 2448
2025-03-30 08:00:38 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 08:00:38 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 08:00:38 [INFO] transceiver.py:241 (MS@172.18.26.22:6700) Frequency hopping disabled
2025-03-30 08:00:38 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 08:00:38 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 08:00:38 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 08:00:38 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 08:00:38 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 08:00:38 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 08:00:38 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 08:00:38 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 08:00:38 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 08:00:38 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 08:00:38 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 08:00:43 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 08:00:43 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 08:00:43 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 08:00:43 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 08:00:43 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 08:00:43 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 08:00:43 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 08:00:43 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 08:00:43 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 08:00:43 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 08:00:43 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 08:00:43 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 08:00:43 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 08:00:43 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 08:00:43 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 08:00:43 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 08:00:43 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 08:00:43 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 08:00:43 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 08:00:43 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 08:00:43 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 08:00:43 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 08:00:43 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 08:00:43 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 08:00:43 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 08:00:43 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 08:00:43 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 08:00:43 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 08:00:43 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 08:00:43 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 08:00:43 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 08:00:43 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 08:00:43 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 08:00:43 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 08:00:43 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 08:00:43 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 08:00:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 08:00:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 08:00:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 08:00:43 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 08:00:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 08:00:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 08:00:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 08:00:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 08:00:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 08:00:43 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 08:00:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 08:00:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 08:00:43 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 08:00:43 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 08:00:43 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 08:00:43 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 08:00:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 08:00:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 08:00:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 08:00:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 08:00:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 08:00:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 08:00:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 08:00:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 08:00:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 08:00:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 08:00:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 08:00:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 08:00:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 08:00:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 08:00:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 08:00:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 08:00:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 08:00:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 08:00:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 08:00:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 08:00:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 08:00:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 08:00:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 08:00:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 08:00:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 08:00:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 08:00:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 08:00:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 08:00:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 08:00:43 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 08:00:43 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 08:00:43 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 08:00:43 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 08:00:43 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 08:00:43 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 08:00:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 08:00:48 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 08:00:48 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 08:00:48 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 08:00:48 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 08:00:48 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 08:00:48 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 08:00:48 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 08:00:48 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 08:00:48 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 08:00:48 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 08:00:48 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 08:00:48 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 08:00:48 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 08:00:48 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 08:00:48 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 08:00:48 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 08:00:48 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 08:00:48 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 08:00:48 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 08:00:48 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 08:00:48 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 08:00:48 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 08:00:48 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 08:00:48 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 08:00:48 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 08:00:48 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 08:00:48 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 08:00:48 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 08:00:48 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 08:00:48 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 08:00:48 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 08:00:48 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 08:00:48 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 08:00:48 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 08:00:48 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 08:00:48 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 08:00:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 08:00:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 08:00:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 08:00:48 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 08:00:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 08:00:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 08:00:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 08:00:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 08:00:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 08:00:48 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 08:00:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 08:00:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 08:00:48 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 08:00:48 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 08:00:48 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 08:00:48 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 08:00:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 08:00:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 08:00:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 08:00:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 08:00:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 08:00:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 08:00:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 08:00:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 08:00:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 08:00:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 08:00:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 08:00:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 08:00:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 08:00:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 08:00:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 08:00:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 08:00:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 08:00:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 08:00:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 08:00:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 08:00:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 08:00:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 08:00:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 08:00:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 08:00:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 08:00:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 08:00:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 08:00:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 08:00:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 08:00:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 08:00:48 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-03-30 08:00:49 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-03-30 08:00:49 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-03-30 08:00:49 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-03-30 08:00:49 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-03-30 08:00:49 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-03-30 08:00:49 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-03-30 08:00:49 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-03-30 08:00:49 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-03-30 08:00:49 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-03-30 08:00:49 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=0 bl=148 pwr=0
2025-03-30 08:00:49 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=1 bl=148 pwr=0
2025-03-30 08:00:49 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=2 bl=148 pwr=0
2025-03-30 08:00:49 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=3 bl=148 pwr=0
2025-03-30 08:00:49 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=4 bl=148 pwr=0
2025-03-30 08:00:49 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=5 bl=148 pwr=0
2025-03-30 08:00:49 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=6 bl=148 pwr=0
2025-03-30 08:00:49 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=7 bl=148 pwr=0
2025-03-30 08:00:49 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 08:00:49 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 08:00:49 [DEBUG] fake_trx.py:317 (BTS@172.18.26.20:5700) Recv FAKE_CI cmd
2025-03-30 08:00:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:00:49 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-03-30 08:00:49 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 08:00:49 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 08:00:49 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 08:00:49 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 08:00:50 [DEBUG] clck_gen.py:128 IND CLOCK 306
2025-03-30 08:00:50 [DEBUG] clck_gen.py:128 IND CLOCK 408
2025-03-30 08:00:50 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 08:00:50 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 08:00:50 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 08:00:50 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 08:00:51 [DEBUG] clck_gen.py:128 IND CLOCK 510
2025-03-30 08:00:51 [DEBUG] clck_gen.py:128 IND CLOCK 612
2025-03-30 08:00:51 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 08:00:51 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 08:00:51 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 08:00:51 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 08:00:52 [DEBUG] clck_gen.py:128 IND CLOCK 714
2025-03-30 08:00:52 [DEBUG] clck_gen.py:128 IND CLOCK 816
2025-03-30 08:00:52 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 08:00:52 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 08:00:52 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 08:00:52 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 08:00:53 [DEBUG] clck_gen.py:128 IND CLOCK 918
2025-03-30 08:00:53 [DEBUG] clck_gen.py:128 IND CLOCK 1020
2025-03-30 08:00:53 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 08:00:53 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 08:00:53 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 08:00:53 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 08:00:54 [DEBUG] clck_gen.py:128 IND CLOCK 1122
2025-03-30 08:00:54 [DEBUG] clck_gen.py:128 IND CLOCK 1224
2025-03-30 08:00:55 [DEBUG] clck_gen.py:128 IND CLOCK 1326
2025-03-30 08:00:55 [DEBUG] clck_gen.py:128 IND CLOCK 1428
2025-03-30 08:00:56 [DEBUG] clck_gen.py:128 IND CLOCK 1530
2025-03-30 08:00:56 [DEBUG] clck_gen.py:128 IND CLOCK 1632
2025-03-30 08:00:56 [DEBUG] clck_gen.py:128 IND CLOCK 1734
2025-03-30 08:00:57 [DEBUG] clck_gen.py:128 IND CLOCK 1836
2025-03-30 08:00:57 [DEBUG] clck_gen.py:128 IND CLOCK 1938
2025-03-30 08:00:58 [DEBUG] clck_gen.py:128 IND CLOCK 2040
2025-03-30 08:00:58 [DEBUG] clck_gen.py:128 IND CLOCK 2142
2025-03-30 08:00:59 [DEBUG] clck_gen.py:128 IND CLOCK 2244
2025-03-30 08:00:59 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 08:00:59 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 08:00:59 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 08:00:59 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 08:00:59 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 08:00:59 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 08:00:59 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 08:00:59 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 08:00:59 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 08:00:59 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 08:00:59 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 08:01:04 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 08:01:04 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 08:01:04 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 08:01:04 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 08:01:04 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 08:01:04 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 08:01:04 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 08:01:04 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 08:01:04 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 08:01:04 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 08:01:04 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 08:01:04 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 08:01:04 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 08:01:04 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 08:01:04 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 08:01:04 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 08:01:04 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 08:01:04 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 08:01:04 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 08:01:04 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 08:01:04 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 08:01:04 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 08:01:04 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 08:01:04 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 08:01:04 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 08:01:04 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 08:01:04 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 08:01:04 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 08:01:04 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 08:01:04 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 08:01:04 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 08:01:04 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 08:01:04 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 08:01:04 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 08:01:04 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 08:01:04 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 08:01:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 08:01:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 08:01:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 08:01:04 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 08:01:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 08:01:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 08:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 08:01:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 08:01:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 08:01:04 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 08:01:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 08:01:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 08:01:04 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 08:01:04 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 08:01:04 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 08:01:04 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 08:01:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 08:01:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 08:01:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 08:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 08:01:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 08:01:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 08:01:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 08:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 08:01:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 08:01:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 08:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 08:01:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 08:01:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 08:01:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 08:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 08:01:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 08:01:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 08:01:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 08:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 08:01:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 08:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 08:01:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 08:01:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 08:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 08:01:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 08:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 08:01:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 08:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 08:01:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 08:01:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 08:01:04 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 08:01:04 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 08:01:04 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 08:01:04 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 08:01:04 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 08:01:04 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 08:01:04 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 08:01:09 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 08:01:09 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 08:01:09 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 08:01:09 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 08:01:09 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 08:01:09 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 08:01:09 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 08:01:09 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 08:01:09 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 08:01:09 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 08:01:09 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 08:01:09 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 08:01:09 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 08:01:09 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 08:01:09 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 08:01:09 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 08:01:09 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 08:01:09 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 08:01:09 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 08:01:09 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 08:01:09 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 08:01:09 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 08:01:09 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 08:01:09 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 08:01:09 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 08:01:09 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 08:01:09 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 08:01:09 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 08:01:09 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 08:01:09 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 08:01:09 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 08:01:09 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 08:01:09 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 08:01:09 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 08:01:09 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 08:01:09 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 08:01:09 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 08:01:09 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 08:01:09 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 08:01:09 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 08:01:09 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 08:01:09 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 08:01:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 08:01:09 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 08:01:09 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 08:01:09 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 08:01:09 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 08:01:09 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 08:01:09 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 08:01:09 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 08:01:09 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 08:01:09 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 08:01:09 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 08:01:09 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 08:01:09 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 08:01:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 08:01:09 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 08:01:09 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 08:01:09 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 08:01:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 08:01:09 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 08:01:09 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 08:01:09 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 08:01:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 08:01:09 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 08:01:09 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 08:01:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 08:01:09 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 08:01:09 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 08:01:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 08:01:09 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 08:01:09 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 08:01:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 08:01:09 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 08:01:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 08:01:09 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 08:01:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 08:01:09 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 08:01:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 08:01:09 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 08:01:09 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 08:01:09 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 08:01:09 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-03-30 08:01:10 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-03-30 08:01:10 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-03-30 08:01:10 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-03-30 08:01:10 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-03-30 08:01:10 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-03-30 08:01:10 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-03-30 08:01:10 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-03-30 08:01:10 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-03-30 08:01:10 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-03-30 08:01:10 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=0 bl=148 pwr=0
2025-03-30 08:01:10 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=1 bl=148 pwr=0
2025-03-30 08:01:10 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=2 bl=148 pwr=0
2025-03-30 08:01:10 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=3 bl=148 pwr=0
2025-03-30 08:01:10 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=4 bl=148 pwr=0
2025-03-30 08:01:10 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=5 bl=148 pwr=0
2025-03-30 08:01:10 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=6 bl=148 pwr=0
2025-03-30 08:01:10 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=7 bl=148 pwr=0
2025-03-30 08:01:10 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 08:01:10 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 08:01:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:01:10 [DEBUG] fake_trx.py:317 (BTS@172.18.26.20:5700) Recv FAKE_CI cmd
2025-03-30 08:01:10 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-03-30 08:01:10 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 08:01:10 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 08:01:10 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 08:01:10 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 08:01:10 [DEBUG] clck_gen.py:128 IND CLOCK 306
2025-03-30 08:01:11 [DEBUG] clck_gen.py:128 IND CLOCK 408
2025-03-30 08:01:11 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 08:01:11 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 08:01:11 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 08:01:11 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 08:01:11 [DEBUG] clck_gen.py:128 IND CLOCK 510
2025-03-30 08:01:12 [DEBUG] clck_gen.py:128 IND CLOCK 612
2025-03-30 08:01:12 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 08:01:12 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 08:01:12 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 08:01:12 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 08:01:12 [DEBUG] clck_gen.py:128 IND CLOCK 714
2025-03-30 08:01:13 [DEBUG] clck_gen.py:128 IND CLOCK 816
2025-03-30 08:01:13 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 08:01:13 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 08:01:13 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 08:01:13 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 08:01:13 [DEBUG] clck_gen.py:128 IND CLOCK 918
2025-03-30 08:01:14 [DEBUG] clck_gen.py:128 IND CLOCK 1020
2025-03-30 08:01:14 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 08:01:14 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 08:01:14 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 08:01:14 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 08:01:14 [DEBUG] clck_gen.py:128 IND CLOCK 1122
2025-03-30 08:01:15 [DEBUG] clck_gen.py:128 IND CLOCK 1224
2025-03-30 08:01:15 [DEBUG] clck_gen.py:128 IND CLOCK 1326
2025-03-30 08:01:16 [DEBUG] clck_gen.py:128 IND CLOCK 1428
2025-03-30 08:01:16 [DEBUG] clck_gen.py:128 IND CLOCK 1530
2025-03-30 08:01:17 [DEBUG] clck_gen.py:128 IND CLOCK 1632
2025-03-30 08:01:17 [DEBUG] clck_gen.py:128 IND CLOCK 1734
2025-03-30 08:01:18 [DEBUG] clck_gen.py:128 IND CLOCK 1836
2025-03-30 08:01:18 [DEBUG] clck_gen.py:128 IND CLOCK 1938
2025-03-30 08:01:19 [DEBUG] clck_gen.py:128 IND CLOCK 2040
2025-03-30 08:01:19 [DEBUG] clck_gen.py:128 IND CLOCK 2142
2025-03-30 08:01:19 [DEBUG] clck_gen.py:128 IND CLOCK 2244
2025-03-30 08:01:20 [DEBUG] clck_gen.py:128 IND CLOCK 2346
2025-03-30 08:01:20 [DEBUG] clck_gen.py:128 IND CLOCK 2448
2025-03-30 08:01:21 [DEBUG] clck_gen.py:128 IND CLOCK 2550
2025-03-30 08:01:21 [DEBUG] clck_gen.py:128 IND CLOCK 2652
2025-03-30 08:01:22 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 08:01:22 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 08:01:22 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 08:01:22 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 08:01:22 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 08:01:22 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 08:01:22 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 08:01:22 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 08:01:22 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 08:01:22 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 08:01:22 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 08:01:27 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 08:01:27 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 08:01:27 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 08:01:27 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 08:01:27 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 08:01:27 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 08:01:27 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 08:01:27 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 08:01:27 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 08:01:27 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 08:01:27 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 08:01:27 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 08:01:27 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 08:01:27 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 08:01:27 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 08:01:27 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 08:01:27 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 08:01:27 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 08:01:27 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 08:01:27 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 08:01:27 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 08:01:27 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 08:01:27 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 08:01:27 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 08:01:27 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 08:01:27 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 08:01:27 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 08:01:27 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 08:01:27 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 08:01:27 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 08:01:27 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 08:01:27 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 08:01:27 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 08:01:27 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 08:01:27 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 08:01:27 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 08:01:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 08:01:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 08:01:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 08:01:27 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 08:01:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 08:01:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 08:01:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 08:01:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 08:01:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 08:01:27 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 08:01:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 08:01:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 08:01:27 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 08:01:27 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 08:01:27 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 08:01:27 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 08:01:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 08:01:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 08:01:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 08:01:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 08:01:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 08:01:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 08:01:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 08:01:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 08:01:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 08:01:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 08:01:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 08:01:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 08:01:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 08:01:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 08:01:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 08:01:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 08:01:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 08:01:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 08:01:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 08:01:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 08:01:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 08:01:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 08:01:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 08:01:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 08:01:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 08:01:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 08:01:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 08:01:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 08:01:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 08:01:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 08:01:27 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-03-30 08:01:27 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-03-30 08:01:27 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-03-30 08:01:27 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-03-30 08:01:27 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-03-30 08:01:27 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-03-30 08:01:27 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-03-30 08:01:27 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-03-30 08:01:27 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-03-30 08:01:27 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-03-30 08:01:27 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=0 bl=148 pwr=0
2025-03-30 08:01:27 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=1 bl=148 pwr=0
2025-03-30 08:01:27 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=2 bl=148 pwr=0
2025-03-30 08:01:27 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=3 bl=148 pwr=0
2025-03-30 08:01:27 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=4 bl=148 pwr=0
2025-03-30 08:01:27 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=5 bl=148 pwr=0
2025-03-30 08:01:27 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=6 bl=148 pwr=0
2025-03-30 08:01:27 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=7 bl=148 pwr=0
2025-03-30 08:01:27 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 08:01:27 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 08:01:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:01:27 [DEBUG] fake_trx.py:317 (BTS@172.18.26.20:5700) Recv FAKE_CI cmd
2025-03-30 08:01:27 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 08:01:27 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 08:01:27 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 08:01:27 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 08:01:27 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 08:01:27 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 08:01:27 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 08:01:27 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 08:01:28 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-03-30 08:01:28 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 08:01:28 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 08:01:28 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 08:01:28 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 08:01:28 [DEBUG] clck_gen.py:128 IND CLOCK 306
2025-03-30 08:01:29 [DEBUG] clck_gen.py:128 IND CLOCK 408
2025-03-30 08:01:29 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 08:01:29 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 08:01:29 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 08:01:29 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 08:01:29 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=438): ver=1 fn=436 tn=0 bl=148 pwr=0
2025-03-30 08:01:29 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=438): ver=1 fn=436 tn=1 bl=148 pwr=0
2025-03-30 08:01:29 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=438): ver=1 fn=436 tn=2 bl=148 pwr=0
2025-03-30 08:01:29 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=438): ver=1 fn=436 tn=3 bl=148 pwr=0
2025-03-30 08:01:29 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=438): ver=1 fn=436 tn=4 bl=148 pwr=0
2025-03-30 08:01:29 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=438): ver=1 fn=436 tn=5 bl=148 pwr=0
2025-03-30 08:01:29 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=438): ver=1 fn=436 tn=6 bl=148 pwr=0
2025-03-30 08:01:29 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=438): ver=1 fn=436 tn=7 bl=148 pwr=0
2025-03-30 08:01:29 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=438): ver=1 fn=437 tn=0 bl=148 pwr=0
2025-03-30 08:01:29 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=438): ver=1 fn=437 tn=1 bl=148 pwr=0
2025-03-30 08:01:29 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=438): ver=1 fn=437 tn=2 bl=148 pwr=0
2025-03-30 08:01:29 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=438): ver=1 fn=437 tn=3 bl=148 pwr=0
2025-03-30 08:01:29 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=438): ver=1 fn=437 tn=4 bl=148 pwr=0
2025-03-30 08:01:29 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=438): ver=1 fn=437 tn=5 bl=148 pwr=0
2025-03-30 08:01:29 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=438): ver=1 fn=437 tn=6 bl=148 pwr=0
2025-03-30 08:01:29 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=438): ver=1 fn=437 tn=7 bl=148 pwr=0
2025-03-30 08:01:29 [DEBUG] clck_gen.py:128 IND CLOCK 510
2025-03-30 08:01:29 [DEBUG] clck_gen.py:128 IND CLOCK 612
2025-03-30 08:01:30 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 08:01:30 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 08:01:30 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 08:01:30 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 08:01:30 [DEBUG] clck_gen.py:128 IND CLOCK 714
2025-03-30 08:01:30 [DEBUG] clck_gen.py:128 IND CLOCK 816
2025-03-30 08:01:31 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 08:01:31 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 08:01:31 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 08:01:31 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 08:01:31 [DEBUG] clck_gen.py:128 IND CLOCK 918
2025-03-30 08:01:31 [DEBUG] clck_gen.py:128 IND CLOCK 1020
2025-03-30 08:01:32 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 08:01:32 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 08:01:32 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 08:01:32 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 08:01:32 [DEBUG] clck_gen.py:128 IND CLOCK 1122
2025-03-30 08:01:32 [DEBUG] clck_gen.py:128 IND CLOCK 1224
2025-03-30 08:01:33 [DEBUG] clck_gen.py:128 IND CLOCK 1326
2025-03-30 08:01:33 [DEBUG] clck_gen.py:128 IND CLOCK 1428
2025-03-30 08:01:34 [DEBUG] clck_gen.py:128 IND CLOCK 1530
2025-03-30 08:01:34 [DEBUG] clck_gen.py:128 IND CLOCK 1632
2025-03-30 08:01:35 [DEBUG] clck_gen.py:128 IND CLOCK 1734
2025-03-30 08:01:35 [DEBUG] clck_gen.py:128 IND CLOCK 1836
2025-03-30 08:01:36 [DEBUG] clck_gen.py:128 IND CLOCK 1938
2025-03-30 08:01:36 [DEBUG] clck_gen.py:128 IND CLOCK 2040
2025-03-30 08:01:37 [DEBUG] clck_gen.py:128 IND CLOCK 2142
2025-03-30 08:01:37 [DEBUG] clck_gen.py:128 IND CLOCK 2244
2025-03-30 08:01:37 [DEBUG] clck_gen.py:128 IND CLOCK 2346
2025-03-30 08:01:38 [DEBUG] clck_gen.py:128 IND CLOCK 2448
2025-03-30 08:01:38 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 08:01:38 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 08:01:38 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 08:01:38 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 08:01:38 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 08:01:38 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 08:01:38 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 08:01:38 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 08:01:38 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 08:01:38 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 08:01:38 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 08:01:38 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 08:01:38 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 08:01:43 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 08:01:43 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 08:01:43 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 08:01:43 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 08:01:43 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 08:01:43 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 08:01:43 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 08:01:43 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 08:01:43 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 08:01:43 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 08:01:43 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 08:01:43 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 08:01:43 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 08:01:43 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 08:01:43 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 08:01:43 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 08:01:43 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 08:01:43 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 08:01:43 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 08:01:43 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 08:01:43 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 08:01:43 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 08:01:43 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 08:01:43 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 08:01:43 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 08:01:43 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 08:01:43 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 08:01:43 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 08:01:43 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 08:01:43 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 08:01:43 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 08:01:43 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 08:01:43 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 08:01:43 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 08:01:43 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 08:01:43 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 08:01:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 08:01:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 08:01:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 08:01:43 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 08:01:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 08:01:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 08:01:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 08:01:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 08:01:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 08:01:43 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 08:01:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 08:01:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 08:01:43 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 08:01:43 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 08:01:43 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 08:01:43 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 08:01:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 08:01:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 08:01:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 08:01:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 08:01:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 08:01:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 08:01:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 08:01:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 08:01:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 08:01:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 08:01:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 08:01:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 08:01:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 08:01:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 08:01:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 08:01:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 08:01:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 08:01:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 08:01:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 08:01:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 08:01:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 08:01:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 08:01:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 08:01:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 08:01:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 08:01:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 08:01:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 08:01:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 08:01:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 08:01:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 08:01:43 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-03-30 08:01:44 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-03-30 08:01:44 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-03-30 08:01:44 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-03-30 08:01:44 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-03-30 08:01:44 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-03-30 08:01:44 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-03-30 08:01:44 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-03-30 08:01:44 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-03-30 08:01:44 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-03-30 08:01:44 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=0 bl=148 pwr=0
2025-03-30 08:01:44 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=1 bl=148 pwr=0
2025-03-30 08:01:44 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=2 bl=148 pwr=0
2025-03-30 08:01:44 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=3 bl=148 pwr=0
2025-03-30 08:01:44 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=4 bl=148 pwr=0
2025-03-30 08:01:44 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=5 bl=148 pwr=0
2025-03-30 08:01:44 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=6 bl=148 pwr=0
2025-03-30 08:01:44 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=7 bl=148 pwr=0
2025-03-30 08:01:44 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 08:01:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:01:44 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 08:01:44 [DEBUG] fake_trx.py:317 (BTS@172.18.26.20:5700) Recv FAKE_CI cmd
2025-03-30 08:01:44 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 08:01:44 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 08:01:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 08:01:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 08:01:44 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 08:01:44 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 08:01:44 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 08:01:44 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 08:01:44 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-03-30 08:01:44 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 08:01:44 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 08:01:44 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 08:01:44 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 08:01:45 [DEBUG] clck_gen.py:128 IND CLOCK 306
2025-03-30 08:01:45 [DEBUG] clck_gen.py:128 IND CLOCK 408
2025-03-30 08:01:45 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 08:01:45 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 08:01:45 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 08:01:45 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 08:01:46 [DEBUG] clck_gen.py:128 IND CLOCK 510
2025-03-30 08:01:46 [DEBUG] clck_gen.py:128 IND CLOCK 612
2025-03-30 08:01:46 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 08:01:46 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 08:01:46 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 08:01:46 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 08:01:47 [DEBUG] clck_gen.py:128 IND CLOCK 714
2025-03-30 08:01:47 [DEBUG] clck_gen.py:128 IND CLOCK 816
2025-03-30 08:01:47 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 08:01:47 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 08:01:47 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 08:01:47 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 08:01:48 [DEBUG] clck_gen.py:128 IND CLOCK 918
2025-03-30 08:01:48 [DEBUG] clck_gen.py:128 IND CLOCK 1020
2025-03-30 08:01:48 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 08:01:48 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 08:01:48 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 08:01:48 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 08:01:48 [DEBUG] clck_gen.py:128 IND CLOCK 1122
2025-03-30 08:01:49 [DEBUG] clck_gen.py:128 IND CLOCK 1224
2025-03-30 08:01:49 [DEBUG] clck_gen.py:128 IND CLOCK 1326
2025-03-30 08:01:50 [DEBUG] clck_gen.py:128 IND CLOCK 1428
2025-03-30 08:01:50 [DEBUG] clck_gen.py:128 IND CLOCK 1530
2025-03-30 08:01:51 [DEBUG] clck_gen.py:128 IND CLOCK 1632
2025-03-30 08:01:51 [DEBUG] clck_gen.py:128 IND CLOCK 1734
2025-03-30 08:01:52 [DEBUG] clck_gen.py:128 IND CLOCK 1836
2025-03-30 08:01:52 [DEBUG] clck_gen.py:128 IND CLOCK 1938
2025-03-30 08:01:53 [DEBUG] clck_gen.py:128 IND CLOCK 2040
2025-03-30 08:01:53 [DEBUG] clck_gen.py:128 IND CLOCK 2142
2025-03-30 08:01:54 [DEBUG] clck_gen.py:128 IND CLOCK 2244
2025-03-30 08:01:54 [DEBUG] clck_gen.py:128 IND CLOCK 2346
2025-03-30 08:01:55 [DEBUG] clck_gen.py:128 IND CLOCK 2448
2025-03-30 08:01:55 [DEBUG] clck_gen.py:128 IND CLOCK 2550
2025-03-30 08:01:56 [DEBUG] clck_gen.py:128 IND CLOCK 2652
2025-03-30 08:01:56 [DEBUG] clck_gen.py:128 IND CLOCK 2754
2025-03-30 08:01:56 [DEBUG] clck_gen.py:128 IND CLOCK 2856
2025-03-30 08:01:57 [DEBUG] clck_gen.py:128 IND CLOCK 2958
2025-03-30 08:01:57 [DEBUG] clck_gen.py:128 IND CLOCK 3060
2025-03-30 08:01:58 [DEBUG] clck_gen.py:128 IND CLOCK 3162
2025-03-30 08:01:58 [DEBUG] clck_gen.py:128 IND CLOCK 3264
2025-03-30 08:01:59 [DEBUG] clck_gen.py:128 IND CLOCK 3366
2025-03-30 08:01:59 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 08:01:59 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 08:01:59 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 08:01:59 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 08:01:59 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 08:01:59 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 08:01:59 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 08:01:59 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 08:01:59 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 08:01:59 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 08:01:59 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 08:01:59 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 08:01:59 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 08:02:04 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 08:02:04 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 08:02:04 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 08:02:04 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 08:02:04 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 08:02:04 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 08:02:04 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 08:02:04 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 08:02:04 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 08:02:04 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 08:02:04 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 08:02:04 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 08:02:04 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 08:02:04 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 08:02:04 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 08:02:04 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 08:02:04 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 08:02:04 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 08:02:04 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 08:02:04 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 08:02:04 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 08:02:04 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 08:02:04 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 08:02:04 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 08:02:04 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 08:02:04 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 08:02:04 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 08:02:04 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 08:02:04 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 08:02:04 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 08:02:04 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 08:02:04 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 08:02:04 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 08:02:04 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 08:02:04 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 08:02:04 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 08:02:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 08:02:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 08:02:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 08:02:04 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 08:02:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 08:02:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 08:02:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 08:02:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 08:02:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 08:02:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 08:02:04 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 08:02:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 08:02:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 08:02:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 08:02:04 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 08:02:04 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 08:02:04 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 08:02:04 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 08:02:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 08:02:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 08:02:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 08:02:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 08:02:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 08:02:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 08:02:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 08:02:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 08:02:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 08:02:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 08:02:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 08:02:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 08:02:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 08:02:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 08:02:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 08:02:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 08:02:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 08:02:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 08:02:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 08:02:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 08:02:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 08:02:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 08:02:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 08:02:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 08:02:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 08:02:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 08:02:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 08:02:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 08:02:04 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-03-30 08:02:04 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-03-30 08:02:04 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-03-30 08:02:04 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-03-30 08:02:04 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-03-30 08:02:04 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-03-30 08:02:04 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-03-30 08:02:04 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-03-30 08:02:04 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-03-30 08:02:04 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-03-30 08:02:04 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=0 bl=148 pwr=0
2025-03-30 08:02:04 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=1 bl=148 pwr=0
2025-03-30 08:02:04 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=2 bl=148 pwr=0
2025-03-30 08:02:04 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=3 bl=148 pwr=0
2025-03-30 08:02:04 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=4 bl=148 pwr=0
2025-03-30 08:02:04 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=5 bl=148 pwr=0
2025-03-30 08:02:04 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=6 bl=148 pwr=0
2025-03-30 08:02:04 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=7 bl=148 pwr=0
2025-03-30 08:02:04 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 08:02:04 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 08:02:04 [DEBUG] fake_trx.py:317 (BTS@172.18.26.20:5700) Recv FAKE_CI cmd
2025-03-30 08:02:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:02:04 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 08:02:04 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 08:02:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 08:02:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 08:02:04 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 08:02:04 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 08:02:04 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 08:02:04 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 08:02:04 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 08:02:04 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 08:02:04 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 08:02:04 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 08:02:04 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 08:02:04 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 08:02:04 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 08:02:04 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 08:02:04 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 08:02:04 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 08:02:04 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 08:02:04 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 08:02:04 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 08:02:04 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=130 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 08:02:04 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=130 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 08:02:04 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=130 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 08:02:04 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=130 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 08:02:04 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=130 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 08:02:04 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=130 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 08:02:04 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=130 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 08:02:04 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=130 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 08:02:09 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 08:02:09 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 08:02:10 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 08:02:10 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 08:02:10 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 08:02:10 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 08:02:10 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 08:02:10 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 08:02:10 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 08:02:10 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 08:02:10 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 08:02:10 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 08:02:10 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 08:02:10 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 08:02:10 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 08:02:10 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 08:02:10 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 08:02:10 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 08:02:10 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 08:02:10 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 08:02:10 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 08:02:10 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 08:02:10 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 08:02:10 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 08:02:10 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 08:02:10 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 08:02:10 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 08:02:10 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 08:02:10 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 08:02:10 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 08:02:10 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 08:02:10 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 08:02:10 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 08:02:10 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 08:02:10 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 08:02:10 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 08:02:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 08:02:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 08:02:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 08:02:10 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 08:02:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 08:02:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 08:02:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 08:02:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 08:02:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 08:02:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 08:02:10 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 08:02:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 08:02:10 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 08:02:10 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 08:02:10 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 08:02:10 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 08:02:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 08:02:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 08:02:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 08:02:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 08:02:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 08:02:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 08:02:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 08:02:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 08:02:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 08:02:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 08:02:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 08:02:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 08:02:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 08:02:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 08:02:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 08:02:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 08:02:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 08:02:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 08:02:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 08:02:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 08:02:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 08:02:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 08:02:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 08:02:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 08:02:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 08:02:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 08:02:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 08:02:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 08:02:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 08:02:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 08:02:10 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-03-30 08:02:10 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-03-30 08:02:10 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-03-30 08:02:10 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-03-30 08:02:10 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-03-30 08:02:10 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-03-30 08:02:10 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-03-30 08:02:10 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-03-30 08:02:10 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-03-30 08:02:10 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-03-30 08:02:10 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=0 bl=148 pwr=0
2025-03-30 08:02:10 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=1 bl=148 pwr=0
2025-03-30 08:02:10 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=2 bl=148 pwr=0
2025-03-30 08:02:10 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=3 bl=148 pwr=0
2025-03-30 08:02:10 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=4 bl=148 pwr=0
2025-03-30 08:02:10 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=5 bl=148 pwr=0
2025-03-30 08:02:10 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=6 bl=148 pwr=0
2025-03-30 08:02:10 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=7 bl=148 pwr=0
2025-03-30 08:02:10 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 08:02:10 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 08:02:10 [DEBUG] fake_trx.py:317 (BTS@172.18.26.20:5700) Recv FAKE_CI cmd
2025-03-30 08:02:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:02:10 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 08:02:10 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 08:02:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 08:02:10 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 08:02:10 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 08:02:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 08:02:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:02:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 08:02:10 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 08:02:10 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 08:02:10 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 08:02:10 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 08:02:10 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 08:02:10 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 08:02:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 08:02:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 08:02:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 08:02:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:02:10 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 08:02:10 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 08:02:10 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 08:02:10 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 08:02:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 08:02:10 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 08:02:10 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 08:02:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 08:02:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:02:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 08:02:10 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 08:02:10 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 08:02:10 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 08:02:10 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 08:02:10 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.26.22:6700) Recv SETFH cmd
2025-03-30 08:02:10 [INFO] transceiver.py:237 (MS@172.18.26.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2025-03-30 08:02:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 08:02:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 08:02:10 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-03-30 08:02:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 08:02:11 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 08:02:11 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 08:02:11 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 08:02:11 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 08:02:11 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=220): ver=1 fn=219 tn=0 bl=148 pwr=0
2025-03-30 08:02:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:02:11 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=220): ver=1 fn=219 tn=1 bl=148 pwr=0
2025-03-30 08:02:11 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=220): ver=1 fn=219 tn=2 bl=148 pwr=0
2025-03-30 08:02:11 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=220): ver=1 fn=219 tn=3 bl=148 pwr=0
2025-03-30 08:02:11 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=220): ver=1 fn=219 tn=4 bl=148 pwr=0
2025-03-30 08:02:11 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=220): ver=1 fn=219 tn=5 bl=148 pwr=0
2025-03-30 08:02:11 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=220): ver=1 fn=219 tn=6 bl=148 pwr=0
2025-03-30 08:02:11 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=220): ver=1 fn=219 tn=7 bl=148 pwr=0
2025-03-30 08:02:11 [WARNING] transceiver.py:330 (MS@172.18.26.22:6700) Stale TRXD message (fn=220): fn=219 tn=5 pwr=0
2025-03-30 08:02:11 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 08:02:11 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 08:02:11 [INFO] transceiver.py:241 (MS@172.18.26.22:6700) Frequency hopping disabled
2025-03-30 08:02:11 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 08:02:11 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 08:02:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 08:02:11 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 08:02:11 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 08:02:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 08:02:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:02:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 08:02:11 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 08:02:11 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 08:02:11 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 08:02:11 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 08:02:11 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 08:02:11 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 08:02:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 08:02:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 08:02:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 08:02:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:02:11 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 08:02:11 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 08:02:11 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 08:02:11 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 08:02:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 08:02:11 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 08:02:11 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 08:02:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 08:02:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:02:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 08:02:11 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 08:02:11 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 08:02:11 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 08:02:11 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 08:02:11 [DEBUG] clck_gen.py:128 IND CLOCK 306
2025-03-30 08:02:11 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.26.22:6700) Recv SETFH cmd
2025-03-30 08:02:11 [INFO] transceiver.py:237 (MS@172.18.26.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2025-03-30 08:02:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 08:02:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 08:02:11 [DEBUG] clck_gen.py:128 IND CLOCK 408
2025-03-30 08:02:12 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 08:02:12 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 08:02:12 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 08:02:12 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 08:02:12 [DEBUG] clck_gen.py:128 IND CLOCK 510
2025-03-30 08:02:12 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 08:02:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:02:12 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 08:02:12 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 08:02:12 [INFO] transceiver.py:241 (MS@172.18.26.22:6700) Frequency hopping disabled
2025-03-30 08:02:12 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 08:02:12 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 08:02:12 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 08:02:12 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 08:02:12 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 08:02:12 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 08:02:12 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 08:02:12 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 08:02:12 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 08:02:12 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 08:02:12 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 08:02:17 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 08:02:17 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 08:02:17 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 08:02:17 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 08:02:17 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 08:02:17 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 08:02:17 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 08:02:17 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 08:02:17 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 08:02:17 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 08:02:17 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 08:02:17 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 08:02:17 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 08:02:17 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 08:02:17 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 08:02:17 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 08:02:17 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 08:02:17 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 08:02:17 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 08:02:17 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 08:02:17 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 08:02:17 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 08:02:17 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 08:02:17 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 08:02:17 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 08:02:17 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 08:02:17 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 08:02:17 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 08:02:17 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 08:02:17 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 08:02:17 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 08:02:17 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 08:02:17 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 08:02:17 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 08:02:17 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 08:02:17 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 08:02:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 08:02:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 08:02:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 08:02:17 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 08:02:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 08:02:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 08:02:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 08:02:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 08:02:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 08:02:17 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 08:02:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 08:02:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 08:02:17 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 08:02:17 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 08:02:17 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 08:02:17 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 08:02:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 08:02:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 08:02:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 08:02:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 08:02:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 08:02:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 08:02:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 08:02:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 08:02:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 08:02:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 08:02:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 08:02:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 08:02:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 08:02:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 08:02:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 08:02:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 08:02:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 08:02:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 08:02:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 08:02:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 08:02:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 08:02:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 08:02:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 08:02:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 08:02:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 08:02:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 08:02:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 08:02:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 08:02:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 08:02:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 08:02:17 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-03-30 08:02:18 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-03-30 08:02:18 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-03-30 08:02:18 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-03-30 08:02:18 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-03-30 08:02:18 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-03-30 08:02:18 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-03-30 08:02:18 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-03-30 08:02:18 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-03-30 08:02:18 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-03-30 08:02:18 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=0 bl=148 pwr=0
2025-03-30 08:02:18 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=1 bl=148 pwr=0
2025-03-30 08:02:18 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=2 bl=148 pwr=0
2025-03-30 08:02:18 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=3 bl=148 pwr=0
2025-03-30 08:02:18 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=4 bl=148 pwr=0
2025-03-30 08:02:18 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=5 bl=148 pwr=0
2025-03-30 08:02:18 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=6 bl=148 pwr=0
2025-03-30 08:02:18 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=7 bl=148 pwr=0
2025-03-30 08:02:18 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 08:02:18 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 08:02:18 [DEBUG] fake_trx.py:317 (BTS@172.18.26.20:5700) Recv FAKE_CI cmd
2025-03-30 08:02:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:02:18 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 08:02:18 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 08:02:18 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 08:02:18 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 08:02:18 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 08:02:18 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 08:02:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:02:18 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 08:02:18 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 08:02:18 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 08:02:18 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 08:02:18 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 08:02:18 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 08:02:18 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 08:02:18 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 08:02:18 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 08:02:18 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-03-30 08:02:18 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 08:02:18 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 08:02:18 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 08:02:18 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 08:02:18 [DEBUG] clck_gen.py:128 IND CLOCK 306
2025-03-30 08:02:19 [DEBUG] clck_gen.py:128 IND CLOCK 408
2025-03-30 08:02:19 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 08:02:19 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 08:02:19 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 08:02:19 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 08:02:19 [DEBUG] clck_gen.py:128 IND CLOCK 510
2025-03-30 08:02:20 [DEBUG] clck_gen.py:128 IND CLOCK 612
2025-03-30 08:02:20 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 08:02:20 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 08:02:20 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 08:02:20 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 08:02:20 [DEBUG] clck_gen.py:128 IND CLOCK 714
2025-03-30 08:02:21 [DEBUG] clck_gen.py:128 IND CLOCK 816
2025-03-30 08:02:21 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 08:02:21 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 08:02:21 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 08:02:21 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 08:02:21 [DEBUG] clck_gen.py:128 IND CLOCK 918
2025-03-30 08:02:22 [DEBUG] clck_gen.py:128 IND CLOCK 1020
2025-03-30 08:02:22 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 08:02:22 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 08:02:22 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 08:02:22 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 08:02:22 [DEBUG] clck_gen.py:128 IND CLOCK 1122
2025-03-30 08:02:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 08:02:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:02:23 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 08:02:23 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 08:02:23 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 08:02:23 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 08:02:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 08:02:23 [DEBUG] clck_gen.py:128 IND CLOCK 1224
2025-03-30 08:02:23 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 08:02:23 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 08:02:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 08:02:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:02:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 08:02:23 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 08:02:23 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 08:02:23 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 08:02:23 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 08:02:23 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.26.22:6700) Recv SETFH cmd
2025-03-30 08:02:23 [INFO] transceiver.py:237 (MS@172.18.26.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2025-03-30 08:02:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 08:02:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 08:02:23 [DEBUG] clck_gen.py:128 IND CLOCK 1326
2025-03-30 08:02:24 [DEBUG] clck_gen.py:128 IND CLOCK 1428
2025-03-30 08:02:24 [DEBUG] clck_gen.py:128 IND CLOCK 1530
2025-03-30 08:02:25 [DEBUG] clck_gen.py:128 IND CLOCK 1632
2025-03-30 08:02:25 [DEBUG] clck_gen.py:128 IND CLOCK 1734
2025-03-30 08:02:26 [DEBUG] clck_gen.py:128 IND CLOCK 1836
2025-03-30 08:02:26 [DEBUG] clck_gen.py:128 IND CLOCK 1938
2025-03-30 08:02:26 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=2031): ver=1 fn=2029 tn=0 bl=148 pwr=0
2025-03-30 08:02:26 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=2031): ver=1 fn=2029 tn=1 bl=148 pwr=0
2025-03-30 08:02:26 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=2031): ver=1 fn=2029 tn=2 bl=148 pwr=0
2025-03-30 08:02:26 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=2031): ver=1 fn=2029 tn=3 bl=148 pwr=0
2025-03-30 08:02:26 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=2031): ver=1 fn=2029 tn=4 bl=148 pwr=0
2025-03-30 08:02:26 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=2031): ver=1 fn=2029 tn=5 bl=148 pwr=0
2025-03-30 08:02:26 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=2031): ver=1 fn=2029 tn=6 bl=148 pwr=0
2025-03-30 08:02:26 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=2031): ver=1 fn=2029 tn=7 bl=148 pwr=0
2025-03-30 08:02:26 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=2031): ver=1 fn=2030 tn=0 bl=148 pwr=0
2025-03-30 08:02:26 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=2031): ver=1 fn=2030 tn=1 bl=148 pwr=0
2025-03-30 08:02:26 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=2031): ver=1 fn=2030 tn=2 bl=148 pwr=0
2025-03-30 08:02:26 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=2031): ver=1 fn=2030 tn=3 bl=148 pwr=0
2025-03-30 08:02:26 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=2031): ver=1 fn=2030 tn=4 bl=148 pwr=0
2025-03-30 08:02:26 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=2031): ver=1 fn=2030 tn=5 bl=148 pwr=0
2025-03-30 08:02:26 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=2031): ver=1 fn=2030 tn=6 bl=148 pwr=0
2025-03-30 08:02:26 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=2031): ver=1 fn=2030 tn=7 bl=148 pwr=0
2025-03-30 08:02:26 [WARNING] transceiver.py:330 (TRX2@172.18.26.20:5700/2) Stale TRXD message (fn=2031): ver=1 fn=2029 tn=5 bl=148 pwr=0
2025-03-30 08:02:26 [DEBUG] clck_gen.py:128 IND CLOCK 2040
2025-03-30 08:02:27 [DEBUG] clck_gen.py:128 IND CLOCK 2142
2025-03-30 08:02:27 [DEBUG] clck_gen.py:128 IND CLOCK 2244
2025-03-30 08:02:28 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 08:02:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:02:28 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 08:02:28 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 08:02:28 [INFO] transceiver.py:241 (MS@172.18.26.22:6700) Frequency hopping disabled
2025-03-30 08:02:28 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 08:02:28 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 08:02:28 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 08:02:28 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 08:02:28 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 08:02:28 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 08:02:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:02:28 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 08:02:28 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 08:02:28 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 08:02:28 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 08:02:28 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 08:02:28 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 08:02:28 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 08:02:28 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 08:02:28 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 08:02:28 [DEBUG] clck_gen.py:128 IND CLOCK 2346
2025-03-30 08:02:28 [DEBUG] clck_gen.py:128 IND CLOCK 2448
2025-03-30 08:02:29 [DEBUG] clck_gen.py:128 IND CLOCK 2550
2025-03-30 08:02:29 [DEBUG] clck_gen.py:128 IND CLOCK 2652
2025-03-30 08:02:30 [DEBUG] clck_gen.py:128 IND CLOCK 2754
2025-03-30 08:02:30 [DEBUG] clck_gen.py:128 IND CLOCK 2856
2025-03-30 08:02:31 [DEBUG] clck_gen.py:128 IND CLOCK 2958
2025-03-30 08:02:31 [DEBUG] clck_gen.py:128 IND CLOCK 3060
2025-03-30 08:02:31 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=3125): ver=1 fn=3122 tn=0 bl=148 pwr=0
2025-03-30 08:02:31 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=3125): ver=1 fn=3122 tn=1 bl=148 pwr=0
2025-03-30 08:02:31 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=3125): ver=1 fn=3122 tn=2 bl=148 pwr=0
2025-03-30 08:02:31 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=3125): ver=1 fn=3122 tn=3 bl=148 pwr=0
2025-03-30 08:02:31 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=3125): ver=1 fn=3122 tn=4 bl=148 pwr=0
2025-03-30 08:02:31 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=3125): ver=1 fn=3122 tn=5 bl=148 pwr=0
2025-03-30 08:02:31 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=3125): ver=1 fn=3122 tn=6 bl=148 pwr=0
2025-03-30 08:02:31 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=3125): ver=1 fn=3122 tn=7 bl=148 pwr=0
2025-03-30 08:02:31 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=3125): ver=1 fn=3123 tn=0 bl=148 pwr=0
2025-03-30 08:02:31 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=3125): ver=1 fn=3123 tn=1 bl=148 pwr=0
2025-03-30 08:02:31 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=3125): ver=1 fn=3123 tn=2 bl=148 pwr=0
2025-03-30 08:02:31 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=3125): ver=1 fn=3123 tn=3 bl=148 pwr=0
2025-03-30 08:02:31 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=3125): ver=1 fn=3123 tn=4 bl=148 pwr=0
2025-03-30 08:02:31 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=3125): ver=1 fn=3123 tn=5 bl=148 pwr=0
2025-03-30 08:02:31 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=3125): ver=1 fn=3123 tn=6 bl=148 pwr=0
2025-03-30 08:02:31 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=3125): ver=1 fn=3123 tn=7 bl=148 pwr=0
2025-03-30 08:02:31 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=3125): ver=1 fn=3124 tn=0 bl=148 pwr=0
2025-03-30 08:02:31 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=3125): ver=1 fn=3124 tn=1 bl=148 pwr=0
2025-03-30 08:02:31 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=3125): ver=1 fn=3124 tn=2 bl=148 pwr=0
2025-03-30 08:02:31 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=3125): ver=1 fn=3124 tn=3 bl=148 pwr=0
2025-03-30 08:02:31 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=3125): ver=1 fn=3124 tn=4 bl=148 pwr=0
2025-03-30 08:02:31 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=3125): ver=1 fn=3124 tn=5 bl=148 pwr=0
2025-03-30 08:02:31 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=3125): ver=1 fn=3124 tn=6 bl=148 pwr=0
2025-03-30 08:02:31 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=3125): ver=1 fn=3124 tn=7 bl=148 pwr=0
2025-03-30 08:02:31 [WARNING] transceiver.py:330 (TRX1@172.18.26.20:5700/1) Stale TRXD message (fn=3125): ver=1 fn=3122 tn=2 bl=148 pwr=0
2025-03-30 08:02:32 [DEBUG] clck_gen.py:128 IND CLOCK 3162
2025-03-30 08:02:32 [DEBUG] clck_gen.py:128 IND CLOCK 3264
2025-03-30 08:02:33 [DEBUG] clck_gen.py:128 IND CLOCK 3366
2025-03-30 08:02:33 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 08:02:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:02:33 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 08:02:33 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 08:02:33 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 08:02:33 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 08:02:33 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 08:02:33 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 08:02:33 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 08:02:33 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 08:02:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:02:33 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 08:02:33 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 08:02:33 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 08:02:33 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 08:02:33 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 08:02:33 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.26.22:6700) Recv SETFH cmd
2025-03-30 08:02:33 [INFO] transceiver.py:237 (MS@172.18.26.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2025-03-30 08:02:33 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 08:02:33 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 08:02:33 [DEBUG] clck_gen.py:128 IND CLOCK 3468
2025-03-30 08:02:34 [DEBUG] clck_gen.py:128 IND CLOCK 3570
2025-03-30 08:02:34 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=3617): ver=1 fn=3616 tn=4 bl=148 pwr=0
2025-03-30 08:02:34 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=3617): ver=1 fn=3616 tn=5 bl=148 pwr=0
2025-03-30 08:02:34 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=3617): ver=1 fn=3616 tn=6 bl=148 pwr=0
2025-03-30 08:02:34 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=3617): ver=1 fn=3616 tn=7 bl=148 pwr=0
2025-03-30 08:02:34 [DEBUG] clck_gen.py:128 IND CLOCK 3672
2025-03-30 08:02:34 [DEBUG] clck_gen.py:128 IND CLOCK 3774
2025-03-30 08:02:35 [DEBUG] clck_gen.py:128 IND CLOCK 3876
2025-03-30 08:02:35 [DEBUG] clck_gen.py:128 IND CLOCK 3978
2025-03-30 08:02:36 [DEBUG] clck_gen.py:128 IND CLOCK 4080
2025-03-30 08:02:36 [DEBUG] clck_gen.py:128 IND CLOCK 4182
2025-03-30 08:02:37 [DEBUG] clck_gen.py:128 IND CLOCK 4284
2025-03-30 08:02:37 [DEBUG] clck_gen.py:128 IND CLOCK 4386
2025-03-30 08:02:38 [DEBUG] clck_gen.py:128 IND CLOCK 4488
2025-03-30 08:02:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 08:02:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:02:38 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 08:02:38 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 08:02:38 [INFO] transceiver.py:241 (MS@172.18.26.22:6700) Frequency hopping disabled
2025-03-30 08:02:38 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 08:02:38 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 08:02:38 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 08:02:38 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 08:02:38 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 08:02:38 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 08:02:38 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 08:02:38 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 08:02:38 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 08:02:38 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 08:02:38 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 08:02:43 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 08:02:43 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 08:02:43 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 08:02:43 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 08:02:43 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 08:02:43 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 08:02:43 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 08:02:43 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 08:02:43 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 08:02:43 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 08:02:43 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 08:02:43 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 08:02:43 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 08:02:43 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 08:02:43 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 08:02:43 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 08:02:43 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 08:02:43 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 08:02:43 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 08:02:43 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 08:02:43 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 08:02:43 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 08:02:43 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 08:02:43 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 08:02:43 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 08:02:43 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 08:02:43 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 08:02:43 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 08:02:43 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 08:02:43 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 08:02:43 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 08:02:43 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 08:02:43 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 08:02:43 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 08:02:43 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 08:02:43 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 08:02:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 08:02:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 08:02:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 08:02:43 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 08:02:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 08:02:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 08:02:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 08:02:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 08:02:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 08:02:43 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 08:02:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 08:02:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 08:02:43 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 08:02:43 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 08:02:43 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 08:02:43 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 08:02:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 08:02:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 08:02:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 08:02:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 08:02:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 08:02:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 08:02:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 08:02:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 08:02:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 08:02:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 08:02:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 08:02:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 08:02:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 08:02:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 08:02:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 08:02:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 08:02:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 08:02:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 08:02:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 08:02:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 08:02:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 08:02:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 08:02:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 08:02:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 08:02:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 08:02:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 08:02:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 08:02:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 08:02:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 08:02:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 08:02:43 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-03-30 08:02:43 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-03-30 08:02:43 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-03-30 08:02:43 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-03-30 08:02:43 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-03-30 08:02:43 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-03-30 08:02:43 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-03-30 08:02:43 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-03-30 08:02:43 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-03-30 08:02:43 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-03-30 08:02:43 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=0 bl=148 pwr=0
2025-03-30 08:02:43 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=1 bl=148 pwr=0
2025-03-30 08:02:43 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=2 bl=148 pwr=0
2025-03-30 08:02:43 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=3 bl=148 pwr=0
2025-03-30 08:02:43 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=4 bl=148 pwr=0
2025-03-30 08:02:43 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=5 bl=148 pwr=0
2025-03-30 08:02:43 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=6 bl=148 pwr=0
2025-03-30 08:02:43 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=7 bl=148 pwr=0
2025-03-30 08:02:43 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 08:02:43 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 08:02:43 [DEBUG] fake_trx.py:317 (BTS@172.18.26.20:5700) Recv FAKE_CI cmd
2025-03-30 08:02:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:02:43 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 08:02:43 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 08:02:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 08:02:43 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 08:02:43 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 08:02:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 08:02:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:02:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 08:02:43 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 08:02:43 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 08:02:43 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 08:02:43 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 08:02:44 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 08:02:44 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 08:02:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 08:02:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 08:02:44 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-03-30 08:02:44 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 08:02:44 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 08:02:44 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 08:02:44 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 08:02:44 [DEBUG] clck_gen.py:128 IND CLOCK 306
2025-03-30 08:02:45 [DEBUG] clck_gen.py:128 IND CLOCK 408
2025-03-30 08:02:45 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 08:02:45 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 08:02:45 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 08:02:45 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 08:02:45 [DEBUG] clck_gen.py:128 IND CLOCK 510
2025-03-30 08:02:46 [DEBUG] clck_gen.py:128 IND CLOCK 612
2025-03-30 08:02:46 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 08:02:46 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 08:02:46 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 08:02:46 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 08:02:46 [DEBUG] clck_gen.py:128 IND CLOCK 714
2025-03-30 08:02:47 [DEBUG] clck_gen.py:128 IND CLOCK 816
2025-03-30 08:02:47 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 08:02:47 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 08:02:47 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 08:02:47 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 08:02:47 [DEBUG] clck_gen.py:128 IND CLOCK 918
2025-03-30 08:02:48 [DEBUG] clck_gen.py:128 IND CLOCK 1020
2025-03-30 08:02:48 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 08:02:48 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 08:02:48 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 08:02:48 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 08:02:48 [DEBUG] clck_gen.py:128 IND CLOCK 1122
2025-03-30 08:02:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 08:02:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:02:49 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 08:02:49 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 08:02:49 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 08:02:49 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 08:02:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 08:02:49 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 08:02:49 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 08:02:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 08:02:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:02:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 08:02:49 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 08:02:49 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 08:02:49 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 08:02:49 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 08:02:49 [DEBUG] clck_gen.py:128 IND CLOCK 1224
2025-03-30 08:02:49 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.26.22:6700) Recv SETFH cmd
2025-03-30 08:02:49 [INFO] transceiver.py:237 (MS@172.18.26.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2025-03-30 08:02:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 08:02:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 08:02:49 [DEBUG] clck_gen.py:128 IND CLOCK 1326
2025-03-30 08:02:50 [DEBUG] clck_gen.py:128 IND CLOCK 1428
2025-03-30 08:02:50 [DEBUG] clck_gen.py:128 IND CLOCK 1530
2025-03-30 08:02:50 [DEBUG] clck_gen.py:128 IND CLOCK 1632
2025-03-30 08:02:51 [DEBUG] clck_gen.py:128 IND CLOCK 1734
2025-03-30 08:02:51 [DEBUG] clck_gen.py:128 IND CLOCK 1836
2025-03-30 08:02:52 [DEBUG] clck_gen.py:128 IND CLOCK 1938
2025-03-30 08:02:52 [DEBUG] clck_gen.py:128 IND CLOCK 2040
2025-03-30 08:02:53 [DEBUG] clck_gen.py:128 IND CLOCK 2142
2025-03-30 08:02:53 [DEBUG] clck_gen.py:128 IND CLOCK 2244
2025-03-30 08:02:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 08:02:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:02:54 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 08:02:54 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 08:02:54 [INFO] transceiver.py:241 (MS@172.18.26.22:6700) Frequency hopping disabled
2025-03-30 08:02:54 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 08:02:54 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 08:02:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 08:02:54 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 08:02:54 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 08:02:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 08:02:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:02:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 08:02:54 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 08:02:54 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 08:02:54 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 08:02:54 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 08:02:54 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 08:02:54 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 08:02:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 08:02:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 08:02:54 [DEBUG] clck_gen.py:128 IND CLOCK 2346
2025-03-30 08:02:54 [DEBUG] clck_gen.py:128 IND CLOCK 2448
2025-03-30 08:02:55 [DEBUG] clck_gen.py:128 IND CLOCK 2550
2025-03-30 08:02:55 [DEBUG] clck_gen.py:128 IND CLOCK 2652
2025-03-30 08:02:56 [DEBUG] clck_gen.py:128 IND CLOCK 2754
2025-03-30 08:02:56 [DEBUG] clck_gen.py:128 IND CLOCK 2856
2025-03-30 08:02:57 [DEBUG] clck_gen.py:128 IND CLOCK 2958
2025-03-30 08:02:57 [DEBUG] clck_gen.py:128 IND CLOCK 3060
2025-03-30 08:02:58 [DEBUG] clck_gen.py:128 IND CLOCK 3162
2025-03-30 08:02:58 [DEBUG] clck_gen.py:128 IND CLOCK 3264
2025-03-30 08:02:58 [DEBUG] clck_gen.py:128 IND CLOCK 3366
2025-03-30 08:02:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 08:02:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:02:59 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 08:02:59 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 08:02:59 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 08:02:59 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 08:02:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 08:02:59 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 08:02:59 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 08:02:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 08:02:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:02:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 08:02:59 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 08:02:59 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 08:02:59 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 08:02:59 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 08:02:59 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.26.22:6700) Recv SETFH cmd
2025-03-30 08:02:59 [INFO] transceiver.py:237 (MS@172.18.26.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2025-03-30 08:02:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 08:02:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 08:02:59 [DEBUG] clck_gen.py:128 IND CLOCK 3468
2025-03-30 08:02:59 [DEBUG] clck_gen.py:128 IND CLOCK 3570
2025-03-30 08:03:00 [DEBUG] clck_gen.py:128 IND CLOCK 3672
2025-03-30 08:03:00 [DEBUG] clck_gen.py:128 IND CLOCK 3774
2025-03-30 08:03:01 [DEBUG] clck_gen.py:128 IND CLOCK 3876
2025-03-30 08:03:01 [DEBUG] clck_gen.py:128 IND CLOCK 3978
2025-03-30 08:03:02 [DEBUG] clck_gen.py:128 IND CLOCK 4080
2025-03-30 08:03:02 [DEBUG] clck_gen.py:128 IND CLOCK 4182
2025-03-30 08:03:03 [DEBUG] clck_gen.py:128 IND CLOCK 4284
2025-03-30 08:03:03 [DEBUG] clck_gen.py:128 IND CLOCK 4386
2025-03-30 08:03:04 [DEBUG] clck_gen.py:128 IND CLOCK 4488
2025-03-30 08:03:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 08:03:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:03:04 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 08:03:04 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 08:03:04 [INFO] transceiver.py:241 (MS@172.18.26.22:6700) Frequency hopping disabled
2025-03-30 08:03:04 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 08:03:04 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 08:03:04 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 08:03:04 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 08:03:04 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 08:03:04 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 08:03:04 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 08:03:04 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 08:03:04 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 08:03:04 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 08:03:04 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 08:03:09 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 08:03:09 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 08:03:09 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 08:03:09 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 08:03:09 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 08:03:09 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 08:03:09 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 08:03:09 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 08:03:09 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 08:03:09 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 08:03:09 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 08:03:09 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 08:03:09 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 08:03:09 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 08:03:09 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 08:03:09 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 08:03:09 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 08:03:09 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 08:03:09 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 08:03:09 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 08:03:09 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 08:03:09 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 08:03:09 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 08:03:09 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 08:03:09 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 08:03:09 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 08:03:09 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 08:03:09 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 08:03:09 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 08:03:09 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 08:03:09 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 08:03:09 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 08:03:09 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 08:03:09 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 08:03:09 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 08:03:09 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 08:03:09 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 08:03:09 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 08:03:09 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 08:03:09 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 08:03:09 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 08:03:09 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 08:03:09 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 08:03:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 08:03:09 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 08:03:09 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 08:03:09 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 08:03:09 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 08:03:09 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 08:03:09 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 08:03:09 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 08:03:09 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 08:03:09 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 08:03:09 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 08:03:09 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 08:03:09 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 08:03:09 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 08:03:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 08:03:09 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 08:03:09 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 08:03:09 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 08:03:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 08:03:09 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 08:03:09 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 08:03:09 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 08:03:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 08:03:09 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 08:03:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 08:03:09 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 08:03:09 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 08:03:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 08:03:09 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 08:03:09 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 08:03:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 08:03:09 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 08:03:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 08:03:09 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 08:03:09 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 08:03:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 08:03:09 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 08:03:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 08:03:09 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 08:03:09 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-03-30 08:03:09 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-03-30 08:03:09 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-03-30 08:03:09 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-03-30 08:03:09 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-03-30 08:03:09 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-03-30 08:03:09 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-03-30 08:03:09 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-03-30 08:03:09 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-03-30 08:03:09 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-03-30 08:03:09 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=0 bl=148 pwr=0
2025-03-30 08:03:09 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=1 bl=148 pwr=0
2025-03-30 08:03:09 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=2 bl=148 pwr=0
2025-03-30 08:03:09 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=3 bl=148 pwr=0
2025-03-30 08:03:09 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=4 bl=148 pwr=0
2025-03-30 08:03:09 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=5 bl=148 pwr=0
2025-03-30 08:03:09 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=6 bl=148 pwr=0
2025-03-30 08:03:09 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=7 bl=148 pwr=0
2025-03-30 08:03:09 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 08:03:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:03:09 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 08:03:09 [DEBUG] fake_trx.py:317 (BTS@172.18.26.20:5700) Recv FAKE_CI cmd
2025-03-30 08:03:09 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 08:03:09 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 08:03:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 08:03:09 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 08:03:09 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 08:03:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 08:03:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:03:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 08:03:09 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 08:03:09 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 08:03:09 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 08:03:09 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 08:03:09 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 08:03:09 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 08:03:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 08:03:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 08:03:10 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-03-30 08:03:10 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 08:03:10 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 08:03:10 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 08:03:10 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 08:03:10 [DEBUG] clck_gen.py:128 IND CLOCK 306
2025-03-30 08:03:11 [DEBUG] clck_gen.py:128 IND CLOCK 408
2025-03-30 08:03:11 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 08:03:11 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 08:03:11 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 08:03:11 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 08:03:11 [DEBUG] clck_gen.py:128 IND CLOCK 510
2025-03-30 08:03:12 [DEBUG] clck_gen.py:128 IND CLOCK 612
2025-03-30 08:03:12 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 08:03:12 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 08:03:12 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 08:03:12 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 08:03:12 [DEBUG] clck_gen.py:128 IND CLOCK 714
2025-03-30 08:03:13 [DEBUG] clck_gen.py:128 IND CLOCK 816
2025-03-30 08:03:13 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 08:03:13 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 08:03:13 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 08:03:13 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 08:03:13 [DEBUG] clck_gen.py:128 IND CLOCK 918
2025-03-30 08:03:14 [DEBUG] clck_gen.py:128 IND CLOCK 1020
2025-03-30 08:03:14 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 08:03:14 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 08:03:14 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 08:03:14 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 08:03:14 [DEBUG] clck_gen.py:128 IND CLOCK 1122
2025-03-30 08:03:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 08:03:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:03:14 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 08:03:14 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 08:03:14 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 08:03:14 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 08:03:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 08:03:14 [DEBUG] clck_gen.py:128 IND CLOCK 1224
2025-03-30 08:03:14 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 08:03:14 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 08:03:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 08:03:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:03:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 08:03:14 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 08:03:14 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 08:03:14 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 08:03:14 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 08:03:15 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.26.22:6700) Recv SETFH cmd
2025-03-30 08:03:15 [INFO] transceiver.py:237 (MS@172.18.26.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2025-03-30 08:03:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 08:03:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 08:03:15 [DEBUG] clck_gen.py:128 IND CLOCK 1326
2025-03-30 08:03:15 [DEBUG] clck_gen.py:128 IND CLOCK 1428
2025-03-30 08:03:16 [DEBUG] clck_gen.py:128 IND CLOCK 1530
2025-03-30 08:03:16 [DEBUG] clck_gen.py:128 IND CLOCK 1632
2025-03-30 08:03:17 [DEBUG] clck_gen.py:128 IND CLOCK 1734
2025-03-30 08:03:17 [DEBUG] clck_gen.py:128 IND CLOCK 1836
2025-03-30 08:03:18 [DEBUG] clck_gen.py:128 IND CLOCK 1938
2025-03-30 08:03:18 [DEBUG] clck_gen.py:128 IND CLOCK 2040
2025-03-30 08:03:19 [DEBUG] clck_gen.py:128 IND CLOCK 2142
2025-03-30 08:03:19 [DEBUG] clck_gen.py:128 IND CLOCK 2244
2025-03-30 08:03:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 08:03:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:03:20 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 08:03:20 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 08:03:20 [INFO] transceiver.py:241 (MS@172.18.26.22:6700) Frequency hopping disabled
2025-03-30 08:03:20 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 08:03:20 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 08:03:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 08:03:20 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 08:03:20 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 08:03:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 08:03:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:03:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 08:03:20 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 08:03:20 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 08:03:20 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 08:03:20 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 08:03:20 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 08:03:20 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 08:03:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 08:03:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 08:03:20 [DEBUG] clck_gen.py:128 IND CLOCK 2346
2025-03-30 08:03:20 [DEBUG] clck_gen.py:128 IND CLOCK 2448
2025-03-30 08:03:21 [DEBUG] clck_gen.py:128 IND CLOCK 2550
2025-03-30 08:03:21 [DEBUG] clck_gen.py:128 IND CLOCK 2652
2025-03-30 08:03:22 [DEBUG] clck_gen.py:128 IND CLOCK 2754
2025-03-30 08:03:22 [DEBUG] clck_gen.py:128 IND CLOCK 2856
2025-03-30 08:03:22 [DEBUG] clck_gen.py:128 IND CLOCK 2958
2025-03-30 08:03:23 [DEBUG] clck_gen.py:128 IND CLOCK 3060
2025-03-30 08:03:23 [DEBUG] clck_gen.py:128 IND CLOCK 3162
2025-03-30 08:03:24 [DEBUG] clck_gen.py:128 IND CLOCK 3264
2025-03-30 08:03:24 [DEBUG] clck_gen.py:128 IND CLOCK 3366
2025-03-30 08:03:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 08:03:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:03:25 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 08:03:25 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 08:03:25 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 08:03:25 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 08:03:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 08:03:25 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 08:03:25 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 08:03:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 08:03:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:03:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 08:03:25 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 08:03:25 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 08:03:25 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 08:03:25 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 08:03:25 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.26.22:6700) Recv SETFH cmd
2025-03-30 08:03:25 [INFO] transceiver.py:237 (MS@172.18.26.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2025-03-30 08:03:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 08:03:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 08:03:25 [DEBUG] clck_gen.py:128 IND CLOCK 3468
2025-03-30 08:03:25 [DEBUG] clck_gen.py:128 IND CLOCK 3570
2025-03-30 08:03:26 [DEBUG] clck_gen.py:128 IND CLOCK 3672
2025-03-30 08:03:26 [DEBUG] clck_gen.py:128 IND CLOCK 3774
2025-03-30 08:03:27 [DEBUG] clck_gen.py:128 IND CLOCK 3876
2025-03-30 08:03:27 [DEBUG] clck_gen.py:128 IND CLOCK 3978
2025-03-30 08:03:28 [DEBUG] clck_gen.py:128 IND CLOCK 4080
2025-03-30 08:03:28 [DEBUG] clck_gen.py:128 IND CLOCK 4182
2025-03-30 08:03:29 [DEBUG] clck_gen.py:128 IND CLOCK 4284
2025-03-30 08:03:29 [DEBUG] clck_gen.py:128 IND CLOCK 4386
2025-03-30 08:03:30 [DEBUG] clck_gen.py:128 IND CLOCK 4488
2025-03-30 08:03:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 08:03:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:03:30 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 08:03:30 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 08:03:30 [INFO] transceiver.py:241 (MS@172.18.26.22:6700) Frequency hopping disabled
2025-03-30 08:03:30 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 08:03:30 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 08:03:30 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 08:03:30 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 08:03:30 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 08:03:30 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 08:03:30 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 08:03:30 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 08:03:30 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 08:03:30 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 08:03:30 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 08:03:30 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=4527 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 08:03:30 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=4527 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 08:03:30 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=4527 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 08:03:30 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=4527 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 08:03:30 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=4527 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 08:03:30 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=4527 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 08:03:35 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 08:03:35 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 08:03:35 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 08:03:35 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 08:03:35 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 08:03:35 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 08:03:35 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 08:03:35 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 08:03:35 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 08:03:35 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 08:03:35 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 08:03:35 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 08:03:35 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 08:03:35 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 08:03:35 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 08:03:35 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 08:03:35 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 08:03:35 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 08:03:35 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 08:03:35 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 08:03:35 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 08:03:35 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 08:03:35 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 08:03:35 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 08:03:35 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 08:03:35 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 08:03:35 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 08:03:35 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 08:03:35 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 08:03:35 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 08:03:35 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 08:03:35 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 08:03:35 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 08:03:35 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 08:03:35 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 08:03:35 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 08:03:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 08:03:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 08:03:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 08:03:35 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 08:03:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 08:03:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 08:03:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 08:03:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 08:03:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 08:03:35 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 08:03:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 08:03:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 08:03:35 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 08:03:35 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 08:03:35 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 08:03:35 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 08:03:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 08:03:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 08:03:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 08:03:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 08:03:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 08:03:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 08:03:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 08:03:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 08:03:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 08:03:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 08:03:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 08:03:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 08:03:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 08:03:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 08:03:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 08:03:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 08:03:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 08:03:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 08:03:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 08:03:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 08:03:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 08:03:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 08:03:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 08:03:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 08:03:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 08:03:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 08:03:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 08:03:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 08:03:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 08:03:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 08:03:35 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-03-30 08:03:35 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-03-30 08:03:35 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-03-30 08:03:35 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-03-30 08:03:35 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-03-30 08:03:35 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-03-30 08:03:35 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-03-30 08:03:35 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-03-30 08:03:35 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-03-30 08:03:35 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-03-30 08:03:35 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 08:03:35 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 08:03:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:03:35 [DEBUG] fake_trx.py:317 (BTS@172.18.26.20:5700) Recv FAKE_CI cmd
2025-03-30 08:03:35 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 08:03:35 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 08:03:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 08:03:35 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 08:03:35 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 08:03:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 08:03:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:03:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 08:03:35 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 08:03:35 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 08:03:35 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 08:03:35 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 08:03:35 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 08:03:35 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 08:03:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 08:03:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 08:03:36 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-03-30 08:03:36 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 08:03:36 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 08:03:36 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 08:03:36 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 08:03:36 [DEBUG] clck_gen.py:128 IND CLOCK 306
2025-03-30 08:03:37 [DEBUG] clck_gen.py:128 IND CLOCK 408
2025-03-30 08:03:37 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 08:03:37 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 08:03:37 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 08:03:37 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 08:03:37 [DEBUG] clck_gen.py:128 IND CLOCK 510
2025-03-30 08:03:38 [DEBUG] clck_gen.py:128 IND CLOCK 612
2025-03-30 08:03:38 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 08:03:38 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 08:03:38 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 08:03:38 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 08:03:38 [DEBUG] clck_gen.py:128 IND CLOCK 714
2025-03-30 08:03:38 [DEBUG] clck_gen.py:128 IND CLOCK 816
2025-03-30 08:03:39 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 08:03:39 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 08:03:39 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 08:03:39 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 08:03:39 [DEBUG] clck_gen.py:128 IND CLOCK 918
2025-03-30 08:03:39 [DEBUG] clck_gen.py:128 IND CLOCK 1020
2025-03-30 08:03:40 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 08:03:40 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 08:03:40 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 08:03:40 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 08:03:40 [DEBUG] clck_gen.py:128 IND CLOCK 1122
2025-03-30 08:03:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 08:03:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:03:40 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 08:03:40 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 08:03:40 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 08:03:40 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 08:03:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 08:03:40 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 08:03:40 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 08:03:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 08:03:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:03:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 08:03:40 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 08:03:40 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 08:03:40 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 08:03:40 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 08:03:40 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.26.22:6700) Recv SETFH cmd
2025-03-30 08:03:40 [INFO] transceiver.py:237 (MS@172.18.26.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2025-03-30 08:03:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 08:03:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 08:03:40 [DEBUG] clck_gen.py:128 IND CLOCK 1224
2025-03-30 08:03:41 [DEBUG] clck_gen.py:128 IND CLOCK 1326
2025-03-30 08:03:41 [DEBUG] clck_gen.py:128 IND CLOCK 1428
2025-03-30 08:03:42 [DEBUG] clck_gen.py:128 IND CLOCK 1530
2025-03-30 08:03:42 [DEBUG] clck_gen.py:128 IND CLOCK 1632
2025-03-30 08:03:43 [DEBUG] clck_gen.py:128 IND CLOCK 1734
2025-03-30 08:03:43 [DEBUG] clck_gen.py:128 IND CLOCK 1836
2025-03-30 08:03:44 [DEBUG] clck_gen.py:128 IND CLOCK 1938
2025-03-30 08:03:44 [DEBUG] clck_gen.py:128 IND CLOCK 2040
2025-03-30 08:03:45 [DEBUG] clck_gen.py:128 IND CLOCK 2142
2025-03-30 08:03:45 [DEBUG] clck_gen.py:128 IND CLOCK 2244
2025-03-30 08:03:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 08:03:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:03:45 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 08:03:45 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 08:03:45 [INFO] transceiver.py:241 (MS@172.18.26.22:6700) Frequency hopping disabled
2025-03-30 08:03:45 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 08:03:45 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 08:03:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 08:03:45 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 08:03:45 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 08:03:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 08:03:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:03:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 08:03:45 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 08:03:45 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 08:03:45 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 08:03:45 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 08:03:45 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 08:03:45 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 08:03:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 08:03:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 08:03:46 [DEBUG] clck_gen.py:128 IND CLOCK 2346
2025-03-30 08:03:46 [DEBUG] clck_gen.py:128 IND CLOCK 2448
2025-03-30 08:03:46 [DEBUG] clck_gen.py:128 IND CLOCK 2550
2025-03-30 08:03:47 [DEBUG] clck_gen.py:128 IND CLOCK 2652
2025-03-30 08:03:47 [DEBUG] clck_gen.py:128 IND CLOCK 2754
2025-03-30 08:03:48 [DEBUG] clck_gen.py:128 IND CLOCK 2856
2025-03-30 08:03:48 [WARNING] clck_gen.py:108 CLCKGen: time overrun by -22937us; resetting the clock
2025-03-30 08:03:48 [DEBUG] clck_gen.py:128 IND CLOCK 2958
2025-03-30 08:03:49 [DEBUG] clck_gen.py:128 IND CLOCK 3060
2025-03-30 08:03:49 [DEBUG] clck_gen.py:128 IND CLOCK 3162
2025-03-30 08:03:50 [DEBUG] clck_gen.py:128 IND CLOCK 3264
2025-03-30 08:03:50 [DEBUG] clck_gen.py:128 IND CLOCK 3366
2025-03-30 08:03:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 08:03:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:03:50 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 08:03:50 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 08:03:50 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 08:03:50 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 08:03:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 08:03:50 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 08:03:50 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 08:03:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 08:03:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:03:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 08:03:50 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 08:03:50 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 08:03:50 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 08:03:50 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 08:03:50 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.26.22:6700) Recv SETFH cmd
2025-03-30 08:03:50 [INFO] transceiver.py:237 (MS@172.18.26.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2025-03-30 08:03:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 08:03:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 08:03:51 [DEBUG] clck_gen.py:128 IND CLOCK 3468
2025-03-30 08:03:51 [DEBUG] clck_gen.py:128 IND CLOCK 3570
2025-03-30 08:03:52 [DEBUG] clck_gen.py:128 IND CLOCK 3672
2025-03-30 08:03:52 [DEBUG] clck_gen.py:128 IND CLOCK 3774
2025-03-30 08:03:53 [DEBUG] clck_gen.py:128 IND CLOCK 3876
2025-03-30 08:03:53 [DEBUG] clck_gen.py:128 IND CLOCK 3978
2025-03-30 08:03:54 [DEBUG] clck_gen.py:128 IND CLOCK 4080
2025-03-30 08:03:54 [DEBUG] clck_gen.py:128 IND CLOCK 4182
2025-03-30 08:03:54 [DEBUG] clck_gen.py:128 IND CLOCK 4284
2025-03-30 08:03:55 [DEBUG] clck_gen.py:128 IND CLOCK 4386
2025-03-30 08:03:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 08:03:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:03:55 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 08:03:55 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 08:03:55 [INFO] transceiver.py:241 (MS@172.18.26.22:6700) Frequency hopping disabled
2025-03-30 08:03:55 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 08:03:55 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 08:03:55 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 08:03:55 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 08:03:55 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 08:03:55 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 08:03:55 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 08:03:55 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 08:03:55 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 08:03:55 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 08:03:55 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 08:04:00 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 08:04:00 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 08:04:00 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 08:04:00 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 08:04:00 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 08:04:00 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 08:04:00 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 08:04:00 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 08:04:00 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 08:04:00 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 08:04:00 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 08:04:00 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 08:04:00 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 08:04:00 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 08:04:00 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 08:04:00 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 08:04:00 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 08:04:00 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 08:04:00 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 08:04:00 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 08:04:00 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 08:04:00 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 08:04:00 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 08:04:00 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 08:04:00 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 08:04:00 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 08:04:00 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 08:04:00 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 08:04:00 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 08:04:00 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 08:04:00 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 08:04:00 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 08:04:00 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 08:04:00 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 08:04:00 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 08:04:00 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 08:04:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 08:04:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 08:04:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 08:04:00 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 08:04:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 08:04:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 08:04:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 08:04:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 08:04:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 08:04:00 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 08:04:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 08:04:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 08:04:00 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 08:04:00 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 08:04:00 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 08:04:00 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 08:04:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 08:04:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 08:04:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 08:04:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 08:04:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 08:04:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 08:04:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 08:04:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 08:04:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 08:04:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 08:04:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 08:04:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 08:04:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 08:04:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 08:04:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 08:04:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 08:04:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 08:04:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 08:04:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 08:04:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 08:04:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 08:04:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 08:04:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 08:04:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 08:04:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 08:04:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 08:04:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 08:04:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 08:04:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 08:04:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 08:04:00 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-03-30 08:04:01 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-03-30 08:04:01 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-03-30 08:04:01 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-03-30 08:04:01 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-03-30 08:04:01 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-03-30 08:04:01 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-03-30 08:04:01 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-03-30 08:04:01 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-03-30 08:04:01 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-03-30 08:04:01 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=0 bl=148 pwr=0
2025-03-30 08:04:01 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=1 bl=148 pwr=0
2025-03-30 08:04:01 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=2 bl=148 pwr=0
2025-03-30 08:04:01 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=3 bl=148 pwr=0
2025-03-30 08:04:01 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=4 bl=148 pwr=0
2025-03-30 08:04:01 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=5 bl=148 pwr=0
2025-03-30 08:04:01 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=6 bl=148 pwr=0
2025-03-30 08:04:01 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=7 bl=148 pwr=0
2025-03-30 08:04:01 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 08:04:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:04:01 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 08:04:01 [DEBUG] fake_trx.py:317 (BTS@172.18.26.20:5700) Recv FAKE_CI cmd
2025-03-30 08:04:01 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 08:04:01 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 08:04:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 08:04:01 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 08:04:01 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 08:04:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 08:04:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:04:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 08:04:01 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 08:04:01 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 08:04:01 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 08:04:01 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 08:04:01 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 08:04:01 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 08:04:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 08:04:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 08:04:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 08:04:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:04:01 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 08:04:01 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 08:04:01 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 08:04:01 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 08:04:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 08:04:01 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 08:04:01 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 08:04:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 08:04:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:04:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 08:04:01 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 08:04:01 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 08:04:01 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 08:04:01 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 08:04:01 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-03-30 08:04:01 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.26.22:6700) Recv SETFH cmd
2025-03-30 08:04:01 [INFO] transceiver.py:237 (MS@172.18.26.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2025-03-30 08:04:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 08:04:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 08:04:01 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 08:04:01 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 08:04:01 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 08:04:01 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 08:04:02 [DEBUG] clck_gen.py:128 IND CLOCK 306
2025-03-30 08:04:02 [DEBUG] clck_gen.py:128 IND CLOCK 408
2025-03-30 08:04:02 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 08:04:02 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 08:04:02 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 08:04:02 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 08:04:03 [DEBUG] clck_gen.py:128 IND CLOCK 510
2025-03-30 08:04:03 [DEBUG] clck_gen.py:128 IND CLOCK 612
2025-03-30 08:04:03 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 08:04:03 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 08:04:03 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 08:04:03 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 08:04:04 [DEBUG] clck_gen.py:128 IND CLOCK 714
2025-03-30 08:04:04 [DEBUG] clck_gen.py:128 IND CLOCK 816
2025-03-30 08:04:04 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 08:04:04 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 08:04:04 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 08:04:04 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 08:04:05 [DEBUG] clck_gen.py:128 IND CLOCK 918
2025-03-30 08:04:05 [DEBUG] clck_gen.py:128 IND CLOCK 1020
2025-03-30 08:04:05 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 08:04:05 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 08:04:05 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 08:04:05 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 08:04:06 [DEBUG] clck_gen.py:128 IND CLOCK 1122
2025-03-30 08:04:06 [DEBUG] clck_gen.py:128 IND CLOCK 1224
2025-03-30 08:04:07 [DEBUG] clck_gen.py:128 IND CLOCK 1326
2025-03-30 08:04:07 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 08:04:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:04:07 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 08:04:07 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 08:04:07 [INFO] transceiver.py:241 (MS@172.18.26.22:6700) Frequency hopping disabled
2025-03-30 08:04:07 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 08:04:07 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 08:04:07 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 08:04:07 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 08:04:07 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 08:04:07 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 08:04:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:04:07 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 08:04:07 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 08:04:07 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 08:04:07 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 08:04:07 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 08:04:07 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 08:04:07 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 08:04:07 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 08:04:07 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 08:04:07 [DEBUG] clck_gen.py:128 IND CLOCK 1428
2025-03-30 08:04:07 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 08:04:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:04:07 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 08:04:07 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 08:04:07 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 08:04:07 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 08:04:07 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 08:04:07 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 08:04:07 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 08:04:07 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 08:04:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:04:07 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 08:04:07 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 08:04:07 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 08:04:07 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 08:04:07 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 08:04:08 [DEBUG] clck_gen.py:128 IND CLOCK 1530
2025-03-30 08:04:08 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.26.22:6700) Recv SETFH cmd
2025-03-30 08:04:08 [INFO] transceiver.py:237 (MS@172.18.26.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2025-03-30 08:04:08 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 08:04:08 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 08:04:08 [DEBUG] clck_gen.py:128 IND CLOCK 1632
2025-03-30 08:04:08 [DEBUG] clck_gen.py:128 IND CLOCK 1734
2025-03-30 08:04:09 [DEBUG] clck_gen.py:128 IND CLOCK 1836
2025-03-30 08:04:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 08:04:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:04:09 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 08:04:09 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 08:04:09 [INFO] transceiver.py:241 (MS@172.18.26.22:6700) Frequency hopping disabled
2025-03-30 08:04:09 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 08:04:09 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 08:04:09 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 08:04:09 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 08:04:09 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 08:04:09 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 08:04:09 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 08:04:09 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 08:04:09 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 08:04:09 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 08:04:09 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 08:04:14 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 08:04:14 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 08:04:14 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 08:04:14 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 08:04:14 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 08:04:14 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 08:04:14 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 08:04:14 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 08:04:14 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 08:04:14 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 08:04:14 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 08:04:14 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 08:04:14 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 08:04:14 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 08:04:14 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 08:04:14 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 08:04:14 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 08:04:14 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 08:04:14 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 08:04:14 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 08:04:14 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 08:04:14 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 08:04:14 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 08:04:14 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 08:04:14 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 08:04:14 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 08:04:14 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 08:04:14 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 08:04:14 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 08:04:14 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 08:04:14 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 08:04:14 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 08:04:14 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 08:04:14 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 08:04:14 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 08:04:14 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 08:04:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 08:04:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 08:04:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 08:04:14 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 08:04:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 08:04:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 08:04:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 08:04:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 08:04:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 08:04:14 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 08:04:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 08:04:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 08:04:14 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 08:04:14 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 08:04:14 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 08:04:14 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 08:04:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 08:04:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 08:04:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 08:04:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 08:04:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 08:04:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 08:04:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 08:04:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 08:04:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 08:04:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 08:04:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 08:04:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 08:04:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 08:04:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 08:04:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 08:04:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 08:04:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 08:04:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 08:04:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 08:04:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 08:04:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 08:04:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 08:04:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 08:04:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 08:04:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 08:04:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 08:04:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 08:04:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 08:04:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 08:04:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 08:04:14 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-03-30 08:04:15 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-03-30 08:04:15 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-03-30 08:04:15 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-03-30 08:04:15 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-03-30 08:04:15 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-03-30 08:04:15 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-03-30 08:04:15 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-03-30 08:04:15 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-03-30 08:04:15 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-03-30 08:04:15 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=0 bl=148 pwr=0
2025-03-30 08:04:15 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=1 bl=148 pwr=0
2025-03-30 08:04:15 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=2 bl=148 pwr=0
2025-03-30 08:04:15 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=3 bl=148 pwr=0
2025-03-30 08:04:15 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=4 bl=148 pwr=0
2025-03-30 08:04:15 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=5 bl=148 pwr=0
2025-03-30 08:04:15 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=6 bl=148 pwr=0
2025-03-30 08:04:15 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=7 bl=148 pwr=0
2025-03-30 08:04:15 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 08:04:15 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 08:04:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:04:15 [DEBUG] fake_trx.py:317 (BTS@172.18.26.20:5700) Recv FAKE_CI cmd
2025-03-30 08:04:15 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 08:04:15 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 08:04:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 08:04:15 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 08:04:15 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 08:04:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 08:04:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:04:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 08:04:15 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 08:04:15 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 08:04:15 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 08:04:15 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 08:04:15 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 08:04:15 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 08:04:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 08:04:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 08:04:15 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-03-30 08:04:15 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 08:04:15 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 08:04:15 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 08:04:15 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 08:04:16 [DEBUG] clck_gen.py:128 IND CLOCK 306
2025-03-30 08:04:16 [DEBUG] clck_gen.py:128 IND CLOCK 408
2025-03-30 08:04:16 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 08:04:16 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 08:04:16 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 08:04:16 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 08:04:16 [DEBUG] clck_gen.py:128 IND CLOCK 510
2025-03-30 08:04:17 [DEBUG] clck_gen.py:128 IND CLOCK 612
2025-03-30 08:04:17 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 08:04:17 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 08:04:17 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 08:04:17 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 08:04:17 [DEBUG] clck_gen.py:128 IND CLOCK 714
2025-03-30 08:04:18 [DEBUG] clck_gen.py:128 IND CLOCK 816
2025-03-30 08:04:18 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 08:04:18 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 08:04:18 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 08:04:18 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 08:04:18 [DEBUG] clck_gen.py:128 IND CLOCK 918
2025-03-30 08:04:19 [DEBUG] clck_gen.py:128 IND CLOCK 1020
2025-03-30 08:04:19 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 08:04:19 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 08:04:19 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 08:04:19 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 08:04:19 [DEBUG] clck_gen.py:128 IND CLOCK 1122
2025-03-30 08:04:20 [DEBUG] clck_gen.py:128 IND CLOCK 1224
2025-03-30 08:04:20 [DEBUG] clck_gen.py:128 IND CLOCK 1326
2025-03-30 08:04:21 [DEBUG] clck_gen.py:128 IND CLOCK 1428
2025-03-30 08:04:21 [DEBUG] clck_gen.py:128 IND CLOCK 1530
2025-03-30 08:04:22 [DEBUG] clck_gen.py:128 IND CLOCK 1632
2025-03-30 08:04:22 [DEBUG] clck_gen.py:128 IND CLOCK 1734
2025-03-30 08:04:23 [DEBUG] clck_gen.py:128 IND CLOCK 1836
2025-03-30 08:04:23 [DEBUG] clck_gen.py:128 IND CLOCK 1938
2025-03-30 08:04:24 [DEBUG] clck_gen.py:128 IND CLOCK 2040
2025-03-30 08:04:24 [DEBUG] clck_gen.py:128 IND CLOCK 2142
2025-03-30 08:04:24 [DEBUG] clck_gen.py:128 IND CLOCK 2244
2025-03-30 08:04:25 [DEBUG] clck_gen.py:128 IND CLOCK 2346
2025-03-30 08:04:25 [DEBUG] clck_gen.py:128 IND CLOCK 2448
2025-03-30 08:04:26 [DEBUG] clck_gen.py:128 IND CLOCK 2550
2025-03-30 08:04:26 [DEBUG] clck_gen.py:128 IND CLOCK 2652
2025-03-30 08:04:27 [DEBUG] clck_gen.py:128 IND CLOCK 2754
2025-03-30 08:04:27 [DEBUG] clck_gen.py:128 IND CLOCK 2856
2025-03-30 08:04:28 [DEBUG] clck_gen.py:128 IND CLOCK 2958
2025-03-30 08:04:28 [DEBUG] clck_gen.py:128 IND CLOCK 3060
2025-03-30 08:04:29 [DEBUG] clck_gen.py:128 IND CLOCK 3162
2025-03-30 08:04:29 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=3249): ver=1 fn=3246 tn=0 bl=148 pwr=0
2025-03-30 08:04:29 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=3249): ver=1 fn=3246 tn=1 bl=148 pwr=0
2025-03-30 08:04:29 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=3249): ver=1 fn=3246 tn=2 bl=148 pwr=0
2025-03-30 08:04:29 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=3249): ver=1 fn=3246 tn=3 bl=148 pwr=0
2025-03-30 08:04:29 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=3249): ver=1 fn=3246 tn=4 bl=148 pwr=0
2025-03-30 08:04:29 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=3249): ver=1 fn=3246 tn=5 bl=148 pwr=0
2025-03-30 08:04:29 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=3249): ver=1 fn=3246 tn=6 bl=148 pwr=0
2025-03-30 08:04:29 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=3249): ver=1 fn=3246 tn=7 bl=148 pwr=0
2025-03-30 08:04:29 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=3249): ver=1 fn=3247 tn=0 bl=148 pwr=0
2025-03-30 08:04:29 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=3249): ver=1 fn=3247 tn=1 bl=148 pwr=0
2025-03-30 08:04:29 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=3249): ver=1 fn=3247 tn=2 bl=148 pwr=0
2025-03-30 08:04:29 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=3249): ver=1 fn=3247 tn=3 bl=148 pwr=0
2025-03-30 08:04:29 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=3249): ver=1 fn=3247 tn=4 bl=148 pwr=0
2025-03-30 08:04:29 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=3249): ver=1 fn=3247 tn=5 bl=148 pwr=0
2025-03-30 08:04:29 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=3249): ver=1 fn=3247 tn=6 bl=148 pwr=0
2025-03-30 08:04:29 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=3249): ver=1 fn=3247 tn=7 bl=148 pwr=0
2025-03-30 08:04:29 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=3249): ver=1 fn=3248 tn=0 bl=148 pwr=0
2025-03-30 08:04:29 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=3249): ver=1 fn=3248 tn=1 bl=148 pwr=0
2025-03-30 08:04:29 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=3249): ver=1 fn=3248 tn=2 bl=148 pwr=0
2025-03-30 08:04:29 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=3249): ver=1 fn=3248 tn=3 bl=148 pwr=0
2025-03-30 08:04:29 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=3249): ver=1 fn=3248 tn=4 bl=148 pwr=0
2025-03-30 08:04:29 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=3249): ver=1 fn=3248 tn=5 bl=148 pwr=0
2025-03-30 08:04:29 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=3249): ver=1 fn=3248 tn=6 bl=148 pwr=0
2025-03-30 08:04:29 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=3249): ver=1 fn=3248 tn=7 bl=148 pwr=0
2025-03-30 08:04:29 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=3250): ver=1 fn=3249 tn=0 bl=148 pwr=0
2025-03-30 08:04:29 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=3250): ver=1 fn=3249 tn=1 bl=148 pwr=0
2025-03-30 08:04:29 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=3250): ver=1 fn=3249 tn=2 bl=148 pwr=0
2025-03-30 08:04:29 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=3250): ver=1 fn=3249 tn=3 bl=148 pwr=0
2025-03-30 08:04:29 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=3250): ver=1 fn=3249 tn=4 bl=148 pwr=0
2025-03-30 08:04:29 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=3250): ver=1 fn=3249 tn=5 bl=148 pwr=0
2025-03-30 08:04:29 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=3250): ver=1 fn=3249 tn=6 bl=148 pwr=0
2025-03-30 08:04:29 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=3250): ver=1 fn=3249 tn=7 bl=148 pwr=0
2025-03-30 08:04:29 [DEBUG] clck_gen.py:128 IND CLOCK 3264
2025-03-30 08:04:30 [DEBUG] clck_gen.py:128 IND CLOCK 3366
2025-03-30 08:04:30 [DEBUG] clck_gen.py:128 IND CLOCK 3468
2025-03-30 08:04:31 [DEBUG] clck_gen.py:128 IND CLOCK 3570
2025-03-30 08:04:31 [DEBUG] clck_gen.py:128 IND CLOCK 3672
2025-03-30 08:04:32 [DEBUG] clck_gen.py:128 IND CLOCK 3774
2025-03-30 08:04:32 [DEBUG] clck_gen.py:128 IND CLOCK 3876
2025-03-30 08:04:32 [DEBUG] clck_gen.py:128 IND CLOCK 3978
2025-03-30 08:04:33 [DEBUG] clck_gen.py:128 IND CLOCK 4080
2025-03-30 08:04:33 [DEBUG] clck_gen.py:128 IND CLOCK 4182
2025-03-30 08:04:34 [DEBUG] clck_gen.py:128 IND CLOCK 4284
2025-03-30 08:04:34 [DEBUG] clck_gen.py:128 IND CLOCK 4386
2025-03-30 08:04:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 08:04:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:04:35 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 08:04:35 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 08:04:35 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 08:04:35 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 08:04:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 08:04:35 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 08:04:35 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 08:04:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 08:04:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:04:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 08:04:35 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 08:04:35 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 08:04:35 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 08:04:35 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 08:04:35 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.26.22:6700) Recv SETFH cmd
2025-03-30 08:04:35 [INFO] transceiver.py:237 (MS@172.18.26.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2025-03-30 08:04:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 08:04:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 08:04:35 [DEBUG] clck_gen.py:128 IND CLOCK 4488
2025-03-30 08:04:35 [DEBUG] clck_gen.py:128 IND CLOCK 4590
2025-03-30 08:04:36 [DEBUG] clck_gen.py:128 IND CLOCK 4692
2025-03-30 08:04:36 [DEBUG] clck_gen.py:128 IND CLOCK 4794
2025-03-30 08:04:37 [DEBUG] clck_gen.py:128 IND CLOCK 4896
2025-03-30 08:04:37 [DEBUG] clck_gen.py:128 IND CLOCK 4998
2025-03-30 08:04:38 [DEBUG] clck_gen.py:128 IND CLOCK 5100
2025-03-30 08:04:38 [DEBUG] clck_gen.py:128 IND CLOCK 5202
2025-03-30 08:04:39 [DEBUG] clck_gen.py:128 IND CLOCK 5304
2025-03-30 08:04:39 [DEBUG] clck_gen.py:128 IND CLOCK 5406
2025-03-30 08:04:40 [DEBUG] clck_gen.py:128 IND CLOCK 5508
2025-03-30 08:04:40 [DEBUG] clck_gen.py:128 IND CLOCK 5610
2025-03-30 08:04:40 [DEBUG] clck_gen.py:128 IND CLOCK 5712
2025-03-30 08:04:41 [DEBUG] clck_gen.py:128 IND CLOCK 5814
2025-03-30 08:04:41 [DEBUG] clck_gen.py:128 IND CLOCK 5916
2025-03-30 08:04:42 [DEBUG] clck_gen.py:128 IND CLOCK 6018
2025-03-30 08:04:42 [DEBUG] clck_gen.py:128 IND CLOCK 6120
2025-03-30 08:04:43 [DEBUG] clck_gen.py:128 IND CLOCK 6222
2025-03-30 08:04:43 [DEBUG] clck_gen.py:128 IND CLOCK 6324
2025-03-30 08:04:44 [DEBUG] clck_gen.py:128 IND CLOCK 6426
2025-03-30 08:04:44 [DEBUG] clck_gen.py:128 IND CLOCK 6528
2025-03-30 08:04:45 [DEBUG] clck_gen.py:128 IND CLOCK 6630
2025-03-30 08:04:45 [DEBUG] clck_gen.py:128 IND CLOCK 6732
2025-03-30 08:04:46 [DEBUG] clck_gen.py:128 IND CLOCK 6834
2025-03-30 08:04:46 [DEBUG] clck_gen.py:128 IND CLOCK 6936
2025-03-30 08:04:47 [DEBUG] clck_gen.py:128 IND CLOCK 7038
2025-03-30 08:04:47 [DEBUG] clck_gen.py:128 IND CLOCK 7140
2025-03-30 08:04:48 [DEBUG] clck_gen.py:128 IND CLOCK 7242
2025-03-30 08:04:48 [DEBUG] clck_gen.py:128 IND CLOCK 7344
2025-03-30 08:04:48 [DEBUG] clck_gen.py:128 IND CLOCK 7446
2025-03-30 08:04:49 [DEBUG] clck_gen.py:128 IND CLOCK 7548
2025-03-30 08:04:49 [DEBUG] clck_gen.py:128 IND CLOCK 7650
2025-03-30 08:04:50 [DEBUG] clck_gen.py:128 IND CLOCK 7752
2025-03-30 08:04:50 [DEBUG] clck_gen.py:128 IND CLOCK 7854
2025-03-30 08:04:51 [DEBUG] clck_gen.py:128 IND CLOCK 7956
2025-03-30 08:04:51 [DEBUG] clck_gen.py:128 IND CLOCK 8058
2025-03-30 08:04:52 [DEBUG] clck_gen.py:128 IND CLOCK 8160
2025-03-30 08:04:52 [DEBUG] clck_gen.py:128 IND CLOCK 8262
2025-03-30 08:04:53 [DEBUG] clck_gen.py:128 IND CLOCK 8364
2025-03-30 08:04:53 [DEBUG] clck_gen.py:128 IND CLOCK 8466
2025-03-30 08:04:54 [DEBUG] clck_gen.py:128 IND CLOCK 8568
2025-03-30 08:04:54 [DEBUG] clck_gen.py:128 IND CLOCK 8670
2025-03-30 08:04:55 [DEBUG] clck_gen.py:128 IND CLOCK 8772
2025-03-30 08:04:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 08:04:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:04:55 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 08:04:55 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 08:04:55 [INFO] transceiver.py:241 (MS@172.18.26.22:6700) Frequency hopping disabled
2025-03-30 08:04:55 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 08:04:55 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 08:04:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 08:04:55 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 08:04:55 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 08:04:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 08:04:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:04:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 08:04:55 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 08:04:55 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 08:04:55 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 08:04:55 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 08:04:55 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 08:04:55 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 08:04:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 08:04:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 08:04:55 [DEBUG] clck_gen.py:128 IND CLOCK 8874
2025-03-30 08:04:56 [DEBUG] clck_gen.py:128 IND CLOCK 8976
2025-03-30 08:04:56 [DEBUG] clck_gen.py:128 IND CLOCK 9078
2025-03-30 08:04:56 [DEBUG] clck_gen.py:128 IND CLOCK 9180
2025-03-30 08:04:57 [DEBUG] clck_gen.py:128 IND CLOCK 9282
2025-03-30 08:04:57 [DEBUG] clck_gen.py:128 IND CLOCK 9384
2025-03-30 08:04:58 [DEBUG] clck_gen.py:128 IND CLOCK 9486
2025-03-30 08:04:58 [DEBUG] clck_gen.py:128 IND CLOCK 9588
2025-03-30 08:04:59 [DEBUG] clck_gen.py:128 IND CLOCK 9690
2025-03-30 08:04:59 [DEBUG] clck_gen.py:128 IND CLOCK 9792
2025-03-30 08:05:00 [DEBUG] clck_gen.py:128 IND CLOCK 9894
2025-03-30 08:05:00 [DEBUG] clck_gen.py:128 IND CLOCK 9996
2025-03-30 08:05:01 [DEBUG] clck_gen.py:128 IND CLOCK 10098
2025-03-30 08:05:01 [DEBUG] clck_gen.py:128 IND CLOCK 10200
2025-03-30 08:05:02 [DEBUG] clck_gen.py:128 IND CLOCK 10302
2025-03-30 08:05:02 [DEBUG] clck_gen.py:128 IND CLOCK 10404
2025-03-30 08:05:03 [DEBUG] clck_gen.py:128 IND CLOCK 10506
2025-03-30 08:05:03 [DEBUG] clck_gen.py:128 IND CLOCK 10608
2025-03-30 08:05:04 [DEBUG] clck_gen.py:128 IND CLOCK 10710
2025-03-30 08:05:04 [DEBUG] clck_gen.py:128 IND CLOCK 10812
2025-03-30 08:05:04 [DEBUG] clck_gen.py:128 IND CLOCK 10914
2025-03-30 08:05:05 [DEBUG] clck_gen.py:128 IND CLOCK 11016
2025-03-30 08:05:05 [DEBUG] clck_gen.py:128 IND CLOCK 11118
2025-03-30 08:05:06 [DEBUG] clck_gen.py:128 IND CLOCK 11220
2025-03-30 08:05:06 [DEBUG] clck_gen.py:128 IND CLOCK 11322
2025-03-30 08:05:07 [DEBUG] clck_gen.py:128 IND CLOCK 11424
2025-03-30 08:05:07 [DEBUG] clck_gen.py:128 IND CLOCK 11526
2025-03-30 08:05:08 [DEBUG] clck_gen.py:128 IND CLOCK 11628
2025-03-30 08:05:08 [DEBUG] clck_gen.py:128 IND CLOCK 11730
2025-03-30 08:05:09 [DEBUG] clck_gen.py:128 IND CLOCK 11832
2025-03-30 08:05:09 [DEBUG] clck_gen.py:128 IND CLOCK 11934
2025-03-30 08:05:10 [DEBUG] clck_gen.py:128 IND CLOCK 12036
2025-03-30 08:05:10 [DEBUG] clck_gen.py:128 IND CLOCK 12138
2025-03-30 08:05:11 [DEBUG] clck_gen.py:128 IND CLOCK 12240
2025-03-30 08:05:11 [DEBUG] clck_gen.py:128 IND CLOCK 12342
2025-03-30 08:05:12 [DEBUG] clck_gen.py:128 IND CLOCK 12444
2025-03-30 08:05:12 [DEBUG] clck_gen.py:128 IND CLOCK 12546
2025-03-30 08:05:12 [DEBUG] clck_gen.py:128 IND CLOCK 12648
2025-03-30 08:05:13 [DEBUG] clck_gen.py:128 IND CLOCK 12750
2025-03-30 08:05:13 [DEBUG] clck_gen.py:128 IND CLOCK 12852
2025-03-30 08:05:14 [DEBUG] clck_gen.py:128 IND CLOCK 12954
2025-03-30 08:05:14 [DEBUG] clck_gen.py:128 IND CLOCK 13056
2025-03-30 08:05:15 [DEBUG] clck_gen.py:128 IND CLOCK 13158
2025-03-30 08:05:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 08:05:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:05:15 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 08:05:15 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 08:05:15 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 08:05:15 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 08:05:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 08:05:15 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 08:05:15 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 08:05:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 08:05:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:05:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 08:05:15 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 08:05:15 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 08:05:15 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 08:05:15 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 08:05:15 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.26.22:6700) Recv SETFH cmd
2025-03-30 08:05:15 [INFO] transceiver.py:237 (MS@172.18.26.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2025-03-30 08:05:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 08:05:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 08:05:15 [DEBUG] clck_gen.py:128 IND CLOCK 13260
2025-03-30 08:05:16 [DEBUG] clck_gen.py:128 IND CLOCK 13362
2025-03-30 08:05:16 [DEBUG] clck_gen.py:128 IND CLOCK 13464
2025-03-30 08:05:17 [DEBUG] clck_gen.py:128 IND CLOCK 13566
2025-03-30 08:05:17 [DEBUG] clck_gen.py:128 IND CLOCK 13668
2025-03-30 08:05:18 [DEBUG] clck_gen.py:128 IND CLOCK 13770
2025-03-30 08:05:18 [DEBUG] clck_gen.py:128 IND CLOCK 13872
2025-03-30 08:05:19 [DEBUG] clck_gen.py:128 IND CLOCK 13974
2025-03-30 08:05:19 [DEBUG] clck_gen.py:128 IND CLOCK 14076
2025-03-30 08:05:20 [DEBUG] clck_gen.py:128 IND CLOCK 14178
2025-03-30 08:05:20 [DEBUG] clck_gen.py:128 IND CLOCK 14280
2025-03-30 08:05:20 [DEBUG] clck_gen.py:128 IND CLOCK 14382
2025-03-30 08:05:21 [DEBUG] clck_gen.py:128 IND CLOCK 14484
2025-03-30 08:05:21 [DEBUG] clck_gen.py:128 IND CLOCK 14586
2025-03-30 08:05:22 [DEBUG] clck_gen.py:128 IND CLOCK 14688
2025-03-30 08:05:22 [DEBUG] clck_gen.py:128 IND CLOCK 14790
2025-03-30 08:05:23 [DEBUG] clck_gen.py:128 IND CLOCK 14892
2025-03-30 08:05:23 [DEBUG] clck_gen.py:128 IND CLOCK 14994
2025-03-30 08:05:24 [DEBUG] clck_gen.py:128 IND CLOCK 15096
2025-03-30 08:05:24 [DEBUG] clck_gen.py:128 IND CLOCK 15198
2025-03-30 08:05:25 [DEBUG] clck_gen.py:128 IND CLOCK 15300
2025-03-30 08:05:25 [DEBUG] clck_gen.py:128 IND CLOCK 15402
2025-03-30 08:05:26 [DEBUG] clck_gen.py:128 IND CLOCK 15504
2025-03-30 08:05:26 [DEBUG] clck_gen.py:128 IND CLOCK 15606
2025-03-30 08:05:27 [DEBUG] clck_gen.py:128 IND CLOCK 15708
2025-03-30 08:05:27 [DEBUG] clck_gen.py:128 IND CLOCK 15810
2025-03-30 08:05:28 [DEBUG] clck_gen.py:128 IND CLOCK 15912
2025-03-30 08:05:28 [DEBUG] clck_gen.py:128 IND CLOCK 16014
2025-03-30 08:05:28 [DEBUG] clck_gen.py:128 IND CLOCK 16116
2025-03-30 08:05:29 [DEBUG] clck_gen.py:128 IND CLOCK 16218
2025-03-30 08:05:29 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=16256): ver=1 fn=16255 tn=6 bl=148 pwr=0
2025-03-30 08:05:29 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=16256): ver=1 fn=16255 tn=7 bl=148 pwr=0
2025-03-30 08:05:29 [DEBUG] clck_gen.py:128 IND CLOCK 16320
2025-03-30 08:05:30 [DEBUG] clck_gen.py:128 IND CLOCK 16422
2025-03-30 08:05:30 [DEBUG] clck_gen.py:128 IND CLOCK 16524
2025-03-30 08:05:31 [DEBUG] clck_gen.py:128 IND CLOCK 16626
2025-03-30 08:05:31 [DEBUG] clck_gen.py:128 IND CLOCK 16728
2025-03-30 08:05:32 [DEBUG] clck_gen.py:128 IND CLOCK 16830
2025-03-30 08:05:32 [DEBUG] clck_gen.py:128 IND CLOCK 16932
2025-03-30 08:05:33 [DEBUG] clck_gen.py:128 IND CLOCK 17034
2025-03-30 08:05:33 [DEBUG] clck_gen.py:128 IND CLOCK 17136
2025-03-30 08:05:34 [DEBUG] clck_gen.py:128 IND CLOCK 17238
2025-03-30 08:05:34 [DEBUG] clck_gen.py:128 IND CLOCK 17340
2025-03-30 08:05:35 [DEBUG] clck_gen.py:128 IND CLOCK 17442
2025-03-30 08:05:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 08:05:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:05:35 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 08:05:35 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 08:05:35 [INFO] transceiver.py:241 (MS@172.18.26.22:6700) Frequency hopping disabled
2025-03-30 08:05:35 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 08:05:35 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 08:05:35 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 08:05:35 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 08:05:35 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 08:05:35 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 08:05:35 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 08:05:35 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 08:05:35 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 08:05:35 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 08:05:35 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 08:05:35 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=17508 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 08:05:35 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=17508 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 08:05:35 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=17508 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 08:05:35 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=17508 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 08:05:35 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=17508 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 08:05:35 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=17508 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 08:05:35 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=17509 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 08:05:35 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=17509 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 08:05:35 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=17509 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 08:05:35 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=17509 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 08:05:35 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=17509 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 08:05:35 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=17509 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 08:05:35 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=17509 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 08:05:35 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=17509 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 08:05:40 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 08:05:40 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 08:05:40 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 08:05:40 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 08:05:40 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 08:05:40 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 08:05:40 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 08:05:40 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 08:05:40 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 08:05:40 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 08:05:40 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 08:05:40 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 08:05:40 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 08:05:40 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 08:05:40 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 08:05:40 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 08:05:40 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 08:05:40 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 08:05:40 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 08:05:40 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 08:05:40 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 08:05:40 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 08:05:40 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 08:05:40 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 08:05:40 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 08:05:40 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 08:05:40 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 08:05:40 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 08:05:40 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 08:05:40 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 08:05:40 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 08:05:40 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 08:05:40 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 08:05:40 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 08:05:40 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 08:05:40 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 08:05:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 08:05:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 08:05:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 08:05:40 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 08:05:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 08:05:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 08:05:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 08:05:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 08:05:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 08:05:40 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 08:05:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 08:05:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 08:05:40 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 08:05:40 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 08:05:40 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 08:05:40 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 08:05:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 08:05:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 08:05:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 08:05:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 08:05:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 08:05:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 08:05:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 08:05:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 08:05:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 08:05:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 08:05:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 08:05:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 08:05:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 08:05:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 08:05:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 08:05:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 08:05:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 08:05:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 08:05:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 08:05:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 08:05:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 08:05:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 08:05:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 08:05:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 08:05:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 08:05:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 08:05:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 08:05:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 08:05:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 08:05:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 08:05:40 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 08:05:40 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 08:05:40 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 08:05:40 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 08:05:40 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 08:05:40 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 08:05:40 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 08:05:45 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 08:05:45 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 08:05:45 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 08:05:45 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 08:05:45 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 08:05:45 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 08:05:45 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 08:05:45 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 08:05:45 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 08:05:45 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 08:05:45 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 08:05:45 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 08:05:45 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 08:05:45 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 08:05:45 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 08:05:45 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 08:05:45 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 08:05:45 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 08:05:45 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 08:05:45 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 08:05:45 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 08:05:45 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 08:05:45 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 08:05:45 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 08:05:45 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 08:05:45 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 08:05:45 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 08:05:45 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 08:05:45 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 08:05:45 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 08:05:45 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 08:05:45 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 08:05:45 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 08:05:45 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 08:05:45 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 08:05:45 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 08:05:45 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 08:05:45 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 08:05:45 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 08:05:45 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 08:05:45 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 08:05:45 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 08:05:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 08:05:45 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 08:05:45 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 08:05:45 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 08:05:45 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 08:05:45 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 08:05:45 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 08:05:45 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 08:05:45 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 08:05:45 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 08:05:45 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 08:05:45 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 08:05:45 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 08:05:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 08:05:45 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 08:05:45 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 08:05:45 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 08:05:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 08:05:45 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 08:05:45 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 08:05:45 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 08:05:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 08:05:45 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 08:05:45 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 08:05:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 08:05:45 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 08:05:45 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 08:05:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 08:05:45 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 08:05:45 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 08:05:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 08:05:45 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 08:05:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 08:05:45 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 08:05:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 08:05:45 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 08:05:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 08:05:45 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 08:05:45 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 08:05:45 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 08:05:45 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-03-30 08:05:45 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-03-30 08:05:45 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-03-30 08:05:45 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-03-30 08:05:45 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-03-30 08:05:45 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-03-30 08:05:45 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-03-30 08:05:45 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-03-30 08:05:45 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-03-30 08:05:45 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-03-30 08:05:45 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=0 bl=148 pwr=0
2025-03-30 08:05:45 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=1 bl=148 pwr=0
2025-03-30 08:05:45 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=2 bl=148 pwr=0
2025-03-30 08:05:45 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=3 bl=148 pwr=0
2025-03-30 08:05:45 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=4 bl=148 pwr=0
2025-03-30 08:05:45 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=5 bl=148 pwr=0
2025-03-30 08:05:45 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=6 bl=148 pwr=0
2025-03-30 08:05:45 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=7 bl=148 pwr=0
2025-03-30 08:05:45 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 08:05:45 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 08:05:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:05:45 [DEBUG] fake_trx.py:317 (BTS@172.18.26.20:5700) Recv FAKE_CI cmd
2025-03-30 08:05:46 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 08:05:46 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 08:05:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 08:05:46 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 08:05:46 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 08:05:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 08:05:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:05:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 08:05:46 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 08:05:46 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 08:05:46 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 08:05:46 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 08:05:46 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 08:05:46 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 08:05:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 08:05:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 08:05:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 08:05:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:05:46 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 08:05:46 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 08:05:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:05:46 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 08:05:46 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 08:05:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 08:05:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 08:05:46 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 08:05:46 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 08:05:46 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 08:05:46 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 08:05:46 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 08:05:46 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 08:05:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 08:05:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 08:05:46 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-03-30 08:05:46 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 08:05:46 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 08:05:46 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 08:05:46 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 08:05:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 08:05:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:05:46 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 08:05:46 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 08:05:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:05:46 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 08:05:46 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 08:05:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 08:05:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 08:05:46 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 08:05:46 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 08:05:46 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 08:05:46 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 08:05:46 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 08:05:46 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 08:05:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 08:05:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 08:05:46 [DEBUG] clck_gen.py:128 IND CLOCK 306
2025-03-30 08:05:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 08:05:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:05:46 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 08:05:46 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 08:05:46 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 08:05:46 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 08:05:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 08:05:46 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 08:05:46 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 08:05:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 08:05:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:05:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 08:05:46 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 08:05:46 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 08:05:46 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 08:05:46 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 08:05:46 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.26.22:6700) Recv SETFH cmd
2025-03-30 08:05:46 [INFO] transceiver.py:237 (MS@172.18.26.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2025-03-30 08:05:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 08:05:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 08:05:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 08:05:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:05:47 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 08:05:47 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 08:05:47 [INFO] transceiver.py:241 (MS@172.18.26.22:6700) Frequency hopping disabled
2025-03-30 08:05:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:05:47 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 08:05:47 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 08:05:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 08:05:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 08:05:47 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 08:05:47 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 08:05:47 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 08:05:47 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 08:05:47 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.26.22:6700) Recv SETFH cmd
2025-03-30 08:05:47 [INFO] transceiver.py:237 (MS@172.18.26.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2025-03-30 08:05:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 08:05:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 08:05:47 [DEBUG] clck_gen.py:128 IND CLOCK 408
2025-03-30 08:05:47 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 08:05:47 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 08:05:47 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 08:05:47 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 08:05:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 08:05:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:05:47 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 08:05:47 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 08:05:47 [INFO] transceiver.py:241 (MS@172.18.26.22:6700) Frequency hopping disabled
2025-03-30 08:05:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:05:47 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 08:05:47 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 08:05:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 08:05:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 08:05:47 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 08:05:47 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 08:05:47 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 08:05:47 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 08:05:47 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.26.22:6700) Recv SETFH cmd
2025-03-30 08:05:47 [INFO] transceiver.py:237 (MS@172.18.26.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2025-03-30 08:05:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 08:05:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 08:05:47 [DEBUG] clck_gen.py:128 IND CLOCK 510
2025-03-30 08:05:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 08:05:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:05:48 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 08:05:48 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 08:05:48 [INFO] transceiver.py:241 (MS@172.18.26.22:6700) Frequency hopping disabled
2025-03-30 08:05:48 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 08:05:48 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 08:05:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 08:05:48 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 08:05:48 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 08:05:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 08:05:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:05:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 08:05:48 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 08:05:48 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 08:05:48 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 08:05:48 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 08:05:48 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 08:05:48 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 08:05:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 08:05:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 08:05:48 [DEBUG] clck_gen.py:128 IND CLOCK 612
2025-03-30 08:05:48 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 08:05:48 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 08:05:48 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 08:05:48 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 08:05:48 [DEBUG] clck_gen.py:128 IND CLOCK 714
2025-03-30 08:05:49 [DEBUG] clck_gen.py:128 IND CLOCK 816
2025-03-30 08:05:49 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 08:05:49 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 08:05:49 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 08:05:49 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 08:05:49 [DEBUG] clck_gen.py:128 IND CLOCK 918
2025-03-30 08:05:50 [DEBUG] clck_gen.py:128 IND CLOCK 1020
2025-03-30 08:05:50 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 08:05:50 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 08:05:50 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 08:05:50 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 08:05:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 08:05:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:05:50 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 08:05:50 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 08:05:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:05:50 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 08:05:50 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 08:05:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 08:05:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 08:05:50 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 08:05:50 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 08:05:50 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 08:05:50 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 08:05:50 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 08:05:50 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 08:05:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 08:05:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 08:05:50 [DEBUG] clck_gen.py:128 IND CLOCK 1122
2025-03-30 08:05:51 [DEBUG] clck_gen.py:128 IND CLOCK 1224
2025-03-30 08:05:51 [DEBUG] clck_gen.py:128 IND CLOCK 1326
2025-03-30 08:05:52 [DEBUG] clck_gen.py:128 IND CLOCK 1428
2025-03-30 08:05:52 [DEBUG] clck_gen.py:128 IND CLOCK 1530
2025-03-30 08:05:52 [DEBUG] clck_gen.py:128 IND CLOCK 1632
2025-03-30 08:05:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 08:05:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:05:53 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 08:05:53 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 08:05:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:05:53 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 08:05:53 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 08:05:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 08:05:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 08:05:53 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 08:05:53 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 08:05:53 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 08:05:53 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 08:05:53 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 08:05:53 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 08:05:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 08:05:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 08:05:53 [DEBUG] clck_gen.py:128 IND CLOCK 1734
2025-03-30 08:05:53 [DEBUG] clck_gen.py:128 IND CLOCK 1836
2025-03-30 08:05:54 [DEBUG] clck_gen.py:128 IND CLOCK 1938
2025-03-30 08:05:54 [DEBUG] clck_gen.py:128 IND CLOCK 2040
2025-03-30 08:05:55 [DEBUG] clck_gen.py:128 IND CLOCK 2142
2025-03-30 08:05:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 08:05:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:05:55 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 08:05:55 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 08:05:55 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 08:05:55 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 08:05:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 08:05:55 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 08:05:55 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 08:05:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 08:05:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:05:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 08:05:55 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 08:05:55 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 08:05:55 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 08:05:55 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 08:05:55 [DEBUG] clck_gen.py:128 IND CLOCK 2244
2025-03-30 08:05:55 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.26.22:6700) Recv SETFH cmd
2025-03-30 08:05:55 [INFO] transceiver.py:237 (MS@172.18.26.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2025-03-30 08:05:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 08:05:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 08:05:56 [DEBUG] clck_gen.py:128 IND CLOCK 2346
2025-03-30 08:05:56 [DEBUG] clck_gen.py:128 IND CLOCK 2448
2025-03-30 08:05:57 [DEBUG] clck_gen.py:128 IND CLOCK 2550
2025-03-30 08:05:57 [DEBUG] clck_gen.py:128 IND CLOCK 2652
2025-03-30 08:05:58 [DEBUG] clck_gen.py:128 IND CLOCK 2754
2025-03-30 08:05:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 08:05:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:05:58 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 08:05:58 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 08:05:58 [INFO] transceiver.py:241 (MS@172.18.26.22:6700) Frequency hopping disabled
2025-03-30 08:05:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:05:58 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 08:05:58 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 08:05:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 08:05:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 08:05:58 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 08:05:58 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 08:05:58 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 08:05:58 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 08:05:58 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.26.22:6700) Recv SETFH cmd
2025-03-30 08:05:58 [INFO] transceiver.py:237 (MS@172.18.26.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2025-03-30 08:05:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 08:05:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 08:05:58 [DEBUG] clck_gen.py:128 IND CLOCK 2856
2025-03-30 08:05:59 [DEBUG] clck_gen.py:128 IND CLOCK 2958
2025-03-30 08:05:59 [DEBUG] clck_gen.py:128 IND CLOCK 3060
2025-03-30 08:06:00 [DEBUG] clck_gen.py:128 IND CLOCK 3162
2025-03-30 08:06:00 [DEBUG] clck_gen.py:128 IND CLOCK 3264
2025-03-30 08:06:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 08:06:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:06:00 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 08:06:00 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 08:06:00 [INFO] transceiver.py:241 (MS@172.18.26.22:6700) Frequency hopping disabled
2025-03-30 08:06:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:06:00 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 08:06:00 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 08:06:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 08:06:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 08:06:00 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 08:06:00 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 08:06:00 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 08:06:00 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 08:06:00 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.26.22:6700) Recv SETFH cmd
2025-03-30 08:06:00 [INFO] transceiver.py:237 (MS@172.18.26.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2025-03-30 08:06:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 08:06:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 08:06:00 [DEBUG] clck_gen.py:128 IND CLOCK 3366
2025-03-30 08:06:01 [DEBUG] clck_gen.py:128 IND CLOCK 3468
2025-03-30 08:06:01 [DEBUG] clck_gen.py:128 IND CLOCK 3570
2025-03-30 08:06:02 [DEBUG] clck_gen.py:128 IND CLOCK 3672
2025-03-30 08:06:02 [DEBUG] clck_gen.py:128 IND CLOCK 3774
2025-03-30 08:06:03 [DEBUG] clck_gen.py:128 IND CLOCK 3876
2025-03-30 08:06:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 08:06:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:06:03 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 08:06:03 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 08:06:03 [INFO] transceiver.py:241 (MS@172.18.26.22:6700) Frequency hopping disabled
2025-03-30 08:06:03 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 08:06:03 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 08:06:03 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 08:06:03 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 08:06:03 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 08:06:03 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 08:06:03 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 08:06:03 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 08:06:03 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 08:06:03 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 08:06:03 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 08:06:03 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=3901 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 08:06:03 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=3901 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 08:06:03 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=3901 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 08:06:03 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=3901 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 08:06:03 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=3901 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 08:06:03 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=3901 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 08:06:03 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=3901 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 08:06:03 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=3901 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 08:06:08 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 08:06:08 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 08:06:08 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 08:06:08 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 08:06:08 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 08:06:08 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 08:06:08 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 08:06:08 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 08:06:08 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 08:06:08 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 08:06:08 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 08:06:08 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 08:06:08 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 08:06:08 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 08:06:08 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 08:06:08 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 08:06:08 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 08:06:08 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 08:06:08 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 08:06:08 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 08:06:08 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 08:06:08 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 08:06:08 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 08:06:08 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 08:06:08 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 08:06:08 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 08:06:08 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 08:06:08 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 08:06:08 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 08:06:08 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 08:06:08 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 08:06:08 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 08:06:08 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 08:06:08 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 08:06:08 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 08:06:08 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 08:06:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 08:06:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 08:06:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 08:06:08 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 08:06:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 08:06:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 08:06:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 08:06:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 08:06:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 08:06:08 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 08:06:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 08:06:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 08:06:08 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 08:06:08 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 08:06:08 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 08:06:08 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 08:06:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 08:06:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 08:06:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 08:06:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 08:06:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 08:06:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 08:06:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 08:06:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 08:06:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 08:06:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 08:06:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 08:06:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 08:06:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 08:06:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 08:06:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 08:06:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 08:06:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 08:06:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 08:06:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 08:06:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 08:06:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 08:06:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 08:06:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 08:06:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 08:06:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 08:06:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 08:06:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 08:06:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 08:06:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 08:06:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 08:06:08 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-03-30 08:06:08 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-03-30 08:06:08 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-03-30 08:06:08 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-03-30 08:06:08 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-03-30 08:06:08 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-03-30 08:06:08 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-03-30 08:06:08 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-03-30 08:06:08 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-03-30 08:06:08 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-03-30 08:06:08 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=0 bl=148 pwr=0
2025-03-30 08:06:08 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=1 bl=148 pwr=0
2025-03-30 08:06:08 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=2 bl=148 pwr=0
2025-03-30 08:06:08 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=3 bl=148 pwr=0
2025-03-30 08:06:08 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=4 bl=148 pwr=0
2025-03-30 08:06:08 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=5 bl=148 pwr=0
2025-03-30 08:06:08 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=6 bl=148 pwr=0
2025-03-30 08:06:08 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=7 bl=148 pwr=0
2025-03-30 08:06:09 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 08:06:09 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 08:06:09 [DEBUG] fake_trx.py:317 (BTS@172.18.26.20:5700) Recv FAKE_CI cmd
2025-03-30 08:06:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:06:09 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 08:06:09 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 08:06:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 08:06:09 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 08:06:09 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 08:06:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 08:06:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:06:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 08:06:09 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 08:06:09 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 08:06:09 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 08:06:09 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 08:06:09 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 08:06:09 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 08:06:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 08:06:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 08:06:09 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-03-30 08:06:09 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 08:06:09 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 08:06:09 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 08:06:09 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 08:06:09 [DEBUG] clck_gen.py:128 IND CLOCK 306
2025-03-30 08:06:10 [DEBUG] clck_gen.py:128 IND CLOCK 408
2025-03-30 08:06:10 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 08:06:10 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 08:06:10 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 08:06:10 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 08:06:10 [DEBUG] clck_gen.py:128 IND CLOCK 510
2025-03-30 08:06:11 [DEBUG] clck_gen.py:128 IND CLOCK 612
2025-03-30 08:06:11 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 08:06:11 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 08:06:11 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 08:06:11 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 08:06:11 [DEBUG] clck_gen.py:128 IND CLOCK 714
2025-03-30 08:06:12 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 08:06:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:06:12 [DEBUG] clck_gen.py:128 IND CLOCK 816
2025-03-30 08:06:12 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 08:06:12 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 08:06:12 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 08:06:12 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 08:06:12 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 08:06:12 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 08:06:12 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 08:06:12 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 08:06:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:06:12 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 08:06:12 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 08:06:12 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 08:06:12 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 08:06:12 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 08:06:12 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.26.22:6700) Recv SETFH cmd
2025-03-30 08:06:12 [INFO] transceiver.py:237 (MS@172.18.26.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2025-03-30 08:06:12 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 08:06:12 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 08:06:12 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 08:06:12 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 08:06:12 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 08:06:12 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 08:06:12 [DEBUG] clck_gen.py:128 IND CLOCK 918
2025-03-30 08:06:13 [DEBUG] clck_gen.py:128 IND CLOCK 1020
2025-03-30 08:06:13 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 08:06:13 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 08:06:13 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 08:06:13 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 08:06:13 [DEBUG] clck_gen.py:128 IND CLOCK 1122
2025-03-30 08:06:13 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 08:06:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:06:13 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 08:06:13 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 08:06:13 [INFO] transceiver.py:241 (MS@172.18.26.22:6700) Frequency hopping disabled
2025-03-30 08:06:13 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 08:06:13 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 08:06:13 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 08:06:13 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 08:06:13 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 08:06:13 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 08:06:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:06:13 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 08:06:13 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 08:06:13 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 08:06:13 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 08:06:13 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 08:06:13 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 08:06:13 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 08:06:13 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 08:06:13 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 08:06:14 [DEBUG] clck_gen.py:128 IND CLOCK 1224
2025-03-30 08:06:14 [DEBUG] clck_gen.py:128 IND CLOCK 1326
2025-03-30 08:06:15 [DEBUG] clck_gen.py:128 IND CLOCK 1428
2025-03-30 08:06:15 [DEBUG] clck_gen.py:128 IND CLOCK 1530
2025-03-30 08:06:16 [DEBUG] clck_gen.py:128 IND CLOCK 1632
2025-03-30 08:06:16 [DEBUG] clck_gen.py:128 IND CLOCK 1734
2025-03-30 08:06:16 [DEBUG] clck_gen.py:128 IND CLOCK 1836
2025-03-30 08:06:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 08:06:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:06:17 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 08:06:17 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 08:06:17 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 08:06:17 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 08:06:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 08:06:17 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 08:06:17 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 08:06:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 08:06:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:06:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 08:06:17 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 08:06:17 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 08:06:17 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 08:06:17 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 08:06:17 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.26.22:6700) Recv SETFH cmd
2025-03-30 08:06:17 [INFO] transceiver.py:237 (MS@172.18.26.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2025-03-30 08:06:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 08:06:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 08:06:17 [DEBUG] clck_gen.py:128 IND CLOCK 1938
2025-03-30 08:06:17 [DEBUG] clck_gen.py:128 IND CLOCK 2040
2025-03-30 08:06:18 [DEBUG] clck_gen.py:128 IND CLOCK 2142
2025-03-30 08:06:18 [DEBUG] clck_gen.py:128 IND CLOCK 2244
2025-03-30 08:06:19 [DEBUG] clck_gen.py:128 IND CLOCK 2346
2025-03-30 08:06:19 [DEBUG] clck_gen.py:128 IND CLOCK 2448
2025-03-30 08:06:20 [DEBUG] clck_gen.py:128 IND CLOCK 2550
2025-03-30 08:06:20 [DEBUG] clck_gen.py:128 IND CLOCK 2652
2025-03-30 08:06:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:06:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 08:06:20 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 08:06:20 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 08:06:20 [INFO] transceiver.py:241 (MS@172.18.26.22:6700) Frequency hopping disabled
2025-03-30 08:06:20 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 08:06:20 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 08:06:20 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 08:06:20 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 08:06:20 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 08:06:20 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 08:06:20 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 08:06:20 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 08:06:20 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 08:06:20 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 08:06:20 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 08:06:20 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=2679 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 08:06:20 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=2679 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 08:06:20 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=2679 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 08:06:20 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=2679 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 08:06:25 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 08:06:25 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 08:06:25 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 08:06:25 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 08:06:25 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 08:06:25 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 08:06:25 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 08:06:25 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 08:06:25 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 08:06:25 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 08:06:25 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 08:06:25 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 08:06:25 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 08:06:25 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 08:06:25 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 08:06:25 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 08:06:25 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 08:06:25 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 08:06:25 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 08:06:25 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 08:06:25 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 08:06:25 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 08:06:25 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 08:06:25 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 08:06:25 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 08:06:25 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 08:06:25 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 08:06:25 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 08:06:25 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 08:06:25 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 08:06:25 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 08:06:25 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 08:06:25 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 08:06:25 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 08:06:25 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 08:06:25 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 08:06:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 08:06:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 08:06:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 08:06:25 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 08:06:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 08:06:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 08:06:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 08:06:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 08:06:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 08:06:25 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 08:06:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 08:06:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 08:06:25 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 08:06:25 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 08:06:25 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 08:06:25 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 08:06:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 08:06:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 08:06:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 08:06:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 08:06:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 08:06:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 08:06:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 08:06:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 08:06:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 08:06:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 08:06:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 08:06:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 08:06:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 08:06:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 08:06:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 08:06:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 08:06:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 08:06:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 08:06:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 08:06:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 08:06:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 08:06:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 08:06:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 08:06:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 08:06:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 08:06:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 08:06:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 08:06:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 08:06:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 08:06:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 08:06:25 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-03-30 08:06:26 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-03-30 08:06:26 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-03-30 08:06:26 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-03-30 08:06:26 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-03-30 08:06:26 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-03-30 08:06:26 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-03-30 08:06:26 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-03-30 08:06:26 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-03-30 08:06:26 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-03-30 08:06:26 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=0 bl=148 pwr=0
2025-03-30 08:06:26 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=1 bl=148 pwr=0
2025-03-30 08:06:26 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=2 bl=148 pwr=0
2025-03-30 08:06:26 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=3 bl=148 pwr=0
2025-03-30 08:06:26 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=4 bl=148 pwr=0
2025-03-30 08:06:26 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=5 bl=148 pwr=0
2025-03-30 08:06:26 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=6 bl=148 pwr=0
2025-03-30 08:06:26 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=7 bl=148 pwr=0
2025-03-30 08:06:26 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 08:06:26 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 08:06:26 [DEBUG] fake_trx.py:317 (BTS@172.18.26.20:5700) Recv FAKE_CI cmd
2025-03-30 08:06:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:06:26 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 08:06:26 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 08:06:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 08:06:26 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 08:06:26 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 08:06:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 08:06:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:06:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 08:06:26 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 08:06:26 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 08:06:26 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 08:06:26 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 08:06:26 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 08:06:26 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 08:06:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 08:06:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 08:06:26 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-03-30 08:06:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 08:06:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:06:26 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 08:06:26 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 08:06:26 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 08:06:26 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 08:06:26 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 08:06:26 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 08:06:26 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 08:06:26 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 08:06:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 08:06:26 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 08:06:26 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 08:06:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 08:06:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:06:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 08:06:26 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 08:06:26 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 08:06:26 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 08:06:26 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 08:06:26 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.26.22:6700) Recv SETFH cmd
2025-03-30 08:06:26 [INFO] transceiver.py:237 (MS@172.18.26.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2025-03-30 08:06:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 08:06:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 08:06:27 [DEBUG] clck_gen.py:128 IND CLOCK 306
2025-03-30 08:06:27 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 08:06:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:06:27 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 08:06:27 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 08:06:27 [INFO] transceiver.py:241 (MS@172.18.26.22:6700) Frequency hopping disabled
2025-03-30 08:06:27 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 08:06:27 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 08:06:27 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 08:06:27 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 08:06:27 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 08:06:27 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 08:06:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:06:27 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 08:06:27 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 08:06:27 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 08:06:27 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 08:06:27 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 08:06:27 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 08:06:27 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 08:06:27 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 08:06:27 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 08:06:27 [DEBUG] clck_gen.py:128 IND CLOCK 408
2025-03-30 08:06:27 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 08:06:27 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 08:06:27 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 08:06:27 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 08:06:28 [DEBUG] clck_gen.py:128 IND CLOCK 510
2025-03-30 08:06:28 [DEBUG] clck_gen.py:128 IND CLOCK 612
2025-03-30 08:06:28 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 08:06:28 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 08:06:28 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 08:06:28 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 08:06:29 [DEBUG] clck_gen.py:128 IND CLOCK 714
2025-03-30 08:06:29 [DEBUG] clck_gen.py:128 IND CLOCK 816
2025-03-30 08:06:29 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 08:06:29 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 08:06:29 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 08:06:29 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 08:06:30 [DEBUG] clck_gen.py:128 IND CLOCK 918
2025-03-30 08:06:30 [DEBUG] clck_gen.py:128 IND CLOCK 1020
2025-03-30 08:06:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 08:06:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:06:30 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 08:06:30 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 08:06:30 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 08:06:30 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 08:06:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 08:06:30 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 08:06:30 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 08:06:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 08:06:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:06:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 08:06:30 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 08:06:30 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 08:06:30 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 08:06:30 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 08:06:30 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.26.22:6700) Recv SETFH cmd
2025-03-30 08:06:30 [INFO] transceiver.py:237 (MS@172.18.26.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2025-03-30 08:06:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 08:06:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 08:06:30 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 08:06:30 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 08:06:30 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 08:06:30 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 08:06:31 [DEBUG] clck_gen.py:128 IND CLOCK 1122
2025-03-30 08:06:31 [DEBUG] clck_gen.py:128 IND CLOCK 1224
2025-03-30 08:06:32 [DEBUG] clck_gen.py:128 IND CLOCK 1326
2025-03-30 08:06:32 [DEBUG] clck_gen.py:128 IND CLOCK 1428
2025-03-30 08:06:32 [DEBUG] clck_gen.py:128 IND CLOCK 1530
2025-03-30 08:06:33 [DEBUG] clck_gen.py:128 IND CLOCK 1632
2025-03-30 08:06:33 [DEBUG] clck_gen.py:128 IND CLOCK 1734
2025-03-30 08:06:34 [DEBUG] clck_gen.py:128 IND CLOCK 1836
2025-03-30 08:06:34 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 08:06:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:06:34 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 08:06:34 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 08:06:34 [INFO] transceiver.py:241 (MS@172.18.26.22:6700) Frequency hopping disabled
2025-03-30 08:06:34 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 08:06:34 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 08:06:34 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 08:06:34 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 08:06:34 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 08:06:34 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 08:06:34 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 08:06:34 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 08:06:34 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 08:06:34 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 08:06:34 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 08:06:39 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 08:06:39 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 08:06:39 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 08:06:39 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 08:06:39 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 08:06:39 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 08:06:39 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 08:06:39 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 08:06:39 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 08:06:39 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 08:06:39 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 08:06:39 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 08:06:39 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 08:06:39 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 08:06:39 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 08:06:39 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 08:06:39 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 08:06:39 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 08:06:39 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 08:06:39 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 08:06:39 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 08:06:39 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 08:06:39 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 08:06:39 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 08:06:39 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 08:06:39 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 08:06:39 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 08:06:39 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 08:06:39 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 08:06:39 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 08:06:39 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 08:06:39 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 08:06:39 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 08:06:39 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 08:06:39 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 08:06:39 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 08:06:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 08:06:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 08:06:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 08:06:39 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 08:06:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 08:06:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 08:06:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 08:06:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 08:06:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 08:06:39 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 08:06:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 08:06:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 08:06:39 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 08:06:39 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 08:06:39 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 08:06:39 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 08:06:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 08:06:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 08:06:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 08:06:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 08:06:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 08:06:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 08:06:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 08:06:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 08:06:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 08:06:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 08:06:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 08:06:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 08:06:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 08:06:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 08:06:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 08:06:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 08:06:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 08:06:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 08:06:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 08:06:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 08:06:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 08:06:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 08:06:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 08:06:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 08:06:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 08:06:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 08:06:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 08:06:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 08:06:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 08:06:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 08:06:39 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-03-30 08:06:40 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-03-30 08:06:40 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-03-30 08:06:40 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-03-30 08:06:40 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-03-30 08:06:40 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-03-30 08:06:40 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-03-30 08:06:40 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-03-30 08:06:40 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-03-30 08:06:40 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-03-30 08:06:40 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=0 bl=148 pwr=0
2025-03-30 08:06:40 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=1 bl=148 pwr=0
2025-03-30 08:06:40 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=2 bl=148 pwr=0
2025-03-30 08:06:40 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=3 bl=148 pwr=0
2025-03-30 08:06:40 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=4 bl=148 pwr=0
2025-03-30 08:06:40 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=5 bl=148 pwr=0
2025-03-30 08:06:40 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=6 bl=148 pwr=0
2025-03-30 08:06:40 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=7 bl=148 pwr=0
2025-03-30 08:06:40 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 08:06:40 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 08:06:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:06:40 [DEBUG] fake_trx.py:317 (BTS@172.18.26.20:5700) Recv FAKE_CI cmd
2025-03-30 08:06:40 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 08:06:40 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 08:06:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 08:06:40 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 08:06:40 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 08:06:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 08:06:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:06:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 08:06:40 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 08:06:40 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 08:06:40 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 08:06:40 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 08:06:40 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 08:06:40 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 08:06:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 08:06:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 08:06:40 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-03-30 08:06:40 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 08:06:40 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 08:06:40 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 08:06:40 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 08:06:41 [DEBUG] clck_gen.py:128 IND CLOCK 306
2025-03-30 08:06:41 [DEBUG] clck_gen.py:128 IND CLOCK 408
2025-03-30 08:06:41 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 08:06:41 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 08:06:41 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 08:06:41 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 08:06:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 08:06:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:06:41 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 08:06:41 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 08:06:41 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 08:06:41 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 08:06:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 08:06:41 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 08:06:41 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 08:06:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 08:06:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:06:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 08:06:41 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 08:06:41 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 08:06:41 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 08:06:41 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 08:06:42 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.26.22:6700) Recv SETFH cmd
2025-03-30 08:06:42 [INFO] transceiver.py:237 (MS@172.18.26.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2025-03-30 08:06:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 08:06:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 08:06:42 [DEBUG] clck_gen.py:128 IND CLOCK 510
2025-03-30 08:06:42 [DEBUG] clck_gen.py:128 IND CLOCK 612
2025-03-30 08:06:42 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 08:06:42 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 08:06:42 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 08:06:42 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 08:06:43 [DEBUG] clck_gen.py:128 IND CLOCK 714
2025-03-30 08:06:43 [DEBUG] clck_gen.py:128 IND CLOCK 816
2025-03-30 08:06:43 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 08:06:43 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 08:06:43 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 08:06:43 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 08:06:43 [DEBUG] clck_gen.py:128 IND CLOCK 918
2025-03-30 08:06:44 [DEBUG] clck_gen.py:128 IND CLOCK 1020
2025-03-30 08:06:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 08:06:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:06:44 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 08:06:44 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 08:06:44 [INFO] transceiver.py:241 (MS@172.18.26.22:6700) Frequency hopping disabled
2025-03-30 08:06:44 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 08:06:44 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 08:06:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 08:06:44 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 08:06:44 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 08:06:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 08:06:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:06:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 08:06:44 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 08:06:44 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 08:06:44 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 08:06:44 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 08:06:44 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 08:06:44 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 08:06:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 08:06:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 08:06:44 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 08:06:44 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 08:06:44 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 08:06:44 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 08:06:44 [DEBUG] clck_gen.py:128 IND CLOCK 1122
2025-03-30 08:06:45 [DEBUG] clck_gen.py:128 IND CLOCK 1224
2025-03-30 08:06:45 [DEBUG] clck_gen.py:128 IND CLOCK 1326
2025-03-30 08:06:46 [DEBUG] clck_gen.py:128 IND CLOCK 1428
2025-03-30 08:06:46 [DEBUG] clck_gen.py:128 IND CLOCK 1530
2025-03-30 08:06:47 [DEBUG] clck_gen.py:128 IND CLOCK 1632
2025-03-30 08:06:47 [DEBUG] clck_gen.py:128 IND CLOCK 1734
2025-03-30 08:06:48 [DEBUG] clck_gen.py:128 IND CLOCK 1836
2025-03-30 08:06:48 [DEBUG] clck_gen.py:128 IND CLOCK 1938
2025-03-30 08:06:49 [DEBUG] clck_gen.py:128 IND CLOCK 2040
2025-03-30 08:06:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 08:06:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:06:49 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 08:06:49 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 08:06:49 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 08:06:49 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 08:06:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 08:06:49 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 08:06:49 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 08:06:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 08:06:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:06:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 08:06:49 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 08:06:49 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 08:06:49 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 08:06:49 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 08:06:49 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.26.22:6700) Recv SETFH cmd
2025-03-30 08:06:49 [INFO] transceiver.py:237 (MS@172.18.26.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2025-03-30 08:06:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 08:06:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 08:06:49 [DEBUG] clck_gen.py:128 IND CLOCK 2142
2025-03-30 08:06:50 [DEBUG] clck_gen.py:128 IND CLOCK 2244
2025-03-30 08:06:50 [DEBUG] clck_gen.py:128 IND CLOCK 2346
2025-03-30 08:06:51 [DEBUG] clck_gen.py:128 IND CLOCK 2448
2025-03-30 08:06:51 [DEBUG] clck_gen.py:128 IND CLOCK 2550
2025-03-30 08:06:51 [DEBUG] clck_gen.py:128 IND CLOCK 2652
2025-03-30 08:06:52 [DEBUG] clck_gen.py:128 IND CLOCK 2754
2025-03-30 08:06:52 [DEBUG] clck_gen.py:128 IND CLOCK 2856
2025-03-30 08:06:53 [DEBUG] clck_gen.py:128 IND CLOCK 2958
2025-03-30 08:06:53 [DEBUG] clck_gen.py:128 IND CLOCK 3060
2025-03-30 08:06:54 [DEBUG] clck_gen.py:128 IND CLOCK 3162
2025-03-30 08:06:54 [DEBUG] clck_gen.py:128 IND CLOCK 3264
2025-03-30 08:06:55 [DEBUG] clck_gen.py:128 IND CLOCK 3366
2025-03-30 08:06:55 [DEBUG] clck_gen.py:128 IND CLOCK 3468
2025-03-30 08:06:56 [DEBUG] clck_gen.py:128 IND CLOCK 3570
2025-03-30 08:06:56 [DEBUG] clck_gen.py:128 IND CLOCK 3672
2025-03-30 08:06:57 [DEBUG] clck_gen.py:128 IND CLOCK 3774
2025-03-30 08:06:57 [DEBUG] clck_gen.py:128 IND CLOCK 3876
2025-03-30 08:06:58 [DEBUG] clck_gen.py:128 IND CLOCK 3978
2025-03-30 08:06:58 [DEBUG] clck_gen.py:128 IND CLOCK 4080
2025-03-30 08:06:59 [DEBUG] clck_gen.py:128 IND CLOCK 4182
2025-03-30 08:06:59 [DEBUG] clck_gen.py:128 IND CLOCK 4284
2025-03-30 08:06:59 [DEBUG] clck_gen.py:128 IND CLOCK 4386
2025-03-30 08:07:00 [DEBUG] clck_gen.py:128 IND CLOCK 4488
2025-03-30 08:07:00 [DEBUG] clck_gen.py:128 IND CLOCK 4590
2025-03-30 08:07:01 [DEBUG] clck_gen.py:128 IND CLOCK 4692
2025-03-30 08:07:01 [DEBUG] clck_gen.py:128 IND CLOCK 4794
2025-03-30 08:07:02 [DEBUG] clck_gen.py:128 IND CLOCK 4896
2025-03-30 08:07:02 [DEBUG] clck_gen.py:128 IND CLOCK 4998
2025-03-30 08:07:03 [DEBUG] clck_gen.py:128 IND CLOCK 5100
2025-03-30 08:07:03 [DEBUG] clck_gen.py:128 IND CLOCK 5202
2025-03-30 08:07:04 [DEBUG] clck_gen.py:128 IND CLOCK 5304
2025-03-30 08:07:04 [DEBUG] clck_gen.py:128 IND CLOCK 5406
2025-03-30 08:07:05 [DEBUG] clck_gen.py:128 IND CLOCK 5508
2025-03-30 08:07:05 [DEBUG] clck_gen.py:128 IND CLOCK 5610
2025-03-30 08:07:06 [DEBUG] clck_gen.py:128 IND CLOCK 5712
2025-03-30 08:07:06 [DEBUG] clck_gen.py:128 IND CLOCK 5814
2025-03-30 08:07:07 [DEBUG] clck_gen.py:128 IND CLOCK 5916
2025-03-30 08:07:07 [DEBUG] clck_gen.py:128 IND CLOCK 6018
2025-03-30 08:07:07 [DEBUG] clck_gen.py:128 IND CLOCK 6120
2025-03-30 08:07:08 [DEBUG] clck_gen.py:128 IND CLOCK 6222
2025-03-30 08:07:08 [DEBUG] clck_gen.py:128 IND CLOCK 6324
2025-03-30 08:07:09 [DEBUG] clck_gen.py:128 IND CLOCK 6426
2025-03-30 08:07:09 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 08:07:09 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 08:07:09 [INFO] transceiver.py:241 (MS@172.18.26.22:6700) Frequency hopping disabled
2025-03-30 08:07:09 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 08:07:09 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 08:07:09 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 08:07:09 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 08:07:09 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 08:07:09 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 08:07:09 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 08:07:09 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 08:07:09 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 08:07:09 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 08:07:09 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 08:07:14 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 08:07:14 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 08:07:14 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 08:07:14 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 08:07:14 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 08:07:14 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 08:07:14 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 08:07:14 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 08:07:14 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 08:07:14 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 08:07:14 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 08:07:14 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 08:07:14 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 08:07:14 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 08:07:14 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 08:07:14 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 08:07:14 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 08:07:14 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 08:07:14 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 08:07:14 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 08:07:14 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 08:07:14 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 08:07:14 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 08:07:14 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 08:07:14 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 08:07:14 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 08:07:14 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 08:07:14 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 08:07:14 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 08:07:14 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 08:07:14 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 08:07:14 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 08:07:14 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 08:07:14 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 08:07:14 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 08:07:14 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 08:07:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 08:07:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 08:07:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 08:07:14 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 08:07:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 08:07:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 08:07:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 08:07:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 08:07:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 08:07:14 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 08:07:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 08:07:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 08:07:14 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 08:07:14 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 08:07:14 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 08:07:14 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 08:07:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 08:07:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 08:07:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 08:07:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 08:07:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 08:07:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 08:07:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 08:07:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 08:07:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 08:07:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 08:07:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 08:07:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 08:07:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 08:07:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 08:07:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 08:07:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 08:07:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 08:07:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 08:07:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 08:07:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 08:07:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 08:07:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 08:07:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 08:07:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 08:07:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 08:07:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 08:07:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 08:07:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 08:07:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 08:07:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 08:07:14 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-03-30 08:07:14 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-03-30 08:07:14 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-03-30 08:07:14 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-03-30 08:07:14 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-03-30 08:07:14 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-03-30 08:07:14 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-03-30 08:07:14 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-03-30 08:07:14 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-03-30 08:07:14 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-03-30 08:07:14 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=0 bl=148 pwr=0
2025-03-30 08:07:14 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=1 bl=148 pwr=0
2025-03-30 08:07:14 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=2 bl=148 pwr=0
2025-03-30 08:07:14 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=3 bl=148 pwr=0
2025-03-30 08:07:14 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=4 bl=148 pwr=0
2025-03-30 08:07:14 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=5 bl=148 pwr=0
2025-03-30 08:07:14 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=6 bl=148 pwr=0
2025-03-30 08:07:14 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=7 bl=148 pwr=0
2025-03-30 08:07:14 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 08:07:14 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 08:07:14 [DEBUG] fake_trx.py:317 (BTS@172.18.26.20:5700) Recv FAKE_CI cmd
2025-03-30 08:07:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:07:15 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 08:07:15 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 08:07:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 08:07:15 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 08:07:15 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 08:07:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 08:07:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:07:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 08:07:15 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 08:07:15 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 08:07:15 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 08:07:15 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 08:07:15 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 08:07:15 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 08:07:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 08:07:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 08:07:15 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-03-30 08:07:15 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 08:07:15 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 08:07:15 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 08:07:15 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 08:07:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 08:07:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:07:15 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 08:07:15 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 08:07:15 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 08:07:15 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 08:07:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 08:07:15 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 08:07:15 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 08:07:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 08:07:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:07:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 08:07:15 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 08:07:15 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 08:07:15 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 08:07:15 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 08:07:15 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.26.22:6700) Recv SETFH cmd
2025-03-30 08:07:15 [INFO] transceiver.py:237 (MS@172.18.26.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2025-03-30 08:07:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 08:07:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 08:07:15 [DEBUG] clck_gen.py:128 IND CLOCK 306
2025-03-30 08:07:16 [DEBUG] clck_gen.py:128 IND CLOCK 408
2025-03-30 08:07:16 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 08:07:16 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 08:07:16 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 08:07:16 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 08:07:16 [DEBUG] clck_gen.py:128 IND CLOCK 510
2025-03-30 08:07:17 [DEBUG] clck_gen.py:128 IND CLOCK 612
2025-03-30 08:07:17 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 08:07:17 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 08:07:17 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 08:07:17 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 08:07:17 [DEBUG] clck_gen.py:128 IND CLOCK 714
2025-03-30 08:07:18 [DEBUG] clck_gen.py:128 IND CLOCK 816
2025-03-30 08:07:18 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 08:07:18 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 08:07:18 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 08:07:18 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 08:07:18 [DEBUG] clck_gen.py:128 IND CLOCK 918
2025-03-30 08:07:19 [DEBUG] clck_gen.py:128 IND CLOCK 1020
2025-03-30 08:07:19 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 08:07:19 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 08:07:19 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 08:07:19 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 08:07:19 [DEBUG] clck_gen.py:128 IND CLOCK 1122
2025-03-30 08:07:20 [DEBUG] clck_gen.py:128 IND CLOCK 1224
2025-03-30 08:07:20 [DEBUG] clck_gen.py:128 IND CLOCK 1326
2025-03-30 08:07:21 [DEBUG] clck_gen.py:128 IND CLOCK 1428
2025-03-30 08:07:21 [DEBUG] clck_gen.py:128 IND CLOCK 1530
2025-03-30 08:07:21 [DEBUG] clck_gen.py:128 IND CLOCK 1632
2025-03-30 08:07:22 [DEBUG] clck_gen.py:128 IND CLOCK 1734
2025-03-30 08:07:22 [DEBUG] clck_gen.py:128 IND CLOCK 1836
2025-03-30 08:07:23 [DEBUG] clck_gen.py:128 IND CLOCK 1938
2025-03-30 08:07:23 [DEBUG] clck_gen.py:128 IND CLOCK 2040
2025-03-30 08:07:24 [DEBUG] clck_gen.py:128 IND CLOCK 2142
2025-03-30 08:07:24 [DEBUG] clck_gen.py:128 IND CLOCK 2244
2025-03-30 08:07:25 [DEBUG] clck_gen.py:128 IND CLOCK 2346
2025-03-30 08:07:25 [DEBUG] clck_gen.py:128 IND CLOCK 2448
2025-03-30 08:07:26 [DEBUG] clck_gen.py:128 IND CLOCK 2550
2025-03-30 08:07:26 [DEBUG] clck_gen.py:128 IND CLOCK 2652
2025-03-30 08:07:27 [DEBUG] clck_gen.py:128 IND CLOCK 2754
2025-03-30 08:07:27 [DEBUG] clck_gen.py:128 IND CLOCK 2856
2025-03-30 08:07:28 [DEBUG] clck_gen.py:128 IND CLOCK 2958
2025-03-30 08:07:28 [DEBUG] clck_gen.py:128 IND CLOCK 3060
2025-03-30 08:07:29 [DEBUG] clck_gen.py:128 IND CLOCK 3162
2025-03-30 08:07:29 [DEBUG] clck_gen.py:128 IND CLOCK 3264
2025-03-30 08:07:29 [DEBUG] clck_gen.py:128 IND CLOCK 3366
2025-03-30 08:07:30 [DEBUG] clck_gen.py:128 IND CLOCK 3468
2025-03-30 08:07:30 [DEBUG] clck_gen.py:128 IND CLOCK 3570
2025-03-30 08:07:31 [DEBUG] clck_gen.py:128 IND CLOCK 3672
2025-03-30 08:07:31 [DEBUG] clck_gen.py:128 IND CLOCK 3774
2025-03-30 08:07:32 [DEBUG] clck_gen.py:128 IND CLOCK 3876
2025-03-30 08:07:32 [DEBUG] clck_gen.py:128 IND CLOCK 3978
2025-03-30 08:07:33 [DEBUG] clck_gen.py:128 IND CLOCK 4080
2025-03-30 08:07:33 [DEBUG] clck_gen.py:128 IND CLOCK 4182
2025-03-30 08:07:34 [DEBUG] clck_gen.py:128 IND CLOCK 4284
2025-03-30 08:07:34 [DEBUG] clck_gen.py:128 IND CLOCK 4386
2025-03-30 08:07:35 [DEBUG] clck_gen.py:128 IND CLOCK 4488
2025-03-30 08:07:35 [DEBUG] clck_gen.py:128 IND CLOCK 4590
2025-03-30 08:07:35 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 08:07:35 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 08:07:35 [INFO] transceiver.py:241 (MS@172.18.26.22:6700) Frequency hopping disabled
2025-03-30 08:07:35 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 08:07:35 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 08:07:35 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 08:07:35 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 08:07:35 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 08:07:35 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 08:07:35 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 08:07:35 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 08:07:35 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 08:07:35 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 08:07:35 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 08:07:40 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 08:07:40 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 08:07:40 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 08:07:40 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 08:07:40 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 08:07:40 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 08:07:40 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 08:07:40 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 08:07:40 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 08:07:40 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 08:07:40 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 08:07:40 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 08:07:40 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 08:07:40 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 08:07:40 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 08:07:40 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 08:07:40 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 08:07:40 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 08:07:40 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 08:07:40 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 08:07:40 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 08:07:40 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 08:07:40 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 08:07:40 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 08:07:40 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 08:07:40 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 08:07:40 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 08:07:40 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 08:07:40 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 08:07:40 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 08:07:40 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 08:07:40 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 08:07:40 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 08:07:40 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 08:07:40 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 08:07:40 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 08:07:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 08:07:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 08:07:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 08:07:40 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 08:07:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 08:07:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 08:07:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 08:07:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 08:07:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 08:07:40 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 08:07:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 08:07:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 08:07:40 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 08:07:40 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 08:07:40 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 08:07:40 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 08:07:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 08:07:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 08:07:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 08:07:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 08:07:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 08:07:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 08:07:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 08:07:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 08:07:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 08:07:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 08:07:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 08:07:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 08:07:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 08:07:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 08:07:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 08:07:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 08:07:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 08:07:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 08:07:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 08:07:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 08:07:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 08:07:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 08:07:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 08:07:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 08:07:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 08:07:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 08:07:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 08:07:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 08:07:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 08:07:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 08:07:40 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-03-30 08:07:41 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-03-30 08:07:41 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-03-30 08:07:41 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-03-30 08:07:41 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-03-30 08:07:41 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-03-30 08:07:41 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-03-30 08:07:41 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-03-30 08:07:41 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-03-30 08:07:41 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-03-30 08:07:41 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=0 bl=148 pwr=0
2025-03-30 08:07:41 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=1 bl=148 pwr=0
2025-03-30 08:07:41 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=2 bl=148 pwr=0
2025-03-30 08:07:41 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=3 bl=148 pwr=0
2025-03-30 08:07:41 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=4 bl=148 pwr=0
2025-03-30 08:07:41 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=5 bl=148 pwr=0
2025-03-30 08:07:41 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=6 bl=148 pwr=0
2025-03-30 08:07:41 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=7 bl=148 pwr=0
2025-03-30 08:07:41 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 08:07:41 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 08:07:41 [DEBUG] fake_trx.py:317 (BTS@172.18.26.20:5700) Recv FAKE_CI cmd
2025-03-30 08:07:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:07:41 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 08:07:41 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 08:07:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 08:07:41 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 08:07:41 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 08:07:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 08:07:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:07:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 08:07:41 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 08:07:41 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 08:07:41 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 08:07:41 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 08:07:41 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 08:07:41 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 08:07:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 08:07:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 08:07:41 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-03-30 08:07:41 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 08:07:41 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 08:07:41 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 08:07:41 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 08:07:42 [DEBUG] clck_gen.py:128 IND CLOCK 306
2025-03-30 08:07:42 [DEBUG] clck_gen.py:128 IND CLOCK 408
2025-03-30 08:07:42 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 08:07:42 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 08:07:42 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 08:07:42 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 08:07:43 [DEBUG] clck_gen.py:128 IND CLOCK 510
2025-03-30 08:07:43 [DEBUG] clck_gen.py:128 IND CLOCK 612
2025-03-30 08:07:43 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 08:07:43 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 08:07:43 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 08:07:43 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 08:07:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 08:07:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:07:43 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 08:07:43 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 08:07:43 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 08:07:43 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 08:07:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 08:07:43 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 08:07:43 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 08:07:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 08:07:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:07:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 08:07:43 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 08:07:43 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 08:07:43 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 08:07:43 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 08:07:43 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.26.22:6700) Recv SETFH cmd
2025-03-30 08:07:43 [INFO] transceiver.py:237 (MS@172.18.26.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2025-03-30 08:07:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 08:07:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 08:07:44 [DEBUG] clck_gen.py:128 IND CLOCK 714
2025-03-30 08:07:44 [DEBUG] clck_gen.py:128 IND CLOCK 816
2025-03-30 08:07:44 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 08:07:44 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 08:07:44 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 08:07:44 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 08:07:45 [DEBUG] clck_gen.py:128 IND CLOCK 918
2025-03-30 08:07:45 [DEBUG] clck_gen.py:128 IND CLOCK 1020
2025-03-30 08:07:45 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 08:07:45 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 08:07:45 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 08:07:45 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 08:07:46 [DEBUG] clck_gen.py:128 IND CLOCK 1122
2025-03-30 08:07:46 [DEBUG] clck_gen.py:128 IND CLOCK 1224
2025-03-30 08:07:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 08:07:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:07:46 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 08:07:46 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 08:07:46 [INFO] transceiver.py:241 (MS@172.18.26.22:6700) Frequency hopping disabled
2025-03-30 08:07:46 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 08:07:46 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 08:07:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 08:07:46 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 08:07:46 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 08:07:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 08:07:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:07:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 08:07:46 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 08:07:46 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 08:07:46 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 08:07:46 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 08:07:46 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 08:07:46 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 08:07:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 08:07:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 08:07:46 [DEBUG] clck_gen.py:128 IND CLOCK 1326
2025-03-30 08:07:47 [DEBUG] clck_gen.py:128 IND CLOCK 1428
2025-03-30 08:07:47 [DEBUG] clck_gen.py:128 IND CLOCK 1530
2025-03-30 08:07:48 [DEBUG] clck_gen.py:128 IND CLOCK 1632
2025-03-30 08:07:48 [DEBUG] clck_gen.py:128 IND CLOCK 1734
2025-03-30 08:07:49 [DEBUG] clck_gen.py:128 IND CLOCK 1836
2025-03-30 08:07:49 [DEBUG] clck_gen.py:128 IND CLOCK 1938
2025-03-30 08:07:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 08:07:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:07:50 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 08:07:50 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 08:07:50 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 08:07:50 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 08:07:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 08:07:50 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 08:07:50 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 08:07:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 08:07:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:07:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 08:07:50 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 08:07:50 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 08:07:50 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 08:07:50 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 08:07:50 [DEBUG] clck_gen.py:128 IND CLOCK 2040
2025-03-30 08:07:50 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.26.22:6700) Recv SETFH cmd
2025-03-30 08:07:50 [INFO] transceiver.py:237 (MS@172.18.26.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2025-03-30 08:07:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 08:07:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 08:07:50 [DEBUG] clck_gen.py:128 IND CLOCK 2142
2025-03-30 08:07:51 [DEBUG] clck_gen.py:128 IND CLOCK 2244
2025-03-30 08:07:51 [DEBUG] clck_gen.py:128 IND CLOCK 2346
2025-03-30 08:07:52 [DEBUG] clck_gen.py:128 IND CLOCK 2448
2025-03-30 08:07:52 [DEBUG] clck_gen.py:128 IND CLOCK 2550
2025-03-30 08:07:53 [DEBUG] clck_gen.py:128 IND CLOCK 2652
2025-03-30 08:07:53 [DEBUG] clck_gen.py:128 IND CLOCK 2754
2025-03-30 08:07:54 [DEBUG] clck_gen.py:128 IND CLOCK 2856
2025-03-30 08:07:54 [DEBUG] clck_gen.py:128 IND CLOCK 2958
2025-03-30 08:07:54 [DEBUG] clck_gen.py:128 IND CLOCK 3060
2025-03-30 08:07:55 [DEBUG] clck_gen.py:128 IND CLOCK 3162
2025-03-30 08:07:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 08:07:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:07:55 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 08:07:55 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 08:07:55 [INFO] transceiver.py:241 (MS@172.18.26.22:6700) Frequency hopping disabled
2025-03-30 08:07:55 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 08:07:55 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 08:07:55 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 08:07:55 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 08:07:55 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 08:07:55 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 08:07:55 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 08:07:55 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 08:07:55 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 08:07:55 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 08:07:55 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 08:08:00 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 08:08:00 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 08:08:00 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 08:08:00 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 08:08:00 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 08:08:00 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 08:08:00 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 08:08:00 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 08:08:00 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 08:08:00 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 08:08:00 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 08:08:00 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 08:08:00 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 08:08:00 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 08:08:00 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 08:08:00 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 08:08:00 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 08:08:00 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 08:08:00 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 08:08:00 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 08:08:00 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 08:08:00 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 08:08:00 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 08:08:00 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 08:08:00 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 08:08:00 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 08:08:00 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 08:08:00 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 08:08:00 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 08:08:00 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 08:08:00 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 08:08:00 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 08:08:00 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 08:08:00 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 08:08:00 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 08:08:00 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 08:08:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 08:08:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 08:08:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 08:08:00 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 08:08:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 08:08:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 08:08:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 08:08:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 08:08:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 08:08:00 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 08:08:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 08:08:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 08:08:00 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 08:08:00 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 08:08:00 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 08:08:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 08:08:00 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 08:08:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 08:08:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 08:08:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 08:08:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 08:08:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 08:08:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 08:08:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 08:08:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 08:08:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 08:08:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 08:08:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 08:08:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 08:08:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 08:08:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 08:08:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 08:08:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 08:08:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 08:08:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 08:08:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 08:08:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 08:08:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 08:08:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 08:08:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 08:08:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 08:08:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 08:08:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 08:08:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 08:08:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 08:08:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 08:08:00 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-03-30 08:08:01 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-03-30 08:08:01 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-03-30 08:08:01 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-03-30 08:08:01 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-03-30 08:08:01 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-03-30 08:08:01 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-03-30 08:08:01 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-03-30 08:08:01 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-03-30 08:08:01 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-03-30 08:08:01 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=0 bl=148 pwr=0
2025-03-30 08:08:01 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=1 bl=148 pwr=0
2025-03-30 08:08:01 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=2 bl=148 pwr=0
2025-03-30 08:08:01 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=3 bl=148 pwr=0
2025-03-30 08:08:01 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=4 bl=148 pwr=0
2025-03-30 08:08:01 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=5 bl=148 pwr=0
2025-03-30 08:08:01 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=6 bl=148 pwr=0
2025-03-30 08:08:01 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=7 bl=148 pwr=0
2025-03-30 08:08:01 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 08:08:01 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 08:08:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:08:01 [DEBUG] fake_trx.py:317 (BTS@172.18.26.20:5700) Recv FAKE_CI cmd
2025-03-30 08:08:01 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 08:08:01 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 08:08:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 08:08:01 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 08:08:01 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 08:08:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 08:08:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:08:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 08:08:01 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 08:08:01 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 08:08:01 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 08:08:01 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 08:08:01 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 08:08:01 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 08:08:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 08:08:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 08:08:01 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-03-30 08:08:01 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 08:08:01 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 08:08:01 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 08:08:01 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 08:08:01 [DEBUG] clck_gen.py:128 IND CLOCK 306
2025-03-30 08:08:02 [DEBUG] clck_gen.py:128 IND CLOCK 408
2025-03-30 08:08:02 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 08:08:02 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 08:08:02 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 08:08:02 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 08:08:02 [DEBUG] clck_gen.py:128 IND CLOCK 510
2025-03-30 08:08:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:08:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 08:08:03 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 08:08:03 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 08:08:03 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 08:08:03 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 08:08:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 08:08:03 [DEBUG] clck_gen.py:128 IND CLOCK 612
2025-03-30 08:08:03 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 08:08:03 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 08:08:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 08:08:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:08:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 08:08:03 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 08:08:03 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 08:08:03 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 08:08:03 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 08:08:03 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.26.22:6700) Recv SETFH cmd
2025-03-30 08:08:03 [INFO] transceiver.py:237 (MS@172.18.26.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2025-03-30 08:08:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 08:08:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 08:08:03 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 08:08:03 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 08:08:03 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 08:08:03 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 08:08:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 08:08:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:08:03 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 08:08:03 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 08:08:03 [INFO] transceiver.py:241 (MS@172.18.26.22:6700) Frequency hopping disabled
2025-03-30 08:08:03 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 08:08:03 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 08:08:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 08:08:03 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 08:08:03 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 08:08:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 08:08:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:08:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 08:08:03 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 08:08:03 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 08:08:03 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 08:08:03 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 08:08:03 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 08:08:03 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 08:08:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 08:08:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 08:08:03 [DEBUG] clck_gen.py:128 IND CLOCK 714
2025-03-30 08:08:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 08:08:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:08:04 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 08:08:04 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 08:08:04 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 08:08:04 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 08:08:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 08:08:04 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 08:08:04 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 08:08:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 08:08:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:08:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 08:08:04 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 08:08:04 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 08:08:04 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 08:08:04 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 08:08:04 [DEBUG] clck_gen.py:128 IND CLOCK 816
2025-03-30 08:08:04 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.26.22:6700) Recv SETFH cmd
2025-03-30 08:08:04 [INFO] transceiver.py:237 (MS@172.18.26.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2025-03-30 08:08:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 08:08:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 08:08:04 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 08:08:04 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 08:08:04 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 08:08:04 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 08:08:04 [DEBUG] clck_gen.py:128 IND CLOCK 918
2025-03-30 08:08:05 [DEBUG] clck_gen.py:128 IND CLOCK 1020
2025-03-30 08:08:05 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 08:08:05 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 08:08:05 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 08:08:05 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 08:08:05 [DEBUG] clck_gen.py:128 IND CLOCK 1122
2025-03-30 08:08:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 08:08:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:08:05 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 08:08:05 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 08:08:05 [INFO] transceiver.py:241 (MS@172.18.26.22:6700) Frequency hopping disabled
2025-03-30 08:08:05 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 08:08:05 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 08:08:05 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 08:08:05 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 08:08:05 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 08:08:05 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 08:08:05 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 08:08:05 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 08:08:05 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 08:08:05 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 08:08:05 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 08:08:05 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=1148 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 08:08:05 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=1148 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 08:08:05 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=1148 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 08:08:05 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=1148 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 08:08:05 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=1148 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 08:08:05 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=1148 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 08:08:05 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=1148 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 08:08:05 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=1148 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 08:08:10 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 08:08:10 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 08:08:10 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 08:08:10 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 08:08:10 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 08:08:10 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 08:08:10 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 08:08:10 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 08:08:10 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 08:08:10 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 08:08:10 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 08:08:10 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 08:08:10 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 08:08:10 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 08:08:10 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 08:08:10 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 08:08:10 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 08:08:10 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 08:08:10 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 08:08:10 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 08:08:10 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 08:08:10 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 08:08:10 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 08:08:10 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 08:08:10 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 08:08:10 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 08:08:10 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 08:08:10 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 08:08:10 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 08:08:10 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 08:08:10 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 08:08:10 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 08:08:10 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 08:08:10 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 08:08:10 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 08:08:10 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 08:08:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 08:08:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 08:08:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 08:08:10 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 08:08:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 08:08:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 08:08:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 08:08:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 08:08:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 08:08:10 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 08:08:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 08:08:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 08:08:10 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 08:08:10 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 08:08:10 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 08:08:10 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 08:08:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 08:08:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 08:08:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 08:08:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 08:08:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 08:08:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 08:08:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 08:08:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 08:08:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 08:08:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 08:08:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 08:08:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 08:08:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 08:08:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 08:08:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 08:08:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 08:08:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 08:08:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 08:08:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 08:08:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 08:08:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 08:08:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 08:08:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 08:08:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 08:08:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 08:08:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 08:08:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 08:08:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 08:08:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 08:08:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 08:08:10 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-03-30 08:08:11 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-03-30 08:08:11 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-03-30 08:08:11 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-03-30 08:08:11 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-03-30 08:08:11 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-03-30 08:08:11 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-03-30 08:08:11 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-03-30 08:08:11 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-03-30 08:08:11 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-03-30 08:08:11 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=0 bl=148 pwr=0
2025-03-30 08:08:11 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=1 bl=148 pwr=0
2025-03-30 08:08:11 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=2 bl=148 pwr=0
2025-03-30 08:08:11 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=3 bl=148 pwr=0
2025-03-30 08:08:11 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=4 bl=148 pwr=0
2025-03-30 08:08:11 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=5 bl=148 pwr=0
2025-03-30 08:08:11 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=6 bl=148 pwr=0
2025-03-30 08:08:11 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=7 bl=148 pwr=0
2025-03-30 08:08:11 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 08:08:11 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 08:08:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:08:11 [DEBUG] fake_trx.py:317 (BTS@172.18.26.20:5700) Recv FAKE_CI cmd
2025-03-30 08:08:11 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 08:08:11 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 08:08:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 08:08:11 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 08:08:11 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 08:08:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 08:08:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:08:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 08:08:11 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 08:08:11 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 08:08:11 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 08:08:11 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 08:08:11 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 08:08:11 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 08:08:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 08:08:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 08:08:11 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-03-30 08:08:11 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 08:08:11 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 08:08:11 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 08:08:11 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 08:08:12 [DEBUG] clck_gen.py:128 IND CLOCK 306
2025-03-30 08:08:12 [DEBUG] clck_gen.py:128 IND CLOCK 408
2025-03-30 08:08:12 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 08:08:12 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 08:08:12 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 08:08:12 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 08:08:13 [DEBUG] clck_gen.py:128 IND CLOCK 510
2025-03-30 08:08:13 [DEBUG] clck_gen.py:128 IND CLOCK 612
2025-03-30 08:08:13 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 08:08:13 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 08:08:13 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 08:08:13 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 08:08:14 [DEBUG] clck_gen.py:128 IND CLOCK 714
2025-03-30 08:08:14 [DEBUG] clck_gen.py:128 IND CLOCK 816
2025-03-30 08:08:14 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 08:08:14 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 08:08:14 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 08:08:14 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 08:08:15 [DEBUG] clck_gen.py:128 IND CLOCK 918
2025-03-30 08:08:15 [DEBUG] clck_gen.py:128 IND CLOCK 1020
2025-03-30 08:08:15 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 08:08:15 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 08:08:15 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 08:08:15 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 08:08:16 [DEBUG] clck_gen.py:128 IND CLOCK 1122
2025-03-30 08:08:16 [DEBUG] clck_gen.py:128 IND CLOCK 1224
2025-03-30 08:08:17 [DEBUG] clck_gen.py:128 IND CLOCK 1326
2025-03-30 08:08:17 [DEBUG] clck_gen.py:128 IND CLOCK 1428
2025-03-30 08:08:17 [DEBUG] clck_gen.py:128 IND CLOCK 1530
2025-03-30 08:08:18 [DEBUG] clck_gen.py:128 IND CLOCK 1632
2025-03-30 08:08:18 [DEBUG] clck_gen.py:128 IND CLOCK 1734
2025-03-30 08:08:19 [DEBUG] clck_gen.py:128 IND CLOCK 1836
2025-03-30 08:08:19 [DEBUG] clck_gen.py:128 IND CLOCK 1938
2025-03-30 08:08:20 [DEBUG] clck_gen.py:128 IND CLOCK 2040
2025-03-30 08:08:20 [DEBUG] clck_gen.py:128 IND CLOCK 2142
2025-03-30 08:08:21 [DEBUG] clck_gen.py:128 IND CLOCK 2244
2025-03-30 08:08:21 [DEBUG] clck_gen.py:128 IND CLOCK 2346
2025-03-30 08:08:22 [DEBUG] clck_gen.py:128 IND CLOCK 2448
2025-03-30 08:08:22 [DEBUG] clck_gen.py:128 IND CLOCK 2550
2025-03-30 08:08:23 [DEBUG] clck_gen.py:128 IND CLOCK 2652
2025-03-30 08:08:23 [DEBUG] clck_gen.py:128 IND CLOCK 2754
2025-03-30 08:08:24 [DEBUG] clck_gen.py:128 IND CLOCK 2856
2025-03-30 08:08:24 [DEBUG] clck_gen.py:128 IND CLOCK 2958
2025-03-30 08:08:25 [DEBUG] clck_gen.py:128 IND CLOCK 3060
2025-03-30 08:08:25 [DEBUG] clck_gen.py:128 IND CLOCK 3162
2025-03-30 08:08:25 [DEBUG] clck_gen.py:128 IND CLOCK 3264
2025-03-30 08:08:26 [DEBUG] clck_gen.py:128 IND CLOCK 3366
2025-03-30 08:08:26 [DEBUG] clck_gen.py:128 IND CLOCK 3468
2025-03-30 08:08:27 [DEBUG] clck_gen.py:128 IND CLOCK 3570
2025-03-30 08:08:27 [DEBUG] clck_gen.py:128 IND CLOCK 3672
2025-03-30 08:08:28 [DEBUG] clck_gen.py:128 IND CLOCK 3774
2025-03-30 08:08:28 [DEBUG] clck_gen.py:128 IND CLOCK 3876
2025-03-30 08:08:29 [DEBUG] clck_gen.py:128 IND CLOCK 3978
2025-03-30 08:08:29 [DEBUG] clck_gen.py:128 IND CLOCK 4080
2025-03-30 08:08:30 [DEBUG] clck_gen.py:128 IND CLOCK 4182
2025-03-30 08:08:30 [DEBUG] clck_gen.py:128 IND CLOCK 4284
2025-03-30 08:08:31 [DEBUG] clck_gen.py:128 IND CLOCK 4386
2025-03-30 08:08:31 [DEBUG] clck_gen.py:128 IND CLOCK 4488
2025-03-30 08:08:32 [DEBUG] clck_gen.py:128 IND CLOCK 4590
2025-03-30 08:08:32 [DEBUG] clck_gen.py:128 IND CLOCK 4692
2025-03-30 08:08:33 [DEBUG] clck_gen.py:128 IND CLOCK 4794
2025-03-30 08:08:33 [DEBUG] clck_gen.py:128 IND CLOCK 4896
2025-03-30 08:08:33 [DEBUG] clck_gen.py:128 IND CLOCK 4998
2025-03-30 08:08:34 [DEBUG] clck_gen.py:128 IND CLOCK 5100
2025-03-30 08:08:34 [DEBUG] clck_gen.py:128 IND CLOCK 5202
2025-03-30 08:08:35 [DEBUG] clck_gen.py:128 IND CLOCK 5304
2025-03-30 08:08:35 [DEBUG] clck_gen.py:128 IND CLOCK 5406
2025-03-30 08:08:36 [DEBUG] clck_gen.py:128 IND CLOCK 5508
2025-03-30 08:08:36 [DEBUG] clck_gen.py:128 IND CLOCK 5610
2025-03-30 08:08:37 [DEBUG] clck_gen.py:128 IND CLOCK 5712
2025-03-30 08:08:37 [DEBUG] clck_gen.py:128 IND CLOCK 5814
2025-03-30 08:08:38 [DEBUG] clck_gen.py:128 IND CLOCK 5916
2025-03-30 08:08:38 [DEBUG] clck_gen.py:128 IND CLOCK 6018
2025-03-30 08:08:39 [DEBUG] clck_gen.py:128 IND CLOCK 6120
2025-03-30 08:08:39 [DEBUG] clck_gen.py:128 IND CLOCK 6222
2025-03-30 08:08:40 [DEBUG] clck_gen.py:128 IND CLOCK 6324
2025-03-30 08:08:40 [DEBUG] clck_gen.py:128 IND CLOCK 6426
2025-03-30 08:08:41 [DEBUG] clck_gen.py:128 IND CLOCK 6528
2025-03-30 08:08:41 [DEBUG] clck_gen.py:128 IND CLOCK 6630
2025-03-30 08:08:41 [DEBUG] clck_gen.py:128 IND CLOCK 6732
2025-03-30 08:08:42 [DEBUG] clck_gen.py:128 IND CLOCK 6834
2025-03-30 08:08:42 [DEBUG] clck_gen.py:128 IND CLOCK 6936
2025-03-30 08:08:43 [DEBUG] clck_gen.py:128 IND CLOCK 7038
2025-03-30 08:08:43 [DEBUG] clck_gen.py:128 IND CLOCK 7140
2025-03-30 08:08:44 [DEBUG] clck_gen.py:128 IND CLOCK 7242
2025-03-30 08:08:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 08:08:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:08:44 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 08:08:44 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 08:08:44 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 08:08:44 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 08:08:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 08:08:44 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 08:08:44 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 08:08:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 08:08:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:08:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 08:08:44 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 08:08:44 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 08:08:44 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 08:08:44 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 08:08:44 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.26.22:6700) Recv SETFH cmd
2025-03-30 08:08:44 [INFO] transceiver.py:237 (MS@172.18.26.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2025-03-30 08:08:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 08:08:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 08:08:44 [DEBUG] clck_gen.py:128 IND CLOCK 7344
2025-03-30 08:08:45 [DEBUG] clck_gen.py:128 IND CLOCK 7446
2025-03-30 08:08:45 [DEBUG] clck_gen.py:128 IND CLOCK 7548
2025-03-30 08:08:46 [DEBUG] clck_gen.py:128 IND CLOCK 7650
2025-03-30 08:08:46 [DEBUG] clck_gen.py:128 IND CLOCK 7752
2025-03-30 08:08:47 [DEBUG] clck_gen.py:128 IND CLOCK 7854
2025-03-30 08:08:47 [DEBUG] clck_gen.py:128 IND CLOCK 7956
2025-03-30 08:08:48 [DEBUG] clck_gen.py:128 IND CLOCK 8058
2025-03-30 08:08:48 [DEBUG] clck_gen.py:128 IND CLOCK 8160
2025-03-30 08:08:49 [DEBUG] clck_gen.py:128 IND CLOCK 8262
2025-03-30 08:08:49 [DEBUG] clck_gen.py:128 IND CLOCK 8364
2025-03-30 08:08:49 [DEBUG] clck_gen.py:128 IND CLOCK 8466
2025-03-30 08:08:50 [DEBUG] clck_gen.py:128 IND CLOCK 8568
2025-03-30 08:08:50 [DEBUG] clck_gen.py:128 IND CLOCK 8670
2025-03-30 08:08:51 [DEBUG] clck_gen.py:128 IND CLOCK 8772
2025-03-30 08:08:51 [DEBUG] clck_gen.py:128 IND CLOCK 8874
2025-03-30 08:08:52 [DEBUG] clck_gen.py:128 IND CLOCK 8976
2025-03-30 08:08:52 [DEBUG] clck_gen.py:128 IND CLOCK 9078
2025-03-30 08:08:53 [DEBUG] clck_gen.py:128 IND CLOCK 9180
2025-03-30 08:08:53 [DEBUG] clck_gen.py:128 IND CLOCK 9282
2025-03-30 08:08:54 [DEBUG] clck_gen.py:128 IND CLOCK 9384
2025-03-30 08:08:54 [DEBUG] clck_gen.py:128 IND CLOCK 9486
2025-03-30 08:08:55 [DEBUG] clck_gen.py:128 IND CLOCK 9588
2025-03-30 08:08:55 [DEBUG] clck_gen.py:128 IND CLOCK 9690
2025-03-30 08:08:56 [DEBUG] clck_gen.py:128 IND CLOCK 9792
2025-03-30 08:08:56 [DEBUG] clck_gen.py:128 IND CLOCK 9894
2025-03-30 08:08:57 [DEBUG] clck_gen.py:128 IND CLOCK 9996
2025-03-30 08:08:57 [DEBUG] clck_gen.py:128 IND CLOCK 10098
2025-03-30 08:08:57 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 08:08:57 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 08:08:57 [INFO] transceiver.py:241 (MS@172.18.26.22:6700) Frequency hopping disabled
2025-03-30 08:08:57 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 08:08:57 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 08:08:57 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 08:08:57 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 08:08:57 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 08:08:57 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 08:08:57 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 08:08:57 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 08:08:57 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 08:08:57 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 08:08:57 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 08:09:02 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 08:09:02 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 08:09:02 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 08:09:02 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 08:09:02 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 08:09:02 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 08:09:02 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 08:09:02 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 08:09:02 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 08:09:02 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 08:09:02 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 08:09:02 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 08:09:02 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 08:09:02 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 08:09:02 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 08:09:02 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 08:09:02 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 08:09:02 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 08:09:02 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 08:09:02 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 08:09:02 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 08:09:02 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 08:09:02 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 08:09:02 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 08:09:02 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 08:09:02 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 08:09:02 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 08:09:02 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 08:09:02 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 08:09:02 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 08:09:02 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 08:09:02 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 08:09:02 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 08:09:02 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 08:09:02 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 08:09:02 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 08:09:02 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 08:09:02 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 08:09:02 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 08:09:02 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 08:09:02 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 08:09:02 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 08:09:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 08:09:02 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 08:09:02 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 08:09:02 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 08:09:02 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 08:09:02 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 08:09:02 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 08:09:02 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 08:09:02 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 08:09:02 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 08:09:02 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 08:09:02 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 08:09:02 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 08:09:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 08:09:02 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 08:09:02 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 08:09:02 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 08:09:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 08:09:02 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 08:09:02 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 08:09:02 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 08:09:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 08:09:02 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 08:09:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 08:09:02 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 08:09:02 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 08:09:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 08:09:02 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 08:09:02 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 08:09:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 08:09:02 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 08:09:02 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 08:09:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 08:09:02 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 08:09:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 08:09:02 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 08:09:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 08:09:02 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 08:09:02 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 08:09:02 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 08:09:02 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-03-30 08:09:03 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-03-30 08:09:03 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-03-30 08:09:03 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-03-30 08:09:03 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-03-30 08:09:03 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-03-30 08:09:03 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-03-30 08:09:03 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-03-30 08:09:03 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-03-30 08:09:03 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-03-30 08:09:03 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=0 bl=148 pwr=0
2025-03-30 08:09:03 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=1 bl=148 pwr=0
2025-03-30 08:09:03 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=2 bl=148 pwr=0
2025-03-30 08:09:03 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=3 bl=148 pwr=0
2025-03-30 08:09:03 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=4 bl=148 pwr=0
2025-03-30 08:09:03 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=5 bl=148 pwr=0
2025-03-30 08:09:03 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=6 bl=148 pwr=0
2025-03-30 08:09:03 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=7 bl=148 pwr=0
2025-03-30 08:09:03 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 08:09:03 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 08:09:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:09:03 [DEBUG] fake_trx.py:317 (BTS@172.18.26.20:5700) Recv FAKE_CI cmd
2025-03-30 08:09:03 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 08:09:03 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 08:09:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 08:09:03 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 08:09:03 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 08:09:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 08:09:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:09:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 08:09:03 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 08:09:03 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 08:09:03 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 08:09:03 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 08:09:03 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 08:09:03 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 08:09:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 08:09:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 08:09:03 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-03-30 08:09:03 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 08:09:03 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 08:09:03 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 08:09:03 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 08:09:04 [DEBUG] clck_gen.py:128 IND CLOCK 306
2025-03-30 08:09:04 [DEBUG] clck_gen.py:128 IND CLOCK 408
2025-03-30 08:09:04 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 08:09:04 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 08:09:04 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 08:09:04 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 08:09:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 08:09:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:09:05 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 08:09:05 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 08:09:05 [DEBUG] clck_gen.py:128 IND CLOCK 510
2025-03-30 08:09:05 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 08:09:05 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 08:09:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 08:09:05 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 08:09:05 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 08:09:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 08:09:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:09:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 08:09:05 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 08:09:05 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 08:09:05 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 08:09:05 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 08:09:05 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.26.22:6700) Recv SETFH cmd
2025-03-30 08:09:05 [INFO] transceiver.py:237 (MS@172.18.26.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2025-03-30 08:09:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 08:09:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 08:09:05 [DEBUG] clck_gen.py:128 IND CLOCK 612
2025-03-30 08:09:05 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 08:09:05 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 08:09:05 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 08:09:05 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 08:09:05 [DEBUG] clck_gen.py:128 IND CLOCK 714
2025-03-30 08:09:06 [DEBUG] clck_gen.py:128 IND CLOCK 816
2025-03-30 08:09:06 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 08:09:06 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 08:09:06 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 08:09:06 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 08:09:06 [DEBUG] clck_gen.py:128 IND CLOCK 918
2025-03-30 08:09:07 [DEBUG] clck_gen.py:128 IND CLOCK 1020
2025-03-30 08:09:07 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 08:09:07 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 08:09:07 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 08:09:07 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 08:09:07 [DEBUG] clck_gen.py:128 IND CLOCK 1122
2025-03-30 08:09:08 [DEBUG] clck_gen.py:128 IND CLOCK 1224
2025-03-30 08:09:08 [DEBUG] clck_gen.py:128 IND CLOCK 1326
2025-03-30 08:09:09 [DEBUG] clck_gen.py:128 IND CLOCK 1428
2025-03-30 08:09:09 [DEBUG] clck_gen.py:128 IND CLOCK 1530
2025-03-30 08:09:10 [DEBUG] clck_gen.py:128 IND CLOCK 1632
2025-03-30 08:09:10 [DEBUG] clck_gen.py:128 IND CLOCK 1734
2025-03-30 08:09:11 [DEBUG] clck_gen.py:128 IND CLOCK 1836
2025-03-30 08:09:11 [DEBUG] clck_gen.py:128 IND CLOCK 1938
2025-03-30 08:09:12 [DEBUG] clck_gen.py:128 IND CLOCK 2040
2025-03-30 08:09:12 [DEBUG] clck_gen.py:128 IND CLOCK 2142
2025-03-30 08:09:13 [DEBUG] clck_gen.py:128 IND CLOCK 2244
2025-03-30 08:09:13 [DEBUG] clck_gen.py:128 IND CLOCK 2346
2025-03-30 08:09:13 [DEBUG] clck_gen.py:128 IND CLOCK 2448
2025-03-30 08:09:14 [DEBUG] clck_gen.py:128 IND CLOCK 2550
2025-03-30 08:09:14 [DEBUG] clck_gen.py:128 IND CLOCK 2652
2025-03-30 08:09:15 [DEBUG] clck_gen.py:128 IND CLOCK 2754
2025-03-30 08:09:15 [DEBUG] clck_gen.py:128 IND CLOCK 2856
2025-03-30 08:09:16 [DEBUG] clck_gen.py:128 IND CLOCK 2958
2025-03-30 08:09:16 [DEBUG] clck_gen.py:128 IND CLOCK 3060
2025-03-30 08:09:17 [DEBUG] clck_gen.py:128 IND CLOCK 3162
2025-03-30 08:09:17 [DEBUG] clck_gen.py:128 IND CLOCK 3264
2025-03-30 08:09:18 [DEBUG] clck_gen.py:128 IND CLOCK 3366
2025-03-30 08:09:18 [DEBUG] clck_gen.py:128 IND CLOCK 3468
2025-03-30 08:09:19 [DEBUG] clck_gen.py:128 IND CLOCK 3570
2025-03-30 08:09:19 [DEBUG] clck_gen.py:128 IND CLOCK 3672
2025-03-30 08:09:20 [DEBUG] clck_gen.py:128 IND CLOCK 3774
2025-03-30 08:09:20 [DEBUG] clck_gen.py:128 IND CLOCK 3876
2025-03-30 08:09:21 [DEBUG] clck_gen.py:128 IND CLOCK 3978
2025-03-30 08:09:21 [DEBUG] clck_gen.py:128 IND CLOCK 4080
2025-03-30 08:09:21 [DEBUG] clck_gen.py:128 IND CLOCK 4182
2025-03-30 08:09:22 [DEBUG] clck_gen.py:128 IND CLOCK 4284
2025-03-30 08:09:22 [DEBUG] clck_gen.py:128 IND CLOCK 4386
2025-03-30 08:09:23 [DEBUG] clck_gen.py:128 IND CLOCK 4488
2025-03-30 08:09:23 [DEBUG] clck_gen.py:128 IND CLOCK 4590
2025-03-30 08:09:24 [DEBUG] clck_gen.py:128 IND CLOCK 4692
2025-03-30 08:09:24 [DEBUG] clck_gen.py:128 IND CLOCK 4794
2025-03-30 08:09:25 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 08:09:25 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 08:09:25 [INFO] transceiver.py:241 (MS@172.18.26.22:6700) Frequency hopping disabled
2025-03-30 08:09:25 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 08:09:25 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 08:09:25 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 08:09:25 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 08:09:25 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 08:09:25 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 08:09:25 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 08:09:25 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 08:09:25 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 08:09:25 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 08:09:25 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 08:09:30 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 08:09:30 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 08:09:30 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 08:09:30 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 08:09:30 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 08:09:30 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 08:09:30 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 08:09:30 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 08:09:30 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 08:09:30 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 08:09:30 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 08:09:30 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 08:09:30 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 08:09:30 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 08:09:30 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 08:09:30 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 08:09:30 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 08:09:30 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 08:09:30 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 08:09:30 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 08:09:30 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 08:09:30 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 08:09:30 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 08:09:30 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 08:09:30 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 08:09:30 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 08:09:30 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 08:09:30 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 08:09:30 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 08:09:30 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 08:09:30 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 08:09:30 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 08:09:30 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 08:09:30 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 08:09:30 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 08:09:30 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 08:09:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 08:09:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 08:09:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 08:09:30 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 08:09:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 08:09:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 08:09:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 08:09:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 08:09:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 08:09:30 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 08:09:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 08:09:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 08:09:30 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 08:09:30 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 08:09:30 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 08:09:30 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 08:09:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 08:09:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 08:09:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 08:09:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 08:09:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 08:09:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 08:09:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 08:09:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 08:09:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 08:09:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 08:09:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 08:09:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 08:09:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 08:09:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 08:09:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 08:09:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 08:09:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 08:09:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 08:09:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 08:09:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 08:09:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 08:09:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 08:09:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 08:09:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 08:09:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 08:09:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 08:09:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 08:09:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 08:09:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 08:09:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 08:09:30 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-03-30 08:09:30 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-03-30 08:09:30 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-03-30 08:09:30 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-03-30 08:09:30 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-03-30 08:09:30 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-03-30 08:09:30 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-03-30 08:09:30 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-03-30 08:09:30 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-03-30 08:09:30 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-03-30 08:09:30 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=0 bl=148 pwr=0
2025-03-30 08:09:30 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=1 bl=148 pwr=0
2025-03-30 08:09:30 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=2 bl=148 pwr=0
2025-03-30 08:09:30 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=3 bl=148 pwr=0
2025-03-30 08:09:30 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=4 bl=148 pwr=0
2025-03-30 08:09:30 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=5 bl=148 pwr=0
2025-03-30 08:09:30 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=6 bl=148 pwr=0
2025-03-30 08:09:30 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=7 bl=148 pwr=0
2025-03-30 08:09:30 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 08:09:30 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 08:09:30 [DEBUG] fake_trx.py:317 (BTS@172.18.26.20:5700) Recv FAKE_CI cmd
2025-03-30 08:09:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:09:30 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 08:09:30 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 08:09:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 08:09:30 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 08:09:30 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 08:09:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 08:09:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:09:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 08:09:30 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 08:09:30 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 08:09:30 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 08:09:30 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 08:09:30 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 08:09:30 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 08:09:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 08:09:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 08:09:31 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-03-30 08:09:31 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 08:09:31 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 08:09:31 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 08:09:31 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 08:09:31 [DEBUG] clck_gen.py:128 IND CLOCK 306
2025-03-30 08:09:31 [DEBUG] clck_gen.py:128 IND CLOCK 408
2025-03-30 08:09:32 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 08:09:32 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 08:09:32 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 08:09:32 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 08:09:32 [DEBUG] clck_gen.py:128 IND CLOCK 510
2025-03-30 08:09:32 [DEBUG] clck_gen.py:128 IND CLOCK 612
2025-03-30 08:09:33 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 08:09:33 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 08:09:33 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 08:09:33 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 08:09:33 [DEBUG] clck_gen.py:128 IND CLOCK 714
2025-03-30 08:09:33 [DEBUG] clck_gen.py:128 IND CLOCK 816
2025-03-30 08:09:34 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 08:09:34 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 08:09:34 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 08:09:34 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 08:09:34 [DEBUG] clck_gen.py:128 IND CLOCK 918
2025-03-30 08:09:34 [DEBUG] clck_gen.py:128 IND CLOCK 1020
2025-03-30 08:09:35 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 08:09:35 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 08:09:35 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 08:09:35 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 08:09:35 [DEBUG] clck_gen.py:128 IND CLOCK 1122
2025-03-30 08:09:35 [DEBUG] clck_gen.py:128 IND CLOCK 1224
2025-03-30 08:09:36 [DEBUG] clck_gen.py:128 IND CLOCK 1326
2025-03-30 08:09:36 [DEBUG] clck_gen.py:128 IND CLOCK 1428
2025-03-30 08:09:37 [DEBUG] clck_gen.py:128 IND CLOCK 1530
2025-03-30 08:09:37 [DEBUG] clck_gen.py:128 IND CLOCK 1632
2025-03-30 08:09:38 [DEBUG] clck_gen.py:128 IND CLOCK 1734
2025-03-30 08:09:38 [DEBUG] clck_gen.py:128 IND CLOCK 1836
2025-03-30 08:09:39 [DEBUG] clck_gen.py:128 IND CLOCK 1938
2025-03-30 08:09:39 [DEBUG] clck_gen.py:128 IND CLOCK 2040
2025-03-30 08:09:39 [DEBUG] clck_gen.py:128 IND CLOCK 2142
2025-03-30 08:09:40 [DEBUG] clck_gen.py:128 IND CLOCK 2244
2025-03-30 08:09:40 [DEBUG] clck_gen.py:128 IND CLOCK 2346
2025-03-30 08:09:41 [DEBUG] clck_gen.py:128 IND CLOCK 2448
2025-03-30 08:09:41 [DEBUG] clck_gen.py:128 IND CLOCK 2550
2025-03-30 08:09:42 [DEBUG] clck_gen.py:128 IND CLOCK 2652
2025-03-30 08:09:42 [DEBUG] clck_gen.py:128 IND CLOCK 2754
2025-03-30 08:09:43 [DEBUG] clck_gen.py:128 IND CLOCK 2856
2025-03-30 08:09:43 [DEBUG] clck_gen.py:128 IND CLOCK 2958
2025-03-30 08:09:44 [DEBUG] clck_gen.py:128 IND CLOCK 3060
2025-03-30 08:09:44 [DEBUG] clck_gen.py:128 IND CLOCK 3162
2025-03-30 08:09:45 [DEBUG] clck_gen.py:128 IND CLOCK 3264
2025-03-30 08:09:45 [DEBUG] clck_gen.py:128 IND CLOCK 3366
2025-03-30 08:09:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 08:09:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:09:45 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 08:09:45 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 08:09:45 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 08:09:45 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 08:09:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 08:09:45 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 08:09:45 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 08:09:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 08:09:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:09:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 08:09:45 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 08:09:45 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 08:09:45 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 08:09:45 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 08:09:45 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.26.22:6700) Recv SETFH cmd
2025-03-30 08:09:45 [INFO] transceiver.py:237 (MS@172.18.26.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2025-03-30 08:09:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 08:09:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 08:09:46 [DEBUG] clck_gen.py:128 IND CLOCK 3468
2025-03-30 08:09:46 [DEBUG] clck_gen.py:128 IND CLOCK 3570
2025-03-30 08:09:47 [DEBUG] clck_gen.py:128 IND CLOCK 3672
2025-03-30 08:09:47 [DEBUG] clck_gen.py:128 IND CLOCK 3774
2025-03-30 08:09:47 [DEBUG] clck_gen.py:128 IND CLOCK 3876
2025-03-30 08:09:48 [DEBUG] clck_gen.py:128 IND CLOCK 3978
2025-03-30 08:09:48 [DEBUG] clck_gen.py:128 IND CLOCK 4080
2025-03-30 08:09:49 [DEBUG] clck_gen.py:128 IND CLOCK 4182
2025-03-30 08:09:49 [DEBUG] clck_gen.py:128 IND CLOCK 4284
2025-03-30 08:09:50 [DEBUG] clck_gen.py:128 IND CLOCK 4386
2025-03-30 08:09:50 [DEBUG] clck_gen.py:128 IND CLOCK 4488
2025-03-30 08:09:51 [DEBUG] clck_gen.py:128 IND CLOCK 4590
2025-03-30 08:09:51 [DEBUG] clck_gen.py:128 IND CLOCK 4692
2025-03-30 08:09:52 [DEBUG] clck_gen.py:128 IND CLOCK 4794
2025-03-30 08:09:52 [DEBUG] clck_gen.py:128 IND CLOCK 4896
2025-03-30 08:09:53 [DEBUG] clck_gen.py:128 IND CLOCK 4998
2025-03-30 08:09:53 [DEBUG] clck_gen.py:128 IND CLOCK 5100
2025-03-30 08:09:54 [DEBUG] clck_gen.py:128 IND CLOCK 5202
2025-03-30 08:09:54 [DEBUG] clck_gen.py:128 IND CLOCK 5304
2025-03-30 08:09:55 [DEBUG] clck_gen.py:128 IND CLOCK 5406
2025-03-30 08:09:55 [DEBUG] clck_gen.py:128 IND CLOCK 5508
2025-03-30 08:09:55 [DEBUG] clck_gen.py:128 IND CLOCK 5610
2025-03-30 08:09:56 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 08:09:56 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 08:09:56 [INFO] transceiver.py:241 (MS@172.18.26.22:6700) Frequency hopping disabled
2025-03-30 08:09:56 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 08:09:56 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 08:09:56 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 08:09:56 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 08:09:56 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 08:09:56 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 08:09:56 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 08:09:56 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 08:09:56 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 08:09:56 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 08:09:56 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 08:10:01 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 08:10:01 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 08:10:01 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 08:10:01 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 08:10:01 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 08:10:01 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 08:10:01 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 08:10:01 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 08:10:01 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 08:10:01 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 08:10:01 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 08:10:01 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 08:10:01 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 08:10:01 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 08:10:01 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 08:10:01 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 08:10:01 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 08:10:01 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 08:10:01 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 08:10:01 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 08:10:01 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 08:10:01 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 08:10:01 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 08:10:01 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 08:10:01 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 08:10:01 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 08:10:01 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 08:10:01 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 08:10:01 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 08:10:01 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 08:10:01 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 08:10:01 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 08:10:01 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 08:10:01 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 08:10:01 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 08:10:01 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 08:10:01 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 08:10:01 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 08:10:01 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 08:10:01 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 08:10:01 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 08:10:01 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 08:10:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 08:10:01 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 08:10:01 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 08:10:01 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 08:10:01 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 08:10:01 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 08:10:01 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 08:10:01 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 08:10:01 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 08:10:01 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 08:10:01 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 08:10:01 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 08:10:01 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 08:10:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 08:10:01 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 08:10:01 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 08:10:01 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 08:10:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 08:10:01 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 08:10:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 08:10:01 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 08:10:01 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 08:10:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 08:10:01 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 08:10:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 08:10:01 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 08:10:01 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 08:10:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 08:10:01 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 08:10:01 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 08:10:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 08:10:01 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 08:10:01 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 08:10:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 08:10:01 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 08:10:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 08:10:01 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 08:10:01 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 08:10:01 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 08:10:01 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 08:10:01 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-03-30 08:10:01 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-03-30 08:10:01 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-03-30 08:10:01 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-03-30 08:10:01 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-03-30 08:10:01 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-03-30 08:10:01 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-03-30 08:10:01 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-03-30 08:10:01 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-03-30 08:10:01 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-03-30 08:10:01 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=0 bl=148 pwr=0
2025-03-30 08:10:01 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=1 bl=148 pwr=0
2025-03-30 08:10:01 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=2 bl=148 pwr=0
2025-03-30 08:10:01 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=3 bl=148 pwr=0
2025-03-30 08:10:01 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=4 bl=148 pwr=0
2025-03-30 08:10:01 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=5 bl=148 pwr=0
2025-03-30 08:10:01 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=6 bl=148 pwr=0
2025-03-30 08:10:01 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=7 bl=148 pwr=0
2025-03-30 08:10:01 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 08:10:01 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 08:10:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:10:01 [DEBUG] fake_trx.py:317 (BTS@172.18.26.20:5700) Recv FAKE_CI cmd
2025-03-30 08:10:01 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 08:10:01 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 08:10:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 08:10:01 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 08:10:01 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 08:10:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 08:10:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:10:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 08:10:01 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 08:10:01 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 08:10:01 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 08:10:01 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 08:10:01 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 08:10:01 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 08:10:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 08:10:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 08:10:02 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-03-30 08:10:02 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 08:10:02 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 08:10:02 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 08:10:02 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 08:10:02 [DEBUG] clck_gen.py:128 IND CLOCK 306
2025-03-30 08:10:03 [DEBUG] clck_gen.py:128 IND CLOCK 408
2025-03-30 08:10:03 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 08:10:03 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 08:10:03 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 08:10:03 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 08:10:03 [DEBUG] clck_gen.py:128 IND CLOCK 510
2025-03-30 08:10:04 [DEBUG] clck_gen.py:128 IND CLOCK 612
2025-03-30 08:10:04 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 08:10:04 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 08:10:04 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 08:10:04 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 08:10:04 [DEBUG] clck_gen.py:128 IND CLOCK 714
2025-03-30 08:10:05 [DEBUG] clck_gen.py:128 IND CLOCK 816
2025-03-30 08:10:05 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 08:10:05 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 08:10:05 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 08:10:05 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 08:10:05 [DEBUG] clck_gen.py:128 IND CLOCK 918
2025-03-30 08:10:06 [DEBUG] clck_gen.py:128 IND CLOCK 1020
2025-03-30 08:10:06 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 08:10:06 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 08:10:06 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 08:10:06 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 08:10:06 [DEBUG] clck_gen.py:128 IND CLOCK 1122
2025-03-30 08:10:06 [DEBUG] clck_gen.py:128 IND CLOCK 1224
2025-03-30 08:10:07 [DEBUG] clck_gen.py:128 IND CLOCK 1326
2025-03-30 08:10:07 [DEBUG] clck_gen.py:128 IND CLOCK 1428
2025-03-30 08:10:08 [DEBUG] clck_gen.py:128 IND CLOCK 1530
2025-03-30 08:10:08 [DEBUG] clck_gen.py:128 IND CLOCK 1632
2025-03-30 08:10:09 [DEBUG] clck_gen.py:128 IND CLOCK 1734
2025-03-30 08:10:09 [DEBUG] clck_gen.py:128 IND CLOCK 1836
2025-03-30 08:10:10 [DEBUG] clck_gen.py:128 IND CLOCK 1938
2025-03-30 08:10:10 [DEBUG] clck_gen.py:128 IND CLOCK 2040
2025-03-30 08:10:11 [DEBUG] clck_gen.py:128 IND CLOCK 2142
2025-03-30 08:10:11 [DEBUG] clck_gen.py:128 IND CLOCK 2244
2025-03-30 08:10:12 [DEBUG] clck_gen.py:128 IND CLOCK 2346
2025-03-30 08:10:12 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 08:10:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:10:12 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 08:10:12 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 08:10:12 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 08:10:12 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 08:10:12 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 08:10:12 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 08:10:12 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 08:10:12 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 08:10:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:10:12 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 08:10:12 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 08:10:12 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 08:10:12 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 08:10:12 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 08:10:12 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.26.22:6700) Recv SETFH cmd
2025-03-30 08:10:12 [INFO] transceiver.py:237 (MS@172.18.26.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2025-03-30 08:10:12 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 08:10:12 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 08:10:12 [DEBUG] clck_gen.py:128 IND CLOCK 2448
2025-03-30 08:10:13 [DEBUG] clck_gen.py:128 IND CLOCK 2550
2025-03-30 08:10:13 [DEBUG] clck_gen.py:128 IND CLOCK 2652
2025-03-30 08:10:14 [DEBUG] clck_gen.py:128 IND CLOCK 2754
2025-03-30 08:10:14 [DEBUG] clck_gen.py:128 IND CLOCK 2856
2025-03-30 08:10:14 [DEBUG] clck_gen.py:128 IND CLOCK 2958
2025-03-30 08:10:15 [DEBUG] clck_gen.py:128 IND CLOCK 3060
2025-03-30 08:10:15 [DEBUG] clck_gen.py:128 IND CLOCK 3162
2025-03-30 08:10:16 [DEBUG] clck_gen.py:128 IND CLOCK 3264
2025-03-30 08:10:16 [DEBUG] clck_gen.py:128 IND CLOCK 3366
2025-03-30 08:10:17 [DEBUG] clck_gen.py:128 IND CLOCK 3468
2025-03-30 08:10:17 [DEBUG] clck_gen.py:128 IND CLOCK 3570
2025-03-30 08:10:18 [DEBUG] clck_gen.py:128 IND CLOCK 3672
2025-03-30 08:10:18 [DEBUG] clck_gen.py:128 IND CLOCK 3774
2025-03-30 08:10:19 [DEBUG] clck_gen.py:128 IND CLOCK 3876
2025-03-30 08:10:19 [DEBUG] clck_gen.py:128 IND CLOCK 3978
2025-03-30 08:10:20 [DEBUG] clck_gen.py:128 IND CLOCK 4080
2025-03-30 08:10:20 [DEBUG] clck_gen.py:128 IND CLOCK 4182
2025-03-30 08:10:21 [DEBUG] clck_gen.py:128 IND CLOCK 4284
2025-03-30 08:10:21 [DEBUG] clck_gen.py:128 IND CLOCK 4386
2025-03-30 08:10:22 [DEBUG] clck_gen.py:128 IND CLOCK 4488
2025-03-30 08:10:22 [DEBUG] clck_gen.py:128 IND CLOCK 4590
2025-03-30 08:10:22 [DEBUG] clck_gen.py:128 IND CLOCK 4692
2025-03-30 08:10:23 [DEBUG] clck_gen.py:128 IND CLOCK 4794
2025-03-30 08:10:23 [DEBUG] clck_gen.py:128 IND CLOCK 4896
2025-03-30 08:10:24 [DEBUG] clck_gen.py:128 IND CLOCK 4998
2025-03-30 08:10:24 [DEBUG] clck_gen.py:128 IND CLOCK 5100
2025-03-30 08:10:25 [DEBUG] clck_gen.py:128 IND CLOCK 5202
2025-03-30 08:10:25 [DEBUG] clck_gen.py:128 IND CLOCK 5304
2025-03-30 08:10:26 [DEBUG] clck_gen.py:128 IND CLOCK 5406
2025-03-30 08:10:26 [DEBUG] clck_gen.py:128 IND CLOCK 5508
2025-03-30 08:10:27 [DEBUG] clck_gen.py:128 IND CLOCK 5610
2025-03-30 08:10:27 [DEBUG] clck_gen.py:128 IND CLOCK 5712
2025-03-30 08:10:28 [DEBUG] clck_gen.py:128 IND CLOCK 5814
2025-03-30 08:10:28 [DEBUG] clck_gen.py:128 IND CLOCK 5916
2025-03-30 08:10:29 [DEBUG] clck_gen.py:128 IND CLOCK 6018
2025-03-30 08:10:29 [DEBUG] clck_gen.py:128 IND CLOCK 6120
2025-03-30 08:10:29 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=6131): ver=1 fn=6129 tn=0 bl=148 pwr=0
2025-03-30 08:10:29 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=6131): ver=1 fn=6129 tn=1 bl=148 pwr=0
2025-03-30 08:10:29 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=6131): ver=1 fn=6129 tn=2 bl=148 pwr=0
2025-03-30 08:10:29 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=6131): ver=1 fn=6129 tn=3 bl=148 pwr=0
2025-03-30 08:10:29 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=6131): ver=1 fn=6129 tn=4 bl=148 pwr=0
2025-03-30 08:10:29 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=6131): ver=1 fn=6129 tn=5 bl=148 pwr=0
2025-03-30 08:10:29 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=6131): ver=1 fn=6129 tn=6 bl=148 pwr=0
2025-03-30 08:10:29 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=6131): ver=1 fn=6129 tn=7 bl=148 pwr=0
2025-03-30 08:10:29 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=6131): ver=1 fn=6130 tn=0 bl=148 pwr=0
2025-03-30 08:10:29 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=6131): ver=1 fn=6130 tn=1 bl=148 pwr=0
2025-03-30 08:10:29 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=6131): ver=1 fn=6130 tn=2 bl=148 pwr=0
2025-03-30 08:10:29 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=6131): ver=1 fn=6130 tn=3 bl=148 pwr=0
2025-03-30 08:10:29 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=6131): ver=1 fn=6130 tn=4 bl=148 pwr=0
2025-03-30 08:10:29 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=6131): ver=1 fn=6130 tn=5 bl=148 pwr=0
2025-03-30 08:10:29 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=6131): ver=1 fn=6130 tn=6 bl=148 pwr=0
2025-03-30 08:10:29 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=6131): ver=1 fn=6130 tn=7 bl=148 pwr=0
2025-03-30 08:10:29 [WARNING] transceiver.py:330 (TRX1@172.18.26.20:5700/1) Stale TRXD message (fn=6131): ver=1 fn=6129 tn=2 bl=148 pwr=0
2025-03-30 08:10:29 [WARNING] transceiver.py:330 (TRX2@172.18.26.20:5700/2) Stale TRXD message (fn=6131): ver=1 fn=6130 tn=5 bl=148 pwr=0
2025-03-30 08:10:30 [DEBUG] clck_gen.py:128 IND CLOCK 6222
2025-03-30 08:10:30 [DEBUG] clck_gen.py:128 IND CLOCK 6324
2025-03-30 08:10:30 [DEBUG] clck_gen.py:128 IND CLOCK 6426
2025-03-30 08:10:31 [DEBUG] clck_gen.py:128 IND CLOCK 6528
2025-03-30 08:10:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 08:10:31 [DEBUG] clck_gen.py:128 IND CLOCK 6630
2025-03-30 08:10:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:10:31 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 08:10:31 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 08:10:31 [INFO] transceiver.py:241 (MS@172.18.26.22:6700) Frequency hopping disabled
2025-03-30 08:10:31 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 08:10:31 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 08:10:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 08:10:31 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 08:10:31 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 08:10:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 08:10:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:10:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 08:10:31 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 08:10:31 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 08:10:31 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 08:10:31 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 08:10:31 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 08:10:31 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 08:10:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 08:10:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 08:10:32 [DEBUG] clck_gen.py:128 IND CLOCK 6732
2025-03-30 08:10:32 [DEBUG] clck_gen.py:128 IND CLOCK 6834
2025-03-30 08:10:33 [DEBUG] clck_gen.py:128 IND CLOCK 6936
2025-03-30 08:10:33 [DEBUG] clck_gen.py:128 IND CLOCK 7038
2025-03-30 08:10:34 [DEBUG] clck_gen.py:128 IND CLOCK 7140
2025-03-30 08:10:34 [DEBUG] clck_gen.py:128 IND CLOCK 7242
2025-03-30 08:10:35 [DEBUG] clck_gen.py:128 IND CLOCK 7344
2025-03-30 08:10:35 [DEBUG] clck_gen.py:128 IND CLOCK 7446
2025-03-30 08:10:36 [DEBUG] clck_gen.py:128 IND CLOCK 7548
2025-03-30 08:10:36 [DEBUG] clck_gen.py:128 IND CLOCK 7650
2025-03-30 08:10:37 [DEBUG] clck_gen.py:128 IND CLOCK 7752
2025-03-30 08:10:37 [DEBUG] clck_gen.py:128 IND CLOCK 7854
2025-03-30 08:10:38 [DEBUG] clck_gen.py:128 IND CLOCK 7956
2025-03-30 08:10:38 [DEBUG] clck_gen.py:128 IND CLOCK 8058
2025-03-30 08:10:38 [DEBUG] clck_gen.py:128 IND CLOCK 8160
2025-03-30 08:10:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 08:10:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:10:39 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 08:10:39 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 08:10:39 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 08:10:39 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 08:10:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 08:10:39 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 08:10:39 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 08:10:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 08:10:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:10:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 08:10:39 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 08:10:39 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 08:10:39 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 08:10:39 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 08:10:39 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.26.22:6700) Recv SETFH cmd
2025-03-30 08:10:39 [INFO] transceiver.py:237 (MS@172.18.26.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2025-03-30 08:10:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 08:10:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 08:10:39 [DEBUG] clck_gen.py:128 IND CLOCK 8262
2025-03-30 08:10:39 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=8301): ver=1 fn=8299 tn=0 bl=148 pwr=0
2025-03-30 08:10:39 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=8301): ver=1 fn=8299 tn=1 bl=148 pwr=0
2025-03-30 08:10:39 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=8301): ver=1 fn=8299 tn=2 bl=148 pwr=0
2025-03-30 08:10:39 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=8301): ver=1 fn=8299 tn=3 bl=148 pwr=0
2025-03-30 08:10:39 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=8301): ver=1 fn=8299 tn=4 bl=148 pwr=0
2025-03-30 08:10:39 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=8301): ver=1 fn=8299 tn=5 bl=148 pwr=0
2025-03-30 08:10:39 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=8301): ver=1 fn=8299 tn=6 bl=148 pwr=0
2025-03-30 08:10:39 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=8301): ver=1 fn=8299 tn=7 bl=148 pwr=0
2025-03-30 08:10:39 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=8301): ver=1 fn=8300 tn=0 bl=148 pwr=0
2025-03-30 08:10:39 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=8301): ver=1 fn=8300 tn=1 bl=148 pwr=0
2025-03-30 08:10:39 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=8301): ver=1 fn=8300 tn=2 bl=148 pwr=0
2025-03-30 08:10:39 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=8301): ver=1 fn=8300 tn=3 bl=148 pwr=0
2025-03-30 08:10:39 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=8301): ver=1 fn=8300 tn=4 bl=148 pwr=0
2025-03-30 08:10:39 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=8301): ver=1 fn=8300 tn=5 bl=148 pwr=0
2025-03-30 08:10:39 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=8301): ver=1 fn=8300 tn=6 bl=148 pwr=0
2025-03-30 08:10:39 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=8301): ver=1 fn=8300 tn=7 bl=148 pwr=0
2025-03-30 08:10:39 [DEBUG] clck_gen.py:128 IND CLOCK 8364
2025-03-30 08:10:40 [DEBUG] clck_gen.py:128 IND CLOCK 8466
2025-03-30 08:10:40 [DEBUG] clck_gen.py:128 IND CLOCK 8568
2025-03-30 08:10:41 [DEBUG] clck_gen.py:128 IND CLOCK 8670
2025-03-30 08:10:41 [DEBUG] clck_gen.py:128 IND CLOCK 8772
2025-03-30 08:10:42 [DEBUG] clck_gen.py:128 IND CLOCK 8874
2025-03-30 08:10:42 [DEBUG] clck_gen.py:128 IND CLOCK 8976
2025-03-30 08:10:43 [DEBUG] clck_gen.py:128 IND CLOCK 9078
2025-03-30 08:10:43 [DEBUG] clck_gen.py:128 IND CLOCK 9180
2025-03-30 08:10:44 [DEBUG] clck_gen.py:128 IND CLOCK 9282
2025-03-30 08:10:44 [DEBUG] clck_gen.py:128 IND CLOCK 9384
2025-03-30 08:10:44 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=9385): ver=1 fn=9383 tn=0 bl=148 pwr=0
2025-03-30 08:10:44 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=9385): ver=1 fn=9383 tn=1 bl=148 pwr=0
2025-03-30 08:10:44 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=9385): ver=1 fn=9383 tn=2 bl=148 pwr=0
2025-03-30 08:10:44 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=9385): ver=1 fn=9383 tn=3 bl=148 pwr=0
2025-03-30 08:10:44 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=9385): ver=1 fn=9383 tn=4 bl=148 pwr=0
2025-03-30 08:10:44 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=9385): ver=1 fn=9383 tn=5 bl=148 pwr=0
2025-03-30 08:10:44 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=9385): ver=1 fn=9383 tn=6 bl=148 pwr=0
2025-03-30 08:10:44 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=9385): ver=1 fn=9383 tn=7 bl=148 pwr=0
2025-03-30 08:10:44 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=9385): ver=1 fn=9384 tn=0 bl=148 pwr=0
2025-03-30 08:10:44 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=9385): ver=1 fn=9384 tn=1 bl=148 pwr=0
2025-03-30 08:10:44 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=9385): ver=1 fn=9384 tn=2 bl=148 pwr=0
2025-03-30 08:10:44 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=9385): ver=1 fn=9384 tn=3 bl=148 pwr=0
2025-03-30 08:10:44 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=9385): ver=1 fn=9384 tn=4 bl=148 pwr=0
2025-03-30 08:10:44 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=9385): ver=1 fn=9384 tn=5 bl=148 pwr=0
2025-03-30 08:10:44 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=9385): ver=1 fn=9384 tn=6 bl=148 pwr=0
2025-03-30 08:10:44 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=9385): ver=1 fn=9384 tn=7 bl=148 pwr=0
2025-03-30 08:10:45 [DEBUG] clck_gen.py:128 IND CLOCK 9486
2025-03-30 08:10:45 [DEBUG] clck_gen.py:128 IND CLOCK 9588
2025-03-30 08:10:46 [DEBUG] clck_gen.py:128 IND CLOCK 9690
2025-03-30 08:10:46 [DEBUG] clck_gen.py:128 IND CLOCK 9792
2025-03-30 08:10:46 [DEBUG] clck_gen.py:128 IND CLOCK 9894
2025-03-30 08:10:47 [DEBUG] clck_gen.py:128 IND CLOCK 9996
2025-03-30 08:10:47 [DEBUG] clck_gen.py:128 IND CLOCK 10098
2025-03-30 08:10:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 08:10:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:10:47 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 08:10:47 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 08:10:47 [INFO] transceiver.py:241 (MS@172.18.26.22:6700) Frequency hopping disabled
2025-03-30 08:10:47 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 08:10:47 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 08:10:47 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 08:10:47 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 08:10:47 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 08:10:47 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 08:10:47 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 08:10:47 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 08:10:47 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 08:10:47 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 08:10:47 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 08:10:52 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 08:10:52 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 08:10:52 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 08:10:52 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 08:10:52 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 08:10:52 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 08:10:52 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 08:10:52 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 08:10:52 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 08:10:52 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 08:10:52 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 08:10:52 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 08:10:52 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 08:10:52 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 08:10:52 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 08:10:52 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 08:10:52 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 08:10:52 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 08:10:52 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 08:10:52 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 08:10:52 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 08:10:52 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 08:10:52 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 08:10:52 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 08:10:52 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 08:10:52 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 08:10:52 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 08:10:52 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 08:10:52 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 08:10:52 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 08:10:52 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 08:10:52 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 08:10:52 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 08:10:52 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 08:10:52 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 08:10:52 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 08:10:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 08:10:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 08:10:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 08:10:52 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 08:10:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 08:10:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 08:10:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 08:10:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 08:10:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 08:10:52 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 08:10:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 08:10:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 08:10:52 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 08:10:52 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 08:10:52 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 08:10:52 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 08:10:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 08:10:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 08:10:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 08:10:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 08:10:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 08:10:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 08:10:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 08:10:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 08:10:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 08:10:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 08:10:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 08:10:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 08:10:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 08:10:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 08:10:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 08:10:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 08:10:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 08:10:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 08:10:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 08:10:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 08:10:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 08:10:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 08:10:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 08:10:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 08:10:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 08:10:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 08:10:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 08:10:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 08:10:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 08:10:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 08:10:52 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-03-30 08:10:53 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-03-30 08:10:53 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-03-30 08:10:53 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-03-30 08:10:53 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-03-30 08:10:53 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-03-30 08:10:53 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-03-30 08:10:53 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-03-30 08:10:53 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-03-30 08:10:53 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-03-30 08:10:53 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=0 bl=148 pwr=0
2025-03-30 08:10:53 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=1 bl=148 pwr=0
2025-03-30 08:10:53 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=2 bl=148 pwr=0
2025-03-30 08:10:53 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=3 bl=148 pwr=0
2025-03-30 08:10:53 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=4 bl=148 pwr=0
2025-03-30 08:10:53 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=5 bl=148 pwr=0
2025-03-30 08:10:53 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=6 bl=148 pwr=0
2025-03-30 08:10:53 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=7 bl=148 pwr=0
2025-03-30 08:10:53 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 08:10:53 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 08:10:53 [DEBUG] fake_trx.py:317 (BTS@172.18.26.20:5700) Recv FAKE_CI cmd
2025-03-30 08:10:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:10:53 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 08:10:53 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 08:10:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 08:10:53 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 08:10:53 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 08:10:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 08:10:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:10:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 08:10:53 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 08:10:53 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 08:10:53 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 08:10:53 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 08:10:53 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 08:10:53 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 08:10:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 08:10:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 08:10:53 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-03-30 08:10:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 08:10:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:10:53 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 08:10:53 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 08:10:53 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 08:10:53 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 08:10:53 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 08:10:53 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 08:10:53 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 08:10:53 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 08:10:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 08:10:53 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 08:10:53 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 08:10:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 08:10:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:10:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 08:10:54 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 08:10:54 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 08:10:54 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 08:10:54 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 08:10:54 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.26.22:6700) Recv SETFH cmd
2025-03-30 08:10:54 [INFO] transceiver.py:237 (MS@172.18.26.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2025-03-30 08:10:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 08:10:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 08:10:54 [DEBUG] clck_gen.py:128 IND CLOCK 306
2025-03-30 08:10:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 08:10:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:10:54 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 08:10:54 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 08:10:54 [INFO] transceiver.py:241 (MS@172.18.26.22:6700) Frequency hopping disabled
2025-03-30 08:10:54 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 08:10:54 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 08:10:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 08:10:54 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 08:10:54 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 08:10:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 08:10:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:10:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 08:10:54 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 08:10:54 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 08:10:54 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 08:10:54 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 08:10:54 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 08:10:54 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 08:10:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 08:10:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 08:10:54 [DEBUG] clck_gen.py:128 IND CLOCK 408
2025-03-30 08:10:54 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 08:10:54 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 08:10:54 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 08:10:54 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 08:10:55 [DEBUG] clck_gen.py:128 IND CLOCK 510
2025-03-30 08:10:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 08:10:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:10:55 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 08:10:55 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 08:10:55 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 08:10:55 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 08:10:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 08:10:55 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 08:10:55 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 08:10:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 08:10:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:10:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 08:10:55 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 08:10:55 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 08:10:55 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 08:10:55 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 08:10:55 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.26.22:6700) Recv SETFH cmd
2025-03-30 08:10:55 [INFO] transceiver.py:237 (MS@172.18.26.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2025-03-30 08:10:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 08:10:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 08:10:55 [DEBUG] clck_gen.py:128 IND CLOCK 612
2025-03-30 08:10:55 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 08:10:55 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 08:10:55 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 08:10:55 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 08:10:56 [DEBUG] clck_gen.py:128 IND CLOCK 714
2025-03-30 08:10:56 [DEBUG] clck_gen.py:128 IND CLOCK 816
2025-03-30 08:10:56 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 08:10:56 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 08:10:56 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 08:10:56 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 08:10:57 [DEBUG] clck_gen.py:128 IND CLOCK 918
2025-03-30 08:10:57 [DEBUG] clck_gen.py:128 IND CLOCK 1020
2025-03-30 08:10:57 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 08:10:57 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 08:10:57 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 08:10:57 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 08:10:58 [DEBUG] clck_gen.py:128 IND CLOCK 1122
2025-03-30 08:10:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 08:10:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:10:58 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 08:10:58 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 08:10:58 [INFO] transceiver.py:241 (MS@172.18.26.22:6700) Frequency hopping disabled
2025-03-30 08:10:58 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 08:10:58 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 08:10:58 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 08:10:58 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 08:10:58 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 08:10:58 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 08:10:58 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 08:10:58 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 08:10:58 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 08:10:58 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 08:10:58 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 08:11:03 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 08:11:03 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 08:11:03 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 08:11:03 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 08:11:03 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 08:11:03 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 08:11:03 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 08:11:03 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 08:11:03 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 08:11:03 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 08:11:03 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 08:11:03 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 08:11:03 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 08:11:03 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 08:11:03 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 08:11:03 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 08:11:03 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 08:11:03 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 08:11:03 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 08:11:03 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 08:11:03 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 08:11:03 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 08:11:03 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 08:11:03 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 08:11:03 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 08:11:03 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 08:11:03 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 08:11:03 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 08:11:03 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 08:11:03 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 08:11:03 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 08:11:03 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 08:11:03 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 08:11:03 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 08:11:03 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 08:11:03 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 08:11:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 08:11:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 08:11:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 08:11:03 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 08:11:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 08:11:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 08:11:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 08:11:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 08:11:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 08:11:03 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 08:11:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 08:11:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 08:11:03 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 08:11:03 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 08:11:03 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 08:11:03 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 08:11:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 08:11:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 08:11:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 08:11:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 08:11:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 08:11:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 08:11:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 08:11:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 08:11:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 08:11:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 08:11:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 08:11:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 08:11:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 08:11:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 08:11:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 08:11:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 08:11:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 08:11:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 08:11:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 08:11:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 08:11:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 08:11:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 08:11:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 08:11:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 08:11:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 08:11:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 08:11:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 08:11:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 08:11:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 08:11:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 08:11:03 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-03-30 08:11:03 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-03-30 08:11:03 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-03-30 08:11:03 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-03-30 08:11:03 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-03-30 08:11:03 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-03-30 08:11:03 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-03-30 08:11:03 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-03-30 08:11:03 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-03-30 08:11:03 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-03-30 08:11:03 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=0 bl=148 pwr=0
2025-03-30 08:11:03 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=1 bl=148 pwr=0
2025-03-30 08:11:03 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=2 bl=148 pwr=0
2025-03-30 08:11:03 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=3 bl=148 pwr=0
2025-03-30 08:11:03 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=4 bl=148 pwr=0
2025-03-30 08:11:03 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=5 bl=148 pwr=0
2025-03-30 08:11:03 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=6 bl=148 pwr=0
2025-03-30 08:11:03 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=7 bl=148 pwr=0
2025-03-30 08:11:03 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 08:11:03 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 08:11:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:11:03 [DEBUG] fake_trx.py:317 (BTS@172.18.26.20:5700) Recv FAKE_CI cmd
2025-03-30 08:11:03 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 08:11:03 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 08:11:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 08:11:03 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 08:11:03 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 08:11:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 08:11:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:11:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 08:11:03 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 08:11:03 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 08:11:03 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 08:11:03 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 08:11:03 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 08:11:03 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 08:11:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 08:11:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 08:11:04 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-03-30 08:11:04 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 08:11:04 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 08:11:04 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 08:11:04 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 08:11:04 [DEBUG] clck_gen.py:128 IND CLOCK 306
2025-03-30 08:11:05 [DEBUG] clck_gen.py:128 IND CLOCK 408
2025-03-30 08:11:05 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 08:11:05 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 08:11:05 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 08:11:05 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 08:11:05 [DEBUG] clck_gen.py:128 IND CLOCK 510
2025-03-30 08:11:06 [DEBUG] clck_gen.py:128 IND CLOCK 612
2025-03-30 08:11:06 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 08:11:06 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 08:11:06 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 08:11:06 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 08:11:06 [DEBUG] clck_gen.py:128 IND CLOCK 714
2025-03-30 08:11:07 [DEBUG] clck_gen.py:128 IND CLOCK 816
2025-03-30 08:11:07 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 08:11:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:11:07 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 08:11:07 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 08:11:07 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 08:11:07 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 08:11:07 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 08:11:07 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 08:11:07 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 08:11:07 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 08:11:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:11:07 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 08:11:07 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 08:11:07 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 08:11:07 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 08:11:07 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 08:11:07 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.26.22:6700) Recv SETFH cmd
2025-03-30 08:11:07 [INFO] transceiver.py:237 (MS@172.18.26.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2025-03-30 08:11:07 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 08:11:07 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 08:11:07 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 08:11:07 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 08:11:07 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 08:11:07 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 08:11:07 [DEBUG] clck_gen.py:128 IND CLOCK 918
2025-03-30 08:11:08 [DEBUG] clck_gen.py:128 IND CLOCK 1020
2025-03-30 08:11:08 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 08:11:08 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 08:11:08 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 08:11:08 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 08:11:08 [DEBUG] clck_gen.py:128 IND CLOCK 1122
2025-03-30 08:11:08 [DEBUG] clck_gen.py:128 IND CLOCK 1224
2025-03-30 08:11:09 [DEBUG] clck_gen.py:128 IND CLOCK 1326
2025-03-30 08:11:09 [DEBUG] clck_gen.py:128 IND CLOCK 1428
2025-03-30 08:11:10 [DEBUG] clck_gen.py:128 IND CLOCK 1530
2025-03-30 08:11:10 [DEBUG] clck_gen.py:128 IND CLOCK 1632
2025-03-30 08:11:11 [DEBUG] clck_gen.py:128 IND CLOCK 1734
2025-03-30 08:11:11 [DEBUG] clck_gen.py:128 IND CLOCK 1836
2025-03-30 08:11:12 [DEBUG] clck_gen.py:128 IND CLOCK 1938
2025-03-30 08:11:12 [DEBUG] clck_gen.py:128 IND CLOCK 2040
2025-03-30 08:11:13 [DEBUG] clck_gen.py:128 IND CLOCK 2142
2025-03-30 08:11:13 [DEBUG] clck_gen.py:128 IND CLOCK 2244
2025-03-30 08:11:14 [DEBUG] clck_gen.py:128 IND CLOCK 2346
2025-03-30 08:11:14 [DEBUG] clck_gen.py:128 IND CLOCK 2448
2025-03-30 08:11:15 [DEBUG] clck_gen.py:128 IND CLOCK 2550
2025-03-30 08:11:15 [DEBUG] clck_gen.py:128 IND CLOCK 2652
2025-03-30 08:11:16 [DEBUG] clck_gen.py:128 IND CLOCK 2754
2025-03-30 08:11:16 [DEBUG] clck_gen.py:128 IND CLOCK 2856
2025-03-30 08:11:16 [DEBUG] clck_gen.py:128 IND CLOCK 2958
2025-03-30 08:11:17 [DEBUG] clck_gen.py:128 IND CLOCK 3060
2025-03-30 08:11:17 [DEBUG] clck_gen.py:128 IND CLOCK 3162
2025-03-30 08:11:18 [DEBUG] clck_gen.py:128 IND CLOCK 3264
2025-03-30 08:11:18 [DEBUG] clck_gen.py:128 IND CLOCK 3366
2025-03-30 08:11:19 [DEBUG] clck_gen.py:128 IND CLOCK 3468
2025-03-30 08:11:19 [DEBUG] clck_gen.py:128 IND CLOCK 3570
2025-03-30 08:11:20 [DEBUG] clck_gen.py:128 IND CLOCK 3672
2025-03-30 08:11:20 [DEBUG] clck_gen.py:128 IND CLOCK 3774
2025-03-30 08:11:21 [DEBUG] clck_gen.py:128 IND CLOCK 3876
2025-03-30 08:11:21 [DEBUG] clck_gen.py:128 IND CLOCK 3978
2025-03-30 08:11:22 [DEBUG] clck_gen.py:128 IND CLOCK 4080
2025-03-30 08:11:22 [DEBUG] clck_gen.py:128 IND CLOCK 4182
2025-03-30 08:11:23 [DEBUG] clck_gen.py:128 IND CLOCK 4284
2025-03-30 08:11:23 [DEBUG] clck_gen.py:128 IND CLOCK 4386
2025-03-30 08:11:24 [DEBUG] clck_gen.py:128 IND CLOCK 4488
2025-03-30 08:11:24 [DEBUG] clck_gen.py:128 IND CLOCK 4590
2025-03-30 08:11:24 [DEBUG] clck_gen.py:128 IND CLOCK 4692
2025-03-30 08:11:25 [DEBUG] clck_gen.py:128 IND CLOCK 4794
2025-03-30 08:11:25 [DEBUG] clck_gen.py:128 IND CLOCK 4896
2025-03-30 08:11:26 [DEBUG] clck_gen.py:128 IND CLOCK 4998
2025-03-30 08:11:26 [DEBUG] clck_gen.py:128 IND CLOCK 5100
2025-03-30 08:11:27 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 08:11:27 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 08:11:27 [INFO] transceiver.py:241 (MS@172.18.26.22:6700) Frequency hopping disabled
2025-03-30 08:11:27 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 08:11:27 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 08:11:27 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 08:11:27 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 08:11:27 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 08:11:27 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 08:11:27 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 08:11:27 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 08:11:27 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 08:11:27 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 08:11:27 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 08:11:27 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=5182 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 08:11:27 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=5182 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 08:11:32 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 08:11:32 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 08:11:32 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 08:11:32 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 08:11:32 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 08:11:32 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 08:11:32 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 08:11:32 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 08:11:32 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 08:11:32 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 08:11:32 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 08:11:32 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 08:11:32 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 08:11:32 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 08:11:32 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 08:11:32 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 08:11:32 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 08:11:32 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 08:11:32 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 08:11:32 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 08:11:32 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 08:11:32 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 08:11:32 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 08:11:32 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 08:11:32 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 08:11:32 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 08:11:32 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 08:11:32 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 08:11:32 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 08:11:32 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 08:11:32 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 08:11:32 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 08:11:32 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 08:11:32 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 08:11:32 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 08:11:32 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 08:11:32 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 08:11:32 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 08:11:32 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 08:11:32 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 08:11:32 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 08:11:32 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 08:11:32 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 08:11:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 08:11:32 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 08:11:32 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 08:11:32 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 08:11:32 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 08:11:32 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 08:11:32 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 08:11:32 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 08:11:32 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 08:11:32 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 08:11:32 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 08:11:32 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 08:11:32 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 08:11:32 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 08:11:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 08:11:32 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 08:11:32 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 08:11:32 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 08:11:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 08:11:32 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 08:11:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 08:11:32 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 08:11:32 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 08:11:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 08:11:32 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 08:11:32 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 08:11:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 08:11:32 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 08:11:32 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 08:11:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 08:11:32 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 08:11:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 08:11:32 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 08:11:32 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 08:11:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 08:11:32 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 08:11:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 08:11:32 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 08:11:32 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 08:11:32 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-03-30 08:11:32 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-03-30 08:11:32 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-03-30 08:11:32 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-03-30 08:11:32 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-03-30 08:11:32 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-03-30 08:11:32 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-03-30 08:11:32 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-03-30 08:11:32 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-03-30 08:11:32 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-03-30 08:11:32 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=0 bl=148 pwr=0
2025-03-30 08:11:32 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=1 bl=148 pwr=0
2025-03-30 08:11:32 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=2 bl=148 pwr=0
2025-03-30 08:11:32 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=3 bl=148 pwr=0
2025-03-30 08:11:32 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=4 bl=148 pwr=0
2025-03-30 08:11:32 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=5 bl=148 pwr=0
2025-03-30 08:11:32 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=6 bl=148 pwr=0
2025-03-30 08:11:32 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=7 bl=148 pwr=0
2025-03-30 08:11:32 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 08:11:32 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 08:11:32 [DEBUG] fake_trx.py:317 (BTS@172.18.26.20:5700) Recv FAKE_CI cmd
2025-03-30 08:11:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:11:32 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 08:11:32 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 08:11:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 08:11:32 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 08:11:32 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 08:11:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 08:11:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:11:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 08:11:32 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 08:11:32 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 08:11:32 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 08:11:32 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 08:11:32 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 08:11:32 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 08:11:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 08:11:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 08:11:33 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-03-30 08:11:33 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 08:11:33 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 08:11:33 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 08:11:33 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 08:11:33 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 08:11:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:11:33 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 08:11:33 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 08:11:33 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 08:11:33 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 08:11:33 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 08:11:33 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 08:11:33 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 08:11:33 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 08:11:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:11:33 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 08:11:33 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 08:11:33 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 08:11:33 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 08:11:33 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 08:11:33 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.26.22:6700) Recv SETFH cmd
2025-03-30 08:11:33 [INFO] transceiver.py:237 (MS@172.18.26.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2025-03-30 08:11:33 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 08:11:33 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 08:11:33 [DEBUG] clck_gen.py:128 IND CLOCK 306
2025-03-30 08:11:34 [DEBUG] clck_gen.py:128 IND CLOCK 408
2025-03-30 08:11:34 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 08:11:34 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 08:11:34 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 08:11:34 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 08:11:34 [DEBUG] clck_gen.py:128 IND CLOCK 510
2025-03-30 08:11:35 [DEBUG] clck_gen.py:128 IND CLOCK 612
2025-03-30 08:11:35 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 08:11:35 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 08:11:35 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 08:11:35 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 08:11:35 [DEBUG] clck_gen.py:128 IND CLOCK 714
2025-03-30 08:11:36 [DEBUG] clck_gen.py:128 IND CLOCK 816
2025-03-30 08:11:36 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 08:11:36 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 08:11:36 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 08:11:36 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 08:11:36 [DEBUG] clck_gen.py:128 IND CLOCK 918
2025-03-30 08:11:36 [DEBUG] clck_gen.py:128 IND CLOCK 1020
2025-03-30 08:11:37 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 08:11:37 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 08:11:37 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 08:11:37 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 08:11:37 [DEBUG] clck_gen.py:128 IND CLOCK 1122
2025-03-30 08:11:37 [DEBUG] clck_gen.py:128 IND CLOCK 1224
2025-03-30 08:11:38 [DEBUG] clck_gen.py:128 IND CLOCK 1326
2025-03-30 08:11:38 [DEBUG] clck_gen.py:128 IND CLOCK 1428
2025-03-30 08:11:39 [DEBUG] clck_gen.py:128 IND CLOCK 1530
2025-03-30 08:11:39 [DEBUG] clck_gen.py:128 IND CLOCK 1632
2025-03-30 08:11:40 [DEBUG] clck_gen.py:128 IND CLOCK 1734
2025-03-30 08:11:40 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=1825): ver=1 fn=1822 tn=0 bl=148 pwr=0
2025-03-30 08:11:40 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=1825): ver=1 fn=1822 tn=1 bl=148 pwr=0
2025-03-30 08:11:40 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=1825): ver=1 fn=1822 tn=2 bl=148 pwr=0
2025-03-30 08:11:40 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=1825): ver=1 fn=1822 tn=3 bl=148 pwr=0
2025-03-30 08:11:40 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=1825): ver=1 fn=1822 tn=4 bl=148 pwr=0
2025-03-30 08:11:40 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=1825): ver=1 fn=1822 tn=5 bl=148 pwr=0
2025-03-30 08:11:40 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=1825): ver=1 fn=1822 tn=6 bl=148 pwr=0
2025-03-30 08:11:40 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=1825): ver=1 fn=1822 tn=7 bl=148 pwr=0
2025-03-30 08:11:40 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=1825): ver=1 fn=1823 tn=0 bl=148 pwr=0
2025-03-30 08:11:40 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=1825): ver=1 fn=1823 tn=1 bl=148 pwr=0
2025-03-30 08:11:40 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=1825): ver=1 fn=1823 tn=2 bl=148 pwr=0
2025-03-30 08:11:40 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=1825): ver=1 fn=1823 tn=3 bl=148 pwr=0
2025-03-30 08:11:40 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=1825): ver=1 fn=1823 tn=4 bl=148 pwr=0
2025-03-30 08:11:40 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=1825): ver=1 fn=1823 tn=5 bl=148 pwr=0
2025-03-30 08:11:40 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=1825): ver=1 fn=1823 tn=6 bl=148 pwr=0
2025-03-30 08:11:40 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=1825): ver=1 fn=1823 tn=7 bl=148 pwr=0
2025-03-30 08:11:40 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=1825): ver=1 fn=1824 tn=0 bl=148 pwr=0
2025-03-30 08:11:40 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=1825): ver=1 fn=1824 tn=1 bl=148 pwr=0
2025-03-30 08:11:40 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=1825): ver=1 fn=1824 tn=2 bl=148 pwr=0
2025-03-30 08:11:40 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=1825): ver=1 fn=1824 tn=3 bl=148 pwr=0
2025-03-30 08:11:40 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=1825): ver=1 fn=1824 tn=4 bl=148 pwr=0
2025-03-30 08:11:40 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=1825): ver=1 fn=1824 tn=5 bl=148 pwr=0
2025-03-30 08:11:40 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=1825): ver=1 fn=1824 tn=6 bl=148 pwr=0
2025-03-30 08:11:40 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=1825): ver=1 fn=1824 tn=7 bl=148 pwr=0
2025-03-30 08:11:40 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=1826): ver=1 fn=1825 tn=6 bl=148 pwr=0
2025-03-30 08:11:40 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=1826): ver=1 fn=1825 tn=7 bl=148 pwr=0
2025-03-30 08:11:40 [DEBUG] clck_gen.py:128 IND CLOCK 1836
2025-03-30 08:11:41 [DEBUG] clck_gen.py:128 IND CLOCK 1938
2025-03-30 08:11:41 [DEBUG] clck_gen.py:128 IND CLOCK 2040
2025-03-30 08:11:42 [DEBUG] clck_gen.py:128 IND CLOCK 2142
2025-03-30 08:11:42 [DEBUG] clck_gen.py:128 IND CLOCK 2244
2025-03-30 08:11:43 [DEBUG] clck_gen.py:128 IND CLOCK 2346
2025-03-30 08:11:43 [DEBUG] clck_gen.py:128 IND CLOCK 2448
2025-03-30 08:11:44 [DEBUG] clck_gen.py:128 IND CLOCK 2550
2025-03-30 08:11:44 [DEBUG] clck_gen.py:128 IND CLOCK 2652
2025-03-30 08:11:44 [DEBUG] clck_gen.py:128 IND CLOCK 2754
2025-03-30 08:11:45 [DEBUG] clck_gen.py:128 IND CLOCK 2856
2025-03-30 08:11:45 [DEBUG] clck_gen.py:128 IND CLOCK 2958
2025-03-30 08:11:46 [DEBUG] clck_gen.py:128 IND CLOCK 3060
2025-03-30 08:11:46 [DEBUG] clck_gen.py:128 IND CLOCK 3162
2025-03-30 08:11:47 [DEBUG] clck_gen.py:128 IND CLOCK 3264
2025-03-30 08:11:47 [DEBUG] clck_gen.py:128 IND CLOCK 3366
2025-03-30 08:11:48 [DEBUG] clck_gen.py:128 IND CLOCK 3468
2025-03-30 08:11:48 [DEBUG] clck_gen.py:128 IND CLOCK 3570
2025-03-30 08:11:49 [DEBUG] clck_gen.py:128 IND CLOCK 3672
2025-03-30 08:11:49 [DEBUG] clck_gen.py:128 IND CLOCK 3774
2025-03-30 08:11:50 [DEBUG] clck_gen.py:128 IND CLOCK 3876
2025-03-30 08:11:50 [DEBUG] clck_gen.py:128 IND CLOCK 3978
2025-03-30 08:11:51 [DEBUG] clck_gen.py:128 IND CLOCK 4080
2025-03-30 08:11:51 [DEBUG] clck_gen.py:128 IND CLOCK 4182
2025-03-30 08:11:52 [DEBUG] clck_gen.py:128 IND CLOCK 4284
2025-03-30 08:11:52 [DEBUG] clck_gen.py:128 IND CLOCK 4386
2025-03-30 08:11:52 [DEBUG] clck_gen.py:128 IND CLOCK 4488
2025-03-30 08:11:53 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 08:11:53 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 08:11:53 [INFO] transceiver.py:241 (MS@172.18.26.22:6700) Frequency hopping disabled
2025-03-30 08:11:53 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 08:11:53 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 08:11:53 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 08:11:53 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 08:11:53 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 08:11:53 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 08:11:53 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 08:11:53 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 08:11:53 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 08:11:53 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 08:11:53 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 08:11:53 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=4571 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 08:11:53 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=4571 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 08:11:53 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=4571 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 08:11:53 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=4571 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 08:11:58 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 08:11:58 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 08:11:58 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 08:11:58 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 08:11:58 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 08:11:58 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 08:11:58 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 08:11:58 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 08:11:58 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 08:11:58 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 08:11:58 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 08:11:58 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 08:11:58 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 08:11:58 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 08:11:58 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 08:11:58 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 08:11:58 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 08:11:58 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 08:11:58 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 08:11:58 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 08:11:58 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 08:11:58 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 08:11:58 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 08:11:58 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 08:11:58 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 08:11:58 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 08:11:58 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 08:11:58 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 08:11:58 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 08:11:58 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 08:11:58 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 08:11:58 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 08:11:58 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 08:11:58 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 08:11:58 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 08:11:58 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 08:11:58 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 08:11:58 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 08:11:58 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 08:11:58 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 08:11:58 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 08:11:58 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 08:11:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 08:11:58 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 08:11:58 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 08:11:58 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 08:11:58 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 08:11:58 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 08:11:58 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 08:11:58 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 08:11:58 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 08:11:58 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 08:11:58 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 08:11:58 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 08:11:58 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 08:11:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 08:11:58 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 08:11:58 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 08:11:58 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 08:11:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 08:11:58 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 08:11:58 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 08:11:58 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 08:11:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 08:11:58 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 08:11:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 08:11:58 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 08:11:58 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 08:11:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 08:11:58 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 08:11:58 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 08:11:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 08:11:58 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 08:11:58 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 08:11:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 08:11:58 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 08:11:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 08:11:58 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 08:11:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 08:11:58 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 08:11:58 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 08:11:58 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 08:11:58 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-03-30 08:11:58 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-03-30 08:11:58 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-03-30 08:11:58 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-03-30 08:11:58 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-03-30 08:11:58 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-03-30 08:11:58 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-03-30 08:11:58 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-03-30 08:11:58 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-03-30 08:11:58 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-03-30 08:11:58 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=0 bl=148 pwr=0
2025-03-30 08:11:58 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=1 bl=148 pwr=0
2025-03-30 08:11:58 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=2 bl=148 pwr=0
2025-03-30 08:11:58 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=3 bl=148 pwr=0
2025-03-30 08:11:58 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=4 bl=148 pwr=0
2025-03-30 08:11:58 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=5 bl=148 pwr=0
2025-03-30 08:11:58 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=6 bl=148 pwr=0
2025-03-30 08:11:58 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=7 bl=148 pwr=0
2025-03-30 08:11:58 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 08:11:58 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 08:11:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:11:58 [DEBUG] fake_trx.py:317 (BTS@172.18.26.20:5700) Recv FAKE_CI cmd
2025-03-30 08:11:58 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 08:11:58 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 08:11:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 08:11:58 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 08:11:58 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 08:11:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 08:11:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:11:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 08:11:58 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 08:11:58 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 08:11:58 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 08:11:58 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 08:11:58 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 08:11:58 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 08:11:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 08:11:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 08:11:59 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-03-30 08:11:59 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 08:11:59 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 08:11:59 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 08:11:59 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 08:11:59 [DEBUG] clck_gen.py:128 IND CLOCK 306
2025-03-30 08:12:00 [DEBUG] clck_gen.py:128 IND CLOCK 408
2025-03-30 08:12:00 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 08:12:00 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 08:12:00 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 08:12:00 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 08:12:00 [DEBUG] clck_gen.py:128 IND CLOCK 510
2025-03-30 08:12:01 [DEBUG] clck_gen.py:128 IND CLOCK 612
2025-03-30 08:12:01 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 08:12:01 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 08:12:01 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 08:12:01 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 08:12:01 [DEBUG] clck_gen.py:128 IND CLOCK 714
2025-03-30 08:12:02 [DEBUG] clck_gen.py:128 IND CLOCK 816
2025-03-30 08:12:02 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 08:12:02 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 08:12:02 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 08:12:02 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 08:12:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:12:02 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 08:12:02 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 08:12:02 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 08:12:02 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 08:12:02 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 08:12:02 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 08:12:02 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 08:12:02 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 08:12:02 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 08:12:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:12:02 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 08:12:02 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 08:12:02 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 08:12:02 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 08:12:02 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 08:12:02 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.26.22:6700) Recv SETFH cmd
2025-03-30 08:12:02 [INFO] transceiver.py:237 (MS@172.18.26.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2025-03-30 08:12:02 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 08:12:02 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 08:12:02 [DEBUG] clck_gen.py:128 IND CLOCK 918
2025-03-30 08:12:03 [DEBUG] clck_gen.py:128 IND CLOCK 1020
2025-03-30 08:12:03 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 08:12:03 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 08:12:03 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 08:12:03 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 08:12:03 [DEBUG] clck_gen.py:128 IND CLOCK 1122
2025-03-30 08:12:04 [DEBUG] clck_gen.py:128 IND CLOCK 1224
2025-03-30 08:12:04 [DEBUG] clck_gen.py:128 IND CLOCK 1326
2025-03-30 08:12:04 [DEBUG] clck_gen.py:128 IND CLOCK 1428
2025-03-30 08:12:05 [DEBUG] clck_gen.py:128 IND CLOCK 1530
2025-03-30 08:12:05 [DEBUG] clck_gen.py:128 IND CLOCK 1632
2025-03-30 08:12:06 [DEBUG] clck_gen.py:128 IND CLOCK 1734
2025-03-30 08:12:06 [DEBUG] clck_gen.py:128 IND CLOCK 1836
2025-03-30 08:12:07 [DEBUG] clck_gen.py:128 IND CLOCK 1938
2025-03-30 08:12:07 [DEBUG] clck_gen.py:128 IND CLOCK 2040
2025-03-30 08:12:08 [DEBUG] clck_gen.py:128 IND CLOCK 2142
2025-03-30 08:12:08 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 08:12:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:12:08 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 08:12:08 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 08:12:08 [INFO] transceiver.py:241 (MS@172.18.26.22:6700) Frequency hopping disabled
2025-03-30 08:12:08 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 08:12:08 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 08:12:08 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 08:12:08 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 08:12:08 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 08:12:08 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 08:12:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:12:08 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 08:12:08 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 08:12:08 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 08:12:08 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 08:12:08 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 08:12:08 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 08:12:08 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 08:12:08 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 08:12:08 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 08:12:08 [DEBUG] clck_gen.py:128 IND CLOCK 2244
2025-03-30 08:12:09 [DEBUG] clck_gen.py:128 IND CLOCK 2346
2025-03-30 08:12:09 [DEBUG] clck_gen.py:128 IND CLOCK 2448
2025-03-30 08:12:10 [DEBUG] clck_gen.py:128 IND CLOCK 2550
2025-03-30 08:12:10 [DEBUG] clck_gen.py:128 IND CLOCK 2652
2025-03-30 08:12:11 [DEBUG] clck_gen.py:128 IND CLOCK 2754
2025-03-30 08:12:11 [DEBUG] clck_gen.py:128 IND CLOCK 2856
2025-03-30 08:12:12 [DEBUG] clck_gen.py:128 IND CLOCK 2958
2025-03-30 08:12:12 [DEBUG] clck_gen.py:128 IND CLOCK 3060
2025-03-30 08:12:12 [DEBUG] clck_gen.py:128 IND CLOCK 3162
2025-03-30 08:12:13 [DEBUG] clck_gen.py:128 IND CLOCK 3264
2025-03-30 08:12:13 [DEBUG] clck_gen.py:128 IND CLOCK 3366
2025-03-30 08:12:14 [DEBUG] clck_gen.py:128 IND CLOCK 3468
2025-03-30 08:12:14 [DEBUG] clck_gen.py:128 IND CLOCK 3570
2025-03-30 08:12:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 08:12:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:12:15 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 08:12:15 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 08:12:15 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 08:12:15 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 08:12:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 08:12:15 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 08:12:15 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 08:12:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 08:12:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:12:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 08:12:15 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 08:12:15 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 08:12:15 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 08:12:15 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 08:12:15 [DEBUG] clck_gen.py:128 IND CLOCK 3672
2025-03-30 08:12:15 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.26.22:6700) Recv SETFH cmd
2025-03-30 08:12:15 [INFO] transceiver.py:237 (MS@172.18.26.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2025-03-30 08:12:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 08:12:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 08:12:15 [DEBUG] clck_gen.py:128 IND CLOCK 3774
2025-03-30 08:12:16 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 08:12:16 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 08:12:16 [INFO] transceiver.py:241 (MS@172.18.26.22:6700) Frequency hopping disabled
2025-03-30 08:12:16 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 08:12:16 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 08:12:16 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 08:12:16 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 08:12:16 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 08:12:16 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 08:12:16 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 08:12:16 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 08:12:16 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 08:12:16 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=3848 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 08:12:16 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 08:12:16 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 08:12:16 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=3848 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 08:12:16 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=3848 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 08:12:16 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=3848 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 08:12:16 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=3848 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 08:12:21 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 08:12:21 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 08:12:21 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 08:12:21 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 08:12:21 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 08:12:21 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 08:12:21 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 08:12:21 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 08:12:21 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 08:12:21 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 08:12:21 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 08:12:21 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 08:12:21 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 08:12:21 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 08:12:21 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 08:12:21 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 08:12:21 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 08:12:21 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 08:12:21 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 08:12:21 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 08:12:21 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 08:12:21 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 08:12:21 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 08:12:21 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 08:12:21 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 08:12:21 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 08:12:21 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 08:12:21 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 08:12:21 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 08:12:21 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 08:12:21 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 08:12:21 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 08:12:21 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 08:12:21 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 08:12:21 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 08:12:21 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 08:12:21 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 08:12:21 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 08:12:21 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 08:12:21 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 08:12:21 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 08:12:21 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 08:12:21 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 08:12:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 08:12:21 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 08:12:21 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 08:12:21 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 08:12:21 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 08:12:21 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 08:12:21 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 08:12:21 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 08:12:21 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 08:12:21 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 08:12:21 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 08:12:21 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 08:12:21 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 08:12:21 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 08:12:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 08:12:21 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 08:12:21 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 08:12:21 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 08:12:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 08:12:21 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 08:12:21 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 08:12:21 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 08:12:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 08:12:21 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 08:12:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 08:12:21 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 08:12:21 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 08:12:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 08:12:21 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 08:12:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 08:12:21 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 08:12:21 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 08:12:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 08:12:21 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 08:12:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 08:12:21 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 08:12:21 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 08:12:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 08:12:21 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 08:12:21 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-03-30 08:12:21 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-03-30 08:12:21 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=107): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-03-30 08:12:21 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=107): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-03-30 08:12:21 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=107): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-03-30 08:12:21 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=107): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-03-30 08:12:21 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=107): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-03-30 08:12:21 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=107): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-03-30 08:12:21 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-03-30 08:12:21 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-03-30 08:12:21 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=105 tn=0 bl=148 pwr=0
2025-03-30 08:12:21 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=105 tn=1 bl=148 pwr=0
2025-03-30 08:12:21 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=105 tn=2 bl=148 pwr=0
2025-03-30 08:12:21 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=105 tn=3 bl=148 pwr=0
2025-03-30 08:12:21 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=105 tn=4 bl=148 pwr=0
2025-03-30 08:12:21 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=105 tn=5 bl=148 pwr=0
2025-03-30 08:12:21 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=105 tn=6 bl=148 pwr=0
2025-03-30 08:12:21 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=105 tn=7 bl=148 pwr=0
2025-03-30 08:12:21 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=106 tn=0 bl=148 pwr=0
2025-03-30 08:12:21 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=106 tn=1 bl=148 pwr=0
2025-03-30 08:12:21 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=106 tn=2 bl=148 pwr=0
2025-03-30 08:12:21 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=106 tn=3 bl=148 pwr=0
2025-03-30 08:12:21 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=106 tn=4 bl=148 pwr=0
2025-03-30 08:12:21 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=106 tn=5 bl=148 pwr=0
2025-03-30 08:12:21 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=106 tn=6 bl=148 pwr=0
2025-03-30 08:12:21 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=106 tn=7 bl=148 pwr=0
2025-03-30 08:12:21 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=107 tn=0 bl=148 pwr=0
2025-03-30 08:12:21 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=107 tn=1 bl=148 pwr=0
2025-03-30 08:12:21 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=107 tn=2 bl=148 pwr=0
2025-03-30 08:12:21 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=107 tn=3 bl=148 pwr=0
2025-03-30 08:12:21 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=107 tn=4 bl=148 pwr=0
2025-03-30 08:12:21 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=107 tn=5 bl=148 pwr=0
2025-03-30 08:12:21 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=107 tn=6 bl=148 pwr=0
2025-03-30 08:12:21 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=108): ver=1 fn=107 tn=7 bl=148 pwr=0
2025-03-30 08:12:21 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 08:12:21 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 08:12:21 [DEBUG] fake_trx.py:317 (BTS@172.18.26.20:5700) Recv FAKE_CI cmd
2025-03-30 08:12:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:12:21 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 08:12:21 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 08:12:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 08:12:21 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 08:12:21 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 08:12:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 08:12:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:12:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 08:12:21 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 08:12:21 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 08:12:21 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 08:12:21 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 08:12:21 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 08:12:21 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 08:12:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 08:12:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 08:12:22 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-03-30 08:12:22 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 08:12:22 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 08:12:22 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 08:12:22 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 08:12:22 [DEBUG] clck_gen.py:128 IND CLOCK 306
2025-03-30 08:12:23 [DEBUG] clck_gen.py:128 IND CLOCK 408
2025-03-30 08:12:23 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 08:12:23 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 08:12:23 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 08:12:23 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 08:12:23 [DEBUG] clck_gen.py:128 IND CLOCK 510
2025-03-30 08:12:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 08:12:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:12:23 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 08:12:23 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 08:12:23 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 08:12:23 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 08:12:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 08:12:23 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 08:12:23 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 08:12:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 08:12:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:12:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 08:12:23 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 08:12:23 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 08:12:23 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 08:12:23 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 08:12:23 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.26.22:6700) Recv SETFH cmd
2025-03-30 08:12:23 [INFO] transceiver.py:237 (MS@172.18.26.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2025-03-30 08:12:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 08:12:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 08:12:23 [DEBUG] clck_gen.py:128 IND CLOCK 612
2025-03-30 08:12:24 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 08:12:24 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 08:12:24 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 08:12:24 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 08:12:24 [DEBUG] clck_gen.py:128 IND CLOCK 714
2025-03-30 08:12:24 [DEBUG] clck_gen.py:128 IND CLOCK 816
2025-03-30 08:12:25 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 08:12:25 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 08:12:25 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 08:12:25 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 08:12:25 [DEBUG] clck_gen.py:128 IND CLOCK 918
2025-03-30 08:12:25 [DEBUG] clck_gen.py:128 IND CLOCK 1020
2025-03-30 08:12:26 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 08:12:26 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 08:12:26 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 08:12:26 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 08:12:26 [DEBUG] clck_gen.py:128 IND CLOCK 1122
2025-03-30 08:12:26 [DEBUG] clck_gen.py:128 IND CLOCK 1224
2025-03-30 08:12:27 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 08:12:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:12:27 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 08:12:27 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 08:12:27 [INFO] transceiver.py:241 (MS@172.18.26.22:6700) Frequency hopping disabled
2025-03-30 08:12:27 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 08:12:27 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 08:12:27 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 08:12:27 [DEBUG] clck_gen.py:128 IND CLOCK 1326
2025-03-30 08:12:27 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 08:12:27 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 08:12:27 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 08:12:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:12:27 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 08:12:27 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 08:12:27 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 08:12:27 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 08:12:27 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 08:12:27 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 08:12:27 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 08:12:27 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 08:12:27 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 08:12:27 [DEBUG] clck_gen.py:128 IND CLOCK 1428
2025-03-30 08:12:28 [DEBUG] clck_gen.py:128 IND CLOCK 1530
2025-03-30 08:12:28 [DEBUG] clck_gen.py:128 IND CLOCK 1632
2025-03-30 08:12:29 [DEBUG] clck_gen.py:128 IND CLOCK 1734
2025-03-30 08:12:29 [DEBUG] clck_gen.py:128 IND CLOCK 1836
2025-03-30 08:12:30 [DEBUG] clck_gen.py:128 IND CLOCK 1938
2025-03-30 08:12:30 [DEBUG] clck_gen.py:128 IND CLOCK 2040
2025-03-30 08:12:31 [DEBUG] clck_gen.py:128 IND CLOCK 2142
2025-03-30 08:12:31 [DEBUG] clck_gen.py:128 IND CLOCK 2244
2025-03-30 08:12:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 08:12:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:12:31 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 08:12:31 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 08:12:31 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 08:12:31 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 08:12:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 08:12:31 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 08:12:31 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 08:12:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 08:12:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:12:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 08:12:31 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 08:12:31 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 08:12:31 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 08:12:31 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 08:12:31 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.26.22:6700) Recv SETFH cmd
2025-03-30 08:12:31 [INFO] transceiver.py:237 (MS@172.18.26.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2025-03-30 08:12:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 08:12:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 08:12:31 [DEBUG] clck_gen.py:128 IND CLOCK 2346
2025-03-30 08:12:32 [DEBUG] clck_gen.py:128 IND CLOCK 2448
2025-03-30 08:12:32 [DEBUG] clck_gen.py:128 IND CLOCK 2550
2025-03-30 08:12:33 [DEBUG] clck_gen.py:128 IND CLOCK 2652
2025-03-30 08:12:33 [DEBUG] clck_gen.py:128 IND CLOCK 2754
2025-03-30 08:12:34 [DEBUG] clck_gen.py:128 IND CLOCK 2856
2025-03-30 08:12:34 [DEBUG] clck_gen.py:128 IND CLOCK 2958
2025-03-30 08:12:35 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 08:12:35 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 08:12:35 [INFO] transceiver.py:241 (MS@172.18.26.22:6700) Frequency hopping disabled
2025-03-30 08:12:35 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 08:12:35 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 08:12:35 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 08:12:35 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 08:12:35 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 08:12:35 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 08:12:35 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 08:12:35 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 08:12:35 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 08:12:35 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 08:12:35 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 08:12:40 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 08:12:40 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 08:12:40 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 08:12:40 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 08:12:40 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 08:12:40 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 08:12:40 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 08:12:40 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 08:12:40 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 08:12:40 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 08:12:40 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 08:12:40 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 08:12:40 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 08:12:40 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 08:12:40 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 08:12:40 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 08:12:40 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 08:12:40 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 08:12:40 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 08:12:40 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 08:12:40 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 08:12:40 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 08:12:40 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 08:12:40 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 08:12:40 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 08:12:40 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 08:12:40 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 08:12:40 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 08:12:40 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 08:12:40 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 08:12:40 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 08:12:40 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 08:12:40 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 08:12:40 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 08:12:40 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 08:12:40 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 08:12:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 08:12:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 08:12:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 08:12:40 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 08:12:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 08:12:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 08:12:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 08:12:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 08:12:40 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 08:12:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 08:12:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 08:12:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 08:12:40 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 08:12:40 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 08:12:40 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 08:12:40 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 08:12:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 08:12:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 08:12:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 08:12:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 08:12:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 08:12:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 08:12:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 08:12:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 08:12:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 08:12:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 08:12:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 08:12:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 08:12:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 08:12:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 08:12:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 08:12:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 08:12:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 08:12:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 08:12:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 08:12:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 08:12:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 08:12:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 08:12:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 08:12:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 08:12:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 08:12:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 08:12:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 08:12:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 08:12:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 08:12:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 08:12:40 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-03-30 08:12:40 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-03-30 08:12:40 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=107): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-03-30 08:12:40 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=107): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-03-30 08:12:40 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=107): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-03-30 08:12:40 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=107): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-03-30 08:12:40 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=107): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-03-30 08:12:40 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=107): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-03-30 08:12:40 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=107): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-03-30 08:12:40 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=107): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-03-30 08:12:40 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=107): ver=1 fn=105 tn=0 bl=148 pwr=0
2025-03-30 08:12:40 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=107): ver=1 fn=105 tn=1 bl=148 pwr=0
2025-03-30 08:12:40 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=107): ver=1 fn=105 tn=2 bl=148 pwr=0
2025-03-30 08:12:40 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=107): ver=1 fn=105 tn=3 bl=148 pwr=0
2025-03-30 08:12:40 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=107): ver=1 fn=105 tn=4 bl=148 pwr=0
2025-03-30 08:12:40 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=107): ver=1 fn=105 tn=5 bl=148 pwr=0
2025-03-30 08:12:40 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=107): ver=1 fn=105 tn=6 bl=148 pwr=0
2025-03-30 08:12:40 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=107): ver=1 fn=105 tn=7 bl=148 pwr=0
2025-03-30 08:12:40 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=107): ver=1 fn=106 tn=0 bl=148 pwr=0
2025-03-30 08:12:40 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=107): ver=1 fn=106 tn=1 bl=148 pwr=0
2025-03-30 08:12:40 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=107): ver=1 fn=106 tn=2 bl=148 pwr=0
2025-03-30 08:12:40 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=107): ver=1 fn=106 tn=3 bl=148 pwr=0
2025-03-30 08:12:40 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=107): ver=1 fn=106 tn=4 bl=148 pwr=0
2025-03-30 08:12:40 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=107): ver=1 fn=106 tn=5 bl=148 pwr=0
2025-03-30 08:12:40 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=107): ver=1 fn=106 tn=6 bl=148 pwr=0
2025-03-30 08:12:40 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=107): ver=1 fn=106 tn=7 bl=148 pwr=0
2025-03-30 08:12:40 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 08:12:40 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 08:12:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:12:40 [DEBUG] fake_trx.py:317 (BTS@172.18.26.20:5700) Recv FAKE_CI cmd
2025-03-30 08:12:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:12:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:12:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:12:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:12:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:12:41 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-03-30 08:12:41 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 08:12:41 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 08:12:41 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 08:12:41 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 08:12:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:12:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:12:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:12:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:12:41 [DEBUG] clck_gen.py:128 IND CLOCK 306
2025-03-30 08:12:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:12:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:12:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:12:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:12:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:12:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:12:42 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 08:12:42 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 08:12:42 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 08:12:42 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 08:12:42 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 08:12:42 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 08:12:42 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 08:12:42 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 08:12:42 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 08:12:42 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 08:12:42 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 08:12:47 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 08:12:47 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 08:12:47 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 08:12:47 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 08:12:47 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 08:12:47 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 08:12:47 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 08:12:47 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 08:12:47 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 08:12:47 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 08:12:47 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 08:12:47 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 08:12:47 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 08:12:47 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 08:12:47 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 08:12:47 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 08:12:47 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 08:12:47 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 08:12:47 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 08:12:47 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 08:12:47 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 08:12:47 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 08:12:47 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 08:12:47 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 08:12:47 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 08:12:47 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 08:12:47 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 08:12:47 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 08:12:47 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 08:12:47 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 08:12:47 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 08:12:47 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 08:12:47 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 08:12:47 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 08:12:47 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 08:12:47 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 08:12:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 08:12:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 08:12:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 08:12:47 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 08:12:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 08:12:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 08:12:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 08:12:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 08:12:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 08:12:47 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 08:12:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 08:12:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 08:12:47 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 08:12:47 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 08:12:47 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 08:12:47 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 08:12:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 08:12:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 08:12:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 08:12:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 08:12:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 08:12:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 08:12:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 08:12:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 08:12:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 08:12:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 08:12:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 08:12:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 08:12:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 08:12:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 08:12:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 08:12:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 08:12:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 08:12:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 08:12:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 08:12:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 08:12:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 08:12:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 08:12:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 08:12:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 08:12:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 08:12:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 08:12:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 08:12:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 08:12:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 08:12:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 08:12:47 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-03-30 08:12:47 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-03-30 08:12:47 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-03-30 08:12:47 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-03-30 08:12:47 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-03-30 08:12:47 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-03-30 08:12:47 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-03-30 08:12:47 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-03-30 08:12:47 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-03-30 08:12:47 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-03-30 08:12:47 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=0 bl=148 pwr=0
2025-03-30 08:12:47 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=1 bl=148 pwr=0
2025-03-30 08:12:47 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=2 bl=148 pwr=0
2025-03-30 08:12:47 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=3 bl=148 pwr=0
2025-03-30 08:12:47 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=4 bl=148 pwr=0
2025-03-30 08:12:47 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=5 bl=148 pwr=0
2025-03-30 08:12:47 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=6 bl=148 pwr=0
2025-03-30 08:12:47 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=7 bl=148 pwr=0
2025-03-30 08:12:47 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 08:12:47 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 08:12:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:12:47 [DEBUG] fake_trx.py:317 (BTS@172.18.26.20:5700) Recv FAKE_CI cmd
2025-03-30 08:12:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:12:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:12:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:12:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:12:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:12:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:12:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:12:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:12:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:12:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:12:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:12:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:12:48 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-03-30 08:12:48 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 08:12:48 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 08:12:48 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 08:12:48 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 08:12:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:12:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:12:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:12:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:12:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:12:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:12:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:12:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:12:48 [DEBUG] clck_gen.py:128 IND CLOCK 306
2025-03-30 08:12:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:12:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:12:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:12:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:12:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:12:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:12:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:12:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:12:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:12:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:12:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:12:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:12:48 [DEBUG] clck_gen.py:128 IND CLOCK 408
2025-03-30 08:12:48 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 08:12:48 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 08:12:48 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 08:12:48 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 08:12:48 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 08:12:48 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 08:12:48 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 08:12:48 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 08:12:48 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 08:12:48 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 08:12:48 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 08:12:53 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 08:12:53 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 08:12:53 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 08:12:53 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 08:12:53 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 08:12:53 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 08:12:53 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 08:12:53 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 08:12:53 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 08:12:53 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 08:12:53 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 08:12:53 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 08:12:53 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 08:12:53 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 08:12:53 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 08:12:53 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 08:12:53 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 08:12:53 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 08:12:53 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 08:12:53 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 08:12:53 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 08:12:53 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 08:12:53 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 08:12:53 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 08:12:53 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 08:12:53 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 08:12:53 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 08:12:53 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 08:12:53 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 08:12:53 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 08:12:53 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 08:12:53 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 08:12:53 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 08:12:53 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 08:12:53 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 08:12:53 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 08:12:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 08:12:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 08:12:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 08:12:53 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 08:12:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 08:12:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 08:12:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 08:12:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 08:12:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 08:12:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 08:12:53 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 08:12:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 08:12:53 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 08:12:53 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 08:12:53 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 08:12:53 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 08:12:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 08:12:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 08:12:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 08:12:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 08:12:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 08:12:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 08:12:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 08:12:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 08:12:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 08:12:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 08:12:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 08:12:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 08:12:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 08:12:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 08:12:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 08:12:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 08:12:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 08:12:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 08:12:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 08:12:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 08:12:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 08:12:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 08:12:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 08:12:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 08:12:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 08:12:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 08:12:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 08:12:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 08:12:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 08:12:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 08:12:53 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-03-30 08:12:54 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-03-30 08:12:54 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-03-30 08:12:54 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-03-30 08:12:54 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-03-30 08:12:54 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-03-30 08:12:54 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-03-30 08:12:54 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-03-30 08:12:54 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-03-30 08:12:54 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-03-30 08:12:54 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 08:12:54 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 08:12:54 [DEBUG] fake_trx.py:317 (BTS@172.18.26.20:5700) Recv FAKE_CI cmd
2025-03-30 08:12:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:12:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:12:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:12:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:12:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:12:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:12:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:12:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:12:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:12:54 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-03-30 08:12:54 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 08:12:54 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 08:12:54 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 08:12:54 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 08:12:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:12:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:12:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:12:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:12:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:12:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:12:55 [DEBUG] clck_gen.py:128 IND CLOCK 306
2025-03-30 08:12:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:12:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:12:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:12:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:12:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:12:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:12:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:12:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:12:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:12:55 [DEBUG] clck_gen.py:128 IND CLOCK 408
2025-03-30 08:12:55 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 08:12:55 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 08:12:55 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 08:12:55 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 08:12:55 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 08:12:55 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 08:12:55 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 08:12:55 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 08:12:55 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 08:12:55 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 08:12:55 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 08:13:00 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 08:13:00 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 08:13:00 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 08:13:00 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 08:13:00 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 08:13:00 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 08:13:00 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 08:13:00 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 08:13:00 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 08:13:00 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 08:13:00 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 08:13:00 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 08:13:00 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 08:13:00 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 08:13:00 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 08:13:00 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 08:13:00 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 08:13:00 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 08:13:00 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 08:13:00 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 08:13:00 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 08:13:00 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 08:13:00 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 08:13:00 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 08:13:00 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 08:13:00 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 08:13:00 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 08:13:00 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 08:13:00 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 08:13:00 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 08:13:00 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 08:13:00 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 08:13:00 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 08:13:00 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 08:13:00 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 08:13:00 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 08:13:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 08:13:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 08:13:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 08:13:00 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 08:13:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 08:13:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 08:13:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 08:13:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 08:13:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 08:13:00 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 08:13:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 08:13:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 08:13:00 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 08:13:00 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 08:13:00 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 08:13:00 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 08:13:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 08:13:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 08:13:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 08:13:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 08:13:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 08:13:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 08:13:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 08:13:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 08:13:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 08:13:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 08:13:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 08:13:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 08:13:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 08:13:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 08:13:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 08:13:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 08:13:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 08:13:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 08:13:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 08:13:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 08:13:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 08:13:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 08:13:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 08:13:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 08:13:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 08:13:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 08:13:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 08:13:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 08:13:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 08:13:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 08:13:00 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-03-30 08:13:01 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-03-30 08:13:01 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-03-30 08:13:01 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-03-30 08:13:01 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-03-30 08:13:01 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-03-30 08:13:01 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-03-30 08:13:01 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-03-30 08:13:01 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-03-30 08:13:01 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-03-30 08:13:01 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=0 bl=148 pwr=0
2025-03-30 08:13:01 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=1 bl=148 pwr=0
2025-03-30 08:13:01 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=2 bl=148 pwr=0
2025-03-30 08:13:01 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=3 bl=148 pwr=0
2025-03-30 08:13:01 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=4 bl=148 pwr=0
2025-03-30 08:13:01 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=5 bl=148 pwr=0
2025-03-30 08:13:01 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=6 bl=148 pwr=0
2025-03-30 08:13:01 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=7 bl=148 pwr=0
2025-03-30 08:13:01 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 08:13:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:13:01 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 08:13:01 [DEBUG] fake_trx.py:317 (BTS@172.18.26.20:5700) Recv FAKE_CI cmd
2025-03-30 08:13:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:13:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:13:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:13:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:13:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:13:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:13:01 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-03-30 08:13:01 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 08:13:01 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 08:13:01 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 08:13:01 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 08:13:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:13:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:13:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:13:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:13:02 [DEBUG] clck_gen.py:128 IND CLOCK 306
2025-03-30 08:13:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:13:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:13:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:13:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:13:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:13:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:13:02 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 08:13:02 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 08:13:02 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 08:13:02 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 08:13:02 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 08:13:02 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 08:13:02 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 08:13:02 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 08:13:02 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 08:13:02 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 08:13:02 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 08:13:07 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 08:13:07 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 08:13:07 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 08:13:07 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 08:13:07 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 08:13:07 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 08:13:07 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 08:13:07 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 08:13:07 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 08:13:07 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 08:13:07 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 08:13:07 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 08:13:07 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 08:13:07 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 08:13:07 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 08:13:07 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 08:13:07 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 08:13:07 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 08:13:07 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 08:13:07 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 08:13:07 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 08:13:07 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 08:13:07 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 08:13:07 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 08:13:07 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 08:13:07 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 08:13:07 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 08:13:07 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 08:13:07 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 08:13:07 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 08:13:07 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 08:13:07 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 08:13:07 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 08:13:07 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 08:13:07 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 08:13:07 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 08:13:07 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 08:13:07 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 08:13:07 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 08:13:07 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 08:13:07 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 08:13:07 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 08:13:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 08:13:07 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 08:13:07 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 08:13:07 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 08:13:07 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 08:13:07 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 08:13:07 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 08:13:07 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 08:13:07 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 08:13:07 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 08:13:07 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 08:13:07 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 08:13:07 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 08:13:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 08:13:07 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 08:13:07 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 08:13:07 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 08:13:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 08:13:07 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 08:13:07 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 08:13:07 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 08:13:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 08:13:07 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 08:13:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 08:13:07 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 08:13:07 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 08:13:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 08:13:07 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 08:13:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 08:13:07 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 08:13:07 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 08:13:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 08:13:07 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 08:13:07 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 08:13:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 08:13:07 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 08:13:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 08:13:07 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 08:13:07 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 08:13:07 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 08:13:07 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-03-30 08:13:08 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-03-30 08:13:08 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-03-30 08:13:08 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-03-30 08:13:08 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-03-30 08:13:08 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-03-30 08:13:08 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-03-30 08:13:08 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-03-30 08:13:08 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-03-30 08:13:08 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-03-30 08:13:08 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=0 bl=148 pwr=0
2025-03-30 08:13:08 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=1 bl=148 pwr=0
2025-03-30 08:13:08 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=2 bl=148 pwr=0
2025-03-30 08:13:08 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=3 bl=148 pwr=0
2025-03-30 08:13:08 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=4 bl=148 pwr=0
2025-03-30 08:13:08 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=5 bl=148 pwr=0
2025-03-30 08:13:08 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=6 bl=148 pwr=0
2025-03-30 08:13:08 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=7 bl=148 pwr=0
2025-03-30 08:13:08 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 08:13:08 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 08:13:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:13:08 [DEBUG] fake_trx.py:317 (BTS@172.18.26.20:5700) Recv FAKE_CI cmd
2025-03-30 08:13:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 08:13:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:13:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:13:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:13:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:13:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:13:08 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-03-30 08:13:08 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 08:13:08 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 08:13:08 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 08:13:08 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 08:13:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:13:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:13:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:13:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:13:09 [DEBUG] clck_gen.py:128 IND CLOCK 306
2025-03-30 08:13:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:13:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:13:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:13:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:13:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:13:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:13:09 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 08:13:09 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 08:13:09 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 08:13:09 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 08:13:09 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 08:13:09 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 08:13:09 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 08:13:09 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 08:13:09 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 08:13:09 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 08:13:09 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 08:13:14 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 08:13:14 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 08:13:14 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 08:13:14 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 08:13:14 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 08:13:14 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 08:13:14 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 08:13:14 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 08:13:14 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 08:13:14 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 08:13:14 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 08:13:14 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 08:13:14 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 08:13:14 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 08:13:14 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 08:13:14 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 08:13:14 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 08:13:14 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 08:13:14 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 08:13:14 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 08:13:14 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 08:13:14 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 08:13:14 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 08:13:14 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 08:13:14 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 08:13:14 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 08:13:14 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 08:13:14 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 08:13:14 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 08:13:14 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 08:13:14 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 08:13:14 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 08:13:14 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 08:13:14 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 08:13:14 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 08:13:14 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 08:13:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 08:13:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 08:13:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 08:13:14 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 08:13:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 08:13:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 08:13:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 08:13:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 08:13:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 08:13:14 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 08:13:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 08:13:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 08:13:14 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 08:13:14 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 08:13:14 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 08:13:14 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 08:13:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 08:13:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 08:13:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 08:13:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 08:13:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 08:13:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 08:13:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 08:13:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 08:13:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 08:13:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 08:13:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 08:13:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 08:13:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 08:13:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 08:13:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 08:13:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 08:13:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 08:13:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 08:13:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 08:13:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 08:13:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 08:13:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 08:13:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 08:13:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 08:13:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 08:13:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 08:13:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 08:13:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 08:13:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 08:13:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 08:13:14 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-03-30 08:13:15 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-03-30 08:13:15 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-03-30 08:13:15 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-03-30 08:13:15 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-03-30 08:13:15 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-03-30 08:13:15 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-03-30 08:13:15 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-03-30 08:13:15 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-03-30 08:13:15 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-03-30 08:13:15 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=0 bl=148 pwr=0
2025-03-30 08:13:15 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=1 bl=148 pwr=0
2025-03-30 08:13:15 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=2 bl=148 pwr=0
2025-03-30 08:13:15 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=3 bl=148 pwr=0
2025-03-30 08:13:15 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=4 bl=148 pwr=0
2025-03-30 08:13:15 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=5 bl=148 pwr=0
2025-03-30 08:13:15 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=6 bl=148 pwr=0
2025-03-30 08:13:15 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=7 bl=148 pwr=0
2025-03-30 08:13:15 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 08:13:15 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 08:13:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:13:15 [DEBUG] fake_trx.py:317 (BTS@172.18.26.20:5700) Recv FAKE_CI cmd
2025-03-30 08:13:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 08:13:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:13:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:13:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:13:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:13:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:13:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:13:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:13:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:13:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:13:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:13:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:13:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:13:15 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-03-30 08:13:15 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 08:13:15 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 08:13:15 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 08:13:15 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 08:13:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:13:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:13:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:13:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:13:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:13:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:13:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:13:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:13:16 [DEBUG] clck_gen.py:128 IND CLOCK 306
2025-03-30 08:13:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:13:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:13:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:13:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:13:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:13:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:13:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:13:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:13:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:13:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:13:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:13:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:13:16 [DEBUG] clck_gen.py:128 IND CLOCK 408
2025-03-30 08:13:16 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 08:13:16 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 08:13:16 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 08:13:16 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 08:13:16 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 08:13:16 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 08:13:16 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 08:13:16 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 08:13:16 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 08:13:16 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 08:13:16 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 08:13:16 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=412 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 08:13:16 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=412 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 08:13:16 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=412 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 08:13:16 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=412 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 08:13:16 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=412 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 08:13:16 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=412 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 08:13:16 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=412 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 08:13:21 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 08:13:21 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 08:13:21 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 08:13:21 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 08:13:21 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 08:13:21 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 08:13:21 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 08:13:21 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 08:13:21 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 08:13:21 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 08:13:21 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 08:13:21 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 08:13:21 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 08:13:21 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 08:13:21 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 08:13:21 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 08:13:21 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 08:13:21 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 08:13:21 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 08:13:21 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 08:13:21 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 08:13:21 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 08:13:21 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 08:13:21 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 08:13:21 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 08:13:21 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 08:13:21 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 08:13:21 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 08:13:21 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 08:13:21 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 08:13:21 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 08:13:21 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 08:13:21 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 08:13:21 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 08:13:21 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 08:13:21 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 08:13:21 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 08:13:21 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 08:13:21 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 08:13:21 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 08:13:21 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 08:13:21 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 08:13:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 08:13:21 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 08:13:21 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 08:13:21 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 08:13:21 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 08:13:21 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 08:13:21 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 08:13:21 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 08:13:21 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 08:13:21 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 08:13:21 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 08:13:21 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 08:13:21 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 08:13:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 08:13:21 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 08:13:21 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 08:13:21 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 08:13:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 08:13:21 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 08:13:21 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 08:13:21 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 08:13:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 08:13:21 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 08:13:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 08:13:21 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 08:13:21 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 08:13:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 08:13:21 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 08:13:21 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 08:13:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 08:13:21 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 08:13:21 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 08:13:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 08:13:21 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 08:13:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 08:13:21 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 08:13:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 08:13:21 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 08:13:21 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 08:13:21 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 08:13:21 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-03-30 08:13:21 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-03-30 08:13:22 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-03-30 08:13:22 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-03-30 08:13:22 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-03-30 08:13:22 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-03-30 08:13:22 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-03-30 08:13:22 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-03-30 08:13:22 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-03-30 08:13:22 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-03-30 08:13:22 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=0 bl=148 pwr=0
2025-03-30 08:13:22 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=1 bl=148 pwr=0
2025-03-30 08:13:22 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=2 bl=148 pwr=0
2025-03-30 08:13:22 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=3 bl=148 pwr=0
2025-03-30 08:13:22 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=4 bl=148 pwr=0
2025-03-30 08:13:22 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=5 bl=148 pwr=0
2025-03-30 08:13:22 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=6 bl=148 pwr=0
2025-03-30 08:13:22 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=7 bl=148 pwr=0
2025-03-30 08:13:22 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 08:13:22 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 08:13:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:13:22 [DEBUG] fake_trx.py:317 (BTS@172.18.26.20:5700) Recv FAKE_CI cmd
2025-03-30 08:13:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 08:13:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:13:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:13:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:13:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:13:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:13:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:13:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:13:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:13:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:13:22 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-03-30 08:13:22 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 08:13:22 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 08:13:22 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 08:13:22 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 08:13:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:13:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:13:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:13:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:13:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:13:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:13:22 [DEBUG] clck_gen.py:128 IND CLOCK 306
2025-03-30 08:13:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:13:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:13:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:13:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:13:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:13:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:13:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:13:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:13:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:13:23 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 08:13:23 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 08:13:23 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 08:13:23 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 08:13:23 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 08:13:23 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 08:13:23 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 08:13:23 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 08:13:23 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 08:13:23 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 08:13:23 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 08:13:28 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 08:13:28 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 08:13:28 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 08:13:28 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 08:13:28 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 08:13:28 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 08:13:28 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 08:13:28 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 08:13:28 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 08:13:28 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 08:13:28 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 08:13:28 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 08:13:28 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 08:13:28 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 08:13:28 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 08:13:28 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 08:13:28 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 08:13:28 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 08:13:28 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 08:13:28 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 08:13:28 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 08:13:28 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 08:13:28 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 08:13:28 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 08:13:28 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 08:13:28 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 08:13:28 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 08:13:28 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 08:13:28 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 08:13:28 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 08:13:28 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 08:13:28 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 08:13:28 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 08:13:28 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 08:13:28 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 08:13:28 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 08:13:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 08:13:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 08:13:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 08:13:28 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 08:13:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 08:13:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 08:13:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 08:13:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 08:13:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 08:13:28 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 08:13:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 08:13:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 08:13:28 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 08:13:28 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 08:13:28 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 08:13:28 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 08:13:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 08:13:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 08:13:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 08:13:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 08:13:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 08:13:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 08:13:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 08:13:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 08:13:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 08:13:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 08:13:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 08:13:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 08:13:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 08:13:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 08:13:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 08:13:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 08:13:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 08:13:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 08:13:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 08:13:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 08:13:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 08:13:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 08:13:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 08:13:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 08:13:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 08:13:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 08:13:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 08:13:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 08:13:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 08:13:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 08:13:28 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-03-30 08:13:28 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-03-30 08:13:28 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-03-30 08:13:28 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-03-30 08:13:28 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-03-30 08:13:28 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-03-30 08:13:28 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-03-30 08:13:28 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-03-30 08:13:28 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-03-30 08:13:28 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-03-30 08:13:28 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=0 bl=148 pwr=0
2025-03-30 08:13:28 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=1 bl=148 pwr=0
2025-03-30 08:13:28 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=2 bl=148 pwr=0
2025-03-30 08:13:28 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=3 bl=148 pwr=0
2025-03-30 08:13:28 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=4 bl=148 pwr=0
2025-03-30 08:13:28 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=5 bl=148 pwr=0
2025-03-30 08:13:28 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=6 bl=148 pwr=0
2025-03-30 08:13:28 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=7 bl=148 pwr=0
2025-03-30 08:13:28 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 08:13:28 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 08:13:28 [DEBUG] fake_trx.py:317 (BTS@172.18.26.20:5700) Recv FAKE_CI cmd
2025-03-30 08:13:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:13:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:13:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:13:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:13:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:13:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:13:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:13:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:13:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:13:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:13:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:13:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:13:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:13:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:13:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:13:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:13:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:13:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:13:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:13:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:13:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:13:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:13:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:13:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:13:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:13:29 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 08:13:29 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 08:13:29 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 08:13:29 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 08:13:29 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 08:13:29 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 08:13:29 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 08:13:29 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 08:13:29 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 08:13:29 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 08:13:29 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=133 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 08:13:29 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 08:13:29 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=133 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 08:13:29 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=133 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 08:13:29 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=133 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 08:13:29 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=133 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 08:13:29 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=133 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 08:13:29 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=133 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 08:13:29 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=133 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 08:13:34 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 08:13:34 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 08:13:34 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 08:13:34 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 08:13:34 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 08:13:34 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 08:13:34 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 08:13:34 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 08:13:34 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 08:13:34 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 08:13:34 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 08:13:34 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 08:13:34 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 08:13:34 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 08:13:34 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 08:13:34 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 08:13:34 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 08:13:34 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 08:13:34 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 08:13:34 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 08:13:34 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 08:13:34 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 08:13:34 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 08:13:34 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 08:13:34 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 08:13:34 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 08:13:34 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 08:13:34 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 08:13:34 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 08:13:34 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 08:13:34 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 08:13:34 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 08:13:34 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 08:13:34 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 08:13:34 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 08:13:34 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 08:13:34 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 08:13:34 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 08:13:34 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 08:13:34 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 08:13:34 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 08:13:34 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 08:13:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 08:13:34 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 08:13:34 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 08:13:34 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 08:13:34 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 08:13:34 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 08:13:34 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 08:13:34 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 08:13:34 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 08:13:34 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 08:13:34 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 08:13:34 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 08:13:34 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 08:13:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 08:13:34 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 08:13:34 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 08:13:34 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 08:13:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 08:13:34 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 08:13:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 08:13:34 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 08:13:34 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 08:13:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 08:13:34 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 08:13:34 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 08:13:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 08:13:34 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 08:13:34 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 08:13:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 08:13:34 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 08:13:34 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 08:13:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 08:13:34 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 08:13:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 08:13:34 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 08:13:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 08:13:34 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 08:13:34 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 08:13:34 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 08:13:34 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 08:13:34 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-03-30 08:13:34 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-03-30 08:13:34 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-03-30 08:13:34 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-03-30 08:13:34 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-03-30 08:13:34 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-03-30 08:13:34 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-03-30 08:13:34 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-03-30 08:13:34 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-03-30 08:13:34 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-03-30 08:13:34 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=0 bl=148 pwr=0
2025-03-30 08:13:34 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=1 bl=148 pwr=0
2025-03-30 08:13:34 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=2 bl=148 pwr=0
2025-03-30 08:13:34 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=3 bl=148 pwr=0
2025-03-30 08:13:34 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=4 bl=148 pwr=0
2025-03-30 08:13:34 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=5 bl=148 pwr=0
2025-03-30 08:13:34 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=6 bl=148 pwr=0
2025-03-30 08:13:34 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=7 bl=148 pwr=0
2025-03-30 08:13:34 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 08:13:34 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 08:13:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:13:34 [DEBUG] fake_trx.py:317 (BTS@172.18.26.20:5700) Recv FAKE_CI cmd
2025-03-30 08:13:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:13:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:13:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:13:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:13:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:13:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:13:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:13:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:13:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:13:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:13:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:13:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:13:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:13:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:13:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:13:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:13:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:13:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:13:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:13:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:13:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:13:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:13:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:13:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:13:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:13:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:13:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:13:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:13:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:13:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:13:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:13:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:13:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:13:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:13:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:13:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:13:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:13:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:13:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:13:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:13:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:13:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:13:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:13:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:13:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:13:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:13:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:13:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:13:34 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 08:13:34 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 08:13:34 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 08:13:34 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 08:13:34 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 08:13:34 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 08:13:34 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 08:13:34 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 08:13:34 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 08:13:34 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 08:13:34 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 08:13:39 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 08:13:39 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 08:13:39 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 08:13:39 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 08:13:39 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 08:13:39 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 08:13:39 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 08:13:39 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 08:13:39 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 08:13:39 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 08:13:39 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 08:13:39 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 08:13:39 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 08:13:39 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 08:13:39 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 08:13:39 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 08:13:39 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 08:13:39 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 08:13:39 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 08:13:39 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 08:13:39 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 08:13:39 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 08:13:39 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 08:13:39 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 08:13:39 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 08:13:39 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 08:13:39 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 08:13:39 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 08:13:39 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 08:13:39 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 08:13:39 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 08:13:39 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 08:13:39 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 08:13:39 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 08:13:39 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 08:13:39 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 08:13:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 08:13:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 08:13:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 08:13:39 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 08:13:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 08:13:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 08:13:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 08:13:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 08:13:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 08:13:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 08:13:39 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 08:13:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 08:13:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 08:13:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 08:13:39 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 08:13:39 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 08:13:39 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 08:13:39 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 08:13:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 08:13:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 08:13:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 08:13:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 08:13:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 08:13:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 08:13:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 08:13:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 08:13:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 08:13:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 08:13:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 08:13:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 08:13:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 08:13:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 08:13:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 08:13:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 08:13:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 08:13:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 08:13:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 08:13:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 08:13:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 08:13:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 08:13:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 08:13:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 08:13:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 08:13:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 08:13:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 08:13:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 08:13:39 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-03-30 08:13:40 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-03-30 08:13:40 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-03-30 08:13:40 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-03-30 08:13:40 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-03-30 08:13:40 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-03-30 08:13:40 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-03-30 08:13:40 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-03-30 08:13:40 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-03-30 08:13:40 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-03-30 08:13:40 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=0 bl=148 pwr=0
2025-03-30 08:13:40 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=1 bl=148 pwr=0
2025-03-30 08:13:40 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=2 bl=148 pwr=0
2025-03-30 08:13:40 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=3 bl=148 pwr=0
2025-03-30 08:13:40 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=4 bl=148 pwr=0
2025-03-30 08:13:40 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=5 bl=148 pwr=0
2025-03-30 08:13:40 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=6 bl=148 pwr=0
2025-03-30 08:13:40 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=7 bl=148 pwr=0
2025-03-30 08:13:40 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 08:13:40 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 08:13:40 [DEBUG] fake_trx.py:317 (BTS@172.18.26.20:5700) Recv FAKE_CI cmd
2025-03-30 08:13:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:13:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:13:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:13:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:13:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:13:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:13:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:13:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:13:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:13:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:13:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:13:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:13:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:13:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:13:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:13:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:13:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:13:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:13:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:13:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:13:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:13:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:13:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:13:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:13:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:13:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:13:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:13:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:13:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:13:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:13:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:13:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:13:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:13:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:13:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:13:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:13:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:13:40 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 08:13:40 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 08:13:40 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 08:13:40 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 08:13:40 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 08:13:40 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 08:13:40 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 08:13:40 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 08:13:40 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 08:13:40 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 08:13:40 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 08:13:45 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 08:13:45 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 08:13:45 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 08:13:45 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 08:13:45 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 08:13:45 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 08:13:45 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 08:13:45 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 08:13:45 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 08:13:45 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 08:13:45 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 08:13:45 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 08:13:45 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 08:13:45 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 08:13:45 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 08:13:45 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 08:13:45 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 08:13:45 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 08:13:45 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 08:13:45 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 08:13:45 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 08:13:45 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 08:13:45 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 08:13:45 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 08:13:45 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 08:13:45 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 08:13:45 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 08:13:45 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 08:13:45 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 08:13:45 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 08:13:45 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 08:13:45 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 08:13:45 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 08:13:45 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 08:13:45 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 08:13:45 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 08:13:45 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 08:13:45 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 08:13:45 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 08:13:45 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 08:13:45 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 08:13:45 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 08:13:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 08:13:45 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 08:13:45 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 08:13:45 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 08:13:45 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 08:13:45 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 08:13:45 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 08:13:45 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 08:13:45 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 08:13:45 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 08:13:45 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 08:13:45 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 08:13:45 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 08:13:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 08:13:45 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 08:13:45 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 08:13:45 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 08:13:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 08:13:45 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 08:13:45 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 08:13:45 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 08:13:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 08:13:45 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 08:13:45 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 08:13:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 08:13:45 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 08:13:45 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 08:13:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 08:13:45 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 08:13:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 08:13:45 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 08:13:45 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 08:13:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 08:13:45 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 08:13:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 08:13:45 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 08:13:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 08:13:45 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 08:13:45 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 08:13:45 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 08:13:45 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-03-30 08:13:45 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-03-30 08:13:45 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-03-30 08:13:45 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-03-30 08:13:45 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-03-30 08:13:45 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-03-30 08:13:45 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-03-30 08:13:45 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-03-30 08:13:45 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-03-30 08:13:45 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-03-30 08:13:45 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=0 bl=148 pwr=0
2025-03-30 08:13:45 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=1 bl=148 pwr=0
2025-03-30 08:13:45 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=2 bl=148 pwr=0
2025-03-30 08:13:45 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=3 bl=148 pwr=0
2025-03-30 08:13:45 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=4 bl=148 pwr=0
2025-03-30 08:13:45 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=5 bl=148 pwr=0
2025-03-30 08:13:45 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=6 bl=148 pwr=0
2025-03-30 08:13:45 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=7 bl=148 pwr=0
2025-03-30 08:13:45 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 08:13:45 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 08:13:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:13:45 [DEBUG] fake_trx.py:317 (BTS@172.18.26.20:5700) Recv FAKE_CI cmd
2025-03-30 08:13:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:13:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:13:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:13:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:13:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:13:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:13:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:13:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:13:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:13:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:13:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:13:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:13:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:13:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:13:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:13:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:13:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:13:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:13:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:13:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:13:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:13:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:13:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:13:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:13:46 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 08:13:46 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 08:13:46 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 08:13:46 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 08:13:46 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 08:13:46 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 08:13:46 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 08:13:46 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 08:13:46 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 08:13:46 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 08:13:46 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 08:13:51 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 08:13:51 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 08:13:51 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 08:13:51 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 08:13:51 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 08:13:51 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 08:13:51 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 08:13:51 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 08:13:51 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 08:13:51 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 08:13:51 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 08:13:51 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 08:13:51 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 08:13:51 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 08:13:51 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 08:13:51 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 08:13:51 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 08:13:51 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 08:13:51 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 08:13:51 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 08:13:51 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 08:13:51 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 08:13:51 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 08:13:51 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 08:13:51 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 08:13:51 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 08:13:51 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 08:13:51 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 08:13:51 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 08:13:51 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 08:13:51 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 08:13:51 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 08:13:51 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 08:13:51 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 08:13:51 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 08:13:51 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 08:13:51 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 08:13:51 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 08:13:51 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 08:13:51 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 08:13:51 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 08:13:51 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 08:13:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 08:13:51 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 08:13:51 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 08:13:51 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 08:13:51 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 08:13:51 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 08:13:51 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 08:13:51 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 08:13:51 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 08:13:51 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 08:13:51 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 08:13:51 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 08:13:51 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 08:13:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 08:13:51 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 08:13:51 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 08:13:51 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 08:13:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 08:13:51 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 08:13:51 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 08:13:51 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 08:13:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 08:13:51 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 08:13:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 08:13:51 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 08:13:51 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 08:13:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 08:13:51 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 08:13:51 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 08:13:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 08:13:51 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 08:13:51 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 08:13:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 08:13:51 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 08:13:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 08:13:51 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 08:13:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 08:13:51 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 08:13:51 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 08:13:51 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 08:13:51 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-03-30 08:13:51 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-03-30 08:13:51 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-03-30 08:13:51 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-03-30 08:13:51 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-03-30 08:13:51 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-03-30 08:13:51 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-03-30 08:13:51 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-03-30 08:13:51 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-03-30 08:13:51 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-03-30 08:13:51 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=0 bl=148 pwr=0
2025-03-30 08:13:51 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=1 bl=148 pwr=0
2025-03-30 08:13:51 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=2 bl=148 pwr=0
2025-03-30 08:13:51 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=3 bl=148 pwr=0
2025-03-30 08:13:51 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=4 bl=148 pwr=0
2025-03-30 08:13:51 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=5 bl=148 pwr=0
2025-03-30 08:13:51 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=6 bl=148 pwr=0
2025-03-30 08:13:51 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=7 bl=148 pwr=0
2025-03-30 08:13:51 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 08:13:51 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 08:13:51 [DEBUG] fake_trx.py:317 (BTS@172.18.26.20:5700) Recv FAKE_CI cmd
2025-03-30 08:13:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:13:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 08:13:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:13:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:13:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:13:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:13:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:13:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:13:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:13:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:13:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:13:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:13:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:13:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:13:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:13:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:13:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:13:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:13:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:13:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:13:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:13:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:13:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:13:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:13:51 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 08:13:51 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 08:13:51 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 08:13:51 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 08:13:51 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 08:13:51 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 08:13:51 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 08:13:51 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 08:13:51 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 08:13:51 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 08:13:51 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 08:13:56 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 08:13:56 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 08:13:56 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 08:13:56 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 08:13:56 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 08:13:56 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 08:13:56 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 08:13:56 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 08:13:56 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 08:13:56 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 08:13:56 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 08:13:56 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 08:13:56 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 08:13:56 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 08:13:56 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 08:13:56 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 08:13:56 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 08:13:56 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 08:13:56 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 08:13:56 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 08:13:56 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 08:13:56 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 08:13:56 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 08:13:56 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 08:13:56 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 08:13:56 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 08:13:56 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 08:13:56 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 08:13:56 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 08:13:56 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 08:13:56 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 08:13:56 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 08:13:56 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 08:13:56 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 08:13:56 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 08:13:56 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 08:13:56 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 08:13:56 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 08:13:56 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 08:13:56 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 08:13:56 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 08:13:56 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 08:13:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 08:13:56 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 08:13:56 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 08:13:56 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 08:13:56 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 08:13:56 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 08:13:56 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 08:13:56 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 08:13:56 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 08:13:56 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 08:13:56 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 08:13:56 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 08:13:56 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 08:13:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 08:13:56 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 08:13:56 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 08:13:56 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 08:13:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 08:13:56 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 08:13:56 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 08:13:56 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 08:13:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 08:13:56 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 08:13:56 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 08:13:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 08:13:56 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 08:13:56 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 08:13:56 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 08:13:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 08:13:56 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 08:13:56 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 08:13:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 08:13:56 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 08:13:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 08:13:56 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 08:13:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 08:13:56 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 08:13:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 08:13:56 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 08:13:56 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 08:13:56 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-03-30 08:13:57 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-03-30 08:13:57 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-03-30 08:13:57 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-03-30 08:13:57 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-03-30 08:13:57 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-03-30 08:13:57 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-03-30 08:13:57 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-03-30 08:13:57 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-03-30 08:13:57 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-03-30 08:13:57 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=0 bl=148 pwr=0
2025-03-30 08:13:57 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=1 bl=148 pwr=0
2025-03-30 08:13:57 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=2 bl=148 pwr=0
2025-03-30 08:13:57 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=3 bl=148 pwr=0
2025-03-30 08:13:57 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=4 bl=148 pwr=0
2025-03-30 08:13:57 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=5 bl=148 pwr=0
2025-03-30 08:13:57 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=6 bl=148 pwr=0
2025-03-30 08:13:57 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=7 bl=148 pwr=0
2025-03-30 08:13:57 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 08:13:57 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 08:13:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:13:57 [DEBUG] fake_trx.py:317 (BTS@172.18.26.20:5700) Recv FAKE_CI cmd
2025-03-30 08:13:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 08:13:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:13:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:13:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:13:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:13:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:13:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:13:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:13:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:13:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:13:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:13:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:13:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:13:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:13:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:13:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:13:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:13:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:13:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:13:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:13:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:13:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:13:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:13:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:13:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:13:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:13:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:13:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:13:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:13:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:13:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:13:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:13:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:13:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:13:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:13:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:13:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:13:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:13:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:13:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:13:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:13:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:13:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:13:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:13:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:13:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:13:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:13:57 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 08:13:57 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 08:13:57 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 08:13:57 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 08:13:57 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 08:13:57 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 08:13:57 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 08:13:57 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 08:13:57 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 08:13:57 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 08:13:57 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 08:14:02 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 08:14:02 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 08:14:02 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 08:14:02 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 08:14:02 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 08:14:02 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 08:14:02 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 08:14:02 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 08:14:02 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 08:14:02 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 08:14:02 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 08:14:02 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 08:14:02 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 08:14:02 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 08:14:02 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 08:14:02 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 08:14:02 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 08:14:02 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 08:14:02 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 08:14:02 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 08:14:02 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 08:14:02 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 08:14:02 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 08:14:02 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 08:14:02 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 08:14:02 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 08:14:02 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 08:14:02 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 08:14:02 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 08:14:02 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 08:14:02 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 08:14:02 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 08:14:02 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 08:14:02 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 08:14:02 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 08:14:02 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 08:14:02 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 08:14:02 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 08:14:02 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 08:14:02 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 08:14:02 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 08:14:02 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 08:14:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 08:14:02 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 08:14:02 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 08:14:02 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 08:14:02 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 08:14:02 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 08:14:02 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 08:14:02 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 08:14:02 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 08:14:02 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 08:14:02 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 08:14:02 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 08:14:02 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 08:14:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 08:14:02 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 08:14:02 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 08:14:02 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 08:14:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 08:14:02 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 08:14:02 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 08:14:02 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 08:14:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 08:14:02 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 08:14:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 08:14:02 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 08:14:02 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 08:14:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 08:14:02 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 08:14:02 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 08:14:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 08:14:02 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 08:14:02 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 08:14:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 08:14:02 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 08:14:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 08:14:02 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 08:14:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 08:14:02 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 08:14:02 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 08:14:02 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 08:14:02 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-03-30 08:14:02 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-03-30 08:14:02 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-03-30 08:14:02 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-03-30 08:14:02 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-03-30 08:14:02 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-03-30 08:14:02 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-03-30 08:14:02 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-03-30 08:14:02 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-03-30 08:14:02 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-03-30 08:14:02 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=0 bl=148 pwr=0
2025-03-30 08:14:02 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=1 bl=148 pwr=0
2025-03-30 08:14:02 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=2 bl=148 pwr=0
2025-03-30 08:14:02 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=3 bl=148 pwr=0
2025-03-30 08:14:02 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=4 bl=148 pwr=0
2025-03-30 08:14:02 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=5 bl=148 pwr=0
2025-03-30 08:14:02 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=6 bl=148 pwr=0
2025-03-30 08:14:02 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=7 bl=148 pwr=0
2025-03-30 08:14:02 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 08:14:02 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 08:14:02 [DEBUG] fake_trx.py:317 (BTS@172.18.26.20:5700) Recv FAKE_CI cmd
2025-03-30 08:14:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:14:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 08:14:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:14:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:14:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:14:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:14:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:14:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:14:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:14:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:14:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:14:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:14:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:14:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:14:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:14:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:14:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:14:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:14:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:14:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:14:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:14:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:14:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:14:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:14:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:14:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:14:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:14:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:14:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:14:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:14:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:14:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:14:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:14:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:14:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:14:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:14:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:14:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:14:03 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 08:14:03 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 08:14:03 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 08:14:03 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 08:14:03 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 08:14:03 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 08:14:03 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 08:14:03 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 08:14:03 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 08:14:03 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 08:14:03 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 08:14:03 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=139 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 08:14:03 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=139 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 08:14:03 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=139 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 08:14:03 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=139 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 08:14:03 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=139 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 08:14:03 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=139 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 08:14:03 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=139 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 08:14:03 [WARNING] transceiver.py:287 (BTS@172.18.26.20:5700) RX TRXD message (ver=1 fn=139 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-03-30 08:14:08 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 08:14:08 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 08:14:08 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 08:14:08 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 08:14:08 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 08:14:08 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 08:14:08 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 08:14:08 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 08:14:08 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 08:14:08 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 08:14:08 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 08:14:08 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 08:14:08 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 08:14:08 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 08:14:08 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 08:14:08 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 08:14:08 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 08:14:08 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 08:14:08 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 08:14:08 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 08:14:08 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 08:14:08 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 08:14:08 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 08:14:08 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 08:14:08 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 08:14:08 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 08:14:08 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 08:14:08 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 08:14:08 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 08:14:08 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 08:14:08 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 08:14:08 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 08:14:08 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 08:14:08 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 08:14:08 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 08:14:08 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 08:14:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 08:14:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 08:14:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 08:14:08 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 08:14:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 08:14:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 08:14:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 08:14:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 08:14:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 08:14:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 08:14:08 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 08:14:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 08:14:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 08:14:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 08:14:08 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 08:14:08 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 08:14:08 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 08:14:08 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 08:14:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 08:14:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 08:14:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 08:14:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 08:14:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 08:14:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 08:14:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 08:14:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 08:14:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 08:14:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 08:14:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 08:14:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 08:14:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 08:14:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 08:14:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 08:14:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 08:14:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 08:14:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 08:14:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 08:14:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 08:14:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 08:14:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 08:14:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 08:14:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 08:14:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 08:14:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 08:14:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 08:14:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 08:14:08 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-03-30 08:14:08 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-03-30 08:14:08 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-03-30 08:14:08 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-03-30 08:14:08 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-03-30 08:14:08 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-03-30 08:14:08 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-03-30 08:14:08 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-03-30 08:14:08 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-03-30 08:14:08 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-03-30 08:14:08 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=0 bl=148 pwr=0
2025-03-30 08:14:08 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=1 bl=148 pwr=0
2025-03-30 08:14:08 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=2 bl=148 pwr=0
2025-03-30 08:14:08 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=3 bl=148 pwr=0
2025-03-30 08:14:08 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=4 bl=148 pwr=0
2025-03-30 08:14:08 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=5 bl=148 pwr=0
2025-03-30 08:14:08 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=6 bl=148 pwr=0
2025-03-30 08:14:08 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=7 bl=148 pwr=0
2025-03-30 08:14:08 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 08:14:08 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 08:14:08 [DEBUG] fake_trx.py:317 (BTS@172.18.26.20:5700) Recv FAKE_CI cmd
2025-03-30 08:14:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:14:08 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 08:14:08 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 08:14:08 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 08:14:08 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 08:14:08 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 08:14:08 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 08:14:08 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 08:14:08 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 08:14:09 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-03-30 08:14:09 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 08:14:09 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 08:14:09 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 08:14:09 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 08:14:09 [DEBUG] clck_gen.py:128 IND CLOCK 306
2025-03-30 08:14:09 [DEBUG] clck_gen.py:128 IND CLOCK 408
2025-03-30 08:14:10 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 08:14:10 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 08:14:10 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 08:14:10 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 08:14:10 [DEBUG] clck_gen.py:128 IND CLOCK 510
2025-03-30 08:14:10 [DEBUG] clck_gen.py:128 IND CLOCK 612
2025-03-30 08:14:11 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 08:14:11 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 08:14:11 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 08:14:11 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 08:14:11 [DEBUG] clck_gen.py:128 IND CLOCK 714
2025-03-30 08:14:11 [DEBUG] clck_gen.py:128 IND CLOCK 816
2025-03-30 08:14:12 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 08:14:12 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 08:14:12 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 08:14:12 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 08:14:12 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 08:14:12 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 08:14:12 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 08:14:12 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 08:14:12 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 08:14:12 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 08:14:12 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 08:14:12 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 08:14:12 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 08:14:17 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 08:14:17 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 08:14:17 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 08:14:17 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 08:14:17 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 08:14:17 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 08:14:17 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 08:14:17 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 08:14:17 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 08:14:17 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 08:14:17 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 08:14:17 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 08:14:17 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 08:14:17 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 08:14:17 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 08:14:17 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 08:14:17 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 08:14:17 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 08:14:17 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 08:14:17 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 08:14:17 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 08:14:17 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 08:14:17 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 08:14:17 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 08:14:17 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 08:14:17 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 08:14:17 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 08:14:17 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 08:14:17 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 08:14:17 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 08:14:17 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 08:14:17 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 08:14:17 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 08:14:17 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 08:14:17 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 08:14:17 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 08:14:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 08:14:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 08:14:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 08:14:17 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 08:14:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 08:14:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 08:14:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 08:14:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 08:14:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 08:14:17 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 08:14:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 08:14:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 08:14:17 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 08:14:17 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 08:14:17 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 08:14:17 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 08:14:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 08:14:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 08:14:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 08:14:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 08:14:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 08:14:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 08:14:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 08:14:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 08:14:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 08:14:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 08:14:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 08:14:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 08:14:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 08:14:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 08:14:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 08:14:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 08:14:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 08:14:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 08:14:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 08:14:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 08:14:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 08:14:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 08:14:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 08:14:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 08:14:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 08:14:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 08:14:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 08:14:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 08:14:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 08:14:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 08:14:17 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-03-30 08:14:17 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-03-30 08:14:17 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-03-30 08:14:17 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-03-30 08:14:17 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-03-30 08:14:17 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-03-30 08:14:17 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-03-30 08:14:17 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-03-30 08:14:17 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-03-30 08:14:17 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-03-30 08:14:17 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=0 bl=148 pwr=0
2025-03-30 08:14:17 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=1 bl=148 pwr=0
2025-03-30 08:14:17 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=2 bl=148 pwr=0
2025-03-30 08:14:17 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=3 bl=148 pwr=0
2025-03-30 08:14:17 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=4 bl=148 pwr=0
2025-03-30 08:14:17 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=5 bl=148 pwr=0
2025-03-30 08:14:17 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=6 bl=148 pwr=0
2025-03-30 08:14:17 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=7 bl=148 pwr=0
2025-03-30 08:14:17 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 08:14:17 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 08:14:17 [DEBUG] fake_trx.py:317 (BTS@172.18.26.20:5700) Recv FAKE_CI cmd
2025-03-30 08:14:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:14:17 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 08:14:17 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 08:14:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 08:14:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 08:14:17 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 08:14:17 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 08:14:17 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 08:14:17 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 08:14:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD HANDOVER
2025-03-30 08:14:17 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 08:14:17 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 08:14:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 08:14:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 08:14:18 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-03-30 08:14:18 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 08:14:18 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 08:14:18 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 08:14:18 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 08:14:18 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 08:14:18 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 08:14:18 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 08:14:18 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 08:14:18 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 08:14:18 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 08:14:18 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 08:14:18 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 08:14:18 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 08:14:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:14:18 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 08:14:18 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 08:14:18 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 08:14:18 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 08:14:18 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 08:14:18 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 08:14:18 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 08:14:18 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 08:14:18 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 08:14:18 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 08:14:18 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 08:14:18 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 08:14:18 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 08:14:23 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 08:14:23 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 08:14:23 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 08:14:23 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 08:14:23 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 08:14:23 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 08:14:23 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 08:14:23 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 08:14:23 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 08:14:23 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 08:14:23 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 08:14:23 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 08:14:23 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 08:14:23 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 08:14:23 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 08:14:23 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 08:14:23 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 08:14:23 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 08:14:23 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 08:14:23 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 08:14:23 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 08:14:23 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 08:14:23 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 08:14:23 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 08:14:23 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 08:14:23 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 08:14:23 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 08:14:23 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 08:14:23 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 08:14:23 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 08:14:23 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 08:14:23 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 08:14:23 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 08:14:23 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 08:14:23 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 08:14:23 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 08:14:23 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 08:14:23 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 08:14:23 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 08:14:23 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 08:14:23 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 08:14:23 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 08:14:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 08:14:23 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 08:14:23 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 08:14:23 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 08:14:23 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 08:14:23 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 08:14:23 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 08:14:23 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 08:14:23 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 08:14:23 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 08:14:23 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 08:14:23 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 08:14:23 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 08:14:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 08:14:23 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 08:14:23 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 08:14:23 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 08:14:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 08:14:23 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 08:14:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 08:14:23 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 08:14:23 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 08:14:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 08:14:23 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 08:14:23 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 08:14:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 08:14:23 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 08:14:23 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 08:14:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 08:14:23 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 08:14:23 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 08:14:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 08:14:23 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 08:14:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 08:14:23 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 08:14:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 08:14:23 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 08:14:23 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 08:14:23 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 08:14:23 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 08:14:23 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-03-30 08:14:23 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-03-30 08:14:23 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-03-30 08:14:23 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-03-30 08:14:23 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-03-30 08:14:23 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-03-30 08:14:23 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-03-30 08:14:23 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-03-30 08:14:23 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-03-30 08:14:23 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-03-30 08:14:23 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=0 bl=148 pwr=0
2025-03-30 08:14:23 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=1 bl=148 pwr=0
2025-03-30 08:14:23 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=2 bl=148 pwr=0
2025-03-30 08:14:23 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=3 bl=148 pwr=0
2025-03-30 08:14:23 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=4 bl=148 pwr=0
2025-03-30 08:14:23 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=5 bl=148 pwr=0
2025-03-30 08:14:23 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=6 bl=148 pwr=0
2025-03-30 08:14:23 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=7 bl=148 pwr=0
2025-03-30 08:14:23 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 08:14:23 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 08:14:23 [DEBUG] fake_trx.py:317 (BTS@172.18.26.20:5700) Recv FAKE_CI cmd
2025-03-30 08:14:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:14:23 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 08:14:23 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 08:14:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 08:14:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 08:14:23 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 08:14:23 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 08:14:23 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 08:14:23 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 08:14:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD HANDOVER
2025-03-30 08:14:23 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 08:14:23 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 08:14:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 08:14:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 08:14:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:14:24 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 08:14:24 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 08:14:24 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 08:14:24 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 08:14:24 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 08:14:24 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 08:14:24 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 08:14:24 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 08:14:24 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 08:14:24 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-03-30 08:14:24 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 08:14:24 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 08:14:24 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 08:14:24 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 08:14:24 [DEBUG] clck_gen.py:128 IND CLOCK 306
2025-03-30 08:14:25 [DEBUG] clck_gen.py:128 IND CLOCK 408
2025-03-30 08:14:25 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 08:14:25 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 08:14:25 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 08:14:25 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 08:14:25 [DEBUG] clck_gen.py:128 IND CLOCK 510
2025-03-30 08:14:26 [DEBUG] clck_gen.py:128 IND CLOCK 612
2025-03-30 08:14:26 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 08:14:26 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 08:14:26 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 08:14:26 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 08:14:26 [DEBUG] clck_gen.py:128 IND CLOCK 714
2025-03-30 08:14:27 [DEBUG] clck_gen.py:128 IND CLOCK 816
2025-03-30 08:14:27 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 08:14:27 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 08:14:27 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 08:14:27 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 08:14:27 [DEBUG] clck_gen.py:128 IND CLOCK 918
2025-03-30 08:14:28 [DEBUG] clck_gen.py:128 IND CLOCK 1020
2025-03-30 08:14:28 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 08:14:28 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 08:14:28 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 08:14:28 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 08:14:28 [DEBUG] clck_gen.py:128 IND CLOCK 1122
2025-03-30 08:14:28 [DEBUG] clck_gen.py:128 IND CLOCK 1224
2025-03-30 08:14:29 [DEBUG] clck_gen.py:128 IND CLOCK 1326
2025-03-30 08:14:29 [DEBUG] clck_gen.py:128 IND CLOCK 1428
2025-03-30 08:14:30 [DEBUG] clck_gen.py:128 IND CLOCK 1530
2025-03-30 08:14:30 [DEBUG] clck_gen.py:128 IND CLOCK 1632
2025-03-30 08:14:31 [DEBUG] clck_gen.py:128 IND CLOCK 1734
2025-03-30 08:14:31 [DEBUG] clck_gen.py:128 IND CLOCK 1836
2025-03-30 08:14:32 [DEBUG] clck_gen.py:128 IND CLOCK 1938
2025-03-30 08:14:32 [DEBUG] clck_gen.py:128 IND CLOCK 2040
2025-03-30 08:14:33 [DEBUG] clck_gen.py:128 IND CLOCK 2142
2025-03-30 08:14:33 [DEBUG] clck_gen.py:128 IND CLOCK 2244
2025-03-30 08:14:34 [DEBUG] clck_gen.py:128 IND CLOCK 2346
2025-03-30 08:14:34 [DEBUG] clck_gen.py:128 IND CLOCK 2448
2025-03-30 08:14:35 [DEBUG] clck_gen.py:128 IND CLOCK 2550
2025-03-30 08:14:35 [DEBUG] clck_gen.py:128 IND CLOCK 2652
2025-03-30 08:14:36 [DEBUG] clck_gen.py:128 IND CLOCK 2754
2025-03-30 08:14:36 [DEBUG] clck_gen.py:128 IND CLOCK 2856
2025-03-30 08:14:36 [DEBUG] clck_gen.py:128 IND CLOCK 2958
2025-03-30 08:14:37 [DEBUG] clck_gen.py:128 IND CLOCK 3060
2025-03-30 08:14:37 [DEBUG] clck_gen.py:128 IND CLOCK 3162
2025-03-30 08:14:38 [DEBUG] clck_gen.py:128 IND CLOCK 3264
2025-03-30 08:14:38 [DEBUG] clck_gen.py:128 IND CLOCK 3366
2025-03-30 08:14:39 [DEBUG] clck_gen.py:128 IND CLOCK 3468
2025-03-30 08:14:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 08:14:39 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 08:14:39 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 08:14:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 08:14:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 08:14:39 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 08:14:39 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 08:14:39 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 08:14:39 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 08:14:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:14:39 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 08:14:39 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 08:14:39 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 08:14:39 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 08:14:39 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 08:14:39 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 08:14:39 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 08:14:39 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 08:14:39 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 08:14:39 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 08:14:39 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 08:14:39 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 08:14:39 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 08:14:44 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 08:14:44 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 08:14:44 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 08:14:44 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 08:14:44 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 08:14:44 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 08:14:44 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 08:14:44 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 08:14:44 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 08:14:44 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 08:14:44 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 08:14:44 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 08:14:44 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 08:14:44 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 08:14:44 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 08:14:44 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 08:14:44 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 08:14:44 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 08:14:44 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 08:14:44 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 08:14:44 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 08:14:44 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 08:14:44 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 08:14:44 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 08:14:44 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 08:14:44 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 08:14:44 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 08:14:44 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 08:14:44 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 08:14:44 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 08:14:44 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 08:14:44 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 08:14:44 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 08:14:44 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 08:14:44 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 08:14:44 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 08:14:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 08:14:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 08:14:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 08:14:44 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 08:14:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 08:14:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 08:14:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 08:14:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 08:14:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 08:14:44 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 08:14:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 08:14:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 08:14:44 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 08:14:44 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 08:14:44 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 08:14:44 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 08:14:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 08:14:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 08:14:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 08:14:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 08:14:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 08:14:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 08:14:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 08:14:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 08:14:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 08:14:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 08:14:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 08:14:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 08:14:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 08:14:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 08:14:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 08:14:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 08:14:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 08:14:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 08:14:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 08:14:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 08:14:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 08:14:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 08:14:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 08:14:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 08:14:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 08:14:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 08:14:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 08:14:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 08:14:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 08:14:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 08:14:44 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-03-30 08:14:45 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-03-30 08:14:45 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-03-30 08:14:45 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-03-30 08:14:45 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-03-30 08:14:45 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-03-30 08:14:45 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-03-30 08:14:45 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-03-30 08:14:45 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-03-30 08:14:45 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-03-30 08:14:45 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=0 bl=148 pwr=0
2025-03-30 08:14:45 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=1 bl=148 pwr=0
2025-03-30 08:14:45 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=2 bl=148 pwr=0
2025-03-30 08:14:45 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=3 bl=148 pwr=0
2025-03-30 08:14:45 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=4 bl=148 pwr=0
2025-03-30 08:14:45 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=5 bl=148 pwr=0
2025-03-30 08:14:45 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=6 bl=148 pwr=0
2025-03-30 08:14:45 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=7 bl=148 pwr=0
2025-03-30 08:14:45 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 08:14:45 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 08:14:45 [DEBUG] fake_trx.py:317 (BTS@172.18.26.20:5700) Recv FAKE_CI cmd
2025-03-30 08:14:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:14:45 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 08:14:45 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 08:14:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 08:14:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 08:14:45 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 08:14:45 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 08:14:45 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 08:14:45 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 08:14:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD HANDOVER
2025-03-30 08:14:45 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 08:14:45 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 08:14:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 08:14:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 08:14:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:14:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD HANDOVER
2025-03-30 08:14:45 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-03-30 08:14:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 08:14:45 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 08:14:45 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 08:14:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 08:14:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 08:14:45 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 08:14:45 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 08:14:45 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 08:14:45 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 08:14:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:14:45 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 08:14:45 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 08:14:45 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 08:14:45 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 08:14:45 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 08:14:45 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 08:14:45 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 08:14:45 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 08:14:45 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 08:14:45 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 08:14:45 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 08:14:45 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 08:14:45 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 08:14:45 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 08:14:45 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 08:14:45 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 08:14:45 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 08:14:50 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 08:14:50 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 08:14:50 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 08:14:50 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 08:14:50 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 08:14:50 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 08:14:50 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 08:14:50 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 08:14:50 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 08:14:50 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 08:14:50 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 08:14:50 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 08:14:50 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 08:14:50 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 08:14:50 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 08:14:50 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 08:14:50 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 08:14:50 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 08:14:50 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 08:14:50 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 08:14:50 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 08:14:50 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 08:14:50 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 08:14:50 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 08:14:50 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 08:14:50 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 08:14:50 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 08:14:50 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 08:14:50 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 08:14:50 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 08:14:50 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 08:14:50 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 08:14:50 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 08:14:50 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 08:14:50 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 08:14:50 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 08:14:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 08:14:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 08:14:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 08:14:50 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 08:14:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 08:14:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 08:14:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 08:14:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 08:14:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 08:14:50 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 08:14:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 08:14:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 08:14:50 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 08:14:50 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 08:14:50 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 08:14:50 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 08:14:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 08:14:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 08:14:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 08:14:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 08:14:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 08:14:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 08:14:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 08:14:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 08:14:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 08:14:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 08:14:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 08:14:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 08:14:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 08:14:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 08:14:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 08:14:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 08:14:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 08:14:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 08:14:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 08:14:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 08:14:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 08:14:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 08:14:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 08:14:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 08:14:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 08:14:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 08:14:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 08:14:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 08:14:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 08:14:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 08:14:50 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-03-30 08:14:51 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-03-30 08:14:51 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-03-30 08:14:51 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-03-30 08:14:51 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-03-30 08:14:51 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-03-30 08:14:51 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-03-30 08:14:51 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-03-30 08:14:51 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-03-30 08:14:51 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-03-30 08:14:51 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=0 bl=148 pwr=0
2025-03-30 08:14:51 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=1 bl=148 pwr=0
2025-03-30 08:14:51 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=2 bl=148 pwr=0
2025-03-30 08:14:51 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=3 bl=148 pwr=0
2025-03-30 08:14:51 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=4 bl=148 pwr=0
2025-03-30 08:14:51 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=5 bl=148 pwr=0
2025-03-30 08:14:51 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=6 bl=148 pwr=0
2025-03-30 08:14:51 [WARNING] transceiver.py:330 (BTS@172.18.26.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=7 bl=148 pwr=0
2025-03-30 08:14:51 [DEBUG] fake_trx.py:273 (BTS@172.18.26.20:5700) Recv FAKE_TOA cmd
2025-03-30 08:14:51 [DEBUG] fake_trx.py:292 (BTS@172.18.26.20:5700) Recv FAKE_RSSI cmd
2025-03-30 08:14:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:14:51 [DEBUG] fake_trx.py:317 (BTS@172.18.26.20:5700) Recv FAKE_CI cmd
2025-03-30 08:14:51 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 08:14:51 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 08:14:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 08:14:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 08:14:51 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 08:14:51 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 08:14:51 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 08:14:51 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 08:14:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD HANDOVER
2025-03-30 08:14:51 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 08:14:51 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 08:14:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 08:14:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 08:14:51 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-03-30 08:14:51 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 08:14:51 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 08:14:51 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 08:14:51 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 08:14:52 [DEBUG] clck_gen.py:128 IND CLOCK 306
2025-03-30 08:14:52 [DEBUG] clck_gen.py:128 IND CLOCK 408
2025-03-30 08:14:52 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 08:14:52 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 08:14:52 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 08:14:52 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 08:14:53 [DEBUG] clck_gen.py:128 IND CLOCK 510
2025-03-30 08:14:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 08:14:53 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 08:14:53 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 08:14:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD ECHO
2025-03-30 08:14:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.26.22:6700) Ignore CMD SETSLOT
2025-03-30 08:14:53 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.26.22:6700) Recv RXTUNE cmd
2025-03-30 08:14:53 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.26.22:6700) Recv TXTUNE cmd
2025-03-30 08:14:53 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.26.22:6700) Recv POWERON CMD
2025-03-30 08:14:53 [INFO] ctrl_if_trx.py:109 (MS@172.18.26.22:6700) Starting transceiver...
2025-03-30 08:14:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD NOHANDOVER
2025-03-30 08:14:53 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.26.22:6700) Recv POWEROFF cmd
2025-03-30 08:14:53 [INFO] ctrl_if_trx.py:117 (MS@172.18.26.22:6700) Stopping transceiver...
2025-03-30 08:14:53 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.26.20:5700) Recv SETPOWER cmd
2025-03-30 08:14:53 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.26.20:5700/1) Recv SETPOWER cmd
2025-03-30 08:14:53 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.26.20:5700/2) Recv SETPOWER cmd
2025-03-30 08:14:53 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.26.20:5700/3) Recv SETPOWER cmd
2025-03-30 08:14:53 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 08:14:53 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 08:14:53 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 08:14:53 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 08:14:53 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 08:14:53 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 08:14:53 [INFO] transceiver.py:276 Stopping clock generator
2025-03-30 08:14:58 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 08:14:58 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 08:14:58 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 08:14:58 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 08:14:58 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 08:14:58 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 08:14:58 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 08:14:58 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 08:14:58 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.26.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 08:14:58 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.26.20:5700) Recv SETFORMAT cmd
2025-03-30 08:14:58 [INFO] ctrl_if_trx.py:201 (BTS@172.18.26.20:5700) TRXD header version 1 -> 1
2025-03-30 08:14:58 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.26.20:5700/1) Recv RXTUNE cmd
2025-03-30 08:14:58 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.26.20:5700/1) Recv TXTUNE cmd
2025-03-30 08:14:58 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 08:14:58 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.26.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 08:14:58 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 08:14:58 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.26.20:5700/1) Recv NOMTXPOWER cmd
2025-03-30 08:14:58 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.26.20:5700/1) Recv SETFORMAT cmd
2025-03-30 08:14:58 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.26.20:5700/1) TRXD header version 1 -> 1
2025-03-30 08:14:58 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.26.20:5700/2) Recv RXTUNE cmd
2025-03-30 08:14:58 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.26.20:5700/2) Recv TXTUNE cmd
2025-03-30 08:14:58 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 08:14:58 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.26.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 08:14:58 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 08:14:58 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.26.20:5700/2) Recv NOMTXPOWER cmd
2025-03-30 08:14:58 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.26.20:5700/2) Recv SETFORMAT cmd
2025-03-30 08:14:58 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.26.20:5700/2) TRXD header version 1 -> 1
2025-03-30 08:14:58 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.26.20:5700/3) Recv RXTUNE cmd
2025-03-30 08:14:58 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.26.20:5700/3) Recv TXTUNE cmd
2025-03-30 08:14:58 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 08:14:58 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.26.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-03-30 08:14:58 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 08:14:58 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.26.20:5700/3) Recv NOMTXPOWER cmd
2025-03-30 08:14:58 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.26.20:5700/3) Recv SETFORMAT cmd
2025-03-30 08:14:58 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.26.20:5700/3) TRXD header version 1 -> 1
2025-03-30 08:14:58 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.26.20:5700) Recv RXTUNE cmd
2025-03-30 08:14:58 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETTSC
2025-03-30 08:14:58 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETTSC
2025-03-30 08:14:58 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETTSC
2025-03-30 08:14:58 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.26.20:5700) Recv TXTUNE cmd
2025-03-30 08:14:58 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETRXGAIN
2025-03-30 08:14:58 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETRXGAIN
2025-03-30 08:14:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETTSC
2025-03-30 08:14:58 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 08:14:58 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETRXGAIN
2025-03-30 08:14:58 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.26.20:5700) Recv NOMTXPOWER cmd
2025-03-30 08:14:58 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 08:14:58 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 08:14:58 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.26.20:5700) Recv POWERON CMD
2025-03-30 08:14:58 [INFO] ctrl_if_trx.py:109 (BTS@172.18.26.20:5700) Starting transceiver...
2025-03-30 08:14:58 [INFO] transceiver.py:273 Starting clock generator
2025-03-30 08:14:58 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-03-30 08:14:58 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 08:14:58 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 08:14:58 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 08:14:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETRXGAIN
2025-03-30 08:14:58 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 08:14:58 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 08:14:58 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 08:14:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 08:14:58 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 08:14:58 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 08:14:58 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 08:14:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 08:14:58 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 08:14:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 08:14:58 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 08:14:58 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 08:14:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 08:14:58 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 08:14:58 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 08:14:58 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 08:14:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 08:14:58 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.26.20:5700/1) Ignore CMD SETSLOT
2025-03-30 08:14:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 08:14:58 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.26.20:5700/1) Recv RFMUTE cmd
2025-03-30 08:14:58 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 08:14:58 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 08:14:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 08:14:58 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.26.20:5700/2) Ignore CMD SETSLOT
2025-03-30 08:14:58 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 08:14:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.26.20:5700) Ignore CMD SETSLOT
2025-03-30 08:14:58 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.26.20:5700/2) Recv RFMUTE cmd
2025-03-30 08:14:58 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.26.20:5700/3) Ignore CMD SETSLOT
2025-03-30 08:14:58 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.26.20:5700) Recv RFMUTE cmd
2025-03-30 08:14:58 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.26.20:5700/3) Recv RFMUTE cmd
2025-03-30 08:14:58 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.26.20:5700) Recv POWEROFF cmd
2025-03-30 08:14:58 [INFO] ctrl_if_trx.py:117 (BTS@172.18.26.20:5700) Stopping transceiver...
2025-03-30 08:14:58 [INFO] transceiver.py:276 Stopping clock generator